Commit | Line | Data |
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1b419769 IA |
1 | /* |
2 | * comedi/drivers/ni_labpc_common.c | |
3 | * | |
4 | * Common support code for "ni_labpc", "ni_labpc_pci" and "ni_labpc_cs". | |
5 | * | |
6 | * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/delay.h> | |
c0cfeca1 | 23 | #include <linux/slab.h> |
1b419769 IA |
24 | |
25 | #include "../comedidev.h" | |
26 | ||
c0cfeca1 | 27 | #include "comedi_8254.h" |
1b419769 | 28 | #include "8255.h" |
1b419769 IA |
29 | #include "ni_labpc.h" |
30 | #include "ni_labpc_regs.h" | |
31 | #include "ni_labpc_isadma.h" | |
32 | ||
33 | enum scan_mode { | |
34 | MODE_SINGLE_CHAN, | |
35 | MODE_SINGLE_CHAN_INTERVAL, | |
36 | MODE_MULT_CHAN_UP, | |
37 | MODE_MULT_CHAN_DOWN, | |
38 | }; | |
39 | ||
40 | static const struct comedi_lrange range_labpc_plus_ai = { | |
41 | 16, { | |
42 | BIP_RANGE(5), | |
43 | BIP_RANGE(4), | |
44 | BIP_RANGE(2.5), | |
45 | BIP_RANGE(1), | |
46 | BIP_RANGE(0.5), | |
47 | BIP_RANGE(0.25), | |
48 | BIP_RANGE(0.1), | |
49 | BIP_RANGE(0.05), | |
50 | UNI_RANGE(10), | |
51 | UNI_RANGE(8), | |
52 | UNI_RANGE(5), | |
53 | UNI_RANGE(2), | |
54 | UNI_RANGE(1), | |
55 | UNI_RANGE(0.5), | |
56 | UNI_RANGE(0.2), | |
57 | UNI_RANGE(0.1) | |
58 | } | |
59 | }; | |
60 | ||
61 | static const struct comedi_lrange range_labpc_1200_ai = { | |
62 | 14, { | |
63 | BIP_RANGE(5), | |
64 | BIP_RANGE(2.5), | |
65 | BIP_RANGE(1), | |
66 | BIP_RANGE(0.5), | |
67 | BIP_RANGE(0.25), | |
68 | BIP_RANGE(0.1), | |
69 | BIP_RANGE(0.05), | |
70 | UNI_RANGE(10), | |
71 | UNI_RANGE(5), | |
72 | UNI_RANGE(2), | |
73 | UNI_RANGE(1), | |
74 | UNI_RANGE(0.5), | |
75 | UNI_RANGE(0.2), | |
76 | UNI_RANGE(0.1) | |
77 | } | |
78 | }; | |
79 | ||
80 | static const struct comedi_lrange range_labpc_ao = { | |
81 | 2, { | |
82 | BIP_RANGE(5), | |
83 | UNI_RANGE(10) | |
84 | } | |
85 | }; | |
86 | ||
87 | /* functions that do inb/outb and readb/writeb so we can use | |
88 | * function pointers to decide which to use */ | |
89 | static unsigned int labpc_inb(struct comedi_device *dev, unsigned long reg) | |
90 | { | |
91 | return inb(dev->iobase + reg); | |
92 | } | |
93 | ||
94 | static void labpc_outb(struct comedi_device *dev, | |
95 | unsigned int byte, unsigned long reg) | |
96 | { | |
97 | outb(byte, dev->iobase + reg); | |
98 | } | |
99 | ||
100 | static unsigned int labpc_readb(struct comedi_device *dev, unsigned long reg) | |
101 | { | |
102 | return readb(dev->mmio + reg); | |
103 | } | |
104 | ||
105 | static void labpc_writeb(struct comedi_device *dev, | |
106 | unsigned int byte, unsigned long reg) | |
107 | { | |
108 | writeb(byte, dev->mmio + reg); | |
109 | } | |
110 | ||
1b419769 IA |
111 | static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s) |
112 | { | |
113 | struct labpc_private *devpriv = dev->private; | |
114 | unsigned long flags; | |
115 | ||
116 | spin_lock_irqsave(&dev->spinlock, flags); | |
117 | devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG); | |
118 | devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG); | |
119 | spin_unlock_irqrestore(&dev->spinlock, flags); | |
120 | ||
121 | devpriv->cmd3 = 0; | |
122 | devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG); | |
123 | ||
124 | return 0; | |
125 | } | |
126 | ||
127 | static void labpc_ai_set_chan_and_gain(struct comedi_device *dev, | |
128 | enum scan_mode mode, | |
129 | unsigned int chan, | |
130 | unsigned int range, | |
131 | unsigned int aref) | |
132 | { | |
8cf27116 | 133 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
134 | struct labpc_private *devpriv = dev->private; |
135 | ||
136 | if (board->is_labpc1200) { | |
137 | /* | |
138 | * The LabPC-1200 boards do not have a gain | |
139 | * of '0x10'. Skip the range values that would | |
140 | * result in this gain. | |
141 | */ | |
142 | range += (range > 0) + (range > 7); | |
143 | } | |
144 | ||
145 | /* munge channel bits for differential/scan disabled mode */ | |
146 | if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) && | |
147 | aref == AREF_DIFF) | |
148 | chan *= 2; | |
149 | devpriv->cmd1 = CMD1_MA(chan); | |
150 | devpriv->cmd1 |= CMD1_GAIN(range); | |
151 | ||
152 | devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG); | |
153 | } | |
154 | ||
155 | static void labpc_setup_cmd6_reg(struct comedi_device *dev, | |
156 | struct comedi_subdevice *s, | |
157 | enum scan_mode mode, | |
158 | enum transfer_type xfer, | |
159 | unsigned int range, | |
160 | unsigned int aref, | |
161 | bool ena_intr) | |
162 | { | |
8cf27116 | 163 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
164 | struct labpc_private *devpriv = dev->private; |
165 | ||
166 | if (!board->is_labpc1200) | |
167 | return; | |
168 | ||
169 | /* reference inputs to ground or common? */ | |
170 | if (aref != AREF_GROUND) | |
171 | devpriv->cmd6 |= CMD6_NRSE; | |
172 | else | |
173 | devpriv->cmd6 &= ~CMD6_NRSE; | |
174 | ||
175 | /* bipolar or unipolar range? */ | |
176 | if (comedi_range_is_unipolar(s, range)) | |
177 | devpriv->cmd6 |= CMD6_ADCUNI; | |
178 | else | |
179 | devpriv->cmd6 &= ~CMD6_ADCUNI; | |
180 | ||
181 | /* interrupt on fifo half full? */ | |
182 | if (xfer == fifo_half_full_transfer) | |
183 | devpriv->cmd6 |= CMD6_HFINTEN; | |
184 | else | |
185 | devpriv->cmd6 &= ~CMD6_HFINTEN; | |
186 | ||
187 | /* enable interrupt on counter a1 terminal count? */ | |
188 | if (ena_intr) | |
189 | devpriv->cmd6 |= CMD6_DQINTEN; | |
190 | else | |
191 | devpriv->cmd6 &= ~CMD6_DQINTEN; | |
192 | ||
193 | /* are we scanning up or down through channels? */ | |
194 | if (mode == MODE_MULT_CHAN_UP) | |
195 | devpriv->cmd6 |= CMD6_SCANUP; | |
196 | else | |
197 | devpriv->cmd6 &= ~CMD6_SCANUP; | |
198 | ||
199 | devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG); | |
200 | } | |
201 | ||
202 | static unsigned int labpc_read_adc_fifo(struct comedi_device *dev) | |
203 | { | |
204 | struct labpc_private *devpriv = dev->private; | |
205 | unsigned int lsb = devpriv->read_byte(dev, ADC_FIFO_REG); | |
206 | unsigned int msb = devpriv->read_byte(dev, ADC_FIFO_REG); | |
207 | ||
208 | return (msb << 8) | lsb; | |
209 | } | |
210 | ||
211 | static void labpc_clear_adc_fifo(struct comedi_device *dev) | |
212 | { | |
213 | struct labpc_private *devpriv = dev->private; | |
214 | ||
215 | devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG); | |
216 | labpc_read_adc_fifo(dev); | |
217 | } | |
218 | ||
219 | static int labpc_ai_eoc(struct comedi_device *dev, | |
220 | struct comedi_subdevice *s, | |
221 | struct comedi_insn *insn, | |
222 | unsigned long context) | |
223 | { | |
224 | struct labpc_private *devpriv = dev->private; | |
225 | ||
226 | devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG); | |
227 | if (devpriv->stat1 & STAT1_DAVAIL) | |
228 | return 0; | |
229 | return -EBUSY; | |
230 | } | |
231 | ||
232 | static int labpc_ai_insn_read(struct comedi_device *dev, | |
233 | struct comedi_subdevice *s, | |
234 | struct comedi_insn *insn, | |
235 | unsigned int *data) | |
236 | { | |
237 | struct labpc_private *devpriv = dev->private; | |
238 | unsigned int chan = CR_CHAN(insn->chanspec); | |
239 | unsigned int range = CR_RANGE(insn->chanspec); | |
240 | unsigned int aref = CR_AREF(insn->chanspec); | |
241 | int ret; | |
242 | int i; | |
243 | ||
244 | /* disable timed conversions, interrupt generation and dma */ | |
245 | labpc_cancel(dev, s); | |
246 | ||
247 | labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref); | |
248 | ||
249 | labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer, | |
250 | range, aref, false); | |
251 | ||
252 | /* setup cmd4 register */ | |
253 | devpriv->cmd4 = 0; | |
254 | devpriv->cmd4 |= CMD4_ECLKRCV; | |
255 | /* single-ended/differential */ | |
256 | if (aref == AREF_DIFF) | |
257 | devpriv->cmd4 |= CMD4_SEDIFF; | |
258 | devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG); | |
259 | ||
260 | /* initialize pacer counter to prevent any problems */ | |
c0cfeca1 | 261 | comedi_8254_set_mode(devpriv->counter, 0, I8254_MODE2 | I8254_BINARY); |
1b419769 IA |
262 | |
263 | labpc_clear_adc_fifo(dev); | |
264 | ||
265 | for (i = 0; i < insn->n; i++) { | |
266 | /* trigger conversion */ | |
267 | devpriv->write_byte(dev, 0x1, ADC_START_CONVERT_REG); | |
268 | ||
269 | ret = comedi_timeout(dev, s, insn, labpc_ai_eoc, 0); | |
270 | if (ret) | |
271 | return ret; | |
272 | ||
273 | data[i] = labpc_read_adc_fifo(dev); | |
274 | } | |
275 | ||
276 | return insn->n; | |
277 | } | |
278 | ||
279 | static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd, | |
280 | enum scan_mode mode) | |
281 | { | |
282 | if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW) | |
283 | return true; | |
284 | ||
285 | return false; | |
286 | } | |
287 | ||
288 | static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd, | |
289 | enum scan_mode mode) | |
290 | { | |
291 | if (cmd->convert_src != TRIG_TIMER) | |
292 | return 0; | |
293 | ||
294 | if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER) | |
295 | return cmd->scan_begin_arg; | |
296 | ||
297 | return cmd->convert_arg; | |
298 | } | |
299 | ||
300 | static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, | |
301 | enum scan_mode mode, unsigned int ns) | |
302 | { | |
303 | if (cmd->convert_src != TRIG_TIMER) | |
304 | return; | |
305 | ||
306 | if (mode == MODE_SINGLE_CHAN && | |
307 | cmd->scan_begin_src == TRIG_TIMER) { | |
308 | cmd->scan_begin_arg = ns; | |
309 | if (cmd->convert_arg > cmd->scan_begin_arg) | |
310 | cmd->convert_arg = cmd->scan_begin_arg; | |
311 | } else { | |
312 | cmd->convert_arg = ns; | |
313 | } | |
314 | } | |
315 | ||
316 | static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd, | |
317 | enum scan_mode mode) | |
318 | { | |
319 | if (cmd->scan_begin_src != TRIG_TIMER) | |
320 | return 0; | |
321 | ||
322 | if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER) | |
323 | return 0; | |
324 | ||
325 | return cmd->scan_begin_arg; | |
326 | } | |
327 | ||
328 | static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, | |
329 | enum scan_mode mode, unsigned int ns) | |
330 | { | |
331 | if (cmd->scan_begin_src != TRIG_TIMER) | |
332 | return; | |
333 | ||
334 | if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER) | |
335 | return; | |
336 | ||
337 | cmd->scan_begin_arg = ns; | |
338 | } | |
339 | ||
340 | /* figures out what counter values to use based on command */ | |
341 | static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd, | |
342 | enum scan_mode mode) | |
343 | { | |
c0cfeca1 HS |
344 | struct comedi_8254 *pacer = dev->pacer; |
345 | unsigned int convert_period = labpc_ai_convert_period(cmd, mode); | |
346 | unsigned int scan_period = labpc_ai_scan_period(cmd, mode); | |
1b419769 | 347 | unsigned int base_period; |
1b419769 IA |
348 | |
349 | /* | |
c0cfeca1 HS |
350 | * If both convert and scan triggers are TRIG_TIMER, then they |
351 | * both rely on counter b0. If only one TRIG_TIMER is used, we | |
352 | * can use the generic cascaded timing functions. | |
1b419769 | 353 | */ |
1b419769 IA |
354 | if (convert_period && scan_period) { |
355 | /* | |
c0cfeca1 | 356 | * pick the lowest divisor value we can (for maximum input |
1b419769 IA |
357 | * clock speed on convert and scan counters) |
358 | */ | |
c0cfeca1 HS |
359 | pacer->next_div1 = (scan_period - 1) / |
360 | (pacer->osc_base * I8254_MAX_COUNT) + 1; | |
c79089c8 | 361 | |
4179164e IA |
362 | comedi_check_trigger_arg_min(&pacer->next_div1, 2); |
363 | comedi_check_trigger_arg_max(&pacer->next_div1, | |
364 | I8254_MAX_COUNT); | |
1b419769 | 365 | |
c0cfeca1 | 366 | base_period = pacer->osc_base * pacer->next_div1; |
1b419769 IA |
367 | |
368 | /* set a0 for conversion frequency and b1 for scan frequency */ | |
2d9773b6 | 369 | switch (cmd->flags & CMDF_ROUND_MASK) { |
1b419769 | 370 | default: |
2d9773b6 | 371 | case CMDF_ROUND_NEAREST: |
c0cfeca1 HS |
372 | pacer->next_div = DIV_ROUND_CLOSEST(convert_period, |
373 | base_period); | |
374 | pacer->next_div2 = DIV_ROUND_CLOSEST(scan_period, | |
375 | base_period); | |
1b419769 | 376 | break; |
2d9773b6 | 377 | case CMDF_ROUND_UP: |
c0cfeca1 HS |
378 | pacer->next_div = DIV_ROUND_UP(convert_period, |
379 | base_period); | |
380 | pacer->next_div2 = DIV_ROUND_UP(scan_period, | |
381 | base_period); | |
1b419769 | 382 | break; |
2d9773b6 | 383 | case CMDF_ROUND_DOWN: |
c0cfeca1 HS |
384 | pacer->next_div = convert_period / base_period; |
385 | pacer->next_div2 = scan_period / base_period; | |
1b419769 IA |
386 | break; |
387 | } | |
388 | /* make sure a0 and b1 values are acceptable */ | |
4179164e IA |
389 | comedi_check_trigger_arg_min(&pacer->next_div, 2); |
390 | comedi_check_trigger_arg_max(&pacer->next_div, I8254_MAX_COUNT); | |
391 | comedi_check_trigger_arg_min(&pacer->next_div2, 2); | |
392 | comedi_check_trigger_arg_max(&pacer->next_div2, | |
393 | I8254_MAX_COUNT); | |
c0cfeca1 | 394 | |
1b419769 IA |
395 | /* write corrected timings to command */ |
396 | labpc_set_ai_convert_period(cmd, mode, | |
c0cfeca1 | 397 | base_period * pacer->next_div); |
1b419769 | 398 | labpc_set_ai_scan_period(cmd, mode, |
c0cfeca1 | 399 | base_period * pacer->next_div2); |
1b419769 IA |
400 | } else if (scan_period) { |
401 | /* | |
402 | * calculate cascaded counter values | |
403 | * that give desired scan timing | |
c0cfeca1 | 404 | * (pacer->next_div2 / pacer->next_div1) |
1b419769 | 405 | */ |
c0cfeca1 HS |
406 | comedi_8254_cascade_ns_to_timer(pacer, &scan_period, |
407 | cmd->flags); | |
1b419769 IA |
408 | labpc_set_ai_scan_period(cmd, mode, scan_period); |
409 | } else if (convert_period) { | |
410 | /* | |
411 | * calculate cascaded counter values | |
412 | * that give desired conversion timing | |
c0cfeca1 | 413 | * (pacer->next_div / pacer->next_div1) |
1b419769 | 414 | */ |
c0cfeca1 HS |
415 | comedi_8254_cascade_ns_to_timer(pacer, &convert_period, |
416 | cmd->flags); | |
417 | /* transfer div2 value so correct timer gets updated */ | |
418 | pacer->next_div = pacer->next_div2; | |
1b419769 IA |
419 | labpc_set_ai_convert_period(cmd, mode, convert_period); |
420 | } | |
421 | } | |
422 | ||
423 | static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd) | |
424 | { | |
425 | unsigned int chan0; | |
426 | unsigned int chan1; | |
427 | ||
428 | if (cmd->chanlist_len == 1) | |
429 | return MODE_SINGLE_CHAN; | |
430 | ||
431 | /* chanlist may be NULL during cmdtest */ | |
c1bce7fd | 432 | if (!cmd->chanlist) |
1b419769 IA |
433 | return MODE_MULT_CHAN_UP; |
434 | ||
435 | chan0 = CR_CHAN(cmd->chanlist[0]); | |
436 | chan1 = CR_CHAN(cmd->chanlist[1]); | |
437 | ||
438 | if (chan0 < chan1) | |
439 | return MODE_MULT_CHAN_UP; | |
440 | ||
441 | if (chan0 > chan1) | |
442 | return MODE_MULT_CHAN_DOWN; | |
443 | ||
444 | return MODE_SINGLE_CHAN_INTERVAL; | |
445 | } | |
446 | ||
447 | static int labpc_ai_check_chanlist(struct comedi_device *dev, | |
448 | struct comedi_subdevice *s, | |
449 | struct comedi_cmd *cmd) | |
450 | { | |
451 | enum scan_mode mode = labpc_ai_scan_mode(cmd); | |
452 | unsigned int chan0 = CR_CHAN(cmd->chanlist[0]); | |
453 | unsigned int range0 = CR_RANGE(cmd->chanlist[0]); | |
454 | unsigned int aref0 = CR_AREF(cmd->chanlist[0]); | |
455 | int i; | |
456 | ||
1b419769 IA |
457 | for (i = 0; i < cmd->chanlist_len; i++) { |
458 | unsigned int chan = CR_CHAN(cmd->chanlist[i]); | |
459 | unsigned int range = CR_RANGE(cmd->chanlist[i]); | |
460 | unsigned int aref = CR_AREF(cmd->chanlist[i]); | |
461 | ||
462 | switch (mode) { | |
463 | case MODE_SINGLE_CHAN: | |
464 | break; | |
465 | case MODE_SINGLE_CHAN_INTERVAL: | |
466 | if (chan != chan0) { | |
467 | dev_dbg(dev->class_dev, | |
468 | "channel scanning order specified in chanlist is not supported by hardware\n"); | |
469 | return -EINVAL; | |
470 | } | |
471 | break; | |
472 | case MODE_MULT_CHAN_UP: | |
473 | if (chan != i) { | |
474 | dev_dbg(dev->class_dev, | |
475 | "channel scanning order specified in chanlist is not supported by hardware\n"); | |
476 | return -EINVAL; | |
477 | } | |
478 | break; | |
479 | case MODE_MULT_CHAN_DOWN: | |
480 | if (chan != (cmd->chanlist_len - i - 1)) { | |
481 | dev_dbg(dev->class_dev, | |
482 | "channel scanning order specified in chanlist is not supported by hardware\n"); | |
483 | return -EINVAL; | |
484 | } | |
485 | break; | |
486 | } | |
487 | ||
488 | if (range != range0) { | |
489 | dev_dbg(dev->class_dev, | |
490 | "entries in chanlist must all have the same range\n"); | |
491 | return -EINVAL; | |
492 | } | |
493 | ||
494 | if (aref != aref0) { | |
495 | dev_dbg(dev->class_dev, | |
496 | "entries in chanlist must all have the same reference\n"); | |
497 | return -EINVAL; | |
498 | } | |
499 | } | |
500 | ||
501 | return 0; | |
502 | } | |
503 | ||
504 | static int labpc_ai_cmdtest(struct comedi_device *dev, | |
505 | struct comedi_subdevice *s, struct comedi_cmd *cmd) | |
506 | { | |
8cf27116 | 507 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
508 | int err = 0; |
509 | int tmp, tmp2; | |
510 | unsigned int stop_mask; | |
511 | enum scan_mode mode; | |
512 | ||
513 | /* Step 1 : check if triggers are trivially valid */ | |
514 | ||
4179164e IA |
515 | err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT); |
516 | err |= comedi_check_trigger_src(&cmd->scan_begin_src, | |
1b419769 | 517 | TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT); |
4179164e IA |
518 | err |= comedi_check_trigger_src(&cmd->convert_src, |
519 | TRIG_TIMER | TRIG_EXT); | |
520 | err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); | |
1b419769 IA |
521 | |
522 | stop_mask = TRIG_COUNT | TRIG_NONE; | |
523 | if (board->is_labpc1200) | |
524 | stop_mask |= TRIG_EXT; | |
4179164e | 525 | err |= comedi_check_trigger_src(&cmd->stop_src, stop_mask); |
1b419769 IA |
526 | |
527 | if (err) | |
528 | return 1; | |
529 | ||
530 | /* Step 2a : make sure trigger sources are unique */ | |
531 | ||
4179164e IA |
532 | err |= comedi_check_trigger_is_unique(cmd->start_src); |
533 | err |= comedi_check_trigger_is_unique(cmd->scan_begin_src); | |
534 | err |= comedi_check_trigger_is_unique(cmd->convert_src); | |
535 | err |= comedi_check_trigger_is_unique(cmd->stop_src); | |
1b419769 IA |
536 | |
537 | /* Step 2b : and mutually compatible */ | |
538 | ||
539 | /* can't have external stop and start triggers at once */ | |
540 | if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT) | |
541 | err++; | |
542 | ||
543 | if (err) | |
544 | return 2; | |
545 | ||
546 | /* Step 3: check if arguments are trivially valid */ | |
547 | ||
548 | switch (cmd->start_src) { | |
549 | case TRIG_NOW: | |
4179164e | 550 | err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); |
1b419769 IA |
551 | break; |
552 | case TRIG_EXT: | |
553 | /* start_arg value is ignored */ | |
554 | break; | |
555 | } | |
556 | ||
557 | if (!cmd->chanlist_len) | |
558 | err |= -EINVAL; | |
4179164e IA |
559 | err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, |
560 | cmd->chanlist_len); | |
1b419769 | 561 | |
4179164e IA |
562 | if (cmd->convert_src == TRIG_TIMER) { |
563 | err |= comedi_check_trigger_arg_min(&cmd->convert_arg, | |
564 | board->ai_speed); | |
565 | } | |
1b419769 IA |
566 | |
567 | /* make sure scan timing is not too fast */ | |
568 | if (cmd->scan_begin_src == TRIG_TIMER) { | |
4179164e IA |
569 | if (cmd->convert_src == TRIG_TIMER) { |
570 | err |= comedi_check_trigger_arg_min(&cmd-> | |
571 | scan_begin_arg, | |
572 | cmd->convert_arg * | |
573 | cmd->chanlist_len); | |
574 | } | |
575 | err |= comedi_check_trigger_arg_min(&cmd->scan_begin_arg, | |
576 | board->ai_speed * | |
577 | cmd->chanlist_len); | |
1b419769 IA |
578 | } |
579 | ||
580 | switch (cmd->stop_src) { | |
581 | case TRIG_COUNT: | |
4179164e | 582 | err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1); |
1b419769 IA |
583 | break; |
584 | case TRIG_NONE: | |
4179164e | 585 | err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0); |
1b419769 IA |
586 | break; |
587 | /* | |
588 | * TRIG_EXT doesn't care since it doesn't | |
589 | * trigger off a numbered channel | |
590 | */ | |
591 | default: | |
592 | break; | |
593 | } | |
594 | ||
595 | if (err) | |
596 | return 3; | |
597 | ||
598 | /* step 4: fix up any arguments */ | |
599 | ||
600 | tmp = cmd->convert_arg; | |
601 | tmp2 = cmd->scan_begin_arg; | |
602 | mode = labpc_ai_scan_mode(cmd); | |
603 | labpc_adc_timing(dev, cmd, mode); | |
604 | if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg) | |
605 | err++; | |
606 | ||
607 | if (err) | |
608 | return 4; | |
609 | ||
610 | /* Step 5: check channel list if it exists */ | |
611 | if (cmd->chanlist && cmd->chanlist_len > 0) | |
612 | err |= labpc_ai_check_chanlist(dev, s, cmd); | |
613 | ||
614 | if (err) | |
615 | return 5; | |
616 | ||
617 | return 0; | |
618 | } | |
619 | ||
620 | static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) | |
621 | { | |
8cf27116 | 622 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
623 | struct labpc_private *devpriv = dev->private; |
624 | struct comedi_async *async = s->async; | |
625 | struct comedi_cmd *cmd = &async->cmd; | |
626 | enum scan_mode mode = labpc_ai_scan_mode(cmd); | |
627 | unsigned int chanspec = (mode == MODE_MULT_CHAN_UP) ? | |
628 | cmd->chanlist[cmd->chanlist_len - 1] : | |
629 | cmd->chanlist[0]; | |
630 | unsigned int chan = CR_CHAN(chanspec); | |
631 | unsigned int range = CR_RANGE(chanspec); | |
632 | unsigned int aref = CR_AREF(chanspec); | |
633 | enum transfer_type xfer; | |
634 | unsigned long flags; | |
635 | ||
636 | /* make sure board is disabled before setting up acquisition */ | |
637 | labpc_cancel(dev, s); | |
638 | ||
639 | /* initialize software conversion count */ | |
640 | if (cmd->stop_src == TRIG_COUNT) | |
641 | devpriv->count = cmd->stop_arg * cmd->chanlist_len; | |
642 | ||
643 | /* setup hardware conversion counter */ | |
644 | if (cmd->stop_src == TRIG_EXT) { | |
645 | /* | |
646 | * load counter a1 with count of 3 | |
647 | * (pc+ manual says this is minimum allowed) using mode 0 | |
648 | */ | |
c0cfeca1 HS |
649 | comedi_8254_load(devpriv->counter, 1, |
650 | 3, I8254_MODE0 | I8254_BINARY); | |
1b419769 IA |
651 | } else { |
652 | /* just put counter a1 in mode 0 to set its output low */ | |
c0cfeca1 HS |
653 | comedi_8254_set_mode(devpriv->counter, 1, |
654 | I8254_MODE0 | I8254_BINARY); | |
1b419769 IA |
655 | } |
656 | ||
657 | /* figure out what method we will use to transfer data */ | |
cf0438c9 | 658 | if (devpriv->dma && |
1b419769 | 659 | /* dma unsafe at RT priority, |
82d5571b IA |
660 | * and too much setup time for CMDF_WAKE_EOS */ |
661 | (cmd->flags & (CMDF_WAKE_EOS | CMDF_PRIORITY)) == 0) | |
1b419769 IA |
662 | xfer = isa_dma_transfer; |
663 | else if (/* pc-plus has no fifo-half full interrupt */ | |
664 | board->is_labpc1200 && | |
665 | /* wake-end-of-scan should interrupt on fifo not empty */ | |
82d5571b | 666 | (cmd->flags & CMDF_WAKE_EOS) == 0 && |
1b419769 IA |
667 | /* make sure we are taking more than just a few points */ |
668 | (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) | |
669 | xfer = fifo_half_full_transfer; | |
670 | else | |
671 | xfer = fifo_not_empty_transfer; | |
672 | devpriv->current_transfer = xfer; | |
673 | ||
674 | labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref); | |
675 | ||
676 | labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref, | |
677 | (cmd->stop_src == TRIG_EXT)); | |
678 | ||
679 | /* manual says to set scan enable bit on second pass */ | |
680 | if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) { | |
681 | devpriv->cmd1 |= CMD1_SCANEN; | |
682 | /* need a brief delay before enabling scan, or scan | |
683 | * list will get screwed when you switch | |
684 | * between scan up to scan down mode - dunno why */ | |
685 | udelay(1); | |
686 | devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG); | |
687 | } | |
688 | ||
689 | devpriv->write_byte(dev, cmd->chanlist_len, INTERVAL_COUNT_REG); | |
690 | /* load count */ | |
691 | devpriv->write_byte(dev, 0x1, INTERVAL_STROBE_REG); | |
692 | ||
693 | if (cmd->convert_src == TRIG_TIMER || | |
694 | cmd->scan_begin_src == TRIG_TIMER) { | |
c0cfeca1 HS |
695 | struct comedi_8254 *pacer = dev->pacer; |
696 | struct comedi_8254 *counter = devpriv->counter; | |
697 | ||
698 | comedi_8254_update_divisors(pacer); | |
699 | ||
700 | /* set up pacing */ | |
701 | comedi_8254_load(pacer, 0, pacer->divisor1, | |
702 | I8254_MODE3 | I8254_BINARY); | |
1b419769 | 703 | |
c0cfeca1 HS |
704 | /* set up conversion pacing */ |
705 | comedi_8254_set_mode(counter, 0, I8254_MODE2 | I8254_BINARY); | |
706 | if (labpc_ai_convert_period(cmd, mode)) | |
707 | comedi_8254_write(counter, 0, pacer->divisor); | |
708 | ||
709 | /* set up scan pacing */ | |
710 | if (labpc_ai_scan_period(cmd, mode)) | |
711 | comedi_8254_load(pacer, 1, pacer->divisor2, | |
712 | I8254_MODE2 | I8254_BINARY); | |
1b419769 IA |
713 | } |
714 | ||
715 | labpc_clear_adc_fifo(dev); | |
716 | ||
717 | if (xfer == isa_dma_transfer) | |
718 | labpc_setup_dma(dev, s); | |
719 | ||
720 | /* enable error interrupts */ | |
721 | devpriv->cmd3 |= CMD3_ERRINTEN; | |
722 | /* enable fifo not empty interrupt? */ | |
723 | if (xfer == fifo_not_empty_transfer) | |
724 | devpriv->cmd3 |= CMD3_FIFOINTEN; | |
725 | devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG); | |
726 | ||
727 | /* setup any external triggering/pacing (cmd4 register) */ | |
728 | devpriv->cmd4 = 0; | |
729 | if (cmd->convert_src != TRIG_EXT) | |
730 | devpriv->cmd4 |= CMD4_ECLKRCV; | |
731 | /* XXX should discard first scan when using interval scanning | |
732 | * since manual says it is not synced with scan clock */ | |
733 | if (!labpc_use_continuous_mode(cmd, mode)) { | |
734 | devpriv->cmd4 |= CMD4_INTSCAN; | |
735 | if (cmd->scan_begin_src == TRIG_EXT) | |
736 | devpriv->cmd4 |= CMD4_EOIRCV; | |
737 | } | |
738 | /* single-ended/differential */ | |
739 | if (aref == AREF_DIFF) | |
740 | devpriv->cmd4 |= CMD4_SEDIFF; | |
741 | devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG); | |
742 | ||
743 | /* startup acquisition */ | |
744 | ||
745 | spin_lock_irqsave(&dev->spinlock, flags); | |
746 | ||
747 | /* use 2 cascaded counters for pacing */ | |
748 | devpriv->cmd2 |= CMD2_TBSEL; | |
749 | ||
750 | devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG); | |
751 | if (cmd->start_src == TRIG_EXT) | |
752 | devpriv->cmd2 |= CMD2_HWTRIG; | |
753 | else | |
754 | devpriv->cmd2 |= CMD2_SWTRIG; | |
755 | if (cmd->stop_src == TRIG_EXT) | |
756 | devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG); | |
757 | ||
758 | devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG); | |
759 | ||
760 | spin_unlock_irqrestore(&dev->spinlock, flags); | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
765 | /* read all available samples from ai fifo */ | |
766 | static int labpc_drain_fifo(struct comedi_device *dev) | |
767 | { | |
768 | struct labpc_private *devpriv = dev->private; | |
769 | struct comedi_async *async = dev->read_subdev->async; | |
770 | struct comedi_cmd *cmd = &async->cmd; | |
771 | unsigned short data; | |
772 | const int timeout = 10000; | |
773 | unsigned int i; | |
774 | ||
775 | devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG); | |
776 | ||
777 | for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout; | |
778 | i++) { | |
779 | /* quit if we have all the data we want */ | |
780 | if (cmd->stop_src == TRIG_COUNT) { | |
781 | if (devpriv->count == 0) | |
782 | break; | |
783 | devpriv->count--; | |
784 | } | |
785 | data = labpc_read_adc_fifo(dev); | |
8d185f52 | 786 | comedi_buf_write_samples(dev->read_subdev, &data, 1); |
1b419769 IA |
787 | devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG); |
788 | } | |
789 | if (i == timeout) { | |
790 | dev_err(dev->class_dev, "ai timeout, fifo never empties\n"); | |
3e6cb74f | 791 | async->events |= COMEDI_CB_ERROR; |
1b419769 IA |
792 | return -1; |
793 | } | |
794 | ||
795 | return 0; | |
796 | } | |
797 | ||
798 | /* makes sure all data acquired by board is transferred to comedi (used | |
799 | * when acquisition is terminated by stop_src == TRIG_EXT). */ | |
800 | static void labpc_drain_dregs(struct comedi_device *dev) | |
801 | { | |
802 | struct labpc_private *devpriv = dev->private; | |
803 | ||
804 | if (devpriv->current_transfer == isa_dma_transfer) | |
805 | labpc_drain_dma(dev); | |
806 | ||
807 | labpc_drain_fifo(dev); | |
808 | } | |
809 | ||
810 | /* interrupt service routine */ | |
811 | static irqreturn_t labpc_interrupt(int irq, void *d) | |
812 | { | |
813 | struct comedi_device *dev = d; | |
8cf27116 | 814 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
815 | struct labpc_private *devpriv = dev->private; |
816 | struct comedi_subdevice *s = dev->read_subdev; | |
817 | struct comedi_async *async; | |
818 | struct comedi_cmd *cmd; | |
819 | ||
820 | if (!dev->attached) { | |
821 | dev_err(dev->class_dev, "premature interrupt\n"); | |
822 | return IRQ_HANDLED; | |
823 | } | |
824 | ||
825 | async = s->async; | |
826 | cmd = &async->cmd; | |
827 | ||
828 | /* read board status */ | |
829 | devpriv->stat1 = devpriv->read_byte(dev, STAT1_REG); | |
830 | if (board->is_labpc1200) | |
831 | devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG); | |
832 | ||
833 | if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW | | |
834 | STAT1_OVERRUN | STAT1_DAVAIL)) == 0 && | |
835 | (devpriv->stat2 & STAT2_OUTA1) == 0 && | |
836 | (devpriv->stat2 & STAT2_FIFONHF)) { | |
837 | return IRQ_NONE; | |
838 | } | |
839 | ||
840 | if (devpriv->stat1 & STAT1_OVERRUN) { | |
841 | /* clear error interrupt */ | |
842 | devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG); | |
3e6cb74f | 843 | async->events |= COMEDI_CB_ERROR; |
1c27ce60 | 844 | comedi_handle_events(dev, s); |
1b419769 IA |
845 | dev_err(dev->class_dev, "overrun\n"); |
846 | return IRQ_HANDLED; | |
847 | } | |
848 | ||
849 | if (devpriv->current_transfer == isa_dma_transfer) | |
850 | labpc_handle_dma_status(dev); | |
851 | else | |
852 | labpc_drain_fifo(dev); | |
853 | ||
854 | if (devpriv->stat1 & STAT1_CNTINT) { | |
855 | dev_err(dev->class_dev, "handled timer interrupt?\n"); | |
856 | /* clear it */ | |
857 | devpriv->write_byte(dev, 0x1, TIMER_CLEAR_REG); | |
858 | } | |
859 | ||
860 | if (devpriv->stat1 & STAT1_OVERFLOW) { | |
861 | /* clear error interrupt */ | |
862 | devpriv->write_byte(dev, 0x1, ADC_FIFO_CLEAR_REG); | |
3e6cb74f | 863 | async->events |= COMEDI_CB_ERROR; |
1c27ce60 | 864 | comedi_handle_events(dev, s); |
1b419769 IA |
865 | dev_err(dev->class_dev, "overflow\n"); |
866 | return IRQ_HANDLED; | |
867 | } | |
868 | /* handle external stop trigger */ | |
869 | if (cmd->stop_src == TRIG_EXT) { | |
870 | if (devpriv->stat2 & STAT2_OUTA1) { | |
871 | labpc_drain_dregs(dev); | |
872 | async->events |= COMEDI_CB_EOA; | |
873 | } | |
874 | } | |
875 | ||
876 | /* TRIG_COUNT end of acquisition */ | |
877 | if (cmd->stop_src == TRIG_COUNT) { | |
878 | if (devpriv->count == 0) | |
879 | async->events |= COMEDI_CB_EOA; | |
880 | } | |
881 | ||
1c27ce60 | 882 | comedi_handle_events(dev, s); |
1b419769 IA |
883 | return IRQ_HANDLED; |
884 | } | |
885 | ||
8e06519b HS |
886 | static void labpc_ao_write(struct comedi_device *dev, |
887 | struct comedi_subdevice *s, | |
888 | unsigned int chan, unsigned int val) | |
889 | { | |
890 | struct labpc_private *devpriv = dev->private; | |
891 | ||
892 | devpriv->write_byte(dev, val & 0xff, DAC_LSB_REG(chan)); | |
893 | devpriv->write_byte(dev, (val >> 8) & 0xff, DAC_MSB_REG(chan)); | |
894 | ||
c82f0e6b | 895 | s->readback[chan] = val; |
8e06519b HS |
896 | } |
897 | ||
1b419769 IA |
898 | static int labpc_ao_insn_write(struct comedi_device *dev, |
899 | struct comedi_subdevice *s, | |
900 | struct comedi_insn *insn, | |
901 | unsigned int *data) | |
902 | { | |
8cf27116 | 903 | const struct labpc_boardinfo *board = dev->board_ptr; |
1b419769 IA |
904 | struct labpc_private *devpriv = dev->private; |
905 | int channel, range; | |
906 | unsigned long flags; | |
1b419769 IA |
907 | |
908 | channel = CR_CHAN(insn->chanspec); | |
909 | ||
910 | /* turn off pacing of analog output channel */ | |
911 | /* note: hardware bug in daqcard-1200 means pacing cannot | |
912 | * be independently enabled/disabled for its the two channels */ | |
913 | spin_lock_irqsave(&dev->spinlock, flags); | |
914 | devpriv->cmd2 &= ~CMD2_LDAC(channel); | |
915 | devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG); | |
916 | spin_unlock_irqrestore(&dev->spinlock, flags); | |
917 | ||
918 | /* set range */ | |
919 | if (board->is_labpc1200) { | |
920 | range = CR_RANGE(insn->chanspec); | |
921 | if (comedi_range_is_unipolar(s, range)) | |
922 | devpriv->cmd6 |= CMD6_DACUNI(channel); | |
923 | else | |
924 | devpriv->cmd6 &= ~CMD6_DACUNI(channel); | |
925 | /* write to register */ | |
926 | devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG); | |
927 | } | |
928 | /* send data */ | |
8e06519b | 929 | labpc_ao_write(dev, s, channel, data[0]); |
1b419769 IA |
930 | |
931 | return 1; | |
932 | } | |
933 | ||
1b419769 IA |
934 | /* lowlevel write to eeprom/dac */ |
935 | static void labpc_serial_out(struct comedi_device *dev, unsigned int value, | |
936 | unsigned int value_width) | |
937 | { | |
938 | struct labpc_private *devpriv = dev->private; | |
939 | int i; | |
940 | ||
941 | for (i = 1; i <= value_width; i++) { | |
942 | /* clear serial clock */ | |
943 | devpriv->cmd5 &= ~CMD5_SCLK; | |
944 | /* send bits most significant bit first */ | |
945 | if (value & (1 << (value_width - i))) | |
946 | devpriv->cmd5 |= CMD5_SDATA; | |
947 | else | |
948 | devpriv->cmd5 &= ~CMD5_SDATA; | |
949 | udelay(1); | |
950 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
951 | /* set clock to load bit */ | |
952 | devpriv->cmd5 |= CMD5_SCLK; | |
953 | udelay(1); | |
954 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
955 | } | |
956 | } | |
957 | ||
958 | /* lowlevel read from eeprom */ | |
959 | static unsigned int labpc_serial_in(struct comedi_device *dev) | |
960 | { | |
961 | struct labpc_private *devpriv = dev->private; | |
962 | unsigned int value = 0; | |
963 | int i; | |
964 | const int value_width = 8; /* number of bits wide values are */ | |
965 | ||
966 | for (i = 1; i <= value_width; i++) { | |
967 | /* set serial clock */ | |
968 | devpriv->cmd5 |= CMD5_SCLK; | |
969 | udelay(1); | |
970 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
971 | /* clear clock bit */ | |
972 | devpriv->cmd5 &= ~CMD5_SCLK; | |
973 | udelay(1); | |
974 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
975 | /* read bits most significant bit first */ | |
976 | udelay(1); | |
977 | devpriv->stat2 = devpriv->read_byte(dev, STAT2_REG); | |
978 | if (devpriv->stat2 & STAT2_PROMOUT) | |
979 | value |= 1 << (value_width - i); | |
980 | } | |
981 | ||
982 | return value; | |
983 | } | |
984 | ||
985 | static unsigned int labpc_eeprom_read(struct comedi_device *dev, | |
986 | unsigned int address) | |
987 | { | |
988 | struct labpc_private *devpriv = dev->private; | |
989 | unsigned int value; | |
990 | /* bits to tell eeprom to expect a read */ | |
991 | const int read_instruction = 0x3; | |
992 | /* 8 bit write lengths to eeprom */ | |
993 | const int write_length = 8; | |
994 | ||
995 | /* enable read/write to eeprom */ | |
996 | devpriv->cmd5 &= ~CMD5_EEPROMCS; | |
997 | udelay(1); | |
998 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
999 | devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT); | |
1000 | udelay(1); | |
1001 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1002 | ||
1003 | /* send read instruction */ | |
1004 | labpc_serial_out(dev, read_instruction, write_length); | |
1005 | /* send 8 bit address to read from */ | |
1006 | labpc_serial_out(dev, address, write_length); | |
1007 | /* read result */ | |
1008 | value = labpc_serial_in(dev); | |
1009 | ||
1010 | /* disable read/write to eeprom */ | |
1011 | devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT); | |
1012 | udelay(1); | |
1013 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1014 | ||
1015 | return value; | |
1016 | } | |
1017 | ||
1018 | static unsigned int labpc_eeprom_read_status(struct comedi_device *dev) | |
1019 | { | |
1020 | struct labpc_private *devpriv = dev->private; | |
1021 | unsigned int value; | |
1022 | const int read_status_instruction = 0x5; | |
1023 | const int write_length = 8; /* 8 bit write lengths to eeprom */ | |
1024 | ||
1025 | /* enable read/write to eeprom */ | |
1026 | devpriv->cmd5 &= ~CMD5_EEPROMCS; | |
1027 | udelay(1); | |
1028 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1029 | devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT); | |
1030 | udelay(1); | |
1031 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1032 | ||
1033 | /* send read status instruction */ | |
1034 | labpc_serial_out(dev, read_status_instruction, write_length); | |
1035 | /* read result */ | |
1036 | value = labpc_serial_in(dev); | |
1037 | ||
1038 | /* disable read/write to eeprom */ | |
1039 | devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT); | |
1040 | udelay(1); | |
1041 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1042 | ||
1043 | return value; | |
1044 | } | |
1045 | ||
5f86288f HS |
1046 | static void labpc_eeprom_write(struct comedi_device *dev, |
1047 | unsigned int address, unsigned int value) | |
1b419769 IA |
1048 | { |
1049 | struct labpc_private *devpriv = dev->private; | |
1050 | const int write_enable_instruction = 0x6; | |
1051 | const int write_instruction = 0x2; | |
1052 | const int write_length = 8; /* 8 bit write lengths to eeprom */ | |
1b419769 IA |
1053 | |
1054 | /* enable read/write to eeprom */ | |
1055 | devpriv->cmd5 &= ~CMD5_EEPROMCS; | |
1056 | udelay(1); | |
1057 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1058 | devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT); | |
1059 | udelay(1); | |
1060 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1061 | ||
1062 | /* send write_enable instruction */ | |
1063 | labpc_serial_out(dev, write_enable_instruction, write_length); | |
1064 | devpriv->cmd5 &= ~CMD5_EEPROMCS; | |
1065 | udelay(1); | |
1066 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1067 | ||
1068 | /* send write instruction */ | |
1069 | devpriv->cmd5 |= CMD5_EEPROMCS; | |
1070 | udelay(1); | |
1071 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1072 | labpc_serial_out(dev, write_instruction, write_length); | |
1073 | /* send 8 bit address to write to */ | |
1074 | labpc_serial_out(dev, address, write_length); | |
1075 | /* write value */ | |
1076 | labpc_serial_out(dev, value, write_length); | |
1077 | devpriv->cmd5 &= ~CMD5_EEPROMCS; | |
1078 | udelay(1); | |
1079 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1080 | ||
1081 | /* disable read/write to eeprom */ | |
1082 | devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT); | |
1083 | udelay(1); | |
1084 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1b419769 IA |
1085 | } |
1086 | ||
1087 | /* writes to 8 bit calibration dacs */ | |
1088 | static void write_caldac(struct comedi_device *dev, unsigned int channel, | |
1089 | unsigned int value) | |
1090 | { | |
1091 | struct labpc_private *devpriv = dev->private; | |
1092 | ||
1b419769 IA |
1093 | /* clear caldac load bit and make sure we don't write to eeprom */ |
1094 | devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT); | |
1095 | udelay(1); | |
1096 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1097 | ||
1098 | /* write 4 bit channel */ | |
1099 | labpc_serial_out(dev, channel, 4); | |
1100 | /* write 8 bit caldac value */ | |
1101 | labpc_serial_out(dev, value, 8); | |
1102 | ||
1103 | /* set and clear caldac bit to load caldac value */ | |
1104 | devpriv->cmd5 |= CMD5_CALDACLD; | |
1105 | udelay(1); | |
1106 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1107 | devpriv->cmd5 &= ~CMD5_CALDACLD; | |
1108 | udelay(1); | |
1109 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1110 | } | |
1111 | ||
1112 | static int labpc_calib_insn_write(struct comedi_device *dev, | |
1113 | struct comedi_subdevice *s, | |
1114 | struct comedi_insn *insn, | |
1115 | unsigned int *data) | |
1116 | { | |
1117 | unsigned int chan = CR_CHAN(insn->chanspec); | |
1118 | ||
1119 | /* | |
1120 | * Only write the last data value to the caldac. Preceding | |
1121 | * data would be overwritten anyway. | |
1122 | */ | |
332f46e4 HS |
1123 | if (insn->n > 0) { |
1124 | unsigned int val = data[insn->n - 1]; | |
1125 | ||
1e3d3a4d | 1126 | if (s->readback[chan] != val) { |
332f46e4 | 1127 | write_caldac(dev, chan, val); |
1e3d3a4d | 1128 | s->readback[chan] = val; |
332f46e4 HS |
1129 | } |
1130 | } | |
1b419769 IA |
1131 | |
1132 | return insn->n; | |
1133 | } | |
1134 | ||
5f86288f HS |
1135 | static int labpc_eeprom_ready(struct comedi_device *dev, |
1136 | struct comedi_subdevice *s, | |
1137 | struct comedi_insn *insn, | |
1138 | unsigned long context) | |
1139 | { | |
1140 | unsigned int status; | |
1141 | ||
1142 | /* make sure there isn't already a write in progress */ | |
1143 | status = labpc_eeprom_read_status(dev); | |
1144 | if ((status & 0x1) == 0) | |
1145 | return 0; | |
1146 | return -EBUSY; | |
1147 | } | |
1148 | ||
1b419769 IA |
1149 | static int labpc_eeprom_insn_write(struct comedi_device *dev, |
1150 | struct comedi_subdevice *s, | |
1151 | struct comedi_insn *insn, | |
1152 | unsigned int *data) | |
1153 | { | |
1154 | unsigned int chan = CR_CHAN(insn->chanspec); | |
1155 | int ret; | |
1156 | ||
1157 | /* only allow writes to user area of eeprom */ | |
1158 | if (chan < 16 || chan > 127) | |
1159 | return -EINVAL; | |
1160 | ||
1161 | /* | |
1162 | * Only write the last data value to the eeprom. Preceding | |
1163 | * data would be overwritten anyway. | |
1164 | */ | |
1165 | if (insn->n > 0) { | |
45c311c4 HS |
1166 | unsigned int val = data[insn->n - 1]; |
1167 | ||
5f86288f | 1168 | ret = comedi_timeout(dev, s, insn, labpc_eeprom_ready, 0); |
1b419769 IA |
1169 | if (ret) |
1170 | return ret; | |
1b419769 | 1171 | |
5f86288f | 1172 | labpc_eeprom_write(dev, chan, val); |
45c311c4 HS |
1173 | s->readback[chan] = val; |
1174 | } | |
1b419769 IA |
1175 | |
1176 | return insn->n; | |
1177 | } | |
1178 | ||
1179 | int labpc_common_attach(struct comedi_device *dev, | |
1180 | unsigned int irq, unsigned long isr_flags) | |
1181 | { | |
8cf27116 | 1182 | const struct labpc_boardinfo *board = dev->board_ptr; |
83d682bd | 1183 | struct labpc_private *devpriv; |
1b419769 IA |
1184 | struct comedi_subdevice *s; |
1185 | int ret; | |
1186 | int i; | |
1187 | ||
83d682bd HS |
1188 | devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv)); |
1189 | if (!devpriv) | |
1190 | return -ENOMEM; | |
1191 | ||
1b419769 IA |
1192 | if (dev->mmio) { |
1193 | devpriv->read_byte = labpc_readb; | |
1194 | devpriv->write_byte = labpc_writeb; | |
1195 | } else { | |
1196 | devpriv->read_byte = labpc_inb; | |
1197 | devpriv->write_byte = labpc_outb; | |
1198 | } | |
1199 | ||
1200 | /* initialize board's command registers */ | |
1201 | devpriv->write_byte(dev, devpriv->cmd1, CMD1_REG); | |
1202 | devpriv->write_byte(dev, devpriv->cmd2, CMD2_REG); | |
1203 | devpriv->write_byte(dev, devpriv->cmd3, CMD3_REG); | |
1204 | devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG); | |
1205 | if (board->is_labpc1200) { | |
1206 | devpriv->write_byte(dev, devpriv->cmd5, CMD5_REG); | |
1207 | devpriv->write_byte(dev, devpriv->cmd6, CMD6_REG); | |
1208 | } | |
1209 | ||
1210 | if (irq) { | |
1211 | ret = request_irq(irq, labpc_interrupt, isr_flags, | |
1212 | dev->board_name, dev); | |
1213 | if (ret == 0) | |
1214 | dev->irq = irq; | |
1215 | } | |
1216 | ||
c0cfeca1 HS |
1217 | if (dev->mmio) { |
1218 | dev->pacer = comedi_8254_mm_init(dev->mmio + COUNTER_B_BASE_REG, | |
1219 | I8254_OSC_BASE_2MHZ, | |
1220 | I8254_IO8, 0); | |
1221 | devpriv->counter = comedi_8254_mm_init(dev->mmio + | |
1222 | COUNTER_A_BASE_REG, | |
1223 | I8254_OSC_BASE_2MHZ, | |
1224 | I8254_IO8, 0); | |
1225 | } else { | |
1226 | dev->pacer = comedi_8254_init(dev->iobase + COUNTER_B_BASE_REG, | |
1227 | I8254_OSC_BASE_2MHZ, | |
1228 | I8254_IO8, 0); | |
1229 | devpriv->counter = comedi_8254_init(dev->iobase + | |
1230 | COUNTER_A_BASE_REG, | |
1231 | I8254_OSC_BASE_2MHZ, | |
1232 | I8254_IO8, 0); | |
1233 | } | |
1234 | if (!dev->pacer || !devpriv->counter) | |
1235 | return -ENOMEM; | |
1236 | ||
1b419769 IA |
1237 | ret = comedi_alloc_subdevices(dev, 5); |
1238 | if (ret) | |
1239 | return ret; | |
1240 | ||
1241 | /* analog input subdevice */ | |
1242 | s = &dev->subdevices[0]; | |
1243 | s->type = COMEDI_SUBD_AI; | |
1244 | s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF; | |
1245 | s->n_chan = 8; | |
1246 | s->len_chanlist = 8; | |
1247 | s->maxdata = 0x0fff; | |
1248 | s->range_table = board->is_labpc1200 ? | |
1249 | &range_labpc_1200_ai : &range_labpc_plus_ai; | |
1250 | s->insn_read = labpc_ai_insn_read; | |
1251 | if (dev->irq) { | |
1252 | dev->read_subdev = s; | |
1253 | s->subdev_flags |= SDF_CMD_READ; | |
1254 | s->do_cmd = labpc_ai_cmd; | |
1255 | s->do_cmdtest = labpc_ai_cmdtest; | |
1256 | s->cancel = labpc_cancel; | |
1257 | } | |
1258 | ||
1259 | /* analog output */ | |
1260 | s = &dev->subdevices[1]; | |
1261 | if (board->has_ao) { | |
1262 | s->type = COMEDI_SUBD_AO; | |
1263 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND; | |
1264 | s->n_chan = NUM_AO_CHAN; | |
1265 | s->maxdata = 0x0fff; | |
1266 | s->range_table = &range_labpc_ao; | |
1b419769 IA |
1267 | s->insn_write = labpc_ao_insn_write; |
1268 | ||
c82f0e6b HS |
1269 | ret = comedi_alloc_subdev_readback(s); |
1270 | if (ret) | |
1271 | return ret; | |
1272 | ||
1b419769 | 1273 | /* initialize analog outputs to a known value */ |
8e06519b HS |
1274 | for (i = 0; i < s->n_chan; i++) |
1275 | labpc_ao_write(dev, s, i, s->maxdata / 2); | |
1b419769 IA |
1276 | } else { |
1277 | s->type = COMEDI_SUBD_UNUSED; | |
1278 | } | |
1279 | ||
1280 | /* 8255 dio */ | |
1281 | s = &dev->subdevices[2]; | |
1282 | if (dev->mmio) | |
1283 | ret = subdev_8255_mm_init(dev, s, NULL, DIO_BASE_REG); | |
1284 | else | |
1285 | ret = subdev_8255_init(dev, s, NULL, DIO_BASE_REG); | |
1286 | if (ret) | |
1287 | return ret; | |
1288 | ||
1289 | /* calibration subdevices for boards that have one */ | |
1290 | s = &dev->subdevices[3]; | |
1291 | if (board->is_labpc1200) { | |
1292 | s->type = COMEDI_SUBD_CALIB; | |
1293 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL; | |
1294 | s->n_chan = 16; | |
1295 | s->maxdata = 0xff; | |
1b419769 IA |
1296 | s->insn_write = labpc_calib_insn_write; |
1297 | ||
1e3d3a4d HS |
1298 | ret = comedi_alloc_subdev_readback(s); |
1299 | if (ret) | |
1300 | return ret; | |
1301 | ||
332f46e4 | 1302 | for (i = 0; i < s->n_chan; i++) { |
1b419769 | 1303 | write_caldac(dev, i, s->maxdata / 2); |
1e3d3a4d | 1304 | s->readback[i] = s->maxdata / 2; |
332f46e4 | 1305 | } |
1b419769 IA |
1306 | } else { |
1307 | s->type = COMEDI_SUBD_UNUSED; | |
1308 | } | |
1309 | ||
1310 | /* EEPROM */ | |
1311 | s = &dev->subdevices[4]; | |
1312 | if (board->is_labpc1200) { | |
1313 | s->type = COMEDI_SUBD_MEMORY; | |
1314 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL; | |
1315 | s->n_chan = EEPROM_SIZE; | |
1316 | s->maxdata = 0xff; | |
1b419769 IA |
1317 | s->insn_write = labpc_eeprom_insn_write; |
1318 | ||
45c311c4 HS |
1319 | ret = comedi_alloc_subdev_readback(s); |
1320 | if (ret) | |
1321 | return ret; | |
1322 | ||
1b419769 | 1323 | for (i = 0; i < s->n_chan; i++) |
45c311c4 | 1324 | s->readback[i] = labpc_eeprom_read(dev, i); |
1b419769 IA |
1325 | } else { |
1326 | s->type = COMEDI_SUBD_UNUSED; | |
1327 | } | |
1328 | ||
1329 | return 0; | |
1330 | } | |
1331 | EXPORT_SYMBOL_GPL(labpc_common_attach); | |
1332 | ||
c0cfeca1 HS |
1333 | void labpc_common_detach(struct comedi_device *dev) |
1334 | { | |
1335 | struct labpc_private *devpriv = dev->private; | |
1336 | ||
1337 | if (devpriv) | |
1338 | kfree(devpriv->counter); | |
1339 | } | |
1340 | EXPORT_SYMBOL_GPL(labpc_common_detach); | |
1341 | ||
1b419769 IA |
1342 | static int __init labpc_common_init(void) |
1343 | { | |
1344 | return 0; | |
1345 | } | |
1346 | module_init(labpc_common_init); | |
1347 | ||
1348 | static void __exit labpc_common_exit(void) | |
1349 | { | |
1350 | } | |
1351 | module_exit(labpc_common_exit); | |
1352 | ||
1353 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | |
1354 | MODULE_DESCRIPTION("Comedi helper for ni_labpc, ni_labpc_pci, ni_labpc_cs"); | |
1355 | MODULE_LICENSE("GPL"); |