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ef2ccffb DS |
1 | /* |
2 | comedi/drivers/ni_6527.c | |
3 | driver for National Instruments PCI-6527 | |
4 | ||
5 | COMEDI - Linux Control and Measurement Device Interface | |
6 | Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org> | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | ||
22 | */ | |
23 | /* | |
24 | Driver: ni_6527 | |
25 | Description: National Instruments 6527 | |
26 | Author: ds | |
27 | Status: works | |
28 | Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527 | |
29 | Updated: Sat, 25 Jan 2003 13:24:40 -0800 | |
30 | ||
31 | ||
32 | */ | |
33 | ||
34 | /* | |
35 | Manuals (available from ftp://ftp.natinst.com/support/manuals) | |
36 | ||
37 | 370106b.pdf 6527 Register Level Programmer Manual | |
38 | ||
39 | */ | |
40 | ||
41 | #define DEBUG 1 | |
42 | #define DEBUG_FLAGS | |
43 | ||
44 | #include "../comedidev.h" | |
45 | ||
46 | #include "mite.h" | |
47 | ||
48 | #define NI6527_DIO_SIZE 4096 | |
49 | #define NI6527_MITE_SIZE 4096 | |
50 | ||
51 | #define Port_Register(x) (0x00+(x)) | |
52 | #define ID_Register 0x06 | |
53 | ||
54 | #define Clear_Register 0x07 | |
55 | #define ClrEdge 0x08 | |
56 | #define ClrOverflow 0x04 | |
57 | #define ClrFilter 0x02 | |
58 | #define ClrInterval 0x01 | |
59 | ||
60 | #define Filter_Interval(x) (0x08+(x)) | |
61 | #define Filter_Enable(x) (0x0c+(x)) | |
62 | ||
63 | #define Change_Status 0x14 | |
64 | #define MasterInterruptStatus 0x04 | |
65 | #define Overflow 0x02 | |
66 | #define EdgeStatus 0x01 | |
67 | ||
68 | #define Master_Interrupt_Control 0x15 | |
69 | #define FallingEdgeIntEnable 0x10 | |
70 | #define RisingEdgeIntEnable 0x08 | |
71 | #define MasterInterruptEnable 0x04 | |
72 | #define OverflowIntEnable 0x02 | |
73 | #define EdgeIntEnable 0x01 | |
74 | ||
75 | #define Rising_Edge_Detection_Enable(x) (0x018+(x)) | |
76 | #define Falling_Edge_Detection_Enable(x) (0x020+(x)) | |
77 | ||
78 | static int ni6527_attach(comedi_device * dev, comedi_devconfig * it); | |
79 | static int ni6527_detach(comedi_device * dev); | |
80 | static comedi_driver driver_ni6527 = { | |
81 | driver_name:"ni6527", | |
82 | module:THIS_MODULE, | |
83 | attach:ni6527_attach, | |
84 | detach:ni6527_detach, | |
85 | }; | |
86 | ||
87 | typedef struct { | |
88 | int dev_id; | |
89 | const char *name; | |
90 | } ni6527_board; | |
91 | static const ni6527_board ni6527_boards[] = { | |
92 | { | |
93 | dev_id: 0x2b20, | |
94 | name: "pci-6527", | |
95 | }, | |
96 | { | |
97 | dev_id: 0x2b10, | |
98 | name: "pxi-6527", | |
99 | }, | |
100 | }; | |
101 | ||
102 | #define n_ni6527_boards (sizeof(ni6527_boards)/sizeof(ni6527_boards[0])) | |
103 | #define this_board ((const ni6527_board *)dev->board_ptr) | |
104 | ||
105 | static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = { | |
106 | {PCI_VENDOR_ID_NATINST, 0x2b10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
107 | {PCI_VENDOR_ID_NATINST, 0x2b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
108 | {0} | |
109 | }; | |
110 | ||
111 | MODULE_DEVICE_TABLE(pci, ni6527_pci_table); | |
112 | ||
113 | typedef struct { | |
114 | struct mite_struct *mite; | |
115 | unsigned int filter_interval; | |
116 | unsigned int filter_enable; | |
117 | } ni6527_private; | |
118 | #define devpriv ((ni6527_private *)dev->private) | |
119 | ||
120 | static int ni6527_find_device(comedi_device * dev, int bus, int slot); | |
121 | ||
122 | static int ni6527_di_insn_config(comedi_device * dev, comedi_subdevice * s, | |
790c5541 | 123 | comedi_insn * insn, unsigned int * data) |
ef2ccffb DS |
124 | { |
125 | int chan = CR_CHAN(insn->chanspec); | |
126 | unsigned int interval; | |
127 | ||
128 | if (insn->n != 2) | |
129 | return -EINVAL; | |
130 | ||
131 | if (data[0] != INSN_CONFIG_FILTER) | |
132 | return -EINVAL; | |
133 | ||
134 | if (data[1]) { | |
135 | interval = (data[1] + 100) / 200; | |
136 | data[1] = interval * 200; | |
137 | ||
138 | if (interval != devpriv->filter_interval) { | |
139 | writeb(interval & 0xff, | |
140 | devpriv->mite->daq_io_addr + | |
141 | Filter_Interval(0)); | |
142 | writeb((interval >> 8) & 0xff, | |
143 | devpriv->mite->daq_io_addr + | |
144 | Filter_Interval(1)); | |
145 | writeb((interval >> 16) & 0x0f, | |
146 | devpriv->mite->daq_io_addr + | |
147 | Filter_Interval(2)); | |
148 | ||
149 | writeb(ClrInterval, | |
150 | devpriv->mite->daq_io_addr + Clear_Register); | |
151 | ||
152 | devpriv->filter_interval = interval; | |
153 | } | |
154 | ||
155 | devpriv->filter_enable |= 1 << chan; | |
156 | } else { | |
157 | devpriv->filter_enable &= ~(1 << chan); | |
158 | } | |
159 | ||
160 | writeb(devpriv->filter_enable, | |
161 | devpriv->mite->daq_io_addr + Filter_Enable(0)); | |
162 | writeb(devpriv->filter_enable >> 8, | |
163 | devpriv->mite->daq_io_addr + Filter_Enable(1)); | |
164 | writeb(devpriv->filter_enable >> 16, | |
165 | devpriv->mite->daq_io_addr + Filter_Enable(2)); | |
166 | ||
167 | return 2; | |
168 | } | |
169 | ||
170 | static int ni6527_di_insn_bits(comedi_device * dev, comedi_subdevice * s, | |
790c5541 | 171 | comedi_insn * insn, unsigned int * data) |
ef2ccffb DS |
172 | { |
173 | if (insn->n != 2) | |
174 | return -EINVAL; | |
175 | ||
176 | data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0)); | |
177 | data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8; | |
178 | data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16; | |
179 | ||
180 | return 2; | |
181 | } | |
182 | ||
183 | static int ni6527_do_insn_bits(comedi_device * dev, comedi_subdevice * s, | |
790c5541 | 184 | comedi_insn * insn, unsigned int * data) |
ef2ccffb DS |
185 | { |
186 | if (insn->n != 2) | |
187 | return -EINVAL; | |
188 | if (data[0]) { | |
189 | s->state &= ~data[0]; | |
190 | s->state |= (data[0] & data[1]); | |
191 | ||
192 | /* The open relay state on the board cooresponds to 1, | |
193 | * but in Comedi, it is represented by 0. */ | |
194 | if (data[0] & 0x0000ff) { | |
195 | writeb((s->state ^ 0xff), | |
196 | devpriv->mite->daq_io_addr + Port_Register(3)); | |
197 | } | |
198 | if (data[0] & 0x00ff00) { | |
199 | writeb((s->state >> 8) ^ 0xff, | |
200 | devpriv->mite->daq_io_addr + Port_Register(4)); | |
201 | } | |
202 | if (data[0] & 0xff0000) { | |
203 | writeb((s->state >> 16) ^ 0xff, | |
204 | devpriv->mite->daq_io_addr + Port_Register(5)); | |
205 | } | |
206 | } | |
207 | data[1] = s->state; | |
208 | ||
209 | return 2; | |
210 | } | |
211 | ||
212 | static irqreturn_t ni6527_interrupt(int irq, void *d PT_REGS_ARG) | |
213 | { | |
214 | comedi_device *dev = d; | |
215 | comedi_subdevice *s = dev->subdevices + 2; | |
216 | unsigned int status; | |
217 | ||
218 | status = readb(devpriv->mite->daq_io_addr + Change_Status); | |
219 | if ((status & MasterInterruptStatus) == 0) | |
220 | return IRQ_NONE; | |
221 | if ((status & EdgeStatus) == 0) | |
222 | return IRQ_NONE; | |
223 | ||
224 | writeb(ClrEdge | ClrOverflow, | |
225 | devpriv->mite->daq_io_addr + Clear_Register); | |
226 | ||
227 | comedi_buf_put(s->async, 0); | |
228 | s->async->events |= COMEDI_CB_EOS; | |
229 | comedi_event(dev, s); | |
230 | return IRQ_HANDLED; | |
231 | } | |
232 | ||
233 | static int ni6527_intr_cmdtest(comedi_device * dev, comedi_subdevice * s, | |
234 | comedi_cmd * cmd) | |
235 | { | |
236 | int err = 0; | |
237 | int tmp; | |
238 | ||
239 | /* step 1: make sure trigger sources are trivially valid */ | |
240 | ||
241 | tmp = cmd->start_src; | |
242 | cmd->start_src &= TRIG_NOW; | |
243 | if (!cmd->start_src || tmp != cmd->start_src) | |
244 | err++; | |
245 | ||
246 | tmp = cmd->scan_begin_src; | |
247 | cmd->scan_begin_src &= TRIG_OTHER; | |
248 | if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src) | |
249 | err++; | |
250 | ||
251 | tmp = cmd->convert_src; | |
252 | cmd->convert_src &= TRIG_FOLLOW; | |
253 | if (!cmd->convert_src || tmp != cmd->convert_src) | |
254 | err++; | |
255 | ||
256 | tmp = cmd->scan_end_src; | |
257 | cmd->scan_end_src &= TRIG_COUNT; | |
258 | if (!cmd->scan_end_src || tmp != cmd->scan_end_src) | |
259 | err++; | |
260 | ||
261 | tmp = cmd->stop_src; | |
262 | cmd->stop_src &= TRIG_COUNT; | |
263 | if (!cmd->stop_src || tmp != cmd->stop_src) | |
264 | err++; | |
265 | ||
266 | if (err) | |
267 | return 1; | |
268 | ||
269 | /* step 2: make sure trigger sources are unique and mutually compatible */ | |
270 | ||
271 | if (err) | |
272 | return 2; | |
273 | ||
274 | /* step 3: make sure arguments are trivially compatible */ | |
275 | ||
276 | if (cmd->start_arg != 0) { | |
277 | cmd->start_arg = 0; | |
278 | err++; | |
279 | } | |
280 | if (cmd->scan_begin_arg != 0) { | |
281 | cmd->scan_begin_arg = 0; | |
282 | err++; | |
283 | } | |
284 | if (cmd->convert_arg != 0) { | |
285 | cmd->convert_arg = 0; | |
286 | err++; | |
287 | } | |
288 | ||
289 | if (cmd->scan_end_arg != 1) { | |
290 | cmd->scan_end_arg = 1; | |
291 | err++; | |
292 | } | |
293 | if (cmd->stop_arg != 0) { | |
294 | cmd->stop_arg = 0; | |
295 | err++; | |
296 | } | |
297 | ||
298 | if (err) | |
299 | return 3; | |
300 | ||
301 | /* step 4: fix up any arguments */ | |
302 | ||
303 | if (err) | |
304 | return 4; | |
305 | ||
306 | return 0; | |
307 | } | |
308 | ||
309 | static int ni6527_intr_cmd(comedi_device * dev, comedi_subdevice * s) | |
310 | { | |
311 | //comedi_cmd *cmd = &s->async->cmd; | |
312 | ||
313 | writeb(ClrEdge | ClrOverflow, | |
314 | devpriv->mite->daq_io_addr + Clear_Register); | |
315 | writeb(FallingEdgeIntEnable | RisingEdgeIntEnable | | |
316 | MasterInterruptEnable | EdgeIntEnable, | |
317 | devpriv->mite->daq_io_addr + Master_Interrupt_Control); | |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
322 | static int ni6527_intr_cancel(comedi_device * dev, comedi_subdevice * s) | |
323 | { | |
324 | writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
329 | static int ni6527_intr_insn_bits(comedi_device * dev, comedi_subdevice * s, | |
790c5541 | 330 | comedi_insn * insn, unsigned int * data) |
ef2ccffb DS |
331 | { |
332 | if (insn->n < 1) | |
333 | return -EINVAL; | |
334 | ||
335 | data[1] = 0; | |
336 | return 2; | |
337 | } | |
338 | ||
339 | static int ni6527_intr_insn_config(comedi_device * dev, comedi_subdevice * s, | |
790c5541 | 340 | comedi_insn * insn, unsigned int * data) |
ef2ccffb DS |
341 | { |
342 | if (insn->n < 1) | |
343 | return -EINVAL; | |
344 | if (data[0] != INSN_CONFIG_CHANGE_NOTIFY) | |
345 | return -EINVAL; | |
346 | ||
347 | writeb(data[1], | |
348 | devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0)); | |
349 | writeb(data[1] >> 8, | |
350 | devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1)); | |
351 | writeb(data[1] >> 16, | |
352 | devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2)); | |
353 | ||
354 | writeb(data[2], | |
355 | devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0)); | |
356 | writeb(data[2] >> 8, | |
357 | devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1)); | |
358 | writeb(data[2] >> 16, | |
359 | devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2)); | |
360 | ||
361 | return 2; | |
362 | } | |
363 | ||
364 | static int ni6527_attach(comedi_device * dev, comedi_devconfig * it) | |
365 | { | |
366 | comedi_subdevice *s; | |
367 | int ret; | |
368 | ||
369 | printk("comedi%d: ni6527:", dev->minor); | |
370 | ||
371 | if ((ret = alloc_private(dev, sizeof(ni6527_private))) < 0) | |
372 | return ret; | |
373 | ||
374 | ret = ni6527_find_device(dev, it->options[0], it->options[1]); | |
375 | if (ret < 0) | |
376 | return ret; | |
377 | ||
378 | ret = mite_setup(devpriv->mite); | |
379 | if (ret < 0) { | |
380 | printk("error setting up mite\n"); | |
381 | return ret; | |
382 | } | |
383 | ||
384 | dev->board_name = this_board->name; | |
385 | printk(" %s", dev->board_name); | |
386 | ||
387 | printk(" ID=0x%02x", readb(devpriv->mite->daq_io_addr + ID_Register)); | |
388 | ||
389 | if ((ret = alloc_subdevices(dev, 3)) < 0) | |
390 | return ret; | |
391 | ||
392 | s = dev->subdevices + 0; | |
393 | s->type = COMEDI_SUBD_DI; | |
394 | s->subdev_flags = SDF_READABLE; | |
395 | s->n_chan = 24; | |
396 | s->range_table = &range_digital; | |
397 | s->maxdata = 1; | |
398 | s->insn_config = ni6527_di_insn_config; | |
399 | s->insn_bits = ni6527_di_insn_bits; | |
400 | ||
401 | s = dev->subdevices + 1; | |
402 | s->type = COMEDI_SUBD_DO; | |
403 | s->subdev_flags = SDF_READABLE | SDF_WRITABLE; | |
404 | s->n_chan = 24; | |
405 | s->range_table = &range_unknown; /* FIXME: actually conductance */ | |
406 | s->maxdata = 1; | |
407 | s->insn_bits = ni6527_do_insn_bits; | |
408 | ||
409 | s = dev->subdevices + 2; | |
410 | dev->read_subdev = s; | |
411 | s->type = COMEDI_SUBD_DI; | |
412 | s->subdev_flags = SDF_READABLE | SDF_CMD_READ; | |
413 | s->n_chan = 1; | |
414 | s->range_table = &range_unknown; | |
415 | s->maxdata = 1; | |
416 | s->do_cmdtest = ni6527_intr_cmdtest; | |
417 | s->do_cmd = ni6527_intr_cmd; | |
418 | s->cancel = ni6527_intr_cancel; | |
419 | s->insn_bits = ni6527_intr_insn_bits; | |
420 | s->insn_config = ni6527_intr_insn_config; | |
421 | ||
422 | writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0)); | |
423 | writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1)); | |
424 | writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2)); | |
425 | ||
426 | writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval, | |
427 | devpriv->mite->daq_io_addr + Clear_Register); | |
428 | writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); | |
429 | ||
430 | ret = comedi_request_irq(mite_irq(devpriv->mite), ni6527_interrupt, | |
431 | IRQF_SHARED, "ni6527", dev); | |
432 | if (ret < 0) { | |
433 | printk(" irq not available"); | |
434 | } else | |
435 | dev->irq = mite_irq(devpriv->mite); | |
436 | ||
437 | printk("\n"); | |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
442 | static int ni6527_detach(comedi_device * dev) | |
443 | { | |
444 | if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr) { | |
445 | writeb(0x00, | |
446 | devpriv->mite->daq_io_addr + Master_Interrupt_Control); | |
447 | } | |
448 | ||
449 | if (dev->irq) { | |
450 | comedi_free_irq(dev->irq, dev); | |
451 | } | |
452 | ||
453 | if (devpriv && devpriv->mite) { | |
454 | mite_unsetup(devpriv->mite); | |
455 | } | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
460 | static int ni6527_find_device(comedi_device * dev, int bus, int slot) | |
461 | { | |
462 | struct mite_struct *mite; | |
463 | int i; | |
464 | ||
465 | for (mite = mite_devices; mite; mite = mite->next) { | |
466 | if (mite->used) | |
467 | continue; | |
468 | if (bus || slot) { | |
469 | if (bus != mite->pcidev->bus->number || | |
470 | slot != PCI_SLOT(mite->pcidev->devfn)) | |
471 | continue; | |
472 | } | |
473 | for (i = 0; i < n_ni6527_boards; i++) { | |
474 | if (mite_device_id(mite) == ni6527_boards[i].dev_id) { | |
475 | dev->board_ptr = ni6527_boards + i; | |
476 | devpriv->mite = mite; | |
477 | return 0; | |
478 | } | |
479 | } | |
480 | } | |
481 | printk("no device found\n"); | |
482 | mite_list_devices(); | |
483 | return -EIO; | |
484 | } | |
485 | ||
486 | COMEDI_PCI_INITCLEANUP(driver_ni6527, ni6527_pci_table); |