Staging: comedi: fix printk() coding style issue in ni_labpc.c
[linux-2.6-block.git] / drivers / staging / comedi / drivers / jr3_pci.c
CommitLineData
07b509e6
AB
1/*
2 comedi/drivers/jr3_pci.c
3 hardware driver for JR3/PCI force sensor board
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2007 Anders Blomdell <anders.blomdell@control.lth.se>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22*/
23/*
24Driver: jr3_pci
25Description: JR3/PCI force sensor board
26Author: Anders Blomdell <anders.blomdell@control.lth.se>
27Status: works
28Devices: [JR3] PCI force sensor board (jr3_pci)
29
30 The DSP on the board requires initialization code, which can
31 be loaded by placing it in /lib/firmware/comedi.
32 The initialization code should be somewhere on the media you got
33 with your card. One version is available from http://www.comedi.org
34 in the comedi_nonfree_firmware tarball.
35
36 Configuration options:
37 [0] - PCI bus number - if bus number and slot number are 0,
38 then driver search for first unused card
39 [1] - PCI slot number
40
41*/
42
43#include "../comedidev.h"
44
45#include <linux/delay.h>
46#include <linux/ctype.h>
47#include <linux/firmware.h>
9b5de0a0 48#include <linux/jiffies.h>
5a0e3ad6 49#include <linux/slab.h>
9b5de0a0 50#include <linux/timer.h>
07b509e6
AB
51#include "comedi_pci.h"
52#include "jr3_pci.h"
53
07b509e6
AB
54#define PCI_VENDOR_ID_JR3 0x1762
55#define PCI_DEVICE_ID_JR3_1_CHANNEL 0x3111
56#define PCI_DEVICE_ID_JR3_2_CHANNEL 0x3112
57#define PCI_DEVICE_ID_JR3_3_CHANNEL 0x3113
58#define PCI_DEVICE_ID_JR3_4_CHANNEL 0x3114
59
0a85b6f0
MT
60static int jr3_pci_attach(struct comedi_device *dev,
61 struct comedi_devconfig *it);
da91b269 62static int jr3_pci_detach(struct comedi_device *dev);
07b509e6 63
139dfbdf 64static struct comedi_driver driver_jr3_pci = {
68c3dbff
BP
65 .driver_name = "jr3_pci",
66 .module = THIS_MODULE,
67 .attach = jr3_pci_attach,
68 .detach = jr3_pci_detach,
07b509e6
AB
69};
70
71static DEFINE_PCI_DEVICE_TABLE(jr3_pci_pci_table) = {
0a85b6f0
MT
72 {
73 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_1_CHANNEL,
74 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
75 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_2_CHANNEL,
76 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
77 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_3_CHANNEL,
78 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
79 PCI_VENDOR_ID_JR3, PCI_DEVICE_ID_JR3_4_CHANNEL,
80 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
81 0}
07b509e6
AB
82};
83
84MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
85
217fbbbc
BP
86struct jr3_pci_dev_private {
87
07b509e6
AB
88 struct pci_dev *pci_dev;
89 int pci_enabled;
b2e1b3c2 90 volatile struct jr3_t *iobase;
07b509e6
AB
91 int n_channels;
92 struct timer_list timer;
217fbbbc
BP
93};
94
83101a17
BP
95struct poll_delay_t {
96
07b509e6
AB
97 int min;
98 int max;
83101a17
BP
99};
100
c6a3b7b6 101struct jr3_pci_subdev_private {
67080790 102 volatile struct jr3_channel *channel;
07b509e6
AB
103 unsigned long next_time_min;
104 unsigned long next_time_max;
105 enum { state_jr3_poll,
106 state_jr3_init_wait_for_offset,
107 state_jr3_init_transform_complete,
108 state_jr3_init_set_full_scale_complete,
109 state_jr3_init_use_offset_complete,
110 state_jr3_done
111 } state;
112 int channel_no;
113 int serial_no;
114 int model_no;
115 struct {
116 int length;
1f6325d6 117 struct comedi_krange range;
07b509e6 118 } range[9];
9ced1de6 119 const struct comedi_lrange *range_table_list[8 * 7 + 2];
790c5541 120 unsigned int maxdata_list[8 * 7 + 2];
07b509e6
AB
121 u16 errors;
122 int retries;
c6a3b7b6 123};
07b509e6 124
c5331be1
FMH
125/* Hotplug firmware loading stuff */
126
127typedef int comedi_firmware_callback(struct comedi_device *dev,
0a85b6f0 128 const u8 * data, size_t size);
c5331be1
FMH
129
130static int comedi_load_firmware(struct comedi_device *dev, char *name,
131 comedi_firmware_callback cb)
132{
133 int result = 0;
134 const struct firmware *fw;
135 char *firmware_path;
136 static const char *prefix = "comedi/";
137 struct jr3_pci_dev_private *devpriv = dev->private;
138
139 firmware_path = kmalloc(strlen(prefix) + strlen(name) + 1, GFP_KERNEL);
140 if (!firmware_path) {
141 result = -ENOMEM;
142 } else {
143 firmware_path[0] = '\0';
144 strcat(firmware_path, prefix);
145 strcat(firmware_path, name);
146 result = request_firmware(&fw, firmware_path,
0a85b6f0 147 &devpriv->pci_dev->dev);
c5331be1
FMH
148 if (result == 0) {
149 if (!cb)
150 result = -EINVAL;
151 else
152 result = cb(dev, fw->data, fw->size);
153 release_firmware(fw);
154 }
155 kfree(firmware_path);
156 }
157 return result;
158}
159
83101a17 160static struct poll_delay_t poll_delay_min_max(int min, int max)
07b509e6 161{
83101a17 162 struct poll_delay_t result;
07b509e6
AB
163
164 result.min = min;
165 result.max = max;
166 return result;
167}
168
67080790 169static int is_complete(volatile struct jr3_channel *channel)
07b509e6
AB
170{
171 return get_s16(&channel->command_word0) == 0;
172}
173
6ae9488b 174struct transform_t {
07b509e6
AB
175 struct {
176 u16 link_type;
177 s16 link_amount;
178 } link[8];
6ae9488b 179};
07b509e6 180
67080790 181static void set_transforms(volatile struct jr3_channel *channel,
0a85b6f0 182 struct transform_t transf, short num)
07b509e6
AB
183{
184 int i;
185
2696fb57 186 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
07b509e6
AB
187 for (i = 0; i < 8; i++) {
188
189 set_u16(&channel->transforms[num].link[i].link_type,
190 transf.link[i].link_type);
5f74ea14 191 udelay(1);
07b509e6
AB
192 set_s16(&channel->transforms[num].link[i].link_amount,
193 transf.link[i].link_amount);
5f74ea14 194 udelay(1);
07b509e6
AB
195 if (transf.link[i].link_type == end_x_form) {
196 break;
197 }
198 }
199}
200
0a85b6f0
MT
201static void use_transform(volatile struct jr3_channel *channel,
202 short transf_num)
07b509e6
AB
203{
204 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
205}
206
67080790 207static void use_offset(volatile struct jr3_channel *channel, short offset_num)
07b509e6
AB
208{
209 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
210}
211
67080790 212static void set_offset(volatile struct jr3_channel *channel)
07b509e6
AB
213{
214 set_s16(&channel->command_word0, 0x0700);
215}
216
050509fa 217struct six_axis_t {
07b509e6
AB
218 s16 fx;
219 s16 fy;
220 s16 fz;
221 s16 mx;
222 s16 my;
223 s16 mz;
050509fa 224};
07b509e6 225
67080790 226static void set_full_scales(volatile struct jr3_channel *channel,
0a85b6f0 227 struct six_axis_t full_scale)
07b509e6
AB
228{
229 printk("%d %d %d %d %d %d\n",
0a85b6f0
MT
230 full_scale.fx,
231 full_scale.fy,
232 full_scale.fz, full_scale.mx, full_scale.my, full_scale.mz);
07b509e6
AB
233 set_s16(&channel->full_scale.fx, full_scale.fx);
234 set_s16(&channel->full_scale.fy, full_scale.fy);
235 set_s16(&channel->full_scale.fz, full_scale.fz);
236 set_s16(&channel->full_scale.mx, full_scale.mx);
237 set_s16(&channel->full_scale.my, full_scale.my);
238 set_s16(&channel->full_scale.mz, full_scale.mz);
239 set_s16(&channel->command_word0, 0x0a00);
240}
241
0a85b6f0
MT
242static struct six_axis_t get_min_full_scales(volatile struct jr3_channel
243 *channel)
07b509e6 244{
050509fa 245 struct six_axis_t result;
07b509e6
AB
246 result.fx = get_s16(&channel->min_full_scale.fx);
247 result.fy = get_s16(&channel->min_full_scale.fy);
248 result.fz = get_s16(&channel->min_full_scale.fz);
249 result.mx = get_s16(&channel->min_full_scale.mx);
250 result.my = get_s16(&channel->min_full_scale.my);
251 result.mz = get_s16(&channel->min_full_scale.mz);
252 return result;
253}
254
0a85b6f0
MT
255static struct six_axis_t get_max_full_scales(volatile struct jr3_channel
256 *channel)
07b509e6 257{
050509fa 258 struct six_axis_t result;
07b509e6
AB
259 result.fx = get_s16(&channel->max_full_scale.fx);
260 result.fy = get_s16(&channel->max_full_scale.fy);
261 result.fz = get_s16(&channel->max_full_scale.fz);
262 result.mx = get_s16(&channel->max_full_scale.mx);
263 result.my = get_s16(&channel->max_full_scale.my);
264 result.mz = get_s16(&channel->max_full_scale.mz);
265 return result;
266}
267
0a85b6f0
MT
268static int jr3_pci_ai_insn_read(struct comedi_device *dev,
269 struct comedi_subdevice *s,
270 struct comedi_insn *insn, unsigned int *data)
07b509e6
AB
271{
272 int result;
c6a3b7b6 273 struct jr3_pci_subdev_private *p;
07b509e6
AB
274 int channel;
275
276 p = s->private;
277 channel = CR_CHAN(insn->chanspec);
278 if (p == NULL || channel > 57) {
279 result = -EINVAL;
280 } else {
281 int i;
282
283 result = insn->n;
284 if (p->state != state_jr3_done ||
0a85b6f0
MT
285 (get_u16(&p->channel->errors) & (watch_dog | watch_dog2 |
286 sensor_change))) {
07b509e6
AB
287 /* No sensor or sensor changed */
288 if (p->state == state_jr3_done) {
289 /* Restart polling */
290 p->state = state_jr3_poll;
291 }
292 result = -EAGAIN;
293 }
294 for (i = 0; i < insn->n; i++) {
295 if (channel < 56) {
296 int axis, filter;
297
298 axis = channel % 8;
299 filter = channel / 8;
300 if (p->state != state_jr3_done) {
301 data[i] = 0;
302 } else {
303 int F = 0;
304 switch (axis) {
305 case 0:{
0a85b6f0
MT
306 F = get_s16
307 (&p->channel->filter
308 [filter].fx);
07b509e6
AB
309 }
310 break;
311 case 1:{
0a85b6f0
MT
312 F = get_s16
313 (&p->channel->filter
314 [filter].fy);
07b509e6
AB
315 }
316 break;
317 case 2:{
0a85b6f0
MT
318 F = get_s16
319 (&p->channel->filter
320 [filter].fz);
07b509e6
AB
321 }
322 break;
323 case 3:{
0a85b6f0
MT
324 F = get_s16
325 (&p->channel->filter
326 [filter].mx);
07b509e6
AB
327 }
328 break;
329 case 4:{
0a85b6f0
MT
330 F = get_s16
331 (&p->channel->filter
332 [filter].my);
07b509e6
AB
333 }
334 break;
335 case 5:{
0a85b6f0
MT
336 F = get_s16
337 (&p->channel->filter
338 [filter].mz);
07b509e6
AB
339 }
340 break;
341 case 6:{
0a85b6f0
MT
342 F = get_s16
343 (&p->channel->filter
344 [filter].v1);
07b509e6
AB
345 }
346 break;
347 case 7:{
0a85b6f0
MT
348 F = get_s16
349 (&p->channel->filter
350 [filter].v2);
07b509e6
AB
351 }
352 break;
353 }
354 data[i] = F + 0x4000;
355 }
356 } else if (channel == 56) {
357 if (p->state != state_jr3_done) {
358 data[i] = 0;
359 } else {
360 data[i] =
0a85b6f0 361 get_u16(&p->channel->model_no);
07b509e6
AB
362 }
363 } else if (channel == 57) {
364 if (p->state != state_jr3_done) {
365 data[i] = 0;
366 } else {
367 data[i] =
0a85b6f0 368 get_u16(&p->channel->serial_no);
07b509e6
AB
369 }
370 }
371 }
372 }
373 return result;
374}
375
3c17ba07 376static int jr3_pci_open(struct comedi_device *dev)
07b509e6
AB
377{
378 int i;
217fbbbc 379 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB
380
381 printk("jr3_pci_open\n");
382 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 383 struct jr3_pci_subdev_private *p;
07b509e6
AB
384
385 p = dev->subdevices[i].private;
386 if (p) {
387 printk("serial: %p %d (%d)\n", p, p->serial_no,
0a85b6f0 388 p->channel_no);
07b509e6
AB
389 }
390 }
3c17ba07 391 return 0;
07b509e6
AB
392}
393
0a85b6f0 394int read_idm_word(const u8 * data, size_t size, int *pos, unsigned int *val)
07b509e6
AB
395{
396 int result = 0;
397 if (pos != 0 && val != 0) {
2696fb57 398 /* Skip over non hex */
07b509e6
AB
399 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++) {
400 }
2696fb57 401 /* Collect value */
07b509e6
AB
402 *val = 0;
403 for (; *pos < size && isxdigit(data[*pos]); (*pos)++) {
404 char ch = tolower(data[*pos]);
405 result = 1;
406 if ('0' <= ch && ch <= '9') {
407 *val = (*val << 4) + (ch - '0');
408 } else if ('a' <= ch && ch <= 'f') {
409 *val = (*val << 4) + (ch - 'a' + 10);
410 }
411 }
412 }
413 return result;
414}
415
0a85b6f0
MT
416static int jr3_download_firmware(struct comedi_device *dev, const u8 * data,
417 size_t size)
07b509e6
AB
418{
419 /*
420 * IDM file format is:
421 * { count, address, data <count> } *
422 * ffff
423 */
424 int result, more, pos, OK;
425
426 result = 0;
427 more = 1;
428 pos = 0;
429 OK = 0;
430 while (more) {
431 unsigned int count, addr;
432
433 more = more && read_idm_word(data, size, &pos, &count);
434 if (more && count == 0xffff) {
435 OK = 1;
436 break;
437 }
438 more = more && read_idm_word(data, size, &pos, &addr);
439 while (more && count > 0) {
440 unsigned int dummy;
441 more = more && read_idm_word(data, size, &pos, &dummy);
442 count--;
443 }
444 }
445
446 if (!OK) {
447 result = -ENODATA;
448 } else {
449 int i;
217fbbbc 450 struct jr3_pci_dev_private *p = dev->private;
07b509e6
AB
451
452 for (i = 0; i < p->n_channels; i++) {
c6a3b7b6 453 struct jr3_pci_subdev_private *sp;
07b509e6
AB
454
455 sp = dev->subdevices[i].private;
456 more = 1;
457 pos = 0;
458 while (more) {
459 unsigned int count, addr;
460 more = more
0a85b6f0 461 && read_idm_word(data, size, &pos, &count);
07b509e6
AB
462 if (more && count == 0xffff) {
463 break;
464 }
465 more = more
0a85b6f0 466 && read_idm_word(data, size, &pos, &addr);
07b509e6 467 printk("Loading#%d %4.4x bytes at %4.4x\n", i,
0a85b6f0 468 count, addr);
07b509e6
AB
469 while (more && count > 0) {
470 if (addr & 0x4000) {
2696fb57 471 /* 16 bit data, never seen in real life!! */
07b509e6
AB
472 unsigned int data1;
473
474 more = more
0a85b6f0
MT
475 && read_idm_word(data,
476 size, &pos,
477 &data1);
07b509e6 478 count--;
2696fb57
BP
479 /* printk("jr3_data, not tested\n"); */
480 /* jr3[addr + 0x20000 * pnum] = data1; */
07b509e6 481 } else {
2696fb57 482 /* Download 24 bit program */
07b509e6
AB
483 unsigned int data1, data2;
484
485 more = more
0a85b6f0
MT
486 && read_idm_word(data,
487 size, &pos,
488 &data1);
07b509e6 489 more = more
0a85b6f0
MT
490 && read_idm_word(data, size,
491 &pos,
492 &data2);
07b509e6
AB
493 count -= 2;
494 if (more) {
0a85b6f0
MT
495 set_u16(&p->
496 iobase->channel
497 [i].program_low
07b509e6 498 [addr], data1);
5f74ea14 499 udelay(1);
0a85b6f0
MT
500 set_u16(&p->
501 iobase->channel
502 [i].program_high
07b509e6 503 [addr], data2);
5f74ea14 504 udelay(1);
07b509e6
AB
505
506 }
507 }
508 addr++;
509 }
510 }
511 }
512 }
513 return result;
514}
515
da91b269 516static struct poll_delay_t jr3_pci_poll_subdevice(struct comedi_subdevice *s)
07b509e6 517{
83101a17 518 struct poll_delay_t result = poll_delay_min_max(1000, 2000);
c6a3b7b6 519 struct jr3_pci_subdev_private *p = s->private;
b1f68dc1 520 int i;
07b509e6
AB
521
522 if (p) {
67080790 523 volatile struct jr3_channel *channel = p->channel;
07b509e6
AB
524 int errors = get_u16(&channel->errors);
525
526 if (errors != p->errors) {
527 printk("Errors: %x -> %x\n", p->errors, errors);
528 p->errors = errors;
529 }
530 if (errors & (watch_dog | watch_dog2 | sensor_change)) {
2696fb57 531 /* Sensor communication lost, force poll mode */
07b509e6
AB
532 p->state = state_jr3_poll;
533
534 }
535 switch (p->state) {
536 case state_jr3_poll:{
537 u16 model_no = get_u16(&channel->model_no);
538 u16 serial_no = get_u16(&channel->serial_no);
539 if ((errors & (watch_dog | watch_dog2)) ||
0a85b6f0 540 model_no == 0 || serial_no == 0) {
2696fb57
BP
541/*
542 * Still no sensor, keep on polling. Since it takes up to 10 seconds
543 * for offsets to stabilize, polling each second should suffice.
544 */
07b509e6
AB
545 result = poll_delay_min_max(1000, 2000);
546 } else {
547 p->retries = 0;
548 p->state =
0a85b6f0 549 state_jr3_init_wait_for_offset;
07b509e6
AB
550 result = poll_delay_min_max(1000, 2000);
551 }
552 }
553 break;
554 case state_jr3_init_wait_for_offset:{
555 p->retries++;
556 if (p->retries < 10) {
2696fb57 557 /* Wait for offeset to stabilize (< 10 s according to manual) */
07b509e6
AB
558 result = poll_delay_min_max(1000, 2000);
559 } else {
6ae9488b 560 struct transform_t transf;
07b509e6
AB
561
562 p->model_no =
0a85b6f0 563 get_u16(&channel->model_no);
07b509e6 564 p->serial_no =
0a85b6f0 565 get_u16(&channel->serial_no);
07b509e6 566
0a85b6f0
MT
567 printk
568 ("Setting transform for channel %d\n",
569 p->channel_no);
07b509e6 570 printk("Sensor Model = %i\n",
0a85b6f0 571 p->model_no);
07b509e6 572 printk("Sensor Serial = %i\n",
0a85b6f0 573 p->serial_no);
07b509e6 574
2696fb57 575 /* Transformation all zeros */
b1f68dc1
IA
576 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
577 transf.link[i].link_type =
578 (enum link_types)0;
579 transf.link[i].link_amount = 0;
580 }
07b509e6
AB
581
582 set_transforms(channel, transf, 0);
583 use_transform(channel, 0);
584 p->state =
0a85b6f0 585 state_jr3_init_transform_complete;
2696fb57 586 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB
587 }
588 } break;
589 case state_jr3_init_transform_complete:{
590 if (!is_complete(channel)) {
0a85b6f0
MT
591 printk
592 ("state_jr3_init_transform_complete complete = %d\n",
593 is_complete(channel));
07b509e6
AB
594 result = poll_delay_min_max(20, 100);
595 } else {
2696fb57 596 /* Set full scale */
050509fa
BP
597 struct six_axis_t min_full_scale;
598 struct six_axis_t max_full_scale;
07b509e6
AB
599
600 min_full_scale =
0a85b6f0 601 get_min_full_scales(channel);
07b509e6
AB
602 printk("Obtained Min. Full Scales:\n");
603 printk("%i ", (min_full_scale).fx);
604 printk("%i ", (min_full_scale).fy);
605 printk("%i ", (min_full_scale).fz);
606 printk("%i ", (min_full_scale).mx);
607 printk("%i ", (min_full_scale).my);
608 printk("%i ", (min_full_scale).mz);
609 printk("\n");
610
611 max_full_scale =
0a85b6f0 612 get_max_full_scales(channel);
07b509e6
AB
613 printk("Obtained Max. Full Scales:\n");
614 printk("%i ", (max_full_scale).fx);
615 printk("%i ", (max_full_scale).fy);
616 printk("%i ", (max_full_scale).fz);
617 printk("%i ", (max_full_scale).mx);
618 printk("%i ", (max_full_scale).my);
619 printk("%i ", (max_full_scale).mz);
620 printk("\n");
621
622 set_full_scales(channel,
0a85b6f0 623 max_full_scale);
07b509e6
AB
624
625 p->state =
0a85b6f0 626 state_jr3_init_set_full_scale_complete;
2696fb57 627 result = poll_delay_min_max(20, 100); /* Allow 20 ms for completion */
07b509e6
AB
628 }
629 }
630 break;
631 case state_jr3_init_set_full_scale_complete:{
632 if (!is_complete(channel)) {
0a85b6f0
MT
633 printk
634 ("state_jr3_init_set_full_scale_complete complete = %d\n",
635 is_complete(channel));
07b509e6
AB
636 result = poll_delay_min_max(20, 100);
637 } else {
cdc14cd0 638 volatile struct force_array *full_scale;
07b509e6 639
2696fb57 640 /* Use ranges in kN or we will overflow arount 2000N! */
07b509e6
AB
641 full_scale = &channel->full_scale;
642 p->range[0].range.min =
0a85b6f0 643 -get_s16(&full_scale->fx) * 1000;
07b509e6 644 p->range[0].range.max =
0a85b6f0 645 get_s16(&full_scale->fx) * 1000;
07b509e6 646 p->range[1].range.min =
0a85b6f0 647 -get_s16(&full_scale->fy) * 1000;
07b509e6 648 p->range[1].range.max =
0a85b6f0 649 get_s16(&full_scale->fy) * 1000;
07b509e6 650 p->range[2].range.min =
0a85b6f0 651 -get_s16(&full_scale->fz) * 1000;
07b509e6 652 p->range[2].range.max =
0a85b6f0 653 get_s16(&full_scale->fz) * 1000;
07b509e6 654 p->range[3].range.min =
0a85b6f0 655 -get_s16(&full_scale->mx) * 100;
07b509e6 656 p->range[3].range.max =
0a85b6f0 657 get_s16(&full_scale->mx) * 100;
07b509e6 658 p->range[4].range.min =
0a85b6f0 659 -get_s16(&full_scale->my) * 100;
07b509e6 660 p->range[4].range.max =
0a85b6f0 661 get_s16(&full_scale->my) * 100;
07b509e6 662 p->range[5].range.min =
0a85b6f0 663 -get_s16(&full_scale->mz) * 100;
07b509e6 664 p->range[5].range.max =
0a85b6f0 665 get_s16(&full_scale->mz) * 100;
2696fb57
BP
666 p->range[6].range.min = -get_s16(&full_scale->v1) * 100; /* ?? */
667 p->range[6].range.max = get_s16(&full_scale->v1) * 100; /* ?? */
668 p->range[7].range.min = -get_s16(&full_scale->v2) * 100; /* ?? */
669 p->range[7].range.max = get_s16(&full_scale->v2) * 100; /* ?? */
07b509e6
AB
670 p->range[8].range.min = 0;
671 p->range[8].range.max = 65535;
672
673 {
674 int i;
675 for (i = 0; i < 9; i++) {
676 printk("%d %d - %d\n",
0a85b6f0
MT
677 i,
678 p->
679 range[i].range.
680 min,
681 p->
682 range[i].range.
683 max);
07b509e6
AB
684 }
685 }
686
687 use_offset(channel, 0);
688 p->state =
0a85b6f0 689 state_jr3_init_use_offset_complete;
2696fb57 690 result = poll_delay_min_max(40, 100); /* Allow 40 ms for completion */
07b509e6
AB
691 }
692 }
693 break;
694 case state_jr3_init_use_offset_complete:{
695 if (!is_complete(channel)) {
0a85b6f0
MT
696 printk
697 ("state_jr3_init_use_offset_complete complete = %d\n",
698 is_complete(channel));
07b509e6
AB
699 result = poll_delay_min_max(20, 100);
700 } else {
0a85b6f0
MT
701 printk
702 ("Default offsets %d %d %d %d %d %d\n",
703 get_s16(&channel->offsets.fx),
704 get_s16(&channel->offsets.fy),
705 get_s16(&channel->offsets.fz),
706 get_s16(&channel->offsets.mx),
707 get_s16(&channel->offsets.my),
708 get_s16(&channel->offsets.mz));
07b509e6
AB
709
710 set_s16(&channel->offsets.fx, 0);
711 set_s16(&channel->offsets.fy, 0);
712 set_s16(&channel->offsets.fz, 0);
713 set_s16(&channel->offsets.mx, 0);
714 set_s16(&channel->offsets.my, 0);
715 set_s16(&channel->offsets.mz, 0);
716
717 set_offset(channel);
718
719 p->state = state_jr3_done;
720 }
721 }
722 break;
723 case state_jr3_done:{
724 poll_delay_min_max(10000, 20000);
725 }
726 break;
727 default:{
728 poll_delay_min_max(1000, 2000);
729 }
730 break;
731 }
732 }
733 return result;
734}
735
736static void jr3_pci_poll_dev(unsigned long data)
737{
738 unsigned long flags;
0a85b6f0 739 struct comedi_device *dev = (struct comedi_device *)data;
217fbbbc 740 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB
741 unsigned long now;
742 int delay;
743 int i;
744
5f74ea14 745 spin_lock_irqsave(&dev->spinlock, flags);
07b509e6
AB
746 delay = 1000;
747 now = jiffies;
2696fb57 748 /* Poll all channels that are ready to be polled */
07b509e6 749 for (i = 0; i < devpriv->n_channels; i++) {
0a85b6f0
MT
750 struct jr3_pci_subdev_private *subdevpriv =
751 dev->subdevices[i].private;
07b509e6 752 if (now > subdevpriv->next_time_min) {
83101a17 753 struct poll_delay_t sub_delay;
07b509e6
AB
754
755 sub_delay = jr3_pci_poll_subdevice(&dev->subdevices[i]);
756 subdevpriv->next_time_min =
0a85b6f0 757 jiffies + msecs_to_jiffies(sub_delay.min);
07b509e6 758 subdevpriv->next_time_max =
0a85b6f0 759 jiffies + msecs_to_jiffies(sub_delay.max);
07b509e6 760 if (sub_delay.max && sub_delay.max < delay) {
2696fb57
BP
761/*
762* Wake up as late as possible -> poll as many channels as possible
763* at once
764*/
07b509e6
AB
765 delay = sub_delay.max;
766 }
767 }
768 }
5f74ea14 769 spin_unlock_irqrestore(&dev->spinlock, flags);
07b509e6
AB
770
771 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
772 add_timer(&devpriv->timer);
773}
774
0a85b6f0
MT
775static int jr3_pci_attach(struct comedi_device *dev,
776 struct comedi_devconfig *it)
07b509e6
AB
777{
778 int result = 0;
779 struct pci_dev *card = NULL;
780 int opt_bus, opt_slot, i;
217fbbbc 781 struct jr3_pci_dev_private *devpriv;
07b509e6
AB
782
783 printk("comedi%d: jr3_pci\n", dev->minor);
784
785 opt_bus = it->options[0];
786 opt_slot = it->options[1];
787
67080790
BP
788 if (sizeof(struct jr3_channel) != 0xc00) {
789 printk("sizeof(struct jr3_channel) = %x [expected %x]\n",
0a85b6f0 790 (unsigned)sizeof(struct jr3_channel), 0xc00);
07b509e6
AB
791 return -EINVAL;
792 }
793
217fbbbc 794 result = alloc_private(dev, sizeof(struct jr3_pci_dev_private));
07b509e6
AB
795 if (result < 0) {
796 return -ENOMEM;
797 }
798 card = NULL;
799 devpriv = dev->private;
800 init_timer(&devpriv->timer);
801 while (1) {
802 card = pci_get_device(PCI_VENDOR_ID_JR3, PCI_ANY_ID, card);
803 if (card == NULL) {
804 /* No card found */
805 break;
806 } else {
807 switch (card->device) {
808 case PCI_DEVICE_ID_JR3_1_CHANNEL:{
809 devpriv->n_channels = 1;
810 }
811 break;
812 case PCI_DEVICE_ID_JR3_2_CHANNEL:{
813 devpriv->n_channels = 2;
814 }
815 break;
816 case PCI_DEVICE_ID_JR3_3_CHANNEL:{
817 devpriv->n_channels = 3;
818 }
819 break;
820 case PCI_DEVICE_ID_JR3_4_CHANNEL:{
821 devpriv->n_channels = 4;
822 }
823 break;
824 default:{
825 devpriv->n_channels = 0;
826 }
827 }
828 if (devpriv->n_channels >= 1) {
829 if (opt_bus == 0 && opt_slot == 0) {
830 /* Take first available card */
831 break;
832 } else if (opt_bus == card->bus->number &&
0a85b6f0 833 opt_slot == PCI_SLOT(card->devfn)) {
07b509e6
AB
834 /* Take requested card */
835 break;
836 }
837 }
838 }
839 }
840 if (!card) {
841 printk(" no jr3_pci found\n");
842 return -EIO;
843 } else {
844 devpriv->pci_dev = card;
845 dev->board_name = "jr3_pci";
846 }
c3744138
BP
847
848 result = comedi_pci_enable(card, "jr3_pci");
849 if (result < 0) {
07b509e6
AB
850 return -EIO;
851 }
c3744138 852
07b509e6 853 devpriv->pci_enabled = 1;
fa5c5f4c
IA
854 devpriv->iobase = ioremap(pci_resource_start(card, 0),
855 offsetof(struct jr3_t, channel[devpriv->n_channels]));
856 if (!devpriv->iobase)
857 return -ENOMEM;
858
07b509e6
AB
859 result = alloc_subdevices(dev, devpriv->n_channels);
860 if (result < 0)
861 goto out;
862
863 dev->open = jr3_pci_open;
864 for (i = 0; i < devpriv->n_channels; i++) {
865 dev->subdevices[i].type = COMEDI_SUBD_AI;
866 dev->subdevices[i].subdev_flags = SDF_READABLE | SDF_GROUND;
867 dev->subdevices[i].n_chan = 8 * 7 + 2;
868 dev->subdevices[i].insn_read = jr3_pci_ai_insn_read;
869 dev->subdevices[i].private =
0a85b6f0 870 kzalloc(sizeof(struct jr3_pci_subdev_private), GFP_KERNEL);
07b509e6 871 if (dev->subdevices[i].private) {
c6a3b7b6 872 struct jr3_pci_subdev_private *p;
07b509e6
AB
873 int j;
874
875 p = dev->subdevices[i].private;
876 p->channel = &devpriv->iobase->channel[i].data;
877 printk("p->channel %p %p (%tx)\n",
0a85b6f0
MT
878 p->channel, devpriv->iobase,
879 ((char *)(p->channel) -
880 (char *)(devpriv->iobase)));
07b509e6
AB
881 p->channel_no = i;
882 for (j = 0; j < 8; j++) {
883 int k;
884
885 p->range[j].length = 1;
886 p->range[j].range.min = -1000000;
887 p->range[j].range.max = 1000000;
888 for (k = 0; k < 7; k++) {
889 p->range_table_list[j + k * 8] =
0a85b6f0
MT
890 (struct comedi_lrange *)&p->
891 range[j];
07b509e6
AB
892 p->maxdata_list[j + k * 8] = 0x7fff;
893 }
894 }
895 p->range[8].length = 1;
896 p->range[8].range.min = 0;
897 p->range[8].range.max = 65536;
898
899 p->range_table_list[56] =
0a85b6f0 900 (struct comedi_lrange *)&p->range[8];
07b509e6 901 p->range_table_list[57] =
0a85b6f0 902 (struct comedi_lrange *)&p->range[8];
07b509e6
AB
903 p->maxdata_list[56] = 0xffff;
904 p->maxdata_list[57] = 0xffff;
2696fb57 905 /* Channel specific range and maxdata */
07b509e6
AB
906 dev->subdevices[i].range_table = 0;
907 dev->subdevices[i].range_table_list =
0a85b6f0 908 p->range_table_list;
07b509e6
AB
909 dev->subdevices[i].maxdata = 0;
910 dev->subdevices[i].maxdata_list = p->maxdata_list;
911 }
912 }
913
2696fb57 914 /* Reset DSP card */
07b509e6
AB
915 devpriv->iobase->channel[0].reset = 0;
916
917 result = comedi_load_firmware(dev, "jr3pci.idm", jr3_download_firmware);
918 printk("Firmare load %d\n", result);
919
920 if (result < 0) {
921 goto out;
922 }
2696fb57
BP
923/*
924 * TODO: use firmware to load preferred offset tables. Suggested
925 * format:
926 * model serial Fx Fy Fz Mx My Mz\n
927 *
928 * comedi_load_firmware(dev, "jr3_offsets_table", jr3_download_firmware);
929 */
07b509e6 930
2696fb57
BP
931/*
932 * It takes a few milliseconds for software to settle as much as we
933 * can read firmware version
934 */
07b509e6
AB
935 msleep_interruptible(25);
936 for (i = 0; i < 0x18; i++) {
937 printk("%c",
0a85b6f0
MT
938 get_u16(&devpriv->iobase->channel[0].
939 data.copyright[i]) >> 8);
07b509e6
AB
940 }
941
2696fb57 942 /* Start card timer */
07b509e6 943 for (i = 0; i < devpriv->n_channels; i++) {
c6a3b7b6 944 struct jr3_pci_subdev_private *p = dev->subdevices[i].private;
07b509e6
AB
945
946 p->next_time_min = jiffies + msecs_to_jiffies(500);
947 p->next_time_max = jiffies + msecs_to_jiffies(2000);
948 }
949
950 devpriv->timer.data = (unsigned long)dev;
951 devpriv->timer.function = jr3_pci_poll_dev;
952 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
953 add_timer(&devpriv->timer);
954
0a85b6f0 955out:
07b509e6
AB
956 return result;
957}
958
5d929a71
BH
959MODULE_FIRMWARE("comedi/jr3pci.idm");
960
da91b269 961static int jr3_pci_detach(struct comedi_device *dev)
07b509e6
AB
962{
963 int i;
217fbbbc 964 struct jr3_pci_dev_private *devpriv = dev->private;
07b509e6
AB
965
966 printk("comedi%d: jr3_pci: remove\n", dev->minor);
967 if (devpriv) {
968 del_timer_sync(&devpriv->timer);
969
970 if (dev->subdevices) {
971 for (i = 0; i < devpriv->n_channels; i++) {
972 kfree(dev->subdevices[i].private);
973 }
974 }
975
976 if (devpriv->iobase) {
977 iounmap((void *)devpriv->iobase);
978 }
979 if (devpriv->pci_enabled) {
980 comedi_pci_disable(devpriv->pci_dev);
981 }
982
983 if (devpriv->pci_dev) {
984 pci_dev_put(devpriv->pci_dev);
985 }
986 }
987 return 0;
988}
989
990COMEDI_PCI_INITCLEANUP(driver_jr3_pci, jr3_pci_pci_table);