staging: comedi: move (*insn_{read, write}) timeout debug messages to core
[linux-2.6-block.git] / drivers / staging / comedi / drivers / dyna_pci10xx.c
CommitLineData
16a7373a
PS
1/*
2 * comedi/drivers/dyna_pci10xx.c
3 * Copyright (C) 2011 Prashant Shah, pshah.mumbai@gmail.com
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16a7373a
PS
14 */
15
16/*
17 Driver: dyna_pci10xx
18 Devices: Dynalog India PCI DAQ Cards, http://www.dynalogindia.com/
19 Author: Prashant Shah <pshah.mumbai@gmail.com>
20 Developed at Automation Labs, Chemical Dept., IIT Bombay, India.
21 Prof. Kannan Moudgalya <kannan@iitb.ac.in>
22 http://www.iitb.ac.in
23 Status: Stable
24 Version: 1.0
25 Device Supported :
26 - Dynalog PCI 1050
27
28 Notes :
29 - Dynalog India Pvt. Ltd. does not have a registered PCI Vendor ID and
30 they are using the PLX Technlogies Vendor ID since that is the PCI Chip used
31 in the card.
32 - Dynalog India Pvt. Ltd. has provided the internal register specification for
33 their cards in their manuals.
34*/
35
ce157f80
HS
36#include <linux/module.h>
37#include <linux/delay.h>
33782dd5 38#include <linux/pci.h>
16a7373a
PS
39#include <linux/mutex.h>
40
33782dd5
HS
41#include "../comedidev.h"
42
16a7373a
PS
43#define READ_TIMEOUT 50
44
eff3689b
HS
45static const struct comedi_lrange range_pci1050_ai = {
46 3, {
47 BIP_RANGE(10),
48 BIP_RANGE(5),
49 UNI_RANGE(10)
50 }
16a7373a
PS
51};
52
53static const char range_codes_pci1050_ai[] = { 0x00, 0x10, 0x30 };
54
16a7373a 55struct dyna_pci10xx_private {
16a7373a 56 struct mutex mutex;
b694c4f4 57 unsigned long BADR3;
16a7373a
PS
58};
59
443e6d02
HS
60static int dyna_pci10xx_ai_eoc(struct comedi_device *dev,
61 struct comedi_subdevice *s,
62 struct comedi_insn *insn,
63 unsigned long context)
64{
65 unsigned int status;
66
67 status = inw_p(dev->iobase);
68 if (status & (1 << 15))
69 return 0;
70 return -EBUSY;
71}
16a7373a 72
16a7373a
PS
73static int dyna_pci10xx_insn_read_ai(struct comedi_device *dev,
74 struct comedi_subdevice *s,
75 struct comedi_insn *insn, unsigned int *data)
76{
af0677c1 77 struct dyna_pci10xx_private *devpriv = dev->private;
443e6d02 78 int n;
16a7373a 79 u16 d = 0;
443e6d02 80 int ret = 0;
16a7373a
PS
81 unsigned int chan, range;
82
83 /* get the channel number and range */
84 chan = CR_CHAN(insn->chanspec);
8fda437d 85 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
16a7373a
PS
86
87 mutex_lock(&devpriv->mutex);
88 /* convert n samples */
89 for (n = 0; n < insn->n; n++) {
90 /* trigger conversion */
91 smp_mb();
b694c4f4 92 outw_p(0x0000 + range + chan, dev->iobase + 2);
16a7373a 93 udelay(10);
16a7373a 94
443e6d02
HS
95 ret = comedi_timeout(dev, s, insn, dyna_pci10xx_ai_eoc, 0);
96 if (ret) {
97 data[n] = 0;
443e6d02 98 break;
16a7373a 99 }
443e6d02
HS
100
101 /* read data */
102 d = inw_p(dev->iobase);
16a7373a
PS
103 /* mask the first 4 bits - EOC bits */
104 d &= 0x0FFF;
105 data[n] = d;
106 }
107 mutex_unlock(&devpriv->mutex);
108
109 /* return the number of samples read/written */
443e6d02 110 return ret ? ret : n;
16a7373a
PS
111}
112
113/* analog output callback */
114static int dyna_pci10xx_insn_write_ao(struct comedi_device *dev,
115 struct comedi_subdevice *s,
116 struct comedi_insn *insn, unsigned int *data)
117{
af0677c1 118 struct dyna_pci10xx_private *devpriv = dev->private;
16a7373a
PS
119 int n;
120 unsigned int chan, range;
121
122 chan = CR_CHAN(insn->chanspec);
8fda437d 123 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
16a7373a
PS
124
125 mutex_lock(&devpriv->mutex);
126 for (n = 0; n < insn->n; n++) {
127 smp_mb();
128 /* trigger conversion and write data */
b694c4f4 129 outw_p(data[n], dev->iobase);
16a7373a
PS
130 udelay(10);
131 }
132 mutex_unlock(&devpriv->mutex);
133 return n;
134}
135
136/* digital input bit interface */
137static int dyna_pci10xx_di_insn_bits(struct comedi_device *dev,
138 struct comedi_subdevice *s,
139 struct comedi_insn *insn, unsigned int *data)
140{
af0677c1 141 struct dyna_pci10xx_private *devpriv = dev->private;
16a7373a
PS
142 u16 d = 0;
143
16a7373a
PS
144 mutex_lock(&devpriv->mutex);
145 smp_mb();
146 d = inw_p(devpriv->BADR3);
147 udelay(10);
148
149 /* on return the data[0] contains output and data[1] contains input */
150 data[1] = d;
151 data[0] = s->state;
152 mutex_unlock(&devpriv->mutex);
a2714e3e 153 return insn->n;
16a7373a
PS
154}
155
16a7373a 156static int dyna_pci10xx_do_insn_bits(struct comedi_device *dev,
97f4289a
HS
157 struct comedi_subdevice *s,
158 struct comedi_insn *insn,
159 unsigned int *data)
16a7373a 160{
af0677c1
HS
161 struct dyna_pci10xx_private *devpriv = dev->private;
162
16a7373a 163 mutex_lock(&devpriv->mutex);
97f4289a 164 if (comedi_dio_update_state(s, data)) {
16a7373a
PS
165 smp_mb();
166 outw_p(s->state, devpriv->BADR3);
167 udelay(10);
168 }
169
16a7373a
PS
170 data[1] = s->state;
171 mutex_unlock(&devpriv->mutex);
97f4289a 172
a2714e3e 173 return insn->n;
16a7373a
PS
174}
175
a690b7e5 176static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
750af5e5 177 unsigned long context_unused)
1f20b973 178{
750af5e5 179 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
af0677c1 180 struct dyna_pci10xx_private *devpriv;
1f20b973
HS
181 struct comedi_subdevice *s;
182 int ret;
183
0bdab509 184 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
c34fa261
HS
185 if (!devpriv)
186 return -ENOMEM;
16a7373a 187
818f569f 188 ret = comedi_pci_enable(dev);
690e839f
HS
189 if (ret)
190 return ret;
b694c4f4 191 dev->iobase = pci_resource_start(pcidev, 2);
16a7373a 192 devpriv->BADR3 = pci_resource_start(pcidev, 3);
16a7373a 193
690e839f
HS
194 mutex_init(&devpriv->mutex);
195
8b6c5694 196 ret = comedi_alloc_subdevices(dev, 4);
6bdae560 197 if (ret)
8b6c5694 198 return ret;
16a7373a
PS
199
200 /* analog input */
1b39406b 201 s = &dev->subdevices[0];
16a7373a
PS
202 s->type = COMEDI_SUBD_AI;
203 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
8fda437d 204 s->n_chan = 16;
16a7373a 205 s->maxdata = 0x0FFF;
8fda437d 206 s->range_table = &range_pci1050_ai;
16a7373a
PS
207 s->len_chanlist = 16;
208 s->insn_read = dyna_pci10xx_insn_read_ai;
209
210 /* analog output */
1b39406b 211 s = &dev->subdevices[1];
16a7373a
PS
212 s->type = COMEDI_SUBD_AO;
213 s->subdev_flags = SDF_WRITABLE;
8fda437d 214 s->n_chan = 16;
16a7373a 215 s->maxdata = 0x0FFF;
f2eacff1 216 s->range_table = &range_unipolar10;
16a7373a
PS
217 s->len_chanlist = 16;
218 s->insn_write = dyna_pci10xx_insn_write_ao;
219
220 /* digital input */
1b39406b 221 s = &dev->subdevices[2];
16a7373a
PS
222 s->type = COMEDI_SUBD_DI;
223 s->subdev_flags = SDF_READABLE | SDF_GROUND;
8fda437d 224 s->n_chan = 16;
16a7373a
PS
225 s->maxdata = 1;
226 s->range_table = &range_digital;
8fda437d 227 s->len_chanlist = 16;
16a7373a
PS
228 s->insn_bits = dyna_pci10xx_di_insn_bits;
229
230 /* digital output */
1b39406b 231 s = &dev->subdevices[3];
16a7373a
PS
232 s->type = COMEDI_SUBD_DO;
233 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
8fda437d 234 s->n_chan = 16;
16a7373a
PS
235 s->maxdata = 1;
236 s->range_table = &range_digital;
8fda437d 237 s->len_chanlist = 16;
16a7373a
PS
238 s->state = 0;
239 s->insn_bits = dyna_pci10xx_do_insn_bits;
240
690e839f
HS
241 return 0;
242}
243
484ecc95 244static void dyna_pci10xx_detach(struct comedi_device *dev)
16a7373a 245{
af0677c1 246 struct dyna_pci10xx_private *devpriv = dev->private;
06183026
HS
247
248 if (devpriv)
16a7373a 249 mutex_destroy(&devpriv->mutex);
7f072f54 250 comedi_pci_disable(dev);
16a7373a
PS
251}
252
75e6301b
HS
253static struct comedi_driver dyna_pci10xx_driver = {
254 .driver_name = "dyna_pci10xx",
de9f2db4 255 .module = THIS_MODULE,
750af5e5 256 .auto_attach = dyna_pci10xx_auto_attach,
de9f2db4 257 .detach = dyna_pci10xx_detach,
de9f2db4
HS
258};
259
a690b7e5 260static int dyna_pci10xx_pci_probe(struct pci_dev *dev,
b8f4ac23 261 const struct pci_device_id *id)
16a7373a 262{
b8f4ac23
HS
263 return comedi_pci_auto_config(dev, &dyna_pci10xx_driver,
264 id->driver_data);
16a7373a
PS
265}
266
41e043fc 267static const struct pci_device_id dyna_pci10xx_pci_table[] = {
00f5c774 268 { PCI_DEVICE(PCI_VENDOR_ID_PLX, 0x1050) },
de9f2db4
HS
269 { 0 }
270};
271MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table);
272
75e6301b
HS
273static struct pci_driver dyna_pci10xx_pci_driver = {
274 .name = "dyna_pci10xx",
de9f2db4 275 .id_table = dyna_pci10xx_pci_table,
75e6301b 276 .probe = dyna_pci10xx_pci_probe,
9901a4d7 277 .remove = comedi_pci_auto_unconfig,
16a7373a 278};
75e6301b 279module_comedi_pci_driver(dyna_pci10xx_driver, dyna_pci10xx_pci_driver);
16a7373a
PS
280
281MODULE_LICENSE("GPL");
282MODULE_AUTHOR("Prashant Shah <pshah.mumbai@gmail.com>");
283MODULE_DESCRIPTION("Comedi based drivers for Dynalog PCI DAQ cards");