Merge branch 'for-linus-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mason...
[linux-2.6-block.git] / drivers / staging / comedi / drivers / das6402.c
CommitLineData
48f16b6a 1/*
79e5e6ad
HS
2 * das6402.c
3 * Comedi driver for DAS6402 compatible boards
4 * Copyright(c) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
5 *
6 * Rewrite of an experimental driver by:
7 * Copyright (C) 1999 Oystein Svendsen <svendsen@pvv.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
48f16b6a
OS
18 */
19
20/*
79e5e6ad
HS
21 * Driver: das6402
22 * Description: Keithley Metrabyte DAS6402 (& compatibles)
d21f819c
IA
23 * Devices: [Keithley Metrabyte] DAS6402-12 (das6402-12),
24 * DAS6402-16 (das6402-16)
79e5e6ad
HS
25 * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
26 * Updated: Fri, 14 Mar 2014 10:18:43 -0700
27 * Status: unknown
28 *
29 * Configuration Options:
30 * [0] - I/O base address
31 * [1] - IRQ (optional, needed for async command support)
32 */
48f16b6a 33
79e5e6ad
HS
34#include <linux/module.h>
35#include <linux/interrupt.h>
48f16b6a 36
79e5e6ad 37#include "../comedidev.h"
ad4808b6 38
ad4808b6 39#include "comedi_8254.h"
48f16b6a 40
48f16b6a 41/*
79e5e6ad
HS
42 * Register I/O map
43 */
44#define DAS6402_AI_DATA_REG 0x00
45#define DAS6402_AI_MUX_REG 0x02
46#define DAS6402_AI_MUX_LO(x) (((x) & 0x3f) << 0)
47#define DAS6402_AI_MUX_HI(x) (((x) & 0x3f) << 8)
48#define DAS6402_DI_DO_REG 0x03
49#define DAS6402_AO_DATA_REG(x) (0x04 + ((x) * 2))
50#define DAS6402_AO_LSB_REG(x) (0x04 + ((x) * 2))
51#define DAS6402_AO_MSB_REG(x) (0x05 + ((x) * 2))
52#define DAS6402_STATUS_REG 0x08
53#define DAS6402_STATUS_FFNE (1 << 0)
54#define DAS6402_STATUS_FHALF (1 << 1)
55#define DAS6402_STATUS_FFULL (1 << 2)
56#define DAS6402_STATUS_XINT (1 << 3)
57#define DAS6402_STATUS_INT (1 << 4)
58#define DAS6402_STATUS_XTRIG (1 << 5)
59#define DAS6402_STATUS_INDGT (1 << 6)
60#define DAS6402_STATUS_10MHZ (1 << 7)
61#define DAS6402_STATUS_W_CLRINT (1 << 0)
62#define DAS6402_STATUS_W_CLRXTR (1 << 1)
63#define DAS6402_STATUS_W_CLRXIN (1 << 2)
64#define DAS6402_STATUS_W_EXTEND (1 << 4)
65#define DAS6402_STATUS_W_ARMED (1 << 5)
66#define DAS6402_STATUS_W_POSTMODE (1 << 6)
67#define DAS6402_STATUS_W_10MHZ (1 << 7)
68#define DAS6402_CTRL_REG 0x09
69#define DAS6402_CTRL_SOFT_TRIG (0 << 0)
70#define DAS6402_CTRL_EXT_FALL_TRIG (1 << 0)
71#define DAS6402_CTRL_EXT_RISE_TRIG (2 << 0)
72#define DAS6402_CTRL_PACER_TRIG (3 << 0)
73#define DAS6402_CTRL_BURSTEN (1 << 2)
74#define DAS6402_CTRL_XINTE (1 << 3)
75#define DAS6402_CTRL_IRQ(x) ((x) << 4)
76#define DAS6402_CTRL_INTE (1 << 7)
77#define DAS6402_TRIG_REG 0x0a
78#define DAS6402_TRIG_TGEN (1 << 0)
79#define DAS6402_TRIG_TGSEL (1 << 1)
80#define DAS6402_TRIG_TGPOL (1 << 2)
81#define DAS6402_TRIG_PRETRIG (1 << 3)
82#define DAS6402_AO_RANGE(_chan, _range) ((_range) << ((_chan) ? 6 : 4))
83#define DAS6402_AO_RANGE_MASK(_chan) (3 << ((_chan) ? 6 : 4))
84#define DAS6402_MODE_REG 0x0b
85#define DAS6402_MODE_RANGE(x) ((x) << 0)
86#define DAS6402_MODE_POLLED (0 << 2)
87#define DAS6402_MODE_FIFONEPTY (1 << 2)
88#define DAS6402_MODE_FIFOHFULL (2 << 2)
89#define DAS6402_MODE_EOB (3 << 2)
90#define DAS6402_MODE_ENHANCED (1 << 4)
91#define DAS6402_MODE_SE (1 << 5)
92#define DAS6402_MODE_UNI (1 << 6)
93#define DAS6402_MODE_DMA1 (0 << 7)
94#define DAS6402_MODE_DMA3 (1 << 7)
95#define DAS6402_TIMER_BASE 0x0c
96
97static const struct comedi_lrange das6402_ai_ranges = {
98 8, {
99 BIP_RANGE(10),
100 BIP_RANGE(5),
101 BIP_RANGE(2.5),
102 BIP_RANGE(1.25),
103 UNI_RANGE(10),
104 UNI_RANGE(5),
105 UNI_RANGE(2.5),
106 UNI_RANGE(1.25)
107 }
108};
48f16b6a 109
79e5e6ad
HS
110/*
111 * Analog output ranges are programmable on the DAS6402/12.
112 * For the DAS6402/16 the range bits have no function, the
113 * DAC ranges are selected by switches on the board.
114 */
115static const struct comedi_lrange das6402_ao_ranges = {
116 4, {
117 BIP_RANGE(5),
118 BIP_RANGE(10),
119 UNI_RANGE(5),
120 UNI_RANGE(10)
121 }
122};
48f16b6a 123
79e5e6ad
HS
124struct das6402_boardinfo {
125 const char *name;
126 unsigned int maxdata;
127};
48f16b6a 128
bee2d6a8 129static struct das6402_boardinfo das6402_boards[] = {
79e5e6ad
HS
130 {
131 .name = "das6402-12",
132 .maxdata = 0x0fff,
133 }, {
134 .name = "das6402-16",
135 .maxdata = 0xffff,
136 },
137};
48f16b6a 138
c7b8bb98 139struct das6402_private {
79e5e6ad 140 unsigned int irq;
79e5e6ad 141 unsigned int ao_range;
c7b8bb98 142};
48f16b6a 143
79e5e6ad
HS
144static void das6402_set_mode(struct comedi_device *dev,
145 unsigned int mode)
71e7271b 146{
79e5e6ad 147 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG);
71e7271b 148}
48f16b6a 149
79e5e6ad
HS
150static void das6402_set_extended(struct comedi_device *dev,
151 unsigned int val)
48f16b6a 152{
79e5e6ad
HS
153 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG);
154 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG);
155 outb(val, dev->iobase + DAS6402_STATUS_REG);
48f16b6a
OS
156}
157
79e5e6ad
HS
158static void das6402_clear_all_interrupts(struct comedi_device *dev)
159{
160 outb(DAS6402_STATUS_W_CLRINT |
161 DAS6402_STATUS_W_CLRXTR |
162 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG);
163}
164
165static void das6402_ai_clear_eoc(struct comedi_device *dev)
166{
167 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG);
168}
169
d1d24cb6
HS
170static unsigned int das6402_ai_read_sample(struct comedi_device *dev,
171 struct comedi_subdevice *s)
172{
173 unsigned int val;
174
175 val = inw(dev->iobase + DAS6402_AI_DATA_REG);
176 if (s->maxdata == 0x0fff)
177 val >>= 4;
178 return val;
179}
180
79e5e6ad
HS
181static irqreturn_t das6402_interrupt(int irq, void *d)
182{
183 struct comedi_device *dev = d;
d1d24cb6
HS
184 struct comedi_subdevice *s = dev->read_subdev;
185 struct comedi_async *async = s->async;
186 struct comedi_cmd *cmd = &async->cmd;
187 unsigned int status;
188
189 status = inb(dev->iobase + DAS6402_STATUS_REG);
190 if ((status & DAS6402_STATUS_INT) == 0)
191 return IRQ_NONE;
192
193 if (status & DAS6402_STATUS_FFULL) {
194 async->events |= COMEDI_CB_OVERFLOW;
195 } else if (status & DAS6402_STATUS_FFNE) {
196 unsigned int val;
197
198 val = das6402_ai_read_sample(dev, s);
199 comedi_buf_write_samples(s, &val, 1);
200
201 if (cmd->stop_src == TRIG_COUNT &&
202 async->scans_done >= cmd->stop_arg)
203 async->events |= COMEDI_CB_EOA;
204 }
79e5e6ad
HS
205
206 das6402_clear_all_interrupts(dev);
48f16b6a 207
d1d24cb6
HS
208 comedi_handle_events(dev, s);
209
48f16b6a
OS
210 return IRQ_HANDLED;
211}
212
3e0a7380
HS
213static void das6402_ai_set_mode(struct comedi_device *dev,
214 struct comedi_subdevice *s,
215 unsigned int chanspec,
216 unsigned int mode)
217{
218 unsigned int range = CR_RANGE(chanspec);
219 unsigned int aref = CR_AREF(chanspec);
220
221 mode |= DAS6402_MODE_RANGE(range);
222 if (aref == AREF_GROUND)
223 mode |= DAS6402_MODE_SE;
224 if (comedi_range_is_unipolar(s, range))
225 mode |= DAS6402_MODE_UNI;
226
227 das6402_set_mode(dev, mode);
228}
229
79e5e6ad
HS
230static int das6402_ai_cmd(struct comedi_device *dev,
231 struct comedi_subdevice *s)
48f16b6a 232{
1fe6a03a
HS
233 struct das6402_private *devpriv = dev->private;
234 struct comedi_cmd *cmd = &s->async->cmd;
235 unsigned int chan_lo = CR_CHAN(cmd->chanlist[0]);
236 unsigned int chan_hi = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
237
238 das6402_ai_set_mode(dev, s, cmd->chanlist[0], DAS6402_MODE_FIFONEPTY);
239
240 /* load the mux for chanlist conversion */
241 outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo),
242 dev->iobase + DAS6402_AI_MUX_REG);
243
ad4808b6
HS
244 comedi_8254_update_divisors(dev->pacer);
245 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
1fe6a03a
HS
246
247 /* enable interrupt and pacer trigger */
248 outb(DAS6402_CTRL_INTE |
249 DAS6402_CTRL_IRQ(devpriv->irq) |
250 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG);
251
252 return 0;
79e5e6ad 253}
48f16b6a 254
594e400a
HS
255static int das6402_ai_check_chanlist(struct comedi_device *dev,
256 struct comedi_subdevice *s,
257 struct comedi_cmd *cmd)
258{
259 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
260 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
261 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
262 int i;
263
264 for (i = 1; i < cmd->chanlist_len; i++) {
265 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
266 unsigned int range = CR_RANGE(cmd->chanlist[i]);
267 unsigned int aref = CR_AREF(cmd->chanlist[i]);
268
269 if (chan != chan0 + i) {
270 dev_dbg(dev->class_dev,
271 "chanlist must be consecutive\n");
272 return -EINVAL;
273 }
274
275 if (range != range0) {
276 dev_dbg(dev->class_dev,
277 "chanlist must have the same range\n");
278 return -EINVAL;
279 }
280
281 if (aref != aref0) {
282 dev_dbg(dev->class_dev,
283 "chanlist must have the same reference\n");
284 return -EINVAL;
285 }
286
287 if (aref0 == AREF_DIFF && chan > (s->n_chan / 2)) {
288 dev_dbg(dev->class_dev,
289 "chanlist differential channel to large\n");
290 return -EINVAL;
291 }
292 }
293 return 0;
294}
295
79e5e6ad
HS
296static int das6402_ai_cmdtest(struct comedi_device *dev,
297 struct comedi_subdevice *s,
298 struct comedi_cmd *cmd)
299{
594e400a
HS
300 int err = 0;
301 unsigned int arg;
302
303 /* Step 1 : check if triggers are trivially valid */
304
e70d6377
IA
305 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
306 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
307 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
308 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
309 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
594e400a
HS
310
311 if (err)
312 return 1;
313
314 /* Step 2a : make sure trigger sources are unique */
315
e70d6377 316 err |= comedi_check_trigger_is_unique(cmd->stop_src);
594e400a
HS
317
318 /* Step 2b : and mutually compatible */
319
320 if (err)
321 return 2;
322
323 /* Step 3: check if arguments are trivially valid */
324
e70d6377
IA
325 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
326 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
327 err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
328 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
329 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
330 cmd->chanlist_len);
594e400a
HS
331
332 if (cmd->stop_src == TRIG_COUNT)
e70d6377 333 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
594e400a 334 else /* TRIG_NONE */
e70d6377 335 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
594e400a
HS
336
337 if (err)
338 return 3;
339
340 /* step 4: fix up any arguments */
341
ad4808b6
HS
342 arg = cmd->convert_arg;
343 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
e70d6377 344 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
594e400a
HS
345
346 if (err)
347 return 4;
348
349 /* Step 5: check channel list if it exists */
350 if (cmd->chanlist && cmd->chanlist_len > 0)
351 err |= das6402_ai_check_chanlist(dev, s, cmd);
352
353 if (err)
354 return 5;
355
356 return 0;
48f16b6a 357}
48f16b6a 358
0a85b6f0
MT
359static int das6402_ai_cancel(struct comedi_device *dev,
360 struct comedi_subdevice *s)
79e5e6ad
HS
361{
362 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
363
364 return 0;
365}
366
367static void das6402_ai_soft_trig(struct comedi_device *dev)
368{
369 outw(0, dev->iobase + DAS6402_AI_DATA_REG);
370}
371
372static int das6402_ai_eoc(struct comedi_device *dev,
373 struct comedi_subdevice *s,
374 struct comedi_insn *insn,
375 unsigned long context)
376{
377 unsigned int status;
378
379 status = inb(dev->iobase + DAS6402_STATUS_REG);
380 if (status & DAS6402_STATUS_FFNE)
381 return 0;
382 return -EBUSY;
383}
384
385static int das6402_ai_insn_read(struct comedi_device *dev,
386 struct comedi_subdevice *s,
387 struct comedi_insn *insn,
388 unsigned int *data)
389{
390 unsigned int chan = CR_CHAN(insn->chanspec);
79e5e6ad 391 unsigned int aref = CR_AREF(insn->chanspec);
79e5e6ad
HS
392 int ret;
393 int i;
394
3e0a7380
HS
395 if (aref == AREF_DIFF && chan > (s->n_chan / 2))
396 return -EINVAL;
79e5e6ad
HS
397
398 /* enable software conversion trigger */
399 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
400
3e0a7380 401 das6402_ai_set_mode(dev, s, insn->chanspec, DAS6402_MODE_POLLED);
79e5e6ad
HS
402
403 /* load the mux for single channel conversion */
404 outw(DAS6402_AI_MUX_HI(chan) | DAS6402_AI_MUX_LO(chan),
405 dev->iobase + DAS6402_AI_MUX_REG);
406
407 for (i = 0; i < insn->n; i++) {
408 das6402_ai_clear_eoc(dev);
409 das6402_ai_soft_trig(dev);
410
411 ret = comedi_timeout(dev, s, insn, das6402_ai_eoc, 0);
412 if (ret)
413 break;
414
d1d24cb6 415 data[i] = das6402_ai_read_sample(dev, s);
79e5e6ad
HS
416 }
417
418 das6402_ai_clear_eoc(dev);
419
420 return insn->n;
421}
422
423static int das6402_ao_insn_write(struct comedi_device *dev,
424 struct comedi_subdevice *s,
425 struct comedi_insn *insn,
426 unsigned int *data)
48f16b6a 427{
9a1a6cf8 428 struct das6402_private *devpriv = dev->private;
79e5e6ad
HS
429 unsigned int chan = CR_CHAN(insn->chanspec);
430 unsigned int range = CR_RANGE(insn->chanspec);
431 unsigned int val;
432 int i;
433
434 /* set the range for this channel */
435 val = devpriv->ao_range;
436 val &= ~DAS6402_AO_RANGE_MASK(chan);
437 val |= DAS6402_AO_RANGE(chan, range);
438 if (val != devpriv->ao_range) {
439 devpriv->ao_range = val;
440 outb(val, dev->iobase + DAS6402_TRIG_REG);
441 }
9a1a6cf8 442
48f16b6a 443 /*
79e5e6ad
HS
444 * The DAS6402/16 has a jumper to select either individual
445 * update (UPDATE) or simultaneous updating (XFER) of both
446 * DAC's. In UPDATE mode, when the MSB is written, that DAC
447 * is updated. In XFER mode, after both DAC's are loaded,
448 * a read cycle of any DAC register will update both DAC's
449 * simultaneously.
450 *
451 * If you have XFER mode enabled a (*insn_read) will need
452 * to be performed in order to update the DAC's with the
453 * last value written.
48f16b6a 454 */
79e5e6ad
HS
455 for (i = 0; i < insn->n; i++) {
456 val = data[i];
457
3dd0b514 458 s->readback[chan] = val;
79e5e6ad
HS
459
460 if (s->maxdata == 0x0fff) {
461 /*
462 * DAS6402/12 has the two 8-bit DAC registers, left
463 * justified (the 4 LSB bits are don't care). Data
464 * can be written as one word.
465 */
466 val <<= 4;
467 outw(val, dev->iobase + DAS6402_AO_DATA_REG(chan));
468 } else {
469 /*
470 * DAS6402/16 uses both 8-bit DAC registers and needs
471 * to be written LSB then MSB.
472 */
473 outb(val & 0xff,
474 dev->iobase + DAS6402_AO_LSB_REG(chan));
475 outb((val >> 8) & 0xff,
476 dev->iobase + DAS6402_AO_LSB_REG(chan));
477 }
478 }
48f16b6a 479
79e5e6ad 480 return insn->n;
48f16b6a
OS
481}
482
79e5e6ad
HS
483static int das6402_ao_insn_read(struct comedi_device *dev,
484 struct comedi_subdevice *s,
485 struct comedi_insn *insn,
486 unsigned int *data)
48f16b6a 487{
79e5e6ad 488 unsigned int chan = CR_CHAN(insn->chanspec);
9a1a6cf8 489
79e5e6ad
HS
490 /*
491 * If XFER mode is enabled, reading any DAC register
492 * will update both DAC's simultaneously.
493 */
494 inw(dev->iobase + DAS6402_AO_LSB_REG(chan));
48f16b6a 495
3dd0b514 496 return comedi_readback_insn_read(dev, s, insn, data);
79e5e6ad 497}
48f16b6a 498
79e5e6ad
HS
499static int das6402_di_insn_bits(struct comedi_device *dev,
500 struct comedi_subdevice *s,
501 struct comedi_insn *insn,
502 unsigned int *data)
503{
504 data[1] = inb(dev->iobase + DAS6402_DI_DO_REG);
48f16b6a 505
79e5e6ad 506 return insn->n;
48f16b6a 507}
48f16b6a 508
79e5e6ad
HS
509static int das6402_do_insn_bits(struct comedi_device *dev,
510 struct comedi_subdevice *s,
511 struct comedi_insn *insn,
512 unsigned int *data)
48f16b6a 513{
79e5e6ad
HS
514 if (comedi_dio_update_state(s, data))
515 outb(s->state, dev->iobase + DAS6402_DI_DO_REG);
48f16b6a 516
79e5e6ad 517 data[1] = s->state;
48f16b6a 518
79e5e6ad
HS
519 return insn->n;
520}
48f16b6a 521
79e5e6ad
HS
522static void das6402_reset(struct comedi_device *dev)
523{
524 struct das6402_private *devpriv = dev->private;
48f16b6a 525
79e5e6ad
HS
526 /* enable "Enhanced" mode */
527 outb(DAS6402_MODE_ENHANCED, dev->iobase + DAS6402_MODE_REG);
48f16b6a 528
79e5e6ad
HS
529 /* enable 10MHz pacer clock */
530 das6402_set_extended(dev, DAS6402_STATUS_W_10MHZ);
48f16b6a 531
79e5e6ad
HS
532 /* enable software conversion trigger */
533 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
48f16b6a 534
79e5e6ad
HS
535 /* default ADC to single-ended unipolar 10V inputs */
536 das6402_set_mode(dev, DAS6402_MODE_RANGE(0) |
537 DAS6402_MODE_POLLED |
538 DAS6402_MODE_SE |
539 DAS6402_MODE_UNI);
48f16b6a 540
79e5e6ad
HS
541 /* default mux for single channel conversion (channel 0) */
542 outw(DAS6402_AI_MUX_HI(0) | DAS6402_AI_MUX_LO(0),
543 dev->iobase + DAS6402_AI_MUX_REG);
48f16b6a 544
79e5e6ad
HS
545 /* set both DAC's for unipolar 5V output range */
546 devpriv->ao_range = DAS6402_AO_RANGE(0, 2) | DAS6402_AO_RANGE(1, 2);
547 outb(devpriv->ao_range, dev->iobase + DAS6402_TRIG_REG);
48f16b6a 548
79e5e6ad
HS
549 /* set both DAC's to 0V */
550 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
551 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
552 inw(dev->iobase + DAS6402_AO_LSB_REG(0));
48f16b6a 553
79e5e6ad
HS
554 /* set all digital outputs low */
555 outb(0, dev->iobase + DAS6402_DI_DO_REG);
556
557 das6402_clear_all_interrupts(dev);
48f16b6a
OS
558}
559
0a85b6f0
MT
560static int das6402_attach(struct comedi_device *dev,
561 struct comedi_devconfig *it)
48f16b6a 562{
19924ce0 563 const struct das6402_boardinfo *board = dev->board_ptr;
9a1a6cf8 564 struct das6402_private *devpriv;
34c43922 565 struct comedi_subdevice *s;
79e5e6ad 566 int ret;
9a1a6cf8 567
0bdab509 568 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
c34fa261
HS
569 if (!devpriv)
570 return -ENOMEM;
48f16b6a 571
79e5e6ad 572 ret = comedi_request_region(dev, it->options[0], 0x10);
8b6c5694 573 if (ret)
48f16b6a
OS
574 return ret;
575
79e5e6ad
HS
576 das6402_reset(dev);
577
578 /* IRQs 2,3,5,6,7, 10,11,15 are valid for "enhanced" mode */
579 if ((1 << it->options[1]) & 0x8cec) {
580 ret = request_irq(it->options[1], das6402_interrupt, 0,
581 dev->board_name, dev);
582 if (ret == 0) {
583 dev->irq = it->options[1];
584
585 switch (dev->irq) {
586 case 10:
587 devpriv->irq = 4;
588 break;
589 case 11:
590 devpriv->irq = 1;
591 break;
592 case 15:
593 devpriv->irq = 6;
594 break;
595 default:
596 devpriv->irq = dev->irq;
597 break;
598 }
599 }
600 }
601
ad4808b6
HS
602 dev->pacer = comedi_8254_init(dev->iobase + DAS6402_TIMER_BASE,
603 I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
604 if (!dev->pacer)
605 return -ENOMEM;
606
79e5e6ad
HS
607 ret = comedi_alloc_subdevices(dev, 4);
608 if (ret)
609 return ret;
610
611 /* Analog Input subdevice */
92cfef5d 612 s = &dev->subdevices[0];
79e5e6ad
HS
613 s->type = COMEDI_SUBD_AI;
614 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
615 s->n_chan = 64;
616 s->maxdata = board->maxdata;
617 s->range_table = &das6402_ai_ranges;
618 s->insn_read = das6402_ai_insn_read;
619 if (dev->irq) {
620 dev->read_subdev = s;
621 s->subdev_flags |= SDF_CMD_READ;
622 s->len_chanlist = s->n_chan;
623 s->do_cmdtest = das6402_ai_cmdtest;
624 s->do_cmd = das6402_ai_cmd;
625 s->cancel = das6402_ai_cancel;
626 }
48f16b6a 627
79e5e6ad
HS
628 /* Analog Output subdevice */
629 s = &dev->subdevices[1];
630 s->type = COMEDI_SUBD_AO;
ef49d832 631 s->subdev_flags = SDF_WRITABLE;
79e5e6ad
HS
632 s->n_chan = 2;
633 s->maxdata = board->maxdata;
634 s->range_table = &das6402_ao_ranges;
635 s->insn_write = das6402_ao_insn_write;
636 s->insn_read = das6402_ao_insn_read;
637
3dd0b514
HS
638 ret = comedi_alloc_subdev_readback(s);
639 if (ret)
640 return ret;
641
79e5e6ad
HS
642 /* Digital Input subdevice */
643 s = &dev->subdevices[2];
644 s->type = COMEDI_SUBD_DI;
645 s->subdev_flags = SDF_READABLE;
646 s->n_chan = 8;
647 s->maxdata = 1;
648 s->range_table = &range_digital;
649 s->insn_bits = das6402_di_insn_bits;
650
651 /* Digital Input subdevice */
652 s = &dev->subdevices[3];
653 s->type = COMEDI_SUBD_DO;
ef49d832 654 s->subdev_flags = SDF_WRITABLE;
79e5e6ad
HS
655 s->n_chan = 8;
656 s->maxdata = 1;
657 s->range_table = &range_digital;
658 s->insn_bits = das6402_do_insn_bits;
48f16b6a
OS
659
660 return 0;
661}
90f703d3 662
71e7271b
HS
663static struct comedi_driver das6402_driver = {
664 .driver_name = "das6402",
665 .module = THIS_MODULE,
666 .attach = das6402_attach,
3d1fe3f7 667 .detach = comedi_legacy_detach,
79e5e6ad
HS
668 .board_name = &das6402_boards[0].name,
669 .num_names = ARRAY_SIZE(das6402_boards),
670 .offset = sizeof(struct das6402_boardinfo),
71e7271b
HS
671};
672module_comedi_driver(das6402_driver)
673
79e5e6ad
HS
674MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
675MODULE_DESCRIPTION("Comedi driver for DAS6402 compatible boards");
90f703d3 676MODULE_LICENSE("GPL");