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Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / staging / comedi / drivers / das6402.c
CommitLineData
48f16b6a 1/*
79e5e6ad
HS		 2 * das6402.c
3 * Comedi driver for DAS6402 compatible boards
4 * Copyright(c) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
5 *
6 * Rewrite of an experimental driver by:
7 * Copyright (C) 1999 Oystein Svendsen <svendsen@pvv.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
48f16b6a
OS		 18 */
19
20/*
79e5e6ad
HS		 21 * Driver: das6402
22 * Description: Keithley Metrabyte DAS6402 (& compatibles)
d21f819c
IA		 23 * Devices: [Keithley Metrabyte] DAS6402-12 (das6402-12),
24 * DAS6402-16 (das6402-16)
79e5e6ad
HS		 25 * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
26 * Updated: Fri, 14 Mar 2014 10:18:43 -0700
27 * Status: unknown
28 *
29 * Configuration Options:
30 * [0] - I/O base address
31 * [1] - IRQ (optional, needed for async command support)
32 */
48f16b6a 33
79e5e6ad
HS		 34#include <linux/module.h>
35#include <linux/interrupt.h>
48f16b6a 36
79e5e6ad 37#include "../comedidev.h"
ad4808b6 38
ad4808b6 39#include "comedi_8254.h"
48f16b6a 40
48f16b6a 41/*
79e5e6ad
HS		 42 * Register I/O map
43 */
44#define DAS6402_AI_DATA_REG 0x00
45#define DAS6402_AI_MUX_REG 0x02
46#define DAS6402_AI_MUX_LO(x) (((x) & 0x3f) << 0)
47#define DAS6402_AI_MUX_HI(x) (((x) & 0x3f) << 8)
48#define DAS6402_DI_DO_REG 0x03
49#define DAS6402_AO_DATA_REG(x) (0x04 + ((x) * 2))
50#define DAS6402_AO_LSB_REG(x) (0x04 + ((x) * 2))
51#define DAS6402_AO_MSB_REG(x) (0x05 + ((x) * 2))
52#define DAS6402_STATUS_REG 0x08
2c81ab43
RKM		 53#define DAS6402_STATUS_FFNE BIT(0)
54#define DAS6402_STATUS_FHALF BIT(1)
55#define DAS6402_STATUS_FFULL BIT(2)
56#define DAS6402_STATUS_XINT BIT(3)
57#define DAS6402_STATUS_INT BIT(4)
58#define DAS6402_STATUS_XTRIG BIT(5)
59#define DAS6402_STATUS_INDGT BIT(6)
60#define DAS6402_STATUS_10MHZ BIT(7)
61#define DAS6402_STATUS_W_CLRINT BIT(0)
62#define DAS6402_STATUS_W_CLRXTR BIT(1)
63#define DAS6402_STATUS_W_CLRXIN BIT(2)
64#define DAS6402_STATUS_W_EXTEND BIT(4)
65#define DAS6402_STATUS_W_ARMED BIT(5)
66#define DAS6402_STATUS_W_POSTMODE BIT(6)
67#define DAS6402_STATUS_W_10MHZ BIT(7)
79e5e6ad 68#define DAS6402_CTRL_REG 0x09
2c81ab43
RKM		 69#define DAS6402_CTRL_TRIG(x) ((x) << 0)
70#define DAS6402_CTRL_SOFT_TRIG DAS6402_CTRL_TRIG(0)
71#define DAS6402_CTRL_EXT_FALL_TRIG DAS6402_CTRL_TRIG(1)
72#define DAS6402_CTRL_EXT_RISE_TRIG DAS6402_CTRL_TRIG(2)
73#define DAS6402_CTRL_PACER_TRIG DAS6402_CTRL_TRIG(3)
74#define DAS6402_CTRL_BURSTEN BIT(2)
75#define DAS6402_CTRL_XINTE BIT(3)
79e5e6ad 76#define DAS6402_CTRL_IRQ(x) ((x) << 4)
2c81ab43 77#define DAS6402_CTRL_INTE BIT(7)
79e5e6ad 78#define DAS6402_TRIG_REG 0x0a
2c81ab43
RKM		 79#define DAS6402_TRIG_TGEN BIT(0)
80#define DAS6402_TRIG_TGSEL BIT(1)
81#define DAS6402_TRIG_TGPOL BIT(2)
82#define DAS6402_TRIG_PRETRIG BIT(3)
79e5e6ad
HS		 83#define DAS6402_AO_RANGE(_chan, _range) ((_range) << ((_chan) ? 6 : 4))
84#define DAS6402_AO_RANGE_MASK(_chan) (3 << ((_chan) ? 6 : 4))
85#define DAS6402_MODE_REG 0x0b
2c81ab43
RKM		 86#define DAS6402_MODE_RANGE(x) ((x) << 2)
87#define DAS6402_MODE_POLLED DAS6402_MODE_RANGE(0)
88#define DAS6402_MODE_FIFONEPTY DAS6402_MODE_RANGE(1)
89#define DAS6402_MODE_FIFOHFULL DAS6402_MODE_RANGE(2)
90#define DAS6402_MODE_EOB DAS6402_MODE_RANGE(3)
91#define DAS6402_MODE_ENHANCED BIT(4)
92#define DAS6402_MODE_SE BIT(5)
93#define DAS6402_MODE_UNI BIT(6)
94#define DAS6402_MODE_DMA(x) ((x) << 7)
95#define DAS6402_MODE_DMA1 DAS6402_MODE_DMA(0)
96#define DAS6402_MODE_DMA3 DAS6402_MODE_DMA(1)
79e5e6ad
HS		 97#define DAS6402_TIMER_BASE 0x0c
98
99static const struct comedi_lrange das6402_ai_ranges = {
100 8, {
101 BIP_RANGE(10),
102 BIP_RANGE(5),
103 BIP_RANGE(2.5),
104 BIP_RANGE(1.25),
105 UNI_RANGE(10),
106 UNI_RANGE(5),
107 UNI_RANGE(2.5),
108 UNI_RANGE(1.25)
109 }
110};
48f16b6a 111
79e5e6ad
HS		 112/*
113 * Analog output ranges are programmable on the DAS6402/12.
114 * For the DAS6402/16 the range bits have no function, the
115 * DAC ranges are selected by switches on the board.
116 */
117static const struct comedi_lrange das6402_ao_ranges = {
118 4, {
119 BIP_RANGE(5),
120 BIP_RANGE(10),
121 UNI_RANGE(5),
122 UNI_RANGE(10)
123 }
124};
48f16b6a 125
79e5e6ad
HS		 126struct das6402_boardinfo {
127 const char *name;
128 unsigned int maxdata;
129};
48f16b6a 130
bee2d6a8 131static struct das6402_boardinfo das6402_boards[] = {
79e5e6ad
HS		 132 {
133 .name = "das6402-12",
134 .maxdata = 0x0fff,
135 }, {
136 .name = "das6402-16",
137 .maxdata = 0xffff,
138 },
139};
48f16b6a 140
c7b8bb98 141struct das6402_private {
79e5e6ad 142 unsigned int irq;
79e5e6ad 143 unsigned int ao_range;
c7b8bb98 144};
48f16b6a 145
79e5e6ad
HS		 146static void das6402_set_mode(struct comedi_device *dev,
147 unsigned int mode)
71e7271b 148{
79e5e6ad 149 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG);
71e7271b 150}
48f16b6a 151
79e5e6ad
HS		 152static void das6402_set_extended(struct comedi_device *dev,
153 unsigned int val)
48f16b6a 154{
79e5e6ad
HS		 155 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG);
156 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG);
157 outb(val, dev->iobase + DAS6402_STATUS_REG);
48f16b6a
OS		 158}
159
79e5e6ad
HS		 160static void das6402_clear_all_interrupts(struct comedi_device *dev)
161{
162 outb(DAS6402_STATUS_W_CLRINT |
163 DAS6402_STATUS_W_CLRXTR |
164 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG);
165}
166
167static void das6402_ai_clear_eoc(struct comedi_device *dev)
168{
169 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG);
170}
171
d1d24cb6
HS		 172static unsigned int das6402_ai_read_sample(struct comedi_device *dev,
173 struct comedi_subdevice *s)
174{
175 unsigned int val;
176
177 val = inw(dev->iobase + DAS6402_AI_DATA_REG);
178 if (s->maxdata == 0x0fff)
179 val >>= 4;
180 return val;
181}
182
79e5e6ad
HS		 183static irqreturn_t das6402_interrupt(int irq, void *d)
184{
185 struct comedi_device *dev = d;
d1d24cb6
HS		 186 struct comedi_subdevice *s = dev->read_subdev;
187 struct comedi_async *async = s->async;
188 struct comedi_cmd *cmd = &async->cmd;
189 unsigned int status;
190
191 status = inb(dev->iobase + DAS6402_STATUS_REG);
192 if ((status & DAS6402_STATUS_INT) == 0)
193 return IRQ_NONE;
194
195 if (status & DAS6402_STATUS_FFULL) {
196 async->events |= COMEDI_CB_OVERFLOW;
197 } else if (status & DAS6402_STATUS_FFNE) {
198 unsigned int val;
199
200 val = das6402_ai_read_sample(dev, s);
201 comedi_buf_write_samples(s, &val, 1);
202
203 if (cmd->stop_src == TRIG_COUNT &&
204 async->scans_done >= cmd->stop_arg)
205 async->events |= COMEDI_CB_EOA;
206 }
79e5e6ad
HS		 207
208 das6402_clear_all_interrupts(dev);
48f16b6a 209
d1d24cb6
HS		 210 comedi_handle_events(dev, s);
211
48f16b6a
OS		 212 return IRQ_HANDLED;
213}
214
3e0a7380
HS		 215static void das6402_ai_set_mode(struct comedi_device *dev,
216 struct comedi_subdevice *s,
217 unsigned int chanspec,
218 unsigned int mode)
219{
220 unsigned int range = CR_RANGE(chanspec);
221 unsigned int aref = CR_AREF(chanspec);
222
223 mode |= DAS6402_MODE_RANGE(range);
224 if (aref == AREF_GROUND)
225 mode |= DAS6402_MODE_SE;
226 if (comedi_range_is_unipolar(s, range))
227 mode |= DAS6402_MODE_UNI;
228
229 das6402_set_mode(dev, mode);
230}
231
79e5e6ad
HS		 232static int das6402_ai_cmd(struct comedi_device *dev,
233 struct comedi_subdevice *s)
48f16b6a 234{
1fe6a03a
HS		 235 struct das6402_private *devpriv = dev->private;
236 struct comedi_cmd *cmd = &s->async->cmd;
237 unsigned int chan_lo = CR_CHAN(cmd->chanlist[0]);
238 unsigned int chan_hi = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
239
240 das6402_ai_set_mode(dev, s, cmd->chanlist[0], DAS6402_MODE_FIFONEPTY);
241
242 /* load the mux for chanlist conversion */
243 outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo),
244 dev->iobase + DAS6402_AI_MUX_REG);
245
ad4808b6
HS		 246 comedi_8254_update_divisors(dev->pacer);
247 comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
1fe6a03a
HS		 248
249 /* enable interrupt and pacer trigger */
250 outb(DAS6402_CTRL_INTE |
251 DAS6402_CTRL_IRQ(devpriv->irq) |
252 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG);
253
254 return 0;
79e5e6ad 255}
48f16b6a 256
594e400a
HS		 257static int das6402_ai_check_chanlist(struct comedi_device *dev,
258 struct comedi_subdevice *s,
259 struct comedi_cmd *cmd)
260{
261 unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
262 unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
263 unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
264 int i;
265
266 for (i = 1; i < cmd->chanlist_len; i++) {
267 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
268 unsigned int range = CR_RANGE(cmd->chanlist[i]);
269 unsigned int aref = CR_AREF(cmd->chanlist[i]);
270
271 if (chan != chan0 + i) {
272 dev_dbg(dev->class_dev,
273 "chanlist must be consecutive\n");
274 return -EINVAL;
275 }
276
277 if (range != range0) {
278 dev_dbg(dev->class_dev,
279 "chanlist must have the same range\n");
280 return -EINVAL;
281 }
282
283 if (aref != aref0) {
284 dev_dbg(dev->class_dev,
285 "chanlist must have the same reference\n");
286 return -EINVAL;
287 }
288
289 if (aref0 == AREF_DIFF && chan > (s->n_chan / 2)) {
290 dev_dbg(dev->class_dev,
291 "chanlist differential channel to large\n");
292 return -EINVAL;
293 }
294 }
295 return 0;
296}
297
79e5e6ad
HS		 298static int das6402_ai_cmdtest(struct comedi_device *dev,
299 struct comedi_subdevice *s,
300 struct comedi_cmd *cmd)
301{
594e400a
HS		 302 int err = 0;
303 unsigned int arg;
304
305 /* Step 1 : check if triggers are trivially valid */
306
e70d6377
IA		 307 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW);
308 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_FOLLOW);
309 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_TIMER);
310 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
311 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
594e400a
HS		 312
313 if (err)
314 return 1;
315
316 /* Step 2a : make sure trigger sources are unique */
317
e70d6377 318 err |= comedi_check_trigger_is_unique(cmd->stop_src);
594e400a
HS		 319
320 /* Step 2b : and mutually compatible */
321
322 if (err)
323 return 2;
324
325 /* Step 3: check if arguments are trivially valid */
326
e70d6377
IA		 327 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0);
328 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
329 err |= comedi_check_trigger_arg_min(&cmd->convert_arg, 10000);
330 err |= comedi_check_trigger_arg_min(&cmd->chanlist_len, 1);
331 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg,
332 cmd->chanlist_len);
594e400a
HS		 333
334 if (cmd->stop_src == TRIG_COUNT)
e70d6377 335 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1);
594e400a 336 else /* TRIG_NONE */
e70d6377 337 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0);
594e400a
HS		 338
339 if (err)
340 return 3;
341
342 /* step 4: fix up any arguments */
343
ad4808b6
HS		 344 arg = cmd->convert_arg;
345 comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
e70d6377 346 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, arg);
594e400a
HS		 347
348 if (err)
349 return 4;
350
351 /* Step 5: check channel list if it exists */
352 if (cmd->chanlist && cmd->chanlist_len > 0)
353 err |= das6402_ai_check_chanlist(dev, s, cmd);
354
355 if (err)
356 return 5;
357
358 return 0;
48f16b6a 359}
48f16b6a 360
0a85b6f0
MT		 361static int das6402_ai_cancel(struct comedi_device *dev,
362 struct comedi_subdevice *s)
79e5e6ad
HS		 363{
364 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
365
366 return 0;
367}
368
369static void das6402_ai_soft_trig(struct comedi_device *dev)
370{
371 outw(0, dev->iobase + DAS6402_AI_DATA_REG);
372}
373
374static int das6402_ai_eoc(struct comedi_device *dev,
375 struct comedi_subdevice *s,
376 struct comedi_insn *insn,
377 unsigned long context)
378{
379 unsigned int status;
380
381 status = inb(dev->iobase + DAS6402_STATUS_REG);
382 if (status & DAS6402_STATUS_FFNE)
383 return 0;
384 return -EBUSY;
385}
386
387static int das6402_ai_insn_read(struct comedi_device *dev,
388 struct comedi_subdevice *s,
389 struct comedi_insn *insn,
390 unsigned int *data)
391{
392 unsigned int chan = CR_CHAN(insn->chanspec);
79e5e6ad 393 unsigned int aref = CR_AREF(insn->chanspec);
79e5e6ad
HS		 394 int ret;
395 int i;
396
3e0a7380
HS		 397 if (aref == AREF_DIFF && chan > (s->n_chan / 2))
398 return -EINVAL;
79e5e6ad
HS		 399
400 /* enable software conversion trigger */
401 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
402
3e0a7380 403 das6402_ai_set_mode(dev, s, insn->chanspec, DAS6402_MODE_POLLED);
79e5e6ad
HS		 404
405 /* load the mux for single channel conversion */
406 outw(DAS6402_AI_MUX_HI(chan) | DAS6402_AI_MUX_LO(chan),
407 dev->iobase + DAS6402_AI_MUX_REG);
408
409 for (i = 0; i < insn->n; i++) {
410 das6402_ai_clear_eoc(dev);
411 das6402_ai_soft_trig(dev);
412
413 ret = comedi_timeout(dev, s, insn, das6402_ai_eoc, 0);
414 if (ret)
415 break;
416
d1d24cb6 417 data[i] = das6402_ai_read_sample(dev, s);
79e5e6ad
HS		 418 }
419
420 das6402_ai_clear_eoc(dev);
421
422 return insn->n;
423}
424
425static int das6402_ao_insn_write(struct comedi_device *dev,
426 struct comedi_subdevice *s,
427 struct comedi_insn *insn,
428 unsigned int *data)
48f16b6a 429{
9a1a6cf8 430 struct das6402_private *devpriv = dev->private;
79e5e6ad
HS		 431 unsigned int chan = CR_CHAN(insn->chanspec);
432 unsigned int range = CR_RANGE(insn->chanspec);
433 unsigned int val;
434 int i;
435
436 /* set the range for this channel */
437 val = devpriv->ao_range;
438 val &= ~DAS6402_AO_RANGE_MASK(chan);
439 val |= DAS6402_AO_RANGE(chan, range);
440 if (val != devpriv->ao_range) {
441 devpriv->ao_range = val;
442 outb(val, dev->iobase + DAS6402_TRIG_REG);
443 }
9a1a6cf8 444
48f16b6a 445 /*
79e5e6ad
HS		 446 * The DAS6402/16 has a jumper to select either individual
447 * update (UPDATE) or simultaneous updating (XFER) of both
448 * DAC's. In UPDATE mode, when the MSB is written, that DAC
449 * is updated. In XFER mode, after both DAC's are loaded,
450 * a read cycle of any DAC register will update both DAC's
451 * simultaneously.
452 *
453 * If you have XFER mode enabled a (*insn_read) will need
454 * to be performed in order to update the DAC's with the
455 * last value written.
48f16b6a 456 */
79e5e6ad
HS		 457 for (i = 0; i < insn->n; i++) {
458 val = data[i];
459
3dd0b514 460 s->readback[chan] = val;
79e5e6ad
HS		 461
462 if (s->maxdata == 0x0fff) {
463 /*
464 * DAS6402/12 has the two 8-bit DAC registers, left
465 * justified (the 4 LSB bits are don't care). Data
466 * can be written as one word.
467 */
468 val <<= 4;
469 outw(val, dev->iobase + DAS6402_AO_DATA_REG(chan));
470 } else {
471 /*
472 * DAS6402/16 uses both 8-bit DAC registers and needs
473 * to be written LSB then MSB.
474 */
475 outb(val & 0xff,
476 dev->iobase + DAS6402_AO_LSB_REG(chan));
477 outb((val >> 8) & 0xff,
478 dev->iobase + DAS6402_AO_LSB_REG(chan));
479 }
480 }
48f16b6a 481
79e5e6ad 482 return insn->n;
48f16b6a
OS		 483}
484
79e5e6ad
HS		 485static int das6402_ao_insn_read(struct comedi_device *dev,
486 struct comedi_subdevice *s,
487 struct comedi_insn *insn,
488 unsigned int *data)
48f16b6a 489{
79e5e6ad 490 unsigned int chan = CR_CHAN(insn->chanspec);
9a1a6cf8 491
79e5e6ad
HS		 492 /*
493 * If XFER mode is enabled, reading any DAC register
494 * will update both DAC's simultaneously.
495 */
496 inw(dev->iobase + DAS6402_AO_LSB_REG(chan));
48f16b6a 497
3dd0b514 498 return comedi_readback_insn_read(dev, s, insn, data);
79e5e6ad 499}
48f16b6a 500
79e5e6ad
HS		 501static int das6402_di_insn_bits(struct comedi_device *dev,
502 struct comedi_subdevice *s,
503 struct comedi_insn *insn,
504 unsigned int *data)
505{
506 data[1] = inb(dev->iobase + DAS6402_DI_DO_REG);
48f16b6a 507
79e5e6ad 508 return insn->n;
48f16b6a 509}
48f16b6a 510
79e5e6ad
HS		 511static int das6402_do_insn_bits(struct comedi_device *dev,
512 struct comedi_subdevice *s,
513 struct comedi_insn *insn,
514 unsigned int *data)
48f16b6a 515{
79e5e6ad
HS		 516 if (comedi_dio_update_state(s, data))
517 outb(s->state, dev->iobase + DAS6402_DI_DO_REG);
48f16b6a 518
79e5e6ad 519 data[1] = s->state;
48f16b6a 520
79e5e6ad
HS		 521 return insn->n;
522}
48f16b6a 523
79e5e6ad
HS		 524static void das6402_reset(struct comedi_device *dev)
525{
526 struct das6402_private *devpriv = dev->private;
48f16b6a 527
79e5e6ad
HS		 528 /* enable "Enhanced" mode */
529 outb(DAS6402_MODE_ENHANCED, dev->iobase + DAS6402_MODE_REG);
48f16b6a 530
79e5e6ad
HS		 531 /* enable 10MHz pacer clock */
532 das6402_set_extended(dev, DAS6402_STATUS_W_10MHZ);
48f16b6a 533
79e5e6ad
HS		 534 /* enable software conversion trigger */
535 outb(DAS6402_CTRL_SOFT_TRIG, dev->iobase + DAS6402_CTRL_REG);
48f16b6a 536
79e5e6ad
HS		 537 /* default ADC to single-ended unipolar 10V inputs */
538 das6402_set_mode(dev, DAS6402_MODE_RANGE(0) |
539 DAS6402_MODE_POLLED |
540 DAS6402_MODE_SE |
541 DAS6402_MODE_UNI);
48f16b6a 542
79e5e6ad
HS		 543 /* default mux for single channel conversion (channel 0) */
544 outw(DAS6402_AI_MUX_HI(0) | DAS6402_AI_MUX_LO(0),
545 dev->iobase + DAS6402_AI_MUX_REG);
48f16b6a 546
79e5e6ad
HS		 547 /* set both DAC's for unipolar 5V output range */
548 devpriv->ao_range = DAS6402_AO_RANGE(0, 2) | DAS6402_AO_RANGE(1, 2);
549 outb(devpriv->ao_range, dev->iobase + DAS6402_TRIG_REG);
48f16b6a 550
79e5e6ad
HS		 551 /* set both DAC's to 0V */
552 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
553 outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
554 inw(dev->iobase + DAS6402_AO_LSB_REG(0));
48f16b6a 555
79e5e6ad
HS		 556 /* set all digital outputs low */
557 outb(0, dev->iobase + DAS6402_DI_DO_REG);
558
559 das6402_clear_all_interrupts(dev);
48f16b6a
OS		 560}
561
0a85b6f0
MT		 562static int das6402_attach(struct comedi_device *dev,
563 struct comedi_devconfig *it)
48f16b6a 564{
19924ce0 565 const struct das6402_boardinfo *board = dev->board_ptr;
9a1a6cf8 566 struct das6402_private *devpriv;
34c43922 567 struct comedi_subdevice *s;
79e5e6ad 568 int ret;
9a1a6cf8 569
0bdab509 570 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
c34fa261
HS		 571 if (!devpriv)
572 return -ENOMEM;
48f16b6a 573
79e5e6ad 574 ret = comedi_request_region(dev, it->options[0], 0x10);
8b6c5694 575 if (ret)
48f16b6a
OS		 576 return ret;
577
79e5e6ad
HS		 578 das6402_reset(dev);
579
580 /* IRQs 2,3,5,6,7, 10,11,15 are valid for "enhanced" mode */
581 if ((1 << it->options[1]) & 0x8cec) {
582 ret = request_irq(it->options[1], das6402_interrupt, 0,
583 dev->board_name, dev);
584 if (ret == 0) {
585 dev->irq = it->options[1];
586
587 switch (dev->irq) {
588 case 10:
589 devpriv->irq = 4;
590 break;
591 case 11:
592 devpriv->irq = 1;
593 break;
594 case 15:
595 devpriv->irq = 6;
596 break;
597 default:
598 devpriv->irq = dev->irq;
599 break;
600 }
601 }
602 }
603
ad4808b6
HS		 604 dev->pacer = comedi_8254_init(dev->iobase + DAS6402_TIMER_BASE,
605 I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
606 if (!dev->pacer)
607 return -ENOMEM;
608
79e5e6ad
HS		 609 ret = comedi_alloc_subdevices(dev, 4);
610 if (ret)
611 return ret;
612
613 /* Analog Input subdevice */
92cfef5d 614 s = &dev->subdevices[0];
79e5e6ad
HS		 615 s->type = COMEDI_SUBD_AI;
616 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
617 s->n_chan = 64;
618 s->maxdata = board->maxdata;
619 s->range_table = &das6402_ai_ranges;
620 s->insn_read = das6402_ai_insn_read;
621 if (dev->irq) {
622 dev->read_subdev = s;
623 s->subdev_flags |= SDF_CMD_READ;
624 s->len_chanlist = s->n_chan;
625 s->do_cmdtest = das6402_ai_cmdtest;
626 s->do_cmd = das6402_ai_cmd;
627 s->cancel = das6402_ai_cancel;
628 }
48f16b6a 629
79e5e6ad
HS		 630 /* Analog Output subdevice */
631 s = &dev->subdevices[1];
632 s->type = COMEDI_SUBD_AO;
ef49d832 633 s->subdev_flags = SDF_WRITABLE;
79e5e6ad
HS		 634 s->n_chan = 2;
635 s->maxdata = board->maxdata;
636 s->range_table = &das6402_ao_ranges;
637 s->insn_write = das6402_ao_insn_write;
638 s->insn_read = das6402_ao_insn_read;
639
3dd0b514
HS		 640 ret = comedi_alloc_subdev_readback(s);
641 if (ret)
642 return ret;
643
79e5e6ad
HS		 644 /* Digital Input subdevice */
645 s = &dev->subdevices[2];
646 s->type = COMEDI_SUBD_DI;
647 s->subdev_flags = SDF_READABLE;
648 s->n_chan = 8;
649 s->maxdata = 1;
650 s->range_table = &range_digital;
651 s->insn_bits = das6402_di_insn_bits;
652
653 /* Digital Input subdevice */
654 s = &dev->subdevices[3];
655 s->type = COMEDI_SUBD_DO;
ef49d832 656 s->subdev_flags = SDF_WRITABLE;
79e5e6ad
HS		 657 s->n_chan = 8;
658 s->maxdata = 1;
659 s->range_table = &range_digital;
660 s->insn_bits = das6402_do_insn_bits;
48f16b6a
OS		 661
662 return 0;
663}
90f703d3 664
71e7271b
HS		 665static struct comedi_driver das6402_driver = {
666 .driver_name = "das6402",
667 .module = THIS_MODULE,
668 .attach = das6402_attach,
3d1fe3f7 669 .detach = comedi_legacy_detach,
79e5e6ad
HS		 670 .board_name = &das6402_boards[0].name,
671 .num_names = ARRAY_SIZE(das6402_boards),
672 .offset = sizeof(struct das6402_boardinfo),
71e7271b
HS		 673};
674module_comedi_driver(das6402_driver)
675
79e5e6ad
HS		 676MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
677MODULE_DESCRIPTION("Comedi driver for DAS6402 compatible boards");
90f703d3 678MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)