Merge 4.3-rc7 into staging-next
[linux-2.6-block.git] / drivers / staging / comedi / drivers / cb_pcidda.c
CommitLineData
086df5b5 1/*
3bb18724
HS
2 * comedi/drivers/cb_pcidda.c
3 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
4 *
5 * Copyright (C) 2001 Ivan Martinez <ivanmr@altavista.com>
6 * Copyright (C) 2001 Frank Mori Hess <fmhess@users.sourceforge.net>
7 *
8 * COMEDI - Linux Control and Measurement Device Interface
9 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
3bb18724 20 */
086df5b5 21
086df5b5 22/*
3bb18724
HS
23 * Driver: cb_pcidda
24 * Description: MeasurementComputing PCI-DDA series
fb1b86c6
IA
25 * Devices: [Measurement Computing] PCI-DDA08/12 (pci-dda08/12),
26 * PCI-DDA04/12 (pci-dda04/12), PCI-DDA02/12 (pci-dda02/12),
27 * PCI-DDA08/16 (pci-dda08/16), PCI-DDA04/16 (pci-dda04/16),
28 * PCI-DDA02/16 (pci-dda02/16)
3bb18724
HS
29 * Author: Ivan Martinez <ivanmr@altavista.com>
30 * Frank Mori Hess <fmhess@users.sourceforge.net>
31 * Status: works
32 *
33 * Configuration options: not applicable, uses PCI auto config
34 *
35 * Only simple analog output writing is supported.
36 */
086df5b5 37
ce157f80 38#include <linux/module.h>
33782dd5 39
b2e075f6 40#include "../comedi_pci.h"
086df5b5 41
086df5b5
IM
42#include "8255.h"
43
2696fb57 44#define EEPROM_SIZE 128 /* number of entries in eeprom */
3c5510ba
RKM
45/* maximum number of ao channels for supported boards */
46#define MAX_AO_CHANNELS 8
086df5b5 47
086df5b5 48/* Digital I/O registers */
c8ffd143
HS
49#define CB_DDA_DIO0_8255_BASE 0x00
50#define CB_DDA_DIO1_8255_BASE 0x04
086df5b5
IM
51
52/* DAC registers */
be2fcdbf
HS
53#define CB_DDA_DA_CTRL_REG 0x00 /* D/A Control Register */
54#define CB_DDA_DA_CTRL_SU (1 << 0) /* Simultaneous update */
55#define CB_DDA_DA_CTRL_EN (1 << 1) /* Enable specified DAC */
56#define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
57#define CB_DDA_DA_CTRL_RANGE2V5 (0 << 6) /* 2.5V range */
58#define CB_DDA_DA_CTRL_RANGE5V (2 << 6) /* 5V range */
59#define CB_DDA_DA_CTRL_RANGE10V (3 << 6) /* 10V range */
60#define CB_DDA_DA_CTRL_UNIP (1 << 8) /* Unipolar range */
2696fb57
BP
61
62#define DACALIBRATION1 4 /* D/A CALIBRATION REGISTER 1 */
63/* write bits */
3c5510ba
RKM
64/* serial data input for eeprom, caldacs, reference dac */
65#define SERIAL_IN_BIT 0x1
086df5b5
IM
66#define CAL_CHANNEL_MASK (0x7 << 1)
67#define CAL_CHANNEL_BITS(channel) (((channel) << 1) & CAL_CHANNEL_MASK)
2696fb57 68/* read bits */
086df5b5 69#define CAL_COUNTER_MASK 0x1f
3c5510ba
RKM
70/* calibration counter overflow status bit */
71#define CAL_COUNTER_OVERFLOW_BIT 0x20
72/* analog output is less than reference dac voltage */
73#define AO_BELOW_REF_BIT 0x40
2696fb57 74#define SERIAL_OUT_BIT 0x80 /* serial data out, for reading from eeprom */
086df5b5 75
2696fb57
BP
76#define DACALIBRATION2 6 /* D/A CALIBRATION REGISTER 2 */
77#define SELECT_EEPROM_BIT 0x1 /* send serial data in to eeprom */
3c5510ba
RKM
78/* don't send serial data to MAX542 reference dac */
79#define DESELECT_REF_DAC_BIT 0x2
80/* don't send serial data to caldac n */
81#define DESELECT_CALDAC_BIT(n) (0x4 << (n))
82/* manual says to set this bit with no explanation */
83#define DUMMY_BIT 0x40
086df5b5 84
87c4e2c6 85#define CB_DDA_DA_DATA_REG(x) (0x08 + ((x) * 2))
086df5b5 86
809ec5bc
HS
87/* Offsets for the caldac channels */
88#define CB_DDA_CALDAC_FINE_GAIN 0
89#define CB_DDA_CALDAC_COURSE_GAIN 1
90#define CB_DDA_CALDAC_COURSE_OFFSET 2
91#define CB_DDA_CALDAC_FINE_OFFSET 3
92
9ced1de6 93static const struct comedi_lrange cb_pcidda_ranges = {
f9c62f3f
HS
94 6, {
95 BIP_RANGE(10),
96 BIP_RANGE(5),
97 BIP_RANGE(2.5),
98 UNI_RANGE(10),
99 UNI_RANGE(5),
100 UNI_RANGE(2.5)
101 }
086df5b5
IM
102};
103
e125f753
HS
104enum cb_pcidda_boardid {
105 BOARD_DDA02_12,
106 BOARD_DDA04_12,
107 BOARD_DDA08_12,
108 BOARD_DDA02_16,
109 BOARD_DDA04_16,
110 BOARD_DDA08_16,
111};
112
1657e325 113struct cb_pcidda_board {
086df5b5 114 const char *name;
086df5b5
IM
115 int ao_chans;
116 int ao_bits;
1657e325 117};
2696fb57 118
1657e325 119static const struct cb_pcidda_board cb_pcidda_boards[] = {
e125f753 120 [BOARD_DDA02_12] = {
0963fa1c 121 .name = "pci-dda02/12",
0963fa1c
HS
122 .ao_chans = 2,
123 .ao_bits = 12,
e125f753
HS
124 },
125 [BOARD_DDA04_12] = {
0963fa1c 126 .name = "pci-dda04/12",
0963fa1c
HS
127 .ao_chans = 4,
128 .ao_bits = 12,
e125f753
HS
129 },
130 [BOARD_DDA08_12] = {
0963fa1c 131 .name = "pci-dda08/12",
0963fa1c
HS
132 .ao_chans = 8,
133 .ao_bits = 12,
e125f753
HS
134 },
135 [BOARD_DDA02_16] = {
0963fa1c 136 .name = "pci-dda02/16",
0963fa1c
HS
137 .ao_chans = 2,
138 .ao_bits = 16,
e125f753
HS
139 },
140 [BOARD_DDA04_16] = {
0963fa1c 141 .name = "pci-dda04/16",
0963fa1c
HS
142 .ao_chans = 4,
143 .ao_bits = 16,
e125f753
HS
144 },
145 [BOARD_DDA08_16] = {
0963fa1c 146 .name = "pci-dda08/16",
0963fa1c
HS
147 .ao_chans = 8,
148 .ao_bits = 16,
149 },
086df5b5
IM
150};
151
cc7bb61e 152struct cb_pcidda_private {
f254029b 153 unsigned long daqio;
3c5510ba
RKM
154 /* bits last written to da calibration register 1 */
155 unsigned int dac_cal1_bits;
156 /* current range settings for output channels */
157 unsigned int ao_range[MAX_AO_CHANNELS];
2696fb57 158 u16 eeprom_data[EEPROM_SIZE]; /* software copy of board's eeprom */
cc7bb61e 159};
086df5b5 160
2696fb57 161/* lowlevel read from eeprom */
da91b269 162static unsigned int cb_pcidda_serial_in(struct comedi_device *dev)
086df5b5 163{
f254029b 164 struct cb_pcidda_private *devpriv = dev->private;
086df5b5
IM
165 unsigned int value = 0;
166 int i;
2696fb57 167 const int value_width = 16; /* number of bits wide values are */
086df5b5
IM
168
169 for (i = 1; i <= value_width; i++) {
2696fb57 170 /* read bits most significant bit first */
f254029b 171 if (inw_p(devpriv->daqio + DACALIBRATION1) & SERIAL_OUT_BIT)
086df5b5 172 value |= 1 << (value_width - i);
086df5b5
IM
173 }
174
175 return value;
176}
177
2696fb57 178/* lowlevel write to eeprom/dac */
da91b269 179static void cb_pcidda_serial_out(struct comedi_device *dev, unsigned int value,
0a85b6f0 180 unsigned int num_bits)
086df5b5 181{
c6ad306b 182 struct cb_pcidda_private *devpriv = dev->private;
086df5b5
IM
183 int i;
184
185 for (i = 1; i <= num_bits; i++) {
2696fb57 186 /* send bits most significant bit first */
086df5b5
IM
187 if (value & (1 << (num_bits - i)))
188 devpriv->dac_cal1_bits |= SERIAL_IN_BIT;
189 else
190 devpriv->dac_cal1_bits &= ~SERIAL_IN_BIT;
f254029b 191 outw_p(devpriv->dac_cal1_bits, devpriv->daqio + DACALIBRATION1);
086df5b5
IM
192 }
193}
194
2696fb57 195/* reads a 16 bit value from board's eeprom */
da91b269 196static unsigned int cb_pcidda_read_eeprom(struct comedi_device *dev,
0a85b6f0 197 unsigned int address)
086df5b5 198{
f254029b 199 struct cb_pcidda_private *devpriv = dev->private;
086df5b5
IM
200 unsigned int i;
201 unsigned int cal2_bits;
202 unsigned int value;
3c5510ba
RKM
203 /* one caldac for every two dac channels */
204 const int max_num_caldacs = 4;
205 /* bits to send to tell eeprom we want to read */
206 const int read_instruction = 0x6;
086df5b5
IM
207 const int instruction_length = 3;
208 const int address_length = 8;
209
2696fb57 210 /* send serial output stream to eeprom */
086df5b5 211 cal2_bits = SELECT_EEPROM_BIT | DESELECT_REF_DAC_BIT | DUMMY_BIT;
2696fb57 212 /* deactivate caldacs (one caldac for every two channels) */
20db7d7d 213 for (i = 0; i < max_num_caldacs; i++)
086df5b5 214 cal2_bits |= DESELECT_CALDAC_BIT(i);
f254029b 215 outw_p(cal2_bits, devpriv->daqio + DACALIBRATION2);
086df5b5 216
2696fb57 217 /* tell eeprom we want to read */
086df5b5 218 cb_pcidda_serial_out(dev, read_instruction, instruction_length);
2696fb57 219 /* send address we want to read from */
086df5b5
IM
220 cb_pcidda_serial_out(dev, address, address_length);
221
222 value = cb_pcidda_serial_in(dev);
223
2696fb57 224 /* deactivate eeprom */
086df5b5 225 cal2_bits &= ~SELECT_EEPROM_BIT;
f254029b 226 outw_p(cal2_bits, devpriv->daqio + DACALIBRATION2);
086df5b5
IM
227
228 return value;
229}
230
2696fb57 231/* writes to 8 bit calibration dacs */
0a85b6f0
MT
232static void cb_pcidda_write_caldac(struct comedi_device *dev,
233 unsigned int caldac, unsigned int channel,
234 unsigned int value)
086df5b5 235{
f254029b 236 struct cb_pcidda_private *devpriv = dev->private;
086df5b5
IM
237 unsigned int cal2_bits;
238 unsigned int i;
3c5510ba
RKM
239 /* caldacs use 3 bit channel specification */
240 const int num_channel_bits = 3;
2696fb57 241 const int num_caldac_bits = 8; /* 8 bit calibration dacs */
3c5510ba
RKM
242 /* one caldac for every two dac channels */
243 const int max_num_caldacs = 4;
086df5b5
IM
244
245 /* write 3 bit channel */
246 cb_pcidda_serial_out(dev, channel, num_channel_bits);
2696fb57 247 /* write 8 bit caldac value */
086df5b5
IM
248 cb_pcidda_serial_out(dev, value, num_caldac_bits);
249
2696fb57
BP
250/*
251* latch stream into appropriate caldac deselect reference dac
252*/
086df5b5 253 cal2_bits = DESELECT_REF_DAC_BIT | DUMMY_BIT;
2696fb57 254 /* deactivate caldacs (one caldac for every two channels) */
20db7d7d 255 for (i = 0; i < max_num_caldacs; i++)
086df5b5 256 cal2_bits |= DESELECT_CALDAC_BIT(i);
2696fb57 257 /* activate the caldac we want */
086df5b5 258 cal2_bits &= ~DESELECT_CALDAC_BIT(caldac);
f254029b 259 outw_p(cal2_bits, devpriv->daqio + DACALIBRATION2);
2696fb57 260 /* deactivate caldac */
086df5b5 261 cal2_bits |= DESELECT_CALDAC_BIT(caldac);
f254029b 262 outw_p(cal2_bits, devpriv->daqio + DACALIBRATION2);
086df5b5
IM
263}
264
2696fb57 265/* set caldacs to eeprom values for given channel and range */
da91b269 266static void cb_pcidda_calibrate(struct comedi_device *dev, unsigned int channel,
0a85b6f0 267 unsigned int range)
086df5b5 268{
c6ad306b 269 struct cb_pcidda_private *devpriv = dev->private;
809ec5bc
HS
270 unsigned int caldac = channel / 2; /* two caldacs per channel */
271 unsigned int chan = 4 * (channel % 2); /* caldac channel base */
272 unsigned int index = 2 * range + 12 * channel;
273 unsigned int offset;
274 unsigned int gain;
086df5b5 275
809ec5bc 276 /* save range so we can tell when we need to readjust calibration */
086df5b5
IM
277 devpriv->ao_range[channel] = range;
278
809ec5bc
HS
279 /* get values from eeprom data */
280 offset = devpriv->eeprom_data[0x7 + index];
281 gain = devpriv->eeprom_data[0x8 + index];
282
283 /* set caldacs */
284 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_COURSE_OFFSET,
285 (offset >> 8) & 0xff);
286 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_FINE_OFFSET,
287 offset & 0xff);
288 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_COURSE_GAIN,
289 (gain >> 8) & 0xff);
290 cb_pcidda_write_caldac(dev, caldac, chan + CB_DDA_CALDAC_FINE_GAIN,
291 gain & 0xff);
086df5b5
IM
292}
293
2e54209e
HS
294static int cb_pcidda_ao_insn_write(struct comedi_device *dev,
295 struct comedi_subdevice *s,
296 struct comedi_insn *insn,
297 unsigned int *data)
6d336a56
HS
298{
299 struct cb_pcidda_private *devpriv = dev->private;
be2fcdbf
HS
300 unsigned int channel = CR_CHAN(insn->chanspec);
301 unsigned int range = CR_RANGE(insn->chanspec);
302 unsigned int ctrl;
6d336a56 303
6d336a56
HS
304 if (range != devpriv->ao_range[channel])
305 cb_pcidda_calibrate(dev, channel, range);
306
be2fcdbf 307 ctrl = CB_DDA_DA_CTRL_EN | CB_DDA_DA_CTRL_DAC(channel);
6d336a56 308
6d336a56
HS
309 switch (range) {
310 case 0:
6d336a56 311 case 3:
be2fcdbf 312 ctrl |= CB_DDA_DA_CTRL_RANGE10V;
6d336a56 313 break;
be2fcdbf 314 case 1:
6d336a56 315 case 4:
be2fcdbf 316 ctrl |= CB_DDA_DA_CTRL_RANGE5V;
6d336a56 317 break;
be2fcdbf 318 case 2:
6d336a56 319 case 5:
be2fcdbf 320 ctrl |= CB_DDA_DA_CTRL_RANGE2V5;
6d336a56
HS
321 break;
322 }
323
be2fcdbf
HS
324 if (range > 2)
325 ctrl |= CB_DDA_DA_CTRL_UNIP;
326
f254029b 327 outw(ctrl, devpriv->daqio + CB_DDA_DA_CTRL_REG);
6d336a56 328
f254029b 329 outw(data[0], devpriv->daqio + CB_DDA_DA_DATA_REG(channel));
6d336a56 330
2e54209e 331 return insn->n;
6d336a56
HS
332}
333
a690b7e5 334static int cb_pcidda_auto_attach(struct comedi_device *dev,
e125f753 335 unsigned long context)
6d336a56 336{
750af5e5 337 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
91d4beba 338 const struct cb_pcidda_board *board = NULL;
6d336a56 339 struct cb_pcidda_private *devpriv;
6d336a56 340 struct comedi_subdevice *s;
2730c736 341 int i;
6d336a56
HS
342 int ret;
343
e125f753 344 if (context < ARRAY_SIZE(cb_pcidda_boards))
91d4beba
HS
345 board = &cb_pcidda_boards[context];
346 if (!board)
2c0db011 347 return -ENODEV;
91d4beba
HS
348 dev->board_ptr = board;
349 dev->board_name = board->name;
2c0db011 350
0bdab509 351 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
c34fa261
HS
352 if (!devpriv)
353 return -ENOMEM;
6d336a56 354
818f569f 355 ret = comedi_pci_enable(dev);
2c0db011
HS
356 if (ret)
357 return ret;
f254029b
HS
358 dev->iobase = pci_resource_start(pcidev, 2);
359 devpriv->daqio = pci_resource_start(pcidev, 3);
6d336a56 360
6d336a56
HS
361 ret = comedi_alloc_subdevices(dev, 3);
362 if (ret)
363 return ret;
364
82ec595a 365 s = &dev->subdevices[0];
6d336a56
HS
366 /* analog output subdevice */
367 s->type = COMEDI_SUBD_AO;
368 s->subdev_flags = SDF_WRITABLE;
91d4beba
HS
369 s->n_chan = board->ao_chans;
370 s->maxdata = (1 << board->ao_bits) - 1;
f9c62f3f 371 s->range_table = &cb_pcidda_ranges;
2e54209e 372 s->insn_write = cb_pcidda_ao_insn_write;
6d336a56 373
618351ae
HS
374 /* two 8255 digital io subdevices */
375 for (i = 0; i < 2; i++) {
376 s = &dev->subdevices[1 + i];
f0162091 377 ret = subdev_8255_init(dev, s, NULL, i * I8255_SIZE);
618351ae
HS
378 if (ret)
379 return ret;
380 }
6d336a56 381
66483378 382 /* Read the caldac eeprom data */
2730c736
HS
383 for (i = 0; i < EEPROM_SIZE; i++)
384 devpriv->eeprom_data[i] = cb_pcidda_read_eeprom(dev, i);
6d336a56
HS
385
386 /* set calibrations dacs */
91d4beba 387 for (i = 0; i < board->ao_chans; i++)
2730c736 388 cb_pcidda_calibrate(dev, i, devpriv->ao_range[i]);
6d336a56 389
2c0db011 390 return 0;
6d336a56
HS
391}
392
954ca6c9
HS
393static struct comedi_driver cb_pcidda_driver = {
394 .driver_name = "cb_pcidda",
395 .module = THIS_MODULE,
750af5e5 396 .auto_attach = cb_pcidda_auto_attach,
aac307f9 397 .detach = comedi_pci_detach,
954ca6c9
HS
398};
399
a690b7e5 400static int cb_pcidda_pci_probe(struct pci_dev *dev,
b8f4ac23 401 const struct pci_device_id *id)
727b286b 402{
b8f4ac23
HS
403 return comedi_pci_auto_config(dev, &cb_pcidda_driver,
404 id->driver_data);
727b286b
AT
405}
406
41e043fc 407static const struct pci_device_id cb_pcidda_pci_table[] = {
e125f753
HS
408 { PCI_VDEVICE(CB, 0x0020), BOARD_DDA02_12 },
409 { PCI_VDEVICE(CB, 0x0021), BOARD_DDA04_12 },
410 { PCI_VDEVICE(CB, 0x0022), BOARD_DDA08_12 },
411 { PCI_VDEVICE(CB, 0x0023), BOARD_DDA02_16 },
412 { PCI_VDEVICE(CB, 0x0024), BOARD_DDA04_16 },
413 { PCI_VDEVICE(CB, 0x0025), BOARD_DDA08_16 },
954ca6c9 414 { 0 }
727b286b 415};
954ca6c9 416MODULE_DEVICE_TABLE(pci, cb_pcidda_pci_table);
727b286b 417
954ca6c9
HS
418static struct pci_driver cb_pcidda_pci_driver = {
419 .name = "cb_pcidda",
420 .id_table = cb_pcidda_pci_table,
421 .probe = cb_pcidda_pci_probe,
9901a4d7 422 .remove = comedi_pci_auto_unconfig,
954ca6c9
HS
423};
424module_comedi_pci_driver(cb_pcidda_driver, cb_pcidda_pci_driver);
90f703d3
AT
425
426MODULE_AUTHOR("Comedi http://www.comedi.org");
427MODULE_DESCRIPTION("Comedi low-level driver");
428MODULE_LICENSE("GPL");