Merge tag 'spi-v4.0-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
[linux-2.6-block.git] / drivers / staging / comedi / drivers / addi_apci_2032.c
CommitLineData
d02178b7
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1/*
2 * addi_apci_2032.c
3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
5 *
6 * ADDI-DATA GmbH
7 * Dieselstrasse 3
8 * D-77833 Ottersweier
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
12 * info@addi-data.com
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 * more details.
d02178b7
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23 */
24
ce157f80 25#include <linux/module.h>
33782dd5 26#include <linux/pci.h>
abac8b54 27#include <linux/interrupt.h>
bcc27c82 28#include <linux/slab.h>
abac8b54 29
3d41c443 30#include "../comedidev.h"
5b62fe2a 31#include "addi_watchdog.h"
3d41c443
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32#include "comedi_fc.h"
33
d02178b7
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34/*
35 * PCI bar 1 I/O Register map
36 */
7180eb30
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37#define APCI2032_DO_REG 0x00
38#define APCI2032_INT_CTRL_REG 0x04
39#define APCI2032_INT_CTRL_VCC_ENA (1 << 0)
40#define APCI2032_INT_CTRL_CC_ENA (1 << 1)
41#define APCI2032_INT_STATUS_REG 0x08
42#define APCI2032_INT_STATUS_VCC (1 << 0)
43#define APCI2032_INT_STATUS_CC (1 << 1)
44#define APCI2032_STATUS_REG 0x0c
45#define APCI2032_STATUS_IRQ (1 << 0)
46#define APCI2032_WDOG_REG 0x10
23fb1747 47
5c2d4cba
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48struct apci2032_int_private {
49 spinlock_t spinlock;
50 bool active;
51 unsigned char enabled_isns;
52};
53
d02178b7
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54static int apci2032_do_insn_bits(struct comedi_device *dev,
55 struct comedi_subdevice *s,
56 struct comedi_insn *insn,
57 unsigned int *data)
58{
7180eb30 59 s->state = inl(dev->iobase + APCI2032_DO_REG);
d02178b7 60
97f4289a 61 if (comedi_dio_update_state(s, data))
7180eb30 62 outl(s->state, dev->iobase + APCI2032_DO_REG);
d02178b7
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63
64 data[1] = s->state;
65
66 return insn->n;
67}
68
05fcdced
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69static int apci2032_int_insn_bits(struct comedi_device *dev,
70 struct comedi_subdevice *s,
71 struct comedi_insn *insn,
72 unsigned int *data)
b3b7dab7 73{
b652bd83 74 data[1] = inl(dev->iobase + APCI2032_INT_STATUS_REG) & 3;
05fcdced
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75 return insn->n;
76}
b3b7dab7 77
5c2d4cba
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78static void apci2032_int_stop(struct comedi_device *dev,
79 struct comedi_subdevice *s)
80{
81 struct apci2032_int_private *subpriv = s->private;
82
83 subpriv->active = false;
84 subpriv->enabled_isns = 0;
85 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG);
86}
87
05fcdced
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88static int apci2032_int_cmdtest(struct comedi_device *dev,
89 struct comedi_subdevice *s,
90 struct comedi_cmd *cmd)
91{
92 int err = 0;
b3b7dab7 93
05fcdced 94 /* Step 1 : check if triggers are trivially valid */
b3b7dab7 95
05fcdced 96 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
5c2d4cba
IA
97 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
98 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
05fcdced 99 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
215caceb 100 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
b3b7dab7 101
05fcdced
HS
102 if (err)
103 return 1;
b3b7dab7 104
05fcdced 105 /* Step 2a : make sure trigger sources are unique */
215caceb
IA
106 err |= cfc_check_trigger_is_unique(cmd->stop_src);
107
05fcdced
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108 /* Step 2b : and mutually compatible */
109
110 if (err)
111 return 2;
112
113 /* Step 3: check if arguments are trivially valid */
114
115 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
5c2d4cba 116 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
05fcdced 117 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
5c2d4cba 118 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
52c22b80
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119 if (cmd->stop_src == TRIG_COUNT)
120 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
121 else /* TRIG_NONE */
215caceb 122 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
05fcdced
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123
124 if (err)
125 return 3;
126
b3cdebbf 127 /* Step 4: fix up any arguments */
05fcdced 128
b3cdebbf 129 /* Step 5: check channel list if it exists */
05fcdced
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130
131 return 0;
b3b7dab7
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132}
133
05fcdced
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134static int apci2032_int_cmd(struct comedi_device *dev,
135 struct comedi_subdevice *s)
d02178b7 136{
05fcdced 137 struct comedi_cmd *cmd = &s->async->cmd;
5c2d4cba
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138 struct apci2032_int_private *subpriv = s->private;
139 unsigned char enabled_isns;
140 unsigned int n;
141 unsigned long flags;
142
143 enabled_isns = 0;
144 for (n = 0; n < cmd->chanlist_len; n++)
145 enabled_isns |= 1 << CR_CHAN(cmd->chanlist[n]);
05fcdced 146
5c2d4cba 147 spin_lock_irqsave(&subpriv->spinlock, flags);
05fcdced 148
103e2801 149 subpriv->enabled_isns = enabled_isns;
103e2801
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150 subpriv->active = true;
151 outl(enabled_isns, dev->iobase + APCI2032_INT_CTRL_REG);
152
153 spin_unlock_irqrestore(&subpriv->spinlock, flags);
215caceb 154
05fcdced 155 return 0;
d02178b7 156}
7180eb30 157
05fcdced
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158static int apci2032_int_cancel(struct comedi_device *dev,
159 struct comedi_subdevice *s)
d02178b7 160{
5c2d4cba
IA
161 struct apci2032_int_private *subpriv = s->private;
162 unsigned long flags;
163
164 spin_lock_irqsave(&subpriv->spinlock, flags);
165 if (subpriv->active)
166 apci2032_int_stop(dev, s);
167 spin_unlock_irqrestore(&subpriv->spinlock, flags);
d02178b7 168
05fcdced 169 return 0;
d02178b7 170}
317285d7 171
05fcdced 172static irqreturn_t apci2032_interrupt(int irq, void *d)
25adf2cc 173{
05fcdced
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174 struct comedi_device *dev = d;
175 struct comedi_subdevice *s = dev->read_subdev;
56e78120 176 struct comedi_cmd *cmd = &s->async->cmd;
5c2d4cba 177 struct apci2032_int_private *subpriv;
05fcdced
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178 unsigned int val;
179
0774c2b5
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180 if (!dev->attached)
181 return IRQ_NONE;
182
05fcdced
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183 /* Check if VCC OR CC interrupt has occurred */
184 val = inl(dev->iobase + APCI2032_STATUS_REG) & APCI2032_STATUS_IRQ;
185 if (!val)
186 return IRQ_NONE;
187
5c2d4cba
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188 subpriv = s->private;
189 spin_lock(&subpriv->spinlock);
190
b652bd83 191 val = inl(dev->iobase + APCI2032_INT_STATUS_REG) & 3;
ef6543db
IA
192 /* Disable triggered interrupt sources. */
193 outl(~val & 3, dev->iobase + APCI2032_INT_CTRL_REG);
194 /*
195 * Note: We don't reenable the triggered interrupt sources because they
196 * are level-sensitive, hardware error status interrupt sources and
197 * they'd keep triggering interrupts repeatedly.
198 */
05fcdced 199
5c2d4cba 200 if (subpriv->active && (val & subpriv->enabled_isns) != 0) {
56e78120
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201 unsigned short bits = 0;
202 int i;
5c2d4cba
IA
203
204 /* Bits in scan data correspond to indices in channel list. */
56e78120
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205 for (i = 0; i < cmd->chanlist_len; i++) {
206 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
207
208 if (val & (1 << chan))
209 bits |= (1 << i);
210 }
5c2d4cba 211
d1c87ceb
HS
212 comedi_buf_write_samples(s, &bits, 1);
213
214 if (cmd->stop_src == TRIG_COUNT &&
215 s->async->scans_done >= cmd->stop_arg)
216 s->async->events |= COMEDI_CB_EOA;
5c2d4cba
IA
217 }
218
219 spin_unlock(&subpriv->spinlock);
7ff4b584
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220
221 comedi_handle_events(dev, s);
05fcdced
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222
223 return IRQ_HANDLED;
25adf2cc
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224}
225
791c9792 226static int apci2032_reset(struct comedi_device *dev)
25adf2cc 227{
7180eb30
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228 outl(0x0, dev->iobase + APCI2032_DO_REG);
229 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG);
5b62fe2a
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230
231 addi_watchdog_reset(dev->iobase + APCI2032_WDOG_REG);
25adf2cc 232
25adf2cc
HS
233 return 0;
234}
235
25adf2cc
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236static int apci2032_auto_attach(struct comedi_device *dev,
237 unsigned long context_unused)
238{
239 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
25adf2cc 240 struct comedi_subdevice *s;
0c33bdd0 241 int ret;
25adf2cc 242
818f569f 243 ret = comedi_pci_enable(dev);
25adf2cc
HS
244 if (ret)
245 return ret;
70ff4065 246 dev->iobase = pci_resource_start(pcidev, 1);
0774c2b5 247 apci2032_reset(dev);
25adf2cc 248
25adf2cc 249 if (pcidev->irq > 0) {
05fcdced
HS
250 ret = request_irq(pcidev->irq, apci2032_interrupt,
251 IRQF_SHARED, dev->board_name, dev);
25adf2cc
HS
252 if (ret == 0)
253 dev->irq = pcidev->irq;
254 }
255
05fcdced 256 ret = comedi_alloc_subdevices(dev, 3);
25adf2cc
HS
257 if (ret)
258 return ret;
259
0c33bdd0 260 /* Initialize the digital output subdevice */
25adf2cc 261 s = &dev->subdevices[0];
cf110882 262 s->type = COMEDI_SUBD_DO;
ef49d832 263 s->subdev_flags = SDF_WRITABLE;
cf110882
HS
264 s->n_chan = 32;
265 s->maxdata = 1;
266 s->range_table = &range_digital;
cf110882 267 s->insn_bits = apci2032_do_insn_bits;
25adf2cc 268
0c33bdd0
HS
269 /* Initialize the watchdog subdevice */
270 s = &dev->subdevices[1];
5b62fe2a
HS
271 ret = addi_watchdog_init(s, dev->iobase + APCI2032_WDOG_REG);
272 if (ret)
273 return ret;
25adf2cc 274
05fcdced
HS
275 /* Initialize the interrupt subdevice */
276 s = &dev->subdevices[2];
5f6c2a95
IA
277 s->type = COMEDI_SUBD_DI;
278 s->subdev_flags = SDF_READABLE;
279 s->n_chan = 2;
280 s->maxdata = 1;
281 s->range_table = &range_digital;
282 s->insn_bits = apci2032_int_insn_bits;
05fcdced 283 if (dev->irq) {
5c2d4cba
IA
284 struct apci2032_int_private *subpriv;
285
05fcdced 286 dev->read_subdev = s;
5c2d4cba
IA
287 subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL);
288 if (!subpriv)
289 return -ENOMEM;
290 spin_lock_init(&subpriv->spinlock);
291 s->private = subpriv;
4c704690 292 s->subdev_flags = SDF_READABLE | SDF_CMD_READ | SDF_PACKED;
5c2d4cba 293 s->len_chanlist = 2;
05fcdced
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294 s->do_cmdtest = apci2032_int_cmdtest;
295 s->do_cmd = apci2032_int_cmd;
296 s->cancel = apci2032_int_cancel;
05fcdced
HS
297 }
298
25adf2cc
HS
299 return 0;
300}
301
302static void apci2032_detach(struct comedi_device *dev)
303{
dce10abc
HS
304 if (dev->iobase)
305 apci2032_reset(dev);
aac307f9 306 comedi_pci_detach(dev);
5c2d4cba
IA
307 if (dev->read_subdev)
308 kfree(dev->read_subdev->private);
25adf2cc
HS
309}
310
20a22b70
HS
311static struct comedi_driver apci2032_driver = {
312 .driver_name = "addi_apci_2032",
313 .module = THIS_MODULE,
25adf2cc
HS
314 .auto_attach = apci2032_auto_attach,
315 .detach = apci2032_detach,
20a22b70
HS
316};
317
a690b7e5 318static int apci2032_pci_probe(struct pci_dev *dev,
b8f4ac23 319 const struct pci_device_id *id)
20a22b70 320{
b8f4ac23 321 return comedi_pci_auto_config(dev, &apci2032_driver, id->driver_data);
20a22b70
HS
322}
323
41e043fc 324static const struct pci_device_id apci2032_pci_table[] = {
317285d7
HS
325 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1004) },
326 { 0 }
327};
20a22b70 328MODULE_DEVICE_TABLE(pci, apci2032_pci_table);
317285d7 329
20a22b70
HS
330static struct pci_driver apci2032_pci_driver = {
331 .name = "addi_apci_2032",
332 .id_table = apci2032_pci_table,
333 .probe = apci2032_pci_probe,
9901a4d7 334 .remove = comedi_pci_auto_unconfig,
20a22b70
HS
335};
336module_comedi_pci_driver(apci2032_driver, apci2032_pci_driver);
90f703d3
AT
337
338MODULE_AUTHOR("Comedi http://www.comedi.org");
b5ebcaa8 339MODULE_DESCRIPTION("ADDI-DATA APCI-2032, 32 channel DO boards");
90f703d3 340MODULE_LICENSE("GPL");