[linux-2.6-block.git] / drivers / staging / comedi / drivers / addi_apci_1032.c

/*
 * addi_apci_1032.c
 * Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
 * Project manager: Eric Stolz
 *
 *	ADDI-DATA GmbH
 *	Dieselstrasse 3
 *	D-77833 Ottersweier
 *	Tel: +19(0)7223/9493-0
 *	Fax: +49(0)7223/9493-92
 *	http://www.addi-data.com
 *	info@addi-data.com
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
 * more details.
 */

/*
 * Driver: addi_apci_1032
 * Description: ADDI-DATA APCI-1032 Digital Input Board
 * Author: ADDI-DATA GmbH <info@addi-data.com>,
 *   H Hartley Sweeten <hsweeten@visionengravers.com>
 * Status: untested
 * Devices: [ADDI-DATA] APCI-1032 (addi_apci_1032)
 *
 * Configuration options:
 *   None; devices are configured automatically.
 *
 * This driver models the APCI-1032 as a 32-channel, digital input subdevice
 * plus an additional digital input subdevice to handle change-of-state (COS)
 * interrupts (if an interrupt handler can be set up successfully).
 *
 * The COS subdevice supports comedi asynchronous read commands.
 *
 * Change-Of-State (COS) interrupt configuration:
 *
 * Channels 0 to 15 are interruptible. These channels can be configured
 * to generate interrupts based on AND/OR logic for the desired channels.
 *
 *   OR logic:
 *   - reacts to rising or falling edges
 *   - interrupt is generated when any enabled channel meets the desired
 *     interrupt condition
 *
 *   AND logic:
 *   - reacts to changes in level of the selected inputs
 *   - interrupt is generated when all enabled channels meet the desired
 *     interrupt condition
 *   - after an interrupt, a change in level must occur on the selected
 *     inputs to release the IRQ logic
 *
 * The COS subdevice must be configured before setting up a comedi
 * asynchronous command:
 *
 *   data[0] : INSN_CONFIG_DIGITAL_TRIG
 *   data[1] : trigger number (= 0)
 *   data[2] : configuration operation:
 *             - COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
 *             - COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
 *             - COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
 *   data[3] : left-shift for data[4] and data[5]
 *   data[4] : rising-edge/high level channels
 *   data[5] : falling-edge/low level channels
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/interrupt.h>

#include "../comedidev.h"
#include "comedi_fc.h"
#include "amcc_s5933.h"

/*
 * I/O Register Map
 */
#define APCI1032_DI_REG			0x00
#define APCI1032_MODE1_REG		0x04
#define APCI1032_MODE2_REG		0x08
#define APCI1032_STATUS_REG		0x0c
#define APCI1032_CTRL_REG		0x10
#define APCI1032_CTRL_INT_OR		(0 << 1)
#define APCI1032_CTRL_INT_AND		(1 << 1)
#define APCI1032_CTRL_INT_ENA		(1 << 2)

struct apci1032_private {
	unsigned long amcc_iobase;	/* base of AMCC I/O registers */
	unsigned int mode1;	/* rising-edge/high level channels */
	unsigned int mode2;	/* falling-edge/low level channels */
	unsigned int ctrl;	/* interrupt mode OR (edge) . AND (level) */
};

static int apci1032_reset(struct comedi_device *dev)
{
	/* disable the interrupts */
	outl(0x0, dev->iobase + APCI1032_CTRL_REG);
	/* Reset the interrupt status register */
	inl(dev->iobase + APCI1032_STATUS_REG);
	/* Disable the and/or interrupt */
	outl(0x0, dev->iobase + APCI1032_MODE1_REG);
	outl(0x0, dev->iobase + APCI1032_MODE2_REG);

	return 0;
}

static int apci1032_cos_insn_config(struct comedi_device *dev,
				    struct comedi_subdevice *s,
				    struct comedi_insn *insn,
				    unsigned int *data)
{
	struct apci1032_private *devpriv = dev->private;
	unsigned int shift, oldmask;

	switch (data[0]) {
	case INSN_CONFIG_DIGITAL_TRIG:
		if (data[1] != 0)
			return -EINVAL;
		shift = data[3];
		oldmask = (1U << shift) - 1;
		switch (data[2]) {
		case COMEDI_DIGITAL_TRIG_DISABLE:
			devpriv->ctrl = 0;
			devpriv->mode1 = 0;
			devpriv->mode2 = 0;
			apci1032_reset(dev);
			break;
		case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
			if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
					      APCI1032_CTRL_INT_OR)) {
				/* switching to 'OR' mode */
				devpriv->ctrl = APCI1032_CTRL_INT_ENA |
						APCI1032_CTRL_INT_OR;
				/* wipe old channels */
				devpriv->mode1 = 0;
				devpriv->mode2 = 0;
			} else {
				/* preserve unspecified channels */
				devpriv->mode1 &= oldmask;
				devpriv->mode2 &= oldmask;
			}
			/* configure specified channels */
			devpriv->mode1 |= data[4] << shift;
			devpriv->mode2 |= data[5] << shift;
			break;
		case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
			if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
					      APCI1032_CTRL_INT_AND)) {
				/* switching to 'AND' mode */
				devpriv->ctrl = APCI1032_CTRL_INT_ENA |
						APCI1032_CTRL_INT_AND;
				/* wipe old channels */
				devpriv->mode1 = 0;
				devpriv->mode2 = 0;
			} else {
				/* preserve unspecified channels */
				devpriv->mode1 &= oldmask;
				devpriv->mode2 &= oldmask;
			}
			/* configure specified channels */
			devpriv->mode1 |= data[4] << shift;
			devpriv->mode2 |= data[5] << shift;
			break;
		default:
			return -EINVAL;
		}
		break;
	default:
		return -EINVAL;
	}

	return insn->n;
}

static int apci1032_cos_insn_bits(struct comedi_device *dev,
				  struct comedi_subdevice *s,
				  struct comedi_insn *insn,
				  unsigned int *data)
{
	data[1] = s->state;

	return 0;
}

static int apci1032_cos_cmdtest(struct comedi_device *dev,
				struct comedi_subdevice *s,
				struct comedi_cmd *cmd)
{
	int err = 0;

	/* Step 1 : check if triggers are trivially valid */

	err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
	err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
	err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
	err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
	err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);

	if (err)
		return 1;

	/* Step 2a : make sure trigger sources are unique */
	/* Step 2b : and mutually compatible */

	/* Step 3: check if arguments are trivially valid */

	err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
	err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
	err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
	err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
	err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);

	if (err)
		return 3;

	/* Step 4: fix up any arguments */

	/* Step 5: check channel list if it exists */

	return 0;
}

/*
 * Change-Of-State (COS) 'do_cmd' operation
 *
 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
 */
static int apci1032_cos_cmd(struct comedi_device *dev,
			    struct comedi_subdevice *s)
{
	struct apci1032_private *devpriv = dev->private;

	if (!devpriv->ctrl) {
		dev_warn(dev->class_dev,
			 "Interrupts disabled due to mode configuration!\n");
		return -EINVAL;
	}

	outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
	outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
	outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);

	return 0;
}

static int apci1032_cos_cancel(struct comedi_device *dev,
			       struct comedi_subdevice *s)
{
	return apci1032_reset(dev);
}

static irqreturn_t apci1032_interrupt(int irq, void *d)
{
	struct comedi_device *dev = d;
	struct apci1032_private *devpriv = dev->private;
	struct comedi_subdevice *s = dev->read_subdev;
	unsigned int ctrl;

	/* check interrupt is from this device */
	if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
	     INTCSR_INTR_ASSERTED) == 0)
		return IRQ_NONE;

	/* check interrupt is enabled */
	ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
	if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
		return IRQ_HANDLED;

	/* disable the interrupt */
	outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);

	s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
	comedi_buf_write_samples(s, &s->state, 1);
	comedi_handle_events(dev, s);

	/* enable the interrupt */
	outl(ctrl, dev->iobase + APCI1032_CTRL_REG);

	return IRQ_HANDLED;
}

static int apci1032_di_insn_bits(struct comedi_device *dev,
				 struct comedi_subdevice *s,
				 struct comedi_insn *insn,
				 unsigned int *data)
{
	data[1] = inl(dev->iobase + APCI1032_DI_REG);

	return insn->n;
}

static int apci1032_auto_attach(struct comedi_device *dev,
				unsigned long context_unused)
{
	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
	struct apci1032_private *devpriv;
	struct comedi_subdevice *s;
	int ret;

	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
	if (!devpriv)
		return -ENOMEM;

	ret = comedi_pci_enable(dev);
	if (ret)
		return ret;

	devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
	dev->iobase = pci_resource_start(pcidev, 1);
	apci1032_reset(dev);
	if (pcidev->irq > 0) {
		ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
				  dev->board_name, dev);
		if (ret == 0)
			dev->irq = pcidev->irq;
	}

	ret = comedi_alloc_subdevices(dev, 2);
	if (ret)
		return ret;

	/*  Allocate and Initialise DI Subdevice Structures */
	s = &dev->subdevices[0];
	s->type		= COMEDI_SUBD_DI;
	s->subdev_flags	= SDF_READABLE;
	s->n_chan	= 32;
	s->maxdata	= 1;
	s->range_table	= &range_digital;
	s->insn_bits	= apci1032_di_insn_bits;

	/* Change-Of-State (COS) interrupt subdevice */
	s = &dev->subdevices[1];
	if (dev->irq) {
		dev->read_subdev = s;
		s->type		= COMEDI_SUBD_DI;
		s->subdev_flags	= SDF_READABLE | SDF_CMD_READ;
		s->n_chan	= 1;
		s->maxdata	= 1;
		s->range_table	= &range_digital;
		s->insn_config	= apci1032_cos_insn_config;
		s->insn_bits	= apci1032_cos_insn_bits;
		s->len_chanlist	= 1;
		s->do_cmdtest	= apci1032_cos_cmdtest;
		s->do_cmd	= apci1032_cos_cmd;
		s->cancel	= apci1032_cos_cancel;
	} else {
		s->type		= COMEDI_SUBD_UNUSED;
	}

	return 0;
}

static void apci1032_detach(struct comedi_device *dev)
{
	if (dev->iobase)
		apci1032_reset(dev);
	comedi_pci_detach(dev);
}

static struct comedi_driver apci1032_driver = {
	.driver_name	= "addi_apci_1032",
	.module		= THIS_MODULE,
	.auto_attach	= apci1032_auto_attach,
	.detach		= apci1032_detach,
};

static int apci1032_pci_probe(struct pci_dev *dev,
			      const struct pci_device_id *id)
{
	return comedi_pci_auto_config(dev, &apci1032_driver, id->driver_data);
}

static const struct pci_device_id apci1032_pci_table[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
	{ 0 }
};
MODULE_DEVICE_TABLE(pci, apci1032_pci_table);

static struct pci_driver apci1032_pci_driver = {
	.name		= "addi_apci_1032",
	.id_table	= apci1032_pci_table,
	.probe		= apci1032_pci_probe,
	.remove		= comedi_pci_auto_unconfig,
};
module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);

MODULE_AUTHOR("Comedi http://www.comedi.org");
MODULE_DESCRIPTION("ADDI-DATA APCI-1032, 32 channel DI boards");
MODULE_LICENSE("GPL");
Commit	Line	Data
6a3734af HS	1	/*
	2	* addi_apci_1032.c
	3	* Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
	4	* Project manager: Eric Stolz
	5	*
	6	* ADDI-DATA GmbH
	7	* Dieselstrasse 3
	8	* D-77833 Ottersweier
	9	* Tel: +19(0)7223/9493-0
	10	* Fax: +49(0)7223/9493-92
	11	* http://www.addi-data.com
	12	* info@addi-data.com
	13	*
	14	* This program is free software; you can redistribute it and/or modify it
	15	* under the terms of the GNU General Public License as published by the
	16	* Free Software Foundation; either version 2 of the License, or (at your
	17	* option) any later version.
	18	*
	19	* This program is distributed in the hope that it will be useful, but WITHOUT
	20	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	21	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	22	* more details.
6a3734af HS	23	*/
6a3734af HS	24
119c9643 IA	25	/*
	26	* Driver: addi_apci_1032
	27	* Description: ADDI-DATA APCI-1032 Digital Input Board
	28	* Author: ADDI-DATA GmbH <info@addi-data.com>,
	29	* H Hartley Sweeten <hsweeten@visionengravers.com>
	30	* Status: untested
	31	* Devices: [ADDI-DATA] APCI-1032 (addi_apci_1032)
	32	*
	33	* Configuration options:
	34	* None; devices are configured automatically.
	35	*
	36	* This driver models the APCI-1032 as a 32-channel, digital input subdevice
	37	* plus an additional digital input subdevice to handle change-of-state (COS)
	38	* interrupts (if an interrupt handler can be set up successfully).
	39	*
	40	* The COS subdevice supports comedi asynchronous read commands.
	41	*
	42	* Change-Of-State (COS) interrupt configuration:
	43	*
	44	* Channels 0 to 15 are interruptible. These channels can be configured
	45	* to generate interrupts based on AND/OR logic for the desired channels.
	46	*
	47	* OR logic:
	48	* - reacts to rising or falling edges
	49	* - interrupt is generated when any enabled channel meets the desired
	50	* interrupt condition
	51	*
	52	* AND logic:
	53	* - reacts to changes in level of the selected inputs
	54	* - interrupt is generated when all enabled channels meet the desired
	55	* interrupt condition
	56	* - after an interrupt, a change in level must occur on the selected
	57	* inputs to release the IRQ logic
	58	*
	59	* The COS subdevice must be configured before setting up a comedi
	60	* asynchronous command:
	61	*
	62	* data[0] : INSN_CONFIG_DIGITAL_TRIG
	63	* data[1] : trigger number (= 0)
	64	* data[2] : configuration operation:
	65	* - COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
	66	* - COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
	67	* - COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
	68	* data[3] : left-shift for data[4] and data[5]
	69	* data[4] : rising-edge/high level channels
	70	* data[5] : falling-edge/low level channels
	71	*/
	72
ce157f80	73	#include <linux/module.h>
33782dd5	74	#include <linux/pci.h>
abac8b54 HS	75	#include <linux/interrupt.h>
abac8b54 HS	76
3d41c443 HS	77	#include "../comedidev.h"
3d41c443 HS	78	#include "comedi_fc.h"
792660d5	79	#include "amcc_s5933.h"
3d41c443	80
6a3734af HS	81	/*
	82	* I/O Register Map
	83	*/
	84	#define APCI1032_DI_REG 0x00
	85	#define APCI1032_MODE1_REG 0x04
	86	#define APCI1032_MODE2_REG 0x08
	87	#define APCI1032_STATUS_REG 0x0c
	88	#define APCI1032_CTRL_REG 0x10
	89	#define APCI1032_CTRL_INT_OR (0 << 1)
	90	#define APCI1032_CTRL_INT_AND (1 << 1)
	91	#define APCI1032_CTRL_INT_ENA (1 << 2)
	92
4cde0a6d	93	struct apci1032_private {
792660d5	94	unsigned long amcc_iobase; /* base of AMCC I/O registers */
4cde0a6d HS	95	unsigned int mode1; /* rising-edge/high level channels */
	96	unsigned int mode2; /* falling-edge/low level channels */
	97	unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
	98	};
6a3734af	99
4cde0a6d HS	100	static int apci1032_reset(struct comedi_device *dev)
	101	{
	102	/* disable the interrupts */
	103	outl(0x0, dev->iobase + APCI1032_CTRL_REG);
	104	/* Reset the interrupt status register */
	105	inl(dev->iobase + APCI1032_STATUS_REG);
	106	/* Disable the and/or interrupt */
	107	outl(0x0, dev->iobase + APCI1032_MODE1_REG);
	108	outl(0x0, dev->iobase + APCI1032_MODE2_REG);
	109
	110	return 0;
	111	}
6a3734af	112
4cde0a6d HS	113	static int apci1032_cos_insn_config(struct comedi_device *dev,
	114	struct comedi_subdevice *s,
	115	struct comedi_insn *insn,
	116	unsigned int *data)
6a3734af	117	{
4cde0a6d	118	struct apci1032_private *devpriv = dev->private;
33cdce62	119	unsigned int shift, oldmask;
4cde0a6d HS	120
	121	switch (data[0]) {
	122	case INSN_CONFIG_DIGITAL_TRIG:
33cdce62 IA	123	if (data[1] != 0)
	124	return -EINVAL;
	125	shift = data[3];
	126	oldmask = (1U << shift) - 1;
	127	switch (data[2]) {
	128	case COMEDI_DIGITAL_TRIG_DISABLE:
4cde0a6d	129	devpriv->ctrl = 0;
33cdce62 IA	130	devpriv->mode1 = 0;
33cdce62 IA	131	devpriv->mode2 = 0;
4cde0a6d	132	apci1032_reset(dev);
33cdce62 IA	133	break;
	134	case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
	135	if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA \|
	136	APCI1032_CTRL_INT_OR)) {
	137	/* switching to 'OR' mode */
	138	devpriv->ctrl = APCI1032_CTRL_INT_ENA \|
	139	APCI1032_CTRL_INT_OR;
	140	/* wipe old channels */
	141	devpriv->mode1 = 0;
	142	devpriv->mode2 = 0;
	143	} else {
	144	/* preserve unspecified channels */
	145	devpriv->mode1 &= oldmask;
	146	devpriv->mode2 &= oldmask;
	147	}
	148	/* configure specified channels */
	149	devpriv->mode1 \|= data[4] << shift;
	150	devpriv->mode2 \|= data[5] << shift;
	151	break;
	152	case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
	153	if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA \|
	154	APCI1032_CTRL_INT_AND)) {
	155	/* switching to 'AND' mode */
	156	devpriv->ctrl = APCI1032_CTRL_INT_ENA \|
	157	APCI1032_CTRL_INT_AND;
	158	/* wipe old channels */
	159	devpriv->mode1 = 0;
	160	devpriv->mode2 = 0;
	161	} else {
	162	/* preserve unspecified channels */
	163	devpriv->mode1 &= oldmask;
	164	devpriv->mode2 &= oldmask;
	165	}
	166	/* configure specified channels */
	167	devpriv->mode1 \|= data[4] << shift;
	168	devpriv->mode2 \|= data[5] << shift;
	169	break;
	170	default:
	171	return -EINVAL;
4cde0a6d HS	172	}
	173	break;
	174	default:
	175	return -EINVAL;
	176	}
6a3734af HS	177
	178	return insn->n;
	179	}
2bb8b1df	180
4cde0a6d HS	181	static int apci1032_cos_insn_bits(struct comedi_device *dev,
	182	struct comedi_subdevice *s,
	183	struct comedi_insn *insn,
	184	unsigned int *data)
	185	{
	186	data[1] = s->state;
	187
	188	return 0;
	189	}
	190
	191	static int apci1032_cos_cmdtest(struct comedi_device *dev,
	192	struct comedi_subdevice *s,
	193	struct comedi_cmd *cmd)
	194	{
	195	int err = 0;
	196
	197	/* Step 1 : check if triggers are trivially valid */
	198
	199	err \|= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
	200	err \|= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
	201	err \|= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
	202	err \|= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
	203	err \|= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
	204
	205	if (err)
	206	return 1;
	207
	208	/* Step 2a : make sure trigger sources are unique */
	209	/* Step 2b : and mutually compatible */
	210
58bed93e	211	/* Step 3: check if arguments are trivially valid */
4cde0a6d	212
58bed93e HS	213	err \|= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
	214	err \|= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
	215	err \|= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
f50cebb9	216	err \|= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
58bed93e	217	err \|= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
4cde0a6d HS	218
	219	if (err)
	220	return 3;
	221
d0be9430	222	/* Step 4: fix up any arguments */
4cde0a6d	223
d0be9430	224	/* Step 5: check channel list if it exists */
4cde0a6d HS	225
	226	return 0;
	227	}
	228
	229	/*
	230	* Change-Of-State (COS) 'do_cmd' operation
	231	*
	232	* Enable the COS interrupt as configured by apci1032_cos_insn_config().
	233	*/
	234	static int apci1032_cos_cmd(struct comedi_device *dev,
	235	struct comedi_subdevice *s)
	236	{
	237	struct apci1032_private *devpriv = dev->private;
	238
	239	if (!devpriv->ctrl) {
	240	dev_warn(dev->class_dev,
6c7d2c8b	241	"Interrupts disabled due to mode configuration!\n");
4cde0a6d HS	242	return -EINVAL;
	243	}
	244
	245	outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
	246	outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
	247	outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);
	248
	249	return 0;
	250	}
	251
	252	static int apci1032_cos_cancel(struct comedi_device *dev,
	253	struct comedi_subdevice *s)
	254	{
	255	return apci1032_reset(dev);
	256	}
	257
12d606f7	258	static irqreturn_t apci1032_interrupt(int irq, void *d)
2bb8b1df	259	{
12d606f7	260	struct comedi_device *dev = d;
792660d5	261	struct apci1032_private *devpriv = dev->private;
4cde0a6d	262	struct comedi_subdevice *s = dev->read_subdev;
12d606f7 HS	263	unsigned int ctrl;
12d606f7 HS	264
792660d5 IA	265	/* check interrupt is from this device */
	266	if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
	267	INTCSR_INTR_ASSERTED) == 0)
	268	return IRQ_NONE;
	269
	270	/* check interrupt is enabled */
12d606f7	271	ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
792660d5 IA	272	if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
	273	return IRQ_HANDLED;
	274
	275	/* disable the interrupt */
12d606f7 HS	276	outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
12d606f7 HS	277
4cde0a6d	278	s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
6bb45f2b	279	comedi_buf_write_samples(s, &s->state, 1);
c8fd3539	280	comedi_handle_events(dev, s);
12d606f7 HS	281
	282	/* enable the interrupt */
	283	outl(ctrl, dev->iobase + APCI1032_CTRL_REG);
	284
	285	return IRQ_HANDLED;
2bb8b1df HS	286	}
2bb8b1df HS	287
a3de4cd3 HS	288	static int apci1032_di_insn_bits(struct comedi_device *dev,
	289	struct comedi_subdevice *s,
	290	struct comedi_insn *insn,
	291	unsigned int *data)
	292	{
	293	data[1] = inl(dev->iobase + APCI1032_DI_REG);
	294
	295	return insn->n;
	296	}
	297
a690b7e5	298	static int apci1032_auto_attach(struct comedi_device *dev,
6c7d2c8b	299	unsigned long context_unused)
2bb8b1df	300	{
891e62c3	301	struct pci_dev *pcidev = comedi_to_pci_dev(dev);
4cde0a6d	302	struct apci1032_private *devpriv;
2bb8b1df	303	struct comedi_subdevice *s;
b37f84d5	304	int ret;
2bb8b1df	305
0bdab509	306	devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
4cde0a6d HS	307	if (!devpriv)
4cde0a6d HS	308	return -ENOMEM;
4cde0a6d	309
818f569f	310	ret = comedi_pci_enable(dev);
2bb8b1df HS	311	if (ret)
	312	return ret;
	313
792660d5	314	devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
c965c8b7	315	dev->iobase = pci_resource_start(pcidev, 1);
792660d5	316	apci1032_reset(dev);
2bb8b1df	317	if (pcidev->irq > 0) {
12d606f7	318	ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
2bb8b1df HS	319	dev->board_name, dev);
	320	if (ret == 0)
	321	dev->irq = pcidev->irq;
	322	}
	323
6835a17a	324	ret = comedi_alloc_subdevices(dev, 2);
2bb8b1df HS	325	if (ret)
	326	return ret;
	327
2bb8b1df	328	/* Allocate and Initialise DI Subdevice Structures */
b37f84d5	329	s = &dev->subdevices[0];
4c2c1488 HS	330	s->type = COMEDI_SUBD_DI;
	331	s->subdev_flags = SDF_READABLE;
	332	s->n_chan = 32;
	333	s->maxdata = 1;
4c2c1488	334	s->range_table = &range_digital;
a3de4cd3	335	s->insn_bits = apci1032_di_insn_bits;
5dbdbf67	336
4cde0a6d HS	337	/* Change-Of-State (COS) interrupt subdevice */
4cde0a6d HS	338	s = &dev->subdevices[1];
6835a17a	339	if (dev->irq) {
4cde0a6d	340	dev->read_subdev = s;
90daf69a HS	341	s->type = COMEDI_SUBD_DI;
90daf69a HS	342	s->subdev_flags = SDF_READABLE \| SDF_CMD_READ;
6835a17a HS	343	s->n_chan = 1;
	344	s->maxdata = 1;
	345	s->range_table = &range_digital;
4cde0a6d HS	346	s->insn_config = apci1032_cos_insn_config;
4cde0a6d HS	347	s->insn_bits = apci1032_cos_insn_bits;
f50cebb9	348	s->len_chanlist = 1;
4cde0a6d HS	349	s->do_cmdtest = apci1032_cos_cmdtest;
	350	s->do_cmd = apci1032_cos_cmd;
	351	s->cancel = apci1032_cos_cancel;
	352	} else {
	353	s->type = COMEDI_SUBD_UNUSED;
6835a17a HS	354	}
6835a17a HS	355
2bb8b1df HS	356	return 0;
	357	}
	358
	359	static void apci1032_detach(struct comedi_device *dev)
	360	{
14696bbe HS	361	if (dev->iobase)
14696bbe HS	362	apci1032_reset(dev);
aac307f9	363	comedi_pci_detach(dev);
2bb8b1df HS	364	}
2bb8b1df HS	365
20a22b70 HS	366	static struct comedi_driver apci1032_driver = {
	367	.driver_name = "addi_apci_1032",
	368	.module = THIS_MODULE,
891e62c3	369	.auto_attach = apci1032_auto_attach,
2bb8b1df	370	.detach = apci1032_detach,
20a22b70 HS	371	};
20a22b70 HS	372
a690b7e5	373	static int apci1032_pci_probe(struct pci_dev *dev,
b8f4ac23	374	const struct pci_device_id *id)
20a22b70	375	{
b8f4ac23	376	return comedi_pci_auto_config(dev, &apci1032_driver, id->driver_data);
20a22b70 HS	377	}
20a22b70 HS	378
41e043fc	379	static const struct pci_device_id apci1032_pci_table[] = {
317285d7 HS	380	{ PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
	381	{ 0 }
	382	};
20a22b70	383	MODULE_DEVICE_TABLE(pci, apci1032_pci_table);
317285d7	384
20a22b70 HS	385	static struct pci_driver apci1032_pci_driver = {
	386	.name = "addi_apci_1032",
	387	.id_table = apci1032_pci_table,
	388	.probe = apci1032_pci_probe,
9901a4d7	389	.remove = comedi_pci_auto_unconfig,
20a22b70 HS	390	};
20a22b70 HS	391	module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);
90f703d3 AT	392
90f703d3 AT	393	MODULE_AUTHOR("Comedi http://www.comedi.org");
b5ebcaa8	394	MODULE_DESCRIPTION("ADDI-DATA APCI-1032, 32 channel DI boards");
90f703d3	395	MODULE_LICENSE("GPL");