[linux-2.6-block.git] / drivers / staging / comedi / drivers / addi-data / hwdrv_apci3120.h


// hwdrv_apci3120.h

/*
 * Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
 *
 *	ADDI-DATA GmbH
 *	Dieselstrasse 3
 *	D-77833 Ottersweier
 *	Tel: +19(0)7223/9493-0
 *	Fax: +49(0)7223/9493-92
 *	http://www.addi-data-com
 *	info@addi-data.com
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the Free
 * Software Foundation; either version 2 of the License, or (at your option)
 * any later version.
 */

// comedi related defines

//ANALOG INPUT RANGE
static const struct comedi_lrange range_apci3120_ai = { 8, {
						     BIP_RANGE(10),
						     BIP_RANGE(5),
						     BIP_RANGE(2),
						     BIP_RANGE(1),
						     UNI_RANGE(10),
						     UNI_RANGE(5),
						     UNI_RANGE(2),
						     UNI_RANGE(1)
						     }
};

// ANALOG OUTPUT RANGE
static const struct comedi_lrange range_apci3120_ao = { 2, {
						     BIP_RANGE(10),
						     UNI_RANGE(10)
						     }
};

#define APCI3120_BIPOLAR_RANGES	4	// used for test on mixture of BIP/UNI ranges

#define APCI3120_BOARD_VENDOR_ID                 0x10E8
#define APCI3120_ADDRESS_RANGE            			16

#define APCI3120_DISABLE                         0
#define APCI3120_ENABLE                          1

#define APCI3120_START                           1
#define APCI3120_STOP                            0

#define     APCI3120_EOC_MODE         1
#define     APCI3120_EOS_MODE         2
#define     APCI3120_DMA_MODE         3

//DIGITAL INPUT-OUTPUT DEFINE

#define APCI3120_DIGITAL_OUTPUT                  	0x0D
#define APCI3120_RD_STATUS                       	0x02
#define APCI3120_RD_FIFO                     		0x00

// digital output insn_write ON /OFF selection
#define	APCI3120_SET4DIGITALOUTPUTON				1
#define APCI3120_SET4DIGITALOUTPUTOFF				0

// analog output SELECT BIT
#define APCI3120_ANALOG_OP_CHANNEL_1   0x0000
#define APCI3120_ANALOG_OP_CHANNEL_2   0x4000
#define APCI3120_ANALOG_OP_CHANNEL_3   0x8000
#define APCI3120_ANALOG_OP_CHANNEL_4   0xC000
#define APCI3120_ANALOG_OP_CHANNEL_5   0x0000
#define APCI3120_ANALOG_OP_CHANNEL_6   0x4000
#define APCI3120_ANALOG_OP_CHANNEL_7   0x8000
#define APCI3120_ANALOG_OP_CHANNEL_8   0xC000

// Enable external trigger bit in nWrAddress
#define APCI3120_ENABLE_EXT_TRIGGER    0x8000

//ANALOG OUTPUT AND INPUT DEFINE
#define APCI3120_UNIPOLAR 0x80	//$$ RAM sequence polarity BIT
#define APCI3120_BIPOLAR  0x00	//$$ RAM sequence polarity BIT
#define APCI3120_ANALOG_OUTPUT_1 0x08	// (ADDRESS )
#define APCI3120_ANALOG_OUTPUT_2 0x0A	// (ADDRESS )
#define APCI3120_1_GAIN              0x00	//$$ RAM sequence Gain Bits for gain 1
#define APCI3120_2_GAIN              0x10	//$$ RAM sequence Gain Bits for gain 2
#define APCI3120_5_GAIN              0x20	//$$ RAM sequence Gain Bits for gain 5
#define APCI3120_10_GAIN             0x30	//$$ RAM sequence Gain Bits for gain 10
#define APCI3120_SEQ_RAM_ADDRESS        0x06	//$$ EARLIER NAMED APCI3120_FIFO_ADDRESS
#define APCI3120_RESET_FIFO          0x0C	//(ADDRESS)
#define APCI3120_TIMER_0_MODE_2      0x01	//$$ Bits for timer mode
#define APCI3120_TIMER_0_MODE_4       0x2
#define APCI3120_SELECT_TIMER_0_WORD 0x00
#define APCI3120_ENABLE_TIMER0     0x1000	//$$Gatebit 0 in nWrAddress
#define APCI3120_CLEAR_PR          0xF0FF
#define APCI3120_CLEAR_PA          0xFFF0
#define APCI3120_CLEAR_PA_PR       (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)

// nWrMode_Select
#define APCI3120_ENABLE_SCAN          0x8	//$$ bit in nWrMode_Select
#define APCI3120_DISABLE_SCAN      (~APCI3120_ENABLE_SCAN)
#define APCI3120_ENABLE_EOS_INT       0x2	//$$ bit in nWrMode_Select

#define APCI3120_DISABLE_EOS_INT   (~APCI3120_ENABLE_EOS_INT)
#define APCI3120_ENABLE_EOC_INT       0x1
#define APCI3120_DISABLE_EOC_INT   (~APCI3120_ENABLE_EOC_INT)
#define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER   (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
#define APCI3120_DISABLE_ALL_INTERRUPT   (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)

//status register bits
#define APCI3120_EOC                     0x8000
#define APCI3120_EOS                     0x2000

// software trigger dummy register
#define APCI3120_START_CONVERSION        0x02	//(ADDRESS)

//TIMER DEFINE
#define APCI3120_QUARTZ_A				  70
#define APCI3120_QUARTZ_B				  50
#define APCI3120_TIMER                            1
#define APCI3120_WATCHDOG                         2
#define APCI3120_TIMER_DISABLE                    0
#define APCI3120_TIMER_ENABLE                     1
#define APCI3120_ENABLE_TIMER2                    0x4000	//$$ gatebit 2 in nWrAddress
#define APCI3120_DISABLE_TIMER2                   (~APCI3120_ENABLE_TIMER2)
#define APCI3120_ENABLE_TIMER_INT                 0x04	//$$ ENAIRQ_FC_Bit in nWrModeSelect
#define APCI3120_DISABLE_TIMER_INT                (~APCI3120_ENABLE_TIMER_INT)
#define APCI3120_WRITE_MODE_SELECT                0x0E	// (ADDRESS)
#define APCI3120_SELECT_TIMER_0_WORD  0x00
#define APCI3120_SELECT_TIMER_1_WORD  0x01
#define APCI3120_TIMER_1_MODE_2       0x4

//$$ BIT FOR MODE IN nCsTimerCtr1
#define APCI3120_TIMER_2_MODE_0                   0x0
#define APCI3120_TIMER_2_MODE_2                   0x10
#define APCI3120_TIMER_2_MODE_5                   0x30

//$$ BIT FOR MODE IN nCsTimerCtr0
#define APCI3120_SELECT_TIMER_2_LOW_WORD          0x02
#define APCI3120_SELECT_TIMER_2_HIGH_WORD         0x03

#define APCI3120_TIMER_CRT0                       0x0D	//(ADDRESS for cCsTimerCtr0)
#define APCI3120_TIMER_CRT1                       0x0C	//(ADDRESS for cCsTimerCtr1)

#define APCI3120_TIMER_VALUE                      0x04	//ADDRESS for nCsTimerWert
#define APCI3120_TIMER_STATUS_REGISTER            0x0D	//ADDRESS for delete timer 2 interrupt
#define APCI3120_RD_STATUS                        0x02	//ADDRESS
#define APCI3120_WR_ADDRESS                       0x00	//ADDRESS
#define APCI3120_ENABLE_WATCHDOG                  0x20	//$$BIT in nWrMode_Select
#define APCI3120_DISABLE_WATCHDOG                 (~APCI3120_ENABLE_WATCHDOG)
#define APCI3120_ENABLE_TIMER_COUNTER    		  0x10	//$$BIT in nWrMode_Select
#define APCI3120_DISABLE_TIMER_COUNTER            (~APCI3120_ENABLE_TIMER_COUNTER)
#define APCI3120_FC_TIMER                         0x1000	//bit in  status register
#define APCI3120_ENABLE_TIMER0                    0x1000
#define APCI3120_ENABLE_TIMER1                    0x2000
#define APCI3120_ENABLE_TIMER2                    0x4000
#define APCI3120_DISABLE_TIMER0			          (~APCI3120_ENABLE_TIMER0)
#define APCI3120_DISABLE_TIMER1		              (~APCI3120_ENABLE_TIMER1)
#define APCI3120_DISABLE_TIMER2	                  (~APCI3120_ENABLE_TIMER2)

#define APCI3120_TIMER2_SELECT_EOS                0xC0	// ADDED on 20-6
#define APCI3120_COUNTER                          3	// on 20-6
#define APCI3120_DISABLE_ALL_TIMER                ( APCI3120_DISABLE_TIMER0 & APCI3120_DISABLE_TIMER1 & APCI3120_DISABLE_TIMER2 )	// on 20-6

#define MAX_ANALOGINPUT_CHANNELS    32

typedef struct {
	BYTE b_Type;		/* EOC or EOS */
	BYTE b_InterruptFlag;	/* Interrupt use or not                    */
	UINT ui_ConvertTiming;	/* Selection of the convertion time        */
	BYTE b_NbrOfChannel;	/* Number of channel to read               */
	UINT ui_ChannelList[MAX_ANALOGINPUT_CHANNELS];	/* Number of the channel to be read        */
	UINT ui_RangeList[MAX_ANALOGINPUT_CHANNELS];	/* Gain of each channel                    */

} str_AnalogReadInformation;

// Function Declaration For APCI-3120

// Internal functions
int i_APCI3120_SetupChannelList(struct comedi_device *dev, struct comedi_subdevice *s,
				int n_chan, unsigned int *chanlist, char check);
int i_APCI3120_ExttrigEnable(struct comedi_device *dev);
int i_APCI3120_ExttrigDisable(struct comedi_device *dev);
int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
int i_APCI3120_Reset(struct comedi_device *dev);
int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
				 struct comedi_subdevice *s);
// Interrupt functions
void v_APCI3120_Interrupt(int irq, void *d);
//UPDATE-0.7.57->0.7.68 void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,struct comedi_subdevice *s,short *dma,short *data,int n);
void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
					   struct comedi_subdevice *s,
					   short *dma_buffer,
					   unsigned int num_samples);
int i_APCI3120_InterruptHandleEos(struct comedi_device *dev);
void v_APCI3120_InterruptDma(int irq, void *d);

// TIMER

int i_APCI3120_InsnConfigTimer(struct comedi_device *dev, struct comedi_subdevice *s,
			       comedi_insn *insn, unsigned int *data);
int i_APCI3120_InsnWriteTimer(struct comedi_device *dev, struct comedi_subdevice *s,
			      comedi_insn *insn, unsigned int *data);
int i_APCI3120_InsnReadTimer(struct comedi_device *dev, struct comedi_subdevice *s,
			     comedi_insn *insn, unsigned int *data);

//DI
// for di read

int i_APCI3120_InsnBitsDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
				    comedi_insn *insn, unsigned int *data);
int i_APCI3120_InsnReadDigitalInput(struct comedi_device *dev, struct comedi_subdevice *s,
				    comedi_insn *insn, unsigned int *data);

//DO
//int i_APCI3120_WriteDigitalOutput(struct comedi_device *dev, BYTE data);
int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev,
				       struct comedi_subdevice *s, comedi_insn *insn,
				       unsigned int *data);
int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
				     comedi_insn *insn, unsigned int *data);
int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device *dev, struct comedi_subdevice *s,
				      comedi_insn *insn, unsigned int *data);

//AO
//int i_APCI3120_Write1AnalogValue(struct comedi_device *dev,UINT ui_Range,UINT ui_Channel,UINT data );
int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device *dev, struct comedi_subdevice *s,
				     comedi_insn *insn, unsigned int *data);

//AI HArdware layer

int i_APCI3120_InsnConfigAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
				     comedi_insn *insn, unsigned int *data);
int i_APCI3120_InsnReadAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
				   comedi_insn *insn, unsigned int *data);
int i_APCI3120_CommandTestAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s,
				      struct comedi_cmd *cmd);
int i_APCI3120_CommandAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s);
//int i_APCI3120_CancelAnalogInput(struct comedi_device *dev, struct comedi_subdevice *s);
int i_APCI3120_StopCyclicAcquisition(struct comedi_device *dev, struct comedi_subdevice *s);
Commit	Line	Data
c995fe94 ADG	1
	2	// hwdrv_apci3120.h
	3
c995fe94	4	/*
15d8826a GKH	5	* Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
	6	*
	7	* ADDI-DATA GmbH
	8	* Dieselstrasse 3
	9	* D-77833 Ottersweier
	10	* Tel: +19(0)7223/9493-0
	11	* Fax: +49(0)7223/9493-92
	12	* http://www.addi-data-com
	13	* info@addi-data.com
	14	*
	15	* This program is free software; you can redistribute it and/or modify it
	16	* under the terms of the GNU General Public License as published by the Free
	17	* Software Foundation; either version 2 of the License, or (at your option)
	18	* any later version.
	19	*/
c995fe94 ADG	20
	21	// comedi related defines
	22
	23	//ANALOG INPUT RANGE
9ced1de6	24	static const struct comedi_lrange range_apci3120_ai = { 8, {
15d8826a GKH	25	BIP_RANGE(10),
	26	BIP_RANGE(5),
	27	BIP_RANGE(2),
	28	BIP_RANGE(1),
	29	UNI_RANGE(10),
	30	UNI_RANGE(5),
	31	UNI_RANGE(2),
	32	UNI_RANGE(1)
	33	}
c995fe94 ADG	34	};
	35
	36	// ANALOG OUTPUT RANGE
9ced1de6	37	static const struct comedi_lrange range_apci3120_ao = { 2, {
15d8826a GKH	38	BIP_RANGE(10),
	39	UNI_RANGE(10)
	40	}
c995fe94 ADG	41	};
	42
	43	#define APCI3120_BIPOLAR_RANGES 4 // used for test on mixture of BIP/UNI ranges
	44
	45	#define APCI3120_BOARD_VENDOR_ID 0x10E8
	46	#define APCI3120_ADDRESS_RANGE 16
	47
	48	#define APCI3120_DISABLE 0
	49	#define APCI3120_ENABLE 1
	50
	51	#define APCI3120_START 1
	52	#define APCI3120_STOP 0
	53
	54	#define APCI3120_EOC_MODE 1
	55	#define APCI3120_EOS_MODE 2
	56	#define APCI3120_DMA_MODE 3
	57
	58	//DIGITAL INPUT-OUTPUT DEFINE
	59
	60	#define APCI3120_DIGITAL_OUTPUT 0x0D
	61	#define APCI3120_RD_STATUS 0x02
	62	#define APCI3120_RD_FIFO 0x00
	63
	64	// digital output insn_write ON /OFF selection
	65	#define APCI3120_SET4DIGITALOUTPUTON 1
	66	#define APCI3120_SET4DIGITALOUTPUTOFF 0
	67
	68	// analog output SELECT BIT
	69	#define APCI3120_ANALOG_OP_CHANNEL_1 0x0000
	70	#define APCI3120_ANALOG_OP_CHANNEL_2 0x4000
	71	#define APCI3120_ANALOG_OP_CHANNEL_3 0x8000
	72	#define APCI3120_ANALOG_OP_CHANNEL_4 0xC000
	73	#define APCI3120_ANALOG_OP_CHANNEL_5 0x0000
	74	#define APCI3120_ANALOG_OP_CHANNEL_6 0x4000
	75	#define APCI3120_ANALOG_OP_CHANNEL_7 0x8000
	76	#define APCI3120_ANALOG_OP_CHANNEL_8 0xC000
	77
	78	// Enable external trigger bit in nWrAddress
	79	#define APCI3120_ENABLE_EXT_TRIGGER 0x8000
	80
	81	//ANALOG OUTPUT AND INPUT DEFINE
	82	#define APCI3120_UNIPOLAR 0x80 //$$ RAM sequence polarity BIT
	83	#define APCI3120_BIPOLAR 0x00 //$$ RAM sequence polarity BIT
	84	#define APCI3120_ANALOG_OUTPUT_1 0x08 // (ADDRESS )
	85	#define APCI3120_ANALOG_OUTPUT_2 0x0A // (ADDRESS )
	86	#define APCI3120_1_GAIN 0x00 //$$ RAM sequence Gain Bits for gain 1
	87	#define APCI3120_2_GAIN 0x10 //$$ RAM sequence Gain Bits for gain 2
	88	#define APCI3120_5_GAIN 0x20 //$$ RAM sequence Gain Bits for gain 5
	89	#define APCI3120_10_GAIN 0x30 //$$ RAM sequence Gain Bits for gain 10
	90	#define APCI3120_SEQ_RAM_ADDRESS 0x06 //$$ EARLIER NAMED APCI3120_FIFO_ADDRESS
	91	#define APCI3120_RESET_FIFO 0x0C //(ADDRESS)
	92	#define APCI3120_TIMER_0_MODE_2 0x01 //$$ Bits for timer mode
	93	#define APCI3120_TIMER_0_MODE_4 0x2
	94	#define APCI3120_SELECT_TIMER_0_WORD 0x00
	95	#define APCI3120_ENABLE_TIMER0 0x1000 //$$Gatebit 0 in nWrAddress
	96	#define APCI3120_CLEAR_PR 0xF0FF
	97	#define APCI3120_CLEAR_PA 0xFFF0
	98	#define APCI3120_CLEAR_PA_PR (APCI3120_CLEAR_PR & APCI3120_CLEAR_PA)
	99
	100	// nWrMode_Select
	101	#define APCI3120_ENABLE_SCAN 0x8 //$$ bit in nWrMode_Select
	102	#define APCI3120_DISABLE_SCAN (~APCI3120_ENABLE_SCAN)
	103	#define APCI3120_ENABLE_EOS_INT 0x2 //$$ bit in nWrMode_Select
	104
105	#define APCI3120_DISABLE_EOS_INT (~APCI3120_ENABLE_EOS_INT)
106	#define APCI3120_ENABLE_EOC_INT 0x1
107	#define APCI3120_DISABLE_EOC_INT (~APCI3120_ENABLE_EOC_INT)
108	#define APCI3120_DISABLE_ALL_INTERRUPT_WITHOUT_TIMER (APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
109	#define APCI3120_DISABLE_ALL_INTERRUPT (APCI3120_DISABLE_TIMER_INT & APCI3120_DISABLE_EOS_INT & APCI3120_DISABLE_EOC_INT)
110
111	//status register bits
112	#define APCI3120_EOC 0x8000
113	#define APCI3120_EOS 0x2000
114
115	// software trigger dummy register
116	#define APCI3120_START_CONVERSION 0x02 //(ADDRESS)
117
118	//TIMER DEFINE
119	#define APCI3120_QUARTZ_A 70
120	#define APCI3120_QUARTZ_B 50
121	#define APCI3120_TIMER 1
122	#define APCI3120_WATCHDOG 2
123	#define APCI3120_TIMER_DISABLE 0
124	#define APCI3120_TIMER_ENABLE 1
125	#define APCI3120_ENABLE_TIMER2 0x4000 //$$ gatebit 2 in nWrAddress
126	#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
127	#define APCI3120_ENABLE_TIMER_INT 0x04 //$$ ENAIRQ_FC_Bit in nWrModeSelect
128	#define APCI3120_DISABLE_TIMER_INT (~APCI3120_ENABLE_TIMER_INT)
129	#define APCI3120_WRITE_MODE_SELECT 0x0E // (ADDRESS)
130	#define APCI3120_SELECT_TIMER_0_WORD 0x00
131	#define APCI3120_SELECT_TIMER_1_WORD 0x01
132	#define APCI3120_TIMER_1_MODE_2 0x4
133
134	//$$ BIT FOR MODE IN nCsTimerCtr1
135	#define APCI3120_TIMER_2_MODE_0 0x0
136	#define APCI3120_TIMER_2_MODE_2 0x10
137	#define APCI3120_TIMER_2_MODE_5 0x30
138
139	//$$ BIT FOR MODE IN nCsTimerCtr0
140	#define APCI3120_SELECT_TIMER_2_LOW_WORD 0x02
141	#define APCI3120_SELECT_TIMER_2_HIGH_WORD 0x03
142
143	#define APCI3120_TIMER_CRT0 0x0D //(ADDRESS for cCsTimerCtr0)
144	#define APCI3120_TIMER_CRT1 0x0C //(ADDRESS for cCsTimerCtr1)
145
146	#define APCI3120_TIMER_VALUE 0x04 //ADDRESS for nCsTimerWert
147	#define APCI3120_TIMER_STATUS_REGISTER 0x0D //ADDRESS for delete timer 2 interrupt
148	#define APCI3120_RD_STATUS 0x02 //ADDRESS
149	#define APCI3120_WR_ADDRESS 0x00 //ADDRESS
150	#define APCI3120_ENABLE_WATCHDOG 0x20 //$$BIT in nWrMode_Select
151	#define APCI3120_DISABLE_WATCHDOG (~APCI3120_ENABLE_WATCHDOG)
152	#define APCI3120_ENABLE_TIMER_COUNTER 0x10 //$$BIT in nWrMode_Select
153	#define APCI3120_DISABLE_TIMER_COUNTER (~APCI3120_ENABLE_TIMER_COUNTER)
154	#define APCI3120_FC_TIMER 0x1000 //bit in status register
155	#define APCI3120_ENABLE_TIMER0 0x1000
156	#define APCI3120_ENABLE_TIMER1 0x2000
157	#define APCI3120_ENABLE_TIMER2 0x4000
158	#define APCI3120_DISABLE_TIMER0 (~APCI3120_ENABLE_TIMER0)
159	#define APCI3120_DISABLE_TIMER1 (~APCI3120_ENABLE_TIMER1)
160	#define APCI3120_DISABLE_TIMER2 (~APCI3120_ENABLE_TIMER2)
161
162	#define APCI3120_TIMER2_SELECT_EOS 0xC0 // ADDED on 20-6
163	#define APCI3120_COUNTER 3 // on 20-6
164	#define APCI3120_DISABLE_ALL_TIMER ( APCI3120_DISABLE_TIMER0 & APCI3120_DISABLE_TIMER1 & APCI3120_DISABLE_TIMER2 ) // on 20-6
165
166	#define MAX_ANALOGINPUT_CHANNELS 32
167
168	typedef struct {
169	BYTE b_Type; /* EOC or EOS */
170	BYTE b_InterruptFlag; /* Interrupt use or not */
171	UINT ui_ConvertTiming; /* Selection of the convertion time */
172	BYTE b_NbrOfChannel; /* Number of channel to read */
173	UINT ui_ChannelList[MAX_ANALOGINPUT_CHANNELS]; /* Number of the channel to be read */
174	UINT ui_RangeList[MAX_ANALOGINPUT_CHANNELS]; /* Gain of each channel */
175
176	} str_AnalogReadInformation;
177
178	// Function Declaration For APCI-3120
179
180	// Internal functions
34c43922	181	int i_APCI3120_SetupChannelList(struct comedi_device dev, struct comedi_subdevice s,
15d8826a	182	int n_chan, unsigned int *chanlist, char check);
71b5f4f1 BP	183	int i_APCI3120_ExttrigEnable(struct comedi_device *dev);
71b5f4f1 BP	184	int i_APCI3120_ExttrigDisable(struct comedi_device *dev);
34c43922	185	int i_APCI3120_StopCyclicAcquisition(struct comedi_device dev, struct comedi_subdevice s);
71b5f4f1 BP	186	int i_APCI3120_Reset(struct comedi_device *dev);
71b5f4f1 BP	187	int i_APCI3120_CyclicAnalogInput(int mode, struct comedi_device *dev,
34c43922	188	struct comedi_subdevice *s);
c995fe94 ADG	189	// Interrupt functions
c995fe94 ADG	190	void v_APCI3120_Interrupt(int irq, void *d);
34c43922	191	//UPDATE-0.7.57->0.7.68 void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device dev,struct comedi_subdevice s,short dma,short data,int n);
71b5f4f1	192	void v_APCI3120_InterruptDmaMoveBlock16bit(struct comedi_device *dev,
34c43922	193	struct comedi_subdevice *s,
790c5541	194	short *dma_buffer,
15d8826a	195	unsigned int num_samples);
71b5f4f1	196	int i_APCI3120_InterruptHandleEos(struct comedi_device *dev);
c995fe94 ADG	197	void v_APCI3120_InterruptDma(int irq, void *d);
	198
	199	// TIMER
	200
34c43922	201	int i_APCI3120_InsnConfigTimer(struct comedi_device dev, struct comedi_subdevice s,
790c5541	202	comedi_insn insn, unsigned int data);
34c43922	203	int i_APCI3120_InsnWriteTimer(struct comedi_device dev, struct comedi_subdevice s,
790c5541	204	comedi_insn insn, unsigned int data);
34c43922	205	int i_APCI3120_InsnReadTimer(struct comedi_device dev, struct comedi_subdevice s,
790c5541	206	comedi_insn insn, unsigned int data);
c995fe94 ADG	207
	208	//DI
	209	// for di read
	210
34c43922	211	int i_APCI3120_InsnBitsDigitalInput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	212	comedi_insn insn, unsigned int data);
34c43922	213	int i_APCI3120_InsnReadDigitalInput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	214	comedi_insn insn, unsigned int data);
c995fe94 ADG	215
c995fe94 ADG	216	//DO
71b5f4f1 BP	217	//int i_APCI3120_WriteDigitalOutput(struct comedi_device *dev, BYTE data);
71b5f4f1 BP	218	int i_APCI3120_InsnConfigDigitalOutput(struct comedi_device *dev,
34c43922	219	struct comedi_subdevice s, comedi_insn insn,
790c5541	220	unsigned int *data);
34c43922	221	int i_APCI3120_InsnBitsDigitalOutput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	222	comedi_insn insn, unsigned int data);
34c43922	223	int i_APCI3120_InsnWriteDigitalOutput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	224	comedi_insn insn, unsigned int data);
c995fe94 ADG	225
c995fe94 ADG	226	//AO
71b5f4f1	227	//int i_APCI3120_Write1AnalogValue(struct comedi_device *dev,UINT ui_Range,UINT ui_Channel,UINT data );
34c43922	228	int i_APCI3120_InsnWriteAnalogOutput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	229	comedi_insn insn, unsigned int data);
c995fe94 ADG	230
	231	//AI HArdware layer
	232
34c43922	233	int i_APCI3120_InsnConfigAnalogInput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	234	comedi_insn insn, unsigned int data);
34c43922	235	int i_APCI3120_InsnReadAnalogInput(struct comedi_device dev, struct comedi_subdevice s,
790c5541	236	comedi_insn insn, unsigned int data);
34c43922	237	int i_APCI3120_CommandTestAnalogInput(struct comedi_device dev, struct comedi_subdevice s,
ea6d0d4c	238	struct comedi_cmd *cmd);
34c43922 BP	239	int i_APCI3120_CommandAnalogInput(struct comedi_device dev, struct comedi_subdevice s);
	240	//int i_APCI3120_CancelAnalogInput(struct comedi_device dev, struct comedi_subdevice s);
	241	int i_APCI3120_StopCyclicAcquisition(struct comedi_device dev, struct comedi_subdevice s);