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1 | #ifndef LINUX_SSB_PRIVATE_H_ |
2 | #define LINUX_SSB_PRIVATE_H_ | |
3 | ||
4 | #include <linux/ssb/ssb.h> | |
5 | #include <linux/types.h> | |
7ffbffe3 | 6 | #include <linux/bcm47xx_wdt.h> |
61e115a5 MB |
7 | |
8 | ||
9 | #define PFX "ssb: " | |
10 | ||
11 | #ifdef CONFIG_SSB_SILENT | |
12 | # define ssb_printk(fmt, x...) do { /* nothing */ } while (0) | |
13 | #else | |
14 | # define ssb_printk printk | |
15 | #endif /* CONFIG_SSB_SILENT */ | |
16 | ||
17 | /* dprintk: Debugging printk; vanishes for non-debug compilation */ | |
18 | #ifdef CONFIG_SSB_DEBUG | |
19 | # define ssb_dprintk(fmt, x...) ssb_printk(fmt , ##x) | |
20 | #else | |
21 | # define ssb_dprintk(fmt, x...) do { /* nothing */ } while (0) | |
22 | #endif | |
23 | ||
24 | #ifdef CONFIG_SSB_DEBUG | |
25 | # define SSB_WARN_ON(x) WARN_ON(x) | |
26 | # define SSB_BUG_ON(x) BUG_ON(x) | |
27 | #else | |
28 | static inline int __ssb_do_nothing(int x) { return x; } | |
29 | # define SSB_WARN_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
30 | # define SSB_BUG_ON(x) __ssb_do_nothing(unlikely(!!(x))) | |
31 | #endif | |
32 | ||
33 | ||
34 | /* pci.c */ | |
35 | #ifdef CONFIG_SSB_PCIHOST | |
36 | extern int ssb_pci_switch_core(struct ssb_bus *bus, | |
37 | struct ssb_device *dev); | |
38 | extern int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
39 | u8 coreidx); | |
40 | extern int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
41 | int turn_on); | |
42 | extern int ssb_pci_get_invariants(struct ssb_bus *bus, | |
43 | struct ssb_init_invariants *iv); | |
44 | extern void ssb_pci_exit(struct ssb_bus *bus); | |
45 | extern int ssb_pci_init(struct ssb_bus *bus); | |
46 | extern const struct ssb_bus_ops ssb_pci_ops; | |
47 | ||
48 | #else /* CONFIG_SSB_PCIHOST */ | |
49 | ||
50 | static inline int ssb_pci_switch_core(struct ssb_bus *bus, | |
51 | struct ssb_device *dev) | |
52 | { | |
53 | return 0; | |
54 | } | |
55 | static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
56 | u8 coreidx) | |
57 | { | |
58 | return 0; | |
59 | } | |
60 | static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
61 | int turn_on) | |
62 | { | |
63 | return 0; | |
64 | } | |
65 | static inline void ssb_pci_exit(struct ssb_bus *bus) | |
66 | { | |
67 | } | |
68 | static inline int ssb_pci_init(struct ssb_bus *bus) | |
69 | { | |
70 | return 0; | |
71 | } | |
72 | #endif /* CONFIG_SSB_PCIHOST */ | |
73 | ||
74 | ||
75 | /* pcmcia.c */ | |
76 | #ifdef CONFIG_SSB_PCMCIAHOST | |
77 | extern int ssb_pcmcia_switch_core(struct ssb_bus *bus, | |
78 | struct ssb_device *dev); | |
79 | extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, | |
80 | u8 coreidx); | |
81 | extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
82 | u8 seg); | |
83 | extern int ssb_pcmcia_get_invariants(struct ssb_bus *bus, | |
84 | struct ssb_init_invariants *iv); | |
8fe2b65a | 85 | extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus); |
e7ec2e32 | 86 | extern void ssb_pcmcia_exit(struct ssb_bus *bus); |
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87 | extern int ssb_pcmcia_init(struct ssb_bus *bus); |
88 | extern const struct ssb_bus_ops ssb_pcmcia_ops; | |
89 | #else /* CONFIG_SSB_PCMCIAHOST */ | |
90 | static inline int ssb_pcmcia_switch_core(struct ssb_bus *bus, | |
91 | struct ssb_device *dev) | |
92 | { | |
93 | return 0; | |
94 | } | |
95 | static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, | |
96 | u8 coreidx) | |
97 | { | |
98 | return 0; | |
99 | } | |
100 | static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
101 | u8 seg) | |
102 | { | |
103 | return 0; | |
104 | } | |
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105 | static inline int ssb_pcmcia_hardware_setup(struct ssb_bus *bus) |
106 | { | |
107 | return 0; | |
108 | } | |
e7ec2e32 MB |
109 | static inline void ssb_pcmcia_exit(struct ssb_bus *bus) |
110 | { | |
111 | } | |
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112 | static inline int ssb_pcmcia_init(struct ssb_bus *bus) |
113 | { | |
114 | return 0; | |
115 | } | |
116 | #endif /* CONFIG_SSB_PCMCIAHOST */ | |
117 | ||
24ea602e AH |
118 | /* sdio.c */ |
119 | #ifdef CONFIG_SSB_SDIOHOST | |
120 | extern int ssb_sdio_get_invariants(struct ssb_bus *bus, | |
121 | struct ssb_init_invariants *iv); | |
122 | ||
123 | extern u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset); | |
124 | extern int ssb_sdio_switch_core(struct ssb_bus *bus, struct ssb_device *dev); | |
125 | extern int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx); | |
126 | extern int ssb_sdio_hardware_setup(struct ssb_bus *bus); | |
127 | extern void ssb_sdio_exit(struct ssb_bus *bus); | |
128 | extern int ssb_sdio_init(struct ssb_bus *bus); | |
129 | ||
130 | extern const struct ssb_bus_ops ssb_sdio_ops; | |
131 | #else /* CONFIG_SSB_SDIOHOST */ | |
132 | static inline u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset) | |
133 | { | |
134 | return 0; | |
135 | } | |
136 | static inline int ssb_sdio_switch_core(struct ssb_bus *bus, | |
137 | struct ssb_device *dev) | |
138 | { | |
139 | return 0; | |
140 | } | |
141 | static inline int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx) | |
142 | { | |
143 | return 0; | |
144 | } | |
145 | static inline int ssb_sdio_hardware_setup(struct ssb_bus *bus) | |
146 | { | |
147 | return 0; | |
148 | } | |
149 | static inline void ssb_sdio_exit(struct ssb_bus *bus) | |
150 | { | |
151 | } | |
152 | static inline int ssb_sdio_init(struct ssb_bus *bus) | |
153 | { | |
154 | return 0; | |
155 | } | |
156 | #endif /* CONFIG_SSB_SDIOHOST */ | |
157 | ||
61e115a5 MB |
158 | |
159 | /* scan.c */ | |
160 | extern const char *ssb_core_name(u16 coreid); | |
161 | extern int ssb_bus_scan(struct ssb_bus *bus, | |
162 | unsigned long baseaddr); | |
163 | extern void ssb_iounmap(struct ssb_bus *ssb); | |
164 | ||
165 | ||
e7ec2e32 MB |
166 | /* sprom.c */ |
167 | extern | |
168 | ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf, | |
169 | int (*sprom_read)(struct ssb_bus *bus, u16 *sprom)); | |
170 | extern | |
171 | ssize_t ssb_attr_sprom_store(struct ssb_bus *bus, | |
172 | const char *buf, size_t count, | |
173 | int (*sprom_check_crc)(const u16 *sprom, size_t size), | |
174 | int (*sprom_write)(struct ssb_bus *bus, const u16 *sprom)); | |
b3ae52b6 HM |
175 | extern int ssb_fill_sprom_with_fallback(struct ssb_bus *bus, |
176 | struct ssb_sprom *out); | |
e7ec2e32 MB |
177 | |
178 | ||
61e115a5 MB |
179 | /* core.c */ |
180 | extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); | |
61e115a5 | 181 | extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev); |
aab547ce MB |
182 | int ssb_for_each_bus_call(unsigned long data, |
183 | int (*func)(struct ssb_bus *bus, unsigned long data)); | |
e7ec2e32 MB |
184 | extern struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev); |
185 | ||
3ba6018a MB |
186 | struct ssb_freeze_context { |
187 | /* Pointer to the bus */ | |
188 | struct ssb_bus *bus; | |
189 | /* Boolean list to indicate whether a device is frozen on this bus. */ | |
190 | bool device_frozen[SSB_MAX_NR_CORES]; | |
191 | }; | |
192 | extern int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx); | |
193 | extern int ssb_devices_thaw(struct ssb_freeze_context *ctx); | |
194 | ||
195 | ||
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196 | |
197 | /* b43_pci_bridge.c */ | |
c7084535 | 198 | #ifdef CONFIG_SSB_B43_PCI_BRIDGE |
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199 | extern int __init b43_pci_ssb_bridge_init(void); |
200 | extern void __exit b43_pci_ssb_bridge_exit(void); | |
0052b8bb | 201 | #else /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 MB |
202 | static inline int b43_pci_ssb_bridge_init(void) |
203 | { | |
204 | return 0; | |
205 | } | |
206 | static inline void b43_pci_ssb_bridge_exit(void) | |
207 | { | |
208 | } | |
0052b8bb | 209 | #endif /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 | 210 | |
d486a5b4 HM |
211 | /* driver_chipcommon_pmu.c */ |
212 | extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); | |
213 | extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); | |
f924e1e9 | 214 | extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc); |
d486a5b4 | 215 | |
7ffbffe3 HM |
216 | extern u32 ssb_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, |
217 | u32 ticks); | |
218 | extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
219 | ||
9f640a63 HM |
220 | #ifdef CONFIG_SSB_DRIVER_EXTIF |
221 | extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks); | |
222 | extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
223 | #else | |
224 | static inline u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, | |
225 | u32 ticks) | |
226 | { | |
227 | return 0; | |
228 | } | |
229 | static inline u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, | |
230 | u32 ms) | |
231 | { | |
232 | return 0; | |
233 | } | |
234 | #endif | |
bde327ef HM |
235 | |
236 | #ifdef CONFIG_SSB_EMBEDDED | |
237 | extern int ssb_watchdog_register(struct ssb_bus *bus); | |
238 | #else /* CONFIG_SSB_EMBEDDED */ | |
239 | static inline int ssb_watchdog_register(struct ssb_bus *bus) | |
240 | { | |
241 | return 0; | |
242 | } | |
243 | #endif /* CONFIG_SSB_EMBEDDED */ | |
244 | ||
61e115a5 | 245 | #endif /* LINUX_SSB_PRIVATE_H_ */ |