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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
61e115a5 MB |
2 | #ifndef LINUX_SSB_PRIVATE_H_ |
3 | #define LINUX_SSB_PRIVATE_H_ | |
4 | ||
b8b6069c MB |
5 | #define PFX "ssb: " |
6 | #define pr_fmt(fmt) PFX fmt | |
7 | ||
61e115a5 MB |
8 | #include <linux/ssb/ssb.h> |
9 | #include <linux/types.h> | |
7ffbffe3 | 10 | #include <linux/bcm47xx_wdt.h> |
61e115a5 | 11 | |
61e115a5 MB |
12 | |
13 | /* pci.c */ | |
14 | #ifdef CONFIG_SSB_PCIHOST | |
15 | extern int ssb_pci_switch_core(struct ssb_bus *bus, | |
16 | struct ssb_device *dev); | |
17 | extern int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
18 | u8 coreidx); | |
19 | extern int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
20 | int turn_on); | |
21 | extern int ssb_pci_get_invariants(struct ssb_bus *bus, | |
22 | struct ssb_init_invariants *iv); | |
23 | extern void ssb_pci_exit(struct ssb_bus *bus); | |
24 | extern int ssb_pci_init(struct ssb_bus *bus); | |
25 | extern const struct ssb_bus_ops ssb_pci_ops; | |
26 | ||
27 | #else /* CONFIG_SSB_PCIHOST */ | |
28 | ||
29 | static inline int ssb_pci_switch_core(struct ssb_bus *bus, | |
30 | struct ssb_device *dev) | |
31 | { | |
32 | return 0; | |
33 | } | |
34 | static inline int ssb_pci_switch_coreidx(struct ssb_bus *bus, | |
35 | u8 coreidx) | |
36 | { | |
37 | return 0; | |
38 | } | |
39 | static inline int ssb_pci_xtal(struct ssb_bus *bus, u32 what, | |
40 | int turn_on) | |
41 | { | |
42 | return 0; | |
43 | } | |
44 | static inline void ssb_pci_exit(struct ssb_bus *bus) | |
45 | { | |
46 | } | |
47 | static inline int ssb_pci_init(struct ssb_bus *bus) | |
48 | { | |
49 | return 0; | |
50 | } | |
51 | #endif /* CONFIG_SSB_PCIHOST */ | |
52 | ||
53 | ||
54 | /* pcmcia.c */ | |
55 | #ifdef CONFIG_SSB_PCMCIAHOST | |
61e115a5 MB |
56 | extern int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, |
57 | u8 coreidx); | |
58 | extern int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
59 | u8 seg); | |
60 | extern int ssb_pcmcia_get_invariants(struct ssb_bus *bus, | |
61 | struct ssb_init_invariants *iv); | |
8fe2b65a | 62 | extern int ssb_pcmcia_hardware_setup(struct ssb_bus *bus); |
e7ec2e32 | 63 | extern void ssb_pcmcia_exit(struct ssb_bus *bus); |
61e115a5 | 64 | extern int ssb_pcmcia_init(struct ssb_bus *bus); |
399500da RM |
65 | extern int ssb_host_pcmcia_init(void); |
66 | extern void ssb_host_pcmcia_exit(void); | |
61e115a5 MB |
67 | extern const struct ssb_bus_ops ssb_pcmcia_ops; |
68 | #else /* CONFIG_SSB_PCMCIAHOST */ | |
61e115a5 MB |
69 | static inline int ssb_pcmcia_switch_coreidx(struct ssb_bus *bus, |
70 | u8 coreidx) | |
71 | { | |
72 | return 0; | |
73 | } | |
74 | static inline int ssb_pcmcia_switch_segment(struct ssb_bus *bus, | |
75 | u8 seg) | |
76 | { | |
77 | return 0; | |
78 | } | |
8fe2b65a MB |
79 | static inline int ssb_pcmcia_hardware_setup(struct ssb_bus *bus) |
80 | { | |
81 | return 0; | |
82 | } | |
e7ec2e32 MB |
83 | static inline void ssb_pcmcia_exit(struct ssb_bus *bus) |
84 | { | |
85 | } | |
61e115a5 MB |
86 | static inline int ssb_pcmcia_init(struct ssb_bus *bus) |
87 | { | |
88 | return 0; | |
89 | } | |
399500da RM |
90 | static inline int ssb_host_pcmcia_init(void) |
91 | { | |
92 | return 0; | |
93 | } | |
94 | static inline void ssb_host_pcmcia_exit(void) | |
95 | { | |
96 | } | |
61e115a5 MB |
97 | #endif /* CONFIG_SSB_PCMCIAHOST */ |
98 | ||
24ea602e AH |
99 | /* sdio.c */ |
100 | #ifdef CONFIG_SSB_SDIOHOST | |
101 | extern int ssb_sdio_get_invariants(struct ssb_bus *bus, | |
102 | struct ssb_init_invariants *iv); | |
103 | ||
104 | extern u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset); | |
24ea602e | 105 | extern int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx); |
24ea602e AH |
106 | extern void ssb_sdio_exit(struct ssb_bus *bus); |
107 | extern int ssb_sdio_init(struct ssb_bus *bus); | |
108 | ||
109 | extern const struct ssb_bus_ops ssb_sdio_ops; | |
110 | #else /* CONFIG_SSB_SDIOHOST */ | |
111 | static inline u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset) | |
112 | { | |
113 | return 0; | |
114 | } | |
24ea602e AH |
115 | static inline int ssb_sdio_scan_switch_coreidx(struct ssb_bus *bus, u8 coreidx) |
116 | { | |
117 | return 0; | |
118 | } | |
24ea602e AH |
119 | static inline void ssb_sdio_exit(struct ssb_bus *bus) |
120 | { | |
121 | } | |
122 | static inline int ssb_sdio_init(struct ssb_bus *bus) | |
123 | { | |
124 | return 0; | |
125 | } | |
126 | #endif /* CONFIG_SSB_SDIOHOST */ | |
127 | ||
830c7df4 RM |
128 | /************************************************** |
129 | * host_soc.c | |
130 | **************************************************/ | |
131 | ||
845da6e5 | 132 | #ifdef CONFIG_SSB_HOST_SOC |
830c7df4 | 133 | extern const struct ssb_bus_ops ssb_host_soc_ops; |
541c9a84 RM |
134 | |
135 | extern int ssb_host_soc_get_invariants(struct ssb_bus *bus, | |
136 | struct ssb_init_invariants *iv); | |
845da6e5 | 137 | #endif |
61e115a5 MB |
138 | |
139 | /* scan.c */ | |
140 | extern const char *ssb_core_name(u16 coreid); | |
141 | extern int ssb_bus_scan(struct ssb_bus *bus, | |
142 | unsigned long baseaddr); | |
143 | extern void ssb_iounmap(struct ssb_bus *ssb); | |
144 | ||
145 | ||
e7ec2e32 MB |
146 | /* sprom.c */ |
147 | extern | |
148 | ssize_t ssb_attr_sprom_show(struct ssb_bus *bus, char *buf, | |
149 | int (*sprom_read)(struct ssb_bus *bus, u16 *sprom)); | |
150 | extern | |
151 | ssize_t ssb_attr_sprom_store(struct ssb_bus *bus, | |
152 | const char *buf, size_t count, | |
153 | int (*sprom_check_crc)(const u16 *sprom, size_t size), | |
154 | int (*sprom_write)(struct ssb_bus *bus, const u16 *sprom)); | |
b3ae52b6 HM |
155 | extern int ssb_fill_sprom_with_fallback(struct ssb_bus *bus, |
156 | struct ssb_sprom *out); | |
e7ec2e32 MB |
157 | |
158 | ||
61e115a5 MB |
159 | /* core.c */ |
160 | extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m); | |
61e115a5 | 161 | extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev); |
aab547ce MB |
162 | int ssb_for_each_bus_call(unsigned long data, |
163 | int (*func)(struct ssb_bus *bus, unsigned long data)); | |
e7ec2e32 MB |
164 | extern struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev); |
165 | ||
3ba6018a MB |
166 | struct ssb_freeze_context { |
167 | /* Pointer to the bus */ | |
168 | struct ssb_bus *bus; | |
169 | /* Boolean list to indicate whether a device is frozen on this bus. */ | |
170 | bool device_frozen[SSB_MAX_NR_CORES]; | |
171 | }; | |
172 | extern int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx); | |
173 | extern int ssb_devices_thaw(struct ssb_freeze_context *ctx); | |
174 | ||
175 | ||
61e115a5 MB |
176 | |
177 | /* b43_pci_bridge.c */ | |
c7084535 | 178 | #ifdef CONFIG_SSB_B43_PCI_BRIDGE |
61e115a5 MB |
179 | extern int __init b43_pci_ssb_bridge_init(void); |
180 | extern void __exit b43_pci_ssb_bridge_exit(void); | |
0052b8bb | 181 | #else /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 MB |
182 | static inline int b43_pci_ssb_bridge_init(void) |
183 | { | |
184 | return 0; | |
185 | } | |
186 | static inline void b43_pci_ssb_bridge_exit(void) | |
187 | { | |
188 | } | |
0052b8bb | 189 | #endif /* CONFIG_SSB_B43_PCI_BRIDGE */ |
61e115a5 | 190 | |
d486a5b4 HM |
191 | /* driver_chipcommon_pmu.c */ |
192 | extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc); | |
193 | extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc); | |
f924e1e9 | 194 | extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc); |
d486a5b4 | 195 | |
7ffbffe3 HM |
196 | extern u32 ssb_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, |
197 | u32 ticks); | |
198 | extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
199 | ||
72a525cb RM |
200 | /* driver_chipcommon_sflash.c */ |
201 | #ifdef CONFIG_SSB_SFLASH | |
202 | int ssb_sflash_init(struct ssb_chipcommon *cc); | |
203 | #else | |
204 | static inline int ssb_sflash_init(struct ssb_chipcommon *cc) | |
205 | { | |
206 | pr_err("Serial flash not supported\n"); | |
207 | return 0; | |
208 | } | |
209 | #endif /* CONFIG_SSB_SFLASH */ | |
210 | ||
c7a4a9e3 RM |
211 | #ifdef CONFIG_SSB_DRIVER_MIPS |
212 | extern struct platform_device ssb_pflash_dev; | |
213 | #endif | |
214 | ||
7b5d6043 RM |
215 | #ifdef CONFIG_SSB_SFLASH |
216 | extern struct platform_device ssb_sflash_dev; | |
217 | #endif | |
218 | ||
9f640a63 HM |
219 | #ifdef CONFIG_SSB_DRIVER_EXTIF |
220 | extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks); | |
221 | extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms); | |
222 | #else | |
223 | static inline u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, | |
224 | u32 ticks) | |
225 | { | |
226 | return 0; | |
227 | } | |
228 | static inline u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, | |
229 | u32 ms) | |
230 | { | |
231 | return 0; | |
232 | } | |
233 | #endif | |
bde327ef HM |
234 | |
235 | #ifdef CONFIG_SSB_EMBEDDED | |
236 | extern int ssb_watchdog_register(struct ssb_bus *bus); | |
237 | #else /* CONFIG_SSB_EMBEDDED */ | |
238 | static inline int ssb_watchdog_register(struct ssb_bus *bus) | |
239 | { | |
240 | return 0; | |
241 | } | |
242 | #endif /* CONFIG_SSB_EMBEDDED */ | |
243 | ||
394bc7e3 HM |
244 | #ifdef CONFIG_SSB_DRIVER_EXTIF |
245 | extern void ssb_extif_init(struct ssb_extif *extif); | |
246 | #else | |
247 | static inline void ssb_extif_init(struct ssb_extif *extif) | |
248 | { | |
249 | } | |
250 | #endif | |
251 | ||
ec43b08b HM |
252 | #ifdef CONFIG_SSB_DRIVER_GPIO |
253 | extern int ssb_gpio_init(struct ssb_bus *bus); | |
600485ed | 254 | extern int ssb_gpio_unregister(struct ssb_bus *bus); |
ec43b08b HM |
255 | #else /* CONFIG_SSB_DRIVER_GPIO */ |
256 | static inline int ssb_gpio_init(struct ssb_bus *bus) | |
257 | { | |
258 | return -ENOTSUPP; | |
259 | } | |
600485ed HM |
260 | static inline int ssb_gpio_unregister(struct ssb_bus *bus) |
261 | { | |
262 | return 0; | |
263 | } | |
ec43b08b HM |
264 | #endif /* CONFIG_SSB_DRIVER_GPIO */ |
265 | ||
61e115a5 | 266 | #endif /* LINUX_SSB_PRIVATE_H_ */ |