Merge branch 'master' into next
[linux-2.6-block.git] / drivers / spi / spi_s3c24xx_gpio.c
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1/* linux/drivers/spi/spi_s3c24xx_gpio.c
2 *
3 * Copyright (c) 2006 Ben Dooks
4 * Copyright (c) 2006 Simtec Electronics
5 *
6 * S3C24XX GPIO based SPI driver
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
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14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/spinlock.h>
6d3a25f1 18#include <linux/workqueue.h>
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19#include <linux/platform_device.h>
20
21#include <linux/spi/spi.h>
22#include <linux/spi/spi_bitbang.h>
23
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24#include <mach/regs-gpio.h>
25#include <mach/spi-gpio.h>
26#include <mach/hardware.h>
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27
28struct s3c2410_spigpio {
29 struct spi_bitbang bitbang;
30
31 struct s3c2410_spigpio_info *info;
32 struct platform_device *dev;
33};
34
35static inline struct s3c2410_spigpio *spidev_to_sg(struct spi_device *spi)
36{
e39ea8a2 37 return spi_master_get_devdata(spi->master);
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38}
39
40static inline void setsck(struct spi_device *dev, int on)
41{
42 struct s3c2410_spigpio *sg = spidev_to_sg(dev);
43 s3c2410_gpio_setpin(sg->info->pin_clk, on ? 1 : 0);
44}
45
46static inline void setmosi(struct spi_device *dev, int on)
47{
48 struct s3c2410_spigpio *sg = spidev_to_sg(dev);
49 s3c2410_gpio_setpin(sg->info->pin_mosi, on ? 1 : 0);
50}
51
52static inline u32 getmiso(struct spi_device *dev)
53{
54 struct s3c2410_spigpio *sg = spidev_to_sg(dev);
55 return s3c2410_gpio_getpin(sg->info->pin_miso) ? 1 : 0;
56}
57
58#define spidelay(x) ndelay(x)
59
60#define EXPAND_BITBANG_TXRX
61#include <linux/spi/spi_bitbang.h>
62
63
64static u32 s3c2410_spigpio_txrx_mode0(struct spi_device *spi,
65 unsigned nsecs, u32 word, u8 bits)
66{
67 return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
68}
69
70static u32 s3c2410_spigpio_txrx_mode1(struct spi_device *spi,
71 unsigned nsecs, u32 word, u8 bits)
72{
73 return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
74}
75
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76static u32 s3c2410_spigpio_txrx_mode2(struct spi_device *spi,
77 unsigned nsecs, u32 word, u8 bits)
78{
79 return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
80}
81
82static u32 s3c2410_spigpio_txrx_mode3(struct spi_device *spi,
83 unsigned nsecs, u32 word, u8 bits)
84{
85 return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
86}
87
88
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89static void s3c2410_spigpio_chipselect(struct spi_device *dev, int value)
90{
91 struct s3c2410_spigpio *sg = spidev_to_sg(dev);
92
93 if (sg->info && sg->info->chip_select)
94 (sg->info->chip_select)(sg->info, value);
95}
96
97static int s3c2410_spigpio_probe(struct platform_device *dev)
98{
438ae1ae 99 struct s3c2410_spigpio_info *info;
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100 struct spi_master *master;
101 struct s3c2410_spigpio *sp;
102 int ret;
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103
104 master = spi_alloc_master(&dev->dev, sizeof(struct s3c2410_spigpio));
105 if (master == NULL) {
106 dev_err(&dev->dev, "failed to allocate spi master\n");
107 ret = -ENOMEM;
108 goto err;
109 }
110
111 sp = spi_master_get_devdata(master);
112
113 platform_set_drvdata(dev, sp);
114
115 /* copy in the plkatform data */
438ae1ae 116 info = sp->info = dev->dev.platform_data;
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117
118 /* setup spi bitbang adaptor */
119 sp->bitbang.master = spi_master_get(master);
75d42798 120 sp->bitbang.master->bus_num = info->bus_num;
b93c35ff 121 sp->bitbang.master->num_chipselect = info->num_chipselect;
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122 sp->bitbang.chipselect = s3c2410_spigpio_chipselect;
123
124 sp->bitbang.txrx_word[SPI_MODE_0] = s3c2410_spigpio_txrx_mode0;
125 sp->bitbang.txrx_word[SPI_MODE_1] = s3c2410_spigpio_txrx_mode1;
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126 sp->bitbang.txrx_word[SPI_MODE_2] = s3c2410_spigpio_txrx_mode2;
127 sp->bitbang.txrx_word[SPI_MODE_3] = s3c2410_spigpio_txrx_mode3;
1fc7547d 128
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129 /* set state of spi pins, always assume that the clock is
130 * available, but do check the MOSI and MISO. */
131 s3c2410_gpio_setpin(info->pin_clk, 0);
132 s3c2410_gpio_cfgpin(info->pin_clk, S3C2410_GPIO_OUTPUT);
1fc7547d 133
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134 if (info->pin_mosi < S3C2410_GPH10) {
135 s3c2410_gpio_setpin(info->pin_mosi, 0);
136 s3c2410_gpio_cfgpin(info->pin_mosi, S3C2410_GPIO_OUTPUT);
137 }
138
139 if (info->pin_miso != S3C2410_GPA0 && info->pin_miso < S3C2410_GPH10)
140 s3c2410_gpio_cfgpin(info->pin_miso, S3C2410_GPIO_INPUT);
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141
142 ret = spi_bitbang_start(&sp->bitbang);
143 if (ret)
144 goto err_no_bitbang;
145
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146 return 0;
147
148 err_no_bitbang:
149 spi_master_put(sp->bitbang.master);
150 err:
151 return ret;
152
153}
154
155static int s3c2410_spigpio_remove(struct platform_device *dev)
156{
157 struct s3c2410_spigpio *sp = platform_get_drvdata(dev);
158
159 spi_bitbang_stop(&sp->bitbang);
160 spi_master_put(sp->bitbang.master);
161
162 return 0;
163}
164
165/* all gpio should be held over suspend/resume, so we should
166 * not need to deal with this
167*/
168
169#define s3c2410_spigpio_suspend NULL
170#define s3c2410_spigpio_resume NULL
171
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172/* work with hotplug and coldplug */
173MODULE_ALIAS("platform:spi_s3c24xx_gpio");
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174
175static struct platform_driver s3c2410_spigpio_drv = {
176 .probe = s3c2410_spigpio_probe,
177 .remove = s3c2410_spigpio_remove,
178 .suspend = s3c2410_spigpio_suspend,
179 .resume = s3c2410_spigpio_resume,
180 .driver = {
fc3ba952 181 .name = "spi_s3c24xx_gpio",
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182 .owner = THIS_MODULE,
183 },
184};
185
186static int __init s3c2410_spigpio_init(void)
187{
188 return platform_driver_register(&s3c2410_spigpio_drv);
189}
190
191static void __exit s3c2410_spigpio_exit(void)
192{
193 platform_driver_unregister(&s3c2410_spigpio_drv);
194}
195
196module_init(s3c2410_spigpio_init);
197module_exit(s3c2410_spigpio_exit);
198
199MODULE_DESCRIPTION("S3C24XX SPI Driver");
200MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
201MODULE_LICENSE("GPL");