spi: spi.c: White-space fix in __spi_pump_messages()
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB
7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB
11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
f3186dd8 21#include <linux/gpio/consumer.h>
3ae22e8c 22#include <linux/pm_runtime.h>
f48c767c 23#include <linux/pm_domain.h>
826cf175 24#include <linux/property.h>
025ed130 25#include <linux/export.h>
8bd75c77 26#include <linux/sched/rt.h>
ae7e81c0 27#include <uapi/linux/sched/types.h>
ffbbdd21
LW
28#include <linux/delay.h>
29#include <linux/kthread.h>
64bee4d2
MW
30#include <linux/ioport.h>
31#include <linux/acpi.h>
b1b8153c 32#include <linux/highmem.h>
9b61e302 33#include <linux/idr.h>
8a2e487e 34#include <linux/platform_data/x86/apple.h>
44ea6281 35#include <linux/ptp_clock_kernel.h>
6598b91b 36#include <linux/percpu.h>
8ae12a0d 37
56ec1978
MB
38#define CREATE_TRACE_POINTS
39#include <trace/events/spi.h>
ca1438dc
AB
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
41EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 42
46336966
BB
43#include "internals.h"
44
9b61e302 45static DEFINE_IDR(spi_master_idr);
56ec1978 46
8ae12a0d
DB
47static void spidev_release(struct device *dev)
48{
0ffa0285 49 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 50
8caab75f 51 spi_controller_put(spi->controller);
5039563e 52 kfree(spi->driver_override);
6598b91b 53 free_percpu(spi->pcpu_statistics);
07a389fe 54 kfree(spi);
8ae12a0d
DB
55}
56
57static ssize_t
58modalias_show(struct device *dev, struct device_attribute *a, char *buf)
59{
60 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
61 int len;
62
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
64 if (len != -ENODEV)
65 return len;
8ae12a0d 66
d8e328b3 67 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 68}
aa7da564 69static DEVICE_ATTR_RO(modalias);
8ae12a0d 70
5039563e
TP
71static ssize_t driver_override_store(struct device *dev,
72 struct device_attribute *a,
73 const char *buf, size_t count)
74{
75 struct spi_device *spi = to_spi_device(dev);
19368f0f 76 int ret;
5039563e 77
19368f0f
KK
78 ret = driver_set_override(dev, &spi->driver_override, buf, count);
79 if (ret)
80 return ret;
5039563e
TP
81
82 return count;
83}
84
85static ssize_t driver_override_show(struct device *dev,
86 struct device_attribute *a, char *buf)
87{
88 const struct spi_device *spi = to_spi_device(dev);
89 ssize_t len;
90
91 device_lock(dev);
92 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
93 device_unlock(dev);
94 return len;
95}
96static DEVICE_ATTR_RW(driver_override);
97
6598b91b
DJ
98static struct spi_statistics *spi_alloc_pcpu_stats(struct device *dev)
99{
100 struct spi_statistics __percpu *pcpu_stats;
101
102 if (dev)
103 pcpu_stats = devm_alloc_percpu(dev, struct spi_statistics);
104 else
105 pcpu_stats = alloc_percpu_gfp(struct spi_statistics, GFP_KERNEL);
106
107 if (pcpu_stats) {
108 int cpu;
109
110 for_each_possible_cpu(cpu) {
111 struct spi_statistics *stat;
112
113 stat = per_cpu_ptr(pcpu_stats, cpu);
114 u64_stats_init(&stat->syncp);
115 }
116 }
117 return pcpu_stats;
118}
119
120#define spi_pcpu_stats_totalize(ret, in, field) \
121do { \
122 int i; \
123 ret = 0; \
124 for_each_possible_cpu(i) { \
125 const struct spi_statistics *pcpu_stats; \
126 u64 inc; \
127 unsigned int start; \
128 pcpu_stats = per_cpu_ptr(in, i); \
129 do { \
130 start = u64_stats_fetch_begin_irq( \
131 &pcpu_stats->syncp); \
132 inc = u64_stats_read(&pcpu_stats->field); \
133 } while (u64_stats_fetch_retry_irq( \
134 &pcpu_stats->syncp, start)); \
135 ret += inc; \
136 } \
137} while (0)
138
eca2ebc7 139#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
140static ssize_t spi_controller_##field##_show(struct device *dev, \
141 struct device_attribute *attr, \
142 char *buf) \
eca2ebc7 143{ \
8caab75f
GU
144 struct spi_controller *ctlr = container_of(dev, \
145 struct spi_controller, dev); \
6598b91b 146 return spi_statistics_##field##_show(ctlr->pcpu_statistics, buf); \
eca2ebc7 147} \
8caab75f 148static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 149 .attr = { .name = file, .mode = 0444 }, \
8caab75f 150 .show = spi_controller_##field##_show, \
eca2ebc7
MS
151}; \
152static ssize_t spi_device_##field##_show(struct device *dev, \
153 struct device_attribute *attr, \
154 char *buf) \
155{ \
d1eba93b 156 struct spi_device *spi = to_spi_device(dev); \
6598b91b 157 return spi_statistics_##field##_show(spi->pcpu_statistics, buf); \
eca2ebc7
MS
158} \
159static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 160 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
161 .show = spi_device_##field##_show, \
162}
163
6598b91b 164#define SPI_STATISTICS_SHOW_NAME(name, file, field) \
eca2ebc7
MS
165static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
166 char *buf) \
167{ \
eca2ebc7 168 ssize_t len; \
6598b91b
DJ
169 u64 val; \
170 spi_pcpu_stats_totalize(val, stat, field); \
171 len = sysfs_emit(buf, "%llu\n", val); \
eca2ebc7
MS
172 return len; \
173} \
174SPI_STATISTICS_ATTRS(name, file)
175
6598b91b 176#define SPI_STATISTICS_SHOW(field) \
eca2ebc7 177 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
6598b91b 178 field)
eca2ebc7 179
6598b91b
DJ
180SPI_STATISTICS_SHOW(messages);
181SPI_STATISTICS_SHOW(transfers);
182SPI_STATISTICS_SHOW(errors);
183SPI_STATISTICS_SHOW(timedout);
eca2ebc7 184
6598b91b
DJ
185SPI_STATISTICS_SHOW(spi_sync);
186SPI_STATISTICS_SHOW(spi_sync_immediate);
187SPI_STATISTICS_SHOW(spi_async);
eca2ebc7 188
6598b91b
DJ
189SPI_STATISTICS_SHOW(bytes);
190SPI_STATISTICS_SHOW(bytes_rx);
191SPI_STATISTICS_SHOW(bytes_tx);
eca2ebc7 192
6b7bc061
MS
193#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
194 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
195 "transfer_bytes_histo_" number, \
6598b91b 196 transfer_bytes_histo[index])
6b7bc061
MS
197SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
198SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
199SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
200SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
201SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
202SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
203SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
204SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
205SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
206SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
207SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
208SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
209SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
210SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
211SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
212SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
213SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
214
6598b91b 215SPI_STATISTICS_SHOW(transfers_split_maxsize);
d9f12122 216
aa7da564
GKH
217static struct attribute *spi_dev_attrs[] = {
218 &dev_attr_modalias.attr,
5039563e 219 &dev_attr_driver_override.attr,
aa7da564 220 NULL,
8ae12a0d 221};
eca2ebc7
MS
222
223static const struct attribute_group spi_dev_group = {
224 .attrs = spi_dev_attrs,
225};
226
227static struct attribute *spi_device_statistics_attrs[] = {
228 &dev_attr_spi_device_messages.attr,
229 &dev_attr_spi_device_transfers.attr,
230 &dev_attr_spi_device_errors.attr,
231 &dev_attr_spi_device_timedout.attr,
232 &dev_attr_spi_device_spi_sync.attr,
233 &dev_attr_spi_device_spi_sync_immediate.attr,
234 &dev_attr_spi_device_spi_async.attr,
235 &dev_attr_spi_device_bytes.attr,
236 &dev_attr_spi_device_bytes_rx.attr,
237 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
238 &dev_attr_spi_device_transfer_bytes_histo0.attr,
239 &dev_attr_spi_device_transfer_bytes_histo1.attr,
240 &dev_attr_spi_device_transfer_bytes_histo2.attr,
241 &dev_attr_spi_device_transfer_bytes_histo3.attr,
242 &dev_attr_spi_device_transfer_bytes_histo4.attr,
243 &dev_attr_spi_device_transfer_bytes_histo5.attr,
244 &dev_attr_spi_device_transfer_bytes_histo6.attr,
245 &dev_attr_spi_device_transfer_bytes_histo7.attr,
246 &dev_attr_spi_device_transfer_bytes_histo8.attr,
247 &dev_attr_spi_device_transfer_bytes_histo9.attr,
248 &dev_attr_spi_device_transfer_bytes_histo10.attr,
249 &dev_attr_spi_device_transfer_bytes_histo11.attr,
250 &dev_attr_spi_device_transfer_bytes_histo12.attr,
251 &dev_attr_spi_device_transfer_bytes_histo13.attr,
252 &dev_attr_spi_device_transfer_bytes_histo14.attr,
253 &dev_attr_spi_device_transfer_bytes_histo15.attr,
254 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 255 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
256 NULL,
257};
258
259static const struct attribute_group spi_device_statistics_group = {
260 .name = "statistics",
261 .attrs = spi_device_statistics_attrs,
262};
263
264static const struct attribute_group *spi_dev_groups[] = {
265 &spi_dev_group,
266 &spi_device_statistics_group,
267 NULL,
268};
269
8caab75f
GU
270static struct attribute *spi_controller_statistics_attrs[] = {
271 &dev_attr_spi_controller_messages.attr,
272 &dev_attr_spi_controller_transfers.attr,
273 &dev_attr_spi_controller_errors.attr,
274 &dev_attr_spi_controller_timedout.attr,
275 &dev_attr_spi_controller_spi_sync.attr,
276 &dev_attr_spi_controller_spi_sync_immediate.attr,
277 &dev_attr_spi_controller_spi_async.attr,
278 &dev_attr_spi_controller_bytes.attr,
279 &dev_attr_spi_controller_bytes_rx.attr,
280 &dev_attr_spi_controller_bytes_tx.attr,
281 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
282 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
283 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
284 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
285 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
286 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
287 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
288 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
289 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
290 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
291 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
292 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
293 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
294 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
295 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
296 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
297 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
298 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
299 NULL,
300};
301
8caab75f 302static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 303 .name = "statistics",
8caab75f 304 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
305};
306
307static const struct attribute_group *spi_master_groups[] = {
8caab75f 308 &spi_controller_statistics_group,
eca2ebc7
MS
309 NULL,
310};
311
6598b91b 312static void spi_statistics_add_transfer_stats(struct spi_statistics *pcpu_stats,
da21fde0
UKK
313 struct spi_transfer *xfer,
314 struct spi_controller *ctlr)
eca2ebc7 315{
6b7bc061 316 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
67b9d641 317 struct spi_statistics *stats;
6b7bc061
MS
318
319 if (l2len < 0)
320 l2len = 0;
eca2ebc7 321
67b9d641
DJ
322 get_cpu();
323 stats = this_cpu_ptr(pcpu_stats);
6598b91b 324 u64_stats_update_begin(&stats->syncp);
eca2ebc7 325
6598b91b
DJ
326 u64_stats_inc(&stats->transfers);
327 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
eca2ebc7 328
6598b91b 329 u64_stats_add(&stats->bytes, xfer->len);
eca2ebc7 330 if ((xfer->tx_buf) &&
8caab75f 331 (xfer->tx_buf != ctlr->dummy_tx))
6598b91b 332 u64_stats_add(&stats->bytes_tx, xfer->len);
eca2ebc7 333 if ((xfer->rx_buf) &&
8caab75f 334 (xfer->rx_buf != ctlr->dummy_rx))
6598b91b 335 u64_stats_add(&stats->bytes_rx, xfer->len);
eca2ebc7 336
6598b91b 337 u64_stats_update_end(&stats->syncp);
67b9d641 338 put_cpu();
eca2ebc7 339}
8ae12a0d 340
350de7ce
AS
341/*
342 * modalias support makes "modprobe $MODALIAS" new-style hotplug work,
8ae12a0d
DB
343 * and the sysfs version makes coldplug work too.
344 */
3f076575 345static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, const char *name)
75368bf6
AV
346{
347 while (id->name[0]) {
3f076575 348 if (!strcmp(name, id->name))
75368bf6
AV
349 return id;
350 id++;
351 }
352 return NULL;
353}
354
355const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
356{
357 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
358
3f076575 359 return spi_match_id(sdrv->id_table, sdev->modalias);
75368bf6
AV
360}
361EXPORT_SYMBOL_GPL(spi_get_device_id);
362
8ae12a0d
DB
363static int spi_match_device(struct device *dev, struct device_driver *drv)
364{
365 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
366 const struct spi_driver *sdrv = to_spi_driver(drv);
367
5039563e
TP
368 /* Check override first, and if set, only use the named driver */
369 if (spi->driver_override)
370 return strcmp(spi->driver_override, drv->name) == 0;
371
2b7a32f7
SA
372 /* Attempt an OF style match */
373 if (of_driver_match_device(dev, drv))
374 return 1;
375
64bee4d2
MW
376 /* Then try ACPI */
377 if (acpi_driver_match_device(dev, drv))
378 return 1;
379
75368bf6 380 if (sdrv->id_table)
3f076575 381 return !!spi_match_id(sdrv->id_table, spi->modalias);
8ae12a0d 382
35f74fca 383 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
384}
385
7eff2e7a 386static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
387{
388 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
389 int rc;
390
391 rc = acpi_device_uevent_modalias(dev, env);
392 if (rc != -ENODEV)
393 return rc;
8ae12a0d 394
2856670f 395 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
396}
397
9db34ee6 398static int spi_probe(struct device *dev)
b885244e
DB
399{
400 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 401 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
402 int ret;
403
86be408b
SN
404 ret = of_clk_set_defaults(dev->of_node, false);
405 if (ret)
406 return ret;
407
44af7927
JH
408 if (dev->of_node) {
409 spi->irq = of_irq_get(dev->of_node, 0);
410 if (spi->irq == -EPROBE_DEFER)
411 return -EPROBE_DEFER;
412 if (spi->irq < 0)
413 spi->irq = 0;
414 }
415
676e7c25 416 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
417 if (ret)
418 return ret;
419
440408db
UKK
420 if (sdrv->probe) {
421 ret = sdrv->probe(spi);
422 if (ret)
423 dev_pm_domain_detach(dev, true);
424 }
b885244e 425
33cf00e5 426 return ret;
b885244e
DB
427}
428
fc7a6209 429static void spi_remove(struct device *dev)
b885244e
DB
430{
431 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5 432
a0386bba
UKK
433 if (sdrv->remove)
434 sdrv->remove(to_spi_device(dev));
7795d475 435
676e7c25 436 dev_pm_domain_detach(dev, true);
b885244e
DB
437}
438
9db34ee6 439static void spi_shutdown(struct device *dev)
b885244e 440{
a6f483b2
MS
441 if (dev->driver) {
442 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
b885244e 443
a6f483b2
MS
444 if (sdrv->shutdown)
445 sdrv->shutdown(to_spi_device(dev));
446 }
b885244e
DB
447}
448
9db34ee6
UKK
449struct bus_type spi_bus_type = {
450 .name = "spi",
451 .dev_groups = spi_dev_groups,
452 .match = spi_match_device,
453 .uevent = spi_uevent,
454 .probe = spi_probe,
455 .remove = spi_remove,
456 .shutdown = spi_shutdown,
457};
458EXPORT_SYMBOL_GPL(spi_bus_type);
459
33e34dc6 460/**
ca5d2485 461 * __spi_register_driver - register a SPI driver
88c9321d 462 * @owner: owner module of the driver to register
33e34dc6
DB
463 * @sdrv: the driver to register
464 * Context: can sleep
97d56dc6
JMC
465 *
466 * Return: zero on success, else a negative error code.
33e34dc6 467 */
ca5d2485 468int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 469{
ca5d2485 470 sdrv->driver.owner = owner;
b885244e 471 sdrv->driver.bus = &spi_bus_type;
5fa6863b
MB
472
473 /*
474 * For Really Good Reasons we use spi: modaliases not of:
475 * modaliases for DT so module autoloading won't work if we
476 * don't have a spi_device_id as well as a compatible string.
477 */
478 if (sdrv->driver.of_match_table) {
479 const struct of_device_id *of_id;
480
481 for (of_id = sdrv->driver.of_match_table; of_id->compatible[0];
482 of_id++) {
483 const char *of_name;
484
485 /* Strip off any vendor prefix */
486 of_name = strnchr(of_id->compatible,
487 sizeof(of_id->compatible), ',');
488 if (of_name)
489 of_name++;
490 else
491 of_name = of_id->compatible;
492
493 if (sdrv->id_table) {
494 const struct spi_device_id *spi_id;
495
3f076575 496 spi_id = spi_match_id(sdrv->id_table, of_name);
b79332ef 497 if (spi_id)
5fa6863b
MB
498 continue;
499 } else {
500 if (strcmp(sdrv->driver.name, of_name) == 0)
501 continue;
502 }
503
504 pr_warn("SPI driver %s has no spi_device_id for %s\n",
505 sdrv->driver.name, of_id->compatible);
506 }
507 }
508
b885244e
DB
509 return driver_register(&sdrv->driver);
510}
ca5d2485 511EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 512
8ae12a0d
DB
513/*-------------------------------------------------------------------------*/
514
350de7ce
AS
515/*
516 * SPI devices should normally not be created by SPI device drivers; that
8caab75f 517 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
518 * Device registration normally goes into like arch/.../mach.../board-YYY.c
519 * with other readonly (flashable) information about mainboard devices.
520 */
521
522struct boardinfo {
523 struct list_head list;
2b9603a0 524 struct spi_board_info board_info;
8ae12a0d
DB
525};
526
527static LIST_HEAD(board_list);
8caab75f 528static LIST_HEAD(spi_controller_list);
2b9603a0
FT
529
530/*
be73e323 531 * Used to protect add/del operation for board_info list and
350de7ce
AS
532 * spi_controller list, and their matching process also used
533 * to protect object of type struct idr.
2b9603a0 534 */
94040828 535static DEFINE_MUTEX(board_lock);
8ae12a0d 536
dc87c98e
GL
537/**
538 * spi_alloc_device - Allocate a new SPI device
8caab75f 539 * @ctlr: Controller to which device is connected
dc87c98e
GL
540 * Context: can sleep
541 *
542 * Allows a driver to allocate and initialize a spi_device without
543 * registering it immediately. This allows a driver to directly
544 * fill the spi_device with device parameters before calling
545 * spi_add_device() on it.
546 *
547 * Caller is responsible to call spi_add_device() on the returned
8caab75f 548 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
549 * needs to discard the spi_device without adding it, then it should
550 * call spi_dev_put() on it.
551 *
97d56dc6 552 * Return: a pointer to the new device, or NULL.
dc87c98e 553 */
e3dc1399 554struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
555{
556 struct spi_device *spi;
dc87c98e 557
8caab75f 558 if (!spi_controller_get(ctlr))
dc87c98e
GL
559 return NULL;
560
5fe5f05e 561 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 562 if (!spi) {
8caab75f 563 spi_controller_put(ctlr);
dc87c98e
GL
564 return NULL;
565 }
566
6598b91b
DJ
567 spi->pcpu_statistics = spi_alloc_pcpu_stats(NULL);
568 if (!spi->pcpu_statistics) {
569 kfree(spi);
570 spi_controller_put(ctlr);
571 return NULL;
572 }
573
8caab75f
GU
574 spi->master = spi->controller = ctlr;
575 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
576 spi->dev.bus = &spi_bus_type;
577 spi->dev.release = spidev_release;
ea235786 578 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7 579
dc87c98e
GL
580 device_initialize(&spi->dev);
581 return spi;
582}
e3dc1399 583EXPORT_SYMBOL_GPL(spi_alloc_device);
dc87c98e 584
e13ac47b
JN
585static void spi_dev_set_name(struct spi_device *spi)
586{
587 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
588
589 if (adev) {
590 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
591 return;
592 }
593
8caab75f 594 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
595 spi->chip_select);
596}
597
b6fb8d3a
MW
598static int spi_dev_check(struct device *dev, void *data)
599{
600 struct spi_device *spi = to_spi_device(dev);
601 struct spi_device *new_spi = data;
602
8caab75f 603 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
604 spi->chip_select == new_spi->chip_select)
605 return -EBUSY;
606 return 0;
607}
608
c7299fea
SK
609static void spi_cleanup(struct spi_device *spi)
610{
611 if (spi->controller->cleanup)
612 spi->controller->cleanup(spi);
613}
614
0c79378c 615static int __spi_add_device(struct spi_device *spi)
dc87c98e 616{
8caab75f
GU
617 struct spi_controller *ctlr = spi->controller;
618 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
619 int status;
620
6bfb15f3
UKK
621 /*
622 * We need to make sure there's no other device with this
623 * chipselect **BEFORE** we call setup(), else we'll trash
624 * its configuration.
625 */
b6fb8d3a
MW
626 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
627 if (status) {
e48880e0
DB
628 dev_err(dev, "chipselect %d already in use\n",
629 spi->chip_select);
0c79378c 630 return status;
e48880e0
DB
631 }
632
ddf75be4
LW
633 /* Controller may unregister concurrently */
634 if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
635 !device_is_registered(&ctlr->dev)) {
0c79378c 636 return -ENODEV;
ddf75be4
LW
637 }
638
f3186dd8
LW
639 if (ctlr->cs_gpiods)
640 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
74317984 641
350de7ce
AS
642 /*
643 * Drivers may modify this initial i/o setup, but will
e48880e0
DB
644 * normally rely on the device being setup. Devices
645 * using SPI_CS_HIGH can't coexist well otherwise...
646 */
7d077197 647 status = spi_setup(spi);
dc87c98e 648 if (status < 0) {
eb288a1f
LW
649 dev_err(dev, "can't setup %s, status %d\n",
650 dev_name(&spi->dev), status);
0c79378c 651 return status;
dc87c98e
GL
652 }
653
e48880e0 654 /* Device may be bound to an active driver when this returns */
dc87c98e 655 status = device_add(&spi->dev);
c7299fea 656 if (status < 0) {
eb288a1f
LW
657 dev_err(dev, "can't add %s, status %d\n",
658 dev_name(&spi->dev), status);
c7299fea
SK
659 spi_cleanup(spi);
660 } else {
35f74fca 661 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
c7299fea 662 }
dc87c98e 663
0c79378c
SR
664 return status;
665}
666
667/**
668 * spi_add_device - Add spi_device allocated with spi_alloc_device
669 * @spi: spi_device to register
670 *
671 * Companion function to spi_alloc_device. Devices allocated with
672 * spi_alloc_device can be added onto the spi bus with this function.
673 *
674 * Return: 0 on success; negative errno on failure
675 */
e3dc1399 676int spi_add_device(struct spi_device *spi)
0c79378c
SR
677{
678 struct spi_controller *ctlr = spi->controller;
679 struct device *dev = ctlr->dev.parent;
680 int status;
681
682 /* Chipselects are numbered 0..max; validate. */
683 if (spi->chip_select >= ctlr->num_chipselect) {
684 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
685 ctlr->num_chipselect);
686 return -EINVAL;
687 }
688
689 /* Set the bus ID string */
690 spi_dev_set_name(spi);
691
6098475d 692 mutex_lock(&ctlr->add_lock);
0c79378c 693 status = __spi_add_device(spi);
6098475d 694 mutex_unlock(&ctlr->add_lock);
e48880e0 695 return status;
dc87c98e 696}
e3dc1399 697EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 698
0c79378c
SR
699static int spi_add_device_locked(struct spi_device *spi)
700{
701 struct spi_controller *ctlr = spi->controller;
702 struct device *dev = ctlr->dev.parent;
703
704 /* Chipselects are numbered 0..max; validate. */
705 if (spi->chip_select >= ctlr->num_chipselect) {
706 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
707 ctlr->num_chipselect);
708 return -EINVAL;
709 }
710
711 /* Set the bus ID string */
712 spi_dev_set_name(spi);
713
6098475d 714 WARN_ON(!mutex_is_locked(&ctlr->add_lock));
0c79378c
SR
715 return __spi_add_device(spi);
716}
717
33e34dc6
DB
718/**
719 * spi_new_device - instantiate one new SPI device
8caab75f 720 * @ctlr: Controller to which device is connected
33e34dc6
DB
721 * @chip: Describes the SPI device
722 * Context: can sleep
723 *
724 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
725 * after board init creates the hard-wired devices. Some development
726 * platforms may not be able to use spi_register_board_info though, and
727 * this is exported so that for example a USB or parport based adapter
728 * driver could add devices (which it would learn about out-of-band).
082c8cb4 729 *
97d56dc6 730 * Return: the new device, or NULL.
8ae12a0d 731 */
8caab75f 732struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 733 struct spi_board_info *chip)
8ae12a0d
DB
734{
735 struct spi_device *proxy;
8ae12a0d
DB
736 int status;
737
350de7ce
AS
738 /*
739 * NOTE: caller did any chip->bus_num checks necessary.
082c8cb4
DB
740 *
741 * Also, unless we change the return value convention to use
742 * error-or-pointer (not NULL-or-pointer), troubleshootability
743 * suggests syslogged diagnostics are best here (ugh).
744 */
745
8caab75f 746 proxy = spi_alloc_device(ctlr);
dc87c98e 747 if (!proxy)
8ae12a0d
DB
748 return NULL;
749
102eb975
GL
750 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
751
8ae12a0d
DB
752 proxy->chip_select = chip->chip_select;
753 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 754 proxy->mode = chip->mode;
8ae12a0d 755 proxy->irq = chip->irq;
102eb975 756 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
757 proxy->dev.platform_data = (void *) chip->platform_data;
758 proxy->controller_data = chip->controller_data;
759 proxy->controller_state = NULL;
8ae12a0d 760
47afc77b
HK
761 if (chip->swnode) {
762 status = device_add_software_node(&proxy->dev, chip->swnode);
826cf175 763 if (status) {
9d902c2a 764 dev_err(&ctlr->dev, "failed to add software node to '%s': %d\n",
826cf175
DT
765 chip->modalias, status);
766 goto err_dev_put;
767 }
8ae12a0d
DB
768 }
769
826cf175
DT
770 status = spi_add_device(proxy);
771 if (status < 0)
df41a5da 772 goto err_dev_put;
826cf175 773
8ae12a0d 774 return proxy;
826cf175 775
826cf175 776err_dev_put:
df41a5da 777 device_remove_software_node(&proxy->dev);
826cf175
DT
778 spi_dev_put(proxy);
779 return NULL;
8ae12a0d
DB
780}
781EXPORT_SYMBOL_GPL(spi_new_device);
782
3b1884c2
GU
783/**
784 * spi_unregister_device - unregister a single SPI device
785 * @spi: spi_device to unregister
786 *
787 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 788 * by spi_unregister_controller().
3b1884c2
GU
789 */
790void spi_unregister_device(struct spi_device *spi)
791{
bd6c1644
GU
792 if (!spi)
793 return;
794
8324147f 795 if (spi->dev.of_node) {
bd6c1644 796 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
797 of_node_put(spi->dev.of_node);
798 }
7f24467f
OP
799 if (ACPI_COMPANION(&spi->dev))
800 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
47afc77b 801 device_remove_software_node(&spi->dev);
27e7db56
SK
802 device_del(&spi->dev);
803 spi_cleanup(spi);
804 put_device(&spi->dev);
3b1884c2
GU
805}
806EXPORT_SYMBOL_GPL(spi_unregister_device);
807
8caab75f
GU
808static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
809 struct spi_board_info *bi)
2b9603a0
FT
810{
811 struct spi_device *dev;
812
8caab75f 813 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
814 return;
815
8caab75f 816 dev = spi_new_device(ctlr, bi);
2b9603a0 817 if (!dev)
8caab75f 818 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
819 bi->modalias);
820}
821
33e34dc6
DB
822/**
823 * spi_register_board_info - register SPI devices for a given board
824 * @info: array of chip descriptors
825 * @n: how many descriptors are provided
826 * Context: can sleep
827 *
8ae12a0d
DB
828 * Board-specific early init code calls this (probably during arch_initcall)
829 * with segments of the SPI device table. Any device nodes are created later,
830 * after the relevant parent SPI controller (bus_num) is defined. We keep
831 * this table of devices forever, so that reloading a controller driver will
832 * not make Linux forget about these hard-wired devices.
833 *
834 * Other code can also call this, e.g. a particular add-on board might provide
835 * SPI devices through its expansion connector, so code initializing that board
836 * would naturally declare its SPI devices.
837 *
838 * The board info passed can safely be __initdata ... but be careful of
839 * any embedded pointers (platform_data, etc), they're copied as-is.
97d56dc6
JMC
840 *
841 * Return: zero on success, else a negative error code.
8ae12a0d 842 */
fd4a319b 843int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 844{
2b9603a0
FT
845 struct boardinfo *bi;
846 int i;
8ae12a0d 847
c7908a37 848 if (!n)
f974cf57 849 return 0;
c7908a37 850
f9bdb7fd 851 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
852 if (!bi)
853 return -ENOMEM;
8ae12a0d 854
2b9603a0 855 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 856 struct spi_controller *ctlr;
8ae12a0d 857
2b9603a0 858 memcpy(&bi->board_info, info, sizeof(*info));
826cf175 859
2b9603a0
FT
860 mutex_lock(&board_lock);
861 list_add_tail(&bi->list, &board_list);
8caab75f
GU
862 list_for_each_entry(ctlr, &spi_controller_list, list)
863 spi_match_controller_to_boardinfo(ctlr,
864 &bi->board_info);
2b9603a0 865 mutex_unlock(&board_lock);
8ae12a0d 866 }
2b9603a0
FT
867
868 return 0;
8ae12a0d
DB
869}
870
871/*-------------------------------------------------------------------------*/
872
fb51601b
UKK
873/* Core methods for SPI resource management */
874
875/**
876 * spi_res_alloc - allocate a spi resource that is life-cycle managed
877 * during the processing of a spi_message while using
878 * spi_transfer_one
879 * @spi: the spi device for which we allocate memory
880 * @release: the release code to execute for this resource
881 * @size: size to alloc and return
882 * @gfp: GFP allocation flags
883 *
884 * Return: the pointer to the allocated data
885 *
886 * This may get enhanced in the future to allocate from a memory pool
887 * of the @spi_device or @spi_controller to avoid repeated allocations.
888 */
da21fde0
UKK
889static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
890 size_t size, gfp_t gfp)
fb51601b
UKK
891{
892 struct spi_res *sres;
893
894 sres = kzalloc(sizeof(*sres) + size, gfp);
895 if (!sres)
896 return NULL;
897
898 INIT_LIST_HEAD(&sres->entry);
899 sres->release = release;
900
901 return sres->data;
902}
fb51601b
UKK
903
904/**
905 * spi_res_free - free an spi resource
906 * @res: pointer to the custom data of a resource
fb51601b 907 */
da21fde0 908static void spi_res_free(void *res)
fb51601b
UKK
909{
910 struct spi_res *sres = container_of(res, struct spi_res, data);
911
912 if (!res)
913 return;
914
915 WARN_ON(!list_empty(&sres->entry));
916 kfree(sres);
917}
fb51601b
UKK
918
919/**
920 * spi_res_add - add a spi_res to the spi_message
921 * @message: the spi message
922 * @res: the spi_resource
923 */
da21fde0 924static void spi_res_add(struct spi_message *message, void *res)
fb51601b
UKK
925{
926 struct spi_res *sres = container_of(res, struct spi_res, data);
927
928 WARN_ON(!list_empty(&sres->entry));
929 list_add_tail(&sres->entry, &message->resources);
930}
fb51601b
UKK
931
932/**
933 * spi_res_release - release all spi resources for this message
934 * @ctlr: the @spi_controller
935 * @message: the @spi_message
936 */
da21fde0 937static void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
fb51601b
UKK
938{
939 struct spi_res *res, *tmp;
940
941 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
942 if (res->release)
943 res->release(ctlr, message, res->data);
944
945 list_del(&res->entry);
946
947 kfree(res);
948 }
949}
fb51601b
UKK
950
951/*-------------------------------------------------------------------------*/
952
d347b4aa 953static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
b158935f 954{
86527bcb 955 bool activate = enable;
25093bde 956
d40f0b6f
DA
957 /*
958 * Avoid calling into the driver (or doing delays) if the chip select
959 * isn't actually changing from the last time this was called.
960 */
6bb477df
YZ
961 if (!force && ((enable && spi->controller->last_cs == spi->chip_select) ||
962 (!enable && spi->controller->last_cs != spi->chip_select)) &&
d40f0b6f
DA
963 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
964 return;
965
5cb4e1f3
AS
966 trace_spi_set_cs(spi, activate);
967
6bb477df 968 spi->controller->last_cs = enable ? spi->chip_select : -1;
d40f0b6f
DA
969 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
970
f48dc6b9 971 if ((spi->cs_gpiod || !spi->controller->set_cs_timing) && !activate) {
95c07247 972 spi_delay_exec(&spi->cs_hold, NULL);
25093bde
AA
973 }
974
b158935f
MB
975 if (spi->mode & SPI_CS_HIGH)
976 enable = !enable;
977
f48dc6b9 978 if (spi->cs_gpiod) {
f3186dd8 979 if (!(spi->mode & SPI_NO_CS)) {
f48dc6b9
LW
980 /*
981 * Historically ACPI has no means of the GPIO polarity and
982 * thus the SPISerialBus() resource defines it on the per-chip
983 * basis. In order to avoid a chain of negations, the GPIO
984 * polarity is considered being Active High. Even for the cases
985 * when _DSD() is involved (in the updated versions of ACPI)
986 * the GPIO CS polarity must be defined Active High to avoid
987 * ambiguity. That's why we use enable, that takes SPI_CS_HIGH
988 * into account.
989 */
990 if (has_acpi_companion(&spi->dev))
991 gpiod_set_value_cansleep(spi->cs_gpiod, !enable);
992 else
993 /* Polarity handled by GPIO library */
994 gpiod_set_value_cansleep(spi->cs_gpiod, activate);
f3186dd8 995 }
8eee6b9d 996 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
997 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
998 spi->controller->set_cs)
999 spi->controller->set_cs(spi, !enable);
1000 } else if (spi->controller->set_cs) {
1001 spi->controller->set_cs(spi, !enable);
8eee6b9d 1002 }
25093bde 1003
f48dc6b9 1004 if (spi->cs_gpiod || !spi->controller->set_cs_timing) {
95c07247
HM
1005 if (activate)
1006 spi_delay_exec(&spi->cs_setup, NULL);
1007 else
8c33ebfe 1008 spi_delay_exec(&spi->cs_inactive, NULL);
25093bde 1009 }
b158935f
MB
1010}
1011
2de440f5 1012#ifdef CONFIG_HAS_DMA
46336966
BB
1013int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
1014 struct sg_table *sgt, void *buf, size_t len,
1015 enum dma_data_direction dir)
6ad45a27
MB
1016{
1017 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 1018 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
1019#ifdef CONFIG_HIGHMEM
1020 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
1021 (unsigned long)buf < (PKMAP_BASE +
1022 (LAST_PKMAP * PAGE_SIZE)));
1023#else
1024 const bool kmap_buf = false;
1025#endif
65598c13
AG
1026 int desc_len;
1027 int sgs;
6ad45a27 1028 struct page *vm_page;
8dd4a016 1029 struct scatterlist *sg;
6ad45a27
MB
1030 void *sg_buf;
1031 size_t min;
1032 int i, ret;
1033
b1b8153c 1034 if (vmalloced_buf || kmap_buf) {
ebc4cb43 1035 desc_len = min_t(unsigned long, max_seg_size, PAGE_SIZE);
65598c13 1036 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 1037 } else if (virt_addr_valid(buf)) {
ebc4cb43 1038 desc_len = min_t(size_t, max_seg_size, ctlr->max_dma_len);
65598c13 1039 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
1040 } else {
1041 return -EINVAL;
65598c13
AG
1042 }
1043
6ad45a27
MB
1044 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
1045 if (ret != 0)
1046 return ret;
1047
8dd4a016 1048 sg = &sgt->sgl[0];
6ad45a27 1049 for (i = 0; i < sgs; i++) {
6ad45a27 1050
b1b8153c 1051 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
1052 /*
1053 * Next scatterlist entry size is the minimum between
1054 * the desc_len and the remaining buffer length that
1055 * fits in a page.
1056 */
1057 min = min_t(size_t, desc_len,
1058 min_t(size_t, len,
1059 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
1060 if (vmalloced_buf)
1061 vm_page = vmalloc_to_page(buf);
1062 else
1063 vm_page = kmap_to_page(buf);
6ad45a27
MB
1064 if (!vm_page) {
1065 sg_free_table(sgt);
1066 return -ENOMEM;
1067 }
8dd4a016 1068 sg_set_page(sg, vm_page,
c1aefbdd 1069 min, offset_in_page(buf));
6ad45a27 1070 } else {
65598c13 1071 min = min_t(size_t, len, desc_len);
6ad45a27 1072 sg_buf = buf;
8dd4a016 1073 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
1074 }
1075
6ad45a27
MB
1076 buf += min;
1077 len -= min;
8dd4a016 1078 sg = sg_next(sg);
6ad45a27
MB
1079 }
1080
1081 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
1082 if (!ret)
1083 ret = -ENOMEM;
6ad45a27
MB
1084 if (ret < 0) {
1085 sg_free_table(sgt);
1086 return ret;
1087 }
1088
1089 sgt->nents = ret;
1090
1091 return 0;
1092}
1093
46336966
BB
1094void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
1095 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB
1096{
1097 if (sgt->orig_nents) {
1098 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
1099 sg_free_table(sgt);
1100 }
1101}
1102
8caab75f 1103static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1104{
99adef31
MB
1105 struct device *tx_dev, *rx_dev;
1106 struct spi_transfer *xfer;
6ad45a27 1107 int ret;
3a2eba9b 1108
8caab75f 1109 if (!ctlr->can_dma)
99adef31
MB
1110 return 0;
1111
8caab75f
GU
1112 if (ctlr->dma_tx)
1113 tx_dev = ctlr->dma_tx->device->dev;
b470e10e
VK
1114 else if (ctlr->dma_map_dev)
1115 tx_dev = ctlr->dma_map_dev;
c37f45b5 1116 else
8caab75f 1117 tx_dev = ctlr->dev.parent;
c37f45b5 1118
8caab75f
GU
1119 if (ctlr->dma_rx)
1120 rx_dev = ctlr->dma_rx->device->dev;
b470e10e
VK
1121 else if (ctlr->dma_map_dev)
1122 rx_dev = ctlr->dma_map_dev;
c37f45b5 1123 else
8caab75f 1124 rx_dev = ctlr->dev.parent;
99adef31
MB
1125
1126 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1127 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1128 continue;
1129
1130 if (xfer->tx_buf != NULL) {
8caab75f 1131 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1132 (void *)xfer->tx_buf, xfer->len,
1133 DMA_TO_DEVICE);
1134 if (ret != 0)
1135 return ret;
99adef31
MB
1136 }
1137
1138 if (xfer->rx_buf != NULL) {
8caab75f 1139 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
1140 xfer->rx_buf, xfer->len,
1141 DMA_FROM_DEVICE);
1142 if (ret != 0) {
8caab75f 1143 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1144 DMA_TO_DEVICE);
1145 return ret;
99adef31
MB
1146 }
1147 }
1148 }
1149
8caab75f 1150 ctlr->cur_msg_mapped = true;
99adef31
MB
1151
1152 return 0;
1153}
1154
8caab75f 1155static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
1156{
1157 struct spi_transfer *xfer;
1158 struct device *tx_dev, *rx_dev;
1159
8caab75f 1160 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
1161 return 0;
1162
8caab75f
GU
1163 if (ctlr->dma_tx)
1164 tx_dev = ctlr->dma_tx->device->dev;
409543ce
VK
1165 else if (ctlr->dma_map_dev)
1166 tx_dev = ctlr->dma_map_dev;
c37f45b5 1167 else
8caab75f 1168 tx_dev = ctlr->dev.parent;
c37f45b5 1169
8caab75f
GU
1170 if (ctlr->dma_rx)
1171 rx_dev = ctlr->dma_rx->device->dev;
409543ce
VK
1172 else if (ctlr->dma_map_dev)
1173 rx_dev = ctlr->dma_map_dev;
c37f45b5 1174 else
8caab75f 1175 rx_dev = ctlr->dev.parent;
99adef31
MB
1176
1177 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1178 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1179 continue;
1180
8caab75f
GU
1181 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1182 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
1183 }
1184
809b1b04
RG
1185 ctlr->cur_msg_mapped = false;
1186
99adef31
MB
1187 return 0;
1188}
2de440f5 1189#else /* !CONFIG_HAS_DMA */
8caab75f 1190static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
1191 struct spi_message *msg)
1192{
1193 return 0;
1194}
1195
8caab75f 1196static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1197 struct spi_message *msg)
2de440f5
GU
1198{
1199 return 0;
1200}
1201#endif /* !CONFIG_HAS_DMA */
1202
8caab75f 1203static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
1204 struct spi_message *msg)
1205{
1206 struct spi_transfer *xfer;
1207
1208 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1209 /*
1210 * Restore the original value of tx_buf or rx_buf if they are
1211 * NULL.
1212 */
8caab75f 1213 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1214 xfer->tx_buf = NULL;
8caab75f 1215 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
1216 xfer->rx_buf = NULL;
1217 }
1218
8caab75f 1219 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1220}
1221
8caab75f 1222static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1223{
1224 struct spi_transfer *xfer;
1225 void *tmp;
1226 unsigned int max_tx, max_rx;
1227
aee67fe8 1228 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1229 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU
1230 max_tx = 0;
1231 max_rx = 0;
1232
1233 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1234 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1235 !xfer->tx_buf)
1236 max_tx = max(xfer->len, max_tx);
8caab75f 1237 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1238 !xfer->rx_buf)
1239 max_rx = max(xfer->len, max_rx);
1240 }
1241
1242 if (max_tx) {
8caab75f 1243 tmp = krealloc(ctlr->dummy_tx, max_tx,
b00bab9d 1244 GFP_KERNEL | GFP_DMA | __GFP_ZERO);
2de440f5
GU
1245 if (!tmp)
1246 return -ENOMEM;
8caab75f 1247 ctlr->dummy_tx = tmp;
2de440f5
GU
1248 }
1249
1250 if (max_rx) {
8caab75f 1251 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1252 GFP_KERNEL | GFP_DMA);
1253 if (!tmp)
1254 return -ENOMEM;
8caab75f 1255 ctlr->dummy_rx = tmp;
2de440f5
GU
1256 }
1257
1258 if (max_tx || max_rx) {
1259 list_for_each_entry(xfer, &msg->transfers,
1260 transfer_list) {
5442dcaa
CL
1261 if (!xfer->len)
1262 continue;
2de440f5 1263 if (!xfer->tx_buf)
8caab75f 1264 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1265 if (!xfer->rx_buf)
8caab75f 1266 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1267 }
1268 }
1269 }
1270
8caab75f 1271 return __spi_map_msg(ctlr, msg);
2de440f5 1272}
99adef31 1273
810923f3
LR
1274static int spi_transfer_wait(struct spi_controller *ctlr,
1275 struct spi_message *msg,
1276 struct spi_transfer *xfer)
1277{
6598b91b
DJ
1278 struct spi_statistics *statm = ctlr->pcpu_statistics;
1279 struct spi_statistics *stats = msg->spi->pcpu_statistics;
6170d077 1280 u32 speed_hz = xfer->speed_hz;
49686df5 1281 unsigned long long ms;
810923f3
LR
1282
1283 if (spi_controller_is_slave(ctlr)) {
1284 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1285 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1286 return -EINTR;
1287 }
1288 } else {
6170d077
XY
1289 if (!speed_hz)
1290 speed_hz = 100000;
1291
86b8bff7
AS
1292 /*
1293 * For each byte we wait for 8 cycles of the SPI clock.
1294 * Since speed is defined in Hz and we want milliseconds,
1295 * use respective multiplier, but before the division,
1296 * otherwise we may get 0 for short transfers.
1297 */
1298 ms = 8LL * MSEC_PER_SEC * xfer->len;
6170d077 1299 do_div(ms, speed_hz);
810923f3 1300
86b8bff7
AS
1301 /*
1302 * Increase it twice and add 200 ms tolerance, use
1303 * predefined maximum in case of overflow.
1304 */
1305 ms += ms + 200;
810923f3
LR
1306 if (ms > UINT_MAX)
1307 ms = UINT_MAX;
1308
1309 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1310 msecs_to_jiffies(ms));
1311
1312 if (ms == 0) {
1313 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1314 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1315 dev_err(&msg->spi->dev,
1316 "SPI transfer timed out\n");
1317 return -ETIMEDOUT;
1318 }
1319 }
1320
1321 return 0;
1322}
1323
0ff2de8b
MS
1324static void _spi_transfer_delay_ns(u32 ns)
1325{
1326 if (!ns)
1327 return;
86b8bff7 1328 if (ns <= NSEC_PER_USEC) {
0ff2de8b
MS
1329 ndelay(ns);
1330 } else {
86b8bff7 1331 u32 us = DIV_ROUND_UP(ns, NSEC_PER_USEC);
0ff2de8b
MS
1332
1333 if (us <= 10)
1334 udelay(us);
1335 else
1336 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1337 }
1338}
1339
3984d39b 1340int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1341{
b2c98153
AA
1342 u32 delay = _delay->value;
1343 u32 unit = _delay->unit;
d5864e5b 1344 u32 hz;
0ff2de8b 1345
b2c98153
AA
1346 if (!delay)
1347 return 0;
0ff2de8b
MS
1348
1349 switch (unit) {
1350 case SPI_DELAY_UNIT_USECS:
86b8bff7 1351 delay *= NSEC_PER_USEC;
0ff2de8b 1352 break;
86b8bff7
AS
1353 case SPI_DELAY_UNIT_NSECS:
1354 /* Nothing to do here */
0ff2de8b 1355 break;
d5864e5b 1356 case SPI_DELAY_UNIT_SCK:
b2c98153
AA
1357 /* clock cycles need to be obtained from spi_transfer */
1358 if (!xfer)
1359 return -EINVAL;
86b8bff7
AS
1360 /*
1361 * If there is unknown effective speed, approximate it
1362 * by underestimating with half of the requested hz.
d5864e5b
MS
1363 */
1364 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA
1365 if (!hz)
1366 return -EINVAL;
86b8bff7
AS
1367
1368 /* Convert delay to nanoseconds */
1369 delay *= DIV_ROUND_UP(NSEC_PER_SEC, hz);
d5864e5b 1370 break;
0ff2de8b 1371 default:
b2c98153
AA
1372 return -EINVAL;
1373 }
1374
1375 return delay;
1376}
3984d39b 1377EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA
1378
1379int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1380{
1381 int delay;
1382
8fede89f
MB
1383 might_sleep();
1384
b2c98153
AA
1385 if (!_delay)
1386 return -EINVAL;
1387
3984d39b 1388 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA
1389 if (delay < 0)
1390 return delay;
1391
1392 _spi_transfer_delay_ns(delay);
1393
1394 return 0;
1395}
1396EXPORT_SYMBOL_GPL(spi_delay_exec);
1397
0ff2de8b
MS
1398static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1399 struct spi_transfer *xfer)
1400{
86b8bff7 1401 u32 default_delay_ns = 10 * NSEC_PER_USEC;
329f0dac
AA
1402 u32 delay = xfer->cs_change_delay.value;
1403 u32 unit = xfer->cs_change_delay.unit;
1404 int ret;
0ff2de8b
MS
1405
1406 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA
1407 if (!delay) {
1408 if (unit == SPI_DELAY_UNIT_USECS)
86b8bff7 1409 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1410 return;
6b3f236a 1411 }
0ff2de8b 1412
329f0dac
AA
1413 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1414 if (ret) {
0ff2de8b 1415 dev_err_once(&msg->spi->dev,
86b8bff7
AS
1416 "Use of unsupported delay unit %i, using default of %luus\n",
1417 unit, default_delay_ns / NSEC_PER_USEC);
1418 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1419 }
0ff2de8b
MS
1420}
1421
b158935f
MB
1422/*
1423 * spi_transfer_one_message - Default implementation of transfer_one_message()
1424 *
1425 * This is a standard implementation of transfer_one_message() for
8ba811a7 1426 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1427 * standard handling of delays and chip select management.
1428 */
8caab75f 1429static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1430 struct spi_message *msg)
1431{
1432 struct spi_transfer *xfer;
b158935f
MB
1433 bool keep_cs = false;
1434 int ret = 0;
6598b91b
DJ
1435 struct spi_statistics *statm = ctlr->pcpu_statistics;
1436 struct spi_statistics *stats = msg->spi->pcpu_statistics;
b158935f 1437
d347b4aa 1438 spi_set_cs(msg->spi, true, false);
b158935f 1439
eca2ebc7
MS
1440 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1441 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1442
b158935f
MB
1443 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1444 trace_spi_transfer_start(msg, xfer);
1445
8caab75f
GU
1446 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1447 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1448
b42faeee
VO
1449 if (!ctlr->ptp_sts_supported) {
1450 xfer->ptp_sts_word_pre = 0;
1451 ptp_read_system_prets(xfer->ptp_sts);
1452 }
1453
b3063203 1454 if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) {
8caab75f 1455 reinit_completion(&ctlr->xfer_completion);
b158935f 1456
809b1b04 1457fallback_pio:
8caab75f 1458 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1459 if (ret < 0) {
809b1b04
RG
1460 if (ctlr->cur_msg_mapped &&
1461 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1462 __spi_unmap_msg(ctlr, msg);
1463 ctlr->fallback = true;
1464 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1465 goto fallback_pio;
1466 }
1467
eca2ebc7
MS
1468 SPI_STATISTICS_INCREMENT_FIELD(statm,
1469 errors);
1470 SPI_STATISTICS_INCREMENT_FIELD(stats,
1471 errors);
38ec10f6
MB
1472 dev_err(&msg->spi->dev,
1473 "SPI transfer failed: %d\n", ret);
1474 goto out;
1475 }
b158935f 1476
d57e7960
MB
1477 if (ret > 0) {
1478 ret = spi_transfer_wait(ctlr, msg, xfer);
1479 if (ret < 0)
1480 msg->status = ret;
1481 }
38ec10f6
MB
1482 } else {
1483 if (xfer->len)
1484 dev_err(&msg->spi->dev,
1485 "Bufferless transfer has length %u\n",
1486 xfer->len);
13a42798 1487 }
b158935f 1488
b42faeee
VO
1489 if (!ctlr->ptp_sts_supported) {
1490 ptp_read_system_postts(xfer->ptp_sts);
1491 xfer->ptp_sts_word_post = xfer->len;
1492 }
1493
b158935f
MB
1494 trace_spi_transfer_stop(msg, xfer);
1495
1496 if (msg->status != -EINPROGRESS)
1497 goto out;
1498
bebcfd27 1499 spi_transfer_delay_exec(xfer);
b158935f
MB
1500
1501 if (xfer->cs_change) {
1502 if (list_is_last(&xfer->transfer_list,
1503 &msg->transfers)) {
1504 keep_cs = true;
1505 } else {
d347b4aa 1506 spi_set_cs(msg->spi, false, false);
0ff2de8b 1507 _spi_transfer_cs_change_delay(msg, xfer);
d347b4aa 1508 spi_set_cs(msg->spi, true, false);
b158935f
MB
1509 }
1510 }
1511
1512 msg->actual_length += xfer->len;
1513 }
1514
1515out:
1516 if (ret != 0 || !keep_cs)
d347b4aa 1517 spi_set_cs(msg->spi, false, false);
b158935f
MB
1518
1519 if (msg->status == -EINPROGRESS)
1520 msg->status = ret;
1521
8caab75f
GU
1522 if (msg->status && ctlr->handle_err)
1523 ctlr->handle_err(ctlr, msg);
b716c4ff 1524
0ed56252
MB
1525 spi_finalize_current_message(ctlr);
1526
b158935f
MB
1527 return ret;
1528}
1529
1530/**
1531 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1532 * @ctlr: the controller reporting completion
b158935f
MB
1533 *
1534 * Called by SPI drivers using the core transfer_one_message()
1535 * implementation to notify it that the current interrupt driven
9e8f4882 1536 * transfer has finished and the next one may be scheduled.
b158935f 1537 */
8caab75f 1538void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1539{
8caab75f 1540 complete(&ctlr->xfer_completion);
b158935f
MB
1541}
1542EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1543
e1268597
MB
1544static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1545{
1546 if (ctlr->auto_runtime_pm) {
1547 pm_runtime_mark_last_busy(ctlr->dev.parent);
1548 pm_runtime_put_autosuspend(ctlr->dev.parent);
1549 }
1550}
1551
ae7d2346
DJ
1552static int __spi_pump_transfer_message(struct spi_controller *ctlr,
1553 struct spi_message *msg, bool was_busy)
1554{
1555 struct spi_transfer *xfer;
1556 int ret;
1557
1558 if (!was_busy && ctlr->auto_runtime_pm) {
1559 ret = pm_runtime_get_sync(ctlr->dev.parent);
1560 if (ret < 0) {
1561 pm_runtime_put_noidle(ctlr->dev.parent);
1562 dev_err(&ctlr->dev, "Failed to power device: %d\n",
1563 ret);
1564 return ret;
1565 }
1566 }
1567
1568 if (!was_busy)
1569 trace_spi_controller_busy(ctlr);
1570
1571 if (!was_busy && ctlr->prepare_transfer_hardware) {
1572 ret = ctlr->prepare_transfer_hardware(ctlr);
1573 if (ret) {
1574 dev_err(&ctlr->dev,
1575 "failed to prepare transfer hardware: %d\n",
1576 ret);
1577
1578 if (ctlr->auto_runtime_pm)
1579 pm_runtime_put(ctlr->dev.parent);
1580
1581 msg->status = ret;
1582 spi_finalize_current_message(ctlr);
1583
1584 return ret;
1585 }
1586 }
1587
1588 trace_spi_message_start(msg);
1589
1590 if (ctlr->prepare_message) {
1591 ret = ctlr->prepare_message(ctlr, msg);
1592 if (ret) {
1593 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1594 ret);
1595 msg->status = ret;
1596 spi_finalize_current_message(ctlr);
1597 return ret;
1598 }
1599 msg->prepared = true;
1600 }
1601
1602 ret = spi_map_msg(ctlr, msg);
1603 if (ret) {
1604 msg->status = ret;
1605 spi_finalize_current_message(ctlr);
1606 return ret;
1607 }
1608
1609 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1610 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1611 xfer->ptp_sts_word_pre = 0;
1612 ptp_read_system_prets(xfer->ptp_sts);
1613 }
1614 }
1615
dc302905
DJ
1616 /*
1617 * Drivers implementation of transfer_one_message() must arrange for
1618 * spi_finalize_current_message() to get called. Most drivers will do
1619 * this in the calling context, but some don't. For those cases, a
1620 * completion is used to guarantee that this function does not return
1621 * until spi_finalize_current_message() is done accessing
1622 * ctlr->cur_msg.
1623 * Use of the following two flags enable to opportunistically skip the
1624 * use of the completion since its use involves expensive spin locks.
1625 * In case of a race with the context that calls
1626 * spi_finalize_current_message() the completion will always be used,
1627 * due to strict ordering of these flags using barriers.
1628 */
1629 WRITE_ONCE(ctlr->cur_msg_incomplete, true);
1630 WRITE_ONCE(ctlr->cur_msg_need_completion, false);
69fa9590 1631 reinit_completion(&ctlr->cur_msg_completion);
dc302905
DJ
1632 smp_wmb(); /* make these available to spi_finalize_current_message */
1633
ae7d2346
DJ
1634 ret = ctlr->transfer_one_message(ctlr, msg);
1635 if (ret) {
1636 dev_err(&ctlr->dev,
1637 "failed to transfer one message from queue\n");
1638 return ret;
69fa9590 1639 } else {
dc302905
DJ
1640 WRITE_ONCE(ctlr->cur_msg_need_completion, true);
1641 smp_mb(); /* see spi_finalize_current_message()... */
1642 if (READ_ONCE(ctlr->cur_msg_incomplete))
1643 wait_for_completion(&ctlr->cur_msg_completion);
ae7d2346
DJ
1644 }
1645
1646 return 0;
1647}
1648
ffbbdd21 1649/**
fc9e0f71 1650 * __spi_pump_messages - function which processes spi message queue
8caab75f 1651 * @ctlr: controller to process queue for
fc9e0f71 1652 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1653 *
1654 * This function checks if there is any spi message in the queue that
1655 * needs processing and if so call out to the driver to initialize hardware
1656 * and transfer each message.
1657 *
0461a414
MB
1658 * Note that it is called both from the kthread itself and also from
1659 * inside spi_sync(); the queue extraction handling at the top of the
1660 * function should deal with this safely.
ffbbdd21 1661 */
8caab75f 1662static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1663{
d1c44c93 1664 struct spi_message *msg;
ffbbdd21 1665 bool was_busy = false;
d1c44c93 1666 unsigned long flags;
ffbbdd21
LW
1667 int ret;
1668
c1038165
DJ
1669 /* Take the IO mutex */
1670 mutex_lock(&ctlr->io_mutex);
1671
983aee5d 1672 /* Lock queue */
8caab75f 1673 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1674
1675 /* Make sure we are not already running a message */
8711a2ab 1676 if (ctlr->cur_msg)
c1038165 1677 goto out_unlock;
983aee5d
MB
1678
1679 /* Check if the queue is idle */
8caab75f 1680 if (list_empty(&ctlr->queue) || !ctlr->running) {
8711a2ab 1681 if (!ctlr->busy)
c1038165 1682 goto out_unlock;
fc9e0f71 1683
e1268597 1684 /* Defer any non-atomic teardown to the thread */
f0125f1a 1685 if (!in_kthread) {
e1268597
MB
1686 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1687 !ctlr->unprepare_transfer_hardware) {
1688 spi_idle_runtime_pm(ctlr);
1689 ctlr->busy = false;
ae7d2346 1690 ctlr->queue_empty = true;
e1268597
MB
1691 trace_spi_controller_idle(ctlr);
1692 } else {
1693 kthread_queue_work(ctlr->kworker,
1694 &ctlr->pump_messages);
1695 }
c1038165 1696 goto out_unlock;
f0125f1a
MB
1697 }
1698
1699 ctlr->busy = false;
f0125f1a
MB
1700 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1701
1702 kfree(ctlr->dummy_rx);
1703 ctlr->dummy_rx = NULL;
1704 kfree(ctlr->dummy_tx);
1705 ctlr->dummy_tx = NULL;
1706 if (ctlr->unprepare_transfer_hardware &&
1707 ctlr->unprepare_transfer_hardware(ctlr))
1708 dev_err(&ctlr->dev,
1709 "failed to unprepare transfer hardware\n");
e1268597 1710 spi_idle_runtime_pm(ctlr);
f0125f1a
MB
1711 trace_spi_controller_idle(ctlr);
1712
1713 spin_lock_irqsave(&ctlr->queue_lock, flags);
ae7d2346 1714 ctlr->queue_empty = true;
c1038165 1715 goto out_unlock;
ffbbdd21 1716 }
ffbbdd21 1717
ffbbdd21 1718 /* Extract head of queue */
d1c44c93
VO
1719 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1720 ctlr->cur_msg = msg;
ffbbdd21 1721
d1c44c93 1722 list_del_init(&msg->queue);
8caab75f 1723 if (ctlr->busy)
ffbbdd21
LW
1724 was_busy = true;
1725 else
8caab75f
GU
1726 ctlr->busy = true;
1727 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1728
ae7d2346 1729 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
69fa9590
DJ
1730 if (!ret)
1731 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
c191543e 1732
69fa9590
DJ
1733 ctlr->cur_msg = NULL;
1734 ctlr->fallback = false;
1735
8caab75f 1736 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1737
1738 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1739 if (!ret)
1740 cond_resched();
c1038165
DJ
1741 return;
1742
1743out_unlock:
8711a2ab 1744 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
c1038165 1745 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1746}
1747
fc9e0f71
MB
1748/**
1749 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1750 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1751 */
1752static void spi_pump_messages(struct kthread_work *work)
1753{
8caab75f
GU
1754 struct spi_controller *ctlr =
1755 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1756
8caab75f 1757 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1758}
1759
b42faeee 1760/**
350de7ce 1761 * spi_take_timestamp_pre - helper to collect the beginning of the TX timestamp
b42faeee
VO
1762 * @ctlr: Pointer to the spi_controller structure of the driver
1763 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1764 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1765 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1766 * transfer, for less jitter in time measurement. Only compatible
1767 * with PIO drivers. If true, must follow up with
1768 * spi_take_timestamp_post or otherwise system will crash.
1769 * WARNING: for fully predictable results, the CPU frequency must
1770 * also be under control (governor).
350de7ce
AS
1771 *
1772 * This is a helper for drivers to collect the beginning of the TX timestamp
1773 * for the requested byte from the SPI transfer. The frequency with which this
1774 * function must be called (once per word, once for the whole transfer, once
1775 * per batch of words etc) is arbitrary as long as the @tx buffer offset is
1776 * greater than or equal to the requested byte at the time of the call. The
1777 * timestamp is only taken once, at the first such call. It is assumed that
1778 * the driver advances its @tx buffer pointer monotonically.
b42faeee
VO
1779 */
1780void spi_take_timestamp_pre(struct spi_controller *ctlr,
1781 struct spi_transfer *xfer,
862dd2a9 1782 size_t progress, bool irqs_off)
b42faeee 1783{
b42faeee
VO
1784 if (!xfer->ptp_sts)
1785 return;
1786
6a726824 1787 if (xfer->timestamped)
b42faeee
VO
1788 return;
1789
6a726824 1790 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO
1791 return;
1792
1793 /* Capture the resolution of the timestamp */
862dd2a9 1794 xfer->ptp_sts_word_pre = progress;
b42faeee 1795
b42faeee
VO
1796 if (irqs_off) {
1797 local_irq_save(ctlr->irq_flags);
1798 preempt_disable();
1799 }
1800
1801 ptp_read_system_prets(xfer->ptp_sts);
1802}
1803EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1804
1805/**
350de7ce 1806 * spi_take_timestamp_post - helper to collect the end of the TX timestamp
b42faeee
VO
1807 * @ctlr: Pointer to the spi_controller structure of the driver
1808 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1809 * @progress: How many words (not bytes) have been transferred so far
b42faeee 1810 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
350de7ce
AS
1811 *
1812 * This is a helper for drivers to collect the end of the TX timestamp for
1813 * the requested byte from the SPI transfer. Can be called with an arbitrary
1814 * frequency: only the first call where @tx exceeds or is equal to the
1815 * requested word will be timestamped.
b42faeee
VO
1816 */
1817void spi_take_timestamp_post(struct spi_controller *ctlr,
1818 struct spi_transfer *xfer,
862dd2a9 1819 size_t progress, bool irqs_off)
b42faeee 1820{
b42faeee
VO
1821 if (!xfer->ptp_sts)
1822 return;
1823
6a726824 1824 if (xfer->timestamped)
b42faeee
VO
1825 return;
1826
862dd2a9 1827 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO
1828 return;
1829
1830 ptp_read_system_postts(xfer->ptp_sts);
1831
1832 if (irqs_off) {
1833 local_irq_restore(ctlr->irq_flags);
1834 preempt_enable();
1835 }
1836
1837 /* Capture the resolution of the timestamp */
862dd2a9 1838 xfer->ptp_sts_word_post = progress;
b42faeee 1839
6a726824 1840 xfer->timestamped = true;
b42faeee
VO
1841}
1842EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1843
924b5867
DA
1844/**
1845 * spi_set_thread_rt - set the controller to pump at realtime priority
1846 * @ctlr: controller to boost priority of
1847 *
1848 * This can be called because the controller requested realtime priority
1849 * (by setting the ->rt value before calling spi_register_controller()) or
1850 * because a device on the bus said that its transfers needed realtime
1851 * priority.
1852 *
1853 * NOTE: at the moment if any device on a bus says it needs realtime then
1854 * the thread will be at realtime priority for all transfers on that
1855 * controller. If this eventually becomes a problem we may see if we can
1856 * find a way to boost the priority only temporarily during relevant
1857 * transfers.
1858 */
1859static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1860{
924b5867
DA
1861 dev_info(&ctlr->dev,
1862 "will run message pump with realtime priority\n");
6d2b84a4 1863 sched_set_fifo(ctlr->kworker->task);
924b5867
DA
1864}
1865
1866static int spi_init_queue(struct spi_controller *ctlr)
1867{
8caab75f
GU
1868 ctlr->running = false;
1869 ctlr->busy = false;
ae7d2346 1870 ctlr->queue_empty = true;
ffbbdd21 1871
60a883d1
MS
1872 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
1873 if (IS_ERR(ctlr->kworker)) {
1874 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
1875 return PTR_ERR(ctlr->kworker);
ffbbdd21 1876 }
60a883d1 1877
8caab75f 1878 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1879
ffbbdd21 1880 /*
8caab75f 1881 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1882 * message pump with high (realtime) priority to reduce the transfer
1883 * latency on the bus by minimising the delay between a transfer
1884 * request and the scheduling of the message pump thread. Without this
1885 * setting the message pump thread will remain at default priority.
1886 */
924b5867
DA
1887 if (ctlr->rt)
1888 spi_set_thread_rt(ctlr);
ffbbdd21
LW
1889
1890 return 0;
1891}
1892
1893/**
1894 * spi_get_next_queued_message() - called by driver to check for queued
1895 * messages
8caab75f 1896 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1897 *
1898 * If there are more messages in the queue, the next message is returned from
1899 * this call.
97d56dc6
JMC
1900 *
1901 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1902 */
8caab75f 1903struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1904{
1905 struct spi_message *next;
1906 unsigned long flags;
1907
1908 /* get a pointer to the next message, if any */
8caab75f
GU
1909 spin_lock_irqsave(&ctlr->queue_lock, flags);
1910 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1911 queue);
8caab75f 1912 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1913
1914 return next;
1915}
1916EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1917
1918/**
1919 * spi_finalize_current_message() - the current message is complete
8caab75f 1920 * @ctlr: the controller to return the message to
ffbbdd21
LW
1921 *
1922 * Called by the driver to notify the core that the message in the front of the
1923 * queue is complete and can be removed from the queue.
1924 */
8caab75f 1925void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1926{
b42faeee 1927 struct spi_transfer *xfer;
ffbbdd21 1928 struct spi_message *mesg;
2841a5fc 1929 int ret;
ffbbdd21 1930
8caab75f 1931 mesg = ctlr->cur_msg;
ffbbdd21 1932
b42faeee
VO
1933 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1934 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1935 ptp_read_system_postts(xfer->ptp_sts);
1936 xfer->ptp_sts_word_post = xfer->len;
1937 }
1938 }
1939
6a726824
VO
1940 if (unlikely(ctlr->ptp_sts_supported))
1941 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
1942 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 1943
8caab75f 1944 spi_unmap_msg(ctlr, mesg);
99adef31 1945
350de7ce
AS
1946 /*
1947 * In the prepare_messages callback the SPI bus has the opportunity
1948 * to split a transfer to smaller chunks.
1949 *
1950 * Release the split transfers here since spi_map_msg() is done on
1951 * the split transfers.
b59a7ca1
GW
1952 */
1953 spi_res_release(ctlr, mesg);
1954
1714582a 1955 if (mesg->prepared && ctlr->unprepare_message) {
8caab75f 1956 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1957 if (ret) {
8caab75f
GU
1958 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1959 ret);
2841a5fc
MB
1960 }
1961 }
391949b6 1962
1714582a
DJ
1963 mesg->prepared = false;
1964
dc302905
DJ
1965 WRITE_ONCE(ctlr->cur_msg_incomplete, false);
1966 smp_mb(); /* See __spi_pump_transfer_message()... */
1967 if (READ_ONCE(ctlr->cur_msg_need_completion))
1968 complete(&ctlr->cur_msg_completion);
8e76ef88
MS
1969
1970 trace_spi_message_done(mesg);
2841a5fc 1971
ffbbdd21
LW
1972 mesg->state = NULL;
1973 if (mesg->complete)
1974 mesg->complete(mesg->context);
1975}
1976EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1977
8caab75f 1978static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1979{
1980 unsigned long flags;
1981
8caab75f 1982 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1983
8caab75f
GU
1984 if (ctlr->running || ctlr->busy) {
1985 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1986 return -EBUSY;
1987 }
1988
8caab75f
GU
1989 ctlr->running = true;
1990 ctlr->cur_msg = NULL;
1991 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1992
60a883d1 1993 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1994
1995 return 0;
1996}
1997
8caab75f 1998static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1999{
2000 unsigned long flags;
2001 unsigned limit = 500;
2002 int ret = 0;
2003
8caab75f 2004 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
2005
2006 /*
2007 * This is a bit lame, but is optimized for the common execution path.
8caab75f 2008 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
2009 * execution path (pump_messages) would be required to call wake_up or
2010 * friends on every SPI message. Do this instead.
2011 */
8caab75f
GU
2012 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
2013 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 2014 usleep_range(10000, 11000);
8caab75f 2015 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
2016 }
2017
8caab75f 2018 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
2019 ret = -EBUSY;
2020 else
8caab75f 2021 ctlr->running = false;
ffbbdd21 2022
8caab75f 2023 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2024
2025 if (ret) {
8caab75f 2026 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
2027 return ret;
2028 }
2029 return ret;
2030}
2031
8caab75f 2032static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2033{
2034 int ret;
2035
8caab75f 2036 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
2037
2038 /*
3989144f 2039 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
2040 * If the reason that stop_queue timed out is that the work will never
2041 * finish, then it does no good to call flush/stop thread, so
2042 * return anyway.
2043 */
2044 if (ret) {
8caab75f 2045 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
2046 return ret;
2047 }
2048
60a883d1 2049 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW
2050
2051 return 0;
2052}
2053
0461a414
MB
2054static int __spi_queued_transfer(struct spi_device *spi,
2055 struct spi_message *msg,
2056 bool need_pump)
ffbbdd21 2057{
8caab75f 2058 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
2059 unsigned long flags;
2060
8caab75f 2061 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2062
8caab75f
GU
2063 if (!ctlr->running) {
2064 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2065 return -ESHUTDOWN;
2066 }
2067 msg->actual_length = 0;
2068 msg->status = -EINPROGRESS;
2069
8caab75f 2070 list_add_tail(&msg->queue, &ctlr->queue);
ae7d2346 2071 ctlr->queue_empty = false;
f0125f1a 2072 if (!ctlr->busy && need_pump)
60a883d1 2073 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 2074
8caab75f 2075 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2076 return 0;
2077}
2078
0461a414
MB
2079/**
2080 * spi_queued_transfer - transfer function for queued transfers
2081 * @spi: spi device which is requesting transfer
2082 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
2083 *
2084 * Return: zero on success, else a negative error code.
0461a414
MB
2085 */
2086static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
2087{
2088 return __spi_queued_transfer(spi, msg, true);
2089}
2090
8caab75f 2091static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2092{
2093 int ret;
2094
8caab75f
GU
2095 ctlr->transfer = spi_queued_transfer;
2096 if (!ctlr->transfer_one_message)
2097 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
2098
2099 /* Initialize and start queue */
8caab75f 2100 ret = spi_init_queue(ctlr);
ffbbdd21 2101 if (ret) {
8caab75f 2102 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
2103 goto err_init_queue;
2104 }
8caab75f
GU
2105 ctlr->queued = true;
2106 ret = spi_start_queue(ctlr);
ffbbdd21 2107 if (ret) {
8caab75f 2108 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
2109 goto err_start_queue;
2110 }
2111
2112 return 0;
2113
2114err_start_queue:
8caab75f 2115 spi_destroy_queue(ctlr);
c3676d5c 2116err_init_queue:
ffbbdd21
LW
2117 return ret;
2118}
2119
988f259b
BB
2120/**
2121 * spi_flush_queue - Send all pending messages in the queue from the callers'
2122 * context
2123 * @ctlr: controller to process queue for
2124 *
2125 * This should be used when one wants to ensure all pending messages have been
2126 * sent before doing something. Is used by the spi-mem code to make sure SPI
2127 * memory operations do not preempt regular SPI transfers that have been queued
2128 * before the spi-mem operation.
2129 */
2130void spi_flush_queue(struct spi_controller *ctlr)
2131{
2132 if (ctlr->transfer == spi_queued_transfer)
2133 __spi_pump_messages(ctlr, false);
2134}
2135
ffbbdd21
LW
2136/*-------------------------------------------------------------------------*/
2137
7cb94361 2138#if defined(CONFIG_OF)
8caab75f 2139static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 2140 struct device_node *nc)
aff5e3f8 2141{
aff5e3f8 2142 u32 value;
c2e51ac3 2143 int rc;
aff5e3f8 2144
aff5e3f8 2145 /* Mode (clock phase/polarity/etc.) */
e0bcb680 2146 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 2147 spi->mode |= SPI_CPHA;
e0bcb680 2148 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 2149 spi->mode |= SPI_CPOL;
e0bcb680 2150 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 2151 spi->mode |= SPI_3WIRE;
e0bcb680 2152 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 2153 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 2154 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW
2155 spi->mode |= SPI_CS_HIGH;
2156
aff5e3f8
PA
2157 /* Device DUAL/QUAD mode */
2158 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
2159 switch (value) {
d962608c
DB
2160 case 0:
2161 spi->mode |= SPI_NO_TX;
2162 break;
aff5e3f8
PA
2163 case 1:
2164 break;
2165 case 2:
2166 spi->mode |= SPI_TX_DUAL;
2167 break;
2168 case 4:
2169 spi->mode |= SPI_TX_QUAD;
2170 break;
6b03061f
YNG
2171 case 8:
2172 spi->mode |= SPI_TX_OCTAL;
2173 break;
aff5e3f8 2174 default:
8caab75f 2175 dev_warn(&ctlr->dev,
aff5e3f8
PA
2176 "spi-tx-bus-width %d not supported\n",
2177 value);
2178 break;
2179 }
2180 }
2181
2182 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
2183 switch (value) {
d962608c
DB
2184 case 0:
2185 spi->mode |= SPI_NO_RX;
2186 break;
aff5e3f8
PA
2187 case 1:
2188 break;
2189 case 2:
2190 spi->mode |= SPI_RX_DUAL;
2191 break;
2192 case 4:
2193 spi->mode |= SPI_RX_QUAD;
2194 break;
6b03061f
YNG
2195 case 8:
2196 spi->mode |= SPI_RX_OCTAL;
2197 break;
aff5e3f8 2198 default:
8caab75f 2199 dev_warn(&ctlr->dev,
aff5e3f8
PA
2200 "spi-rx-bus-width %d not supported\n",
2201 value);
2202 break;
2203 }
2204 }
2205
8caab75f 2206 if (spi_controller_is_slave(ctlr)) {
194276b0 2207 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
2208 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
2209 nc);
6c364062
GU
2210 return -EINVAL;
2211 }
2212 return 0;
2213 }
2214
2215 /* Device address */
2216 rc = of_property_read_u32(nc, "reg", &value);
2217 if (rc) {
25c56c88
RH
2218 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
2219 nc, rc);
6c364062
GU
2220 return rc;
2221 }
2222 spi->chip_select = value;
2223
aff5e3f8 2224 /* Device speed */
671c3bf5
CG
2225 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
2226 spi->max_speed_hz = value;
aff5e3f8 2227
c2e51ac3
GU
2228 return 0;
2229}
2230
2231static struct spi_device *
8caab75f 2232of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
2233{
2234 struct spi_device *spi;
2235 int rc;
2236
2237 /* Alloc an spi_device */
8caab75f 2238 spi = spi_alloc_device(ctlr);
c2e51ac3 2239 if (!spi) {
25c56c88 2240 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
2241 rc = -ENOMEM;
2242 goto err_out;
2243 }
2244
2245 /* Select device driver */
2246 rc = of_modalias_node(nc, spi->modalias,
2247 sizeof(spi->modalias));
2248 if (rc < 0) {
25c56c88 2249 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
2250 goto err_out;
2251 }
2252
8caab75f 2253 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
2254 if (rc)
2255 goto err_out;
2256
aff5e3f8
PA
2257 /* Store a pointer to the node in the device structure */
2258 of_node_get(nc);
2259 spi->dev.of_node = nc;
0e793ba7 2260 spi->dev.fwnode = of_fwnode_handle(nc);
aff5e3f8
PA
2261
2262 /* Register the new device */
aff5e3f8
PA
2263 rc = spi_add_device(spi);
2264 if (rc) {
25c56c88 2265 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2266 goto err_of_node_put;
aff5e3f8
PA
2267 }
2268
2269 return spi;
2270
8324147f
JH
2271err_of_node_put:
2272 of_node_put(nc);
aff5e3f8
PA
2273err_out:
2274 spi_dev_put(spi);
2275 return ERR_PTR(rc);
2276}
2277
d57a4282
GL
2278/**
2279 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2280 * @ctlr: Pointer to spi_controller device
d57a4282 2281 *
6c364062
GU
2282 * Registers an spi_device for each child node of controller node which
2283 * represents a valid SPI slave.
d57a4282 2284 */
8caab75f 2285static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
2286{
2287 struct spi_device *spi;
2288 struct device_node *nc;
d57a4282 2289
8caab75f 2290 if (!ctlr->dev.of_node)
d57a4282
GL
2291 return;
2292
8caab75f 2293 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
2294 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2295 continue;
8caab75f 2296 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2297 if (IS_ERR(spi)) {
8caab75f 2298 dev_warn(&ctlr->dev,
25c56c88 2299 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
2300 of_node_clear_flag(nc, OF_POPULATED);
2301 }
d57a4282
GL
2302 }
2303}
2304#else
8caab75f 2305static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
2306#endif
2307
0c79378c
SR
2308/**
2309 * spi_new_ancillary_device() - Register ancillary SPI device
2310 * @spi: Pointer to the main SPI device registering the ancillary device
2311 * @chip_select: Chip Select of the ancillary device
2312 *
2313 * Register an ancillary SPI device; for example some chips have a chip-select
2314 * for normal device usage and another one for setup/firmware upload.
2315 *
2316 * This may only be called from main SPI device's probe routine.
2317 *
2318 * Return: 0 on success; negative errno on failure
2319 */
2320struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
2321 u8 chip_select)
2322{
2323 struct spi_device *ancillary;
2324 int rc = 0;
2325
2326 /* Alloc an spi_device */
2327 ancillary = spi_alloc_device(spi->controller);
2328 if (!ancillary) {
2329 rc = -ENOMEM;
2330 goto err_out;
2331 }
2332
2333 strlcpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
2334
2335 /* Use provided chip-select for ancillary device */
2336 ancillary->chip_select = chip_select;
2337
2338 /* Take over SPI mode/speed from SPI main device */
2339 ancillary->max_speed_hz = spi->max_speed_hz;
b01d5506 2340 ancillary->mode = spi->mode;
0c79378c
SR
2341
2342 /* Register the new device */
2343 rc = spi_add_device_locked(ancillary);
2344 if (rc) {
2345 dev_err(&spi->dev, "failed to register ancillary device\n");
2346 goto err_out;
2347 }
2348
2349 return ancillary;
2350
2351err_out:
2352 spi_dev_put(ancillary);
2353 return ERR_PTR(rc);
2354}
2355EXPORT_SYMBOL_GPL(spi_new_ancillary_device);
2356
64bee4d2 2357#ifdef CONFIG_ACPI
4c3c5954
AB
2358struct acpi_spi_lookup {
2359 struct spi_controller *ctlr;
2360 u32 max_speed_hz;
2361 u32 mode;
2362 int irq;
2363 u8 bits_per_word;
2364 u8 chip_select;
87e59b36
SB
2365 int n;
2366 int index;
4c3c5954
AB
2367};
2368
e612af7a
SB
2369static int acpi_spi_count(struct acpi_resource *ares, void *data)
2370{
2371 struct acpi_resource_spi_serialbus *sb;
2372 int *count = data;
2373
2374 if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
2375 return 1;
2376
2377 sb = &ares->data.spi_serial_bus;
2378 if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_SPI)
2379 return 1;
2380
2381 *count = *count + 1;
2382
2383 return 1;
2384}
2385
2386/**
2387 * acpi_spi_count_resources - Count the number of SpiSerialBus resources
2388 * @adev: ACPI device
2389 *
2390 * Returns the number of SpiSerialBus resources in the ACPI-device's
2391 * resource-list; or a negative error code.
2392 */
2393int acpi_spi_count_resources(struct acpi_device *adev)
2394{
2395 LIST_HEAD(r);
2396 int count = 0;
2397 int ret;
2398
2399 ret = acpi_dev_get_resources(adev, &r, acpi_spi_count, &count);
2400 if (ret < 0)
2401 return ret;
2402
2403 acpi_dev_free_resource_list(&r);
2404
2405 return count;
2406}
2407EXPORT_SYMBOL_GPL(acpi_spi_count_resources);
2408
4c3c5954
AB
2409static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2410 struct acpi_spi_lookup *lookup)
8a2e487e 2411{
8a2e487e
LW
2412 const union acpi_object *obj;
2413
2414 if (!x86_apple_machine)
2415 return;
2416
2417 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2418 && obj->buffer.length >= 4)
4c3c5954 2419 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW
2420
2421 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2422 && obj->buffer.length == 8)
4c3c5954 2423 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW
2424
2425 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2426 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2427 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW
2428
2429 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2430 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2431 lookup->mode |= SPI_CPOL;
8a2e487e
LW
2432
2433 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2434 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2435 lookup->mode |= SPI_CPHA;
8a2e487e
LW
2436}
2437
87e59b36
SB
2438static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev);
2439
64bee4d2
MW
2440static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2441{
4c3c5954
AB
2442 struct acpi_spi_lookup *lookup = data;
2443 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW
2444
2445 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2446 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB
2447 acpi_handle parent_handle;
2448 acpi_status status;
64bee4d2
MW
2449
2450 sb = &ares->data.spi_serial_bus;
2451 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954 2452
87e59b36
SB
2453 if (lookup->index != -1 && lookup->n++ != lookup->index)
2454 return 1;
2455
2456 if (lookup->index == -1 && !ctlr)
2457 return -ENODEV;
2458
4c3c5954
AB
2459 status = acpi_get_handle(NULL,
2460 sb->resource_source.string_ptr,
2461 &parent_handle);
2462
87e59b36 2463 if (ACPI_FAILURE(status))
4c3c5954
AB
2464 return -ENODEV;
2465
87e59b36
SB
2466 if (ctlr) {
2467 if (ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2468 return -ENODEV;
2469 } else {
2470 struct acpi_device *adev;
2471
ac2a3fee
RW
2472 adev = acpi_fetch_acpi_dev(parent_handle);
2473 if (!adev)
87e59b36
SB
2474 return -ENODEV;
2475
2476 ctlr = acpi_spi_find_controller_by_adev(adev);
2477 if (!ctlr)
2478 return -ENODEV;
2479
2480 lookup->ctlr = ctlr;
2481 }
2482
a0a90718
MW
2483 /*
2484 * ACPI DeviceSelection numbering is handled by the
2485 * host controller driver in Windows and can vary
2486 * from driver to driver. In Linux we always expect
2487 * 0 .. max - 1 so we need to ask the driver to
2488 * translate between the two schemes.
2489 */
8caab75f
GU
2490 if (ctlr->fw_translate_cs) {
2491 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
2492 sb->device_selection);
2493 if (cs < 0)
2494 return cs;
4c3c5954 2495 lookup->chip_select = cs;
a0a90718 2496 } else {
4c3c5954 2497 lookup->chip_select = sb->device_selection;
a0a90718
MW
2498 }
2499
4c3c5954 2500 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2501 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW
2502
2503 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2504 lookup->mode |= SPI_CPHA;
64bee4d2 2505 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2506 lookup->mode |= SPI_CPOL;
64bee4d2 2507 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2508 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2509 }
4c3c5954 2510 } else if (lookup->irq < 0) {
64bee4d2
MW
2511 struct resource r;
2512
2513 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2514 lookup->irq = r.start;
64bee4d2
MW
2515 }
2516
2517 /* Always tell the ACPI core to skip this resource */
2518 return 1;
2519}
2520
000bee0e
SB
2521/**
2522 * acpi_spi_device_alloc - Allocate a spi device, and fill it in with ACPI information
2523 * @ctlr: controller to which the spi device belongs
2524 * @adev: ACPI Device for the spi device
87e59b36 2525 * @index: Index of the spi resource inside the ACPI Node
000bee0e
SB
2526 *
2527 * This should be used to allocate a new spi device from and ACPI Node.
2528 * The caller is responsible for calling spi_add_device to register the spi device.
2529 *
87e59b36
SB
2530 * If ctlr is set to NULL, the Controller for the spi device will be looked up
2531 * using the resource.
2532 * If index is set to -1, index is not used.
2533 * Note: If index is -1, ctlr must be set.
2534 *
000bee0e
SB
2535 * Return: a pointer to the new device, or ERR_PTR on error.
2536 */
2537struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
87e59b36
SB
2538 struct acpi_device *adev,
2539 int index)
64bee4d2 2540{
4c3c5954 2541 acpi_handle parent_handle = NULL;
64bee4d2 2542 struct list_head resource_list;
b28944c6 2543 struct acpi_spi_lookup lookup = {};
64bee4d2
MW
2544 struct spi_device *spi;
2545 int ret;
2546
87e59b36
SB
2547 if (!ctlr && index == -1)
2548 return ERR_PTR(-EINVAL);
2549
4c3c5954 2550 lookup.ctlr = ctlr;
4c3c5954 2551 lookup.irq = -1;
87e59b36
SB
2552 lookup.index = index;
2553 lookup.n = 0;
64bee4d2
MW
2554
2555 INIT_LIST_HEAD(&resource_list);
2556 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2557 acpi_spi_add_resource, &lookup);
64bee4d2
MW
2558 acpi_dev_free_resource_list(&resource_list);
2559
4c3c5954
AB
2560 if (ret < 0)
2561 /* found SPI in _CRS but it points to another controller */
000bee0e 2562 return ERR_PTR(-ENODEV);
8a2e487e 2563
4c3c5954 2564 if (!lookup.max_speed_hz &&
10e92724 2565 ACPI_SUCCESS(acpi_get_parent(adev->handle, &parent_handle)) &&
87e59b36 2566 ACPI_HANDLE(lookup.ctlr->dev.parent) == parent_handle) {
4c3c5954
AB
2567 /* Apple does not use _CRS but nested devices for SPI slaves */
2568 acpi_spi_parse_apple_properties(adev, &lookup);
2569 }
2570
2571 if (!lookup.max_speed_hz)
000bee0e 2572 return ERR_PTR(-ENODEV);
4c3c5954 2573
87e59b36 2574 spi = spi_alloc_device(lookup.ctlr);
4c3c5954 2575 if (!spi) {
87e59b36 2576 dev_err(&lookup.ctlr->dev, "failed to allocate SPI device for %s\n",
4c3c5954 2577 dev_name(&adev->dev));
000bee0e 2578 return ERR_PTR(-ENOMEM);
64bee4d2
MW
2579 }
2580
4c3c5954
AB
2581 ACPI_COMPANION_SET(&spi->dev, adev);
2582 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2583 spi->mode |= lookup.mode;
4c3c5954
AB
2584 spi->irq = lookup.irq;
2585 spi->bits_per_word = lookup.bits_per_word;
2586 spi->chip_select = lookup.chip_select;
2587
000bee0e
SB
2588 return spi;
2589}
2590EXPORT_SYMBOL_GPL(acpi_spi_device_alloc);
2591
2592static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
2593 struct acpi_device *adev)
2594{
2595 struct spi_device *spi;
2596
2597 if (acpi_bus_get_status(adev) || !adev->status.present ||
2598 acpi_device_enumerated(adev))
2599 return AE_OK;
2600
87e59b36 2601 spi = acpi_spi_device_alloc(ctlr, adev, -1);
000bee0e
SB
2602 if (IS_ERR(spi)) {
2603 if (PTR_ERR(spi) == -ENOMEM)
2604 return AE_NO_MEMORY;
2605 else
2606 return AE_OK;
2607 }
2608
0c6543f6
DD
2609 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2610 sizeof(spi->modalias));
2611
33ada67d
CR
2612 if (spi->irq < 0)
2613 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2614
7f24467f
OP
2615 acpi_device_set_enumerated(adev);
2616
33cf00e5 2617 adev->power.flags.ignore_parent = true;
64bee4d2 2618 if (spi_add_device(spi)) {
33cf00e5 2619 adev->power.flags.ignore_parent = false;
8caab75f 2620 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
2621 dev_name(&adev->dev));
2622 spi_dev_put(spi);
2623 }
2624
2625 return AE_OK;
2626}
2627
7f24467f
OP
2628static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2629 void *data, void **return_value)
2630{
7030c428 2631 struct acpi_device *adev = acpi_fetch_acpi_dev(handle);
8caab75f 2632 struct spi_controller *ctlr = data;
7f24467f 2633
7030c428 2634 if (!adev)
7f24467f
OP
2635 return AE_OK;
2636
8caab75f 2637 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
2638}
2639
4c3c5954
AB
2640#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2641
8caab75f 2642static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
2643{
2644 acpi_status status;
2645 acpi_handle handle;
2646
8caab75f 2647 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
2648 if (!handle)
2649 return;
2650
4c3c5954
AB
2651 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2652 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2653 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2654 if (ACPI_FAILURE(status))
8caab75f 2655 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
2656}
2657#else
8caab75f 2658static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
2659#endif /* CONFIG_ACPI */
2660
8caab75f 2661static void spi_controller_release(struct device *dev)
8ae12a0d 2662{
8caab75f 2663 struct spi_controller *ctlr;
8ae12a0d 2664
8caab75f
GU
2665 ctlr = container_of(dev, struct spi_controller, dev);
2666 kfree(ctlr);
8ae12a0d
DB
2667}
2668
2669static struct class spi_master_class = {
2670 .name = "spi_master",
2671 .owner = THIS_MODULE,
8caab75f 2672 .dev_release = spi_controller_release,
eca2ebc7 2673 .dev_groups = spi_master_groups,
8ae12a0d
DB
2674};
2675
6c364062
GU
2676#ifdef CONFIG_SPI_SLAVE
2677/**
2678 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2679 * controller
2680 * @spi: device used for the current transfer
2681 */
2682int spi_slave_abort(struct spi_device *spi)
2683{
8caab75f 2684 struct spi_controller *ctlr = spi->controller;
6c364062 2685
8caab75f
GU
2686 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2687 return ctlr->slave_abort(ctlr);
6c364062
GU
2688
2689 return -ENOTSUPP;
2690}
2691EXPORT_SYMBOL_GPL(spi_slave_abort);
2692
2693static int match_true(struct device *dev, void *data)
2694{
2695 return 1;
2696}
2697
cc8b4659
GU
2698static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2699 char *buf)
6c364062 2700{
8caab75f
GU
2701 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2702 dev);
6c364062
GU
2703 struct device *child;
2704
2705 child = device_find_child(&ctlr->dev, NULL, match_true);
2706 return sprintf(buf, "%s\n",
2707 child ? to_spi_device(child)->modalias : NULL);
2708}
2709
cc8b4659
GU
2710static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2711 const char *buf, size_t count)
6c364062 2712{
8caab75f
GU
2713 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2714 dev);
6c364062
GU
2715 struct spi_device *spi;
2716 struct device *child;
2717 char name[32];
2718 int rc;
2719
2720 rc = sscanf(buf, "%31s", name);
2721 if (rc != 1 || !name[0])
2722 return -EINVAL;
2723
2724 child = device_find_child(&ctlr->dev, NULL, match_true);
2725 if (child) {
2726 /* Remove registered slave */
2727 device_unregister(child);
2728 put_device(child);
2729 }
2730
2731 if (strcmp(name, "(null)")) {
2732 /* Register new slave */
2733 spi = spi_alloc_device(ctlr);
2734 if (!spi)
2735 return -ENOMEM;
2736
2737 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2738
2739 rc = spi_add_device(spi);
2740 if (rc) {
2741 spi_dev_put(spi);
2742 return rc;
2743 }
2744 }
2745
2746 return count;
2747}
2748
cc8b4659 2749static DEVICE_ATTR_RW(slave);
6c364062
GU
2750
2751static struct attribute *spi_slave_attrs[] = {
2752 &dev_attr_slave.attr,
2753 NULL,
2754};
2755
2756static const struct attribute_group spi_slave_group = {
2757 .attrs = spi_slave_attrs,
2758};
2759
2760static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2761 &spi_controller_statistics_group,
6c364062
GU
2762 &spi_slave_group,
2763 NULL,
2764};
2765
2766static struct class spi_slave_class = {
2767 .name = "spi_slave",
2768 .owner = THIS_MODULE,
8caab75f 2769 .dev_release = spi_controller_release,
6c364062
GU
2770 .dev_groups = spi_slave_groups,
2771};
2772#else
2773extern struct class spi_slave_class; /* dummy */
2774#endif
8ae12a0d
DB
2775
2776/**
6c364062 2777 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2778 * @dev: the controller, possibly using the platform_bus
33e34dc6 2779 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW
2780 * memory is in the driver_data field of the returned device, accessible
2781 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2782 * drivers granting DMA access to portions of their private data need to
2783 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU
2784 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2785 * slave (true) controller
33e34dc6 2786 * Context: can sleep
8ae12a0d 2787 *
6c364062 2788 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2789 * only ones directly touching chip registers. It's how they allocate
8caab75f 2790 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2791 *
97d56dc6 2792 * This must be called from context that can sleep.
8ae12a0d 2793 *
6c364062 2794 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
2795 * controller's methods before calling spi_register_controller(); and (after
2796 * errors adding the device) calling spi_controller_put() to prevent a memory
2797 * leak.
97d56dc6 2798 *
6c364062 2799 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2800 */
8caab75f
GU
2801struct spi_controller *__spi_alloc_controller(struct device *dev,
2802 unsigned int size, bool slave)
8ae12a0d 2803{
8caab75f 2804 struct spi_controller *ctlr;
229e6af1 2805 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2806
0c868461
DB
2807 if (!dev)
2808 return NULL;
2809
229e6af1 2810 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2811 if (!ctlr)
8ae12a0d
DB
2812 return NULL;
2813
8caab75f 2814 device_initialize(&ctlr->dev);
16a8e2fb
UKK
2815 INIT_LIST_HEAD(&ctlr->queue);
2816 spin_lock_init(&ctlr->queue_lock);
2817 spin_lock_init(&ctlr->bus_lock_spinlock);
2818 mutex_init(&ctlr->bus_lock_mutex);
2819 mutex_init(&ctlr->io_mutex);
2820 mutex_init(&ctlr->add_lock);
8caab75f
GU
2821 ctlr->bus_num = -1;
2822 ctlr->num_chipselect = 1;
2823 ctlr->slave = slave;
6c364062 2824 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2825 ctlr->dev.class = &spi_slave_class;
6c364062 2826 else
8caab75f
GU
2827 ctlr->dev.class = &spi_master_class;
2828 ctlr->dev.parent = dev;
2829 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2830 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2831
8caab75f 2832 return ctlr;
8ae12a0d 2833}
6c364062 2834EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2835
5e844cc3
LW
2836static void devm_spi_release_controller(struct device *dev, void *ctlr)
2837{
2838 spi_controller_put(*(struct spi_controller **)ctlr);
2839}
2840
2841/**
2842 * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller()
2843 * @dev: physical device of SPI controller
2844 * @size: how much zeroed driver-private data to allocate
2845 * @slave: whether to allocate an SPI master (false) or SPI slave (true)
2846 * Context: can sleep
2847 *
2848 * Allocate an SPI controller and automatically release a reference on it
2849 * when @dev is unbound from its driver. Drivers are thus relieved from
2850 * having to call spi_controller_put().
2851 *
2852 * The arguments to this function are identical to __spi_alloc_controller().
2853 *
2854 * Return: the SPI controller structure on success, else NULL.
2855 */
2856struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
2857 unsigned int size,
2858 bool slave)
2859{
2860 struct spi_controller **ptr, *ctlr;
2861
2862 ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr),
2863 GFP_KERNEL);
2864 if (!ptr)
2865 return NULL;
2866
2867 ctlr = __spi_alloc_controller(dev, size, slave);
2868 if (ctlr) {
794aaf01 2869 ctlr->devm_allocated = true;
5e844cc3
LW
2870 *ptr = ctlr;
2871 devres_add(dev, ptr);
2872 } else {
2873 devres_free(ptr);
2874 }
2875
2876 return ctlr;
2877}
2878EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller);
2879
f3186dd8
LW
2880/**
2881 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2882 * @ctlr: The SPI master to grab GPIO descriptors for
2883 */
2884static int spi_get_gpio_descs(struct spi_controller *ctlr)
2885{
2886 int nb, i;
2887 struct gpio_desc **cs;
2888 struct device *dev = &ctlr->dev;
7d93aecd
GU
2889 unsigned long native_cs_mask = 0;
2890 unsigned int num_cs_gpios = 0;
f3186dd8
LW
2891
2892 nb = gpiod_count(dev, "cs");
31ed8ebc
AS
2893 if (nb < 0) {
2894 /* No GPIOs at all is fine, else return the error */
2895 if (nb == -ENOENT)
2896 return 0;
f3186dd8 2897 return nb;
31ed8ebc
AS
2898 }
2899
2900 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
f3186dd8
LW
2901
2902 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2903 GFP_KERNEL);
2904 if (!cs)
2905 return -ENOMEM;
2906 ctlr->cs_gpiods = cs;
2907
2908 for (i = 0; i < nb; i++) {
2909 /*
2910 * Most chipselects are active low, the inverted
2911 * semantics are handled by special quirks in gpiolib,
2912 * so initializing them GPIOD_OUT_LOW here means
2913 * "unasserted", in most cases this will drive the physical
2914 * line high.
2915 */
2916 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2917 GPIOD_OUT_LOW);
1723fdec
GU
2918 if (IS_ERR(cs[i]))
2919 return PTR_ERR(cs[i]);
f3186dd8
LW
2920
2921 if (cs[i]) {
2922 /*
2923 * If we find a CS GPIO, name it after the device and
2924 * chip select line.
2925 */
2926 char *gpioname;
2927
2928 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2929 dev_name(dev), i);
2930 if (!gpioname)
2931 return -ENOMEM;
2932 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU
2933 num_cs_gpios++;
2934 continue;
f3186dd8 2935 }
7d93aecd
GU
2936
2937 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
2938 dev_err(dev, "Invalid native chip select %d\n", i);
2939 return -EINVAL;
f3186dd8 2940 }
7d93aecd
GU
2941 native_cs_mask |= BIT(i);
2942 }
2943
f60d7270 2944 ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
dbaca8e5
AS
2945
2946 if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
2947 ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
7d93aecd
GU
2948 dev_err(dev, "No unused native chip select available\n");
2949 return -EINVAL;
f3186dd8
LW
2950 }
2951
2952 return 0;
2953}
2954
bdf3a3b5
BB
2955static int spi_controller_check_ops(struct spi_controller *ctlr)
2956{
2957 /*
b5932f5c
BB
2958 * The controller may implement only the high-level SPI-memory like
2959 * operations if it does not support regular SPI transfers, and this is
2960 * valid use case.
2961 * If ->mem_ops is NULL, we request that at least one of the
2962 * ->transfer_xxx() method be implemented.
bdf3a3b5 2963 */
b5932f5c
BB
2964 if (ctlr->mem_ops) {
2965 if (!ctlr->mem_ops->exec_op)
2966 return -EINVAL;
2967 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2968 !ctlr->transfer_one_message) {
bdf3a3b5 2969 return -EINVAL;
b5932f5c 2970 }
bdf3a3b5
BB
2971
2972 return 0;
2973}
2974
8ae12a0d 2975/**
8caab75f
GU
2976 * spi_register_controller - register SPI master or slave controller
2977 * @ctlr: initialized master, originally from spi_alloc_master() or
2978 * spi_alloc_slave()
33e34dc6 2979 * Context: can sleep
8ae12a0d 2980 *
8caab75f 2981 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2982 * such as the platform bus. The final stage of probe() in that code
8caab75f 2983 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2984 *
2985 * SPI controllers use board specific (often SOC specific) bus numbers,
2986 * and board-specific addressing for SPI devices combines those numbers
2987 * with chip select numbers. Since SPI does not directly support dynamic
2988 * device identification, boards need configuration tables telling which
2989 * chip is at which address.
2990 *
2991 * This must be called from context that can sleep. It returns zero on
8caab75f 2992 * success, else a negative error code (dropping the controller's refcount).
0c868461 2993 * After a successful return, the caller is responsible for calling
8caab75f 2994 * spi_unregister_controller().
97d56dc6
JMC
2995 *
2996 * Return: zero on success, else a negative error code.
8ae12a0d 2997 */
8caab75f 2998int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2999{
8caab75f 3000 struct device *dev = ctlr->dev.parent;
2b9603a0 3001 struct boardinfo *bi;
b93318a2 3002 int status;
42bdd706 3003 int id, first_dynamic;
8ae12a0d 3004
0c868461
DB
3005 if (!dev)
3006 return -ENODEV;
3007
bdf3a3b5
BB
3008 /*
3009 * Make sure all necessary hooks are implemented before registering
3010 * the SPI controller.
3011 */
3012 status = spi_controller_check_ops(ctlr);
3013 if (status)
3014 return status;
3015
04b2d03a
GU
3016 if (ctlr->bus_num >= 0) {
3017 /* devices with a fixed bus num must check-in with the num */
3018 mutex_lock(&board_lock);
3019 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
3020 ctlr->bus_num + 1, GFP_KERNEL);
3021 mutex_unlock(&board_lock);
3022 if (WARN(id < 0, "couldn't get idr"))
3023 return id == -ENOSPC ? -EBUSY : id;
3024 ctlr->bus_num = id;
3025 } else if (ctlr->dev.of_node) {
3026 /* allocate dynamic bus number using Linux idr */
9b61e302
SM
3027 id = of_alias_get_id(ctlr->dev.of_node, "spi");
3028 if (id >= 0) {
3029 ctlr->bus_num = id;
3030 mutex_lock(&board_lock);
3031 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
3032 ctlr->bus_num + 1, GFP_KERNEL);
3033 mutex_unlock(&board_lock);
3034 if (WARN(id < 0, "couldn't get idr"))
3035 return id == -ENOSPC ? -EBUSY : id;
3036 }
3037 }
8caab75f 3038 if (ctlr->bus_num < 0) {
42bdd706
LS
3039 first_dynamic = of_alias_get_highest_id("spi");
3040 if (first_dynamic < 0)
3041 first_dynamic = 0;
3042 else
3043 first_dynamic++;
3044
9a9a047a 3045 mutex_lock(&board_lock);
42bdd706
LS
3046 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
3047 0, GFP_KERNEL);
9a9a047a
SM
3048 mutex_unlock(&board_lock);
3049 if (WARN(id < 0, "couldn't get idr"))
3050 return id;
3051 ctlr->bus_num = id;
8ae12a0d 3052 }
8caab75f
GU
3053 ctlr->bus_lock_flag = 0;
3054 init_completion(&ctlr->xfer_completion);
69fa9590 3055 init_completion(&ctlr->cur_msg_completion);
8caab75f
GU
3056 if (!ctlr->max_dma_len)
3057 ctlr->max_dma_len = INT_MAX;
cf32b71e 3058
350de7ce
AS
3059 /*
3060 * Register the device, then userspace will see it.
3061 * Registration fails if the bus ID is in use.
8ae12a0d 3062 */
8caab75f 3063 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4 3064
f48dc6b9
LW
3065 if (!spi_controller_is_slave(ctlr) && ctlr->use_gpio_descriptors) {
3066 status = spi_get_gpio_descs(ctlr);
3067 if (status)
3068 goto free_bus_id;
3069 /*
3070 * A controller using GPIO descriptors always
3071 * supports SPI_CS_HIGH if need be.
3072 */
3073 ctlr->mode_bits |= SPI_CS_HIGH;
0a919ae4
AS
3074 }
3075
f9481b08
TA
3076 /*
3077 * Even if it's just one always-selected device, there must
3078 * be at least one chipselect.
3079 */
f9981d4f
AK
3080 if (!ctlr->num_chipselect) {
3081 status = -EINVAL;
3082 goto free_bus_id;
3083 }
f9481b08 3084
6bb477df
YZ
3085 /* setting last_cs to -1 means no chip selected */
3086 ctlr->last_cs = -1;
3087
8caab75f 3088 status = device_add(&ctlr->dev);
f9981d4f
AK
3089 if (status < 0)
3090 goto free_bus_id;
9b61e302 3091 dev_dbg(dev, "registered %s %s\n",
8caab75f 3092 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 3093 dev_name(&ctlr->dev));
8ae12a0d 3094
b5932f5c
BB
3095 /*
3096 * If we're using a queued driver, start the queue. Note that we don't
3097 * need the queueing logic if the driver is only supporting high-level
3098 * memory operations.
3099 */
3100 if (ctlr->transfer) {
8caab75f 3101 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 3102 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 3103 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 3104 if (status) {
8caab75f 3105 device_del(&ctlr->dev);
f9981d4f 3106 goto free_bus_id;
ffbbdd21
LW
3107 }
3108 }
eca2ebc7 3109 /* add statistics */
6598b91b
DJ
3110 ctlr->pcpu_statistics = spi_alloc_pcpu_stats(dev);
3111 if (!ctlr->pcpu_statistics) {
3112 dev_err(dev, "Error allocating per-cpu statistics\n");
d52b095b 3113 status = -ENOMEM;
6598b91b
DJ
3114 goto destroy_queue;
3115 }
ffbbdd21 3116
2b9603a0 3117 mutex_lock(&board_lock);
8caab75f 3118 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 3119 list_for_each_entry(bi, &board_list, list)
8caab75f 3120 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
3121 mutex_unlock(&board_lock);
3122
64bee4d2 3123 /* Register devices from the device tree and ACPI */
8caab75f
GU
3124 of_register_spi_devices(ctlr);
3125 acpi_register_spi_devices(ctlr);
f9981d4f
AK
3126 return status;
3127
6598b91b
DJ
3128destroy_queue:
3129 spi_destroy_queue(ctlr);
f9981d4f
AK
3130free_bus_id:
3131 mutex_lock(&board_lock);
3132 idr_remove(&spi_master_idr, ctlr->bus_num);
3133 mutex_unlock(&board_lock);
8ae12a0d
DB
3134 return status;
3135}
8caab75f 3136EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 3137
59ebbe40 3138static void devm_spi_unregister(void *ctlr)
666d5b4c 3139{
59ebbe40 3140 spi_unregister_controller(ctlr);
666d5b4c
MB
3141}
3142
3143/**
8caab75f
GU
3144 * devm_spi_register_controller - register managed SPI master or slave
3145 * controller
3146 * @dev: device managing SPI controller
3147 * @ctlr: initialized controller, originally from spi_alloc_master() or
3148 * spi_alloc_slave()
666d5b4c
MB
3149 * Context: can sleep
3150 *
8caab75f 3151 * Register a SPI device as with spi_register_controller() which will
68b892f1 3152 * automatically be unregistered and freed.
97d56dc6
JMC
3153 *
3154 * Return: zero on success, else a negative error code.
666d5b4c 3155 */
8caab75f
GU
3156int devm_spi_register_controller(struct device *dev,
3157 struct spi_controller *ctlr)
666d5b4c 3158{
666d5b4c
MB
3159 int ret;
3160
8caab75f 3161 ret = spi_register_controller(ctlr);
59ebbe40
TT
3162 if (ret)
3163 return ret;
666d5b4c 3164
59ebbe40 3165 return devm_add_action_or_reset(dev, devm_spi_unregister, ctlr);
666d5b4c 3166}
8caab75f 3167EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 3168
34860089 3169static int __unregister(struct device *dev, void *null)
8ae12a0d 3170{
34860089 3171 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
3172 return 0;
3173}
3174
3175/**
8caab75f
GU
3176 * spi_unregister_controller - unregister SPI master or slave controller
3177 * @ctlr: the controller being unregistered
33e34dc6 3178 * Context: can sleep
8ae12a0d 3179 *
8caab75f 3180 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
3181 * only ones directly touching chip registers.
3182 *
3183 * This must be called from context that can sleep.
68b892f1
JH
3184 *
3185 * Note that this function also drops a reference to the controller.
8ae12a0d 3186 */
8caab75f 3187void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 3188{
9b61e302 3189 struct spi_controller *found;
67f7b278 3190 int id = ctlr->bus_num;
89fc9a1a 3191
ddf75be4
LW
3192 /* Prevent addition of new devices, unregister existing ones */
3193 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3194 mutex_lock(&ctlr->add_lock);
ddf75be4 3195
84855678
LW
3196 device_for_each_child(&ctlr->dev, NULL, __unregister);
3197
9b61e302
SM
3198 /* First make sure that this controller was ever added */
3199 mutex_lock(&board_lock);
67f7b278 3200 found = idr_find(&spi_master_idr, id);
9b61e302 3201 mutex_unlock(&board_lock);
8caab75f
GU
3202 if (ctlr->queued) {
3203 if (spi_destroy_queue(ctlr))
3204 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 3205 }
2b9603a0 3206 mutex_lock(&board_lock);
8caab75f 3207 list_del(&ctlr->list);
2b9603a0
FT
3208 mutex_unlock(&board_lock);
3209
5e844cc3
LW
3210 device_del(&ctlr->dev);
3211
9b61e302
SM
3212 /* free bus id */
3213 mutex_lock(&board_lock);
613bd1ea
JN
3214 if (found == ctlr)
3215 idr_remove(&spi_master_idr, id);
9b61e302 3216 mutex_unlock(&board_lock);
ddf75be4
LW
3217
3218 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3219 mutex_unlock(&ctlr->add_lock);
6c53b45c
MW
3220
3221 /* Release the last reference on the controller if its driver
3222 * has not yet been converted to devm_spi_alloc_master/slave().
3223 */
3224 if (!ctlr->devm_allocated)
3225 put_device(&ctlr->dev);
8ae12a0d 3226}
8caab75f 3227EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 3228
8caab75f 3229int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
3230{
3231 int ret;
3232
8caab75f
GU
3233 /* Basically no-ops for non-queued controllers */
3234 if (!ctlr->queued)
ffbbdd21
LW
3235 return 0;
3236
8caab75f 3237 ret = spi_stop_queue(ctlr);
ffbbdd21 3238 if (ret)
8caab75f 3239 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
3240
3241 return ret;
3242}
8caab75f 3243EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 3244
8caab75f 3245int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
3246{
3247 int ret;
3248
8caab75f 3249 if (!ctlr->queued)
ffbbdd21
LW
3250 return 0;
3251
8caab75f 3252 ret = spi_start_queue(ctlr);
ffbbdd21 3253 if (ret)
8caab75f 3254 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
3255
3256 return ret;
3257}
8caab75f 3258EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 3259
8ae12a0d
DB
3260/*-------------------------------------------------------------------------*/
3261
523baf5a
MS
3262/* Core methods for spi_message alterations */
3263
8caab75f 3264static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
3265 struct spi_message *msg,
3266 void *res)
3267{
3268 struct spi_replaced_transfers *rxfer = res;
3269 size_t i;
3270
3271 /* call extra callback if requested */
3272 if (rxfer->release)
8caab75f 3273 rxfer->release(ctlr, msg, res);
523baf5a
MS
3274
3275 /* insert replaced transfers back into the message */
3276 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
3277
3278 /* remove the formerly inserted entries */
3279 for (i = 0; i < rxfer->inserted; i++)
3280 list_del(&rxfer->inserted_transfers[i].transfer_list);
3281}
3282
3283/**
3284 * spi_replace_transfers - replace transfers with several transfers
3285 * and register change with spi_message.resources
3286 * @msg: the spi_message we work upon
3287 * @xfer_first: the first spi_transfer we want to replace
3288 * @remove: number of transfers to remove
3289 * @insert: the number of transfers we want to insert instead
3290 * @release: extra release code necessary in some circumstances
3291 * @extradatasize: extra data to allocate (with alignment guarantees
3292 * of struct @spi_transfer)
05885397 3293 * @gfp: gfp flags
523baf5a
MS
3294 *
3295 * Returns: pointer to @spi_replaced_transfers,
3296 * PTR_ERR(...) in case of errors.
3297 */
da21fde0 3298static struct spi_replaced_transfers *spi_replace_transfers(
523baf5a
MS
3299 struct spi_message *msg,
3300 struct spi_transfer *xfer_first,
3301 size_t remove,
3302 size_t insert,
3303 spi_replaced_release_t release,
3304 size_t extradatasize,
3305 gfp_t gfp)
3306{
3307 struct spi_replaced_transfers *rxfer;
3308 struct spi_transfer *xfer;
3309 size_t i;
3310
3311 /* allocate the structure using spi_res */
3312 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3313 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS
3314 + extradatasize,
3315 gfp);
3316 if (!rxfer)
3317 return ERR_PTR(-ENOMEM);
3318
3319 /* the release code to invoke before running the generic release */
3320 rxfer->release = release;
3321
3322 /* assign extradata */
3323 if (extradatasize)
3324 rxfer->extradata =
3325 &rxfer->inserted_transfers[insert];
3326
3327 /* init the replaced_transfers list */
3328 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3329
350de7ce
AS
3330 /*
3331 * Assign the list_entry after which we should reinsert
523baf5a
MS
3332 * the @replaced_transfers - it may be spi_message.messages!
3333 */
3334 rxfer->replaced_after = xfer_first->transfer_list.prev;
3335
3336 /* remove the requested number of transfers */
3337 for (i = 0; i < remove; i++) {
350de7ce
AS
3338 /*
3339 * If the entry after replaced_after it is msg->transfers
523baf5a 3340 * then we have been requested to remove more transfers
350de7ce 3341 * than are in the list.
523baf5a
MS
3342 */
3343 if (rxfer->replaced_after->next == &msg->transfers) {
3344 dev_err(&msg->spi->dev,
3345 "requested to remove more spi_transfers than are available\n");
3346 /* insert replaced transfers back into the message */
3347 list_splice(&rxfer->replaced_transfers,
3348 rxfer->replaced_after);
3349
3350 /* free the spi_replace_transfer structure */
3351 spi_res_free(rxfer);
3352
3353 /* and return with an error */
3354 return ERR_PTR(-EINVAL);
3355 }
3356
350de7ce
AS
3357 /*
3358 * Remove the entry after replaced_after from list of
3359 * transfers and add it to list of replaced_transfers.
523baf5a
MS
3360 */
3361 list_move_tail(rxfer->replaced_after->next,
3362 &rxfer->replaced_transfers);
3363 }
3364
350de7ce
AS
3365 /*
3366 * Create copy of the given xfer with identical settings
3367 * based on the first transfer to get removed.
523baf5a
MS
3368 */
3369 for (i = 0; i < insert; i++) {
3370 /* we need to run in reverse order */
3371 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3372
3373 /* copy all spi_transfer data */
3374 memcpy(xfer, xfer_first, sizeof(*xfer));
3375
3376 /* add to list */
3377 list_add(&xfer->transfer_list, rxfer->replaced_after);
3378
bebcfd27 3379 /* clear cs_change and delay for all but the last */
523baf5a
MS
3380 if (i) {
3381 xfer->cs_change = false;
bebcfd27 3382 xfer->delay.value = 0;
523baf5a
MS
3383 }
3384 }
3385
3386 /* set up inserted */
3387 rxfer->inserted = insert;
3388
3389 /* and register it with spi_res/spi_message */
3390 spi_res_add(msg, rxfer);
3391
3392 return rxfer;
3393}
523baf5a 3394
8caab75f 3395static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
3396 struct spi_message *msg,
3397 struct spi_transfer **xferp,
3398 size_t maxsize,
3399 gfp_t gfp)
d9f12122
MS
3400{
3401 struct spi_transfer *xfer = *xferp, *xfers;
3402 struct spi_replaced_transfers *srt;
3403 size_t offset;
3404 size_t count, i;
3405
d9f12122
MS
3406 /* calculate how many we have to replace */
3407 count = DIV_ROUND_UP(xfer->len, maxsize);
3408
3409 /* create replacement */
3410 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
3411 if (IS_ERR(srt))
3412 return PTR_ERR(srt);
d9f12122
MS
3413 xfers = srt->inserted_transfers;
3414
350de7ce
AS
3415 /*
3416 * Now handle each of those newly inserted spi_transfers.
3417 * Note that the replacements spi_transfers all are preset
d9f12122
MS
3418 * to the same values as *xferp, so tx_buf, rx_buf and len
3419 * are all identical (as well as most others)
3420 * so we just have to fix up len and the pointers.
3421 *
350de7ce
AS
3422 * This also includes support for the depreciated
3423 * spi_message.is_dma_mapped interface.
d9f12122
MS
3424 */
3425
350de7ce
AS
3426 /*
3427 * The first transfer just needs the length modified, so we
3428 * run it outside the loop.
d9f12122 3429 */
c8dab77a 3430 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
3431
3432 /* all the others need rx_buf/tx_buf also set */
3433 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3434 /* update rx_buf, tx_buf and dma */
3435 if (xfers[i].rx_buf)
3436 xfers[i].rx_buf += offset;
3437 if (xfers[i].rx_dma)
3438 xfers[i].rx_dma += offset;
3439 if (xfers[i].tx_buf)
3440 xfers[i].tx_buf += offset;
3441 if (xfers[i].tx_dma)
3442 xfers[i].tx_dma += offset;
3443
3444 /* update length */
3445 xfers[i].len = min(maxsize, xfers[i].len - offset);
3446 }
3447
350de7ce
AS
3448 /*
3449 * We set up xferp to the last entry we have inserted,
3450 * so that we skip those already split transfers.
d9f12122
MS
3451 */
3452 *xferp = &xfers[count - 1];
3453
3454 /* increment statistics counters */
6598b91b 3455 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics,
d9f12122 3456 transfers_split_maxsize);
6598b91b 3457 SPI_STATISTICS_INCREMENT_FIELD(msg->spi->pcpu_statistics,
d9f12122
MS
3458 transfers_split_maxsize);
3459
3460 return 0;
3461}
3462
3463/**
ce2424d7
MCC
3464 * spi_split_transfers_maxsize - split spi transfers into multiple transfers
3465 * when an individual transfer exceeds a
3466 * certain size
8caab75f 3467 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
3468 * @msg: the @spi_message to transform
3469 * @maxsize: the maximum when to apply this
10f11a22 3470 * @gfp: GFP allocation flags
d9f12122
MS
3471 *
3472 * Return: status of transformation
3473 */
8caab75f 3474int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
3475 struct spi_message *msg,
3476 size_t maxsize,
3477 gfp_t gfp)
3478{
3479 struct spi_transfer *xfer;
3480 int ret;
3481
350de7ce
AS
3482 /*
3483 * Iterate over the transfer_list,
d9f12122
MS
3484 * but note that xfer is advanced to the last transfer inserted
3485 * to avoid checking sizes again unnecessarily (also xfer does
350de7ce
AS
3486 * potentially belong to a different list by the time the
3487 * replacement has happened).
d9f12122
MS
3488 */
3489 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3490 if (xfer->len > maxsize) {
8caab75f
GU
3491 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3492 maxsize, gfp);
d9f12122
MS
3493 if (ret)
3494 return ret;
3495 }
3496 }
3497
3498 return 0;
3499}
3500EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
3501
3502/*-------------------------------------------------------------------------*/
3503
8caab75f 3504/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
3505 * other core methods are currently defined as inline functions.
3506 */
3507
8caab75f
GU
3508static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3509 u8 bits_per_word)
63ab645f 3510{
8caab75f 3511 if (ctlr->bits_per_word_mask) {
63ab645f
SB
3512 /* Only 32 bits fit in the mask */
3513 if (bits_per_word > 32)
3514 return -EINVAL;
8caab75f 3515 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
3516 return -EINVAL;
3517 }
3518
3519 return 0;
3520}
3521
7d077197
DB
3522/**
3523 * spi_setup - setup SPI mode and clock rate
3524 * @spi: the device whose settings are being modified
3525 * Context: can sleep, and no requests are queued to the device
3526 *
3527 * SPI protocol drivers may need to update the transfer mode if the
3528 * device doesn't work with its default. They may likewise need
3529 * to update clock rates or word sizes from initial values. This function
3530 * changes those settings, and must be called from a context that can sleep.
3531 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3532 * effect the next time the device is selected and data is transferred to
3533 * or from it. When this function returns, the spi device is deselected.
3534 *
3535 * Note that this call will fail if the protocol driver specifies an option
3536 * that the underlying controller or its driver does not support. For
3537 * example, not all hardware supports wire transfers using nine bit words,
3538 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
3539 *
3540 * Return: zero on success, else a negative error code.
7d077197
DB
3541 */
3542int spi_setup(struct spi_device *spi)
3543{
83596fbe 3544 unsigned bad_bits, ugly_bits;
73f93db5 3545 int status = 0;
7d077197 3546
d962608c 3547 /*
350de7ce
AS
3548 * Check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
3549 * are set at the same time.
f477b7fb 3550 */
d962608c
DB
3551 if ((hweight_long(spi->mode &
3552 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
3553 (hweight_long(spi->mode &
3554 (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
f477b7fb 3555 dev_err(&spi->dev,
d962608c 3556 "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
f477b7fb 3557 return -EINVAL;
3558 }
350de7ce 3559 /* If it is SPI_3WIRE mode, DUAL and QUAD should be forbidden */
f477b7fb 3560 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
3561 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3562 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3563 return -EINVAL;
350de7ce
AS
3564 /*
3565 * Help drivers fail *cleanly* when they need options
3566 * that aren't supported with their current controller.
cbaa62e0
DL
3567 * SPI_CS_WORD has a fallback software implementation,
3568 * so it is ignored here.
e7db06b5 3569 */
d962608c
DB
3570 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
3571 SPI_NO_TX | SPI_NO_RX);
83596fbe 3572 ugly_bits = bad_bits &
6b03061f
YNG
3573 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3574 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
3575 if (ugly_bits) {
3576 dev_warn(&spi->dev,
3577 "setup: ignoring unsupported mode bits %x\n",
3578 ugly_bits);
3579 spi->mode &= ~ugly_bits;
3580 bad_bits &= ~ugly_bits;
3581 }
e7db06b5 3582 if (bad_bits) {
eb288a1f 3583 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
3584 bad_bits);
3585 return -EINVAL;
3586 }
3587
b3fe2e51 3588 if (!spi->bits_per_word) {
7d077197 3589 spi->bits_per_word = 8;
b3fe2e51
PK
3590 } else {
3591 /*
3592 * Some controllers may not support the default 8 bits-per-word
3593 * so only perform the check when this is explicitly provided.
3594 */
3595 status = __spi_validate_bits_per_word(spi->controller,
3596 spi->bits_per_word);
3597 if (status)
3598 return status;
3599 }
63ab645f 3600
6820e812
TA
3601 if (spi->controller->max_speed_hz &&
3602 (!spi->max_speed_hz ||
3603 spi->max_speed_hz > spi->controller->max_speed_hz))
8caab75f 3604 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3605
4fae3a58
SS
3606 mutex_lock(&spi->controller->io_mutex);
3607
c914dbf8 3608 if (spi->controller->setup) {
8caab75f 3609 status = spi->controller->setup(spi);
c914dbf8
JB
3610 if (status) {
3611 mutex_unlock(&spi->controller->io_mutex);
3612 dev_err(&spi->controller->dev, "Failed to setup device: %d\n",
3613 status);
3614 return status;
3615 }
3616 }
7d077197 3617
d948e6ca 3618 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
dd769f15 3619 status = pm_runtime_resume_and_get(spi->controller->dev.parent);
d948e6ca 3620 if (status < 0) {
4fae3a58 3621 mutex_unlock(&spi->controller->io_mutex);
d948e6ca
LX
3622 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3623 status);
3624 return status;
3625 }
57a94607
TL
3626
3627 /*
3628 * We do not want to return positive value from pm_runtime_get,
3629 * there are many instances of devices calling spi_setup() and
3630 * checking for a non-zero return value instead of a negative
3631 * return value.
3632 */
3633 status = 0;
3634
d347b4aa 3635 spi_set_cs(spi, false, true);
d948e6ca
LX
3636 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3637 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3638 } else {
d347b4aa 3639 spi_set_cs(spi, false, true);
d948e6ca 3640 }
abeedb01 3641
4fae3a58
SS
3642 mutex_unlock(&spi->controller->io_mutex);
3643
924b5867
DA
3644 if (spi->rt && !spi->controller->rt) {
3645 spi->controller->rt = true;
3646 spi_set_thread_rt(spi->controller);
3647 }
3648
5cb4e1f3
AS
3649 trace_spi_setup(spi, status);
3650
40b82c2d
AS
3651 dev_dbg(&spi->dev, "setup mode %lu, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
3652 spi->mode & SPI_MODE_X_MASK,
7d077197
DB
3653 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3654 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3655 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3656 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3657 spi->bits_per_word, spi->max_speed_hz,
3658 status);
3659
3660 return status;
3661}
3662EXPORT_SYMBOL_GPL(spi_setup);
3663
6c613f68
AA
3664static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3665 struct spi_device *spi)
3666{
3667 int delay1, delay2;
3668
3984d39b 3669 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA
3670 if (delay1 < 0)
3671 return delay1;
3672
3984d39b 3673 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA
3674 if (delay2 < 0)
3675 return delay2;
3676
3677 if (delay1 < delay2)
3678 memcpy(&xfer->word_delay, &spi->word_delay,
3679 sizeof(xfer->word_delay));
3680
3681 return 0;
3682}
3683
90808738 3684static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3685{
8caab75f 3686 struct spi_controller *ctlr = spi->controller;
e6811d1d 3687 struct spi_transfer *xfer;
6ea31293 3688 int w_size;
cf32b71e 3689
24a0013a
MB
3690 if (list_empty(&message->transfers))
3691 return -EINVAL;
24a0013a 3692
350de7ce
AS
3693 /*
3694 * If an SPI controller does not support toggling the CS line on each
71388b21
DL
3695 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3696 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL
3697 * splitting transfers into one-word transfers and ensuring that
3698 * cs_change is set for each transfer.
3699 */
71388b21 3700 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f48dc6b9 3701 spi->cs_gpiod)) {
cbaa62e0
DL
3702 size_t maxsize;
3703 int ret;
3704
3705 maxsize = (spi->bits_per_word + 7) / 8;
3706
3707 /* spi_split_transfers_maxsize() requires message->spi */
3708 message->spi = spi;
3709
3710 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3711 GFP_KERNEL);
3712 if (ret)
3713 return ret;
3714
3715 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3716 /* don't change cs_change on the last entry in the list */
3717 if (list_is_last(&xfer->transfer_list, &message->transfers))
3718 break;
3719 xfer->cs_change = 1;
3720 }
3721 }
3722
350de7ce
AS
3723 /*
3724 * Half-duplex links include original MicroWire, and ones with
cf32b71e
ES
3725 * only one data pin like SPI_3WIRE (switches direction) or where
3726 * either MOSI or MISO is missing. They can also be caused by
3727 * software limitations.
3728 */
8caab75f
GU
3729 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3730 (spi->mode & SPI_3WIRE)) {
3731 unsigned flags = ctlr->flags;
cf32b71e
ES
3732
3733 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3734 if (xfer->rx_buf && xfer->tx_buf)
3735 return -EINVAL;
8caab75f 3736 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3737 return -EINVAL;
8caab75f 3738 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
3739 return -EINVAL;
3740 }
3741 }
3742
350de7ce 3743 /*
059b8ffe
LD
3744 * Set transfer bits_per_word and max speed as spi device default if
3745 * it is not set for this transfer.
f477b7fb 3746 * Set transfer tx_nbits and rx_nbits as single transfer default
3747 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB
3748 * Ensure transfer word_delay is at least as long as that required by
3749 * device itself.
e6811d1d 3750 */
77e80588 3751 message->frame_length = 0;
e6811d1d 3752 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3753 xfer->effective_speed_hz = 0;
078726ce 3754 message->frame_length += xfer->len;
e6811d1d
LD
3755 if (!xfer->bits_per_word)
3756 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
3757
3758 if (!xfer->speed_hz)
059b8ffe 3759 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3760
8caab75f
GU
3761 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3762 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3763
8caab75f 3764 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3765 return -EINVAL;
a2fd4f9f 3766
4d94bd21
II
3767 /*
3768 * SPI transfer length should be multiple of SPI word size
350de7ce 3769 * where SPI word size should be power-of-two multiple.
4d94bd21
II
3770 */
3771 if (xfer->bits_per_word <= 8)
3772 w_size = 1;
3773 else if (xfer->bits_per_word <= 16)
3774 w_size = 2;
3775 else
3776 w_size = 4;
3777
4d94bd21 3778 /* No partial transfers accepted */
6ea31293 3779 if (xfer->len % w_size)
4d94bd21
II
3780 return -EINVAL;
3781
8caab75f
GU
3782 if (xfer->speed_hz && ctlr->min_speed_hz &&
3783 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3784 return -EINVAL;
f477b7fb 3785
3786 if (xfer->tx_buf && !xfer->tx_nbits)
3787 xfer->tx_nbits = SPI_NBITS_SINGLE;
3788 if (xfer->rx_buf && !xfer->rx_nbits)
3789 xfer->rx_nbits = SPI_NBITS_SINGLE;
350de7ce
AS
3790 /*
3791 * Check transfer tx/rx_nbits:
1afd9989
GU
3792 * 1. check the value matches one of single, dual and quad
3793 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3794 */
db90a441 3795 if (xfer->tx_buf) {
d962608c
DB
3796 if (spi->mode & SPI_NO_TX)
3797 return -EINVAL;
db90a441
SP
3798 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3799 xfer->tx_nbits != SPI_NBITS_DUAL &&
3800 xfer->tx_nbits != SPI_NBITS_QUAD)
3801 return -EINVAL;
3802 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3803 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3804 return -EINVAL;
3805 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3806 !(spi->mode & SPI_TX_QUAD))
3807 return -EINVAL;
db90a441 3808 }
f477b7fb 3809 /* check transfer rx_nbits */
db90a441 3810 if (xfer->rx_buf) {
d962608c
DB
3811 if (spi->mode & SPI_NO_RX)
3812 return -EINVAL;
db90a441
SP
3813 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3814 xfer->rx_nbits != SPI_NBITS_DUAL &&
3815 xfer->rx_nbits != SPI_NBITS_QUAD)
3816 return -EINVAL;
3817 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3818 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3819 return -EINVAL;
3820 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3821 !(spi->mode & SPI_RX_QUAD))
3822 return -EINVAL;
db90a441 3823 }
b7bb367a 3824
6c613f68
AA
3825 if (_spi_xfer_word_delay_update(xfer, spi))
3826 return -EINVAL;
e6811d1d
LD
3827 }
3828
cf32b71e 3829 message->status = -EINPROGRESS;
90808738
MB
3830
3831 return 0;
3832}
3833
3834static int __spi_async(struct spi_device *spi, struct spi_message *message)
3835{
8caab75f 3836 struct spi_controller *ctlr = spi->controller;
b42faeee 3837 struct spi_transfer *xfer;
90808738 3838
b5932f5c
BB
3839 /*
3840 * Some controllers do not support doing regular SPI transfers. Return
3841 * ENOTSUPP when this is the case.
3842 */
3843 if (!ctlr->transfer)
3844 return -ENOTSUPP;
3845
90808738
MB
3846 message->spi = spi;
3847
6598b91b
DJ
3848 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_async);
3849 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_async);
eca2ebc7 3850
90808738
MB
3851 trace_spi_message_submit(message);
3852
b42faeee
VO
3853 if (!ctlr->ptp_sts_supported) {
3854 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3855 xfer->ptp_sts_word_pre = 0;
3856 ptp_read_system_prets(xfer->ptp_sts);
3857 }
3858 }
3859
8caab75f 3860 return ctlr->transfer(spi, message);
cf32b71e
ES
3861}
3862
568d0697
DB
3863/**
3864 * spi_async - asynchronous SPI transfer
3865 * @spi: device with which data will be exchanged
3866 * @message: describes the data transfers, including completion callback
3867 * Context: any (irqs may be blocked, etc)
3868 *
3869 * This call may be used in_irq and other contexts which can't sleep,
3870 * as well as from task contexts which can sleep.
3871 *
3872 * The completion callback is invoked in a context which can't sleep.
3873 * Before that invocation, the value of message->status is undefined.
3874 * When the callback is issued, message->status holds either zero (to
3875 * indicate complete success) or a negative error code. After that
3876 * callback returns, the driver which issued the transfer request may
3877 * deallocate the associated memory; it's no longer in use by any SPI
3878 * core or controller driver code.
3879 *
3880 * Note that although all messages to a spi_device are handled in
3881 * FIFO order, messages may go to different devices in other orders.
3882 * Some device might be higher priority, or have various "hard" access
3883 * time requirements, for example.
3884 *
3885 * On detection of any fault during the transfer, processing of
3886 * the entire message is aborted, and the device is deselected.
3887 * Until returning from the associated message completion callback,
3888 * no other spi_message queued to that device will be processed.
3889 * (This rule applies equally to all the synchronous transfer calls,
3890 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3891 *
3892 * Return: zero on success, else a negative error code.
568d0697
DB
3893 */
3894int spi_async(struct spi_device *spi, struct spi_message *message)
3895{
8caab75f 3896 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3897 int ret;
3898 unsigned long flags;
568d0697 3899
90808738
MB
3900 ret = __spi_validate(spi, message);
3901 if (ret != 0)
3902 return ret;
3903
8caab75f 3904 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3905
8caab75f 3906 if (ctlr->bus_lock_flag)
cf32b71e
ES
3907 ret = -EBUSY;
3908 else
3909 ret = __spi_async(spi, message);
568d0697 3910
8caab75f 3911 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3912
3913 return ret;
568d0697
DB
3914}
3915EXPORT_SYMBOL_GPL(spi_async);
3916
cf32b71e
ES
3917/**
3918 * spi_async_locked - version of spi_async with exclusive bus usage
3919 * @spi: device with which data will be exchanged
3920 * @message: describes the data transfers, including completion callback
3921 * Context: any (irqs may be blocked, etc)
3922 *
3923 * This call may be used in_irq and other contexts which can't sleep,
3924 * as well as from task contexts which can sleep.
3925 *
3926 * The completion callback is invoked in a context which can't sleep.
3927 * Before that invocation, the value of message->status is undefined.
3928 * When the callback is issued, message->status holds either zero (to
3929 * indicate complete success) or a negative error code. After that
3930 * callback returns, the driver which issued the transfer request may
3931 * deallocate the associated memory; it's no longer in use by any SPI
3932 * core or controller driver code.
3933 *
3934 * Note that although all messages to a spi_device are handled in
3935 * FIFO order, messages may go to different devices in other orders.
3936 * Some device might be higher priority, or have various "hard" access
3937 * time requirements, for example.
3938 *
3939 * On detection of any fault during the transfer, processing of
3940 * the entire message is aborted, and the device is deselected.
3941 * Until returning from the associated message completion callback,
3942 * no other spi_message queued to that device will be processed.
3943 * (This rule applies equally to all the synchronous transfer calls,
3944 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3945 *
3946 * Return: zero on success, else a negative error code.
cf32b71e 3947 */
da21fde0 3948static int spi_async_locked(struct spi_device *spi, struct spi_message *message)
cf32b71e 3949{
8caab75f 3950 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3951 int ret;
3952 unsigned long flags;
3953
90808738
MB
3954 ret = __spi_validate(spi, message);
3955 if (ret != 0)
3956 return ret;
3957
8caab75f 3958 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3959
3960 ret = __spi_async(spi, message);
3961
8caab75f 3962 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3963
3964 return ret;
3965
3966}
cf32b71e 3967
ae7d2346
DJ
3968static void __spi_transfer_message_noqueue(struct spi_controller *ctlr, struct spi_message *msg)
3969{
3970 bool was_busy;
3971 int ret;
3972
3973 mutex_lock(&ctlr->io_mutex);
3974
1a9cafcb 3975 was_busy = ctlr->busy;
ae7d2346 3976
72c5c59b 3977 ctlr->cur_msg = msg;
ae7d2346
DJ
3978 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
3979 if (ret)
3980 goto out;
3981
69fa9590
DJ
3982 ctlr->cur_msg = NULL;
3983 ctlr->fallback = false;
3984
ae7d2346
DJ
3985 if (!was_busy) {
3986 kfree(ctlr->dummy_rx);
3987 ctlr->dummy_rx = NULL;
3988 kfree(ctlr->dummy_tx);
3989 ctlr->dummy_tx = NULL;
3990 if (ctlr->unprepare_transfer_hardware &&
3991 ctlr->unprepare_transfer_hardware(ctlr))
3992 dev_err(&ctlr->dev,
3993 "failed to unprepare transfer hardware\n");
3994 spi_idle_runtime_pm(ctlr);
3995 }
3996
3997out:
3998 mutex_unlock(&ctlr->io_mutex);
3999}
4000
7d077197
DB
4001/*-------------------------------------------------------------------------*/
4002
350de7ce
AS
4003/*
4004 * Utility methods for SPI protocol drivers, layered on
7d077197
DB
4005 * top of the core. Some other utility methods are defined as
4006 * inline functions.
4007 */
4008
5d870c8e
AM
4009static void spi_complete(void *arg)
4010{
4011 complete(arg);
4012}
4013
ef4d96ec 4014static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
4015{
4016 DECLARE_COMPLETION_ONSTACK(done);
4017 int status;
8caab75f 4018 struct spi_controller *ctlr = spi->controller;
0461a414
MB
4019
4020 status = __spi_validate(spi, message);
4021 if (status != 0)
4022 return status;
cf32b71e 4023
0461a414 4024 message->spi = spi;
cf32b71e 4025
6598b91b
DJ
4026 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync);
4027 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync);
eca2ebc7 4028
350de7ce 4029 /*
ae7d2346
DJ
4030 * Checking queue_empty here only guarantees async/sync message
4031 * ordering when coming from the same context. It does not need to
4032 * guard against reentrancy from a different context. The io_mutex
4033 * will catch those cases.
0461a414 4034 */
ae7d2346 4035 if (READ_ONCE(ctlr->queue_empty)) {
ae7d2346
DJ
4036 message->actual_length = 0;
4037 message->status = -EINPROGRESS;
0461a414
MB
4038
4039 trace_spi_message_submit(message);
4040
ae7d2346
DJ
4041 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync_immediate);
4042 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync_immediate);
0461a414 4043
ae7d2346
DJ
4044 __spi_transfer_message_noqueue(ctlr, message);
4045
4046 return message->status;
0461a414 4047 }
cf32b71e 4048
ae7d2346
DJ
4049 /*
4050 * There are messages in the async queue that could have originated
4051 * from the same context, so we need to preserve ordering.
4052 * Therefor we send the message to the async queue and wait until they
4053 * are completed.
4054 */
4055 message->complete = spi_complete;
4056 message->context = &done;
4057 status = spi_async_locked(spi, message);
cf32b71e
ES
4058 if (status == 0) {
4059 wait_for_completion(&done);
4060 status = message->status;
4061 }
4062 message->context = NULL;
ae7d2346 4063
cf32b71e
ES
4064 return status;
4065}
4066
8ae12a0d
DB
4067/**
4068 * spi_sync - blocking/synchronous SPI data transfers
4069 * @spi: device with which data will be exchanged
4070 * @message: describes the data transfers
33e34dc6 4071 * Context: can sleep
8ae12a0d
DB
4072 *
4073 * This call may only be used from a context that may sleep. The sleep
4074 * is non-interruptible, and has no timeout. Low-overhead controller
4075 * drivers may DMA directly into and out of the message buffers.
4076 *
4077 * Note that the SPI device's chip select is active during the message,
4078 * and then is normally disabled between messages. Drivers for some
4079 * frequently-used devices may want to minimize costs of selecting a chip,
4080 * by leaving it selected in anticipation that the next message will go
4081 * to the same chip. (That may increase power usage.)
4082 *
0c868461
DB
4083 * Also, the caller is guaranteeing that the memory associated with the
4084 * message will not be freed before this call returns.
4085 *
97d56dc6 4086 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4087 */
4088int spi_sync(struct spi_device *spi, struct spi_message *message)
4089{
ef4d96ec
MB
4090 int ret;
4091
8caab75f 4092 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 4093 ret = __spi_sync(spi, message);
8caab75f 4094 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
4095
4096 return ret;
8ae12a0d
DB
4097}
4098EXPORT_SYMBOL_GPL(spi_sync);
4099
cf32b71e
ES
4100/**
4101 * spi_sync_locked - version of spi_sync with exclusive bus usage
4102 * @spi: device with which data will be exchanged
4103 * @message: describes the data transfers
4104 * Context: can sleep
4105 *
4106 * This call may only be used from a context that may sleep. The sleep
4107 * is non-interruptible, and has no timeout. Low-overhead controller
4108 * drivers may DMA directly into and out of the message buffers.
4109 *
4110 * This call should be used by drivers that require exclusive access to the
25985edc 4111 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
4112 * be released by a spi_bus_unlock call when the exclusive access is over.
4113 *
97d56dc6 4114 * Return: zero on success, else a negative error code.
cf32b71e
ES
4115 */
4116int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
4117{
ef4d96ec 4118 return __spi_sync(spi, message);
cf32b71e
ES
4119}
4120EXPORT_SYMBOL_GPL(spi_sync_locked);
4121
4122/**
4123 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 4124 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
4125 * Context: can sleep
4126 *
4127 * This call may only be used from a context that may sleep. The sleep
4128 * is non-interruptible, and has no timeout.
4129 *
4130 * This call should be used by drivers that require exclusive access to the
4131 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
4132 * exclusive access is over. Data transfer must be done by spi_sync_locked
4133 * and spi_async_locked calls when the SPI bus lock is held.
4134 *
97d56dc6 4135 * Return: always zero.
cf32b71e 4136 */
8caab75f 4137int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
4138{
4139 unsigned long flags;
4140
8caab75f 4141 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 4142
8caab75f
GU
4143 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
4144 ctlr->bus_lock_flag = 1;
4145 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
4146
4147 /* mutex remains locked until spi_bus_unlock is called */
4148
4149 return 0;
4150}
4151EXPORT_SYMBOL_GPL(spi_bus_lock);
4152
4153/**
4154 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 4155 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
4156 * Context: can sleep
4157 *
4158 * This call may only be used from a context that may sleep. The sleep
4159 * is non-interruptible, and has no timeout.
4160 *
4161 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
4162 * call.
4163 *
97d56dc6 4164 * Return: always zero.
cf32b71e 4165 */
8caab75f 4166int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 4167{
8caab75f 4168 ctlr->bus_lock_flag = 0;
cf32b71e 4169
8caab75f 4170 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
4171
4172 return 0;
4173}
4174EXPORT_SYMBOL_GPL(spi_bus_unlock);
4175
a9948b61 4176/* portable code must never pass more than 32 bytes */
5fe5f05e 4177#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
4178
4179static u8 *buf;
4180
4181/**
4182 * spi_write_then_read - SPI synchronous write followed by read
4183 * @spi: device with which data will be exchanged
4184 * @txbuf: data to be written (need not be dma-safe)
4185 * @n_tx: size of txbuf, in bytes
27570497
JP
4186 * @rxbuf: buffer into which data will be read (need not be dma-safe)
4187 * @n_rx: size of rxbuf, in bytes
33e34dc6 4188 * Context: can sleep
8ae12a0d
DB
4189 *
4190 * This performs a half duplex MicroWire style transaction with the
4191 * device, sending txbuf and then reading rxbuf. The return value
4192 * is zero for success, else a negative errno status code.
b885244e 4193 * This call may only be used from a context that may sleep.
8ae12a0d 4194 *
c373643b 4195 * Parameters to this routine are always copied using a small buffer.
33e34dc6 4196 * Performance-sensitive or bulk transfer code should instead use
0c868461 4197 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
4198 *
4199 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4200 */
4201int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
4202 const void *txbuf, unsigned n_tx,
4203 void *rxbuf, unsigned n_rx)
8ae12a0d 4204{
068f4070 4205 static DEFINE_MUTEX(lock);
8ae12a0d
DB
4206
4207 int status;
4208 struct spi_message message;
bdff549e 4209 struct spi_transfer x[2];
8ae12a0d
DB
4210 u8 *local_buf;
4211
350de7ce
AS
4212 /*
4213 * Use preallocated DMA-safe buffer if we can. We can't avoid
b3a223ee
MB
4214 * copying here, (as a pure convenience thing), but we can
4215 * keep heap costs out of the hot path unless someone else is
4216 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 4217 */
b3a223ee 4218 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
4219 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
4220 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
4221 if (!local_buf)
4222 return -ENOMEM;
4223 } else {
4224 local_buf = buf;
4225 }
8ae12a0d 4226
8275c642 4227 spi_message_init(&message);
5fe5f05e 4228 memset(x, 0, sizeof(x));
bdff549e
DB
4229 if (n_tx) {
4230 x[0].len = n_tx;
4231 spi_message_add_tail(&x[0], &message);
4232 }
4233 if (n_rx) {
4234 x[1].len = n_rx;
4235 spi_message_add_tail(&x[1], &message);
4236 }
8275c642 4237
8ae12a0d 4238 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
4239 x[0].tx_buf = local_buf;
4240 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
4241
4242 /* do the i/o */
8ae12a0d 4243 status = spi_sync(spi, &message);
9b938b74 4244 if (status == 0)
bdff549e 4245 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 4246
bdff549e 4247 if (x[0].tx_buf == buf)
068f4070 4248 mutex_unlock(&lock);
8ae12a0d
DB
4249 else
4250 kfree(local_buf);
4251
4252 return status;
4253}
4254EXPORT_SYMBOL_GPL(spi_write_then_read);
4255
4256/*-------------------------------------------------------------------------*/
4257
da21fde0 4258#if IS_ENABLED(CONFIG_OF_DYNAMIC)
ce79d54a 4259/* must call put_device() when done with returned spi_device device */
da21fde0 4260static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 4261{
cfba5de9
SP
4262 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
4263
ce79d54a
PA
4264 return dev ? to_spi_device(dev) : NULL;
4265}
4266
8caab75f
GU
4267/* the spi controllers are not using spi_bus, so we find it with another way */
4268static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
4269{
4270 struct device *dev;
4271
cfba5de9 4272 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 4273 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 4274 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA
4275 if (!dev)
4276 return NULL;
4277
4278 /* reference got in class_find_device */
8caab75f 4279 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
4280}
4281
4282static int of_spi_notify(struct notifier_block *nb, unsigned long action,
4283 void *arg)
4284{
4285 struct of_reconfig_data *rd = arg;
8caab75f 4286 struct spi_controller *ctlr;
ce79d54a
PA
4287 struct spi_device *spi;
4288
4289 switch (of_reconfig_get_state_change(action, arg)) {
4290 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
4291 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
4292 if (ctlr == NULL)
ce79d54a
PA
4293 return NOTIFY_OK; /* not for us */
4294
bd6c1644 4295 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 4296 put_device(&ctlr->dev);
bd6c1644
GU
4297 return NOTIFY_OK;
4298 }
4299
8caab75f
GU
4300 spi = of_register_spi_device(ctlr, rd->dn);
4301 put_device(&ctlr->dev);
ce79d54a
PA
4302
4303 if (IS_ERR(spi)) {
25c56c88
RH
4304 pr_err("%s: failed to create for '%pOF'\n",
4305 __func__, rd->dn);
e0af98a7 4306 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
4307 return notifier_from_errno(PTR_ERR(spi));
4308 }
4309 break;
4310
4311 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
4312 /* already depopulated? */
4313 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4314 return NOTIFY_OK;
4315
ce79d54a
PA
4316 /* find our device by node */
4317 spi = of_find_spi_device_by_node(rd->dn);
4318 if (spi == NULL)
4319 return NOTIFY_OK; /* no? not meant for us */
4320
4321 /* unregister takes one ref away */
4322 spi_unregister_device(spi);
4323
4324 /* and put the reference of the find */
4325 put_device(&spi->dev);
4326 break;
4327 }
4328
4329 return NOTIFY_OK;
4330}
4331
4332static struct notifier_block spi_of_notifier = {
4333 .notifier_call = of_spi_notify,
4334};
4335#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4336extern struct notifier_block spi_of_notifier;
4337#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4338
7f24467f 4339#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4340static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
4341{
4342 return ACPI_COMPANION(dev->parent) == data;
4343}
4344
8caab75f 4345static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
4346{
4347 struct device *dev;
4348
4349 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4350 spi_acpi_controller_match);
6c364062
GU
4351 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4352 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4353 spi_acpi_controller_match);
7f24467f
OP
4354 if (!dev)
4355 return NULL;
4356
8caab75f 4357 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
4358}
4359
4360static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4361{
4362 struct device *dev;
4363
00500147 4364 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4365 return to_spi_device(dev);
7f24467f
OP
4366}
4367
4368static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4369 void *arg)
4370{
4371 struct acpi_device *adev = arg;
8caab75f 4372 struct spi_controller *ctlr;
7f24467f
OP
4373 struct spi_device *spi;
4374
4375 switch (value) {
4376 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
4377 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4378 if (!ctlr)
7f24467f
OP
4379 break;
4380
8caab75f
GU
4381 acpi_register_spi_device(ctlr, adev);
4382 put_device(&ctlr->dev);
7f24467f
OP
4383 break;
4384 case ACPI_RECONFIG_DEVICE_REMOVE:
4385 if (!acpi_device_enumerated(adev))
4386 break;
4387
4388 spi = acpi_spi_find_device_by_adev(adev);
4389 if (!spi)
4390 break;
4391
4392 spi_unregister_device(spi);
4393 put_device(&spi->dev);
4394 break;
4395 }
4396
4397 return NOTIFY_OK;
4398}
4399
4400static struct notifier_block spi_acpi_notifier = {
4401 .notifier_call = acpi_spi_notify,
4402};
4403#else
4404extern struct notifier_block spi_acpi_notifier;
4405#endif
4406
8ae12a0d
DB
4407static int __init spi_init(void)
4408{
b885244e
DB
4409 int status;
4410
e94b1766 4411 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
4412 if (!buf) {
4413 status = -ENOMEM;
4414 goto err0;
4415 }
4416
4417 status = bus_register(&spi_bus_type);
4418 if (status < 0)
4419 goto err1;
8ae12a0d 4420
b885244e
DB
4421 status = class_register(&spi_master_class);
4422 if (status < 0)
4423 goto err2;
ce79d54a 4424
6c364062
GU
4425 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4426 status = class_register(&spi_slave_class);
4427 if (status < 0)
4428 goto err3;
4429 }
4430
5267720e 4431 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4432 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
4433 if (IS_ENABLED(CONFIG_ACPI))
4434 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4435
8ae12a0d 4436 return 0;
b885244e 4437
6c364062
GU
4438err3:
4439 class_unregister(&spi_master_class);
b885244e
DB
4440err2:
4441 bus_unregister(&spi_bus_type);
4442err1:
4443 kfree(buf);
4444 buf = NULL;
4445err0:
4446 return status;
8ae12a0d 4447}
b885244e 4448
350de7ce
AS
4449/*
4450 * A board_info is normally registered in arch_initcall(),
4451 * but even essential drivers wait till later.
b885244e 4452 *
350de7ce
AS
4453 * REVISIT only boardinfo really needs static linking. The rest (device and
4454 * driver registration) _could_ be dynamically linked (modular) ... Costs
b885244e 4455 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4456 */
673c0c00 4457postcore_initcall(spi_init);