spi: remove struct spi_message::is_dma_mapped
[linux-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
edf6a864 7#include <linux/acpi.h>
8ae12a0d 8#include <linux/cache.h>
edf6a864
AS
9#include <linux/clk/clk-conf.h>
10#include <linux/delay.h>
11#include <linux/device.h>
99adef31 12#include <linux/dmaengine.h>
edf6a864
AS
13#include <linux/dma-mapping.h>
14#include <linux/export.h>
15#include <linux/gpio/consumer.h>
16#include <linux/highmem.h>
17#include <linux/idr.h>
18#include <linux/init.h>
19#include <linux/ioport.h>
20#include <linux/kernel.h>
21#include <linux/kthread.h>
22#include <linux/mod_devicetable.h>
94040828 23#include <linux/mutex.h>
2b7a32f7 24#include <linux/of_device.h>
d57a4282 25#include <linux/of_irq.h>
edf6a864
AS
26#include <linux/percpu.h>
27#include <linux/platform_data/x86/apple.h>
f48c767c 28#include <linux/pm_domain.h>
edf6a864 29#include <linux/pm_runtime.h>
826cf175 30#include <linux/property.h>
edf6a864 31#include <linux/ptp_clock_kernel.h>
8bd75c77 32#include <linux/sched/rt.h>
edf6a864
AS
33#include <linux/slab.h>
34#include <linux/spi/spi.h>
35#include <linux/spi/spi-mem.h>
ae7e81c0 36#include <uapi/linux/sched/types.h>
8ae12a0d 37
56ec1978
MB
38#define CREATE_TRACE_POINTS
39#include <trace/events/spi.h>
ca1438dc
AB
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
41EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 42
46336966
BB
43#include "internals.h"
44
9b61e302 45static DEFINE_IDR(spi_master_idr);
56ec1978 46
8ae12a0d
DB
47static void spidev_release(struct device *dev)
48{
0ffa0285 49 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 50
8caab75f 51 spi_controller_put(spi->controller);
5039563e 52 kfree(spi->driver_override);
6598b91b 53 free_percpu(spi->pcpu_statistics);
07a389fe 54 kfree(spi);
8ae12a0d
DB
55}
56
57static ssize_t
58modalias_show(struct device *dev, struct device_attribute *a, char *buf)
59{
60 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
61 int len;
62
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
64 if (len != -ENODEV)
65 return len;
8ae12a0d 66
f2daa466 67 return sysfs_emit(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 68}
aa7da564 69static DEVICE_ATTR_RO(modalias);
8ae12a0d 70
5039563e
TP
71static ssize_t driver_override_store(struct device *dev,
72 struct device_attribute *a,
73 const char *buf, size_t count)
74{
75 struct spi_device *spi = to_spi_device(dev);
19368f0f 76 int ret;
5039563e 77
19368f0f
KK
78 ret = driver_set_override(dev, &spi->driver_override, buf, count);
79 if (ret)
80 return ret;
5039563e
TP
81
82 return count;
83}
84
85static ssize_t driver_override_show(struct device *dev,
86 struct device_attribute *a, char *buf)
87{
88 const struct spi_device *spi = to_spi_device(dev);
89 ssize_t len;
90
91 device_lock(dev);
f2daa466 92 len = sysfs_emit(buf, "%s\n", spi->driver_override ? : "");
5039563e
TP
93 device_unlock(dev);
94 return len;
95}
96static DEVICE_ATTR_RW(driver_override);
97
d501cc4c 98static struct spi_statistics __percpu *spi_alloc_pcpu_stats(struct device *dev)
6598b91b
DJ
99{
100 struct spi_statistics __percpu *pcpu_stats;
101
102 if (dev)
103 pcpu_stats = devm_alloc_percpu(dev, struct spi_statistics);
104 else
105 pcpu_stats = alloc_percpu_gfp(struct spi_statistics, GFP_KERNEL);
106
107 if (pcpu_stats) {
108 int cpu;
109
110 for_each_possible_cpu(cpu) {
111 struct spi_statistics *stat;
112
113 stat = per_cpu_ptr(pcpu_stats, cpu);
114 u64_stats_init(&stat->syncp);
115 }
116 }
117 return pcpu_stats;
118}
119
fc12d4bb
GU
120static ssize_t spi_emit_pcpu_stats(struct spi_statistics __percpu *stat,
121 char *buf, size_t offset)
122{
123 u64 val = 0;
124 int i;
125
126 for_each_possible_cpu(i) {
127 const struct spi_statistics *pcpu_stats;
128 u64_stats_t *field;
129 unsigned int start;
130 u64 inc;
131
132 pcpu_stats = per_cpu_ptr(stat, i);
133 field = (void *)pcpu_stats + offset;
134 do {
135 start = u64_stats_fetch_begin(&pcpu_stats->syncp);
136 inc = u64_stats_read(field);
137 } while (u64_stats_fetch_retry(&pcpu_stats->syncp, start));
138 val += inc;
139 }
140 return sysfs_emit(buf, "%llu\n", val);
141}
6598b91b 142
eca2ebc7 143#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
144static ssize_t spi_controller_##field##_show(struct device *dev, \
145 struct device_attribute *attr, \
146 char *buf) \
eca2ebc7 147{ \
8caab75f
GU
148 struct spi_controller *ctlr = container_of(dev, \
149 struct spi_controller, dev); \
6598b91b 150 return spi_statistics_##field##_show(ctlr->pcpu_statistics, buf); \
eca2ebc7 151} \
8caab75f 152static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 153 .attr = { .name = file, .mode = 0444 }, \
8caab75f 154 .show = spi_controller_##field##_show, \
eca2ebc7
MS
155}; \
156static ssize_t spi_device_##field##_show(struct device *dev, \
157 struct device_attribute *attr, \
158 char *buf) \
159{ \
d1eba93b 160 struct spi_device *spi = to_spi_device(dev); \
6598b91b 161 return spi_statistics_##field##_show(spi->pcpu_statistics, buf); \
eca2ebc7
MS
162} \
163static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 164 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
165 .show = spi_device_##field##_show, \
166}
167
6598b91b 168#define SPI_STATISTICS_SHOW_NAME(name, file, field) \
d501cc4c 169static ssize_t spi_statistics_##name##_show(struct spi_statistics __percpu *stat, \
eca2ebc7
MS
170 char *buf) \
171{ \
fc12d4bb
GU
172 return spi_emit_pcpu_stats(stat, buf, \
173 offsetof(struct spi_statistics, field)); \
eca2ebc7
MS
174} \
175SPI_STATISTICS_ATTRS(name, file)
176
6598b91b 177#define SPI_STATISTICS_SHOW(field) \
eca2ebc7 178 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
6598b91b 179 field)
eca2ebc7 180
6598b91b
DJ
181SPI_STATISTICS_SHOW(messages);
182SPI_STATISTICS_SHOW(transfers);
183SPI_STATISTICS_SHOW(errors);
184SPI_STATISTICS_SHOW(timedout);
eca2ebc7 185
6598b91b
DJ
186SPI_STATISTICS_SHOW(spi_sync);
187SPI_STATISTICS_SHOW(spi_sync_immediate);
188SPI_STATISTICS_SHOW(spi_async);
eca2ebc7 189
6598b91b
DJ
190SPI_STATISTICS_SHOW(bytes);
191SPI_STATISTICS_SHOW(bytes_rx);
192SPI_STATISTICS_SHOW(bytes_tx);
eca2ebc7 193
6b7bc061
MS
194#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
195 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
196 "transfer_bytes_histo_" number, \
6598b91b 197 transfer_bytes_histo[index])
6b7bc061
MS
198SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
199SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
200SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
201SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
202SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
203SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
204SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
205SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
206SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
207SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
208SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
209SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
210SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
211SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
212SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
213SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
214SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
215
6598b91b 216SPI_STATISTICS_SHOW(transfers_split_maxsize);
d9f12122 217
aa7da564
GKH
218static struct attribute *spi_dev_attrs[] = {
219 &dev_attr_modalias.attr,
5039563e 220 &dev_attr_driver_override.attr,
aa7da564 221 NULL,
8ae12a0d 222};
eca2ebc7
MS
223
224static const struct attribute_group spi_dev_group = {
225 .attrs = spi_dev_attrs,
226};
227
228static struct attribute *spi_device_statistics_attrs[] = {
229 &dev_attr_spi_device_messages.attr,
230 &dev_attr_spi_device_transfers.attr,
231 &dev_attr_spi_device_errors.attr,
232 &dev_attr_spi_device_timedout.attr,
233 &dev_attr_spi_device_spi_sync.attr,
234 &dev_attr_spi_device_spi_sync_immediate.attr,
235 &dev_attr_spi_device_spi_async.attr,
236 &dev_attr_spi_device_bytes.attr,
237 &dev_attr_spi_device_bytes_rx.attr,
238 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
239 &dev_attr_spi_device_transfer_bytes_histo0.attr,
240 &dev_attr_spi_device_transfer_bytes_histo1.attr,
241 &dev_attr_spi_device_transfer_bytes_histo2.attr,
242 &dev_attr_spi_device_transfer_bytes_histo3.attr,
243 &dev_attr_spi_device_transfer_bytes_histo4.attr,
244 &dev_attr_spi_device_transfer_bytes_histo5.attr,
245 &dev_attr_spi_device_transfer_bytes_histo6.attr,
246 &dev_attr_spi_device_transfer_bytes_histo7.attr,
247 &dev_attr_spi_device_transfer_bytes_histo8.attr,
248 &dev_attr_spi_device_transfer_bytes_histo9.attr,
249 &dev_attr_spi_device_transfer_bytes_histo10.attr,
250 &dev_attr_spi_device_transfer_bytes_histo11.attr,
251 &dev_attr_spi_device_transfer_bytes_histo12.attr,
252 &dev_attr_spi_device_transfer_bytes_histo13.attr,
253 &dev_attr_spi_device_transfer_bytes_histo14.attr,
254 &dev_attr_spi_device_transfer_bytes_histo15.attr,
255 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 256 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
257 NULL,
258};
259
260static const struct attribute_group spi_device_statistics_group = {
261 .name = "statistics",
262 .attrs = spi_device_statistics_attrs,
263};
264
265static const struct attribute_group *spi_dev_groups[] = {
266 &spi_dev_group,
267 &spi_device_statistics_group,
268 NULL,
269};
270
8caab75f
GU
271static struct attribute *spi_controller_statistics_attrs[] = {
272 &dev_attr_spi_controller_messages.attr,
273 &dev_attr_spi_controller_transfers.attr,
274 &dev_attr_spi_controller_errors.attr,
275 &dev_attr_spi_controller_timedout.attr,
276 &dev_attr_spi_controller_spi_sync.attr,
277 &dev_attr_spi_controller_spi_sync_immediate.attr,
278 &dev_attr_spi_controller_spi_async.attr,
279 &dev_attr_spi_controller_bytes.attr,
280 &dev_attr_spi_controller_bytes_rx.attr,
281 &dev_attr_spi_controller_bytes_tx.attr,
282 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
283 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
284 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
285 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
286 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
287 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
288 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
289 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
290 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
291 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
292 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
293 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
294 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
295 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
296 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
297 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
298 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
299 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
300 NULL,
301};
302
8caab75f 303static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 304 .name = "statistics",
8caab75f 305 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
306};
307
308static const struct attribute_group *spi_master_groups[] = {
8caab75f 309 &spi_controller_statistics_group,
eca2ebc7
MS
310 NULL,
311};
312
d501cc4c 313static void spi_statistics_add_transfer_stats(struct spi_statistics __percpu *pcpu_stats,
da21fde0
UKK
314 struct spi_transfer *xfer,
315 struct spi_controller *ctlr)
eca2ebc7 316{
6b7bc061 317 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
67b9d641 318 struct spi_statistics *stats;
6b7bc061
MS
319
320 if (l2len < 0)
321 l2len = 0;
eca2ebc7 322
67b9d641
DJ
323 get_cpu();
324 stats = this_cpu_ptr(pcpu_stats);
6598b91b 325 u64_stats_update_begin(&stats->syncp);
eca2ebc7 326
6598b91b
DJ
327 u64_stats_inc(&stats->transfers);
328 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
eca2ebc7 329
6598b91b 330 u64_stats_add(&stats->bytes, xfer->len);
eca2ebc7 331 if ((xfer->tx_buf) &&
8caab75f 332 (xfer->tx_buf != ctlr->dummy_tx))
6598b91b 333 u64_stats_add(&stats->bytes_tx, xfer->len);
eca2ebc7 334 if ((xfer->rx_buf) &&
8caab75f 335 (xfer->rx_buf != ctlr->dummy_rx))
6598b91b 336 u64_stats_add(&stats->bytes_rx, xfer->len);
eca2ebc7 337
6598b91b 338 u64_stats_update_end(&stats->syncp);
67b9d641 339 put_cpu();
eca2ebc7 340}
8ae12a0d 341
350de7ce
AS
342/*
343 * modalias support makes "modprobe $MODALIAS" new-style hotplug work,
8ae12a0d
DB
344 * and the sysfs version makes coldplug work too.
345 */
3f076575 346static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, const char *name)
75368bf6
AV
347{
348 while (id->name[0]) {
3f076575 349 if (!strcmp(name, id->name))
75368bf6
AV
350 return id;
351 id++;
352 }
353 return NULL;
354}
355
356const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
357{
358 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
359
3f076575 360 return spi_match_id(sdrv->id_table, sdev->modalias);
75368bf6
AV
361}
362EXPORT_SYMBOL_GPL(spi_get_device_id);
363
aea672d0
AS
364const void *spi_get_device_match_data(const struct spi_device *sdev)
365{
366 const void *match;
367
368 match = device_get_match_data(&sdev->dev);
369 if (match)
370 return match;
371
372 return (const void *)spi_get_device_id(sdev)->driver_data;
373}
374EXPORT_SYMBOL_GPL(spi_get_device_match_data);
375
8ae12a0d
DB
376static int spi_match_device(struct device *dev, struct device_driver *drv)
377{
378 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
379 const struct spi_driver *sdrv = to_spi_driver(drv);
380
5039563e
TP
381 /* Check override first, and if set, only use the named driver */
382 if (spi->driver_override)
383 return strcmp(spi->driver_override, drv->name) == 0;
384
2b7a32f7
SA
385 /* Attempt an OF style match */
386 if (of_driver_match_device(dev, drv))
387 return 1;
388
64bee4d2
MW
389 /* Then try ACPI */
390 if (acpi_driver_match_device(dev, drv))
391 return 1;
392
75368bf6 393 if (sdrv->id_table)
3f076575 394 return !!spi_match_id(sdrv->id_table, spi->modalias);
8ae12a0d 395
35f74fca 396 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
397}
398
2a81ada3 399static int spi_uevent(const struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
400{
401 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
402 int rc;
403
404 rc = acpi_device_uevent_modalias(dev, env);
405 if (rc != -ENODEV)
406 return rc;
8ae12a0d 407
2856670f 408 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
409}
410
9db34ee6 411static int spi_probe(struct device *dev)
b885244e
DB
412{
413 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 414 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
415 int ret;
416
86be408b
SN
417 ret = of_clk_set_defaults(dev->of_node, false);
418 if (ret)
419 return ret;
420
44af7927
JH
421 if (dev->of_node) {
422 spi->irq = of_irq_get(dev->of_node, 0);
423 if (spi->irq == -EPROBE_DEFER)
424 return -EPROBE_DEFER;
425 if (spi->irq < 0)
426 spi->irq = 0;
427 }
428
676e7c25 429 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
430 if (ret)
431 return ret;
432
440408db
UKK
433 if (sdrv->probe) {
434 ret = sdrv->probe(spi);
435 if (ret)
436 dev_pm_domain_detach(dev, true);
437 }
b885244e 438
33cf00e5 439 return ret;
b885244e
DB
440}
441
fc7a6209 442static void spi_remove(struct device *dev)
b885244e
DB
443{
444 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5 445
a0386bba
UKK
446 if (sdrv->remove)
447 sdrv->remove(to_spi_device(dev));
7795d475 448
676e7c25 449 dev_pm_domain_detach(dev, true);
b885244e
DB
450}
451
9db34ee6 452static void spi_shutdown(struct device *dev)
b885244e 453{
a6f483b2
MS
454 if (dev->driver) {
455 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
b885244e 456
a6f483b2
MS
457 if (sdrv->shutdown)
458 sdrv->shutdown(to_spi_device(dev));
459 }
b885244e
DB
460}
461
6df534cc 462const struct bus_type spi_bus_type = {
9db34ee6
UKK
463 .name = "spi",
464 .dev_groups = spi_dev_groups,
465 .match = spi_match_device,
466 .uevent = spi_uevent,
467 .probe = spi_probe,
468 .remove = spi_remove,
469 .shutdown = spi_shutdown,
470};
471EXPORT_SYMBOL_GPL(spi_bus_type);
472
33e34dc6 473/**
ca5d2485 474 * __spi_register_driver - register a SPI driver
88c9321d 475 * @owner: owner module of the driver to register
33e34dc6
DB
476 * @sdrv: the driver to register
477 * Context: can sleep
97d56dc6
JMC
478 *
479 * Return: zero on success, else a negative error code.
33e34dc6 480 */
ca5d2485 481int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 482{
ca5d2485 483 sdrv->driver.owner = owner;
b885244e 484 sdrv->driver.bus = &spi_bus_type;
5fa6863b
MB
485
486 /*
487 * For Really Good Reasons we use spi: modaliases not of:
488 * modaliases for DT so module autoloading won't work if we
489 * don't have a spi_device_id as well as a compatible string.
490 */
491 if (sdrv->driver.of_match_table) {
492 const struct of_device_id *of_id;
493
494 for (of_id = sdrv->driver.of_match_table; of_id->compatible[0];
495 of_id++) {
496 const char *of_name;
497
498 /* Strip off any vendor prefix */
499 of_name = strnchr(of_id->compatible,
500 sizeof(of_id->compatible), ',');
501 if (of_name)
502 of_name++;
503 else
504 of_name = of_id->compatible;
505
506 if (sdrv->id_table) {
507 const struct spi_device_id *spi_id;
508
3f076575 509 spi_id = spi_match_id(sdrv->id_table, of_name);
b79332ef 510 if (spi_id)
5fa6863b
MB
511 continue;
512 } else {
513 if (strcmp(sdrv->driver.name, of_name) == 0)
514 continue;
515 }
516
517 pr_warn("SPI driver %s has no spi_device_id for %s\n",
518 sdrv->driver.name, of_id->compatible);
519 }
520 }
521
b885244e
DB
522 return driver_register(&sdrv->driver);
523}
ca5d2485 524EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 525
8ae12a0d
DB
526/*-------------------------------------------------------------------------*/
527
350de7ce
AS
528/*
529 * SPI devices should normally not be created by SPI device drivers; that
8caab75f 530 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
531 * Device registration normally goes into like arch/.../mach.../board-YYY.c
532 * with other readonly (flashable) information about mainboard devices.
533 */
534
535struct boardinfo {
536 struct list_head list;
2b9603a0 537 struct spi_board_info board_info;
8ae12a0d
DB
538};
539
540static LIST_HEAD(board_list);
8caab75f 541static LIST_HEAD(spi_controller_list);
2b9603a0
FT
542
543/*
be73e323 544 * Used to protect add/del operation for board_info list and
350de7ce
AS
545 * spi_controller list, and their matching process also used
546 * to protect object of type struct idr.
2b9603a0 547 */
94040828 548static DEFINE_MUTEX(board_lock);
8ae12a0d 549
dc87c98e
GL
550/**
551 * spi_alloc_device - Allocate a new SPI device
8caab75f 552 * @ctlr: Controller to which device is connected
dc87c98e
GL
553 * Context: can sleep
554 *
555 * Allows a driver to allocate and initialize a spi_device without
556 * registering it immediately. This allows a driver to directly
557 * fill the spi_device with device parameters before calling
558 * spi_add_device() on it.
559 *
560 * Caller is responsible to call spi_add_device() on the returned
8caab75f 561 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
562 * needs to discard the spi_device without adding it, then it should
563 * call spi_dev_put() on it.
564 *
97d56dc6 565 * Return: a pointer to the new device, or NULL.
dc87c98e 566 */
e3dc1399 567struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
568{
569 struct spi_device *spi;
dc87c98e 570
8caab75f 571 if (!spi_controller_get(ctlr))
dc87c98e
GL
572 return NULL;
573
5fe5f05e 574 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 575 if (!spi) {
8caab75f 576 spi_controller_put(ctlr);
dc87c98e
GL
577 return NULL;
578 }
579
6598b91b
DJ
580 spi->pcpu_statistics = spi_alloc_pcpu_stats(NULL);
581 if (!spi->pcpu_statistics) {
582 kfree(spi);
583 spi_controller_put(ctlr);
584 return NULL;
585 }
586
620d269f 587 spi->controller = ctlr;
8caab75f 588 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
589 spi->dev.bus = &spi_bus_type;
590 spi->dev.release = spidev_release;
ea235786 591 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7 592
dc87c98e
GL
593 device_initialize(&spi->dev);
594 return spi;
595}
e3dc1399 596EXPORT_SYMBOL_GPL(spi_alloc_device);
dc87c98e 597
e13ac47b
JN
598static void spi_dev_set_name(struct spi_device *spi)
599{
600 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
601
602 if (adev) {
603 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
604 return;
605 }
606
8caab75f 607 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
303feb3c 608 spi_get_chipselect(spi, 0));
e13ac47b
JN
609}
610
be84be4a
AS
611/*
612 * Zero(0) is a valid physical CS value and can be located at any
613 * logical CS in the spi->chip_select[]. If all the physical CS
614 * are initialized to 0 then It would be difficult to differentiate
615 * between a valid physical CS 0 & an unused logical CS whose physical
616 * CS can be 0. As a solution to this issue initialize all the CS to -1.
617 * Now all the unused logical CS will have -1 physical CS value & can be
618 * ignored while performing physical CS validity checks.
619 */
620#define SPI_INVALID_CS ((s8)-1)
621
622static inline bool is_valid_cs(s8 chip_select)
623{
624 return chip_select != SPI_INVALID_CS;
625}
626
9086d0f2
AS
627static inline int spi_dev_check_cs(struct device *dev,
628 struct spi_device *spi, u8 idx,
629 struct spi_device *new_spi, u8 new_idx)
630{
631 u8 cs, cs_new;
632 u8 idx_new;
633
634 cs = spi_get_chipselect(spi, idx);
635 for (idx_new = new_idx; idx_new < SPI_CS_CNT_MAX; idx_new++) {
636 cs_new = spi_get_chipselect(new_spi, idx_new);
be84be4a 637 if (is_valid_cs(cs) && is_valid_cs(cs_new) && cs == cs_new) {
9086d0f2
AS
638 dev_err(dev, "chipselect %u already in use\n", cs_new);
639 return -EBUSY;
640 }
641 }
642 return 0;
643}
644
b6fb8d3a
MW
645static int spi_dev_check(struct device *dev, void *data)
646{
647 struct spi_device *spi = to_spi_device(dev);
648 struct spi_device *new_spi = data;
9086d0f2 649 int status, idx;
4d8ff6b0
AKM
650
651 if (spi->controller == new_spi->controller) {
652 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
9086d0f2
AS
653 status = spi_dev_check_cs(dev, spi, idx, new_spi, 0);
654 if (status)
655 return status;
4d8ff6b0
AKM
656 }
657 }
b6fb8d3a
MW
658 return 0;
659}
660
c7299fea
SK
661static void spi_cleanup(struct spi_device *spi)
662{
663 if (spi->controller->cleanup)
664 spi->controller->cleanup(spi);
665}
666
0c79378c 667static int __spi_add_device(struct spi_device *spi)
dc87c98e 668{
8caab75f
GU
669 struct spi_controller *ctlr = spi->controller;
670 struct device *dev = ctlr->dev.parent;
9086d0f2
AS
671 int status, idx;
672 u8 cs;
4d8ff6b0
AKM
673
674 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
675 /* Chipselects are numbered 0..max; validate. */
676 cs = spi_get_chipselect(spi, idx);
be84be4a 677 if (is_valid_cs(cs) && cs >= ctlr->num_chipselect) {
4d8ff6b0
AKM
678 dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, idx),
679 ctlr->num_chipselect);
680 return -EINVAL;
681 }
682 }
dc87c98e 683
4d8ff6b0
AKM
684 /*
685 * Make sure that multiple logical CS doesn't map to the same physical CS.
686 * For example, spi->chip_select[0] != spi->chip_select[1] and so on.
687 */
688 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
9086d0f2
AS
689 status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1);
690 if (status)
691 return status;
36124dea
AS
692 }
693
694 /* Set the bus ID string */
695 spi_dev_set_name(spi);
696
6bfb15f3
UKK
697 /*
698 * We need to make sure there's no other device with this
699 * chipselect **BEFORE** we call setup(), else we'll trash
700 * its configuration.
701 */
b6fb8d3a 702 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
4d8ff6b0 703 if (status)
0c79378c 704 return status;
e48880e0 705
ddf75be4
LW
706 /* Controller may unregister concurrently */
707 if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
708 !device_is_registered(&ctlr->dev)) {
0c79378c 709 return -ENODEV;
ddf75be4
LW
710 }
711
4d8ff6b0
AKM
712 if (ctlr->cs_gpiods) {
713 u8 cs;
714
715 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
716 cs = spi_get_chipselect(spi, idx);
be84be4a 717 if (is_valid_cs(cs))
4d8ff6b0
AKM
718 spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]);
719 }
720 }
74317984 721
350de7ce
AS
722 /*
723 * Drivers may modify this initial i/o setup, but will
e48880e0
DB
724 * normally rely on the device being setup. Devices
725 * using SPI_CS_HIGH can't coexist well otherwise...
726 */
7d077197 727 status = spi_setup(spi);
dc87c98e 728 if (status < 0) {
eb288a1f
LW
729 dev_err(dev, "can't setup %s, status %d\n",
730 dev_name(&spi->dev), status);
0c79378c 731 return status;
dc87c98e
GL
732 }
733
e48880e0 734 /* Device may be bound to an active driver when this returns */
dc87c98e 735 status = device_add(&spi->dev);
c7299fea 736 if (status < 0) {
eb288a1f
LW
737 dev_err(dev, "can't add %s, status %d\n",
738 dev_name(&spi->dev), status);
c7299fea
SK
739 spi_cleanup(spi);
740 } else {
35f74fca 741 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
c7299fea 742 }
dc87c98e 743
0c79378c
SR
744 return status;
745}
746
747/**
748 * spi_add_device - Add spi_device allocated with spi_alloc_device
749 * @spi: spi_device to register
750 *
751 * Companion function to spi_alloc_device. Devices allocated with
702ca026 752 * spi_alloc_device can be added onto the SPI bus with this function.
0c79378c
SR
753 *
754 * Return: 0 on success; negative errno on failure
755 */
e3dc1399 756int spi_add_device(struct spi_device *spi)
0c79378c
SR
757{
758 struct spi_controller *ctlr = spi->controller;
0c79378c
SR
759 int status;
760
4d8ff6b0
AKM
761 /* Set the bus ID string */
762 spi_dev_set_name(spi);
763
6098475d 764 mutex_lock(&ctlr->add_lock);
0c79378c 765 status = __spi_add_device(spi);
6098475d 766 mutex_unlock(&ctlr->add_lock);
e48880e0 767 return status;
dc87c98e 768}
e3dc1399 769EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 770
5ee91605
AS
771static void spi_set_all_cs_unused(struct spi_device *spi)
772{
773 u8 idx;
774
5ee91605 775 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
be84be4a 776 spi_set_chipselect(spi, idx, SPI_INVALID_CS);
5ee91605
AS
777}
778
33e34dc6
DB
779/**
780 * spi_new_device - instantiate one new SPI device
8caab75f 781 * @ctlr: Controller to which device is connected
33e34dc6
DB
782 * @chip: Describes the SPI device
783 * Context: can sleep
784 *
785 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
786 * after board init creates the hard-wired devices. Some development
787 * platforms may not be able to use spi_register_board_info though, and
788 * this is exported so that for example a USB or parport based adapter
789 * driver could add devices (which it would learn about out-of-band).
082c8cb4 790 *
97d56dc6 791 * Return: the new device, or NULL.
8ae12a0d 792 */
8caab75f 793struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 794 struct spi_board_info *chip)
8ae12a0d
DB
795{
796 struct spi_device *proxy;
8ae12a0d
DB
797 int status;
798
350de7ce
AS
799 /*
800 * NOTE: caller did any chip->bus_num checks necessary.
082c8cb4
DB
801 *
802 * Also, unless we change the return value convention to use
803 * error-or-pointer (not NULL-or-pointer), troubleshootability
804 * suggests syslogged diagnostics are best here (ugh).
805 */
806
8caab75f 807 proxy = spi_alloc_device(ctlr);
dc87c98e 808 if (!proxy)
8ae12a0d
DB
809 return NULL;
810
102eb975
GL
811 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
812
5ee91605
AS
813 /* Use provided chip-select for proxy device */
814 spi_set_all_cs_unused(proxy);
303feb3c 815 spi_set_chipselect(proxy, 0, chip->chip_select);
5ee91605 816
8ae12a0d 817 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 818 proxy->mode = chip->mode;
8ae12a0d 819 proxy->irq = chip->irq;
51e99de5 820 strscpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
821 proxy->dev.platform_data = (void *) chip->platform_data;
822 proxy->controller_data = chip->controller_data;
823 proxy->controller_state = NULL;
4d8ff6b0
AKM
824 /*
825 * spi->chip_select[i] gives the corresponding physical CS for logical CS i
826 * logical CS number is represented by setting the ith bit in spi->cs_index_mask
827 * So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
828 * spi->chip_select[0] will give the physical CS.
829 * By default spi->chip_select[0] will hold the physical CS number so, set
830 * spi->cs_index_mask as 0x01.
831 */
832 proxy->cs_index_mask = 0x01;
8ae12a0d 833
47afc77b
HK
834 if (chip->swnode) {
835 status = device_add_software_node(&proxy->dev, chip->swnode);
826cf175 836 if (status) {
9d902c2a 837 dev_err(&ctlr->dev, "failed to add software node to '%s': %d\n",
826cf175
DT
838 chip->modalias, status);
839 goto err_dev_put;
840 }
8ae12a0d
DB
841 }
842
826cf175
DT
843 status = spi_add_device(proxy);
844 if (status < 0)
df41a5da 845 goto err_dev_put;
826cf175 846
8ae12a0d 847 return proxy;
826cf175 848
826cf175 849err_dev_put:
df41a5da 850 device_remove_software_node(&proxy->dev);
826cf175
DT
851 spi_dev_put(proxy);
852 return NULL;
8ae12a0d
DB
853}
854EXPORT_SYMBOL_GPL(spi_new_device);
855
3b1884c2
GU
856/**
857 * spi_unregister_device - unregister a single SPI device
858 * @spi: spi_device to unregister
859 *
860 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 861 * by spi_unregister_controller().
3b1884c2
GU
862 */
863void spi_unregister_device(struct spi_device *spi)
864{
bd6c1644
GU
865 if (!spi)
866 return;
867
8324147f 868 if (spi->dev.of_node) {
bd6c1644 869 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
870 of_node_put(spi->dev.of_node);
871 }
7f24467f
OP
872 if (ACPI_COMPANION(&spi->dev))
873 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
47afc77b 874 device_remove_software_node(&spi->dev);
27e7db56
SK
875 device_del(&spi->dev);
876 spi_cleanup(spi);
877 put_device(&spi->dev);
3b1884c2
GU
878}
879EXPORT_SYMBOL_GPL(spi_unregister_device);
880
8caab75f
GU
881static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
882 struct spi_board_info *bi)
2b9603a0
FT
883{
884 struct spi_device *dev;
885
8caab75f 886 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
887 return;
888
8caab75f 889 dev = spi_new_device(ctlr, bi);
2b9603a0 890 if (!dev)
8caab75f 891 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
892 bi->modalias);
893}
894
33e34dc6
DB
895/**
896 * spi_register_board_info - register SPI devices for a given board
897 * @info: array of chip descriptors
898 * @n: how many descriptors are provided
899 * Context: can sleep
900 *
8ae12a0d
DB
901 * Board-specific early init code calls this (probably during arch_initcall)
902 * with segments of the SPI device table. Any device nodes are created later,
903 * after the relevant parent SPI controller (bus_num) is defined. We keep
904 * this table of devices forever, so that reloading a controller driver will
905 * not make Linux forget about these hard-wired devices.
906 *
907 * Other code can also call this, e.g. a particular add-on board might provide
908 * SPI devices through its expansion connector, so code initializing that board
909 * would naturally declare its SPI devices.
910 *
911 * The board info passed can safely be __initdata ... but be careful of
912 * any embedded pointers (platform_data, etc), they're copied as-is.
97d56dc6
JMC
913 *
914 * Return: zero on success, else a negative error code.
8ae12a0d 915 */
fd4a319b 916int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 917{
2b9603a0
FT
918 struct boardinfo *bi;
919 int i;
8ae12a0d 920
c7908a37 921 if (!n)
f974cf57 922 return 0;
c7908a37 923
f9bdb7fd 924 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
925 if (!bi)
926 return -ENOMEM;
8ae12a0d 927
2b9603a0 928 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 929 struct spi_controller *ctlr;
8ae12a0d 930
2b9603a0 931 memcpy(&bi->board_info, info, sizeof(*info));
826cf175 932
2b9603a0
FT
933 mutex_lock(&board_lock);
934 list_add_tail(&bi->list, &board_list);
8caab75f
GU
935 list_for_each_entry(ctlr, &spi_controller_list, list)
936 spi_match_controller_to_boardinfo(ctlr,
937 &bi->board_info);
2b9603a0 938 mutex_unlock(&board_lock);
8ae12a0d 939 }
2b9603a0
FT
940
941 return 0;
8ae12a0d
DB
942}
943
944/*-------------------------------------------------------------------------*/
945
fb51601b
UKK
946/* Core methods for SPI resource management */
947
948/**
949 * spi_res_alloc - allocate a spi resource that is life-cycle managed
950 * during the processing of a spi_message while using
951 * spi_transfer_one
702ca026 952 * @spi: the SPI device for which we allocate memory
fb51601b
UKK
953 * @release: the release code to execute for this resource
954 * @size: size to alloc and return
955 * @gfp: GFP allocation flags
956 *
957 * Return: the pointer to the allocated data
958 *
959 * This may get enhanced in the future to allocate from a memory pool
960 * of the @spi_device or @spi_controller to avoid repeated allocations.
961 */
da21fde0
UKK
962static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
963 size_t size, gfp_t gfp)
fb51601b
UKK
964{
965 struct spi_res *sres;
966
967 sres = kzalloc(sizeof(*sres) + size, gfp);
968 if (!sres)
969 return NULL;
970
971 INIT_LIST_HEAD(&sres->entry);
972 sres->release = release;
973
974 return sres->data;
975}
fb51601b
UKK
976
977/**
702ca026 978 * spi_res_free - free an SPI resource
fb51601b 979 * @res: pointer to the custom data of a resource
fb51601b 980 */
da21fde0 981static void spi_res_free(void *res)
fb51601b
UKK
982{
983 struct spi_res *sres = container_of(res, struct spi_res, data);
984
985 if (!res)
986 return;
987
988 WARN_ON(!list_empty(&sres->entry));
989 kfree(sres);
990}
fb51601b
UKK
991
992/**
993 * spi_res_add - add a spi_res to the spi_message
702ca026 994 * @message: the SPI message
fb51601b
UKK
995 * @res: the spi_resource
996 */
da21fde0 997static void spi_res_add(struct spi_message *message, void *res)
fb51601b
UKK
998{
999 struct spi_res *sres = container_of(res, struct spi_res, data);
1000
1001 WARN_ON(!list_empty(&sres->entry));
1002 list_add_tail(&sres->entry, &message->resources);
1003}
fb51601b
UKK
1004
1005/**
702ca026 1006 * spi_res_release - release all SPI resources for this message
fb51601b
UKK
1007 * @ctlr: the @spi_controller
1008 * @message: the @spi_message
1009 */
da21fde0 1010static void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
fb51601b
UKK
1011{
1012 struct spi_res *res, *tmp;
1013
1014 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
1015 if (res->release)
1016 res->release(ctlr, message, res->data);
1017
1018 list_del(&res->entry);
1019
1020 kfree(res);
1021 }
1022}
fb51601b
UKK
1023
1024/*-------------------------------------------------------------------------*/
4d8ff6b0
AKM
1025static inline bool spi_is_last_cs(struct spi_device *spi)
1026{
1027 u8 idx;
1028 bool last = false;
1029
1030 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
1209c556 1031 if (spi->cs_index_mask & BIT(idx)) {
4d8ff6b0
AKM
1032 if (spi->controller->last_cs[idx] == spi_get_chipselect(spi, idx))
1033 last = true;
1034 }
1035 }
1036 return last;
1037}
1038
fb51601b 1039
d347b4aa 1040static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
b158935f 1041{
86527bcb 1042 bool activate = enable;
4d8ff6b0 1043 u8 idx;
25093bde 1044
d40f0b6f
DA
1045 /*
1046 * Avoid calling into the driver (or doing delays) if the chip select
1047 * isn't actually changing from the last time this was called.
1048 */
4d8ff6b0
AKM
1049 if (!force && ((enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
1050 spi_is_last_cs(spi)) ||
1051 (!enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
1052 !spi_is_last_cs(spi))) &&
d40f0b6f
DA
1053 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
1054 return;
1055
5cb4e1f3
AS
1056 trace_spi_set_cs(spi, activate);
1057
4d8ff6b0
AKM
1058 spi->controller->last_cs_index_mask = spi->cs_index_mask;
1059 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
be84be4a 1060 spi->controller->last_cs[idx] = enable ? spi_get_chipselect(spi, 0) : SPI_INVALID_CS;
d40f0b6f
DA
1061 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
1062
b158935f
MB
1063 if (spi->mode & SPI_CS_HIGH)
1064 enable = !enable;
1065
aa0162dc
JG
1066 /*
1067 * Handle chip select delays for GPIO based CS or controllers without
1068 * programmable chip select timing.
1069 */
1070 if ((spi_is_csgpiod(spi) || !spi->controller->set_cs_timing) && !activate)
1071 spi_delay_exec(&spi->cs_hold, NULL);
4d8ff6b0 1072
aa0162dc 1073 if (spi_is_csgpiod(spi)) {
f3186dd8 1074 if (!(spi->mode & SPI_NO_CS)) {
f48dc6b9
LW
1075 /*
1076 * Historically ACPI has no means of the GPIO polarity and
1077 * thus the SPISerialBus() resource defines it on the per-chip
1078 * basis. In order to avoid a chain of negations, the GPIO
1079 * polarity is considered being Active High. Even for the cases
1080 * when _DSD() is involved (in the updated versions of ACPI)
1081 * the GPIO CS polarity must be defined Active High to avoid
1082 * ambiguity. That's why we use enable, that takes SPI_CS_HIGH
1083 * into account.
1084 */
4d8ff6b0 1085 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
1209c556 1086 if ((spi->cs_index_mask & BIT(idx)) && spi_get_csgpiod(spi, idx)) {
4d8ff6b0
AKM
1087 if (has_acpi_companion(&spi->dev))
1088 gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
1089 !enable);
1090 else
1091 /* Polarity handled by GPIO library */
1092 gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
1093 activate);
1094
1095 if (activate)
1096 spi_delay_exec(&spi->cs_setup, NULL);
1097 else
1098 spi_delay_exec(&spi->cs_inactive, NULL);
1099 }
1100 }
f3186dd8 1101 }
8eee6b9d 1102 /* Some SPI masters need both GPIO CS & slave_select */
82238d2c 1103 if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
8caab75f
GU
1104 spi->controller->set_cs)
1105 spi->controller->set_cs(spi, !enable);
1106 } else if (spi->controller->set_cs) {
1107 spi->controller->set_cs(spi, !enable);
8eee6b9d 1108 }
aa0162dc
JG
1109
1110 if (spi_is_csgpiod(spi) || !spi->controller->set_cs_timing) {
1111 if (activate)
1112 spi_delay_exec(&spi->cs_setup, NULL);
1113 else
1114 spi_delay_exec(&spi->cs_inactive, NULL);
1115 }
b158935f
MB
1116}
1117
2de440f5 1118#ifdef CONFIG_HAS_DMA
0c17ba73
VW
1119static int spi_map_buf_attrs(struct spi_controller *ctlr, struct device *dev,
1120 struct sg_table *sgt, void *buf, size_t len,
1121 enum dma_data_direction dir, unsigned long attrs)
6ad45a27
MB
1122{
1123 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 1124 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
1125#ifdef CONFIG_HIGHMEM
1126 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
1127 (unsigned long)buf < (PKMAP_BASE +
1128 (LAST_PKMAP * PAGE_SIZE)));
1129#else
1130 const bool kmap_buf = false;
1131#endif
65598c13
AG
1132 int desc_len;
1133 int sgs;
6ad45a27 1134 struct page *vm_page;
8dd4a016 1135 struct scatterlist *sg;
6ad45a27
MB
1136 void *sg_buf;
1137 size_t min;
1138 int i, ret;
1139
b1b8153c 1140 if (vmalloced_buf || kmap_buf) {
ebc4cb43 1141 desc_len = min_t(unsigned long, max_seg_size, PAGE_SIZE);
65598c13 1142 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 1143 } else if (virt_addr_valid(buf)) {
ebc4cb43 1144 desc_len = min_t(size_t, max_seg_size, ctlr->max_dma_len);
65598c13 1145 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
1146 } else {
1147 return -EINVAL;
65598c13
AG
1148 }
1149
6ad45a27
MB
1150 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
1151 if (ret != 0)
1152 return ret;
1153
8dd4a016 1154 sg = &sgt->sgl[0];
6ad45a27 1155 for (i = 0; i < sgs; i++) {
6ad45a27 1156
b1b8153c 1157 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
1158 /*
1159 * Next scatterlist entry size is the minimum between
1160 * the desc_len and the remaining buffer length that
1161 * fits in a page.
1162 */
1163 min = min_t(size_t, desc_len,
1164 min_t(size_t, len,
1165 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
1166 if (vmalloced_buf)
1167 vm_page = vmalloc_to_page(buf);
1168 else
1169 vm_page = kmap_to_page(buf);
6ad45a27
MB
1170 if (!vm_page) {
1171 sg_free_table(sgt);
1172 return -ENOMEM;
1173 }
8dd4a016 1174 sg_set_page(sg, vm_page,
c1aefbdd 1175 min, offset_in_page(buf));
6ad45a27 1176 } else {
65598c13 1177 min = min_t(size_t, len, desc_len);
6ad45a27 1178 sg_buf = buf;
8dd4a016 1179 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
1180 }
1181
6ad45a27
MB
1182 buf += min;
1183 len -= min;
8dd4a016 1184 sg = sg_next(sg);
6ad45a27
MB
1185 }
1186
0c17ba73 1187 ret = dma_map_sgtable(dev, sgt, dir, attrs);
6ad45a27
MB
1188 if (ret < 0) {
1189 sg_free_table(sgt);
1190 return ret;
1191 }
1192
6ad45a27
MB
1193 return 0;
1194}
1195
0c17ba73
VW
1196int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
1197 struct sg_table *sgt, void *buf, size_t len,
1198 enum dma_data_direction dir)
1199{
1200 return spi_map_buf_attrs(ctlr, dev, sgt, buf, len, dir, 0);
1201}
1202
1203static void spi_unmap_buf_attrs(struct spi_controller *ctlr,
1204 struct device *dev, struct sg_table *sgt,
1205 enum dma_data_direction dir,
1206 unsigned long attrs)
6ad45a27
MB
1207{
1208 if (sgt->orig_nents) {
0c17ba73 1209 dma_unmap_sgtable(dev, sgt, dir, attrs);
6ad45a27 1210 sg_free_table(sgt);
8e9204cd
MS
1211 sgt->orig_nents = 0;
1212 sgt->nents = 0;
6ad45a27
MB
1213 }
1214}
1215
0c17ba73
VW
1216void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
1217 struct sg_table *sgt, enum dma_data_direction dir)
1218{
1219 spi_unmap_buf_attrs(ctlr, dev, sgt, dir, 0);
1220}
1221
8caab75f 1222static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1223{
99adef31
MB
1224 struct device *tx_dev, *rx_dev;
1225 struct spi_transfer *xfer;
6ad45a27 1226 int ret;
3a2eba9b 1227
8caab75f 1228 if (!ctlr->can_dma)
99adef31
MB
1229 return 0;
1230
8caab75f
GU
1231 if (ctlr->dma_tx)
1232 tx_dev = ctlr->dma_tx->device->dev;
b470e10e
VK
1233 else if (ctlr->dma_map_dev)
1234 tx_dev = ctlr->dma_map_dev;
c37f45b5 1235 else
8caab75f 1236 tx_dev = ctlr->dev.parent;
c37f45b5 1237
8caab75f
GU
1238 if (ctlr->dma_rx)
1239 rx_dev = ctlr->dma_rx->device->dev;
b470e10e
VK
1240 else if (ctlr->dma_map_dev)
1241 rx_dev = ctlr->dma_map_dev;
c37f45b5 1242 else
8caab75f 1243 rx_dev = ctlr->dev.parent;
99adef31
MB
1244
1245 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
0c17ba73
VW
1246 /* The sync is done before each transfer. */
1247 unsigned long attrs = DMA_ATTR_SKIP_CPU_SYNC;
1248
8caab75f 1249 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1250 continue;
1251
1252 if (xfer->tx_buf != NULL) {
0c17ba73
VW
1253 ret = spi_map_buf_attrs(ctlr, tx_dev, &xfer->tx_sg,
1254 (void *)xfer->tx_buf,
1255 xfer->len, DMA_TO_DEVICE,
1256 attrs);
6ad45a27
MB
1257 if (ret != 0)
1258 return ret;
99adef31
MB
1259 }
1260
1261 if (xfer->rx_buf != NULL) {
0c17ba73
VW
1262 ret = spi_map_buf_attrs(ctlr, rx_dev, &xfer->rx_sg,
1263 xfer->rx_buf, xfer->len,
1264 DMA_FROM_DEVICE, attrs);
6ad45a27 1265 if (ret != 0) {
0c17ba73
VW
1266 spi_unmap_buf_attrs(ctlr, tx_dev,
1267 &xfer->tx_sg, DMA_TO_DEVICE,
1268 attrs);
1269
6ad45a27 1270 return ret;
99adef31
MB
1271 }
1272 }
1273 }
1274
f25723dc
VW
1275 ctlr->cur_rx_dma_dev = rx_dev;
1276 ctlr->cur_tx_dma_dev = tx_dev;
8caab75f 1277 ctlr->cur_msg_mapped = true;
99adef31
MB
1278
1279 return 0;
1280}
1281
8caab75f 1282static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1283{
f25723dc
VW
1284 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1285 struct device *tx_dev = ctlr->cur_tx_dma_dev;
99adef31 1286 struct spi_transfer *xfer;
99adef31 1287
8caab75f 1288 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
1289 return 0;
1290
99adef31 1291 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
0c17ba73
VW
1292 /* The sync has already been done after each transfer. */
1293 unsigned long attrs = DMA_ATTR_SKIP_CPU_SYNC;
1294
8caab75f 1295 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1296 continue;
1297
0c17ba73
VW
1298 spi_unmap_buf_attrs(ctlr, rx_dev, &xfer->rx_sg,
1299 DMA_FROM_DEVICE, attrs);
1300 spi_unmap_buf_attrs(ctlr, tx_dev, &xfer->tx_sg,
1301 DMA_TO_DEVICE, attrs);
99adef31
MB
1302 }
1303
809b1b04
RG
1304 ctlr->cur_msg_mapped = false;
1305
99adef31
MB
1306 return 0;
1307}
0c17ba73
VW
1308
1309static void spi_dma_sync_for_device(struct spi_controller *ctlr,
1310 struct spi_transfer *xfer)
1311{
1312 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1313 struct device *tx_dev = ctlr->cur_tx_dma_dev;
1314
1315 if (!ctlr->cur_msg_mapped)
1316 return;
1317
1318 if (xfer->tx_sg.orig_nents)
1319 dma_sync_sgtable_for_device(tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
1320 if (xfer->rx_sg.orig_nents)
1321 dma_sync_sgtable_for_device(rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1322}
1323
1324static void spi_dma_sync_for_cpu(struct spi_controller *ctlr,
1325 struct spi_transfer *xfer)
1326{
1327 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1328 struct device *tx_dev = ctlr->cur_tx_dma_dev;
1329
1330 if (!ctlr->cur_msg_mapped)
1331 return;
1332
1333 if (xfer->rx_sg.orig_nents)
1334 dma_sync_sgtable_for_cpu(rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1335 if (xfer->tx_sg.orig_nents)
1336 dma_sync_sgtable_for_cpu(tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
1337}
2de440f5 1338#else /* !CONFIG_HAS_DMA */
8caab75f 1339static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
1340 struct spi_message *msg)
1341{
1342 return 0;
1343}
1344
8caab75f 1345static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1346 struct spi_message *msg)
2de440f5
GU
1347{
1348 return 0;
1349}
0c17ba73
VW
1350
1351static void spi_dma_sync_for_device(struct spi_controller *ctrl,
1352 struct spi_transfer *xfer)
1353{
1354}
1355
1356static void spi_dma_sync_for_cpu(struct spi_controller *ctrl,
1357 struct spi_transfer *xfer)
1358{
1359}
2de440f5
GU
1360#endif /* !CONFIG_HAS_DMA */
1361
8caab75f 1362static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
1363 struct spi_message *msg)
1364{
1365 struct spi_transfer *xfer;
1366
1367 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1368 /*
1369 * Restore the original value of tx_buf or rx_buf if they are
1370 * NULL.
1371 */
8caab75f 1372 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1373 xfer->tx_buf = NULL;
8caab75f 1374 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
1375 xfer->rx_buf = NULL;
1376 }
1377
8caab75f 1378 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1379}
1380
8caab75f 1381static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1382{
1383 struct spi_transfer *xfer;
1384 void *tmp;
1385 unsigned int max_tx, max_rx;
1386
aee67fe8 1387 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1388 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU
1389 max_tx = 0;
1390 max_rx = 0;
1391
1392 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1393 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1394 !xfer->tx_buf)
1395 max_tx = max(xfer->len, max_tx);
8caab75f 1396 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1397 !xfer->rx_buf)
1398 max_rx = max(xfer->len, max_rx);
1399 }
1400
1401 if (max_tx) {
8caab75f 1402 tmp = krealloc(ctlr->dummy_tx, max_tx,
b00bab9d 1403 GFP_KERNEL | GFP_DMA | __GFP_ZERO);
2de440f5
GU
1404 if (!tmp)
1405 return -ENOMEM;
8caab75f 1406 ctlr->dummy_tx = tmp;
2de440f5
GU
1407 }
1408
1409 if (max_rx) {
8caab75f 1410 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1411 GFP_KERNEL | GFP_DMA);
1412 if (!tmp)
1413 return -ENOMEM;
8caab75f 1414 ctlr->dummy_rx = tmp;
2de440f5
GU
1415 }
1416
1417 if (max_tx || max_rx) {
1418 list_for_each_entry(xfer, &msg->transfers,
1419 transfer_list) {
5442dcaa
CL
1420 if (!xfer->len)
1421 continue;
2de440f5 1422 if (!xfer->tx_buf)
8caab75f 1423 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1424 if (!xfer->rx_buf)
8caab75f 1425 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1426 }
1427 }
1428 }
1429
8caab75f 1430 return __spi_map_msg(ctlr, msg);
2de440f5 1431}
99adef31 1432
810923f3
LR
1433static int spi_transfer_wait(struct spi_controller *ctlr,
1434 struct spi_message *msg,
1435 struct spi_transfer *xfer)
1436{
d501cc4c
DJ
1437 struct spi_statistics __percpu *statm = ctlr->pcpu_statistics;
1438 struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics;
6170d077 1439 u32 speed_hz = xfer->speed_hz;
49686df5 1440 unsigned long long ms;
810923f3
LR
1441
1442 if (spi_controller_is_slave(ctlr)) {
1443 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1444 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1445 return -EINTR;
1446 }
1447 } else {
6170d077
XY
1448 if (!speed_hz)
1449 speed_hz = 100000;
1450
86b8bff7
AS
1451 /*
1452 * For each byte we wait for 8 cycles of the SPI clock.
1453 * Since speed is defined in Hz and we want milliseconds,
1454 * use respective multiplier, but before the division,
1455 * otherwise we may get 0 for short transfers.
1456 */
1457 ms = 8LL * MSEC_PER_SEC * xfer->len;
6170d077 1458 do_div(ms, speed_hz);
810923f3 1459
86b8bff7
AS
1460 /*
1461 * Increase it twice and add 200 ms tolerance, use
1462 * predefined maximum in case of overflow.
1463 */
1464 ms += ms + 200;
810923f3
LR
1465 if (ms > UINT_MAX)
1466 ms = UINT_MAX;
1467
1468 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1469 msecs_to_jiffies(ms));
1470
1471 if (ms == 0) {
1472 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1473 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1474 dev_err(&msg->spi->dev,
1475 "SPI transfer timed out\n");
1476 return -ETIMEDOUT;
1477 }
39cefd85
NC
1478
1479 if (xfer->error & SPI_TRANS_FAIL_IO)
1480 return -EIO;
810923f3
LR
1481 }
1482
1483 return 0;
1484}
1485
0ff2de8b
MS
1486static void _spi_transfer_delay_ns(u32 ns)
1487{
1488 if (!ns)
1489 return;
86b8bff7 1490 if (ns <= NSEC_PER_USEC) {
0ff2de8b
MS
1491 ndelay(ns);
1492 } else {
86b8bff7 1493 u32 us = DIV_ROUND_UP(ns, NSEC_PER_USEC);
0ff2de8b
MS
1494
1495 if (us <= 10)
1496 udelay(us);
1497 else
1498 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1499 }
1500}
1501
3984d39b 1502int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1503{
b2c98153
AA
1504 u32 delay = _delay->value;
1505 u32 unit = _delay->unit;
d5864e5b 1506 u32 hz;
0ff2de8b 1507
b2c98153
AA
1508 if (!delay)
1509 return 0;
0ff2de8b
MS
1510
1511 switch (unit) {
1512 case SPI_DELAY_UNIT_USECS:
86b8bff7 1513 delay *= NSEC_PER_USEC;
0ff2de8b 1514 break;
86b8bff7
AS
1515 case SPI_DELAY_UNIT_NSECS:
1516 /* Nothing to do here */
0ff2de8b 1517 break;
d5864e5b 1518 case SPI_DELAY_UNIT_SCK:
95c8222f 1519 /* Clock cycles need to be obtained from spi_transfer */
b2c98153
AA
1520 if (!xfer)
1521 return -EINVAL;
86b8bff7
AS
1522 /*
1523 * If there is unknown effective speed, approximate it
702ca026 1524 * by underestimating with half of the requested Hz.
d5864e5b
MS
1525 */
1526 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA
1527 if (!hz)
1528 return -EINVAL;
86b8bff7
AS
1529
1530 /* Convert delay to nanoseconds */
1531 delay *= DIV_ROUND_UP(NSEC_PER_SEC, hz);
d5864e5b 1532 break;
0ff2de8b 1533 default:
b2c98153
AA
1534 return -EINVAL;
1535 }
1536
1537 return delay;
1538}
3984d39b 1539EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA
1540
1541int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1542{
1543 int delay;
1544
8fede89f
MB
1545 might_sleep();
1546
b2c98153
AA
1547 if (!_delay)
1548 return -EINVAL;
1549
3984d39b 1550 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA
1551 if (delay < 0)
1552 return delay;
1553
1554 _spi_transfer_delay_ns(delay);
1555
1556 return 0;
1557}
1558EXPORT_SYMBOL_GPL(spi_delay_exec);
1559
0ff2de8b
MS
1560static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1561 struct spi_transfer *xfer)
1562{
86b8bff7 1563 u32 default_delay_ns = 10 * NSEC_PER_USEC;
329f0dac
AA
1564 u32 delay = xfer->cs_change_delay.value;
1565 u32 unit = xfer->cs_change_delay.unit;
1566 int ret;
0ff2de8b 1567
95c8222f 1568 /* Return early on "fast" mode - for everything but USECS */
6b3f236a
AA
1569 if (!delay) {
1570 if (unit == SPI_DELAY_UNIT_USECS)
86b8bff7 1571 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1572 return;
6b3f236a 1573 }
0ff2de8b 1574
329f0dac
AA
1575 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1576 if (ret) {
0ff2de8b 1577 dev_err_once(&msg->spi->dev,
86b8bff7
AS
1578 "Use of unsupported delay unit %i, using default of %luus\n",
1579 unit, default_delay_ns / NSEC_PER_USEC);
1580 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1581 }
0ff2de8b
MS
1582}
1583
6e80133a
WZ
1584void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
1585 struct spi_transfer *xfer)
1586{
1587 _spi_transfer_cs_change_delay(msg, xfer);
1588}
1589EXPORT_SYMBOL_GPL(spi_transfer_cs_change_delay_exec);
1590
b158935f
MB
1591/*
1592 * spi_transfer_one_message - Default implementation of transfer_one_message()
1593 *
1594 * This is a standard implementation of transfer_one_message() for
8ba811a7 1595 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1596 * standard handling of delays and chip select management.
1597 */
8caab75f 1598static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1599 struct spi_message *msg)
1600{
1601 struct spi_transfer *xfer;
b158935f
MB
1602 bool keep_cs = false;
1603 int ret = 0;
d501cc4c
DJ
1604 struct spi_statistics __percpu *statm = ctlr->pcpu_statistics;
1605 struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics;
b158935f 1606
5e0531f6
CL
1607 xfer = list_first_entry(&msg->transfers, struct spi_transfer, transfer_list);
1608 spi_set_cs(msg->spi, !xfer->cs_off, false);
b158935f 1609
eca2ebc7
MS
1610 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1611 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1612
b158935f
MB
1613 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1614 trace_spi_transfer_start(msg, xfer);
1615
8caab75f
GU
1616 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1617 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1618
b42faeee
VO
1619 if (!ctlr->ptp_sts_supported) {
1620 xfer->ptp_sts_word_pre = 0;
1621 ptp_read_system_prets(xfer->ptp_sts);
1622 }
1623
b3063203 1624 if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) {
8caab75f 1625 reinit_completion(&ctlr->xfer_completion);
b158935f 1626
809b1b04 1627fallback_pio:
0c17ba73 1628 spi_dma_sync_for_device(ctlr, xfer);
8caab75f 1629 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1630 if (ret < 0) {
0c17ba73
VW
1631 spi_dma_sync_for_cpu(ctlr, xfer);
1632
809b1b04
RG
1633 if (ctlr->cur_msg_mapped &&
1634 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1635 __spi_unmap_msg(ctlr, msg);
1636 ctlr->fallback = true;
1637 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1638 goto fallback_pio;
1639 }
1640
eca2ebc7
MS
1641 SPI_STATISTICS_INCREMENT_FIELD(statm,
1642 errors);
1643 SPI_STATISTICS_INCREMENT_FIELD(stats,
1644 errors);
38ec10f6
MB
1645 dev_err(&msg->spi->dev,
1646 "SPI transfer failed: %d\n", ret);
1647 goto out;
1648 }
b158935f 1649
d57e7960
MB
1650 if (ret > 0) {
1651 ret = spi_transfer_wait(ctlr, msg, xfer);
1652 if (ret < 0)
1653 msg->status = ret;
1654 }
0c17ba73
VW
1655
1656 spi_dma_sync_for_cpu(ctlr, xfer);
38ec10f6
MB
1657 } else {
1658 if (xfer->len)
1659 dev_err(&msg->spi->dev,
1660 "Bufferless transfer has length %u\n",
1661 xfer->len);
13a42798 1662 }
b158935f 1663
b42faeee
VO
1664 if (!ctlr->ptp_sts_supported) {
1665 ptp_read_system_postts(xfer->ptp_sts);
1666 xfer->ptp_sts_word_post = xfer->len;
1667 }
1668
b158935f
MB
1669 trace_spi_transfer_stop(msg, xfer);
1670
1671 if (msg->status != -EINPROGRESS)
1672 goto out;
1673
bebcfd27 1674 spi_transfer_delay_exec(xfer);
b158935f
MB
1675
1676 if (xfer->cs_change) {
1677 if (list_is_last(&xfer->transfer_list,
1678 &msg->transfers)) {
1679 keep_cs = true;
1680 } else {
5e0531f6
CL
1681 if (!xfer->cs_off)
1682 spi_set_cs(msg->spi, false, false);
0ff2de8b 1683 _spi_transfer_cs_change_delay(msg, xfer);
5e0531f6
CL
1684 if (!list_next_entry(xfer, transfer_list)->cs_off)
1685 spi_set_cs(msg->spi, true, false);
b158935f 1686 }
5e0531f6
CL
1687 } else if (!list_is_last(&xfer->transfer_list, &msg->transfers) &&
1688 xfer->cs_off != list_next_entry(xfer, transfer_list)->cs_off) {
1689 spi_set_cs(msg->spi, xfer->cs_off, false);
b158935f
MB
1690 }
1691
1692 msg->actual_length += xfer->len;
1693 }
1694
1695out:
1696 if (ret != 0 || !keep_cs)
d347b4aa 1697 spi_set_cs(msg->spi, false, false);
b158935f
MB
1698
1699 if (msg->status == -EINPROGRESS)
1700 msg->status = ret;
1701
8caab75f
GU
1702 if (msg->status && ctlr->handle_err)
1703 ctlr->handle_err(ctlr, msg);
b716c4ff 1704
0ed56252
MB
1705 spi_finalize_current_message(ctlr);
1706
b158935f
MB
1707 return ret;
1708}
1709
1710/**
1711 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1712 * @ctlr: the controller reporting completion
b158935f
MB
1713 *
1714 * Called by SPI drivers using the core transfer_one_message()
1715 * implementation to notify it that the current interrupt driven
9e8f4882 1716 * transfer has finished and the next one may be scheduled.
b158935f 1717 */
8caab75f 1718void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1719{
8caab75f 1720 complete(&ctlr->xfer_completion);
b158935f
MB
1721}
1722EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1723
e1268597
MB
1724static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1725{
1726 if (ctlr->auto_runtime_pm) {
1727 pm_runtime_mark_last_busy(ctlr->dev.parent);
1728 pm_runtime_put_autosuspend(ctlr->dev.parent);
1729 }
1730}
1731
ae7d2346
DJ
1732static int __spi_pump_transfer_message(struct spi_controller *ctlr,
1733 struct spi_message *msg, bool was_busy)
1734{
1735 struct spi_transfer *xfer;
1736 int ret;
1737
1738 if (!was_busy && ctlr->auto_runtime_pm) {
1739 ret = pm_runtime_get_sync(ctlr->dev.parent);
1740 if (ret < 0) {
1741 pm_runtime_put_noidle(ctlr->dev.parent);
1742 dev_err(&ctlr->dev, "Failed to power device: %d\n",
1743 ret);
8c2ae772
DL
1744
1745 msg->status = ret;
1746 spi_finalize_current_message(ctlr);
1747
ae7d2346
DJ
1748 return ret;
1749 }
1750 }
1751
1752 if (!was_busy)
1753 trace_spi_controller_busy(ctlr);
1754
1755 if (!was_busy && ctlr->prepare_transfer_hardware) {
1756 ret = ctlr->prepare_transfer_hardware(ctlr);
1757 if (ret) {
1758 dev_err(&ctlr->dev,
1759 "failed to prepare transfer hardware: %d\n",
1760 ret);
1761
1762 if (ctlr->auto_runtime_pm)
1763 pm_runtime_put(ctlr->dev.parent);
1764
1765 msg->status = ret;
1766 spi_finalize_current_message(ctlr);
1767
1768 return ret;
1769 }
1770 }
1771
1772 trace_spi_message_start(msg);
1773
1774 if (ctlr->prepare_message) {
1775 ret = ctlr->prepare_message(ctlr, msg);
1776 if (ret) {
1777 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1778 ret);
1779 msg->status = ret;
1780 spi_finalize_current_message(ctlr);
1781 return ret;
1782 }
1783 msg->prepared = true;
1784 }
1785
1786 ret = spi_map_msg(ctlr, msg);
1787 if (ret) {
1788 msg->status = ret;
1789 spi_finalize_current_message(ctlr);
1790 return ret;
1791 }
1792
1793 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1794 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1795 xfer->ptp_sts_word_pre = 0;
1796 ptp_read_system_prets(xfer->ptp_sts);
1797 }
1798 }
1799
dc302905
DJ
1800 /*
1801 * Drivers implementation of transfer_one_message() must arrange for
1802 * spi_finalize_current_message() to get called. Most drivers will do
1803 * this in the calling context, but some don't. For those cases, a
1804 * completion is used to guarantee that this function does not return
1805 * until spi_finalize_current_message() is done accessing
1806 * ctlr->cur_msg.
1807 * Use of the following two flags enable to opportunistically skip the
1808 * use of the completion since its use involves expensive spin locks.
1809 * In case of a race with the context that calls
1810 * spi_finalize_current_message() the completion will always be used,
1811 * due to strict ordering of these flags using barriers.
1812 */
1813 WRITE_ONCE(ctlr->cur_msg_incomplete, true);
1814 WRITE_ONCE(ctlr->cur_msg_need_completion, false);
69fa9590 1815 reinit_completion(&ctlr->cur_msg_completion);
95c8222f 1816 smp_wmb(); /* Make these available to spi_finalize_current_message() */
dc302905 1817
ae7d2346
DJ
1818 ret = ctlr->transfer_one_message(ctlr, msg);
1819 if (ret) {
1820 dev_err(&ctlr->dev,
1821 "failed to transfer one message from queue\n");
1822 return ret;
1823 }
1824
31d4c1bd
DJ
1825 WRITE_ONCE(ctlr->cur_msg_need_completion, true);
1826 smp_mb(); /* See spi_finalize_current_message()... */
1827 if (READ_ONCE(ctlr->cur_msg_incomplete))
1828 wait_for_completion(&ctlr->cur_msg_completion);
1829
ae7d2346
DJ
1830 return 0;
1831}
1832
ffbbdd21 1833/**
702ca026 1834 * __spi_pump_messages - function which processes SPI message queue
8caab75f 1835 * @ctlr: controller to process queue for
fc9e0f71 1836 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21 1837 *
702ca026 1838 * This function checks if there is any SPI message in the queue that
ffbbdd21
LW
1839 * needs processing and if so call out to the driver to initialize hardware
1840 * and transfer each message.
1841 *
0461a414
MB
1842 * Note that it is called both from the kthread itself and also from
1843 * inside spi_sync(); the queue extraction handling at the top of the
1844 * function should deal with this safely.
ffbbdd21 1845 */
8caab75f 1846static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1847{
d1c44c93 1848 struct spi_message *msg;
ffbbdd21 1849 bool was_busy = false;
d1c44c93 1850 unsigned long flags;
ffbbdd21
LW
1851 int ret;
1852
702ca026 1853 /* Take the I/O mutex */
c1038165
DJ
1854 mutex_lock(&ctlr->io_mutex);
1855
983aee5d 1856 /* Lock queue */
8caab75f 1857 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1858
1859 /* Make sure we are not already running a message */
8711a2ab 1860 if (ctlr->cur_msg)
c1038165 1861 goto out_unlock;
983aee5d
MB
1862
1863 /* Check if the queue is idle */
8caab75f 1864 if (list_empty(&ctlr->queue) || !ctlr->running) {
8711a2ab 1865 if (!ctlr->busy)
c1038165 1866 goto out_unlock;
fc9e0f71 1867
e1268597 1868 /* Defer any non-atomic teardown to the thread */
f0125f1a 1869 if (!in_kthread) {
e1268597
MB
1870 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1871 !ctlr->unprepare_transfer_hardware) {
1872 spi_idle_runtime_pm(ctlr);
1873 ctlr->busy = false;
ae7d2346 1874 ctlr->queue_empty = true;
e1268597
MB
1875 trace_spi_controller_idle(ctlr);
1876 } else {
1877 kthread_queue_work(ctlr->kworker,
1878 &ctlr->pump_messages);
1879 }
c1038165 1880 goto out_unlock;
f0125f1a
MB
1881 }
1882
1883 ctlr->busy = false;
f0125f1a
MB
1884 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1885
1886 kfree(ctlr->dummy_rx);
1887 ctlr->dummy_rx = NULL;
1888 kfree(ctlr->dummy_tx);
1889 ctlr->dummy_tx = NULL;
1890 if (ctlr->unprepare_transfer_hardware &&
1891 ctlr->unprepare_transfer_hardware(ctlr))
1892 dev_err(&ctlr->dev,
1893 "failed to unprepare transfer hardware\n");
e1268597 1894 spi_idle_runtime_pm(ctlr);
f0125f1a
MB
1895 trace_spi_controller_idle(ctlr);
1896
1897 spin_lock_irqsave(&ctlr->queue_lock, flags);
ae7d2346 1898 ctlr->queue_empty = true;
c1038165 1899 goto out_unlock;
ffbbdd21 1900 }
ffbbdd21 1901
ffbbdd21 1902 /* Extract head of queue */
d1c44c93
VO
1903 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1904 ctlr->cur_msg = msg;
ffbbdd21 1905
d1c44c93 1906 list_del_init(&msg->queue);
8caab75f 1907 if (ctlr->busy)
ffbbdd21
LW
1908 was_busy = true;
1909 else
8caab75f
GU
1910 ctlr->busy = true;
1911 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1912
ae7d2346 1913 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
9c9c9da7 1914 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
c191543e 1915
69fa9590
DJ
1916 ctlr->cur_msg = NULL;
1917 ctlr->fallback = false;
1918
8caab75f 1919 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1920
1921 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1922 if (!ret)
1923 cond_resched();
c1038165
DJ
1924 return;
1925
1926out_unlock:
8711a2ab 1927 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
c1038165 1928 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1929}
1930
fc9e0f71
MB
1931/**
1932 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1933 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1934 */
1935static void spi_pump_messages(struct kthread_work *work)
1936{
8caab75f
GU
1937 struct spi_controller *ctlr =
1938 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1939
8caab75f 1940 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1941}
1942
b42faeee 1943/**
350de7ce 1944 * spi_take_timestamp_pre - helper to collect the beginning of the TX timestamp
b42faeee
VO
1945 * @ctlr: Pointer to the spi_controller structure of the driver
1946 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1947 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1948 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1949 * transfer, for less jitter in time measurement. Only compatible
1950 * with PIO drivers. If true, must follow up with
1951 * spi_take_timestamp_post or otherwise system will crash.
1952 * WARNING: for fully predictable results, the CPU frequency must
1953 * also be under control (governor).
350de7ce
AS
1954 *
1955 * This is a helper for drivers to collect the beginning of the TX timestamp
1956 * for the requested byte from the SPI transfer. The frequency with which this
1957 * function must be called (once per word, once for the whole transfer, once
1958 * per batch of words etc) is arbitrary as long as the @tx buffer offset is
1959 * greater than or equal to the requested byte at the time of the call. The
1960 * timestamp is only taken once, at the first such call. It is assumed that
1961 * the driver advances its @tx buffer pointer monotonically.
b42faeee
VO
1962 */
1963void spi_take_timestamp_pre(struct spi_controller *ctlr,
1964 struct spi_transfer *xfer,
862dd2a9 1965 size_t progress, bool irqs_off)
b42faeee 1966{
b42faeee
VO
1967 if (!xfer->ptp_sts)
1968 return;
1969
6a726824 1970 if (xfer->timestamped)
b42faeee
VO
1971 return;
1972
6a726824 1973 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO
1974 return;
1975
1976 /* Capture the resolution of the timestamp */
862dd2a9 1977 xfer->ptp_sts_word_pre = progress;
b42faeee 1978
b42faeee
VO
1979 if (irqs_off) {
1980 local_irq_save(ctlr->irq_flags);
1981 preempt_disable();
1982 }
1983
1984 ptp_read_system_prets(xfer->ptp_sts);
1985}
1986EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1987
1988/**
350de7ce 1989 * spi_take_timestamp_post - helper to collect the end of the TX timestamp
b42faeee
VO
1990 * @ctlr: Pointer to the spi_controller structure of the driver
1991 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1992 * @progress: How many words (not bytes) have been transferred so far
b42faeee 1993 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
350de7ce
AS
1994 *
1995 * This is a helper for drivers to collect the end of the TX timestamp for
1996 * the requested byte from the SPI transfer. Can be called with an arbitrary
1997 * frequency: only the first call where @tx exceeds or is equal to the
1998 * requested word will be timestamped.
b42faeee
VO
1999 */
2000void spi_take_timestamp_post(struct spi_controller *ctlr,
2001 struct spi_transfer *xfer,
862dd2a9 2002 size_t progress, bool irqs_off)
b42faeee 2003{
b42faeee
VO
2004 if (!xfer->ptp_sts)
2005 return;
2006
6a726824 2007 if (xfer->timestamped)
b42faeee
VO
2008 return;
2009
862dd2a9 2010 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO
2011 return;
2012
2013 ptp_read_system_postts(xfer->ptp_sts);
2014
2015 if (irqs_off) {
2016 local_irq_restore(ctlr->irq_flags);
2017 preempt_enable();
2018 }
2019
2020 /* Capture the resolution of the timestamp */
862dd2a9 2021 xfer->ptp_sts_word_post = progress;
b42faeee 2022
9d77522b 2023 xfer->timestamped = 1;
b42faeee
VO
2024}
2025EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
2026
924b5867
DA
2027/**
2028 * spi_set_thread_rt - set the controller to pump at realtime priority
2029 * @ctlr: controller to boost priority of
2030 *
2031 * This can be called because the controller requested realtime priority
2032 * (by setting the ->rt value before calling spi_register_controller()) or
2033 * because a device on the bus said that its transfers needed realtime
2034 * priority.
2035 *
2036 * NOTE: at the moment if any device on a bus says it needs realtime then
2037 * the thread will be at realtime priority for all transfers on that
2038 * controller. If this eventually becomes a problem we may see if we can
2039 * find a way to boost the priority only temporarily during relevant
2040 * transfers.
2041 */
2042static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 2043{
924b5867
DA
2044 dev_info(&ctlr->dev,
2045 "will run message pump with realtime priority\n");
6d2b84a4 2046 sched_set_fifo(ctlr->kworker->task);
924b5867
DA
2047}
2048
2049static int spi_init_queue(struct spi_controller *ctlr)
2050{
8caab75f
GU
2051 ctlr->running = false;
2052 ctlr->busy = false;
ae7d2346 2053 ctlr->queue_empty = true;
ffbbdd21 2054
60a883d1
MS
2055 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
2056 if (IS_ERR(ctlr->kworker)) {
2057 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
2058 return PTR_ERR(ctlr->kworker);
ffbbdd21 2059 }
60a883d1 2060
8caab75f 2061 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 2062
ffbbdd21 2063 /*
8caab75f 2064 * Controller config will indicate if this controller should run the
ffbbdd21
LW
2065 * message pump with high (realtime) priority to reduce the transfer
2066 * latency on the bus by minimising the delay between a transfer
2067 * request and the scheduling of the message pump thread. Without this
2068 * setting the message pump thread will remain at default priority.
2069 */
924b5867
DA
2070 if (ctlr->rt)
2071 spi_set_thread_rt(ctlr);
ffbbdd21
LW
2072
2073 return 0;
2074}
2075
2076/**
2077 * spi_get_next_queued_message() - called by driver to check for queued
2078 * messages
8caab75f 2079 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
2080 *
2081 * If there are more messages in the queue, the next message is returned from
2082 * this call.
97d56dc6
JMC
2083 *
2084 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 2085 */
8caab75f 2086struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
2087{
2088 struct spi_message *next;
2089 unsigned long flags;
2090
95c8222f 2091 /* Get a pointer to the next message, if any */
8caab75f
GU
2092 spin_lock_irqsave(&ctlr->queue_lock, flags);
2093 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 2094 queue);
8caab75f 2095 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2096
2097 return next;
2098}
2099EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
2100
7b1d87af
DL
2101/*
2102 * __spi_unoptimize_message - shared implementation of spi_unoptimize_message()
2103 * and spi_maybe_unoptimize_message()
2104 * @msg: the message to unoptimize
2105 *
2106 * Peripheral drivers should use spi_unoptimize_message() and callers inside
2107 * core should use spi_maybe_unoptimize_message() rather than calling this
2108 * function directly.
2109 *
2110 * It is not valid to call this on a message that is not currently optimized.
2111 */
2112static void __spi_unoptimize_message(struct spi_message *msg)
2113{
2114 struct spi_controller *ctlr = msg->spi->controller;
2115
2116 if (ctlr->unoptimize_message)
2117 ctlr->unoptimize_message(msg);
2118
fab53fea
DL
2119 spi_res_release(ctlr, msg);
2120
7b1d87af
DL
2121 msg->optimized = false;
2122 msg->opt_state = NULL;
2123}
2124
2125/*
2126 * spi_maybe_unoptimize_message - unoptimize msg not managed by a peripheral
2127 * @msg: the message to unoptimize
2128 *
2129 * This function is used to unoptimize a message if and only if it was
2130 * optimized by the core (via spi_maybe_optimize_message()).
2131 */
2132static void spi_maybe_unoptimize_message(struct spi_message *msg)
2133{
2134 if (!msg->pre_optimized && msg->optimized)
2135 __spi_unoptimize_message(msg);
2136}
2137
ffbbdd21
LW
2138/**
2139 * spi_finalize_current_message() - the current message is complete
8caab75f 2140 * @ctlr: the controller to return the message to
ffbbdd21
LW
2141 *
2142 * Called by the driver to notify the core that the message in the front of the
2143 * queue is complete and can be removed from the queue.
2144 */
8caab75f 2145void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 2146{
b42faeee 2147 struct spi_transfer *xfer;
ffbbdd21 2148 struct spi_message *mesg;
2841a5fc 2149 int ret;
ffbbdd21 2150
8caab75f 2151 mesg = ctlr->cur_msg;
ffbbdd21 2152
b42faeee
VO
2153 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
2154 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
2155 ptp_read_system_postts(xfer->ptp_sts);
2156 xfer->ptp_sts_word_post = xfer->len;
2157 }
2158 }
2159
6a726824
VO
2160 if (unlikely(ctlr->ptp_sts_supported))
2161 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
2162 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 2163
8caab75f 2164 spi_unmap_msg(ctlr, mesg);
99adef31 2165
1714582a 2166 if (mesg->prepared && ctlr->unprepare_message) {
8caab75f 2167 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 2168 if (ret) {
8caab75f
GU
2169 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
2170 ret);
2841a5fc
MB
2171 }
2172 }
391949b6 2173
1714582a
DJ
2174 mesg->prepared = false;
2175
7b1d87af
DL
2176 spi_maybe_unoptimize_message(mesg);
2177
dc302905
DJ
2178 WRITE_ONCE(ctlr->cur_msg_incomplete, false);
2179 smp_mb(); /* See __spi_pump_transfer_message()... */
2180 if (READ_ONCE(ctlr->cur_msg_need_completion))
2181 complete(&ctlr->cur_msg_completion);
8e76ef88
MS
2182
2183 trace_spi_message_done(mesg);
2841a5fc 2184
ffbbdd21
LW
2185 mesg->state = NULL;
2186 if (mesg->complete)
2187 mesg->complete(mesg->context);
2188}
2189EXPORT_SYMBOL_GPL(spi_finalize_current_message);
2190
8caab75f 2191static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2192{
2193 unsigned long flags;
2194
8caab75f 2195 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2196
8caab75f
GU
2197 if (ctlr->running || ctlr->busy) {
2198 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2199 return -EBUSY;
2200 }
2201
8caab75f
GU
2202 ctlr->running = true;
2203 ctlr->cur_msg = NULL;
2204 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 2205
60a883d1 2206 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
2207
2208 return 0;
2209}
2210
8caab75f 2211static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2212{
2213 unsigned long flags;
2214 unsigned limit = 500;
2215 int ret = 0;
2216
8caab75f 2217 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
2218
2219 /*
2220 * This is a bit lame, but is optimized for the common execution path.
8caab75f 2221 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
2222 * execution path (pump_messages) would be required to call wake_up or
2223 * friends on every SPI message. Do this instead.
2224 */
8caab75f
GU
2225 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
2226 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 2227 usleep_range(10000, 11000);
8caab75f 2228 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
2229 }
2230
8caab75f 2231 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
2232 ret = -EBUSY;
2233 else
8caab75f 2234 ctlr->running = false;
ffbbdd21 2235
8caab75f 2236 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 2237
ffbbdd21
LW
2238 return ret;
2239}
2240
8caab75f 2241static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2242{
2243 int ret;
2244
8caab75f 2245 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
2246
2247 /*
3989144f 2248 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
2249 * If the reason that stop_queue timed out is that the work will never
2250 * finish, then it does no good to call flush/stop thread, so
2251 * return anyway.
2252 */
2253 if (ret) {
8caab75f 2254 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
2255 return ret;
2256 }
2257
60a883d1 2258 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW
2259
2260 return 0;
2261}
2262
0461a414
MB
2263static int __spi_queued_transfer(struct spi_device *spi,
2264 struct spi_message *msg,
2265 bool need_pump)
ffbbdd21 2266{
8caab75f 2267 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
2268 unsigned long flags;
2269
8caab75f 2270 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2271
8caab75f
GU
2272 if (!ctlr->running) {
2273 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2274 return -ESHUTDOWN;
2275 }
2276 msg->actual_length = 0;
2277 msg->status = -EINPROGRESS;
2278
8caab75f 2279 list_add_tail(&msg->queue, &ctlr->queue);
ae7d2346 2280 ctlr->queue_empty = false;
f0125f1a 2281 if (!ctlr->busy && need_pump)
60a883d1 2282 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 2283
8caab75f 2284 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2285 return 0;
2286}
2287
0461a414
MB
2288/**
2289 * spi_queued_transfer - transfer function for queued transfers
702ca026
AS
2290 * @spi: SPI device which is requesting transfer
2291 * @msg: SPI message which is to handled is queued to driver queue
97d56dc6
JMC
2292 *
2293 * Return: zero on success, else a negative error code.
0461a414
MB
2294 */
2295static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
2296{
2297 return __spi_queued_transfer(spi, msg, true);
2298}
2299
8caab75f 2300static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2301{
2302 int ret;
2303
8caab75f
GU
2304 ctlr->transfer = spi_queued_transfer;
2305 if (!ctlr->transfer_one_message)
2306 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
2307
2308 /* Initialize and start queue */
8caab75f 2309 ret = spi_init_queue(ctlr);
ffbbdd21 2310 if (ret) {
8caab75f 2311 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
2312 goto err_init_queue;
2313 }
8caab75f
GU
2314 ctlr->queued = true;
2315 ret = spi_start_queue(ctlr);
ffbbdd21 2316 if (ret) {
8caab75f 2317 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
2318 goto err_start_queue;
2319 }
2320
2321 return 0;
2322
2323err_start_queue:
8caab75f 2324 spi_destroy_queue(ctlr);
c3676d5c 2325err_init_queue:
ffbbdd21
LW
2326 return ret;
2327}
2328
988f259b
BB
2329/**
2330 * spi_flush_queue - Send all pending messages in the queue from the callers'
2331 * context
2332 * @ctlr: controller to process queue for
2333 *
2334 * This should be used when one wants to ensure all pending messages have been
2335 * sent before doing something. Is used by the spi-mem code to make sure SPI
2336 * memory operations do not preempt regular SPI transfers that have been queued
2337 * before the spi-mem operation.
2338 */
2339void spi_flush_queue(struct spi_controller *ctlr)
2340{
2341 if (ctlr->transfer == spi_queued_transfer)
2342 __spi_pump_messages(ctlr, false);
2343}
2344
ffbbdd21
LW
2345/*-------------------------------------------------------------------------*/
2346
7cb94361 2347#if defined(CONFIG_OF)
f276aacf
JG
2348static void of_spi_parse_dt_cs_delay(struct device_node *nc,
2349 struct spi_delay *delay, const char *prop)
2350{
2351 u32 value;
2352
2353 if (!of_property_read_u32(nc, prop, &value)) {
2354 if (value > U16_MAX) {
2355 delay->value = DIV_ROUND_UP(value, 1000);
2356 delay->unit = SPI_DELAY_UNIT_USECS;
2357 } else {
2358 delay->value = value;
2359 delay->unit = SPI_DELAY_UNIT_NSECS;
2360 }
2361 }
2362}
2363
8caab75f 2364static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 2365 struct device_node *nc)
aff5e3f8 2366{
4d8ff6b0
AKM
2367 u32 value, cs[SPI_CS_CNT_MAX];
2368 int rc, idx;
aff5e3f8 2369
aff5e3f8 2370 /* Mode (clock phase/polarity/etc.) */
e0bcb680 2371 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 2372 spi->mode |= SPI_CPHA;
e0bcb680 2373 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 2374 spi->mode |= SPI_CPOL;
e0bcb680 2375 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 2376 spi->mode |= SPI_3WIRE;
e0bcb680 2377 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 2378 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 2379 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW
2380 spi->mode |= SPI_CS_HIGH;
2381
aff5e3f8
PA
2382 /* Device DUAL/QUAD mode */
2383 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
2384 switch (value) {
d962608c
DB
2385 case 0:
2386 spi->mode |= SPI_NO_TX;
2387 break;
aff5e3f8
PA
2388 case 1:
2389 break;
2390 case 2:
2391 spi->mode |= SPI_TX_DUAL;
2392 break;
2393 case 4:
2394 spi->mode |= SPI_TX_QUAD;
2395 break;
6b03061f
YNG
2396 case 8:
2397 spi->mode |= SPI_TX_OCTAL;
2398 break;
aff5e3f8 2399 default:
8caab75f 2400 dev_warn(&ctlr->dev,
aff5e3f8
PA
2401 "spi-tx-bus-width %d not supported\n",
2402 value);
2403 break;
2404 }
2405 }
2406
2407 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
2408 switch (value) {
d962608c
DB
2409 case 0:
2410 spi->mode |= SPI_NO_RX;
2411 break;
aff5e3f8
PA
2412 case 1:
2413 break;
2414 case 2:
2415 spi->mode |= SPI_RX_DUAL;
2416 break;
2417 case 4:
2418 spi->mode |= SPI_RX_QUAD;
2419 break;
6b03061f
YNG
2420 case 8:
2421 spi->mode |= SPI_RX_OCTAL;
2422 break;
aff5e3f8 2423 default:
8caab75f 2424 dev_warn(&ctlr->dev,
aff5e3f8
PA
2425 "spi-rx-bus-width %d not supported\n",
2426 value);
2427 break;
2428 }
2429 }
2430
8caab75f 2431 if (spi_controller_is_slave(ctlr)) {
194276b0 2432 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
2433 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
2434 nc);
6c364062
GU
2435 return -EINVAL;
2436 }
2437 return 0;
2438 }
2439
4d8ff6b0
AKM
2440 if (ctlr->num_chipselect > SPI_CS_CNT_MAX) {
2441 dev_err(&ctlr->dev, "No. of CS is more than max. no. of supported CS\n");
2442 return -EINVAL;
2443 }
2444
5ee91605 2445 spi_set_all_cs_unused(spi);
4d8ff6b0 2446
6c364062 2447 /* Device address */
4d8ff6b0
AKM
2448 rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1,
2449 SPI_CS_CNT_MAX);
2450 if (rc < 0) {
25c56c88
RH
2451 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
2452 nc, rc);
6c364062
GU
2453 return rc;
2454 }
4d8ff6b0
AKM
2455 if (rc > ctlr->num_chipselect) {
2456 dev_err(&ctlr->dev, "%pOF has number of CS > ctlr->num_chipselect (%d)\n",
2457 nc, rc);
2458 return rc;
2459 }
2460 if ((of_property_read_bool(nc, "parallel-memories")) &&
2461 (!(ctlr->flags & SPI_CONTROLLER_MULTI_CS))) {
2462 dev_err(&ctlr->dev, "SPI controller doesn't support multi CS\n");
2463 return -EINVAL;
2464 }
2465 for (idx = 0; idx < rc; idx++)
2466 spi_set_chipselect(spi, idx, cs[idx]);
2467
2468 /*
1209c556
AS
2469 * By default spi->chip_select[0] will hold the physical CS number,
2470 * so set bit 0 in spi->cs_index_mask.
4d8ff6b0 2471 */
1209c556 2472 spi->cs_index_mask = BIT(0);
6c364062 2473
aff5e3f8 2474 /* Device speed */
671c3bf5
CG
2475 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
2476 spi->max_speed_hz = value;
aff5e3f8 2477
f276aacf
JG
2478 /* Device CS delays */
2479 of_spi_parse_dt_cs_delay(nc, &spi->cs_setup, "spi-cs-setup-delay-ns");
5827b31d
JG
2480 of_spi_parse_dt_cs_delay(nc, &spi->cs_hold, "spi-cs-hold-delay-ns");
2481 of_spi_parse_dt_cs_delay(nc, &spi->cs_inactive, "spi-cs-inactive-delay-ns");
33a2fde5 2482
c2e51ac3
GU
2483 return 0;
2484}
2485
2486static struct spi_device *
8caab75f 2487of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
2488{
2489 struct spi_device *spi;
2490 int rc;
2491
2492 /* Alloc an spi_device */
8caab75f 2493 spi = spi_alloc_device(ctlr);
c2e51ac3 2494 if (!spi) {
25c56c88 2495 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
2496 rc = -ENOMEM;
2497 goto err_out;
2498 }
2499
2500 /* Select device driver */
673aa1ed
MR
2501 rc = of_alias_from_compatible(nc, spi->modalias,
2502 sizeof(spi->modalias));
c2e51ac3 2503 if (rc < 0) {
25c56c88 2504 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
2505 goto err_out;
2506 }
2507
8caab75f 2508 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
2509 if (rc)
2510 goto err_out;
2511
aff5e3f8
PA
2512 /* Store a pointer to the node in the device structure */
2513 of_node_get(nc);
c7cc588b
AS
2514
2515 device_set_node(&spi->dev, of_fwnode_handle(nc));
aff5e3f8
PA
2516
2517 /* Register the new device */
aff5e3f8
PA
2518 rc = spi_add_device(spi);
2519 if (rc) {
25c56c88 2520 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2521 goto err_of_node_put;
aff5e3f8
PA
2522 }
2523
2524 return spi;
2525
8324147f
JH
2526err_of_node_put:
2527 of_node_put(nc);
aff5e3f8
PA
2528err_out:
2529 spi_dev_put(spi);
2530 return ERR_PTR(rc);
2531}
2532
d57a4282
GL
2533/**
2534 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2535 * @ctlr: Pointer to spi_controller device
d57a4282 2536 *
6c364062
GU
2537 * Registers an spi_device for each child node of controller node which
2538 * represents a valid SPI slave.
d57a4282 2539 */
8caab75f 2540static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
2541{
2542 struct spi_device *spi;
2543 struct device_node *nc;
d57a4282 2544
8caab75f 2545 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
2546 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2547 continue;
8caab75f 2548 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2549 if (IS_ERR(spi)) {
8caab75f 2550 dev_warn(&ctlr->dev,
25c56c88 2551 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
2552 of_node_clear_flag(nc, OF_POPULATED);
2553 }
d57a4282
GL
2554 }
2555}
2556#else
8caab75f 2557static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
2558#endif
2559
0c79378c
SR
2560/**
2561 * spi_new_ancillary_device() - Register ancillary SPI device
2562 * @spi: Pointer to the main SPI device registering the ancillary device
2563 * @chip_select: Chip Select of the ancillary device
2564 *
2565 * Register an ancillary SPI device; for example some chips have a chip-select
2566 * for normal device usage and another one for setup/firmware upload.
2567 *
2568 * This may only be called from main SPI device's probe routine.
2569 *
2570 * Return: 0 on success; negative errno on failure
2571 */
2572struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
2573 u8 chip_select)
2574{
7b5c6a54 2575 struct spi_controller *ctlr = spi->controller;
0c79378c
SR
2576 struct spi_device *ancillary;
2577 int rc = 0;
2578
2579 /* Alloc an spi_device */
7b5c6a54 2580 ancillary = spi_alloc_device(ctlr);
0c79378c
SR
2581 if (!ancillary) {
2582 rc = -ENOMEM;
2583 goto err_out;
2584 }
2585
51e99de5 2586 strscpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
0c79378c
SR
2587
2588 /* Use provided chip-select for ancillary device */
5ee91605 2589 spi_set_all_cs_unused(ancillary);
303feb3c 2590 spi_set_chipselect(ancillary, 0, chip_select);
0c79378c
SR
2591
2592 /* Take over SPI mode/speed from SPI main device */
2593 ancillary->max_speed_hz = spi->max_speed_hz;
b01d5506 2594 ancillary->mode = spi->mode;
4d8ff6b0 2595 /*
1209c556
AS
2596 * By default spi->chip_select[0] will hold the physical CS number,
2597 * so set bit 0 in spi->cs_index_mask.
4d8ff6b0 2598 */
1209c556 2599 ancillary->cs_index_mask = BIT(0);
0c79378c 2600
7b5c6a54
AS
2601 WARN_ON(!mutex_is_locked(&ctlr->add_lock));
2602
0c79378c 2603 /* Register the new device */
7b5c6a54 2604 rc = __spi_add_device(ancillary);
0c79378c
SR
2605 if (rc) {
2606 dev_err(&spi->dev, "failed to register ancillary device\n");
2607 goto err_out;
2608 }
2609
2610 return ancillary;
2611
2612err_out:
2613 spi_dev_put(ancillary);
2614 return ERR_PTR(rc);
2615}
2616EXPORT_SYMBOL_GPL(spi_new_ancillary_device);
2617
64bee4d2 2618#ifdef CONFIG_ACPI
4c3c5954
AB
2619struct acpi_spi_lookup {
2620 struct spi_controller *ctlr;
2621 u32 max_speed_hz;
2622 u32 mode;
2623 int irq;
2624 u8 bits_per_word;
2625 u8 chip_select;
87e59b36
SB
2626 int n;
2627 int index;
4c3c5954
AB
2628};
2629
e612af7a
SB
2630static int acpi_spi_count(struct acpi_resource *ares, void *data)
2631{
2632 struct acpi_resource_spi_serialbus *sb;
2633 int *count = data;
2634
2635 if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
2636 return 1;
2637
2638 sb = &ares->data.spi_serial_bus;
2639 if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_SPI)
2640 return 1;
2641
2642 *count = *count + 1;
2643
2644 return 1;
2645}
2646
2647/**
2648 * acpi_spi_count_resources - Count the number of SpiSerialBus resources
2649 * @adev: ACPI device
2650 *
702ca026 2651 * Return: the number of SpiSerialBus resources in the ACPI-device's
e612af7a
SB
2652 * resource-list; or a negative error code.
2653 */
2654int acpi_spi_count_resources(struct acpi_device *adev)
2655{
2656 LIST_HEAD(r);
2657 int count = 0;
2658 int ret;
2659
2660 ret = acpi_dev_get_resources(adev, &r, acpi_spi_count, &count);
2661 if (ret < 0)
2662 return ret;
2663
2664 acpi_dev_free_resource_list(&r);
2665
2666 return count;
2667}
2668EXPORT_SYMBOL_GPL(acpi_spi_count_resources);
2669
4c3c5954
AB
2670static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2671 struct acpi_spi_lookup *lookup)
8a2e487e 2672{
8a2e487e
LW
2673 const union acpi_object *obj;
2674
2675 if (!x86_apple_machine)
2676 return;
2677
2678 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2679 && obj->buffer.length >= 4)
4c3c5954 2680 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW
2681
2682 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2683 && obj->buffer.length == 8)
4c3c5954 2684 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW
2685
2686 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2687 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2688 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW
2689
2690 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2691 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2692 lookup->mode |= SPI_CPOL;
8a2e487e
LW
2693
2694 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2695 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2696 lookup->mode |= SPI_CPHA;
8a2e487e
LW
2697}
2698
64bee4d2
MW
2699static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2700{
4c3c5954
AB
2701 struct acpi_spi_lookup *lookup = data;
2702 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW
2703
2704 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2705 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB
2706 acpi_handle parent_handle;
2707 acpi_status status;
64bee4d2
MW
2708
2709 sb = &ares->data.spi_serial_bus;
2710 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954 2711
87e59b36
SB
2712 if (lookup->index != -1 && lookup->n++ != lookup->index)
2713 return 1;
2714
4c3c5954
AB
2715 status = acpi_get_handle(NULL,
2716 sb->resource_source.string_ptr,
2717 &parent_handle);
2718
87e59b36 2719 if (ACPI_FAILURE(status))
4c3c5954
AB
2720 return -ENODEV;
2721
87e59b36
SB
2722 if (ctlr) {
2723 if (ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2724 return -ENODEV;
2725 } else {
2726 struct acpi_device *adev;
2727
ac2a3fee
RW
2728 adev = acpi_fetch_acpi_dev(parent_handle);
2729 if (!adev)
87e59b36
SB
2730 return -ENODEV;
2731
2732 ctlr = acpi_spi_find_controller_by_adev(adev);
2733 if (!ctlr)
9c22ec4a 2734 return -EPROBE_DEFER;
87e59b36
SB
2735
2736 lookup->ctlr = ctlr;
2737 }
2738
a0a90718
MW
2739 /*
2740 * ACPI DeviceSelection numbering is handled by the
2741 * host controller driver in Windows and can vary
2742 * from driver to driver. In Linux we always expect
2743 * 0 .. max - 1 so we need to ask the driver to
2744 * translate between the two schemes.
2745 */
8caab75f
GU
2746 if (ctlr->fw_translate_cs) {
2747 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
2748 sb->device_selection);
2749 if (cs < 0)
2750 return cs;
4c3c5954 2751 lookup->chip_select = cs;
a0a90718 2752 } else {
4c3c5954 2753 lookup->chip_select = sb->device_selection;
a0a90718
MW
2754 }
2755
4c3c5954 2756 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2757 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW
2758
2759 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2760 lookup->mode |= SPI_CPHA;
64bee4d2 2761 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2762 lookup->mode |= SPI_CPOL;
64bee4d2 2763 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2764 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2765 }
4c3c5954 2766 } else if (lookup->irq < 0) {
64bee4d2
MW
2767 struct resource r;
2768
2769 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2770 lookup->irq = r.start;
64bee4d2
MW
2771 }
2772
2773 /* Always tell the ACPI core to skip this resource */
2774 return 1;
2775}
2776
000bee0e
SB
2777/**
2778 * acpi_spi_device_alloc - Allocate a spi device, and fill it in with ACPI information
2779 * @ctlr: controller to which the spi device belongs
2780 * @adev: ACPI Device for the spi device
87e59b36 2781 * @index: Index of the spi resource inside the ACPI Node
000bee0e 2782 *
702ca026
AS
2783 * This should be used to allocate a new SPI device from and ACPI Device node.
2784 * The caller is responsible for calling spi_add_device to register the SPI device.
000bee0e 2785 *
702ca026 2786 * If ctlr is set to NULL, the Controller for the SPI device will be looked up
87e59b36
SB
2787 * using the resource.
2788 * If index is set to -1, index is not used.
2789 * Note: If index is -1, ctlr must be set.
2790 *
000bee0e
SB
2791 * Return: a pointer to the new device, or ERR_PTR on error.
2792 */
2793struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
87e59b36
SB
2794 struct acpi_device *adev,
2795 int index)
64bee4d2 2796{
4c3c5954 2797 acpi_handle parent_handle = NULL;
64bee4d2 2798 struct list_head resource_list;
b28944c6 2799 struct acpi_spi_lookup lookup = {};
64bee4d2
MW
2800 struct spi_device *spi;
2801 int ret;
2802
87e59b36
SB
2803 if (!ctlr && index == -1)
2804 return ERR_PTR(-EINVAL);
2805
4c3c5954 2806 lookup.ctlr = ctlr;
4c3c5954 2807 lookup.irq = -1;
87e59b36
SB
2808 lookup.index = index;
2809 lookup.n = 0;
64bee4d2
MW
2810
2811 INIT_LIST_HEAD(&resource_list);
2812 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2813 acpi_spi_add_resource, &lookup);
64bee4d2
MW
2814 acpi_dev_free_resource_list(&resource_list);
2815
4c3c5954 2816 if (ret < 0)
95c8222f 2817 /* Found SPI in _CRS but it points to another controller */
b6747f4f 2818 return ERR_PTR(ret);
8a2e487e 2819
4c3c5954 2820 if (!lookup.max_speed_hz &&
10e92724 2821 ACPI_SUCCESS(acpi_get_parent(adev->handle, &parent_handle)) &&
87e59b36 2822 ACPI_HANDLE(lookup.ctlr->dev.parent) == parent_handle) {
4c3c5954
AB
2823 /* Apple does not use _CRS but nested devices for SPI slaves */
2824 acpi_spi_parse_apple_properties(adev, &lookup);
2825 }
2826
2827 if (!lookup.max_speed_hz)
000bee0e 2828 return ERR_PTR(-ENODEV);
4c3c5954 2829
87e59b36 2830 spi = spi_alloc_device(lookup.ctlr);
4c3c5954 2831 if (!spi) {
87e59b36 2832 dev_err(&lookup.ctlr->dev, "failed to allocate SPI device for %s\n",
4c3c5954 2833 dev_name(&adev->dev));
000bee0e 2834 return ERR_PTR(-ENOMEM);
64bee4d2
MW
2835 }
2836
5ee91605
AS
2837 spi_set_all_cs_unused(spi);
2838 spi_set_chipselect(spi, 0, lookup.chip_select);
4d8ff6b0 2839
4c3c5954
AB
2840 ACPI_COMPANION_SET(&spi->dev, adev);
2841 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2842 spi->mode |= lookup.mode;
4c3c5954
AB
2843 spi->irq = lookup.irq;
2844 spi->bits_per_word = lookup.bits_per_word;
4d8ff6b0 2845 /*
1209c556
AS
2846 * By default spi->chip_select[0] will hold the physical CS number,
2847 * so set bit 0 in spi->cs_index_mask.
4d8ff6b0 2848 */
1209c556 2849 spi->cs_index_mask = BIT(0);
4c3c5954 2850
000bee0e
SB
2851 return spi;
2852}
2853EXPORT_SYMBOL_GPL(acpi_spi_device_alloc);
2854
2855static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
2856 struct acpi_device *adev)
2857{
2858 struct spi_device *spi;
2859
2860 if (acpi_bus_get_status(adev) || !adev->status.present ||
2861 acpi_device_enumerated(adev))
2862 return AE_OK;
2863
87e59b36 2864 spi = acpi_spi_device_alloc(ctlr, adev, -1);
000bee0e
SB
2865 if (IS_ERR(spi)) {
2866 if (PTR_ERR(spi) == -ENOMEM)
2867 return AE_NO_MEMORY;
2868 else
2869 return AE_OK;
2870 }
2871
0c6543f6
DD
2872 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2873 sizeof(spi->modalias));
2874
33ada67d
CR
2875 if (spi->irq < 0)
2876 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2877
7f24467f
OP
2878 acpi_device_set_enumerated(adev);
2879
33cf00e5 2880 adev->power.flags.ignore_parent = true;
64bee4d2 2881 if (spi_add_device(spi)) {
33cf00e5 2882 adev->power.flags.ignore_parent = false;
8caab75f 2883 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
2884 dev_name(&adev->dev));
2885 spi_dev_put(spi);
2886 }
2887
2888 return AE_OK;
2889}
2890
7f24467f
OP
2891static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2892 void *data, void **return_value)
2893{
7030c428 2894 struct acpi_device *adev = acpi_fetch_acpi_dev(handle);
8caab75f 2895 struct spi_controller *ctlr = data;
7f24467f 2896
7030c428 2897 if (!adev)
7f24467f
OP
2898 return AE_OK;
2899
8caab75f 2900 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
2901}
2902
4c3c5954
AB
2903#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2904
8caab75f 2905static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
2906{
2907 acpi_status status;
2908 acpi_handle handle;
2909
8caab75f 2910 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
2911 if (!handle)
2912 return;
2913
4c3c5954
AB
2914 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2915 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2916 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2917 if (ACPI_FAILURE(status))
8caab75f 2918 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
2919}
2920#else
8caab75f 2921static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
2922#endif /* CONFIG_ACPI */
2923
8caab75f 2924static void spi_controller_release(struct device *dev)
8ae12a0d 2925{
8caab75f 2926 struct spi_controller *ctlr;
8ae12a0d 2927
8caab75f
GU
2928 ctlr = container_of(dev, struct spi_controller, dev);
2929 kfree(ctlr);
8ae12a0d
DB
2930}
2931
2932static struct class spi_master_class = {
2933 .name = "spi_master",
8caab75f 2934 .dev_release = spi_controller_release,
eca2ebc7 2935 .dev_groups = spi_master_groups,
8ae12a0d
DB
2936};
2937
6c364062
GU
2938#ifdef CONFIG_SPI_SLAVE
2939/**
2940 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2941 * controller
2942 * @spi: device used for the current transfer
2943 */
2944int spi_slave_abort(struct spi_device *spi)
2945{
8caab75f 2946 struct spi_controller *ctlr = spi->controller;
6c364062 2947
8caab75f
GU
2948 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2949 return ctlr->slave_abort(ctlr);
6c364062
GU
2950
2951 return -ENOTSUPP;
2952}
2953EXPORT_SYMBOL_GPL(spi_slave_abort);
2954
b8d3b056
YY
2955int spi_target_abort(struct spi_device *spi)
2956{
2957 struct spi_controller *ctlr = spi->controller;
2958
2959 if (spi_controller_is_target(ctlr) && ctlr->target_abort)
2960 return ctlr->target_abort(ctlr);
2961
2962 return -ENOTSUPP;
2963}
2964EXPORT_SYMBOL_GPL(spi_target_abort);
2965
cc8b4659
GU
2966static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2967 char *buf)
6c364062 2968{
8caab75f
GU
2969 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2970 dev);
6c364062
GU
2971 struct device *child;
2972
c21b0837 2973 child = device_find_any_child(&ctlr->dev);
f2daa466 2974 return sysfs_emit(buf, "%s\n", child ? to_spi_device(child)->modalias : NULL);
6c364062
GU
2975}
2976
cc8b4659
GU
2977static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2978 const char *buf, size_t count)
6c364062 2979{
8caab75f
GU
2980 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2981 dev);
6c364062
GU
2982 struct spi_device *spi;
2983 struct device *child;
2984 char name[32];
2985 int rc;
2986
2987 rc = sscanf(buf, "%31s", name);
2988 if (rc != 1 || !name[0])
2989 return -EINVAL;
2990
c21b0837 2991 child = device_find_any_child(&ctlr->dev);
6c364062
GU
2992 if (child) {
2993 /* Remove registered slave */
2994 device_unregister(child);
2995 put_device(child);
2996 }
2997
2998 if (strcmp(name, "(null)")) {
2999 /* Register new slave */
3000 spi = spi_alloc_device(ctlr);
3001 if (!spi)
3002 return -ENOMEM;
3003
51e99de5 3004 strscpy(spi->modalias, name, sizeof(spi->modalias));
6c364062
GU
3005
3006 rc = spi_add_device(spi);
3007 if (rc) {
3008 spi_dev_put(spi);
3009 return rc;
3010 }
3011 }
3012
3013 return count;
3014}
3015
cc8b4659 3016static DEVICE_ATTR_RW(slave);
6c364062
GU
3017
3018static struct attribute *spi_slave_attrs[] = {
3019 &dev_attr_slave.attr,
3020 NULL,
3021};
3022
3023static const struct attribute_group spi_slave_group = {
3024 .attrs = spi_slave_attrs,
3025};
3026
3027static const struct attribute_group *spi_slave_groups[] = {
8caab75f 3028 &spi_controller_statistics_group,
6c364062
GU
3029 &spi_slave_group,
3030 NULL,
3031};
3032
3033static struct class spi_slave_class = {
3034 .name = "spi_slave",
8caab75f 3035 .dev_release = spi_controller_release,
6c364062
GU
3036 .dev_groups = spi_slave_groups,
3037};
3038#else
3039extern struct class spi_slave_class; /* dummy */
3040#endif
8ae12a0d
DB
3041
3042/**
6c364062 3043 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 3044 * @dev: the controller, possibly using the platform_bus
33e34dc6 3045 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW
3046 * memory is in the driver_data field of the returned device, accessible
3047 * with spi_controller_get_devdata(); the memory is cacheline aligned;
3048 * drivers granting DMA access to portions of their private data need to
3049 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU
3050 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
3051 * slave (true) controller
33e34dc6 3052 * Context: can sleep
8ae12a0d 3053 *
6c364062 3054 * This call is used only by SPI controller drivers, which are the
8ae12a0d 3055 * only ones directly touching chip registers. It's how they allocate
8caab75f 3056 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 3057 *
97d56dc6 3058 * This must be called from context that can sleep.
8ae12a0d 3059 *
6c364062 3060 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
3061 * controller's methods before calling spi_register_controller(); and (after
3062 * errors adding the device) calling spi_controller_put() to prevent a memory
3063 * leak.
97d56dc6 3064 *
6c364062 3065 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 3066 */
8caab75f
GU
3067struct spi_controller *__spi_alloc_controller(struct device *dev,
3068 unsigned int size, bool slave)
8ae12a0d 3069{
8caab75f 3070 struct spi_controller *ctlr;
229e6af1 3071 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 3072
0c868461
DB
3073 if (!dev)
3074 return NULL;
3075
229e6af1 3076 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 3077 if (!ctlr)
8ae12a0d
DB
3078 return NULL;
3079
8caab75f 3080 device_initialize(&ctlr->dev);
16a8e2fb
UKK
3081 INIT_LIST_HEAD(&ctlr->queue);
3082 spin_lock_init(&ctlr->queue_lock);
3083 spin_lock_init(&ctlr->bus_lock_spinlock);
3084 mutex_init(&ctlr->bus_lock_mutex);
3085 mutex_init(&ctlr->io_mutex);
3086 mutex_init(&ctlr->add_lock);
8caab75f
GU
3087 ctlr->bus_num = -1;
3088 ctlr->num_chipselect = 1;
3089 ctlr->slave = slave;
6c364062 3090 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 3091 ctlr->dev.class = &spi_slave_class;
6c364062 3092 else
8caab75f
GU
3093 ctlr->dev.class = &spi_master_class;
3094 ctlr->dev.parent = dev;
3095 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 3096 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 3097
8caab75f 3098 return ctlr;
8ae12a0d 3099}
6c364062 3100EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 3101
5e844cc3
LW
3102static void devm_spi_release_controller(struct device *dev, void *ctlr)
3103{
3104 spi_controller_put(*(struct spi_controller **)ctlr);
3105}
3106
3107/**
3108 * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller()
3109 * @dev: physical device of SPI controller
3110 * @size: how much zeroed driver-private data to allocate
3111 * @slave: whether to allocate an SPI master (false) or SPI slave (true)
3112 * Context: can sleep
3113 *
3114 * Allocate an SPI controller and automatically release a reference on it
3115 * when @dev is unbound from its driver. Drivers are thus relieved from
3116 * having to call spi_controller_put().
3117 *
3118 * The arguments to this function are identical to __spi_alloc_controller().
3119 *
3120 * Return: the SPI controller structure on success, else NULL.
3121 */
3122struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
3123 unsigned int size,
3124 bool slave)
3125{
3126 struct spi_controller **ptr, *ctlr;
3127
3128 ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr),
3129 GFP_KERNEL);
3130 if (!ptr)
3131 return NULL;
3132
3133 ctlr = __spi_alloc_controller(dev, size, slave);
3134 if (ctlr) {
794aaf01 3135 ctlr->devm_allocated = true;
5e844cc3
LW
3136 *ptr = ctlr;
3137 devres_add(dev, ptr);
3138 } else {
3139 devres_free(ptr);
3140 }
3141
3142 return ctlr;
3143}
3144EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller);
3145
f3186dd8
LW
3146/**
3147 * spi_get_gpio_descs() - grab chip select GPIOs for the master
3148 * @ctlr: The SPI master to grab GPIO descriptors for
3149 */
3150static int spi_get_gpio_descs(struct spi_controller *ctlr)
3151{
3152 int nb, i;
3153 struct gpio_desc **cs;
3154 struct device *dev = &ctlr->dev;
7d93aecd
GU
3155 unsigned long native_cs_mask = 0;
3156 unsigned int num_cs_gpios = 0;
f3186dd8
LW
3157
3158 nb = gpiod_count(dev, "cs");
31ed8ebc
AS
3159 if (nb < 0) {
3160 /* No GPIOs at all is fine, else return the error */
3161 if (nb == -ENOENT)
3162 return 0;
f3186dd8 3163 return nb;
31ed8ebc
AS
3164 }
3165
3166 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
f3186dd8
LW
3167
3168 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
3169 GFP_KERNEL);
3170 if (!cs)
3171 return -ENOMEM;
3172 ctlr->cs_gpiods = cs;
3173
3174 for (i = 0; i < nb; i++) {
3175 /*
3176 * Most chipselects are active low, the inverted
3177 * semantics are handled by special quirks in gpiolib,
3178 * so initializing them GPIOD_OUT_LOW here means
3179 * "unasserted", in most cases this will drive the physical
3180 * line high.
3181 */
3182 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
3183 GPIOD_OUT_LOW);
1723fdec
GU
3184 if (IS_ERR(cs[i]))
3185 return PTR_ERR(cs[i]);
f3186dd8
LW
3186
3187 if (cs[i]) {
3188 /*
3189 * If we find a CS GPIO, name it after the device and
3190 * chip select line.
3191 */
3192 char *gpioname;
3193
3194 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
3195 dev_name(dev), i);
3196 if (!gpioname)
3197 return -ENOMEM;
3198 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU
3199 num_cs_gpios++;
3200 continue;
f3186dd8 3201 }
7d93aecd
GU
3202
3203 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
3204 dev_err(dev, "Invalid native chip select %d\n", i);
3205 return -EINVAL;
f3186dd8 3206 }
7d93aecd
GU
3207 native_cs_mask |= BIT(i);
3208 }
3209
f60d7270 3210 ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
dbaca8e5 3211
82238d2c 3212 if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
dbaca8e5 3213 ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
7d93aecd
GU
3214 dev_err(dev, "No unused native chip select available\n");
3215 return -EINVAL;
f3186dd8
LW
3216 }
3217
3218 return 0;
3219}
3220
bdf3a3b5
BB
3221static int spi_controller_check_ops(struct spi_controller *ctlr)
3222{
3223 /*
b5932f5c
BB
3224 * The controller may implement only the high-level SPI-memory like
3225 * operations if it does not support regular SPI transfers, and this is
3226 * valid use case.
76a85704
WZ
3227 * If ->mem_ops or ->mem_ops->exec_op is NULL, we request that at least
3228 * one of the ->transfer_xxx() method be implemented.
bdf3a3b5 3229 */
20064c47 3230 if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
76a85704 3231 if (!ctlr->transfer && !ctlr->transfer_one &&
b5932f5c 3232 !ctlr->transfer_one_message) {
76a85704
WZ
3233 return -EINVAL;
3234 }
b5932f5c 3235 }
bdf3a3b5
BB
3236
3237 return 0;
3238}
3239
440c4733
AS
3240/* Allocate dynamic bus number using Linux idr */
3241static int spi_controller_id_alloc(struct spi_controller *ctlr, int start, int end)
3242{
3243 int id;
3244
3245 mutex_lock(&board_lock);
3246 id = idr_alloc(&spi_master_idr, ctlr, start, end, GFP_KERNEL);
3247 mutex_unlock(&board_lock);
3248 if (WARN(id < 0, "couldn't get idr"))
3249 return id == -ENOSPC ? -EBUSY : id;
3250 ctlr->bus_num = id;
3251 return 0;
3252}
3253
8ae12a0d 3254/**
8caab75f
GU
3255 * spi_register_controller - register SPI master or slave controller
3256 * @ctlr: initialized master, originally from spi_alloc_master() or
3257 * spi_alloc_slave()
33e34dc6 3258 * Context: can sleep
8ae12a0d 3259 *
8caab75f 3260 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 3261 * such as the platform bus. The final stage of probe() in that code
8caab75f 3262 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
3263 *
3264 * SPI controllers use board specific (often SOC specific) bus numbers,
3265 * and board-specific addressing for SPI devices combines those numbers
3266 * with chip select numbers. Since SPI does not directly support dynamic
3267 * device identification, boards need configuration tables telling which
3268 * chip is at which address.
3269 *
3270 * This must be called from context that can sleep. It returns zero on
8caab75f 3271 * success, else a negative error code (dropping the controller's refcount).
0c868461 3272 * After a successful return, the caller is responsible for calling
8caab75f 3273 * spi_unregister_controller().
97d56dc6
JMC
3274 *
3275 * Return: zero on success, else a negative error code.
8ae12a0d 3276 */
8caab75f 3277int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 3278{
8caab75f 3279 struct device *dev = ctlr->dev.parent;
2b9603a0 3280 struct boardinfo *bi;
440c4733 3281 int first_dynamic;
b93318a2 3282 int status;
4d8ff6b0 3283 int idx;
8ae12a0d 3284
0c868461
DB
3285 if (!dev)
3286 return -ENODEV;
3287
bdf3a3b5
BB
3288 /*
3289 * Make sure all necessary hooks are implemented before registering
3290 * the SPI controller.
3291 */
3292 status = spi_controller_check_ops(ctlr);
3293 if (status)
3294 return status;
3295
440c4733
AS
3296 if (ctlr->bus_num < 0)
3297 ctlr->bus_num = of_alias_get_id(ctlr->dev.of_node, "spi");
04b2d03a 3298 if (ctlr->bus_num >= 0) {
95c8222f 3299 /* Devices with a fixed bus num must check-in with the num */
440c4733
AS
3300 status = spi_controller_id_alloc(ctlr, ctlr->bus_num, ctlr->bus_num + 1);
3301 if (status)
3302 return status;
9b61e302 3303 }
8caab75f 3304 if (ctlr->bus_num < 0) {
42bdd706
LS
3305 first_dynamic = of_alias_get_highest_id("spi");
3306 if (first_dynamic < 0)
3307 first_dynamic = 0;
3308 else
3309 first_dynamic++;
3310
440c4733
AS
3311 status = spi_controller_id_alloc(ctlr, first_dynamic, 0);
3312 if (status)
3313 return status;
8ae12a0d 3314 }
8caab75f
GU
3315 ctlr->bus_lock_flag = 0;
3316 init_completion(&ctlr->xfer_completion);
69fa9590 3317 init_completion(&ctlr->cur_msg_completion);
8caab75f
GU
3318 if (!ctlr->max_dma_len)
3319 ctlr->max_dma_len = INT_MAX;
cf32b71e 3320
350de7ce
AS
3321 /*
3322 * Register the device, then userspace will see it.
3323 * Registration fails if the bus ID is in use.
8ae12a0d 3324 */
8caab75f 3325 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4 3326
f48dc6b9
LW
3327 if (!spi_controller_is_slave(ctlr) && ctlr->use_gpio_descriptors) {
3328 status = spi_get_gpio_descs(ctlr);
3329 if (status)
3330 goto free_bus_id;
3331 /*
3332 * A controller using GPIO descriptors always
3333 * supports SPI_CS_HIGH if need be.
3334 */
3335 ctlr->mode_bits |= SPI_CS_HIGH;
0a919ae4
AS
3336 }
3337
f9481b08
TA
3338 /*
3339 * Even if it's just one always-selected device, there must
3340 * be at least one chipselect.
3341 */
f9981d4f
AK
3342 if (!ctlr->num_chipselect) {
3343 status = -EINVAL;
3344 goto free_bus_id;
3345 }
f9481b08 3346
be84be4a 3347 /* Setting last_cs to SPI_INVALID_CS means no chip selected */
4d8ff6b0 3348 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
be84be4a 3349 ctlr->last_cs[idx] = SPI_INVALID_CS;
6bb477df 3350
8caab75f 3351 status = device_add(&ctlr->dev);
f9981d4f
AK
3352 if (status < 0)
3353 goto free_bus_id;
9b61e302 3354 dev_dbg(dev, "registered %s %s\n",
8caab75f 3355 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 3356 dev_name(&ctlr->dev));
8ae12a0d 3357
b5932f5c
BB
3358 /*
3359 * If we're using a queued driver, start the queue. Note that we don't
3360 * need the queueing logic if the driver is only supporting high-level
3361 * memory operations.
3362 */
3363 if (ctlr->transfer) {
8caab75f 3364 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 3365 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 3366 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 3367 if (status) {
8caab75f 3368 device_del(&ctlr->dev);
f9981d4f 3369 goto free_bus_id;
ffbbdd21
LW
3370 }
3371 }
95c8222f 3372 /* Add statistics */
6598b91b
DJ
3373 ctlr->pcpu_statistics = spi_alloc_pcpu_stats(dev);
3374 if (!ctlr->pcpu_statistics) {
3375 dev_err(dev, "Error allocating per-cpu statistics\n");
d52b095b 3376 status = -ENOMEM;
6598b91b
DJ
3377 goto destroy_queue;
3378 }
ffbbdd21 3379
2b9603a0 3380 mutex_lock(&board_lock);
8caab75f 3381 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 3382 list_for_each_entry(bi, &board_list, list)
8caab75f 3383 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
3384 mutex_unlock(&board_lock);
3385
64bee4d2 3386 /* Register devices from the device tree and ACPI */
8caab75f
GU
3387 of_register_spi_devices(ctlr);
3388 acpi_register_spi_devices(ctlr);
f9981d4f
AK
3389 return status;
3390
6598b91b
DJ
3391destroy_queue:
3392 spi_destroy_queue(ctlr);
f9981d4f
AK
3393free_bus_id:
3394 mutex_lock(&board_lock);
3395 idr_remove(&spi_master_idr, ctlr->bus_num);
3396 mutex_unlock(&board_lock);
8ae12a0d
DB
3397 return status;
3398}
8caab75f 3399EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 3400
43cc5a0a 3401static void devm_spi_unregister(struct device *dev, void *res)
666d5b4c 3402{
43cc5a0a 3403 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB
3404}
3405
3406/**
8caab75f
GU
3407 * devm_spi_register_controller - register managed SPI master or slave
3408 * controller
3409 * @dev: device managing SPI controller
3410 * @ctlr: initialized controller, originally from spi_alloc_master() or
3411 * spi_alloc_slave()
666d5b4c
MB
3412 * Context: can sleep
3413 *
8caab75f 3414 * Register a SPI device as with spi_register_controller() which will
68b892f1 3415 * automatically be unregistered and freed.
97d56dc6
JMC
3416 *
3417 * Return: zero on success, else a negative error code.
666d5b4c 3418 */
8caab75f
GU
3419int devm_spi_register_controller(struct device *dev,
3420 struct spi_controller *ctlr)
666d5b4c 3421{
43cc5a0a 3422 struct spi_controller **ptr;
666d5b4c
MB
3423 int ret;
3424
43cc5a0a
YY
3425 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
3426 if (!ptr)
3427 return -ENOMEM;
3428
8caab75f 3429 ret = spi_register_controller(ctlr);
43cc5a0a
YY
3430 if (!ret) {
3431 *ptr = ctlr;
3432 devres_add(dev, ptr);
3433 } else {
3434 devres_free(ptr);
3435 }
666d5b4c 3436
43cc5a0a 3437 return ret;
666d5b4c 3438}
8caab75f 3439EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 3440
34860089 3441static int __unregister(struct device *dev, void *null)
8ae12a0d 3442{
34860089 3443 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
3444 return 0;
3445}
3446
3447/**
8caab75f
GU
3448 * spi_unregister_controller - unregister SPI master or slave controller
3449 * @ctlr: the controller being unregistered
33e34dc6 3450 * Context: can sleep
8ae12a0d 3451 *
8caab75f 3452 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
3453 * only ones directly touching chip registers.
3454 *
3455 * This must be called from context that can sleep.
68b892f1
JH
3456 *
3457 * Note that this function also drops a reference to the controller.
8ae12a0d 3458 */
8caab75f 3459void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 3460{
9b61e302 3461 struct spi_controller *found;
67f7b278 3462 int id = ctlr->bus_num;
89fc9a1a 3463
ddf75be4
LW
3464 /* Prevent addition of new devices, unregister existing ones */
3465 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3466 mutex_lock(&ctlr->add_lock);
ddf75be4 3467
84855678
LW
3468 device_for_each_child(&ctlr->dev, NULL, __unregister);
3469
9b61e302
SM
3470 /* First make sure that this controller was ever added */
3471 mutex_lock(&board_lock);
67f7b278 3472 found = idr_find(&spi_master_idr, id);
9b61e302 3473 mutex_unlock(&board_lock);
8caab75f
GU
3474 if (ctlr->queued) {
3475 if (spi_destroy_queue(ctlr))
3476 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 3477 }
2b9603a0 3478 mutex_lock(&board_lock);
8caab75f 3479 list_del(&ctlr->list);
2b9603a0
FT
3480 mutex_unlock(&board_lock);
3481
5e844cc3
LW
3482 device_del(&ctlr->dev);
3483
95c8222f 3484 /* Free bus id */
9b61e302 3485 mutex_lock(&board_lock);
613bd1ea
JN
3486 if (found == ctlr)
3487 idr_remove(&spi_master_idr, id);
9b61e302 3488 mutex_unlock(&board_lock);
ddf75be4
LW
3489
3490 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3491 mutex_unlock(&ctlr->add_lock);
6c53b45c 3492
702ca026
AS
3493 /*
3494 * Release the last reference on the controller if its driver
6c53b45c
MW
3495 * has not yet been converted to devm_spi_alloc_master/slave().
3496 */
3497 if (!ctlr->devm_allocated)
3498 put_device(&ctlr->dev);
8ae12a0d 3499}
8caab75f 3500EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 3501
bef4a48f
MH
3502static inline int __spi_check_suspended(const struct spi_controller *ctlr)
3503{
3504 return ctlr->flags & SPI_CONTROLLER_SUSPENDED ? -ESHUTDOWN : 0;
3505}
3506
3507static inline void __spi_mark_suspended(struct spi_controller *ctlr)
3508{
3509 mutex_lock(&ctlr->bus_lock_mutex);
3510 ctlr->flags |= SPI_CONTROLLER_SUSPENDED;
3511 mutex_unlock(&ctlr->bus_lock_mutex);
3512}
3513
3514static inline void __spi_mark_resumed(struct spi_controller *ctlr)
3515{
3516 mutex_lock(&ctlr->bus_lock_mutex);
3517 ctlr->flags &= ~SPI_CONTROLLER_SUSPENDED;
3518 mutex_unlock(&ctlr->bus_lock_mutex);
3519}
3520
8caab75f 3521int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21 3522{
bef4a48f 3523 int ret = 0;
ffbbdd21 3524
8caab75f 3525 /* Basically no-ops for non-queued controllers */
bef4a48f
MH
3526 if (ctlr->queued) {
3527 ret = spi_stop_queue(ctlr);
3528 if (ret)
3529 dev_err(&ctlr->dev, "queue stop failed\n");
3530 }
ffbbdd21 3531
bef4a48f 3532 __spi_mark_suspended(ctlr);
ffbbdd21
LW
3533 return ret;
3534}
8caab75f 3535EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 3536
8caab75f 3537int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21 3538{
bef4a48f 3539 int ret = 0;
ffbbdd21 3540
bef4a48f 3541 __spi_mark_resumed(ctlr);
ffbbdd21 3542
bef4a48f
MH
3543 if (ctlr->queued) {
3544 ret = spi_start_queue(ctlr);
3545 if (ret)
3546 dev_err(&ctlr->dev, "queue restart failed\n");
3547 }
ffbbdd21
LW
3548 return ret;
3549}
8caab75f 3550EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 3551
8ae12a0d
DB
3552/*-------------------------------------------------------------------------*/
3553
523baf5a
MS
3554/* Core methods for spi_message alterations */
3555
8caab75f 3556static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
3557 struct spi_message *msg,
3558 void *res)
3559{
3560 struct spi_replaced_transfers *rxfer = res;
3561 size_t i;
3562
95c8222f 3563 /* Call extra callback if requested */
523baf5a 3564 if (rxfer->release)
8caab75f 3565 rxfer->release(ctlr, msg, res);
523baf5a 3566
95c8222f 3567 /* Insert replaced transfers back into the message */
523baf5a
MS
3568 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
3569
95c8222f 3570 /* Remove the formerly inserted entries */
523baf5a
MS
3571 for (i = 0; i < rxfer->inserted; i++)
3572 list_del(&rxfer->inserted_transfers[i].transfer_list);
3573}
3574
3575/**
3576 * spi_replace_transfers - replace transfers with several transfers
3577 * and register change with spi_message.resources
3578 * @msg: the spi_message we work upon
3579 * @xfer_first: the first spi_transfer we want to replace
3580 * @remove: number of transfers to remove
3581 * @insert: the number of transfers we want to insert instead
3582 * @release: extra release code necessary in some circumstances
3583 * @extradatasize: extra data to allocate (with alignment guarantees
3584 * of struct @spi_transfer)
05885397 3585 * @gfp: gfp flags
523baf5a
MS
3586 *
3587 * Returns: pointer to @spi_replaced_transfers,
3588 * PTR_ERR(...) in case of errors.
3589 */
da21fde0 3590static struct spi_replaced_transfers *spi_replace_transfers(
523baf5a
MS
3591 struct spi_message *msg,
3592 struct spi_transfer *xfer_first,
3593 size_t remove,
3594 size_t insert,
3595 spi_replaced_release_t release,
3596 size_t extradatasize,
3597 gfp_t gfp)
3598{
3599 struct spi_replaced_transfers *rxfer;
3600 struct spi_transfer *xfer;
3601 size_t i;
3602
95c8222f 3603 /* Allocate the structure using spi_res */
523baf5a 3604 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3605 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS
3606 + extradatasize,
3607 gfp);
3608 if (!rxfer)
3609 return ERR_PTR(-ENOMEM);
3610
95c8222f 3611 /* The release code to invoke before running the generic release */
523baf5a
MS
3612 rxfer->release = release;
3613
95c8222f 3614 /* Assign extradata */
523baf5a
MS
3615 if (extradatasize)
3616 rxfer->extradata =
3617 &rxfer->inserted_transfers[insert];
3618
95c8222f 3619 /* Init the replaced_transfers list */
523baf5a
MS
3620 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3621
350de7ce
AS
3622 /*
3623 * Assign the list_entry after which we should reinsert
523baf5a
MS
3624 * the @replaced_transfers - it may be spi_message.messages!
3625 */
3626 rxfer->replaced_after = xfer_first->transfer_list.prev;
3627
95c8222f 3628 /* Remove the requested number of transfers */
523baf5a 3629 for (i = 0; i < remove; i++) {
350de7ce
AS
3630 /*
3631 * If the entry after replaced_after it is msg->transfers
523baf5a 3632 * then we have been requested to remove more transfers
350de7ce 3633 * than are in the list.
523baf5a
MS
3634 */
3635 if (rxfer->replaced_after->next == &msg->transfers) {
3636 dev_err(&msg->spi->dev,
3637 "requested to remove more spi_transfers than are available\n");
95c8222f 3638 /* Insert replaced transfers back into the message */
523baf5a
MS
3639 list_splice(&rxfer->replaced_transfers,
3640 rxfer->replaced_after);
3641
95c8222f 3642 /* Free the spi_replace_transfer structure... */
523baf5a
MS
3643 spi_res_free(rxfer);
3644
95c8222f 3645 /* ...and return with an error */
523baf5a
MS
3646 return ERR_PTR(-EINVAL);
3647 }
3648
350de7ce
AS
3649 /*
3650 * Remove the entry after replaced_after from list of
3651 * transfers and add it to list of replaced_transfers.
523baf5a
MS
3652 */
3653 list_move_tail(rxfer->replaced_after->next,
3654 &rxfer->replaced_transfers);
3655 }
3656
350de7ce
AS
3657 /*
3658 * Create copy of the given xfer with identical settings
3659 * based on the first transfer to get removed.
523baf5a
MS
3660 */
3661 for (i = 0; i < insert; i++) {
95c8222f 3662 /* We need to run in reverse order */
523baf5a
MS
3663 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3664
95c8222f 3665 /* Copy all spi_transfer data */
523baf5a
MS
3666 memcpy(xfer, xfer_first, sizeof(*xfer));
3667
95c8222f 3668 /* Add to list */
523baf5a
MS
3669 list_add(&xfer->transfer_list, rxfer->replaced_after);
3670
95c8222f 3671 /* Clear cs_change and delay for all but the last */
523baf5a
MS
3672 if (i) {
3673 xfer->cs_change = false;
bebcfd27 3674 xfer->delay.value = 0;
523baf5a
MS
3675 }
3676 }
3677
95c8222f 3678 /* Set up inserted... */
523baf5a
MS
3679 rxfer->inserted = insert;
3680
95c8222f 3681 /* ...and register it with spi_res/spi_message */
523baf5a
MS
3682 spi_res_add(msg, rxfer);
3683
3684 return rxfer;
3685}
523baf5a 3686
8caab75f 3687static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
3688 struct spi_message *msg,
3689 struct spi_transfer **xferp,
c0c0293c 3690 size_t maxsize)
d9f12122
MS
3691{
3692 struct spi_transfer *xfer = *xferp, *xfers;
3693 struct spi_replaced_transfers *srt;
3694 size_t offset;
3695 size_t count, i;
3696
95c8222f 3697 /* Calculate how many we have to replace */
d9f12122
MS
3698 count = DIV_ROUND_UP(xfer->len, maxsize);
3699
95c8222f 3700 /* Create replacement */
c0c0293c 3701 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, GFP_KERNEL);
657d32ef
DC
3702 if (IS_ERR(srt))
3703 return PTR_ERR(srt);
d9f12122
MS
3704 xfers = srt->inserted_transfers;
3705
350de7ce
AS
3706 /*
3707 * Now handle each of those newly inserted spi_transfers.
3708 * Note that the replacements spi_transfers all are preset
d9f12122
MS
3709 * to the same values as *xferp, so tx_buf, rx_buf and len
3710 * are all identical (as well as most others)
3711 * so we just have to fix up len and the pointers.
d9f12122
MS
3712 */
3713
350de7ce
AS
3714 /*
3715 * The first transfer just needs the length modified, so we
3716 * run it outside the loop.
d9f12122 3717 */
c8dab77a 3718 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122 3719
95c8222f 3720 /* All the others need rx_buf/tx_buf also set */
d9f12122 3721 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
702ca026 3722 /* Update rx_buf, tx_buf and DMA */
d9f12122
MS
3723 if (xfers[i].rx_buf)
3724 xfers[i].rx_buf += offset;
d9f12122
MS
3725 if (xfers[i].tx_buf)
3726 xfers[i].tx_buf += offset;
d9f12122 3727
95c8222f 3728 /* Update length */
d9f12122
MS
3729 xfers[i].len = min(maxsize, xfers[i].len - offset);
3730 }
3731
350de7ce
AS
3732 /*
3733 * We set up xferp to the last entry we have inserted,
3734 * so that we skip those already split transfers.
d9f12122
MS
3735 */
3736 *xferp = &xfers[count - 1];
3737
95c8222f 3738 /* Increment statistics counters */
6598b91b 3739 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics,
d9f12122 3740 transfers_split_maxsize);
6598b91b 3741 SPI_STATISTICS_INCREMENT_FIELD(msg->spi->pcpu_statistics,
d9f12122
MS
3742 transfers_split_maxsize);
3743
3744 return 0;
3745}
3746
3747/**
ce2424d7
MCC
3748 * spi_split_transfers_maxsize - split spi transfers into multiple transfers
3749 * when an individual transfer exceeds a
3750 * certain size
8caab75f 3751 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
3752 * @msg: the @spi_message to transform
3753 * @maxsize: the maximum when to apply this
d9f12122 3754 *
fab53fea
DL
3755 * This function allocates resources that are automatically freed during the
3756 * spi message unoptimize phase so this function should only be called from
3757 * optimize_message callbacks.
3758 *
d9f12122
MS
3759 * Return: status of transformation
3760 */
8caab75f 3761int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122 3762 struct spi_message *msg,
c0c0293c 3763 size_t maxsize)
d9f12122
MS
3764{
3765 struct spi_transfer *xfer;
3766 int ret;
3767
350de7ce
AS
3768 /*
3769 * Iterate over the transfer_list,
d9f12122
MS
3770 * but note that xfer is advanced to the last transfer inserted
3771 * to avoid checking sizes again unnecessarily (also xfer does
350de7ce
AS
3772 * potentially belong to a different list by the time the
3773 * replacement has happened).
d9f12122
MS
3774 */
3775 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3776 if (xfer->len > maxsize) {
8caab75f 3777 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
c0c0293c 3778 maxsize);
d9f12122
MS
3779 if (ret)
3780 return ret;
3781 }
3782 }
3783
3784 return 0;
3785}
3786EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d 3787
027781f3
LG
3788
3789/**
702ca026 3790 * spi_split_transfers_maxwords - split SPI transfers into multiple transfers
027781f3
LG
3791 * when an individual transfer exceeds a
3792 * certain number of SPI words
3793 * @ctlr: the @spi_controller for this transfer
3794 * @msg: the @spi_message to transform
3795 * @maxwords: the number of words to limit each transfer to
027781f3 3796 *
fab53fea
DL
3797 * This function allocates resources that are automatically freed during the
3798 * spi message unoptimize phase so this function should only be called from
3799 * optimize_message callbacks.
3800 *
027781f3
LG
3801 * Return: status of transformation
3802 */
3803int spi_split_transfers_maxwords(struct spi_controller *ctlr,
3804 struct spi_message *msg,
c0c0293c 3805 size_t maxwords)
027781f3
LG
3806{
3807 struct spi_transfer *xfer;
3808
3809 /*
3810 * Iterate over the transfer_list,
3811 * but note that xfer is advanced to the last transfer inserted
3812 * to avoid checking sizes again unnecessarily (also xfer does
3813 * potentially belong to a different list by the time the
3814 * replacement has happened).
3815 */
3816 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3817 size_t maxsize;
3818 int ret;
3819
2b308e71 3820 maxsize = maxwords * roundup_pow_of_two(BITS_TO_BYTES(xfer->bits_per_word));
027781f3
LG
3821 if (xfer->len > maxsize) {
3822 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
c0c0293c 3823 maxsize);
027781f3
LG
3824 if (ret)
3825 return ret;
3826 }
3827 }
3828
3829 return 0;
3830}
3831EXPORT_SYMBOL_GPL(spi_split_transfers_maxwords);
3832
8ae12a0d
DB
3833/*-------------------------------------------------------------------------*/
3834
702ca026
AS
3835/*
3836 * Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
3837 * other core methods are currently defined as inline functions.
3838 */
3839
8caab75f
GU
3840static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3841 u8 bits_per_word)
63ab645f 3842{
8caab75f 3843 if (ctlr->bits_per_word_mask) {
63ab645f
SB
3844 /* Only 32 bits fit in the mask */
3845 if (bits_per_word > 32)
3846 return -EINVAL;
8caab75f 3847 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
3848 return -EINVAL;
3849 }
3850
3851 return 0;
3852}
3853
684a4784
TA
3854/**
3855 * spi_set_cs_timing - configure CS setup, hold, and inactive delays
3856 * @spi: the device that requires specific CS timing configuration
3857 *
3858 * Return: zero on success, else a negative error code.
3859 */
3860static int spi_set_cs_timing(struct spi_device *spi)
3861{
3862 struct device *parent = spi->controller->dev.parent;
3863 int status = 0;
3864
303feb3c 3865 if (spi->controller->set_cs_timing && !spi_get_csgpiod(spi, 0)) {
684a4784
TA
3866 if (spi->controller->auto_runtime_pm) {
3867 status = pm_runtime_get_sync(parent);
3868 if (status < 0) {
3869 pm_runtime_put_noidle(parent);
3870 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3871 status);
3872 return status;
3873 }
3874
3875 status = spi->controller->set_cs_timing(spi);
3876 pm_runtime_mark_last_busy(parent);
3877 pm_runtime_put_autosuspend(parent);
3878 } else {
3879 status = spi->controller->set_cs_timing(spi);
3880 }
3881 }
3882 return status;
3883}
3884
7d077197
DB
3885/**
3886 * spi_setup - setup SPI mode and clock rate
3887 * @spi: the device whose settings are being modified
3888 * Context: can sleep, and no requests are queued to the device
3889 *
3890 * SPI protocol drivers may need to update the transfer mode if the
3891 * device doesn't work with its default. They may likewise need
3892 * to update clock rates or word sizes from initial values. This function
3893 * changes those settings, and must be called from a context that can sleep.
3894 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3895 * effect the next time the device is selected and data is transferred to
702ca026 3896 * or from it. When this function returns, the SPI device is deselected.
7d077197
DB
3897 *
3898 * Note that this call will fail if the protocol driver specifies an option
3899 * that the underlying controller or its driver does not support. For
3900 * example, not all hardware supports wire transfers using nine bit words,
3901 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
3902 *
3903 * Return: zero on success, else a negative error code.
7d077197
DB
3904 */
3905int spi_setup(struct spi_device *spi)
3906{
83596fbe 3907 unsigned bad_bits, ugly_bits;
73f93db5 3908 int status = 0;
7d077197 3909
d962608c 3910 /*
350de7ce
AS
3911 * Check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
3912 * are set at the same time.
f477b7fb 3913 */
d962608c
DB
3914 if ((hweight_long(spi->mode &
3915 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
3916 (hweight_long(spi->mode &
3917 (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
f477b7fb 3918 dev_err(&spi->dev,
d962608c 3919 "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
f477b7fb 3920 return -EINVAL;
3921 }
350de7ce 3922 /* If it is SPI_3WIRE mode, DUAL and QUAD should be forbidden */
f477b7fb 3923 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
3924 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3925 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3926 return -EINVAL;
350de7ce
AS
3927 /*
3928 * Help drivers fail *cleanly* when they need options
3929 * that aren't supported with their current controller.
cbaa62e0
DL
3930 * SPI_CS_WORD has a fallback software implementation,
3931 * so it is ignored here.
e7db06b5 3932 */
d962608c
DB
3933 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
3934 SPI_NO_TX | SPI_NO_RX);
83596fbe 3935 ugly_bits = bad_bits &
6b03061f
YNG
3936 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3937 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
3938 if (ugly_bits) {
3939 dev_warn(&spi->dev,
3940 "setup: ignoring unsupported mode bits %x\n",
3941 ugly_bits);
3942 spi->mode &= ~ugly_bits;
3943 bad_bits &= ~ugly_bits;
3944 }
e7db06b5 3945 if (bad_bits) {
eb288a1f 3946 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
3947 bad_bits);
3948 return -EINVAL;
3949 }
3950
b3fe2e51 3951 if (!spi->bits_per_word) {
7d077197 3952 spi->bits_per_word = 8;
b3fe2e51
PK
3953 } else {
3954 /*
3955 * Some controllers may not support the default 8 bits-per-word
3956 * so only perform the check when this is explicitly provided.
3957 */
3958 status = __spi_validate_bits_per_word(spi->controller,
3959 spi->bits_per_word);
3960 if (status)
3961 return status;
3962 }
63ab645f 3963
6820e812
TA
3964 if (spi->controller->max_speed_hz &&
3965 (!spi->max_speed_hz ||
3966 spi->max_speed_hz > spi->controller->max_speed_hz))
8caab75f 3967 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3968
4fae3a58
SS
3969 mutex_lock(&spi->controller->io_mutex);
3970
c914dbf8 3971 if (spi->controller->setup) {
8caab75f 3972 status = spi->controller->setup(spi);
c914dbf8
JB
3973 if (status) {
3974 mutex_unlock(&spi->controller->io_mutex);
3975 dev_err(&spi->controller->dev, "Failed to setup device: %d\n",
3976 status);
3977 return status;
3978 }
3979 }
7d077197 3980
684a4784
TA
3981 status = spi_set_cs_timing(spi);
3982 if (status) {
3983 mutex_unlock(&spi->controller->io_mutex);
3984 return status;
3985 }
3986
d948e6ca 3987 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
dd769f15 3988 status = pm_runtime_resume_and_get(spi->controller->dev.parent);
d948e6ca 3989 if (status < 0) {
4fae3a58 3990 mutex_unlock(&spi->controller->io_mutex);
d948e6ca
LX
3991 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3992 status);
3993 return status;
3994 }
57a94607
TL
3995
3996 /*
3997 * We do not want to return positive value from pm_runtime_get,
3998 * there are many instances of devices calling spi_setup() and
3999 * checking for a non-zero return value instead of a negative
4000 * return value.
4001 */
4002 status = 0;
4003
d347b4aa 4004 spi_set_cs(spi, false, true);
d948e6ca
LX
4005 pm_runtime_mark_last_busy(spi->controller->dev.parent);
4006 pm_runtime_put_autosuspend(spi->controller->dev.parent);
4007 } else {
d347b4aa 4008 spi_set_cs(spi, false, true);
d948e6ca 4009 }
abeedb01 4010
4fae3a58
SS
4011 mutex_unlock(&spi->controller->io_mutex);
4012
924b5867
DA
4013 if (spi->rt && !spi->controller->rt) {
4014 spi->controller->rt = true;
4015 spi_set_thread_rt(spi->controller);
4016 }
4017
5cb4e1f3
AS
4018 trace_spi_setup(spi, status);
4019
40b82c2d
AS
4020 dev_dbg(&spi->dev, "setup mode %lu, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
4021 spi->mode & SPI_MODE_X_MASK,
7d077197
DB
4022 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
4023 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
4024 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
4025 (spi->mode & SPI_LOOP) ? "loopback, " : "",
4026 spi->bits_per_word, spi->max_speed_hz,
4027 status);
4028
4029 return status;
4030}
4031EXPORT_SYMBOL_GPL(spi_setup);
4032
6c613f68
AA
4033static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
4034 struct spi_device *spi)
4035{
4036 int delay1, delay2;
4037
3984d39b 4038 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA
4039 if (delay1 < 0)
4040 return delay1;
4041
3984d39b 4042 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA
4043 if (delay2 < 0)
4044 return delay2;
4045
4046 if (delay1 < delay2)
4047 memcpy(&xfer->word_delay, &spi->word_delay,
4048 sizeof(xfer->word_delay));
4049
4050 return 0;
4051}
4052
90808738 4053static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 4054{
8caab75f 4055 struct spi_controller *ctlr = spi->controller;
e6811d1d 4056 struct spi_transfer *xfer;
6ea31293 4057 int w_size;
cf32b71e 4058
24a0013a
MB
4059 if (list_empty(&message->transfers))
4060 return -EINVAL;
24a0013a 4061
b204aa0f
DL
4062 message->spi = spi;
4063
350de7ce
AS
4064 /*
4065 * Half-duplex links include original MicroWire, and ones with
cf32b71e
ES
4066 * only one data pin like SPI_3WIRE (switches direction) or where
4067 * either MOSI or MISO is missing. They can also be caused by
4068 * software limitations.
4069 */
8caab75f
GU
4070 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
4071 (spi->mode & SPI_3WIRE)) {
4072 unsigned flags = ctlr->flags;
cf32b71e
ES
4073
4074 list_for_each_entry(xfer, &message->transfers, transfer_list) {
4075 if (xfer->rx_buf && xfer->tx_buf)
4076 return -EINVAL;
8caab75f 4077 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 4078 return -EINVAL;
8caab75f 4079 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
4080 return -EINVAL;
4081 }
4082 }
4083
350de7ce 4084 /*
059b8ffe
LD
4085 * Set transfer bits_per_word and max speed as spi device default if
4086 * it is not set for this transfer.
f477b7fb 4087 * Set transfer tx_nbits and rx_nbits as single transfer default
4088 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB
4089 * Ensure transfer word_delay is at least as long as that required by
4090 * device itself.
e6811d1d 4091 */
77e80588 4092 message->frame_length = 0;
e6811d1d 4093 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 4094 xfer->effective_speed_hz = 0;
078726ce 4095 message->frame_length += xfer->len;
e6811d1d
LD
4096 if (!xfer->bits_per_word)
4097 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
4098
4099 if (!xfer->speed_hz)
059b8ffe 4100 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 4101
8caab75f
GU
4102 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
4103 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 4104
8caab75f 4105 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 4106 return -EINVAL;
a2fd4f9f 4107
4d94bd21
II
4108 /*
4109 * SPI transfer length should be multiple of SPI word size
350de7ce 4110 * where SPI word size should be power-of-two multiple.
4d94bd21
II
4111 */
4112 if (xfer->bits_per_word <= 8)
4113 w_size = 1;
4114 else if (xfer->bits_per_word <= 16)
4115 w_size = 2;
4116 else
4117 w_size = 4;
4118
4d94bd21 4119 /* No partial transfers accepted */
6ea31293 4120 if (xfer->len % w_size)
4d94bd21
II
4121 return -EINVAL;
4122
8caab75f
GU
4123 if (xfer->speed_hz && ctlr->min_speed_hz &&
4124 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 4125 return -EINVAL;
f477b7fb 4126
4127 if (xfer->tx_buf && !xfer->tx_nbits)
4128 xfer->tx_nbits = SPI_NBITS_SINGLE;
4129 if (xfer->rx_buf && !xfer->rx_nbits)
4130 xfer->rx_nbits = SPI_NBITS_SINGLE;
350de7ce
AS
4131 /*
4132 * Check transfer tx/rx_nbits:
1afd9989
GU
4133 * 1. check the value matches one of single, dual and quad
4134 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 4135 */
db90a441 4136 if (xfer->tx_buf) {
d962608c
DB
4137 if (spi->mode & SPI_NO_TX)
4138 return -EINVAL;
db90a441
SP
4139 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
4140 xfer->tx_nbits != SPI_NBITS_DUAL &&
4141 xfer->tx_nbits != SPI_NBITS_QUAD)
4142 return -EINVAL;
4143 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
4144 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
4145 return -EINVAL;
4146 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
4147 !(spi->mode & SPI_TX_QUAD))
4148 return -EINVAL;
db90a441 4149 }
95c8222f 4150 /* Check transfer rx_nbits */
db90a441 4151 if (xfer->rx_buf) {
d962608c
DB
4152 if (spi->mode & SPI_NO_RX)
4153 return -EINVAL;
db90a441
SP
4154 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
4155 xfer->rx_nbits != SPI_NBITS_DUAL &&
4156 xfer->rx_nbits != SPI_NBITS_QUAD)
4157 return -EINVAL;
4158 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
4159 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
4160 return -EINVAL;
4161 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
4162 !(spi->mode & SPI_RX_QUAD))
4163 return -EINVAL;
db90a441 4164 }
b7bb367a 4165
6c613f68
AA
4166 if (_spi_xfer_word_delay_update(xfer, spi))
4167 return -EINVAL;
e6811d1d
LD
4168 }
4169
cf32b71e 4170 message->status = -EINPROGRESS;
90808738
MB
4171
4172 return 0;
4173}
4174
fab53fea
DL
4175/*
4176 * spi_split_transfers - generic handling of transfer splitting
4177 * @msg: the message to split
4178 *
4179 * Under certain conditions, a SPI controller may not support arbitrary
4180 * transfer sizes or other features required by a peripheral. This function
4181 * will split the transfers in the message into smaller transfers that are
4182 * supported by the controller.
4183 *
4184 * Controllers with special requirements not covered here can also split
4185 * transfers in the optimize_message() callback.
4186 *
4187 * Context: can sleep
4188 * Return: zero on success, else a negative error code
4189 */
4190static int spi_split_transfers(struct spi_message *msg)
4191{
4192 struct spi_controller *ctlr = msg->spi->controller;
4193 struct spi_transfer *xfer;
4194 int ret;
4195
4196 /*
4197 * If an SPI controller does not support toggling the CS line on each
4198 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
4199 * for the CS line, we can emulate the CS-per-word hardware function by
4200 * splitting transfers into one-word transfers and ensuring that
4201 * cs_change is set for each transfer.
4202 */
4203 if ((msg->spi->mode & SPI_CS_WORD) &&
4204 (!(ctlr->mode_bits & SPI_CS_WORD) || spi_is_csgpiod(msg->spi))) {
4205 ret = spi_split_transfers_maxwords(ctlr, msg, 1);
4206 if (ret)
4207 return ret;
4208
4209 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
4210 /* Don't change cs_change on the last entry in the list */
4211 if (list_is_last(&xfer->transfer_list, &msg->transfers))
4212 break;
4213
4214 xfer->cs_change = 1;
4215 }
4216 } else {
4217 ret = spi_split_transfers_maxsize(ctlr, msg,
4218 spi_max_transfer_size(msg->spi));
4219 if (ret)
4220 return ret;
4221 }
4222
4223 return 0;
4224}
4225
7b1d87af
DL
4226/*
4227 * __spi_optimize_message - shared implementation for spi_optimize_message()
4228 * and spi_maybe_optimize_message()
4229 * @spi: the device that will be used for the message
4230 * @msg: the message to optimize
4231 *
4232 * Peripheral drivers will call spi_optimize_message() and the spi core will
4233 * call spi_maybe_optimize_message() instead of calling this directly.
4234 *
4235 * It is not valid to call this on a message that has already been optimized.
4236 *
4237 * Return: zero on success, else a negative error code
4238 */
4239static int __spi_optimize_message(struct spi_device *spi,
4240 struct spi_message *msg)
4241{
4242 struct spi_controller *ctlr = spi->controller;
4243 int ret;
4244
4245 ret = __spi_validate(spi, msg);
4246 if (ret)
4247 return ret;
4248
fab53fea
DL
4249 ret = spi_split_transfers(msg);
4250 if (ret)
4251 return ret;
4252
7b1d87af
DL
4253 if (ctlr->optimize_message) {
4254 ret = ctlr->optimize_message(msg);
fab53fea
DL
4255 if (ret) {
4256 spi_res_release(ctlr, msg);
7b1d87af 4257 return ret;
fab53fea 4258 }
7b1d87af
DL
4259 }
4260
4261 msg->optimized = true;
4262
4263 return 0;
4264}
4265
4266/*
4267 * spi_maybe_optimize_message - optimize message if it isn't already pre-optimized
4268 * @spi: the device that will be used for the message
4269 * @msg: the message to optimize
4270 * Return: zero on success, else a negative error code
4271 */
4272static int spi_maybe_optimize_message(struct spi_device *spi,
4273 struct spi_message *msg)
4274{
4275 if (msg->pre_optimized)
4276 return 0;
4277
4278 return __spi_optimize_message(spi, msg);
4279}
4280
4281/**
4282 * spi_optimize_message - do any one-time validation and setup for a SPI message
4283 * @spi: the device that will be used for the message
4284 * @msg: the message to optimize
4285 *
4286 * Peripheral drivers that reuse the same message repeatedly may call this to
4287 * perform as much message prep as possible once, rather than repeating it each
4288 * time a message transfer is performed to improve throughput and reduce CPU
4289 * usage.
4290 *
4291 * Once a message has been optimized, it cannot be modified with the exception
4292 * of updating the contents of any xfer->tx_buf (the pointer can't be changed,
4293 * only the data in the memory it points to).
4294 *
4295 * Calls to this function must be balanced with calls to spi_unoptimize_message()
4296 * to avoid leaking resources.
4297 *
4298 * Context: can sleep
4299 * Return: zero on success, else a negative error code
4300 */
4301int spi_optimize_message(struct spi_device *spi, struct spi_message *msg)
4302{
4303 int ret;
4304
4305 ret = __spi_optimize_message(spi, msg);
4306 if (ret)
4307 return ret;
4308
4309 /*
4310 * This flag indicates that the peripheral driver called spi_optimize_message()
4311 * and therefore we shouldn't unoptimize message automatically when finalizing
4312 * the message but rather wait until spi_unoptimize_message() is called
4313 * by the peripheral driver.
4314 */
4315 msg->pre_optimized = true;
4316
4317 return 0;
4318}
4319EXPORT_SYMBOL_GPL(spi_optimize_message);
4320
4321/**
4322 * spi_unoptimize_message - releases any resources allocated by spi_optimize_message()
4323 * @msg: the message to unoptimize
4324 *
4325 * Calls to this function must be balanced with calls to spi_optimize_message().
4326 *
4327 * Context: can sleep
4328 */
4329void spi_unoptimize_message(struct spi_message *msg)
4330{
4331 __spi_unoptimize_message(msg);
4332 msg->pre_optimized = false;
4333}
4334EXPORT_SYMBOL_GPL(spi_unoptimize_message);
4335
90808738
MB
4336static int __spi_async(struct spi_device *spi, struct spi_message *message)
4337{
8caab75f 4338 struct spi_controller *ctlr = spi->controller;
b42faeee 4339 struct spi_transfer *xfer;
90808738 4340
b5932f5c
BB
4341 /*
4342 * Some controllers do not support doing regular SPI transfers. Return
4343 * ENOTSUPP when this is the case.
4344 */
4345 if (!ctlr->transfer)
4346 return -ENOTSUPP;
4347
6598b91b
DJ
4348 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_async);
4349 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_async);
eca2ebc7 4350
90808738
MB
4351 trace_spi_message_submit(message);
4352
b42faeee
VO
4353 if (!ctlr->ptp_sts_supported) {
4354 list_for_each_entry(xfer, &message->transfers, transfer_list) {
4355 xfer->ptp_sts_word_pre = 0;
4356 ptp_read_system_prets(xfer->ptp_sts);
4357 }
4358 }
4359
8caab75f 4360 return ctlr->transfer(spi, message);
cf32b71e
ES
4361}
4362
568d0697
DB
4363/**
4364 * spi_async - asynchronous SPI transfer
4365 * @spi: device with which data will be exchanged
4366 * @message: describes the data transfers, including completion callback
702ca026 4367 * Context: any (IRQs may be blocked, etc)
568d0697
DB
4368 *
4369 * This call may be used in_irq and other contexts which can't sleep,
4370 * as well as from task contexts which can sleep.
4371 *
4372 * The completion callback is invoked in a context which can't sleep.
4373 * Before that invocation, the value of message->status is undefined.
4374 * When the callback is issued, message->status holds either zero (to
4375 * indicate complete success) or a negative error code. After that
4376 * callback returns, the driver which issued the transfer request may
4377 * deallocate the associated memory; it's no longer in use by any SPI
4378 * core or controller driver code.
4379 *
4380 * Note that although all messages to a spi_device are handled in
4381 * FIFO order, messages may go to different devices in other orders.
4382 * Some device might be higher priority, or have various "hard" access
4383 * time requirements, for example.
4384 *
4385 * On detection of any fault during the transfer, processing of
4386 * the entire message is aborted, and the device is deselected.
4387 * Until returning from the associated message completion callback,
4388 * no other spi_message queued to that device will be processed.
4389 * (This rule applies equally to all the synchronous transfer calls,
4390 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
4391 *
4392 * Return: zero on success, else a negative error code.
568d0697
DB
4393 */
4394int spi_async(struct spi_device *spi, struct spi_message *message)
4395{
8caab75f 4396 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
4397 int ret;
4398 unsigned long flags;
568d0697 4399
7b1d87af
DL
4400 ret = spi_maybe_optimize_message(spi, message);
4401 if (ret)
90808738
MB
4402 return ret;
4403
8caab75f 4404 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 4405
8caab75f 4406 if (ctlr->bus_lock_flag)
cf32b71e
ES
4407 ret = -EBUSY;
4408 else
4409 ret = __spi_async(spi, message);
568d0697 4410
8caab75f 4411 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e 4412
7b1d87af
DL
4413 spi_maybe_unoptimize_message(message);
4414
cf32b71e 4415 return ret;
568d0697
DB
4416}
4417EXPORT_SYMBOL_GPL(spi_async);
4418
ae7d2346
DJ
4419static void __spi_transfer_message_noqueue(struct spi_controller *ctlr, struct spi_message *msg)
4420{
4421 bool was_busy;
4422 int ret;
4423
4424 mutex_lock(&ctlr->io_mutex);
4425
1a9cafcb 4426 was_busy = ctlr->busy;
ae7d2346 4427
72c5c59b 4428 ctlr->cur_msg = msg;
ae7d2346
DJ
4429 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
4430 if (ret)
bef4a48f 4431 dev_err(&ctlr->dev, "noqueue transfer failed\n");
69fa9590
DJ
4432 ctlr->cur_msg = NULL;
4433 ctlr->fallback = false;
4434
ae7d2346
DJ
4435 if (!was_busy) {
4436 kfree(ctlr->dummy_rx);
4437 ctlr->dummy_rx = NULL;
4438 kfree(ctlr->dummy_tx);
4439 ctlr->dummy_tx = NULL;
4440 if (ctlr->unprepare_transfer_hardware &&
4441 ctlr->unprepare_transfer_hardware(ctlr))
4442 dev_err(&ctlr->dev,
4443 "failed to unprepare transfer hardware\n");
4444 spi_idle_runtime_pm(ctlr);
4445 }
4446
ae7d2346
DJ
4447 mutex_unlock(&ctlr->io_mutex);
4448}
4449
7d077197
DB
4450/*-------------------------------------------------------------------------*/
4451
350de7ce
AS
4452/*
4453 * Utility methods for SPI protocol drivers, layered on
7d077197
DB
4454 * top of the core. Some other utility methods are defined as
4455 * inline functions.
4456 */
4457
5d870c8e
AM
4458static void spi_complete(void *arg)
4459{
4460 complete(arg);
4461}
4462
ef4d96ec 4463static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
4464{
4465 DECLARE_COMPLETION_ONSTACK(done);
0da9a579 4466 unsigned long flags;
cf32b71e 4467 int status;
8caab75f 4468 struct spi_controller *ctlr = spi->controller;
0461a414 4469
bef4a48f
MH
4470 if (__spi_check_suspended(ctlr)) {
4471 dev_warn_once(&spi->dev, "Attempted to sync while suspend\n");
4472 return -ESHUTDOWN;
4473 }
4474
7b1d87af
DL
4475 status = spi_maybe_optimize_message(spi, message);
4476 if (status)
0461a414 4477 return status;
cf32b71e 4478
6598b91b
DJ
4479 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync);
4480 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync);
eca2ebc7 4481
350de7ce 4482 /*
ae7d2346
DJ
4483 * Checking queue_empty here only guarantees async/sync message
4484 * ordering when coming from the same context. It does not need to
4485 * guard against reentrancy from a different context. The io_mutex
4486 * will catch those cases.
0461a414 4487 */
b30f7c8e 4488 if (READ_ONCE(ctlr->queue_empty) && !ctlr->must_async) {
ae7d2346
DJ
4489 message->actual_length = 0;
4490 message->status = -EINPROGRESS;
0461a414
MB
4491
4492 trace_spi_message_submit(message);
4493
ae7d2346
DJ
4494 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync_immediate);
4495 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync_immediate);
0461a414 4496
ae7d2346
DJ
4497 __spi_transfer_message_noqueue(ctlr, message);
4498
4499 return message->status;
0461a414 4500 }
cf32b71e 4501
ae7d2346
DJ
4502 /*
4503 * There are messages in the async queue that could have originated
4504 * from the same context, so we need to preserve ordering.
4505 * Therefor we send the message to the async queue and wait until they
4506 * are completed.
4507 */
4508 message->complete = spi_complete;
4509 message->context = &done;
0da9a579
DL
4510
4511 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
4512 status = __spi_async(spi, message);
4513 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
4514
cf32b71e
ES
4515 if (status == 0) {
4516 wait_for_completion(&done);
4517 status = message->status;
4518 }
4519 message->context = NULL;
ae7d2346 4520
cf32b71e
ES
4521 return status;
4522}
4523
8ae12a0d
DB
4524/**
4525 * spi_sync - blocking/synchronous SPI data transfers
4526 * @spi: device with which data will be exchanged
4527 * @message: describes the data transfers
33e34dc6 4528 * Context: can sleep
8ae12a0d
DB
4529 *
4530 * This call may only be used from a context that may sleep. The sleep
4531 * is non-interruptible, and has no timeout. Low-overhead controller
4532 * drivers may DMA directly into and out of the message buffers.
4533 *
4534 * Note that the SPI device's chip select is active during the message,
4535 * and then is normally disabled between messages. Drivers for some
4536 * frequently-used devices may want to minimize costs of selecting a chip,
4537 * by leaving it selected in anticipation that the next message will go
4538 * to the same chip. (That may increase power usage.)
4539 *
0c868461
DB
4540 * Also, the caller is guaranteeing that the memory associated with the
4541 * message will not be freed before this call returns.
4542 *
97d56dc6 4543 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4544 */
4545int spi_sync(struct spi_device *spi, struct spi_message *message)
4546{
ef4d96ec
MB
4547 int ret;
4548
8caab75f 4549 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 4550 ret = __spi_sync(spi, message);
8caab75f 4551 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
4552
4553 return ret;
8ae12a0d
DB
4554}
4555EXPORT_SYMBOL_GPL(spi_sync);
4556
cf32b71e
ES
4557/**
4558 * spi_sync_locked - version of spi_sync with exclusive bus usage
4559 * @spi: device with which data will be exchanged
4560 * @message: describes the data transfers
4561 * Context: can sleep
4562 *
4563 * This call may only be used from a context that may sleep. The sleep
4564 * is non-interruptible, and has no timeout. Low-overhead controller
4565 * drivers may DMA directly into and out of the message buffers.
4566 *
4567 * This call should be used by drivers that require exclusive access to the
25985edc 4568 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
4569 * be released by a spi_bus_unlock call when the exclusive access is over.
4570 *
97d56dc6 4571 * Return: zero on success, else a negative error code.
cf32b71e
ES
4572 */
4573int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
4574{
ef4d96ec 4575 return __spi_sync(spi, message);
cf32b71e
ES
4576}
4577EXPORT_SYMBOL_GPL(spi_sync_locked);
4578
4579/**
4580 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 4581 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
4582 * Context: can sleep
4583 *
4584 * This call may only be used from a context that may sleep. The sleep
4585 * is non-interruptible, and has no timeout.
4586 *
4587 * This call should be used by drivers that require exclusive access to the
4588 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
4589 * exclusive access is over. Data transfer must be done by spi_sync_locked
4590 * and spi_async_locked calls when the SPI bus lock is held.
4591 *
97d56dc6 4592 * Return: always zero.
cf32b71e 4593 */
8caab75f 4594int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
4595{
4596 unsigned long flags;
4597
8caab75f 4598 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 4599
8caab75f
GU
4600 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
4601 ctlr->bus_lock_flag = 1;
4602 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e 4603
95c8222f 4604 /* Mutex remains locked until spi_bus_unlock() is called */
cf32b71e
ES
4605
4606 return 0;
4607}
4608EXPORT_SYMBOL_GPL(spi_bus_lock);
4609
4610/**
4611 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 4612 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
4613 * Context: can sleep
4614 *
4615 * This call may only be used from a context that may sleep. The sleep
4616 * is non-interruptible, and has no timeout.
4617 *
4618 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
4619 * call.
4620 *
97d56dc6 4621 * Return: always zero.
cf32b71e 4622 */
8caab75f 4623int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 4624{
8caab75f 4625 ctlr->bus_lock_flag = 0;
cf32b71e 4626
8caab75f 4627 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
4628
4629 return 0;
4630}
4631EXPORT_SYMBOL_GPL(spi_bus_unlock);
4632
95c8222f 4633/* Portable code must never pass more than 32 bytes */
5fe5f05e 4634#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
4635
4636static u8 *buf;
4637
4638/**
4639 * spi_write_then_read - SPI synchronous write followed by read
4640 * @spi: device with which data will be exchanged
702ca026 4641 * @txbuf: data to be written (need not be DMA-safe)
8ae12a0d 4642 * @n_tx: size of txbuf, in bytes
702ca026 4643 * @rxbuf: buffer into which data will be read (need not be DMA-safe)
27570497 4644 * @n_rx: size of rxbuf, in bytes
33e34dc6 4645 * Context: can sleep
8ae12a0d
DB
4646 *
4647 * This performs a half duplex MicroWire style transaction with the
4648 * device, sending txbuf and then reading rxbuf. The return value
4649 * is zero for success, else a negative errno status code.
b885244e 4650 * This call may only be used from a context that may sleep.
8ae12a0d 4651 *
c373643b 4652 * Parameters to this routine are always copied using a small buffer.
33e34dc6 4653 * Performance-sensitive or bulk transfer code should instead use
702ca026 4654 * spi_{async,sync}() calls with DMA-safe buffers.
97d56dc6
JMC
4655 *
4656 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4657 */
4658int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
4659 const void *txbuf, unsigned n_tx,
4660 void *rxbuf, unsigned n_rx)
8ae12a0d 4661{
068f4070 4662 static DEFINE_MUTEX(lock);
8ae12a0d
DB
4663
4664 int status;
4665 struct spi_message message;
bdff549e 4666 struct spi_transfer x[2];
8ae12a0d
DB
4667 u8 *local_buf;
4668
350de7ce
AS
4669 /*
4670 * Use preallocated DMA-safe buffer if we can. We can't avoid
b3a223ee
MB
4671 * copying here, (as a pure convenience thing), but we can
4672 * keep heap costs out of the hot path unless someone else is
4673 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 4674 */
b3a223ee 4675 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
4676 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
4677 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
4678 if (!local_buf)
4679 return -ENOMEM;
4680 } else {
4681 local_buf = buf;
4682 }
8ae12a0d 4683
8275c642 4684 spi_message_init(&message);
5fe5f05e 4685 memset(x, 0, sizeof(x));
bdff549e
DB
4686 if (n_tx) {
4687 x[0].len = n_tx;
4688 spi_message_add_tail(&x[0], &message);
4689 }
4690 if (n_rx) {
4691 x[1].len = n_rx;
4692 spi_message_add_tail(&x[1], &message);
4693 }
8275c642 4694
8ae12a0d 4695 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
4696 x[0].tx_buf = local_buf;
4697 x[1].rx_buf = local_buf + n_tx;
8ae12a0d 4698
702ca026 4699 /* Do the I/O */
8ae12a0d 4700 status = spi_sync(spi, &message);
9b938b74 4701 if (status == 0)
bdff549e 4702 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 4703
bdff549e 4704 if (x[0].tx_buf == buf)
068f4070 4705 mutex_unlock(&lock);
8ae12a0d
DB
4706 else
4707 kfree(local_buf);
4708
4709 return status;
4710}
4711EXPORT_SYMBOL_GPL(spi_write_then_read);
4712
4713/*-------------------------------------------------------------------------*/
4714
da21fde0 4715#if IS_ENABLED(CONFIG_OF_DYNAMIC)
95c8222f 4716/* Must call put_device() when done with returned spi_device device */
da21fde0 4717static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 4718{
cfba5de9
SP
4719 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
4720
ce79d54a
PA
4721 return dev ? to_spi_device(dev) : NULL;
4722}
4723
95c8222f 4724/* The spi controllers are not using spi_bus, so we find it with another way */
8caab75f 4725static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
4726{
4727 struct device *dev;
4728
cfba5de9 4729 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 4730 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 4731 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA
4732 if (!dev)
4733 return NULL;
4734
95c8222f 4735 /* Reference got in class_find_device */
8caab75f 4736 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
4737}
4738
4739static int of_spi_notify(struct notifier_block *nb, unsigned long action,
4740 void *arg)
4741{
4742 struct of_reconfig_data *rd = arg;
8caab75f 4743 struct spi_controller *ctlr;
ce79d54a
PA
4744 struct spi_device *spi;
4745
4746 switch (of_reconfig_get_state_change(action, arg)) {
4747 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
4748 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
4749 if (ctlr == NULL)
95c8222f 4750 return NOTIFY_OK; /* Not for us */
ce79d54a 4751
bd6c1644 4752 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 4753 put_device(&ctlr->dev);
bd6c1644
GU
4754 return NOTIFY_OK;
4755 }
4756
1a50d940
GU
4757 /*
4758 * Clear the flag before adding the device so that fw_devlink
4759 * doesn't skip adding consumers to this device.
4760 */
4761 rd->dn->fwnode.flags &= ~FWNODE_FLAG_NOT_DEVICE;
8caab75f
GU
4762 spi = of_register_spi_device(ctlr, rd->dn);
4763 put_device(&ctlr->dev);
ce79d54a
PA
4764
4765 if (IS_ERR(spi)) {
25c56c88
RH
4766 pr_err("%s: failed to create for '%pOF'\n",
4767 __func__, rd->dn);
e0af98a7 4768 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
4769 return notifier_from_errno(PTR_ERR(spi));
4770 }
4771 break;
4772
4773 case OF_RECONFIG_CHANGE_REMOVE:
95c8222f 4774 /* Already depopulated? */
bd6c1644
GU
4775 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4776 return NOTIFY_OK;
4777
95c8222f 4778 /* Find our device by node */
ce79d54a
PA
4779 spi = of_find_spi_device_by_node(rd->dn);
4780 if (spi == NULL)
95c8222f 4781 return NOTIFY_OK; /* No? not meant for us */
ce79d54a 4782
95c8222f 4783 /* Unregister takes one ref away */
ce79d54a
PA
4784 spi_unregister_device(spi);
4785
95c8222f 4786 /* And put the reference of the find */
ce79d54a
PA
4787 put_device(&spi->dev);
4788 break;
4789 }
4790
4791 return NOTIFY_OK;
4792}
4793
4794static struct notifier_block spi_of_notifier = {
4795 .notifier_call = of_spi_notify,
4796};
4797#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4798extern struct notifier_block spi_of_notifier;
4799#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4800
7f24467f 4801#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4802static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
4803{
4804 return ACPI_COMPANION(dev->parent) == data;
4805}
4806
a8ecbc54 4807struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
4808{
4809 struct device *dev;
4810
4811 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4812 spi_acpi_controller_match);
6c364062
GU
4813 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4814 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4815 spi_acpi_controller_match);
7f24467f
OP
4816 if (!dev)
4817 return NULL;
4818
8caab75f 4819 return container_of(dev, struct spi_controller, dev);
7f24467f 4820}
a8ecbc54 4821EXPORT_SYMBOL_GPL(acpi_spi_find_controller_by_adev);
7f24467f
OP
4822
4823static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4824{
4825 struct device *dev;
4826
00500147 4827 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4828 return to_spi_device(dev);
7f24467f
OP
4829}
4830
4831static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4832 void *arg)
4833{
4834 struct acpi_device *adev = arg;
8caab75f 4835 struct spi_controller *ctlr;
7f24467f
OP
4836 struct spi_device *spi;
4837
4838 switch (value) {
4839 case ACPI_RECONFIG_DEVICE_ADD:
62fcb99b 4840 ctlr = acpi_spi_find_controller_by_adev(acpi_dev_parent(adev));
8caab75f 4841 if (!ctlr)
7f24467f
OP
4842 break;
4843
8caab75f
GU
4844 acpi_register_spi_device(ctlr, adev);
4845 put_device(&ctlr->dev);
7f24467f
OP
4846 break;
4847 case ACPI_RECONFIG_DEVICE_REMOVE:
4848 if (!acpi_device_enumerated(adev))
4849 break;
4850
4851 spi = acpi_spi_find_device_by_adev(adev);
4852 if (!spi)
4853 break;
4854
4855 spi_unregister_device(spi);
4856 put_device(&spi->dev);
4857 break;
4858 }
4859
4860 return NOTIFY_OK;
4861}
4862
4863static struct notifier_block spi_acpi_notifier = {
4864 .notifier_call = acpi_spi_notify,
4865};
4866#else
4867extern struct notifier_block spi_acpi_notifier;
4868#endif
4869
8ae12a0d
DB
4870static int __init spi_init(void)
4871{
b885244e
DB
4872 int status;
4873
e94b1766 4874 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
4875 if (!buf) {
4876 status = -ENOMEM;
4877 goto err0;
4878 }
4879
4880 status = bus_register(&spi_bus_type);
4881 if (status < 0)
4882 goto err1;
8ae12a0d 4883
b885244e
DB
4884 status = class_register(&spi_master_class);
4885 if (status < 0)
4886 goto err2;
ce79d54a 4887
6c364062
GU
4888 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4889 status = class_register(&spi_slave_class);
4890 if (status < 0)
4891 goto err3;
4892 }
4893
5267720e 4894 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4895 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
4896 if (IS_ENABLED(CONFIG_ACPI))
4897 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4898
8ae12a0d 4899 return 0;
b885244e 4900
6c364062
GU
4901err3:
4902 class_unregister(&spi_master_class);
b885244e
DB
4903err2:
4904 bus_unregister(&spi_bus_type);
4905err1:
4906 kfree(buf);
4907 buf = NULL;
4908err0:
4909 return status;
8ae12a0d 4910}
b885244e 4911
350de7ce
AS
4912/*
4913 * A board_info is normally registered in arch_initcall(),
4914 * but even essential drivers wait till later.
b885244e 4915 *
350de7ce
AS
4916 * REVISIT only boardinfo really needs static linking. The rest (device and
4917 * driver registration) _could_ be dynamically linked (modular) ... Costs
b885244e 4918 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4919 */
673c0c00 4920postcore_initcall(spi_init);