spi: Set ctlr->cur_msg also in the sync transfer case
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB
7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB
11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
f3186dd8 21#include <linux/gpio/consumer.h>
3ae22e8c 22#include <linux/pm_runtime.h>
f48c767c 23#include <linux/pm_domain.h>
826cf175 24#include <linux/property.h>
025ed130 25#include <linux/export.h>
8bd75c77 26#include <linux/sched/rt.h>
ae7e81c0 27#include <uapi/linux/sched/types.h>
ffbbdd21
LW
28#include <linux/delay.h>
29#include <linux/kthread.h>
64bee4d2
MW
30#include <linux/ioport.h>
31#include <linux/acpi.h>
b1b8153c 32#include <linux/highmem.h>
9b61e302 33#include <linux/idr.h>
8a2e487e 34#include <linux/platform_data/x86/apple.h>
44ea6281 35#include <linux/ptp_clock_kernel.h>
6598b91b 36#include <linux/percpu.h>
8ae12a0d 37
56ec1978
MB
38#define CREATE_TRACE_POINTS
39#include <trace/events/spi.h>
ca1438dc
AB
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
41EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 42
46336966
BB
43#include "internals.h"
44
9b61e302 45static DEFINE_IDR(spi_master_idr);
56ec1978 46
8ae12a0d
DB
47static void spidev_release(struct device *dev)
48{
0ffa0285 49 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 50
8caab75f 51 spi_controller_put(spi->controller);
5039563e 52 kfree(spi->driver_override);
6598b91b 53 free_percpu(spi->pcpu_statistics);
07a389fe 54 kfree(spi);
8ae12a0d
DB
55}
56
57static ssize_t
58modalias_show(struct device *dev, struct device_attribute *a, char *buf)
59{
60 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
61 int len;
62
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
64 if (len != -ENODEV)
65 return len;
8ae12a0d 66
d8e328b3 67 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 68}
aa7da564 69static DEVICE_ATTR_RO(modalias);
8ae12a0d 70
5039563e
TP
71static ssize_t driver_override_store(struct device *dev,
72 struct device_attribute *a,
73 const char *buf, size_t count)
74{
75 struct spi_device *spi = to_spi_device(dev);
19368f0f 76 int ret;
5039563e 77
19368f0f
KK
78 ret = driver_set_override(dev, &spi->driver_override, buf, count);
79 if (ret)
80 return ret;
5039563e
TP
81
82 return count;
83}
84
85static ssize_t driver_override_show(struct device *dev,
86 struct device_attribute *a, char *buf)
87{
88 const struct spi_device *spi = to_spi_device(dev);
89 ssize_t len;
90
91 device_lock(dev);
92 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
93 device_unlock(dev);
94 return len;
95}
96static DEVICE_ATTR_RW(driver_override);
97
6598b91b
DJ
98static struct spi_statistics *spi_alloc_pcpu_stats(struct device *dev)
99{
100 struct spi_statistics __percpu *pcpu_stats;
101
102 if (dev)
103 pcpu_stats = devm_alloc_percpu(dev, struct spi_statistics);
104 else
105 pcpu_stats = alloc_percpu_gfp(struct spi_statistics, GFP_KERNEL);
106
107 if (pcpu_stats) {
108 int cpu;
109
110 for_each_possible_cpu(cpu) {
111 struct spi_statistics *stat;
112
113 stat = per_cpu_ptr(pcpu_stats, cpu);
114 u64_stats_init(&stat->syncp);
115 }
116 }
117 return pcpu_stats;
118}
119
120#define spi_pcpu_stats_totalize(ret, in, field) \
121do { \
122 int i; \
123 ret = 0; \
124 for_each_possible_cpu(i) { \
125 const struct spi_statistics *pcpu_stats; \
126 u64 inc; \
127 unsigned int start; \
128 pcpu_stats = per_cpu_ptr(in, i); \
129 do { \
130 start = u64_stats_fetch_begin_irq( \
131 &pcpu_stats->syncp); \
132 inc = u64_stats_read(&pcpu_stats->field); \
133 } while (u64_stats_fetch_retry_irq( \
134 &pcpu_stats->syncp, start)); \
135 ret += inc; \
136 } \
137} while (0)
138
eca2ebc7 139#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
140static ssize_t spi_controller_##field##_show(struct device *dev, \
141 struct device_attribute *attr, \
142 char *buf) \
eca2ebc7 143{ \
8caab75f
GU
144 struct spi_controller *ctlr = container_of(dev, \
145 struct spi_controller, dev); \
6598b91b 146 return spi_statistics_##field##_show(ctlr->pcpu_statistics, buf); \
eca2ebc7 147} \
8caab75f 148static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 149 .attr = { .name = file, .mode = 0444 }, \
8caab75f 150 .show = spi_controller_##field##_show, \
eca2ebc7
MS
151}; \
152static ssize_t spi_device_##field##_show(struct device *dev, \
153 struct device_attribute *attr, \
154 char *buf) \
155{ \
d1eba93b 156 struct spi_device *spi = to_spi_device(dev); \
6598b91b 157 return spi_statistics_##field##_show(spi->pcpu_statistics, buf); \
eca2ebc7
MS
158} \
159static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 160 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
161 .show = spi_device_##field##_show, \
162}
163
6598b91b 164#define SPI_STATISTICS_SHOW_NAME(name, file, field) \
eca2ebc7
MS
165static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
166 char *buf) \
167{ \
eca2ebc7 168 ssize_t len; \
6598b91b
DJ
169 u64 val; \
170 spi_pcpu_stats_totalize(val, stat, field); \
171 len = sysfs_emit(buf, "%llu\n", val); \
eca2ebc7
MS
172 return len; \
173} \
174SPI_STATISTICS_ATTRS(name, file)
175
6598b91b 176#define SPI_STATISTICS_SHOW(field) \
eca2ebc7 177 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
6598b91b 178 field)
eca2ebc7 179
6598b91b
DJ
180SPI_STATISTICS_SHOW(messages);
181SPI_STATISTICS_SHOW(transfers);
182SPI_STATISTICS_SHOW(errors);
183SPI_STATISTICS_SHOW(timedout);
eca2ebc7 184
6598b91b
DJ
185SPI_STATISTICS_SHOW(spi_sync);
186SPI_STATISTICS_SHOW(spi_sync_immediate);
187SPI_STATISTICS_SHOW(spi_async);
eca2ebc7 188
6598b91b
DJ
189SPI_STATISTICS_SHOW(bytes);
190SPI_STATISTICS_SHOW(bytes_rx);
191SPI_STATISTICS_SHOW(bytes_tx);
eca2ebc7 192
6b7bc061
MS
193#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
194 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
195 "transfer_bytes_histo_" number, \
6598b91b 196 transfer_bytes_histo[index])
6b7bc061
MS
197SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
198SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
199SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
200SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
201SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
202SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
203SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
204SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
205SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
206SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
207SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
208SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
209SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
210SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
211SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
212SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
213SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
214
6598b91b 215SPI_STATISTICS_SHOW(transfers_split_maxsize);
d9f12122 216
aa7da564
GKH
217static struct attribute *spi_dev_attrs[] = {
218 &dev_attr_modalias.attr,
5039563e 219 &dev_attr_driver_override.attr,
aa7da564 220 NULL,
8ae12a0d 221};
eca2ebc7
MS
222
223static const struct attribute_group spi_dev_group = {
224 .attrs = spi_dev_attrs,
225};
226
227static struct attribute *spi_device_statistics_attrs[] = {
228 &dev_attr_spi_device_messages.attr,
229 &dev_attr_spi_device_transfers.attr,
230 &dev_attr_spi_device_errors.attr,
231 &dev_attr_spi_device_timedout.attr,
232 &dev_attr_spi_device_spi_sync.attr,
233 &dev_attr_spi_device_spi_sync_immediate.attr,
234 &dev_attr_spi_device_spi_async.attr,
235 &dev_attr_spi_device_bytes.attr,
236 &dev_attr_spi_device_bytes_rx.attr,
237 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
238 &dev_attr_spi_device_transfer_bytes_histo0.attr,
239 &dev_attr_spi_device_transfer_bytes_histo1.attr,
240 &dev_attr_spi_device_transfer_bytes_histo2.attr,
241 &dev_attr_spi_device_transfer_bytes_histo3.attr,
242 &dev_attr_spi_device_transfer_bytes_histo4.attr,
243 &dev_attr_spi_device_transfer_bytes_histo5.attr,
244 &dev_attr_spi_device_transfer_bytes_histo6.attr,
245 &dev_attr_spi_device_transfer_bytes_histo7.attr,
246 &dev_attr_spi_device_transfer_bytes_histo8.attr,
247 &dev_attr_spi_device_transfer_bytes_histo9.attr,
248 &dev_attr_spi_device_transfer_bytes_histo10.attr,
249 &dev_attr_spi_device_transfer_bytes_histo11.attr,
250 &dev_attr_spi_device_transfer_bytes_histo12.attr,
251 &dev_attr_spi_device_transfer_bytes_histo13.attr,
252 &dev_attr_spi_device_transfer_bytes_histo14.attr,
253 &dev_attr_spi_device_transfer_bytes_histo15.attr,
254 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 255 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
256 NULL,
257};
258
259static const struct attribute_group spi_device_statistics_group = {
260 .name = "statistics",
261 .attrs = spi_device_statistics_attrs,
262};
263
264static const struct attribute_group *spi_dev_groups[] = {
265 &spi_dev_group,
266 &spi_device_statistics_group,
267 NULL,
268};
269
8caab75f
GU
270static struct attribute *spi_controller_statistics_attrs[] = {
271 &dev_attr_spi_controller_messages.attr,
272 &dev_attr_spi_controller_transfers.attr,
273 &dev_attr_spi_controller_errors.attr,
274 &dev_attr_spi_controller_timedout.attr,
275 &dev_attr_spi_controller_spi_sync.attr,
276 &dev_attr_spi_controller_spi_sync_immediate.attr,
277 &dev_attr_spi_controller_spi_async.attr,
278 &dev_attr_spi_controller_bytes.attr,
279 &dev_attr_spi_controller_bytes_rx.attr,
280 &dev_attr_spi_controller_bytes_tx.attr,
281 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
282 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
283 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
284 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
285 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
286 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
287 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
288 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
289 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
290 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
291 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
292 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
293 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
294 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
295 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
296 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
297 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
298 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
299 NULL,
300};
301
8caab75f 302static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 303 .name = "statistics",
8caab75f 304 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
305};
306
307static const struct attribute_group *spi_master_groups[] = {
8caab75f 308 &spi_controller_statistics_group,
eca2ebc7
MS
309 NULL,
310};
311
6598b91b 312static void spi_statistics_add_transfer_stats(struct spi_statistics *pcpu_stats,
da21fde0
UKK
313 struct spi_transfer *xfer,
314 struct spi_controller *ctlr)
eca2ebc7 315{
6b7bc061 316 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
67b9d641 317 struct spi_statistics *stats;
6b7bc061
MS
318
319 if (l2len < 0)
320 l2len = 0;
eca2ebc7 321
67b9d641
DJ
322 get_cpu();
323 stats = this_cpu_ptr(pcpu_stats);
6598b91b 324 u64_stats_update_begin(&stats->syncp);
eca2ebc7 325
6598b91b
DJ
326 u64_stats_inc(&stats->transfers);
327 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
eca2ebc7 328
6598b91b 329 u64_stats_add(&stats->bytes, xfer->len);
eca2ebc7 330 if ((xfer->tx_buf) &&
8caab75f 331 (xfer->tx_buf != ctlr->dummy_tx))
6598b91b 332 u64_stats_add(&stats->bytes_tx, xfer->len);
eca2ebc7 333 if ((xfer->rx_buf) &&
8caab75f 334 (xfer->rx_buf != ctlr->dummy_rx))
6598b91b 335 u64_stats_add(&stats->bytes_rx, xfer->len);
eca2ebc7 336
6598b91b 337 u64_stats_update_end(&stats->syncp);
67b9d641 338 put_cpu();
eca2ebc7 339}
8ae12a0d 340
350de7ce
AS
341/*
342 * modalias support makes "modprobe $MODALIAS" new-style hotplug work,
8ae12a0d
DB
343 * and the sysfs version makes coldplug work too.
344 */
3f076575 345static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, const char *name)
75368bf6
AV
346{
347 while (id->name[0]) {
3f076575 348 if (!strcmp(name, id->name))
75368bf6
AV
349 return id;
350 id++;
351 }
352 return NULL;
353}
354
355const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
356{
357 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
358
3f076575 359 return spi_match_id(sdrv->id_table, sdev->modalias);
75368bf6
AV
360}
361EXPORT_SYMBOL_GPL(spi_get_device_id);
362
8ae12a0d
DB
363static int spi_match_device(struct device *dev, struct device_driver *drv)
364{
365 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
366 const struct spi_driver *sdrv = to_spi_driver(drv);
367
5039563e
TP
368 /* Check override first, and if set, only use the named driver */
369 if (spi->driver_override)
370 return strcmp(spi->driver_override, drv->name) == 0;
371
2b7a32f7
SA
372 /* Attempt an OF style match */
373 if (of_driver_match_device(dev, drv))
374 return 1;
375
64bee4d2
MW
376 /* Then try ACPI */
377 if (acpi_driver_match_device(dev, drv))
378 return 1;
379
75368bf6 380 if (sdrv->id_table)
3f076575 381 return !!spi_match_id(sdrv->id_table, spi->modalias);
8ae12a0d 382
35f74fca 383 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
384}
385
7eff2e7a 386static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
387{
388 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
389 int rc;
390
391 rc = acpi_device_uevent_modalias(dev, env);
392 if (rc != -ENODEV)
393 return rc;
8ae12a0d 394
2856670f 395 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
396}
397
9db34ee6 398static int spi_probe(struct device *dev)
b885244e
DB
399{
400 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 401 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
402 int ret;
403
86be408b
SN
404 ret = of_clk_set_defaults(dev->of_node, false);
405 if (ret)
406 return ret;
407
44af7927
JH
408 if (dev->of_node) {
409 spi->irq = of_irq_get(dev->of_node, 0);
410 if (spi->irq == -EPROBE_DEFER)
411 return -EPROBE_DEFER;
412 if (spi->irq < 0)
413 spi->irq = 0;
414 }
415
676e7c25 416 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
417 if (ret)
418 return ret;
419
440408db
UKK
420 if (sdrv->probe) {
421 ret = sdrv->probe(spi);
422 if (ret)
423 dev_pm_domain_detach(dev, true);
424 }
b885244e 425
33cf00e5 426 return ret;
b885244e
DB
427}
428
fc7a6209 429static void spi_remove(struct device *dev)
b885244e
DB
430{
431 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5 432
a0386bba
UKK
433 if (sdrv->remove)
434 sdrv->remove(to_spi_device(dev));
7795d475 435
676e7c25 436 dev_pm_domain_detach(dev, true);
b885244e
DB
437}
438
9db34ee6 439static void spi_shutdown(struct device *dev)
b885244e 440{
a6f483b2
MS
441 if (dev->driver) {
442 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
b885244e 443
a6f483b2
MS
444 if (sdrv->shutdown)
445 sdrv->shutdown(to_spi_device(dev));
446 }
b885244e
DB
447}
448
9db34ee6
UKK
449struct bus_type spi_bus_type = {
450 .name = "spi",
451 .dev_groups = spi_dev_groups,
452 .match = spi_match_device,
453 .uevent = spi_uevent,
454 .probe = spi_probe,
455 .remove = spi_remove,
456 .shutdown = spi_shutdown,
457};
458EXPORT_SYMBOL_GPL(spi_bus_type);
459
33e34dc6 460/**
ca5d2485 461 * __spi_register_driver - register a SPI driver
88c9321d 462 * @owner: owner module of the driver to register
33e34dc6
DB
463 * @sdrv: the driver to register
464 * Context: can sleep
97d56dc6
JMC
465 *
466 * Return: zero on success, else a negative error code.
33e34dc6 467 */
ca5d2485 468int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 469{
ca5d2485 470 sdrv->driver.owner = owner;
b885244e 471 sdrv->driver.bus = &spi_bus_type;
5fa6863b
MB
472
473 /*
474 * For Really Good Reasons we use spi: modaliases not of:
475 * modaliases for DT so module autoloading won't work if we
476 * don't have a spi_device_id as well as a compatible string.
477 */
478 if (sdrv->driver.of_match_table) {
479 const struct of_device_id *of_id;
480
481 for (of_id = sdrv->driver.of_match_table; of_id->compatible[0];
482 of_id++) {
483 const char *of_name;
484
485 /* Strip off any vendor prefix */
486 of_name = strnchr(of_id->compatible,
487 sizeof(of_id->compatible), ',');
488 if (of_name)
489 of_name++;
490 else
491 of_name = of_id->compatible;
492
493 if (sdrv->id_table) {
494 const struct spi_device_id *spi_id;
495
3f076575 496 spi_id = spi_match_id(sdrv->id_table, of_name);
b79332ef 497 if (spi_id)
5fa6863b
MB
498 continue;
499 } else {
500 if (strcmp(sdrv->driver.name, of_name) == 0)
501 continue;
502 }
503
504 pr_warn("SPI driver %s has no spi_device_id for %s\n",
505 sdrv->driver.name, of_id->compatible);
506 }
507 }
508
b885244e
DB
509 return driver_register(&sdrv->driver);
510}
ca5d2485 511EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 512
8ae12a0d
DB
513/*-------------------------------------------------------------------------*/
514
350de7ce
AS
515/*
516 * SPI devices should normally not be created by SPI device drivers; that
8caab75f 517 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
518 * Device registration normally goes into like arch/.../mach.../board-YYY.c
519 * with other readonly (flashable) information about mainboard devices.
520 */
521
522struct boardinfo {
523 struct list_head list;
2b9603a0 524 struct spi_board_info board_info;
8ae12a0d
DB
525};
526
527static LIST_HEAD(board_list);
8caab75f 528static LIST_HEAD(spi_controller_list);
2b9603a0
FT
529
530/*
be73e323 531 * Used to protect add/del operation for board_info list and
350de7ce
AS
532 * spi_controller list, and their matching process also used
533 * to protect object of type struct idr.
2b9603a0 534 */
94040828 535static DEFINE_MUTEX(board_lock);
8ae12a0d 536
dc87c98e
GL
537/**
538 * spi_alloc_device - Allocate a new SPI device
8caab75f 539 * @ctlr: Controller to which device is connected
dc87c98e
GL
540 * Context: can sleep
541 *
542 * Allows a driver to allocate and initialize a spi_device without
543 * registering it immediately. This allows a driver to directly
544 * fill the spi_device with device parameters before calling
545 * spi_add_device() on it.
546 *
547 * Caller is responsible to call spi_add_device() on the returned
8caab75f 548 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
549 * needs to discard the spi_device without adding it, then it should
550 * call spi_dev_put() on it.
551 *
97d56dc6 552 * Return: a pointer to the new device, or NULL.
dc87c98e 553 */
e3dc1399 554struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
555{
556 struct spi_device *spi;
dc87c98e 557
8caab75f 558 if (!spi_controller_get(ctlr))
dc87c98e
GL
559 return NULL;
560
5fe5f05e 561 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 562 if (!spi) {
8caab75f 563 spi_controller_put(ctlr);
dc87c98e
GL
564 return NULL;
565 }
566
6598b91b
DJ
567 spi->pcpu_statistics = spi_alloc_pcpu_stats(NULL);
568 if (!spi->pcpu_statistics) {
569 kfree(spi);
570 spi_controller_put(ctlr);
571 return NULL;
572 }
573
8caab75f
GU
574 spi->master = spi->controller = ctlr;
575 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
576 spi->dev.bus = &spi_bus_type;
577 spi->dev.release = spidev_release;
ea235786 578 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7 579
dc87c98e
GL
580 device_initialize(&spi->dev);
581 return spi;
582}
e3dc1399 583EXPORT_SYMBOL_GPL(spi_alloc_device);
dc87c98e 584
e13ac47b
JN
585static void spi_dev_set_name(struct spi_device *spi)
586{
587 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
588
589 if (adev) {
590 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
591 return;
592 }
593
8caab75f 594 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
595 spi->chip_select);
596}
597
b6fb8d3a
MW
598static int spi_dev_check(struct device *dev, void *data)
599{
600 struct spi_device *spi = to_spi_device(dev);
601 struct spi_device *new_spi = data;
602
8caab75f 603 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
604 spi->chip_select == new_spi->chip_select)
605 return -EBUSY;
606 return 0;
607}
608
c7299fea
SK
609static void spi_cleanup(struct spi_device *spi)
610{
611 if (spi->controller->cleanup)
612 spi->controller->cleanup(spi);
613}
614
0c79378c 615static int __spi_add_device(struct spi_device *spi)
dc87c98e 616{
8caab75f
GU
617 struct spi_controller *ctlr = spi->controller;
618 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
619 int status;
620
6bfb15f3
UKK
621 /*
622 * We need to make sure there's no other device with this
623 * chipselect **BEFORE** we call setup(), else we'll trash
624 * its configuration.
625 */
b6fb8d3a
MW
626 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
627 if (status) {
e48880e0
DB
628 dev_err(dev, "chipselect %d already in use\n",
629 spi->chip_select);
0c79378c 630 return status;
e48880e0
DB
631 }
632
ddf75be4
LW
633 /* Controller may unregister concurrently */
634 if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
635 !device_is_registered(&ctlr->dev)) {
0c79378c 636 return -ENODEV;
ddf75be4
LW
637 }
638
f3186dd8
LW
639 if (ctlr->cs_gpiods)
640 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
74317984 641
350de7ce
AS
642 /*
643 * Drivers may modify this initial i/o setup, but will
e48880e0
DB
644 * normally rely on the device being setup. Devices
645 * using SPI_CS_HIGH can't coexist well otherwise...
646 */
7d077197 647 status = spi_setup(spi);
dc87c98e 648 if (status < 0) {
eb288a1f
LW
649 dev_err(dev, "can't setup %s, status %d\n",
650 dev_name(&spi->dev), status);
0c79378c 651 return status;
dc87c98e
GL
652 }
653
e48880e0 654 /* Device may be bound to an active driver when this returns */
dc87c98e 655 status = device_add(&spi->dev);
c7299fea 656 if (status < 0) {
eb288a1f
LW
657 dev_err(dev, "can't add %s, status %d\n",
658 dev_name(&spi->dev), status);
c7299fea
SK
659 spi_cleanup(spi);
660 } else {
35f74fca 661 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
c7299fea 662 }
dc87c98e 663
0c79378c
SR
664 return status;
665}
666
667/**
668 * spi_add_device - Add spi_device allocated with spi_alloc_device
669 * @spi: spi_device to register
670 *
671 * Companion function to spi_alloc_device. Devices allocated with
672 * spi_alloc_device can be added onto the spi bus with this function.
673 *
674 * Return: 0 on success; negative errno on failure
675 */
e3dc1399 676int spi_add_device(struct spi_device *spi)
0c79378c
SR
677{
678 struct spi_controller *ctlr = spi->controller;
679 struct device *dev = ctlr->dev.parent;
680 int status;
681
682 /* Chipselects are numbered 0..max; validate. */
683 if (spi->chip_select >= ctlr->num_chipselect) {
684 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
685 ctlr->num_chipselect);
686 return -EINVAL;
687 }
688
689 /* Set the bus ID string */
690 spi_dev_set_name(spi);
691
6098475d 692 mutex_lock(&ctlr->add_lock);
0c79378c 693 status = __spi_add_device(spi);
6098475d 694 mutex_unlock(&ctlr->add_lock);
e48880e0 695 return status;
dc87c98e 696}
e3dc1399 697EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 698
0c79378c
SR
699static int spi_add_device_locked(struct spi_device *spi)
700{
701 struct spi_controller *ctlr = spi->controller;
702 struct device *dev = ctlr->dev.parent;
703
704 /* Chipselects are numbered 0..max; validate. */
705 if (spi->chip_select >= ctlr->num_chipselect) {
706 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
707 ctlr->num_chipselect);
708 return -EINVAL;
709 }
710
711 /* Set the bus ID string */
712 spi_dev_set_name(spi);
713
6098475d 714 WARN_ON(!mutex_is_locked(&ctlr->add_lock));
0c79378c
SR
715 return __spi_add_device(spi);
716}
717
33e34dc6
DB
718/**
719 * spi_new_device - instantiate one new SPI device
8caab75f 720 * @ctlr: Controller to which device is connected
33e34dc6
DB
721 * @chip: Describes the SPI device
722 * Context: can sleep
723 *
724 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
725 * after board init creates the hard-wired devices. Some development
726 * platforms may not be able to use spi_register_board_info though, and
727 * this is exported so that for example a USB or parport based adapter
728 * driver could add devices (which it would learn about out-of-band).
082c8cb4 729 *
97d56dc6 730 * Return: the new device, or NULL.
8ae12a0d 731 */
8caab75f 732struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 733 struct spi_board_info *chip)
8ae12a0d
DB
734{
735 struct spi_device *proxy;
8ae12a0d
DB
736 int status;
737
350de7ce
AS
738 /*
739 * NOTE: caller did any chip->bus_num checks necessary.
082c8cb4
DB
740 *
741 * Also, unless we change the return value convention to use
742 * error-or-pointer (not NULL-or-pointer), troubleshootability
743 * suggests syslogged diagnostics are best here (ugh).
744 */
745
8caab75f 746 proxy = spi_alloc_device(ctlr);
dc87c98e 747 if (!proxy)
8ae12a0d
DB
748 return NULL;
749
102eb975
GL
750 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
751
8ae12a0d
DB
752 proxy->chip_select = chip->chip_select;
753 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 754 proxy->mode = chip->mode;
8ae12a0d 755 proxy->irq = chip->irq;
102eb975 756 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
757 proxy->dev.platform_data = (void *) chip->platform_data;
758 proxy->controller_data = chip->controller_data;
759 proxy->controller_state = NULL;
8ae12a0d 760
47afc77b
HK
761 if (chip->swnode) {
762 status = device_add_software_node(&proxy->dev, chip->swnode);
826cf175 763 if (status) {
9d902c2a 764 dev_err(&ctlr->dev, "failed to add software node to '%s': %d\n",
826cf175
DT
765 chip->modalias, status);
766 goto err_dev_put;
767 }
8ae12a0d
DB
768 }
769
826cf175
DT
770 status = spi_add_device(proxy);
771 if (status < 0)
df41a5da 772 goto err_dev_put;
826cf175 773
8ae12a0d 774 return proxy;
826cf175 775
826cf175 776err_dev_put:
df41a5da 777 device_remove_software_node(&proxy->dev);
826cf175
DT
778 spi_dev_put(proxy);
779 return NULL;
8ae12a0d
DB
780}
781EXPORT_SYMBOL_GPL(spi_new_device);
782
3b1884c2
GU
783/**
784 * spi_unregister_device - unregister a single SPI device
785 * @spi: spi_device to unregister
786 *
787 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 788 * by spi_unregister_controller().
3b1884c2
GU
789 */
790void spi_unregister_device(struct spi_device *spi)
791{
bd6c1644
GU
792 if (!spi)
793 return;
794
8324147f 795 if (spi->dev.of_node) {
bd6c1644 796 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
797 of_node_put(spi->dev.of_node);
798 }
7f24467f
OP
799 if (ACPI_COMPANION(&spi->dev))
800 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
47afc77b 801 device_remove_software_node(&spi->dev);
27e7db56
SK
802 device_del(&spi->dev);
803 spi_cleanup(spi);
804 put_device(&spi->dev);
3b1884c2
GU
805}
806EXPORT_SYMBOL_GPL(spi_unregister_device);
807
8caab75f
GU
808static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
809 struct spi_board_info *bi)
2b9603a0
FT
810{
811 struct spi_device *dev;
812
8caab75f 813 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
814 return;
815
8caab75f 816 dev = spi_new_device(ctlr, bi);
2b9603a0 817 if (!dev)
8caab75f 818 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
819 bi->modalias);
820}
821
33e34dc6
DB
822/**
823 * spi_register_board_info - register SPI devices for a given board
824 * @info: array of chip descriptors
825 * @n: how many descriptors are provided
826 * Context: can sleep
827 *
8ae12a0d
DB
828 * Board-specific early init code calls this (probably during arch_initcall)
829 * with segments of the SPI device table. Any device nodes are created later,
830 * after the relevant parent SPI controller (bus_num) is defined. We keep
831 * this table of devices forever, so that reloading a controller driver will
832 * not make Linux forget about these hard-wired devices.
833 *
834 * Other code can also call this, e.g. a particular add-on board might provide
835 * SPI devices through its expansion connector, so code initializing that board
836 * would naturally declare its SPI devices.
837 *
838 * The board info passed can safely be __initdata ... but be careful of
839 * any embedded pointers (platform_data, etc), they're copied as-is.
97d56dc6
JMC
840 *
841 * Return: zero on success, else a negative error code.
8ae12a0d 842 */
fd4a319b 843int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 844{
2b9603a0
FT
845 struct boardinfo *bi;
846 int i;
8ae12a0d 847
c7908a37 848 if (!n)
f974cf57 849 return 0;
c7908a37 850
f9bdb7fd 851 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
852 if (!bi)
853 return -ENOMEM;
8ae12a0d 854
2b9603a0 855 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 856 struct spi_controller *ctlr;
8ae12a0d 857
2b9603a0 858 memcpy(&bi->board_info, info, sizeof(*info));
826cf175 859
2b9603a0
FT
860 mutex_lock(&board_lock);
861 list_add_tail(&bi->list, &board_list);
8caab75f
GU
862 list_for_each_entry(ctlr, &spi_controller_list, list)
863 spi_match_controller_to_boardinfo(ctlr,
864 &bi->board_info);
2b9603a0 865 mutex_unlock(&board_lock);
8ae12a0d 866 }
2b9603a0
FT
867
868 return 0;
8ae12a0d
DB
869}
870
871/*-------------------------------------------------------------------------*/
872
fb51601b
UKK
873/* Core methods for SPI resource management */
874
875/**
876 * spi_res_alloc - allocate a spi resource that is life-cycle managed
877 * during the processing of a spi_message while using
878 * spi_transfer_one
879 * @spi: the spi device for which we allocate memory
880 * @release: the release code to execute for this resource
881 * @size: size to alloc and return
882 * @gfp: GFP allocation flags
883 *
884 * Return: the pointer to the allocated data
885 *
886 * This may get enhanced in the future to allocate from a memory pool
887 * of the @spi_device or @spi_controller to avoid repeated allocations.
888 */
da21fde0
UKK
889static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
890 size_t size, gfp_t gfp)
fb51601b
UKK
891{
892 struct spi_res *sres;
893
894 sres = kzalloc(sizeof(*sres) + size, gfp);
895 if (!sres)
896 return NULL;
897
898 INIT_LIST_HEAD(&sres->entry);
899 sres->release = release;
900
901 return sres->data;
902}
fb51601b
UKK
903
904/**
905 * spi_res_free - free an spi resource
906 * @res: pointer to the custom data of a resource
fb51601b 907 */
da21fde0 908static void spi_res_free(void *res)
fb51601b
UKK
909{
910 struct spi_res *sres = container_of(res, struct spi_res, data);
911
912 if (!res)
913 return;
914
915 WARN_ON(!list_empty(&sres->entry));
916 kfree(sres);
917}
fb51601b
UKK
918
919/**
920 * spi_res_add - add a spi_res to the spi_message
921 * @message: the spi message
922 * @res: the spi_resource
923 */
da21fde0 924static void spi_res_add(struct spi_message *message, void *res)
fb51601b
UKK
925{
926 struct spi_res *sres = container_of(res, struct spi_res, data);
927
928 WARN_ON(!list_empty(&sres->entry));
929 list_add_tail(&sres->entry, &message->resources);
930}
fb51601b
UKK
931
932/**
933 * spi_res_release - release all spi resources for this message
934 * @ctlr: the @spi_controller
935 * @message: the @spi_message
936 */
da21fde0 937static void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
fb51601b
UKK
938{
939 struct spi_res *res, *tmp;
940
941 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
942 if (res->release)
943 res->release(ctlr, message, res->data);
944
945 list_del(&res->entry);
946
947 kfree(res);
948 }
949}
fb51601b
UKK
950
951/*-------------------------------------------------------------------------*/
952
d347b4aa 953static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
b158935f 954{
86527bcb 955 bool activate = enable;
25093bde 956
d40f0b6f
DA
957 /*
958 * Avoid calling into the driver (or doing delays) if the chip select
959 * isn't actually changing from the last time this was called.
960 */
6bb477df
YZ
961 if (!force && ((enable && spi->controller->last_cs == spi->chip_select) ||
962 (!enable && spi->controller->last_cs != spi->chip_select)) &&
d40f0b6f
DA
963 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
964 return;
965
5cb4e1f3
AS
966 trace_spi_set_cs(spi, activate);
967
6bb477df 968 spi->controller->last_cs = enable ? spi->chip_select : -1;
d40f0b6f
DA
969 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
970
f48dc6b9 971 if ((spi->cs_gpiod || !spi->controller->set_cs_timing) && !activate) {
95c07247 972 spi_delay_exec(&spi->cs_hold, NULL);
25093bde
AA
973 }
974
b158935f
MB
975 if (spi->mode & SPI_CS_HIGH)
976 enable = !enable;
977
f48dc6b9 978 if (spi->cs_gpiod) {
f3186dd8 979 if (!(spi->mode & SPI_NO_CS)) {
f48dc6b9
LW
980 /*
981 * Historically ACPI has no means of the GPIO polarity and
982 * thus the SPISerialBus() resource defines it on the per-chip
983 * basis. In order to avoid a chain of negations, the GPIO
984 * polarity is considered being Active High. Even for the cases
985 * when _DSD() is involved (in the updated versions of ACPI)
986 * the GPIO CS polarity must be defined Active High to avoid
987 * ambiguity. That's why we use enable, that takes SPI_CS_HIGH
988 * into account.
989 */
990 if (has_acpi_companion(&spi->dev))
991 gpiod_set_value_cansleep(spi->cs_gpiod, !enable);
992 else
993 /* Polarity handled by GPIO library */
994 gpiod_set_value_cansleep(spi->cs_gpiod, activate);
f3186dd8 995 }
8eee6b9d 996 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
997 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
998 spi->controller->set_cs)
999 spi->controller->set_cs(spi, !enable);
1000 } else if (spi->controller->set_cs) {
1001 spi->controller->set_cs(spi, !enable);
8eee6b9d 1002 }
25093bde 1003
f48dc6b9 1004 if (spi->cs_gpiod || !spi->controller->set_cs_timing) {
95c07247
HM
1005 if (activate)
1006 spi_delay_exec(&spi->cs_setup, NULL);
1007 else
8c33ebfe 1008 spi_delay_exec(&spi->cs_inactive, NULL);
25093bde 1009 }
b158935f
MB
1010}
1011
2de440f5 1012#ifdef CONFIG_HAS_DMA
46336966
BB
1013int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
1014 struct sg_table *sgt, void *buf, size_t len,
1015 enum dma_data_direction dir)
6ad45a27
MB
1016{
1017 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 1018 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
1019#ifdef CONFIG_HIGHMEM
1020 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
1021 (unsigned long)buf < (PKMAP_BASE +
1022 (LAST_PKMAP * PAGE_SIZE)));
1023#else
1024 const bool kmap_buf = false;
1025#endif
65598c13
AG
1026 int desc_len;
1027 int sgs;
6ad45a27 1028 struct page *vm_page;
8dd4a016 1029 struct scatterlist *sg;
6ad45a27
MB
1030 void *sg_buf;
1031 size_t min;
1032 int i, ret;
1033
b1b8153c 1034 if (vmalloced_buf || kmap_buf) {
ebc4cb43 1035 desc_len = min_t(unsigned long, max_seg_size, PAGE_SIZE);
65598c13 1036 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 1037 } else if (virt_addr_valid(buf)) {
ebc4cb43 1038 desc_len = min_t(size_t, max_seg_size, ctlr->max_dma_len);
65598c13 1039 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
1040 } else {
1041 return -EINVAL;
65598c13
AG
1042 }
1043
6ad45a27
MB
1044 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
1045 if (ret != 0)
1046 return ret;
1047
8dd4a016 1048 sg = &sgt->sgl[0];
6ad45a27 1049 for (i = 0; i < sgs; i++) {
6ad45a27 1050
b1b8153c 1051 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
1052 /*
1053 * Next scatterlist entry size is the minimum between
1054 * the desc_len and the remaining buffer length that
1055 * fits in a page.
1056 */
1057 min = min_t(size_t, desc_len,
1058 min_t(size_t, len,
1059 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
1060 if (vmalloced_buf)
1061 vm_page = vmalloc_to_page(buf);
1062 else
1063 vm_page = kmap_to_page(buf);
6ad45a27
MB
1064 if (!vm_page) {
1065 sg_free_table(sgt);
1066 return -ENOMEM;
1067 }
8dd4a016 1068 sg_set_page(sg, vm_page,
c1aefbdd 1069 min, offset_in_page(buf));
6ad45a27 1070 } else {
65598c13 1071 min = min_t(size_t, len, desc_len);
6ad45a27 1072 sg_buf = buf;
8dd4a016 1073 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
1074 }
1075
6ad45a27
MB
1076 buf += min;
1077 len -= min;
8dd4a016 1078 sg = sg_next(sg);
6ad45a27
MB
1079 }
1080
1081 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
1082 if (!ret)
1083 ret = -ENOMEM;
6ad45a27
MB
1084 if (ret < 0) {
1085 sg_free_table(sgt);
1086 return ret;
1087 }
1088
1089 sgt->nents = ret;
1090
1091 return 0;
1092}
1093
46336966
BB
1094void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
1095 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB
1096{
1097 if (sgt->orig_nents) {
1098 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
1099 sg_free_table(sgt);
1100 }
1101}
1102
8caab75f 1103static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1104{
99adef31
MB
1105 struct device *tx_dev, *rx_dev;
1106 struct spi_transfer *xfer;
6ad45a27 1107 int ret;
3a2eba9b 1108
8caab75f 1109 if (!ctlr->can_dma)
99adef31
MB
1110 return 0;
1111
8caab75f
GU
1112 if (ctlr->dma_tx)
1113 tx_dev = ctlr->dma_tx->device->dev;
b470e10e
VK
1114 else if (ctlr->dma_map_dev)
1115 tx_dev = ctlr->dma_map_dev;
c37f45b5 1116 else
8caab75f 1117 tx_dev = ctlr->dev.parent;
c37f45b5 1118
8caab75f
GU
1119 if (ctlr->dma_rx)
1120 rx_dev = ctlr->dma_rx->device->dev;
b470e10e
VK
1121 else if (ctlr->dma_map_dev)
1122 rx_dev = ctlr->dma_map_dev;
c37f45b5 1123 else
8caab75f 1124 rx_dev = ctlr->dev.parent;
99adef31
MB
1125
1126 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1127 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1128 continue;
1129
1130 if (xfer->tx_buf != NULL) {
8caab75f 1131 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1132 (void *)xfer->tx_buf, xfer->len,
1133 DMA_TO_DEVICE);
1134 if (ret != 0)
1135 return ret;
99adef31
MB
1136 }
1137
1138 if (xfer->rx_buf != NULL) {
8caab75f 1139 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
1140 xfer->rx_buf, xfer->len,
1141 DMA_FROM_DEVICE);
1142 if (ret != 0) {
8caab75f 1143 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1144 DMA_TO_DEVICE);
1145 return ret;
99adef31
MB
1146 }
1147 }
1148 }
1149
8caab75f 1150 ctlr->cur_msg_mapped = true;
99adef31
MB
1151
1152 return 0;
1153}
1154
8caab75f 1155static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
1156{
1157 struct spi_transfer *xfer;
1158 struct device *tx_dev, *rx_dev;
1159
8caab75f 1160 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
1161 return 0;
1162
8caab75f
GU
1163 if (ctlr->dma_tx)
1164 tx_dev = ctlr->dma_tx->device->dev;
409543ce
VK
1165 else if (ctlr->dma_map_dev)
1166 tx_dev = ctlr->dma_map_dev;
c37f45b5 1167 else
8caab75f 1168 tx_dev = ctlr->dev.parent;
c37f45b5 1169
8caab75f
GU
1170 if (ctlr->dma_rx)
1171 rx_dev = ctlr->dma_rx->device->dev;
409543ce
VK
1172 else if (ctlr->dma_map_dev)
1173 rx_dev = ctlr->dma_map_dev;
c37f45b5 1174 else
8caab75f 1175 rx_dev = ctlr->dev.parent;
99adef31
MB
1176
1177 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1178 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1179 continue;
1180
8caab75f
GU
1181 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1182 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
1183 }
1184
809b1b04
RG
1185 ctlr->cur_msg_mapped = false;
1186
99adef31
MB
1187 return 0;
1188}
2de440f5 1189#else /* !CONFIG_HAS_DMA */
8caab75f 1190static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
1191 struct spi_message *msg)
1192{
1193 return 0;
1194}
1195
8caab75f 1196static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1197 struct spi_message *msg)
2de440f5
GU
1198{
1199 return 0;
1200}
1201#endif /* !CONFIG_HAS_DMA */
1202
8caab75f 1203static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
1204 struct spi_message *msg)
1205{
1206 struct spi_transfer *xfer;
1207
1208 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1209 /*
1210 * Restore the original value of tx_buf or rx_buf if they are
1211 * NULL.
1212 */
8caab75f 1213 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1214 xfer->tx_buf = NULL;
8caab75f 1215 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
1216 xfer->rx_buf = NULL;
1217 }
1218
8caab75f 1219 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1220}
1221
8caab75f 1222static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1223{
1224 struct spi_transfer *xfer;
1225 void *tmp;
1226 unsigned int max_tx, max_rx;
1227
aee67fe8 1228 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1229 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU
1230 max_tx = 0;
1231 max_rx = 0;
1232
1233 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1234 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1235 !xfer->tx_buf)
1236 max_tx = max(xfer->len, max_tx);
8caab75f 1237 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1238 !xfer->rx_buf)
1239 max_rx = max(xfer->len, max_rx);
1240 }
1241
1242 if (max_tx) {
8caab75f 1243 tmp = krealloc(ctlr->dummy_tx, max_tx,
b00bab9d 1244 GFP_KERNEL | GFP_DMA | __GFP_ZERO);
2de440f5
GU
1245 if (!tmp)
1246 return -ENOMEM;
8caab75f 1247 ctlr->dummy_tx = tmp;
2de440f5
GU
1248 }
1249
1250 if (max_rx) {
8caab75f 1251 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1252 GFP_KERNEL | GFP_DMA);
1253 if (!tmp)
1254 return -ENOMEM;
8caab75f 1255 ctlr->dummy_rx = tmp;
2de440f5
GU
1256 }
1257
1258 if (max_tx || max_rx) {
1259 list_for_each_entry(xfer, &msg->transfers,
1260 transfer_list) {
5442dcaa
CL
1261 if (!xfer->len)
1262 continue;
2de440f5 1263 if (!xfer->tx_buf)
8caab75f 1264 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1265 if (!xfer->rx_buf)
8caab75f 1266 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1267 }
1268 }
1269 }
1270
8caab75f 1271 return __spi_map_msg(ctlr, msg);
2de440f5 1272}
99adef31 1273
810923f3
LR
1274static int spi_transfer_wait(struct spi_controller *ctlr,
1275 struct spi_message *msg,
1276 struct spi_transfer *xfer)
1277{
6598b91b
DJ
1278 struct spi_statistics *statm = ctlr->pcpu_statistics;
1279 struct spi_statistics *stats = msg->spi->pcpu_statistics;
6170d077 1280 u32 speed_hz = xfer->speed_hz;
49686df5 1281 unsigned long long ms;
810923f3
LR
1282
1283 if (spi_controller_is_slave(ctlr)) {
1284 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1285 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1286 return -EINTR;
1287 }
1288 } else {
6170d077
XY
1289 if (!speed_hz)
1290 speed_hz = 100000;
1291
86b8bff7
AS
1292 /*
1293 * For each byte we wait for 8 cycles of the SPI clock.
1294 * Since speed is defined in Hz and we want milliseconds,
1295 * use respective multiplier, but before the division,
1296 * otherwise we may get 0 for short transfers.
1297 */
1298 ms = 8LL * MSEC_PER_SEC * xfer->len;
6170d077 1299 do_div(ms, speed_hz);
810923f3 1300
86b8bff7
AS
1301 /*
1302 * Increase it twice and add 200 ms tolerance, use
1303 * predefined maximum in case of overflow.
1304 */
1305 ms += ms + 200;
810923f3
LR
1306 if (ms > UINT_MAX)
1307 ms = UINT_MAX;
1308
1309 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1310 msecs_to_jiffies(ms));
1311
1312 if (ms == 0) {
1313 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1314 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1315 dev_err(&msg->spi->dev,
1316 "SPI transfer timed out\n");
1317 return -ETIMEDOUT;
1318 }
1319 }
1320
1321 return 0;
1322}
1323
0ff2de8b
MS
1324static void _spi_transfer_delay_ns(u32 ns)
1325{
1326 if (!ns)
1327 return;
86b8bff7 1328 if (ns <= NSEC_PER_USEC) {
0ff2de8b
MS
1329 ndelay(ns);
1330 } else {
86b8bff7 1331 u32 us = DIV_ROUND_UP(ns, NSEC_PER_USEC);
0ff2de8b
MS
1332
1333 if (us <= 10)
1334 udelay(us);
1335 else
1336 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1337 }
1338}
1339
3984d39b 1340int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1341{
b2c98153
AA
1342 u32 delay = _delay->value;
1343 u32 unit = _delay->unit;
d5864e5b 1344 u32 hz;
0ff2de8b 1345
b2c98153
AA
1346 if (!delay)
1347 return 0;
0ff2de8b
MS
1348
1349 switch (unit) {
1350 case SPI_DELAY_UNIT_USECS:
86b8bff7 1351 delay *= NSEC_PER_USEC;
0ff2de8b 1352 break;
86b8bff7
AS
1353 case SPI_DELAY_UNIT_NSECS:
1354 /* Nothing to do here */
0ff2de8b 1355 break;
d5864e5b 1356 case SPI_DELAY_UNIT_SCK:
b2c98153
AA
1357 /* clock cycles need to be obtained from spi_transfer */
1358 if (!xfer)
1359 return -EINVAL;
86b8bff7
AS
1360 /*
1361 * If there is unknown effective speed, approximate it
1362 * by underestimating with half of the requested hz.
d5864e5b
MS
1363 */
1364 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA
1365 if (!hz)
1366 return -EINVAL;
86b8bff7
AS
1367
1368 /* Convert delay to nanoseconds */
1369 delay *= DIV_ROUND_UP(NSEC_PER_SEC, hz);
d5864e5b 1370 break;
0ff2de8b 1371 default:
b2c98153
AA
1372 return -EINVAL;
1373 }
1374
1375 return delay;
1376}
3984d39b 1377EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA
1378
1379int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1380{
1381 int delay;
1382
8fede89f
MB
1383 might_sleep();
1384
b2c98153
AA
1385 if (!_delay)
1386 return -EINVAL;
1387
3984d39b 1388 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA
1389 if (delay < 0)
1390 return delay;
1391
1392 _spi_transfer_delay_ns(delay);
1393
1394 return 0;
1395}
1396EXPORT_SYMBOL_GPL(spi_delay_exec);
1397
0ff2de8b
MS
1398static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1399 struct spi_transfer *xfer)
1400{
86b8bff7 1401 u32 default_delay_ns = 10 * NSEC_PER_USEC;
329f0dac
AA
1402 u32 delay = xfer->cs_change_delay.value;
1403 u32 unit = xfer->cs_change_delay.unit;
1404 int ret;
0ff2de8b
MS
1405
1406 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA
1407 if (!delay) {
1408 if (unit == SPI_DELAY_UNIT_USECS)
86b8bff7 1409 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1410 return;
6b3f236a 1411 }
0ff2de8b 1412
329f0dac
AA
1413 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1414 if (ret) {
0ff2de8b 1415 dev_err_once(&msg->spi->dev,
86b8bff7
AS
1416 "Use of unsupported delay unit %i, using default of %luus\n",
1417 unit, default_delay_ns / NSEC_PER_USEC);
1418 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1419 }
0ff2de8b
MS
1420}
1421
b158935f
MB
1422/*
1423 * spi_transfer_one_message - Default implementation of transfer_one_message()
1424 *
1425 * This is a standard implementation of transfer_one_message() for
8ba811a7 1426 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1427 * standard handling of delays and chip select management.
1428 */
8caab75f 1429static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1430 struct spi_message *msg)
1431{
1432 struct spi_transfer *xfer;
b158935f
MB
1433 bool keep_cs = false;
1434 int ret = 0;
6598b91b
DJ
1435 struct spi_statistics *statm = ctlr->pcpu_statistics;
1436 struct spi_statistics *stats = msg->spi->pcpu_statistics;
b158935f 1437
d347b4aa 1438 spi_set_cs(msg->spi, true, false);
b158935f 1439
eca2ebc7
MS
1440 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1441 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1442
b158935f
MB
1443 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1444 trace_spi_transfer_start(msg, xfer);
1445
8caab75f
GU
1446 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1447 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1448
b42faeee
VO
1449 if (!ctlr->ptp_sts_supported) {
1450 xfer->ptp_sts_word_pre = 0;
1451 ptp_read_system_prets(xfer->ptp_sts);
1452 }
1453
b3063203 1454 if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) {
8caab75f 1455 reinit_completion(&ctlr->xfer_completion);
b158935f 1456
809b1b04 1457fallback_pio:
8caab75f 1458 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1459 if (ret < 0) {
809b1b04
RG
1460 if (ctlr->cur_msg_mapped &&
1461 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1462 __spi_unmap_msg(ctlr, msg);
1463 ctlr->fallback = true;
1464 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1465 goto fallback_pio;
1466 }
1467
eca2ebc7
MS
1468 SPI_STATISTICS_INCREMENT_FIELD(statm,
1469 errors);
1470 SPI_STATISTICS_INCREMENT_FIELD(stats,
1471 errors);
38ec10f6
MB
1472 dev_err(&msg->spi->dev,
1473 "SPI transfer failed: %d\n", ret);
1474 goto out;
1475 }
b158935f 1476
d57e7960
MB
1477 if (ret > 0) {
1478 ret = spi_transfer_wait(ctlr, msg, xfer);
1479 if (ret < 0)
1480 msg->status = ret;
1481 }
38ec10f6
MB
1482 } else {
1483 if (xfer->len)
1484 dev_err(&msg->spi->dev,
1485 "Bufferless transfer has length %u\n",
1486 xfer->len);
13a42798 1487 }
b158935f 1488
b42faeee
VO
1489 if (!ctlr->ptp_sts_supported) {
1490 ptp_read_system_postts(xfer->ptp_sts);
1491 xfer->ptp_sts_word_post = xfer->len;
1492 }
1493
b158935f
MB
1494 trace_spi_transfer_stop(msg, xfer);
1495
1496 if (msg->status != -EINPROGRESS)
1497 goto out;
1498
bebcfd27 1499 spi_transfer_delay_exec(xfer);
b158935f
MB
1500
1501 if (xfer->cs_change) {
1502 if (list_is_last(&xfer->transfer_list,
1503 &msg->transfers)) {
1504 keep_cs = true;
1505 } else {
d347b4aa 1506 spi_set_cs(msg->spi, false, false);
0ff2de8b 1507 _spi_transfer_cs_change_delay(msg, xfer);
d347b4aa 1508 spi_set_cs(msg->spi, true, false);
b158935f
MB
1509 }
1510 }
1511
1512 msg->actual_length += xfer->len;
1513 }
1514
1515out:
1516 if (ret != 0 || !keep_cs)
d347b4aa 1517 spi_set_cs(msg->spi, false, false);
b158935f
MB
1518
1519 if (msg->status == -EINPROGRESS)
1520 msg->status = ret;
1521
8caab75f
GU
1522 if (msg->status && ctlr->handle_err)
1523 ctlr->handle_err(ctlr, msg);
b716c4ff 1524
0ed56252
MB
1525 spi_finalize_current_message(ctlr);
1526
b158935f
MB
1527 return ret;
1528}
1529
1530/**
1531 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1532 * @ctlr: the controller reporting completion
b158935f
MB
1533 *
1534 * Called by SPI drivers using the core transfer_one_message()
1535 * implementation to notify it that the current interrupt driven
9e8f4882 1536 * transfer has finished and the next one may be scheduled.
b158935f 1537 */
8caab75f 1538void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1539{
8caab75f 1540 complete(&ctlr->xfer_completion);
b158935f
MB
1541}
1542EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1543
e1268597
MB
1544static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1545{
1546 if (ctlr->auto_runtime_pm) {
1547 pm_runtime_mark_last_busy(ctlr->dev.parent);
1548 pm_runtime_put_autosuspend(ctlr->dev.parent);
1549 }
1550}
1551
ae7d2346
DJ
1552static int __spi_pump_transfer_message(struct spi_controller *ctlr,
1553 struct spi_message *msg, bool was_busy)
1554{
1555 struct spi_transfer *xfer;
1556 int ret;
1557
1558 if (!was_busy && ctlr->auto_runtime_pm) {
1559 ret = pm_runtime_get_sync(ctlr->dev.parent);
1560 if (ret < 0) {
1561 pm_runtime_put_noidle(ctlr->dev.parent);
1562 dev_err(&ctlr->dev, "Failed to power device: %d\n",
1563 ret);
1564 return ret;
1565 }
1566 }
1567
1568 if (!was_busy)
1569 trace_spi_controller_busy(ctlr);
1570
1571 if (!was_busy && ctlr->prepare_transfer_hardware) {
1572 ret = ctlr->prepare_transfer_hardware(ctlr);
1573 if (ret) {
1574 dev_err(&ctlr->dev,
1575 "failed to prepare transfer hardware: %d\n",
1576 ret);
1577
1578 if (ctlr->auto_runtime_pm)
1579 pm_runtime_put(ctlr->dev.parent);
1580
1581 msg->status = ret;
1582 spi_finalize_current_message(ctlr);
1583
1584 return ret;
1585 }
1586 }
1587
1588 trace_spi_message_start(msg);
1589
1590 if (ctlr->prepare_message) {
1591 ret = ctlr->prepare_message(ctlr, msg);
1592 if (ret) {
1593 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1594 ret);
1595 msg->status = ret;
1596 spi_finalize_current_message(ctlr);
1597 return ret;
1598 }
1599 msg->prepared = true;
1600 }
1601
1602 ret = spi_map_msg(ctlr, msg);
1603 if (ret) {
1604 msg->status = ret;
1605 spi_finalize_current_message(ctlr);
1606 return ret;
1607 }
1608
1609 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1610 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1611 xfer->ptp_sts_word_pre = 0;
1612 ptp_read_system_prets(xfer->ptp_sts);
1613 }
1614 }
1615
1616 ret = ctlr->transfer_one_message(ctlr, msg);
1617 if (ret) {
1618 dev_err(&ctlr->dev,
1619 "failed to transfer one message from queue\n");
1620 return ret;
1621 }
1622
1623 return 0;
1624}
1625
ffbbdd21 1626/**
fc9e0f71 1627 * __spi_pump_messages - function which processes spi message queue
8caab75f 1628 * @ctlr: controller to process queue for
fc9e0f71 1629 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1630 *
1631 * This function checks if there is any spi message in the queue that
1632 * needs processing and if so call out to the driver to initialize hardware
1633 * and transfer each message.
1634 *
0461a414
MB
1635 * Note that it is called both from the kthread itself and also from
1636 * inside spi_sync(); the queue extraction handling at the top of the
1637 * function should deal with this safely.
ffbbdd21 1638 */
8caab75f 1639static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1640{
d1c44c93 1641 struct spi_message *msg;
ffbbdd21 1642 bool was_busy = false;
d1c44c93 1643 unsigned long flags;
ffbbdd21
LW
1644 int ret;
1645
c1038165
DJ
1646 /* Take the IO mutex */
1647 mutex_lock(&ctlr->io_mutex);
1648
983aee5d 1649 /* Lock queue */
8caab75f 1650 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1651
1652 /* Make sure we are not already running a message */
8711a2ab 1653 if (ctlr->cur_msg)
c1038165 1654 goto out_unlock;
983aee5d
MB
1655
1656 /* Check if the queue is idle */
8caab75f 1657 if (list_empty(&ctlr->queue) || !ctlr->running) {
8711a2ab 1658 if (!ctlr->busy)
c1038165 1659 goto out_unlock;
fc9e0f71 1660
e1268597 1661 /* Defer any non-atomic teardown to the thread */
f0125f1a 1662 if (!in_kthread) {
e1268597
MB
1663 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1664 !ctlr->unprepare_transfer_hardware) {
1665 spi_idle_runtime_pm(ctlr);
1666 ctlr->busy = false;
ae7d2346 1667 ctlr->queue_empty = true;
e1268597
MB
1668 trace_spi_controller_idle(ctlr);
1669 } else {
1670 kthread_queue_work(ctlr->kworker,
1671 &ctlr->pump_messages);
1672 }
c1038165 1673 goto out_unlock;
f0125f1a
MB
1674 }
1675
1676 ctlr->busy = false;
f0125f1a
MB
1677 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1678
1679 kfree(ctlr->dummy_rx);
1680 ctlr->dummy_rx = NULL;
1681 kfree(ctlr->dummy_tx);
1682 ctlr->dummy_tx = NULL;
1683 if (ctlr->unprepare_transfer_hardware &&
1684 ctlr->unprepare_transfer_hardware(ctlr))
1685 dev_err(&ctlr->dev,
1686 "failed to unprepare transfer hardware\n");
e1268597 1687 spi_idle_runtime_pm(ctlr);
f0125f1a
MB
1688 trace_spi_controller_idle(ctlr);
1689
1690 spin_lock_irqsave(&ctlr->queue_lock, flags);
ae7d2346 1691 ctlr->queue_empty = true;
c1038165 1692 goto out_unlock;
ffbbdd21 1693 }
ffbbdd21 1694
ffbbdd21 1695 /* Extract head of queue */
d1c44c93
VO
1696 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1697 ctlr->cur_msg = msg;
ffbbdd21 1698
d1c44c93 1699 list_del_init(&msg->queue);
8caab75f 1700 if (ctlr->busy)
ffbbdd21
LW
1701 was_busy = true;
1702 else
8caab75f
GU
1703 ctlr->busy = true;
1704 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1705
ae7d2346 1706 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
8caab75f 1707 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1708
1709 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1710 if (!ret)
1711 cond_resched();
c1038165
DJ
1712 return;
1713
1714out_unlock:
8711a2ab 1715 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
c1038165 1716 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1717}
1718
fc9e0f71
MB
1719/**
1720 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1721 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1722 */
1723static void spi_pump_messages(struct kthread_work *work)
1724{
8caab75f
GU
1725 struct spi_controller *ctlr =
1726 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1727
8caab75f 1728 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1729}
1730
b42faeee 1731/**
350de7ce 1732 * spi_take_timestamp_pre - helper to collect the beginning of the TX timestamp
b42faeee
VO
1733 * @ctlr: Pointer to the spi_controller structure of the driver
1734 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1735 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1736 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1737 * transfer, for less jitter in time measurement. Only compatible
1738 * with PIO drivers. If true, must follow up with
1739 * spi_take_timestamp_post or otherwise system will crash.
1740 * WARNING: for fully predictable results, the CPU frequency must
1741 * also be under control (governor).
350de7ce
AS
1742 *
1743 * This is a helper for drivers to collect the beginning of the TX timestamp
1744 * for the requested byte from the SPI transfer. The frequency with which this
1745 * function must be called (once per word, once for the whole transfer, once
1746 * per batch of words etc) is arbitrary as long as the @tx buffer offset is
1747 * greater than or equal to the requested byte at the time of the call. The
1748 * timestamp is only taken once, at the first such call. It is assumed that
1749 * the driver advances its @tx buffer pointer monotonically.
b42faeee
VO
1750 */
1751void spi_take_timestamp_pre(struct spi_controller *ctlr,
1752 struct spi_transfer *xfer,
862dd2a9 1753 size_t progress, bool irqs_off)
b42faeee 1754{
b42faeee
VO
1755 if (!xfer->ptp_sts)
1756 return;
1757
6a726824 1758 if (xfer->timestamped)
b42faeee
VO
1759 return;
1760
6a726824 1761 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO
1762 return;
1763
1764 /* Capture the resolution of the timestamp */
862dd2a9 1765 xfer->ptp_sts_word_pre = progress;
b42faeee 1766
b42faeee
VO
1767 if (irqs_off) {
1768 local_irq_save(ctlr->irq_flags);
1769 preempt_disable();
1770 }
1771
1772 ptp_read_system_prets(xfer->ptp_sts);
1773}
1774EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1775
1776/**
350de7ce 1777 * spi_take_timestamp_post - helper to collect the end of the TX timestamp
b42faeee
VO
1778 * @ctlr: Pointer to the spi_controller structure of the driver
1779 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1780 * @progress: How many words (not bytes) have been transferred so far
b42faeee 1781 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
350de7ce
AS
1782 *
1783 * This is a helper for drivers to collect the end of the TX timestamp for
1784 * the requested byte from the SPI transfer. Can be called with an arbitrary
1785 * frequency: only the first call where @tx exceeds or is equal to the
1786 * requested word will be timestamped.
b42faeee
VO
1787 */
1788void spi_take_timestamp_post(struct spi_controller *ctlr,
1789 struct spi_transfer *xfer,
862dd2a9 1790 size_t progress, bool irqs_off)
b42faeee 1791{
b42faeee
VO
1792 if (!xfer->ptp_sts)
1793 return;
1794
6a726824 1795 if (xfer->timestamped)
b42faeee
VO
1796 return;
1797
862dd2a9 1798 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO
1799 return;
1800
1801 ptp_read_system_postts(xfer->ptp_sts);
1802
1803 if (irqs_off) {
1804 local_irq_restore(ctlr->irq_flags);
1805 preempt_enable();
1806 }
1807
1808 /* Capture the resolution of the timestamp */
862dd2a9 1809 xfer->ptp_sts_word_post = progress;
b42faeee 1810
6a726824 1811 xfer->timestamped = true;
b42faeee
VO
1812}
1813EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1814
924b5867
DA
1815/**
1816 * spi_set_thread_rt - set the controller to pump at realtime priority
1817 * @ctlr: controller to boost priority of
1818 *
1819 * This can be called because the controller requested realtime priority
1820 * (by setting the ->rt value before calling spi_register_controller()) or
1821 * because a device on the bus said that its transfers needed realtime
1822 * priority.
1823 *
1824 * NOTE: at the moment if any device on a bus says it needs realtime then
1825 * the thread will be at realtime priority for all transfers on that
1826 * controller. If this eventually becomes a problem we may see if we can
1827 * find a way to boost the priority only temporarily during relevant
1828 * transfers.
1829 */
1830static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1831{
924b5867
DA
1832 dev_info(&ctlr->dev,
1833 "will run message pump with realtime priority\n");
6d2b84a4 1834 sched_set_fifo(ctlr->kworker->task);
924b5867
DA
1835}
1836
1837static int spi_init_queue(struct spi_controller *ctlr)
1838{
8caab75f
GU
1839 ctlr->running = false;
1840 ctlr->busy = false;
ae7d2346 1841 ctlr->queue_empty = true;
ffbbdd21 1842
60a883d1
MS
1843 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
1844 if (IS_ERR(ctlr->kworker)) {
1845 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
1846 return PTR_ERR(ctlr->kworker);
ffbbdd21 1847 }
60a883d1 1848
8caab75f 1849 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1850
ffbbdd21 1851 /*
8caab75f 1852 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1853 * message pump with high (realtime) priority to reduce the transfer
1854 * latency on the bus by minimising the delay between a transfer
1855 * request and the scheduling of the message pump thread. Without this
1856 * setting the message pump thread will remain at default priority.
1857 */
924b5867
DA
1858 if (ctlr->rt)
1859 spi_set_thread_rt(ctlr);
ffbbdd21
LW
1860
1861 return 0;
1862}
1863
1864/**
1865 * spi_get_next_queued_message() - called by driver to check for queued
1866 * messages
8caab75f 1867 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1868 *
1869 * If there are more messages in the queue, the next message is returned from
1870 * this call.
97d56dc6
JMC
1871 *
1872 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1873 */
8caab75f 1874struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1875{
1876 struct spi_message *next;
1877 unsigned long flags;
1878
1879 /* get a pointer to the next message, if any */
8caab75f
GU
1880 spin_lock_irqsave(&ctlr->queue_lock, flags);
1881 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1882 queue);
8caab75f 1883 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1884
1885 return next;
1886}
1887EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1888
1889/**
1890 * spi_finalize_current_message() - the current message is complete
8caab75f 1891 * @ctlr: the controller to return the message to
ffbbdd21
LW
1892 *
1893 * Called by the driver to notify the core that the message in the front of the
1894 * queue is complete and can be removed from the queue.
1895 */
8caab75f 1896void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1897{
b42faeee 1898 struct spi_transfer *xfer;
ffbbdd21
LW
1899 struct spi_message *mesg;
1900 unsigned long flags;
2841a5fc 1901 int ret;
ffbbdd21 1902
8caab75f
GU
1903 spin_lock_irqsave(&ctlr->queue_lock, flags);
1904 mesg = ctlr->cur_msg;
1905 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1906
b42faeee
VO
1907 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1908 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1909 ptp_read_system_postts(xfer->ptp_sts);
1910 xfer->ptp_sts_word_post = xfer->len;
1911 }
1912 }
1913
6a726824
VO
1914 if (unlikely(ctlr->ptp_sts_supported))
1915 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
1916 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 1917
8caab75f 1918 spi_unmap_msg(ctlr, mesg);
99adef31 1919
350de7ce
AS
1920 /*
1921 * In the prepare_messages callback the SPI bus has the opportunity
1922 * to split a transfer to smaller chunks.
1923 *
1924 * Release the split transfers here since spi_map_msg() is done on
1925 * the split transfers.
b59a7ca1
GW
1926 */
1927 spi_res_release(ctlr, mesg);
1928
1714582a 1929 if (mesg->prepared && ctlr->unprepare_message) {
8caab75f 1930 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1931 if (ret) {
8caab75f
GU
1932 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1933 ret);
2841a5fc
MB
1934 }
1935 }
391949b6 1936
1714582a
DJ
1937 mesg->prepared = false;
1938
ae7d2346
DJ
1939 if (!mesg->sync) {
1940 /*
1941 * This message was sent via the async message queue. Handle
1942 * the queue and kick the worker thread to do the
1943 * idling/shutdown or send the next message if needed.
1944 */
1945 spin_lock_irqsave(&ctlr->queue_lock, flags);
1946 WARN(ctlr->cur_msg != mesg,
1947 "Finalizing queued message that is not the current head of queue!");
1948 ctlr->cur_msg = NULL;
1949 ctlr->fallback = false;
1950 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
1951 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1952 }
8e76ef88
MS
1953
1954 trace_spi_message_done(mesg);
2841a5fc 1955
ffbbdd21
LW
1956 mesg->state = NULL;
1957 if (mesg->complete)
1958 mesg->complete(mesg->context);
1959}
1960EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1961
8caab75f 1962static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1963{
1964 unsigned long flags;
1965
8caab75f 1966 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1967
8caab75f
GU
1968 if (ctlr->running || ctlr->busy) {
1969 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1970 return -EBUSY;
1971 }
1972
8caab75f
GU
1973 ctlr->running = true;
1974 ctlr->cur_msg = NULL;
1975 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1976
60a883d1 1977 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1978
1979 return 0;
1980}
1981
8caab75f 1982static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1983{
1984 unsigned long flags;
1985 unsigned limit = 500;
1986 int ret = 0;
1987
8caab75f 1988 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1989
1990 /*
1991 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1992 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
1993 * execution path (pump_messages) would be required to call wake_up or
1994 * friends on every SPI message. Do this instead.
1995 */
8caab75f
GU
1996 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1997 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1998 usleep_range(10000, 11000);
8caab75f 1999 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
2000 }
2001
8caab75f 2002 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
2003 ret = -EBUSY;
2004 else
8caab75f 2005 ctlr->running = false;
ffbbdd21 2006
8caab75f 2007 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2008
2009 if (ret) {
8caab75f 2010 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
2011 return ret;
2012 }
2013 return ret;
2014}
2015
8caab75f 2016static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2017{
2018 int ret;
2019
8caab75f 2020 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
2021
2022 /*
3989144f 2023 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
2024 * If the reason that stop_queue timed out is that the work will never
2025 * finish, then it does no good to call flush/stop thread, so
2026 * return anyway.
2027 */
2028 if (ret) {
8caab75f 2029 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
2030 return ret;
2031 }
2032
60a883d1 2033 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW
2034
2035 return 0;
2036}
2037
0461a414
MB
2038static int __spi_queued_transfer(struct spi_device *spi,
2039 struct spi_message *msg,
2040 bool need_pump)
ffbbdd21 2041{
8caab75f 2042 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
2043 unsigned long flags;
2044
8caab75f 2045 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2046
8caab75f
GU
2047 if (!ctlr->running) {
2048 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2049 return -ESHUTDOWN;
2050 }
2051 msg->actual_length = 0;
2052 msg->status = -EINPROGRESS;
2053
8caab75f 2054 list_add_tail(&msg->queue, &ctlr->queue);
ae7d2346 2055 ctlr->queue_empty = false;
f0125f1a 2056 if (!ctlr->busy && need_pump)
60a883d1 2057 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 2058
8caab75f 2059 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
2060 return 0;
2061}
2062
0461a414
MB
2063/**
2064 * spi_queued_transfer - transfer function for queued transfers
2065 * @spi: spi device which is requesting transfer
2066 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
2067 *
2068 * Return: zero on success, else a negative error code.
0461a414
MB
2069 */
2070static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
2071{
2072 return __spi_queued_transfer(spi, msg, true);
2073}
2074
8caab75f 2075static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2076{
2077 int ret;
2078
8caab75f
GU
2079 ctlr->transfer = spi_queued_transfer;
2080 if (!ctlr->transfer_one_message)
2081 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
2082
2083 /* Initialize and start queue */
8caab75f 2084 ret = spi_init_queue(ctlr);
ffbbdd21 2085 if (ret) {
8caab75f 2086 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
2087 goto err_init_queue;
2088 }
8caab75f
GU
2089 ctlr->queued = true;
2090 ret = spi_start_queue(ctlr);
ffbbdd21 2091 if (ret) {
8caab75f 2092 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
2093 goto err_start_queue;
2094 }
2095
2096 return 0;
2097
2098err_start_queue:
8caab75f 2099 spi_destroy_queue(ctlr);
c3676d5c 2100err_init_queue:
ffbbdd21
LW
2101 return ret;
2102}
2103
988f259b
BB
2104/**
2105 * spi_flush_queue - Send all pending messages in the queue from the callers'
2106 * context
2107 * @ctlr: controller to process queue for
2108 *
2109 * This should be used when one wants to ensure all pending messages have been
2110 * sent before doing something. Is used by the spi-mem code to make sure SPI
2111 * memory operations do not preempt regular SPI transfers that have been queued
2112 * before the spi-mem operation.
2113 */
2114void spi_flush_queue(struct spi_controller *ctlr)
2115{
2116 if (ctlr->transfer == spi_queued_transfer)
2117 __spi_pump_messages(ctlr, false);
2118}
2119
ffbbdd21
LW
2120/*-------------------------------------------------------------------------*/
2121
7cb94361 2122#if defined(CONFIG_OF)
8caab75f 2123static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 2124 struct device_node *nc)
aff5e3f8 2125{
aff5e3f8 2126 u32 value;
c2e51ac3 2127 int rc;
aff5e3f8 2128
aff5e3f8 2129 /* Mode (clock phase/polarity/etc.) */
e0bcb680 2130 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 2131 spi->mode |= SPI_CPHA;
e0bcb680 2132 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 2133 spi->mode |= SPI_CPOL;
e0bcb680 2134 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 2135 spi->mode |= SPI_3WIRE;
e0bcb680 2136 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 2137 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 2138 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW
2139 spi->mode |= SPI_CS_HIGH;
2140
aff5e3f8
PA
2141 /* Device DUAL/QUAD mode */
2142 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
2143 switch (value) {
d962608c
DB
2144 case 0:
2145 spi->mode |= SPI_NO_TX;
2146 break;
aff5e3f8
PA
2147 case 1:
2148 break;
2149 case 2:
2150 spi->mode |= SPI_TX_DUAL;
2151 break;
2152 case 4:
2153 spi->mode |= SPI_TX_QUAD;
2154 break;
6b03061f
YNG
2155 case 8:
2156 spi->mode |= SPI_TX_OCTAL;
2157 break;
aff5e3f8 2158 default:
8caab75f 2159 dev_warn(&ctlr->dev,
aff5e3f8
PA
2160 "spi-tx-bus-width %d not supported\n",
2161 value);
2162 break;
2163 }
2164 }
2165
2166 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
2167 switch (value) {
d962608c
DB
2168 case 0:
2169 spi->mode |= SPI_NO_RX;
2170 break;
aff5e3f8
PA
2171 case 1:
2172 break;
2173 case 2:
2174 spi->mode |= SPI_RX_DUAL;
2175 break;
2176 case 4:
2177 spi->mode |= SPI_RX_QUAD;
2178 break;
6b03061f
YNG
2179 case 8:
2180 spi->mode |= SPI_RX_OCTAL;
2181 break;
aff5e3f8 2182 default:
8caab75f 2183 dev_warn(&ctlr->dev,
aff5e3f8
PA
2184 "spi-rx-bus-width %d not supported\n",
2185 value);
2186 break;
2187 }
2188 }
2189
8caab75f 2190 if (spi_controller_is_slave(ctlr)) {
194276b0 2191 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
2192 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
2193 nc);
6c364062
GU
2194 return -EINVAL;
2195 }
2196 return 0;
2197 }
2198
2199 /* Device address */
2200 rc = of_property_read_u32(nc, "reg", &value);
2201 if (rc) {
25c56c88
RH
2202 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
2203 nc, rc);
6c364062
GU
2204 return rc;
2205 }
2206 spi->chip_select = value;
2207
aff5e3f8 2208 /* Device speed */
671c3bf5
CG
2209 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
2210 spi->max_speed_hz = value;
aff5e3f8 2211
c2e51ac3
GU
2212 return 0;
2213}
2214
2215static struct spi_device *
8caab75f 2216of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
2217{
2218 struct spi_device *spi;
2219 int rc;
2220
2221 /* Alloc an spi_device */
8caab75f 2222 spi = spi_alloc_device(ctlr);
c2e51ac3 2223 if (!spi) {
25c56c88 2224 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
2225 rc = -ENOMEM;
2226 goto err_out;
2227 }
2228
2229 /* Select device driver */
2230 rc = of_modalias_node(nc, spi->modalias,
2231 sizeof(spi->modalias));
2232 if (rc < 0) {
25c56c88 2233 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
2234 goto err_out;
2235 }
2236
8caab75f 2237 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
2238 if (rc)
2239 goto err_out;
2240
aff5e3f8
PA
2241 /* Store a pointer to the node in the device structure */
2242 of_node_get(nc);
2243 spi->dev.of_node = nc;
0e793ba7 2244 spi->dev.fwnode = of_fwnode_handle(nc);
aff5e3f8
PA
2245
2246 /* Register the new device */
aff5e3f8
PA
2247 rc = spi_add_device(spi);
2248 if (rc) {
25c56c88 2249 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2250 goto err_of_node_put;
aff5e3f8
PA
2251 }
2252
2253 return spi;
2254
8324147f
JH
2255err_of_node_put:
2256 of_node_put(nc);
aff5e3f8
PA
2257err_out:
2258 spi_dev_put(spi);
2259 return ERR_PTR(rc);
2260}
2261
d57a4282
GL
2262/**
2263 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2264 * @ctlr: Pointer to spi_controller device
d57a4282 2265 *
6c364062
GU
2266 * Registers an spi_device for each child node of controller node which
2267 * represents a valid SPI slave.
d57a4282 2268 */
8caab75f 2269static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
2270{
2271 struct spi_device *spi;
2272 struct device_node *nc;
d57a4282 2273
8caab75f 2274 if (!ctlr->dev.of_node)
d57a4282
GL
2275 return;
2276
8caab75f 2277 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
2278 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2279 continue;
8caab75f 2280 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2281 if (IS_ERR(spi)) {
8caab75f 2282 dev_warn(&ctlr->dev,
25c56c88 2283 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
2284 of_node_clear_flag(nc, OF_POPULATED);
2285 }
d57a4282
GL
2286 }
2287}
2288#else
8caab75f 2289static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
2290#endif
2291
0c79378c
SR
2292/**
2293 * spi_new_ancillary_device() - Register ancillary SPI device
2294 * @spi: Pointer to the main SPI device registering the ancillary device
2295 * @chip_select: Chip Select of the ancillary device
2296 *
2297 * Register an ancillary SPI device; for example some chips have a chip-select
2298 * for normal device usage and another one for setup/firmware upload.
2299 *
2300 * This may only be called from main SPI device's probe routine.
2301 *
2302 * Return: 0 on success; negative errno on failure
2303 */
2304struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
2305 u8 chip_select)
2306{
2307 struct spi_device *ancillary;
2308 int rc = 0;
2309
2310 /* Alloc an spi_device */
2311 ancillary = spi_alloc_device(spi->controller);
2312 if (!ancillary) {
2313 rc = -ENOMEM;
2314 goto err_out;
2315 }
2316
2317 strlcpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
2318
2319 /* Use provided chip-select for ancillary device */
2320 ancillary->chip_select = chip_select;
2321
2322 /* Take over SPI mode/speed from SPI main device */
2323 ancillary->max_speed_hz = spi->max_speed_hz;
b01d5506 2324 ancillary->mode = spi->mode;
0c79378c
SR
2325
2326 /* Register the new device */
2327 rc = spi_add_device_locked(ancillary);
2328 if (rc) {
2329 dev_err(&spi->dev, "failed to register ancillary device\n");
2330 goto err_out;
2331 }
2332
2333 return ancillary;
2334
2335err_out:
2336 spi_dev_put(ancillary);
2337 return ERR_PTR(rc);
2338}
2339EXPORT_SYMBOL_GPL(spi_new_ancillary_device);
2340
64bee4d2 2341#ifdef CONFIG_ACPI
4c3c5954
AB
2342struct acpi_spi_lookup {
2343 struct spi_controller *ctlr;
2344 u32 max_speed_hz;
2345 u32 mode;
2346 int irq;
2347 u8 bits_per_word;
2348 u8 chip_select;
87e59b36
SB
2349 int n;
2350 int index;
4c3c5954
AB
2351};
2352
e612af7a
SB
2353static int acpi_spi_count(struct acpi_resource *ares, void *data)
2354{
2355 struct acpi_resource_spi_serialbus *sb;
2356 int *count = data;
2357
2358 if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
2359 return 1;
2360
2361 sb = &ares->data.spi_serial_bus;
2362 if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_SPI)
2363 return 1;
2364
2365 *count = *count + 1;
2366
2367 return 1;
2368}
2369
2370/**
2371 * acpi_spi_count_resources - Count the number of SpiSerialBus resources
2372 * @adev: ACPI device
2373 *
2374 * Returns the number of SpiSerialBus resources in the ACPI-device's
2375 * resource-list; or a negative error code.
2376 */
2377int acpi_spi_count_resources(struct acpi_device *adev)
2378{
2379 LIST_HEAD(r);
2380 int count = 0;
2381 int ret;
2382
2383 ret = acpi_dev_get_resources(adev, &r, acpi_spi_count, &count);
2384 if (ret < 0)
2385 return ret;
2386
2387 acpi_dev_free_resource_list(&r);
2388
2389 return count;
2390}
2391EXPORT_SYMBOL_GPL(acpi_spi_count_resources);
2392
4c3c5954
AB
2393static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2394 struct acpi_spi_lookup *lookup)
8a2e487e 2395{
8a2e487e
LW
2396 const union acpi_object *obj;
2397
2398 if (!x86_apple_machine)
2399 return;
2400
2401 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2402 && obj->buffer.length >= 4)
4c3c5954 2403 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW
2404
2405 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2406 && obj->buffer.length == 8)
4c3c5954 2407 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW
2408
2409 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2410 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2411 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW
2412
2413 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2414 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2415 lookup->mode |= SPI_CPOL;
8a2e487e
LW
2416
2417 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2418 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2419 lookup->mode |= SPI_CPHA;
8a2e487e
LW
2420}
2421
87e59b36
SB
2422static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev);
2423
64bee4d2
MW
2424static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2425{
4c3c5954
AB
2426 struct acpi_spi_lookup *lookup = data;
2427 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW
2428
2429 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2430 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB
2431 acpi_handle parent_handle;
2432 acpi_status status;
64bee4d2
MW
2433
2434 sb = &ares->data.spi_serial_bus;
2435 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954 2436
87e59b36
SB
2437 if (lookup->index != -1 && lookup->n++ != lookup->index)
2438 return 1;
2439
2440 if (lookup->index == -1 && !ctlr)
2441 return -ENODEV;
2442
4c3c5954
AB
2443 status = acpi_get_handle(NULL,
2444 sb->resource_source.string_ptr,
2445 &parent_handle);
2446
87e59b36 2447 if (ACPI_FAILURE(status))
4c3c5954
AB
2448 return -ENODEV;
2449
87e59b36
SB
2450 if (ctlr) {
2451 if (ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2452 return -ENODEV;
2453 } else {
2454 struct acpi_device *adev;
2455
ac2a3fee
RW
2456 adev = acpi_fetch_acpi_dev(parent_handle);
2457 if (!adev)
87e59b36
SB
2458 return -ENODEV;
2459
2460 ctlr = acpi_spi_find_controller_by_adev(adev);
2461 if (!ctlr)
2462 return -ENODEV;
2463
2464 lookup->ctlr = ctlr;
2465 }
2466
a0a90718
MW
2467 /*
2468 * ACPI DeviceSelection numbering is handled by the
2469 * host controller driver in Windows and can vary
2470 * from driver to driver. In Linux we always expect
2471 * 0 .. max - 1 so we need to ask the driver to
2472 * translate between the two schemes.
2473 */
8caab75f
GU
2474 if (ctlr->fw_translate_cs) {
2475 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
2476 sb->device_selection);
2477 if (cs < 0)
2478 return cs;
4c3c5954 2479 lookup->chip_select = cs;
a0a90718 2480 } else {
4c3c5954 2481 lookup->chip_select = sb->device_selection;
a0a90718
MW
2482 }
2483
4c3c5954 2484 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2485 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW
2486
2487 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2488 lookup->mode |= SPI_CPHA;
64bee4d2 2489 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2490 lookup->mode |= SPI_CPOL;
64bee4d2 2491 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2492 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2493 }
4c3c5954 2494 } else if (lookup->irq < 0) {
64bee4d2
MW
2495 struct resource r;
2496
2497 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2498 lookup->irq = r.start;
64bee4d2
MW
2499 }
2500
2501 /* Always tell the ACPI core to skip this resource */
2502 return 1;
2503}
2504
000bee0e
SB
2505/**
2506 * acpi_spi_device_alloc - Allocate a spi device, and fill it in with ACPI information
2507 * @ctlr: controller to which the spi device belongs
2508 * @adev: ACPI Device for the spi device
87e59b36 2509 * @index: Index of the spi resource inside the ACPI Node
000bee0e
SB
2510 *
2511 * This should be used to allocate a new spi device from and ACPI Node.
2512 * The caller is responsible for calling spi_add_device to register the spi device.
2513 *
87e59b36
SB
2514 * If ctlr is set to NULL, the Controller for the spi device will be looked up
2515 * using the resource.
2516 * If index is set to -1, index is not used.
2517 * Note: If index is -1, ctlr must be set.
2518 *
000bee0e
SB
2519 * Return: a pointer to the new device, or ERR_PTR on error.
2520 */
2521struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
87e59b36
SB
2522 struct acpi_device *adev,
2523 int index)
64bee4d2 2524{
4c3c5954 2525 acpi_handle parent_handle = NULL;
64bee4d2 2526 struct list_head resource_list;
b28944c6 2527 struct acpi_spi_lookup lookup = {};
64bee4d2
MW
2528 struct spi_device *spi;
2529 int ret;
2530
87e59b36
SB
2531 if (!ctlr && index == -1)
2532 return ERR_PTR(-EINVAL);
2533
4c3c5954 2534 lookup.ctlr = ctlr;
4c3c5954 2535 lookup.irq = -1;
87e59b36
SB
2536 lookup.index = index;
2537 lookup.n = 0;
64bee4d2
MW
2538
2539 INIT_LIST_HEAD(&resource_list);
2540 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2541 acpi_spi_add_resource, &lookup);
64bee4d2
MW
2542 acpi_dev_free_resource_list(&resource_list);
2543
4c3c5954
AB
2544 if (ret < 0)
2545 /* found SPI in _CRS but it points to another controller */
000bee0e 2546 return ERR_PTR(-ENODEV);
8a2e487e 2547
4c3c5954 2548 if (!lookup.max_speed_hz &&
10e92724 2549 ACPI_SUCCESS(acpi_get_parent(adev->handle, &parent_handle)) &&
87e59b36 2550 ACPI_HANDLE(lookup.ctlr->dev.parent) == parent_handle) {
4c3c5954
AB
2551 /* Apple does not use _CRS but nested devices for SPI slaves */
2552 acpi_spi_parse_apple_properties(adev, &lookup);
2553 }
2554
2555 if (!lookup.max_speed_hz)
000bee0e 2556 return ERR_PTR(-ENODEV);
4c3c5954 2557
87e59b36 2558 spi = spi_alloc_device(lookup.ctlr);
4c3c5954 2559 if (!spi) {
87e59b36 2560 dev_err(&lookup.ctlr->dev, "failed to allocate SPI device for %s\n",
4c3c5954 2561 dev_name(&adev->dev));
000bee0e 2562 return ERR_PTR(-ENOMEM);
64bee4d2
MW
2563 }
2564
4c3c5954
AB
2565 ACPI_COMPANION_SET(&spi->dev, adev);
2566 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2567 spi->mode |= lookup.mode;
4c3c5954
AB
2568 spi->irq = lookup.irq;
2569 spi->bits_per_word = lookup.bits_per_word;
2570 spi->chip_select = lookup.chip_select;
2571
000bee0e
SB
2572 return spi;
2573}
2574EXPORT_SYMBOL_GPL(acpi_spi_device_alloc);
2575
2576static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
2577 struct acpi_device *adev)
2578{
2579 struct spi_device *spi;
2580
2581 if (acpi_bus_get_status(adev) || !adev->status.present ||
2582 acpi_device_enumerated(adev))
2583 return AE_OK;
2584
87e59b36 2585 spi = acpi_spi_device_alloc(ctlr, adev, -1);
000bee0e
SB
2586 if (IS_ERR(spi)) {
2587 if (PTR_ERR(spi) == -ENOMEM)
2588 return AE_NO_MEMORY;
2589 else
2590 return AE_OK;
2591 }
2592
0c6543f6
DD
2593 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2594 sizeof(spi->modalias));
2595
33ada67d
CR
2596 if (spi->irq < 0)
2597 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2598
7f24467f
OP
2599 acpi_device_set_enumerated(adev);
2600
33cf00e5 2601 adev->power.flags.ignore_parent = true;
64bee4d2 2602 if (spi_add_device(spi)) {
33cf00e5 2603 adev->power.flags.ignore_parent = false;
8caab75f 2604 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
2605 dev_name(&adev->dev));
2606 spi_dev_put(spi);
2607 }
2608
2609 return AE_OK;
2610}
2611
7f24467f
OP
2612static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2613 void *data, void **return_value)
2614{
7030c428 2615 struct acpi_device *adev = acpi_fetch_acpi_dev(handle);
8caab75f 2616 struct spi_controller *ctlr = data;
7f24467f 2617
7030c428 2618 if (!adev)
7f24467f
OP
2619 return AE_OK;
2620
8caab75f 2621 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
2622}
2623
4c3c5954
AB
2624#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2625
8caab75f 2626static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
2627{
2628 acpi_status status;
2629 acpi_handle handle;
2630
8caab75f 2631 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
2632 if (!handle)
2633 return;
2634
4c3c5954
AB
2635 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2636 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2637 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2638 if (ACPI_FAILURE(status))
8caab75f 2639 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
2640}
2641#else
8caab75f 2642static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
2643#endif /* CONFIG_ACPI */
2644
8caab75f 2645static void spi_controller_release(struct device *dev)
8ae12a0d 2646{
8caab75f 2647 struct spi_controller *ctlr;
8ae12a0d 2648
8caab75f
GU
2649 ctlr = container_of(dev, struct spi_controller, dev);
2650 kfree(ctlr);
8ae12a0d
DB
2651}
2652
2653static struct class spi_master_class = {
2654 .name = "spi_master",
2655 .owner = THIS_MODULE,
8caab75f 2656 .dev_release = spi_controller_release,
eca2ebc7 2657 .dev_groups = spi_master_groups,
8ae12a0d
DB
2658};
2659
6c364062
GU
2660#ifdef CONFIG_SPI_SLAVE
2661/**
2662 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2663 * controller
2664 * @spi: device used for the current transfer
2665 */
2666int spi_slave_abort(struct spi_device *spi)
2667{
8caab75f 2668 struct spi_controller *ctlr = spi->controller;
6c364062 2669
8caab75f
GU
2670 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2671 return ctlr->slave_abort(ctlr);
6c364062
GU
2672
2673 return -ENOTSUPP;
2674}
2675EXPORT_SYMBOL_GPL(spi_slave_abort);
2676
2677static int match_true(struct device *dev, void *data)
2678{
2679 return 1;
2680}
2681
cc8b4659
GU
2682static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2683 char *buf)
6c364062 2684{
8caab75f
GU
2685 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2686 dev);
6c364062
GU
2687 struct device *child;
2688
2689 child = device_find_child(&ctlr->dev, NULL, match_true);
2690 return sprintf(buf, "%s\n",
2691 child ? to_spi_device(child)->modalias : NULL);
2692}
2693
cc8b4659
GU
2694static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2695 const char *buf, size_t count)
6c364062 2696{
8caab75f
GU
2697 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2698 dev);
6c364062
GU
2699 struct spi_device *spi;
2700 struct device *child;
2701 char name[32];
2702 int rc;
2703
2704 rc = sscanf(buf, "%31s", name);
2705 if (rc != 1 || !name[0])
2706 return -EINVAL;
2707
2708 child = device_find_child(&ctlr->dev, NULL, match_true);
2709 if (child) {
2710 /* Remove registered slave */
2711 device_unregister(child);
2712 put_device(child);
2713 }
2714
2715 if (strcmp(name, "(null)")) {
2716 /* Register new slave */
2717 spi = spi_alloc_device(ctlr);
2718 if (!spi)
2719 return -ENOMEM;
2720
2721 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2722
2723 rc = spi_add_device(spi);
2724 if (rc) {
2725 spi_dev_put(spi);
2726 return rc;
2727 }
2728 }
2729
2730 return count;
2731}
2732
cc8b4659 2733static DEVICE_ATTR_RW(slave);
6c364062
GU
2734
2735static struct attribute *spi_slave_attrs[] = {
2736 &dev_attr_slave.attr,
2737 NULL,
2738};
2739
2740static const struct attribute_group spi_slave_group = {
2741 .attrs = spi_slave_attrs,
2742};
2743
2744static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2745 &spi_controller_statistics_group,
6c364062
GU
2746 &spi_slave_group,
2747 NULL,
2748};
2749
2750static struct class spi_slave_class = {
2751 .name = "spi_slave",
2752 .owner = THIS_MODULE,
8caab75f 2753 .dev_release = spi_controller_release,
6c364062
GU
2754 .dev_groups = spi_slave_groups,
2755};
2756#else
2757extern struct class spi_slave_class; /* dummy */
2758#endif
8ae12a0d
DB
2759
2760/**
6c364062 2761 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2762 * @dev: the controller, possibly using the platform_bus
33e34dc6 2763 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW
2764 * memory is in the driver_data field of the returned device, accessible
2765 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2766 * drivers granting DMA access to portions of their private data need to
2767 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU
2768 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2769 * slave (true) controller
33e34dc6 2770 * Context: can sleep
8ae12a0d 2771 *
6c364062 2772 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2773 * only ones directly touching chip registers. It's how they allocate
8caab75f 2774 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2775 *
97d56dc6 2776 * This must be called from context that can sleep.
8ae12a0d 2777 *
6c364062 2778 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
2779 * controller's methods before calling spi_register_controller(); and (after
2780 * errors adding the device) calling spi_controller_put() to prevent a memory
2781 * leak.
97d56dc6 2782 *
6c364062 2783 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2784 */
8caab75f
GU
2785struct spi_controller *__spi_alloc_controller(struct device *dev,
2786 unsigned int size, bool slave)
8ae12a0d 2787{
8caab75f 2788 struct spi_controller *ctlr;
229e6af1 2789 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2790
0c868461
DB
2791 if (!dev)
2792 return NULL;
2793
229e6af1 2794 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2795 if (!ctlr)
8ae12a0d
DB
2796 return NULL;
2797
8caab75f 2798 device_initialize(&ctlr->dev);
16a8e2fb
UKK
2799 INIT_LIST_HEAD(&ctlr->queue);
2800 spin_lock_init(&ctlr->queue_lock);
2801 spin_lock_init(&ctlr->bus_lock_spinlock);
2802 mutex_init(&ctlr->bus_lock_mutex);
2803 mutex_init(&ctlr->io_mutex);
2804 mutex_init(&ctlr->add_lock);
8caab75f
GU
2805 ctlr->bus_num = -1;
2806 ctlr->num_chipselect = 1;
2807 ctlr->slave = slave;
6c364062 2808 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2809 ctlr->dev.class = &spi_slave_class;
6c364062 2810 else
8caab75f
GU
2811 ctlr->dev.class = &spi_master_class;
2812 ctlr->dev.parent = dev;
2813 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2814 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2815
8caab75f 2816 return ctlr;
8ae12a0d 2817}
6c364062 2818EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2819
5e844cc3
LW
2820static void devm_spi_release_controller(struct device *dev, void *ctlr)
2821{
2822 spi_controller_put(*(struct spi_controller **)ctlr);
2823}
2824
2825/**
2826 * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller()
2827 * @dev: physical device of SPI controller
2828 * @size: how much zeroed driver-private data to allocate
2829 * @slave: whether to allocate an SPI master (false) or SPI slave (true)
2830 * Context: can sleep
2831 *
2832 * Allocate an SPI controller and automatically release a reference on it
2833 * when @dev is unbound from its driver. Drivers are thus relieved from
2834 * having to call spi_controller_put().
2835 *
2836 * The arguments to this function are identical to __spi_alloc_controller().
2837 *
2838 * Return: the SPI controller structure on success, else NULL.
2839 */
2840struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
2841 unsigned int size,
2842 bool slave)
2843{
2844 struct spi_controller **ptr, *ctlr;
2845
2846 ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr),
2847 GFP_KERNEL);
2848 if (!ptr)
2849 return NULL;
2850
2851 ctlr = __spi_alloc_controller(dev, size, slave);
2852 if (ctlr) {
794aaf01 2853 ctlr->devm_allocated = true;
5e844cc3
LW
2854 *ptr = ctlr;
2855 devres_add(dev, ptr);
2856 } else {
2857 devres_free(ptr);
2858 }
2859
2860 return ctlr;
2861}
2862EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller);
2863
f3186dd8
LW
2864/**
2865 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2866 * @ctlr: The SPI master to grab GPIO descriptors for
2867 */
2868static int spi_get_gpio_descs(struct spi_controller *ctlr)
2869{
2870 int nb, i;
2871 struct gpio_desc **cs;
2872 struct device *dev = &ctlr->dev;
7d93aecd
GU
2873 unsigned long native_cs_mask = 0;
2874 unsigned int num_cs_gpios = 0;
f3186dd8
LW
2875
2876 nb = gpiod_count(dev, "cs");
31ed8ebc
AS
2877 if (nb < 0) {
2878 /* No GPIOs at all is fine, else return the error */
2879 if (nb == -ENOENT)
2880 return 0;
f3186dd8 2881 return nb;
31ed8ebc
AS
2882 }
2883
2884 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
f3186dd8
LW
2885
2886 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2887 GFP_KERNEL);
2888 if (!cs)
2889 return -ENOMEM;
2890 ctlr->cs_gpiods = cs;
2891
2892 for (i = 0; i < nb; i++) {
2893 /*
2894 * Most chipselects are active low, the inverted
2895 * semantics are handled by special quirks in gpiolib,
2896 * so initializing them GPIOD_OUT_LOW here means
2897 * "unasserted", in most cases this will drive the physical
2898 * line high.
2899 */
2900 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2901 GPIOD_OUT_LOW);
1723fdec
GU
2902 if (IS_ERR(cs[i]))
2903 return PTR_ERR(cs[i]);
f3186dd8
LW
2904
2905 if (cs[i]) {
2906 /*
2907 * If we find a CS GPIO, name it after the device and
2908 * chip select line.
2909 */
2910 char *gpioname;
2911
2912 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2913 dev_name(dev), i);
2914 if (!gpioname)
2915 return -ENOMEM;
2916 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU
2917 num_cs_gpios++;
2918 continue;
f3186dd8 2919 }
7d93aecd
GU
2920
2921 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
2922 dev_err(dev, "Invalid native chip select %d\n", i);
2923 return -EINVAL;
f3186dd8 2924 }
7d93aecd
GU
2925 native_cs_mask |= BIT(i);
2926 }
2927
f60d7270 2928 ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
dbaca8e5
AS
2929
2930 if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
2931 ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
7d93aecd
GU
2932 dev_err(dev, "No unused native chip select available\n");
2933 return -EINVAL;
f3186dd8
LW
2934 }
2935
2936 return 0;
2937}
2938
bdf3a3b5
BB
2939static int spi_controller_check_ops(struct spi_controller *ctlr)
2940{
2941 /*
b5932f5c
BB
2942 * The controller may implement only the high-level SPI-memory like
2943 * operations if it does not support regular SPI transfers, and this is
2944 * valid use case.
2945 * If ->mem_ops is NULL, we request that at least one of the
2946 * ->transfer_xxx() method be implemented.
bdf3a3b5 2947 */
b5932f5c
BB
2948 if (ctlr->mem_ops) {
2949 if (!ctlr->mem_ops->exec_op)
2950 return -EINVAL;
2951 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2952 !ctlr->transfer_one_message) {
bdf3a3b5 2953 return -EINVAL;
b5932f5c 2954 }
bdf3a3b5
BB
2955
2956 return 0;
2957}
2958
8ae12a0d 2959/**
8caab75f
GU
2960 * spi_register_controller - register SPI master or slave controller
2961 * @ctlr: initialized master, originally from spi_alloc_master() or
2962 * spi_alloc_slave()
33e34dc6 2963 * Context: can sleep
8ae12a0d 2964 *
8caab75f 2965 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2966 * such as the platform bus. The final stage of probe() in that code
8caab75f 2967 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2968 *
2969 * SPI controllers use board specific (often SOC specific) bus numbers,
2970 * and board-specific addressing for SPI devices combines those numbers
2971 * with chip select numbers. Since SPI does not directly support dynamic
2972 * device identification, boards need configuration tables telling which
2973 * chip is at which address.
2974 *
2975 * This must be called from context that can sleep. It returns zero on
8caab75f 2976 * success, else a negative error code (dropping the controller's refcount).
0c868461 2977 * After a successful return, the caller is responsible for calling
8caab75f 2978 * spi_unregister_controller().
97d56dc6
JMC
2979 *
2980 * Return: zero on success, else a negative error code.
8ae12a0d 2981 */
8caab75f 2982int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2983{
8caab75f 2984 struct device *dev = ctlr->dev.parent;
2b9603a0 2985 struct boardinfo *bi;
b93318a2 2986 int status;
42bdd706 2987 int id, first_dynamic;
8ae12a0d 2988
0c868461
DB
2989 if (!dev)
2990 return -ENODEV;
2991
bdf3a3b5
BB
2992 /*
2993 * Make sure all necessary hooks are implemented before registering
2994 * the SPI controller.
2995 */
2996 status = spi_controller_check_ops(ctlr);
2997 if (status)
2998 return status;
2999
04b2d03a
GU
3000 if (ctlr->bus_num >= 0) {
3001 /* devices with a fixed bus num must check-in with the num */
3002 mutex_lock(&board_lock);
3003 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
3004 ctlr->bus_num + 1, GFP_KERNEL);
3005 mutex_unlock(&board_lock);
3006 if (WARN(id < 0, "couldn't get idr"))
3007 return id == -ENOSPC ? -EBUSY : id;
3008 ctlr->bus_num = id;
3009 } else if (ctlr->dev.of_node) {
3010 /* allocate dynamic bus number using Linux idr */
9b61e302
SM
3011 id = of_alias_get_id(ctlr->dev.of_node, "spi");
3012 if (id >= 0) {
3013 ctlr->bus_num = id;
3014 mutex_lock(&board_lock);
3015 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
3016 ctlr->bus_num + 1, GFP_KERNEL);
3017 mutex_unlock(&board_lock);
3018 if (WARN(id < 0, "couldn't get idr"))
3019 return id == -ENOSPC ? -EBUSY : id;
3020 }
3021 }
8caab75f 3022 if (ctlr->bus_num < 0) {
42bdd706
LS
3023 first_dynamic = of_alias_get_highest_id("spi");
3024 if (first_dynamic < 0)
3025 first_dynamic = 0;
3026 else
3027 first_dynamic++;
3028
9a9a047a 3029 mutex_lock(&board_lock);
42bdd706
LS
3030 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
3031 0, GFP_KERNEL);
9a9a047a
SM
3032 mutex_unlock(&board_lock);
3033 if (WARN(id < 0, "couldn't get idr"))
3034 return id;
3035 ctlr->bus_num = id;
8ae12a0d 3036 }
8caab75f
GU
3037 ctlr->bus_lock_flag = 0;
3038 init_completion(&ctlr->xfer_completion);
3039 if (!ctlr->max_dma_len)
3040 ctlr->max_dma_len = INT_MAX;
cf32b71e 3041
350de7ce
AS
3042 /*
3043 * Register the device, then userspace will see it.
3044 * Registration fails if the bus ID is in use.
8ae12a0d 3045 */
8caab75f 3046 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4 3047
f48dc6b9
LW
3048 if (!spi_controller_is_slave(ctlr) && ctlr->use_gpio_descriptors) {
3049 status = spi_get_gpio_descs(ctlr);
3050 if (status)
3051 goto free_bus_id;
3052 /*
3053 * A controller using GPIO descriptors always
3054 * supports SPI_CS_HIGH if need be.
3055 */
3056 ctlr->mode_bits |= SPI_CS_HIGH;
0a919ae4
AS
3057 }
3058
f9481b08
TA
3059 /*
3060 * Even if it's just one always-selected device, there must
3061 * be at least one chipselect.
3062 */
f9981d4f
AK
3063 if (!ctlr->num_chipselect) {
3064 status = -EINVAL;
3065 goto free_bus_id;
3066 }
f9481b08 3067
6bb477df
YZ
3068 /* setting last_cs to -1 means no chip selected */
3069 ctlr->last_cs = -1;
3070
8caab75f 3071 status = device_add(&ctlr->dev);
f9981d4f
AK
3072 if (status < 0)
3073 goto free_bus_id;
9b61e302 3074 dev_dbg(dev, "registered %s %s\n",
8caab75f 3075 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 3076 dev_name(&ctlr->dev));
8ae12a0d 3077
b5932f5c
BB
3078 /*
3079 * If we're using a queued driver, start the queue. Note that we don't
3080 * need the queueing logic if the driver is only supporting high-level
3081 * memory operations.
3082 */
3083 if (ctlr->transfer) {
8caab75f 3084 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 3085 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 3086 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 3087 if (status) {
8caab75f 3088 device_del(&ctlr->dev);
f9981d4f 3089 goto free_bus_id;
ffbbdd21
LW
3090 }
3091 }
eca2ebc7 3092 /* add statistics */
6598b91b
DJ
3093 ctlr->pcpu_statistics = spi_alloc_pcpu_stats(dev);
3094 if (!ctlr->pcpu_statistics) {
3095 dev_err(dev, "Error allocating per-cpu statistics\n");
d52b095b 3096 status = -ENOMEM;
6598b91b
DJ
3097 goto destroy_queue;
3098 }
ffbbdd21 3099
2b9603a0 3100 mutex_lock(&board_lock);
8caab75f 3101 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 3102 list_for_each_entry(bi, &board_list, list)
8caab75f 3103 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
3104 mutex_unlock(&board_lock);
3105
64bee4d2 3106 /* Register devices from the device tree and ACPI */
8caab75f
GU
3107 of_register_spi_devices(ctlr);
3108 acpi_register_spi_devices(ctlr);
f9981d4f
AK
3109 return status;
3110
6598b91b
DJ
3111destroy_queue:
3112 spi_destroy_queue(ctlr);
f9981d4f
AK
3113free_bus_id:
3114 mutex_lock(&board_lock);
3115 idr_remove(&spi_master_idr, ctlr->bus_num);
3116 mutex_unlock(&board_lock);
8ae12a0d
DB
3117 return status;
3118}
8caab75f 3119EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 3120
59ebbe40 3121static void devm_spi_unregister(void *ctlr)
666d5b4c 3122{
59ebbe40 3123 spi_unregister_controller(ctlr);
666d5b4c
MB
3124}
3125
3126/**
8caab75f
GU
3127 * devm_spi_register_controller - register managed SPI master or slave
3128 * controller
3129 * @dev: device managing SPI controller
3130 * @ctlr: initialized controller, originally from spi_alloc_master() or
3131 * spi_alloc_slave()
666d5b4c
MB
3132 * Context: can sleep
3133 *
8caab75f 3134 * Register a SPI device as with spi_register_controller() which will
68b892f1 3135 * automatically be unregistered and freed.
97d56dc6
JMC
3136 *
3137 * Return: zero on success, else a negative error code.
666d5b4c 3138 */
8caab75f
GU
3139int devm_spi_register_controller(struct device *dev,
3140 struct spi_controller *ctlr)
666d5b4c 3141{
666d5b4c
MB
3142 int ret;
3143
8caab75f 3144 ret = spi_register_controller(ctlr);
59ebbe40
TT
3145 if (ret)
3146 return ret;
666d5b4c 3147
59ebbe40 3148 return devm_add_action_or_reset(dev, devm_spi_unregister, ctlr);
666d5b4c 3149}
8caab75f 3150EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 3151
34860089 3152static int __unregister(struct device *dev, void *null)
8ae12a0d 3153{
34860089 3154 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
3155 return 0;
3156}
3157
3158/**
8caab75f
GU
3159 * spi_unregister_controller - unregister SPI master or slave controller
3160 * @ctlr: the controller being unregistered
33e34dc6 3161 * Context: can sleep
8ae12a0d 3162 *
8caab75f 3163 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
3164 * only ones directly touching chip registers.
3165 *
3166 * This must be called from context that can sleep.
68b892f1
JH
3167 *
3168 * Note that this function also drops a reference to the controller.
8ae12a0d 3169 */
8caab75f 3170void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 3171{
9b61e302 3172 struct spi_controller *found;
67f7b278 3173 int id = ctlr->bus_num;
89fc9a1a 3174
ddf75be4
LW
3175 /* Prevent addition of new devices, unregister existing ones */
3176 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3177 mutex_lock(&ctlr->add_lock);
ddf75be4 3178
84855678
LW
3179 device_for_each_child(&ctlr->dev, NULL, __unregister);
3180
9b61e302
SM
3181 /* First make sure that this controller was ever added */
3182 mutex_lock(&board_lock);
67f7b278 3183 found = idr_find(&spi_master_idr, id);
9b61e302 3184 mutex_unlock(&board_lock);
8caab75f
GU
3185 if (ctlr->queued) {
3186 if (spi_destroy_queue(ctlr))
3187 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 3188 }
2b9603a0 3189 mutex_lock(&board_lock);
8caab75f 3190 list_del(&ctlr->list);
2b9603a0
FT
3191 mutex_unlock(&board_lock);
3192
5e844cc3
LW
3193 device_del(&ctlr->dev);
3194
9b61e302
SM
3195 /* free bus id */
3196 mutex_lock(&board_lock);
613bd1ea
JN
3197 if (found == ctlr)
3198 idr_remove(&spi_master_idr, id);
9b61e302 3199 mutex_unlock(&board_lock);
ddf75be4
LW
3200
3201 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3202 mutex_unlock(&ctlr->add_lock);
6c53b45c
MW
3203
3204 /* Release the last reference on the controller if its driver
3205 * has not yet been converted to devm_spi_alloc_master/slave().
3206 */
3207 if (!ctlr->devm_allocated)
3208 put_device(&ctlr->dev);
8ae12a0d 3209}
8caab75f 3210EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 3211
8caab75f 3212int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
3213{
3214 int ret;
3215
8caab75f
GU
3216 /* Basically no-ops for non-queued controllers */
3217 if (!ctlr->queued)
ffbbdd21
LW
3218 return 0;
3219
8caab75f 3220 ret = spi_stop_queue(ctlr);
ffbbdd21 3221 if (ret)
8caab75f 3222 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
3223
3224 return ret;
3225}
8caab75f 3226EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 3227
8caab75f 3228int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
3229{
3230 int ret;
3231
8caab75f 3232 if (!ctlr->queued)
ffbbdd21
LW
3233 return 0;
3234
8caab75f 3235 ret = spi_start_queue(ctlr);
ffbbdd21 3236 if (ret)
8caab75f 3237 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
3238
3239 return ret;
3240}
8caab75f 3241EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 3242
8ae12a0d
DB
3243/*-------------------------------------------------------------------------*/
3244
523baf5a
MS
3245/* Core methods for spi_message alterations */
3246
8caab75f 3247static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
3248 struct spi_message *msg,
3249 void *res)
3250{
3251 struct spi_replaced_transfers *rxfer = res;
3252 size_t i;
3253
3254 /* call extra callback if requested */
3255 if (rxfer->release)
8caab75f 3256 rxfer->release(ctlr, msg, res);
523baf5a
MS
3257
3258 /* insert replaced transfers back into the message */
3259 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
3260
3261 /* remove the formerly inserted entries */
3262 for (i = 0; i < rxfer->inserted; i++)
3263 list_del(&rxfer->inserted_transfers[i].transfer_list);
3264}
3265
3266/**
3267 * spi_replace_transfers - replace transfers with several transfers
3268 * and register change with spi_message.resources
3269 * @msg: the spi_message we work upon
3270 * @xfer_first: the first spi_transfer we want to replace
3271 * @remove: number of transfers to remove
3272 * @insert: the number of transfers we want to insert instead
3273 * @release: extra release code necessary in some circumstances
3274 * @extradatasize: extra data to allocate (with alignment guarantees
3275 * of struct @spi_transfer)
05885397 3276 * @gfp: gfp flags
523baf5a
MS
3277 *
3278 * Returns: pointer to @spi_replaced_transfers,
3279 * PTR_ERR(...) in case of errors.
3280 */
da21fde0 3281static struct spi_replaced_transfers *spi_replace_transfers(
523baf5a
MS
3282 struct spi_message *msg,
3283 struct spi_transfer *xfer_first,
3284 size_t remove,
3285 size_t insert,
3286 spi_replaced_release_t release,
3287 size_t extradatasize,
3288 gfp_t gfp)
3289{
3290 struct spi_replaced_transfers *rxfer;
3291 struct spi_transfer *xfer;
3292 size_t i;
3293
3294 /* allocate the structure using spi_res */
3295 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3296 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS
3297 + extradatasize,
3298 gfp);
3299 if (!rxfer)
3300 return ERR_PTR(-ENOMEM);
3301
3302 /* the release code to invoke before running the generic release */
3303 rxfer->release = release;
3304
3305 /* assign extradata */
3306 if (extradatasize)
3307 rxfer->extradata =
3308 &rxfer->inserted_transfers[insert];
3309
3310 /* init the replaced_transfers list */
3311 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3312
350de7ce
AS
3313 /*
3314 * Assign the list_entry after which we should reinsert
523baf5a
MS
3315 * the @replaced_transfers - it may be spi_message.messages!
3316 */
3317 rxfer->replaced_after = xfer_first->transfer_list.prev;
3318
3319 /* remove the requested number of transfers */
3320 for (i = 0; i < remove; i++) {
350de7ce
AS
3321 /*
3322 * If the entry after replaced_after it is msg->transfers
523baf5a 3323 * then we have been requested to remove more transfers
350de7ce 3324 * than are in the list.
523baf5a
MS
3325 */
3326 if (rxfer->replaced_after->next == &msg->transfers) {
3327 dev_err(&msg->spi->dev,
3328 "requested to remove more spi_transfers than are available\n");
3329 /* insert replaced transfers back into the message */
3330 list_splice(&rxfer->replaced_transfers,
3331 rxfer->replaced_after);
3332
3333 /* free the spi_replace_transfer structure */
3334 spi_res_free(rxfer);
3335
3336 /* and return with an error */
3337 return ERR_PTR(-EINVAL);
3338 }
3339
350de7ce
AS
3340 /*
3341 * Remove the entry after replaced_after from list of
3342 * transfers and add it to list of replaced_transfers.
523baf5a
MS
3343 */
3344 list_move_tail(rxfer->replaced_after->next,
3345 &rxfer->replaced_transfers);
3346 }
3347
350de7ce
AS
3348 /*
3349 * Create copy of the given xfer with identical settings
3350 * based on the first transfer to get removed.
523baf5a
MS
3351 */
3352 for (i = 0; i < insert; i++) {
3353 /* we need to run in reverse order */
3354 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3355
3356 /* copy all spi_transfer data */
3357 memcpy(xfer, xfer_first, sizeof(*xfer));
3358
3359 /* add to list */
3360 list_add(&xfer->transfer_list, rxfer->replaced_after);
3361
bebcfd27 3362 /* clear cs_change and delay for all but the last */
523baf5a
MS
3363 if (i) {
3364 xfer->cs_change = false;
bebcfd27 3365 xfer->delay.value = 0;
523baf5a
MS
3366 }
3367 }
3368
3369 /* set up inserted */
3370 rxfer->inserted = insert;
3371
3372 /* and register it with spi_res/spi_message */
3373 spi_res_add(msg, rxfer);
3374
3375 return rxfer;
3376}
523baf5a 3377
8caab75f 3378static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
3379 struct spi_message *msg,
3380 struct spi_transfer **xferp,
3381 size_t maxsize,
3382 gfp_t gfp)
d9f12122
MS
3383{
3384 struct spi_transfer *xfer = *xferp, *xfers;
3385 struct spi_replaced_transfers *srt;
3386 size_t offset;
3387 size_t count, i;
3388
d9f12122
MS
3389 /* calculate how many we have to replace */
3390 count = DIV_ROUND_UP(xfer->len, maxsize);
3391
3392 /* create replacement */
3393 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
3394 if (IS_ERR(srt))
3395 return PTR_ERR(srt);
d9f12122
MS
3396 xfers = srt->inserted_transfers;
3397
350de7ce
AS
3398 /*
3399 * Now handle each of those newly inserted spi_transfers.
3400 * Note that the replacements spi_transfers all are preset
d9f12122
MS
3401 * to the same values as *xferp, so tx_buf, rx_buf and len
3402 * are all identical (as well as most others)
3403 * so we just have to fix up len and the pointers.
3404 *
350de7ce
AS
3405 * This also includes support for the depreciated
3406 * spi_message.is_dma_mapped interface.
d9f12122
MS
3407 */
3408
350de7ce
AS
3409 /*
3410 * The first transfer just needs the length modified, so we
3411 * run it outside the loop.
d9f12122 3412 */
c8dab77a 3413 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
3414
3415 /* all the others need rx_buf/tx_buf also set */
3416 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3417 /* update rx_buf, tx_buf and dma */
3418 if (xfers[i].rx_buf)
3419 xfers[i].rx_buf += offset;
3420 if (xfers[i].rx_dma)
3421 xfers[i].rx_dma += offset;
3422 if (xfers[i].tx_buf)
3423 xfers[i].tx_buf += offset;
3424 if (xfers[i].tx_dma)
3425 xfers[i].tx_dma += offset;
3426
3427 /* update length */
3428 xfers[i].len = min(maxsize, xfers[i].len - offset);
3429 }
3430
350de7ce
AS
3431 /*
3432 * We set up xferp to the last entry we have inserted,
3433 * so that we skip those already split transfers.
d9f12122
MS
3434 */
3435 *xferp = &xfers[count - 1];
3436
3437 /* increment statistics counters */
6598b91b 3438 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics,
d9f12122 3439 transfers_split_maxsize);
6598b91b 3440 SPI_STATISTICS_INCREMENT_FIELD(msg->spi->pcpu_statistics,
d9f12122
MS
3441 transfers_split_maxsize);
3442
3443 return 0;
3444}
3445
3446/**
ce2424d7
MCC
3447 * spi_split_transfers_maxsize - split spi transfers into multiple transfers
3448 * when an individual transfer exceeds a
3449 * certain size
8caab75f 3450 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
3451 * @msg: the @spi_message to transform
3452 * @maxsize: the maximum when to apply this
10f11a22 3453 * @gfp: GFP allocation flags
d9f12122
MS
3454 *
3455 * Return: status of transformation
3456 */
8caab75f 3457int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
3458 struct spi_message *msg,
3459 size_t maxsize,
3460 gfp_t gfp)
3461{
3462 struct spi_transfer *xfer;
3463 int ret;
3464
350de7ce
AS
3465 /*
3466 * Iterate over the transfer_list,
d9f12122
MS
3467 * but note that xfer is advanced to the last transfer inserted
3468 * to avoid checking sizes again unnecessarily (also xfer does
350de7ce
AS
3469 * potentially belong to a different list by the time the
3470 * replacement has happened).
d9f12122
MS
3471 */
3472 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3473 if (xfer->len > maxsize) {
8caab75f
GU
3474 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3475 maxsize, gfp);
d9f12122
MS
3476 if (ret)
3477 return ret;
3478 }
3479 }
3480
3481 return 0;
3482}
3483EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
3484
3485/*-------------------------------------------------------------------------*/
3486
8caab75f 3487/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
3488 * other core methods are currently defined as inline functions.
3489 */
3490
8caab75f
GU
3491static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3492 u8 bits_per_word)
63ab645f 3493{
8caab75f 3494 if (ctlr->bits_per_word_mask) {
63ab645f
SB
3495 /* Only 32 bits fit in the mask */
3496 if (bits_per_word > 32)
3497 return -EINVAL;
8caab75f 3498 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
3499 return -EINVAL;
3500 }
3501
3502 return 0;
3503}
3504
7d077197
DB
3505/**
3506 * spi_setup - setup SPI mode and clock rate
3507 * @spi: the device whose settings are being modified
3508 * Context: can sleep, and no requests are queued to the device
3509 *
3510 * SPI protocol drivers may need to update the transfer mode if the
3511 * device doesn't work with its default. They may likewise need
3512 * to update clock rates or word sizes from initial values. This function
3513 * changes those settings, and must be called from a context that can sleep.
3514 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3515 * effect the next time the device is selected and data is transferred to
3516 * or from it. When this function returns, the spi device is deselected.
3517 *
3518 * Note that this call will fail if the protocol driver specifies an option
3519 * that the underlying controller or its driver does not support. For
3520 * example, not all hardware supports wire transfers using nine bit words,
3521 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
3522 *
3523 * Return: zero on success, else a negative error code.
7d077197
DB
3524 */
3525int spi_setup(struct spi_device *spi)
3526{
83596fbe 3527 unsigned bad_bits, ugly_bits;
73f93db5 3528 int status = 0;
7d077197 3529
d962608c 3530 /*
350de7ce
AS
3531 * Check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
3532 * are set at the same time.
f477b7fb 3533 */
d962608c
DB
3534 if ((hweight_long(spi->mode &
3535 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
3536 (hweight_long(spi->mode &
3537 (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
f477b7fb 3538 dev_err(&spi->dev,
d962608c 3539 "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
f477b7fb 3540 return -EINVAL;
3541 }
350de7ce 3542 /* If it is SPI_3WIRE mode, DUAL and QUAD should be forbidden */
f477b7fb 3543 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
3544 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3545 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3546 return -EINVAL;
350de7ce
AS
3547 /*
3548 * Help drivers fail *cleanly* when they need options
3549 * that aren't supported with their current controller.
cbaa62e0
DL
3550 * SPI_CS_WORD has a fallback software implementation,
3551 * so it is ignored here.
e7db06b5 3552 */
d962608c
DB
3553 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
3554 SPI_NO_TX | SPI_NO_RX);
83596fbe 3555 ugly_bits = bad_bits &
6b03061f
YNG
3556 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3557 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
3558 if (ugly_bits) {
3559 dev_warn(&spi->dev,
3560 "setup: ignoring unsupported mode bits %x\n",
3561 ugly_bits);
3562 spi->mode &= ~ugly_bits;
3563 bad_bits &= ~ugly_bits;
3564 }
e7db06b5 3565 if (bad_bits) {
eb288a1f 3566 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
3567 bad_bits);
3568 return -EINVAL;
3569 }
3570
b3fe2e51 3571 if (!spi->bits_per_word) {
7d077197 3572 spi->bits_per_word = 8;
b3fe2e51
PK
3573 } else {
3574 /*
3575 * Some controllers may not support the default 8 bits-per-word
3576 * so only perform the check when this is explicitly provided.
3577 */
3578 status = __spi_validate_bits_per_word(spi->controller,
3579 spi->bits_per_word);
3580 if (status)
3581 return status;
3582 }
63ab645f 3583
6820e812
TA
3584 if (spi->controller->max_speed_hz &&
3585 (!spi->max_speed_hz ||
3586 spi->max_speed_hz > spi->controller->max_speed_hz))
8caab75f 3587 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3588
4fae3a58
SS
3589 mutex_lock(&spi->controller->io_mutex);
3590
c914dbf8 3591 if (spi->controller->setup) {
8caab75f 3592 status = spi->controller->setup(spi);
c914dbf8
JB
3593 if (status) {
3594 mutex_unlock(&spi->controller->io_mutex);
3595 dev_err(&spi->controller->dev, "Failed to setup device: %d\n",
3596 status);
3597 return status;
3598 }
3599 }
7d077197 3600
d948e6ca 3601 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
dd769f15 3602 status = pm_runtime_resume_and_get(spi->controller->dev.parent);
d948e6ca 3603 if (status < 0) {
4fae3a58 3604 mutex_unlock(&spi->controller->io_mutex);
d948e6ca
LX
3605 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3606 status);
3607 return status;
3608 }
57a94607
TL
3609
3610 /*
3611 * We do not want to return positive value from pm_runtime_get,
3612 * there are many instances of devices calling spi_setup() and
3613 * checking for a non-zero return value instead of a negative
3614 * return value.
3615 */
3616 status = 0;
3617
d347b4aa 3618 spi_set_cs(spi, false, true);
d948e6ca
LX
3619 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3620 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3621 } else {
d347b4aa 3622 spi_set_cs(spi, false, true);
d948e6ca 3623 }
abeedb01 3624
4fae3a58
SS
3625 mutex_unlock(&spi->controller->io_mutex);
3626
924b5867
DA
3627 if (spi->rt && !spi->controller->rt) {
3628 spi->controller->rt = true;
3629 spi_set_thread_rt(spi->controller);
3630 }
3631
5cb4e1f3
AS
3632 trace_spi_setup(spi, status);
3633
40b82c2d
AS
3634 dev_dbg(&spi->dev, "setup mode %lu, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
3635 spi->mode & SPI_MODE_X_MASK,
7d077197
DB
3636 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3637 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3638 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3639 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3640 spi->bits_per_word, spi->max_speed_hz,
3641 status);
3642
3643 return status;
3644}
3645EXPORT_SYMBOL_GPL(spi_setup);
3646
6c613f68
AA
3647static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3648 struct spi_device *spi)
3649{
3650 int delay1, delay2;
3651
3984d39b 3652 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA
3653 if (delay1 < 0)
3654 return delay1;
3655
3984d39b 3656 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA
3657 if (delay2 < 0)
3658 return delay2;
3659
3660 if (delay1 < delay2)
3661 memcpy(&xfer->word_delay, &spi->word_delay,
3662 sizeof(xfer->word_delay));
3663
3664 return 0;
3665}
3666
90808738 3667static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3668{
8caab75f 3669 struct spi_controller *ctlr = spi->controller;
e6811d1d 3670 struct spi_transfer *xfer;
6ea31293 3671 int w_size;
cf32b71e 3672
24a0013a
MB
3673 if (list_empty(&message->transfers))
3674 return -EINVAL;
24a0013a 3675
350de7ce
AS
3676 /*
3677 * If an SPI controller does not support toggling the CS line on each
71388b21
DL
3678 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3679 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL
3680 * splitting transfers into one-word transfers and ensuring that
3681 * cs_change is set for each transfer.
3682 */
71388b21 3683 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f48dc6b9 3684 spi->cs_gpiod)) {
cbaa62e0
DL
3685 size_t maxsize;
3686 int ret;
3687
3688 maxsize = (spi->bits_per_word + 7) / 8;
3689
3690 /* spi_split_transfers_maxsize() requires message->spi */
3691 message->spi = spi;
3692
3693 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3694 GFP_KERNEL);
3695 if (ret)
3696 return ret;
3697
3698 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3699 /* don't change cs_change on the last entry in the list */
3700 if (list_is_last(&xfer->transfer_list, &message->transfers))
3701 break;
3702 xfer->cs_change = 1;
3703 }
3704 }
3705
350de7ce
AS
3706 /*
3707 * Half-duplex links include original MicroWire, and ones with
cf32b71e
ES
3708 * only one data pin like SPI_3WIRE (switches direction) or where
3709 * either MOSI or MISO is missing. They can also be caused by
3710 * software limitations.
3711 */
8caab75f
GU
3712 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3713 (spi->mode & SPI_3WIRE)) {
3714 unsigned flags = ctlr->flags;
cf32b71e
ES
3715
3716 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3717 if (xfer->rx_buf && xfer->tx_buf)
3718 return -EINVAL;
8caab75f 3719 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3720 return -EINVAL;
8caab75f 3721 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
3722 return -EINVAL;
3723 }
3724 }
3725
350de7ce 3726 /*
059b8ffe
LD
3727 * Set transfer bits_per_word and max speed as spi device default if
3728 * it is not set for this transfer.
f477b7fb 3729 * Set transfer tx_nbits and rx_nbits as single transfer default
3730 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB
3731 * Ensure transfer word_delay is at least as long as that required by
3732 * device itself.
e6811d1d 3733 */
77e80588 3734 message->frame_length = 0;
e6811d1d 3735 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3736 xfer->effective_speed_hz = 0;
078726ce 3737 message->frame_length += xfer->len;
e6811d1d
LD
3738 if (!xfer->bits_per_word)
3739 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
3740
3741 if (!xfer->speed_hz)
059b8ffe 3742 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3743
8caab75f
GU
3744 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3745 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3746
8caab75f 3747 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3748 return -EINVAL;
a2fd4f9f 3749
4d94bd21
II
3750 /*
3751 * SPI transfer length should be multiple of SPI word size
350de7ce 3752 * where SPI word size should be power-of-two multiple.
4d94bd21
II
3753 */
3754 if (xfer->bits_per_word <= 8)
3755 w_size = 1;
3756 else if (xfer->bits_per_word <= 16)
3757 w_size = 2;
3758 else
3759 w_size = 4;
3760
4d94bd21 3761 /* No partial transfers accepted */
6ea31293 3762 if (xfer->len % w_size)
4d94bd21
II
3763 return -EINVAL;
3764
8caab75f
GU
3765 if (xfer->speed_hz && ctlr->min_speed_hz &&
3766 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3767 return -EINVAL;
f477b7fb 3768
3769 if (xfer->tx_buf && !xfer->tx_nbits)
3770 xfer->tx_nbits = SPI_NBITS_SINGLE;
3771 if (xfer->rx_buf && !xfer->rx_nbits)
3772 xfer->rx_nbits = SPI_NBITS_SINGLE;
350de7ce
AS
3773 /*
3774 * Check transfer tx/rx_nbits:
1afd9989
GU
3775 * 1. check the value matches one of single, dual and quad
3776 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3777 */
db90a441 3778 if (xfer->tx_buf) {
d962608c
DB
3779 if (spi->mode & SPI_NO_TX)
3780 return -EINVAL;
db90a441
SP
3781 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3782 xfer->tx_nbits != SPI_NBITS_DUAL &&
3783 xfer->tx_nbits != SPI_NBITS_QUAD)
3784 return -EINVAL;
3785 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3786 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3787 return -EINVAL;
3788 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3789 !(spi->mode & SPI_TX_QUAD))
3790 return -EINVAL;
db90a441 3791 }
f477b7fb 3792 /* check transfer rx_nbits */
db90a441 3793 if (xfer->rx_buf) {
d962608c
DB
3794 if (spi->mode & SPI_NO_RX)
3795 return -EINVAL;
db90a441
SP
3796 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3797 xfer->rx_nbits != SPI_NBITS_DUAL &&
3798 xfer->rx_nbits != SPI_NBITS_QUAD)
3799 return -EINVAL;
3800 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3801 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3802 return -EINVAL;
3803 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3804 !(spi->mode & SPI_RX_QUAD))
3805 return -EINVAL;
db90a441 3806 }
b7bb367a 3807
6c613f68
AA
3808 if (_spi_xfer_word_delay_update(xfer, spi))
3809 return -EINVAL;
e6811d1d
LD
3810 }
3811
cf32b71e 3812 message->status = -EINPROGRESS;
90808738
MB
3813
3814 return 0;
3815}
3816
3817static int __spi_async(struct spi_device *spi, struct spi_message *message)
3818{
8caab75f 3819 struct spi_controller *ctlr = spi->controller;
b42faeee 3820 struct spi_transfer *xfer;
90808738 3821
b5932f5c
BB
3822 /*
3823 * Some controllers do not support doing regular SPI transfers. Return
3824 * ENOTSUPP when this is the case.
3825 */
3826 if (!ctlr->transfer)
3827 return -ENOTSUPP;
3828
90808738
MB
3829 message->spi = spi;
3830
6598b91b
DJ
3831 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_async);
3832 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_async);
eca2ebc7 3833
90808738
MB
3834 trace_spi_message_submit(message);
3835
b42faeee
VO
3836 if (!ctlr->ptp_sts_supported) {
3837 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3838 xfer->ptp_sts_word_pre = 0;
3839 ptp_read_system_prets(xfer->ptp_sts);
3840 }
3841 }
3842
8caab75f 3843 return ctlr->transfer(spi, message);
cf32b71e
ES
3844}
3845
568d0697
DB
3846/**
3847 * spi_async - asynchronous SPI transfer
3848 * @spi: device with which data will be exchanged
3849 * @message: describes the data transfers, including completion callback
3850 * Context: any (irqs may be blocked, etc)
3851 *
3852 * This call may be used in_irq and other contexts which can't sleep,
3853 * as well as from task contexts which can sleep.
3854 *
3855 * The completion callback is invoked in a context which can't sleep.
3856 * Before that invocation, the value of message->status is undefined.
3857 * When the callback is issued, message->status holds either zero (to
3858 * indicate complete success) or a negative error code. After that
3859 * callback returns, the driver which issued the transfer request may
3860 * deallocate the associated memory; it's no longer in use by any SPI
3861 * core or controller driver code.
3862 *
3863 * Note that although all messages to a spi_device are handled in
3864 * FIFO order, messages may go to different devices in other orders.
3865 * Some device might be higher priority, or have various "hard" access
3866 * time requirements, for example.
3867 *
3868 * On detection of any fault during the transfer, processing of
3869 * the entire message is aborted, and the device is deselected.
3870 * Until returning from the associated message completion callback,
3871 * no other spi_message queued to that device will be processed.
3872 * (This rule applies equally to all the synchronous transfer calls,
3873 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3874 *
3875 * Return: zero on success, else a negative error code.
568d0697
DB
3876 */
3877int spi_async(struct spi_device *spi, struct spi_message *message)
3878{
8caab75f 3879 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3880 int ret;
3881 unsigned long flags;
568d0697 3882
90808738
MB
3883 ret = __spi_validate(spi, message);
3884 if (ret != 0)
3885 return ret;
3886
8caab75f 3887 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3888
8caab75f 3889 if (ctlr->bus_lock_flag)
cf32b71e
ES
3890 ret = -EBUSY;
3891 else
3892 ret = __spi_async(spi, message);
568d0697 3893
8caab75f 3894 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3895
3896 return ret;
568d0697
DB
3897}
3898EXPORT_SYMBOL_GPL(spi_async);
3899
cf32b71e
ES
3900/**
3901 * spi_async_locked - version of spi_async with exclusive bus usage
3902 * @spi: device with which data will be exchanged
3903 * @message: describes the data transfers, including completion callback
3904 * Context: any (irqs may be blocked, etc)
3905 *
3906 * This call may be used in_irq and other contexts which can't sleep,
3907 * as well as from task contexts which can sleep.
3908 *
3909 * The completion callback is invoked in a context which can't sleep.
3910 * Before that invocation, the value of message->status is undefined.
3911 * When the callback is issued, message->status holds either zero (to
3912 * indicate complete success) or a negative error code. After that
3913 * callback returns, the driver which issued the transfer request may
3914 * deallocate the associated memory; it's no longer in use by any SPI
3915 * core or controller driver code.
3916 *
3917 * Note that although all messages to a spi_device are handled in
3918 * FIFO order, messages may go to different devices in other orders.
3919 * Some device might be higher priority, or have various "hard" access
3920 * time requirements, for example.
3921 *
3922 * On detection of any fault during the transfer, processing of
3923 * the entire message is aborted, and the device is deselected.
3924 * Until returning from the associated message completion callback,
3925 * no other spi_message queued to that device will be processed.
3926 * (This rule applies equally to all the synchronous transfer calls,
3927 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3928 *
3929 * Return: zero on success, else a negative error code.
cf32b71e 3930 */
da21fde0 3931static int spi_async_locked(struct spi_device *spi, struct spi_message *message)
cf32b71e 3932{
8caab75f 3933 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3934 int ret;
3935 unsigned long flags;
3936
90808738
MB
3937 ret = __spi_validate(spi, message);
3938 if (ret != 0)
3939 return ret;
3940
8caab75f 3941 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3942
3943 ret = __spi_async(spi, message);
3944
8caab75f 3945 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3946
3947 return ret;
3948
3949}
cf32b71e 3950
ae7d2346
DJ
3951static void __spi_transfer_message_noqueue(struct spi_controller *ctlr, struct spi_message *msg)
3952{
3953 bool was_busy;
3954 int ret;
3955
3956 mutex_lock(&ctlr->io_mutex);
3957
1a9cafcb 3958 was_busy = ctlr->busy;
ae7d2346 3959
72c5c59b 3960 ctlr->cur_msg = msg;
ae7d2346
DJ
3961 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
3962 if (ret)
3963 goto out;
3964
3965 if (!was_busy) {
3966 kfree(ctlr->dummy_rx);
3967 ctlr->dummy_rx = NULL;
3968 kfree(ctlr->dummy_tx);
3969 ctlr->dummy_tx = NULL;
3970 if (ctlr->unprepare_transfer_hardware &&
3971 ctlr->unprepare_transfer_hardware(ctlr))
3972 dev_err(&ctlr->dev,
3973 "failed to unprepare transfer hardware\n");
3974 spi_idle_runtime_pm(ctlr);
3975 }
3976
3977out:
3978 mutex_unlock(&ctlr->io_mutex);
3979}
3980
7d077197
DB
3981/*-------------------------------------------------------------------------*/
3982
350de7ce
AS
3983/*
3984 * Utility methods for SPI protocol drivers, layered on
7d077197
DB
3985 * top of the core. Some other utility methods are defined as
3986 * inline functions.
3987 */
3988
5d870c8e
AM
3989static void spi_complete(void *arg)
3990{
3991 complete(arg);
3992}
3993
ef4d96ec 3994static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
3995{
3996 DECLARE_COMPLETION_ONSTACK(done);
3997 int status;
8caab75f 3998 struct spi_controller *ctlr = spi->controller;
0461a414
MB
3999
4000 status = __spi_validate(spi, message);
4001 if (status != 0)
4002 return status;
cf32b71e 4003
0461a414 4004 message->spi = spi;
cf32b71e 4005
6598b91b
DJ
4006 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync);
4007 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync);
eca2ebc7 4008
350de7ce 4009 /*
ae7d2346
DJ
4010 * Checking queue_empty here only guarantees async/sync message
4011 * ordering when coming from the same context. It does not need to
4012 * guard against reentrancy from a different context. The io_mutex
4013 * will catch those cases.
0461a414 4014 */
ae7d2346
DJ
4015 if (READ_ONCE(ctlr->queue_empty)) {
4016 message->sync = true;
4017 message->actual_length = 0;
4018 message->status = -EINPROGRESS;
0461a414
MB
4019
4020 trace_spi_message_submit(message);
4021
ae7d2346
DJ
4022 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync_immediate);
4023 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync_immediate);
0461a414 4024
ae7d2346
DJ
4025 __spi_transfer_message_noqueue(ctlr, message);
4026
4027 return message->status;
0461a414 4028 }
cf32b71e 4029
ae7d2346
DJ
4030 /*
4031 * There are messages in the async queue that could have originated
4032 * from the same context, so we need to preserve ordering.
4033 * Therefor we send the message to the async queue and wait until they
4034 * are completed.
4035 */
4036 message->complete = spi_complete;
4037 message->context = &done;
4038 status = spi_async_locked(spi, message);
cf32b71e
ES
4039 if (status == 0) {
4040 wait_for_completion(&done);
4041 status = message->status;
4042 }
4043 message->context = NULL;
ae7d2346 4044
cf32b71e
ES
4045 return status;
4046}
4047
8ae12a0d
DB
4048/**
4049 * spi_sync - blocking/synchronous SPI data transfers
4050 * @spi: device with which data will be exchanged
4051 * @message: describes the data transfers
33e34dc6 4052 * Context: can sleep
8ae12a0d
DB
4053 *
4054 * This call may only be used from a context that may sleep. The sleep
4055 * is non-interruptible, and has no timeout. Low-overhead controller
4056 * drivers may DMA directly into and out of the message buffers.
4057 *
4058 * Note that the SPI device's chip select is active during the message,
4059 * and then is normally disabled between messages. Drivers for some
4060 * frequently-used devices may want to minimize costs of selecting a chip,
4061 * by leaving it selected in anticipation that the next message will go
4062 * to the same chip. (That may increase power usage.)
4063 *
0c868461
DB
4064 * Also, the caller is guaranteeing that the memory associated with the
4065 * message will not be freed before this call returns.
4066 *
97d56dc6 4067 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4068 */
4069int spi_sync(struct spi_device *spi, struct spi_message *message)
4070{
ef4d96ec
MB
4071 int ret;
4072
8caab75f 4073 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 4074 ret = __spi_sync(spi, message);
8caab75f 4075 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
4076
4077 return ret;
8ae12a0d
DB
4078}
4079EXPORT_SYMBOL_GPL(spi_sync);
4080
cf32b71e
ES
4081/**
4082 * spi_sync_locked - version of spi_sync with exclusive bus usage
4083 * @spi: device with which data will be exchanged
4084 * @message: describes the data transfers
4085 * Context: can sleep
4086 *
4087 * This call may only be used from a context that may sleep. The sleep
4088 * is non-interruptible, and has no timeout. Low-overhead controller
4089 * drivers may DMA directly into and out of the message buffers.
4090 *
4091 * This call should be used by drivers that require exclusive access to the
25985edc 4092 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
4093 * be released by a spi_bus_unlock call when the exclusive access is over.
4094 *
97d56dc6 4095 * Return: zero on success, else a negative error code.
cf32b71e
ES
4096 */
4097int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
4098{
ef4d96ec 4099 return __spi_sync(spi, message);
cf32b71e
ES
4100}
4101EXPORT_SYMBOL_GPL(spi_sync_locked);
4102
4103/**
4104 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 4105 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
4106 * Context: can sleep
4107 *
4108 * This call may only be used from a context that may sleep. The sleep
4109 * is non-interruptible, and has no timeout.
4110 *
4111 * This call should be used by drivers that require exclusive access to the
4112 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
4113 * exclusive access is over. Data transfer must be done by spi_sync_locked
4114 * and spi_async_locked calls when the SPI bus lock is held.
4115 *
97d56dc6 4116 * Return: always zero.
cf32b71e 4117 */
8caab75f 4118int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
4119{
4120 unsigned long flags;
4121
8caab75f 4122 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 4123
8caab75f
GU
4124 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
4125 ctlr->bus_lock_flag = 1;
4126 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
4127
4128 /* mutex remains locked until spi_bus_unlock is called */
4129
4130 return 0;
4131}
4132EXPORT_SYMBOL_GPL(spi_bus_lock);
4133
4134/**
4135 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 4136 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
4137 * Context: can sleep
4138 *
4139 * This call may only be used from a context that may sleep. The sleep
4140 * is non-interruptible, and has no timeout.
4141 *
4142 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
4143 * call.
4144 *
97d56dc6 4145 * Return: always zero.
cf32b71e 4146 */
8caab75f 4147int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 4148{
8caab75f 4149 ctlr->bus_lock_flag = 0;
cf32b71e 4150
8caab75f 4151 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
4152
4153 return 0;
4154}
4155EXPORT_SYMBOL_GPL(spi_bus_unlock);
4156
a9948b61 4157/* portable code must never pass more than 32 bytes */
5fe5f05e 4158#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
4159
4160static u8 *buf;
4161
4162/**
4163 * spi_write_then_read - SPI synchronous write followed by read
4164 * @spi: device with which data will be exchanged
4165 * @txbuf: data to be written (need not be dma-safe)
4166 * @n_tx: size of txbuf, in bytes
27570497
JP
4167 * @rxbuf: buffer into which data will be read (need not be dma-safe)
4168 * @n_rx: size of rxbuf, in bytes
33e34dc6 4169 * Context: can sleep
8ae12a0d
DB
4170 *
4171 * This performs a half duplex MicroWire style transaction with the
4172 * device, sending txbuf and then reading rxbuf. The return value
4173 * is zero for success, else a negative errno status code.
b885244e 4174 * This call may only be used from a context that may sleep.
8ae12a0d 4175 *
c373643b 4176 * Parameters to this routine are always copied using a small buffer.
33e34dc6 4177 * Performance-sensitive or bulk transfer code should instead use
0c868461 4178 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
4179 *
4180 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4181 */
4182int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
4183 const void *txbuf, unsigned n_tx,
4184 void *rxbuf, unsigned n_rx)
8ae12a0d 4185{
068f4070 4186 static DEFINE_MUTEX(lock);
8ae12a0d
DB
4187
4188 int status;
4189 struct spi_message message;
bdff549e 4190 struct spi_transfer x[2];
8ae12a0d
DB
4191 u8 *local_buf;
4192
350de7ce
AS
4193 /*
4194 * Use preallocated DMA-safe buffer if we can. We can't avoid
b3a223ee
MB
4195 * copying here, (as a pure convenience thing), but we can
4196 * keep heap costs out of the hot path unless someone else is
4197 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 4198 */
b3a223ee 4199 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
4200 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
4201 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
4202 if (!local_buf)
4203 return -ENOMEM;
4204 } else {
4205 local_buf = buf;
4206 }
8ae12a0d 4207
8275c642 4208 spi_message_init(&message);
5fe5f05e 4209 memset(x, 0, sizeof(x));
bdff549e
DB
4210 if (n_tx) {
4211 x[0].len = n_tx;
4212 spi_message_add_tail(&x[0], &message);
4213 }
4214 if (n_rx) {
4215 x[1].len = n_rx;
4216 spi_message_add_tail(&x[1], &message);
4217 }
8275c642 4218
8ae12a0d 4219 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
4220 x[0].tx_buf = local_buf;
4221 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
4222
4223 /* do the i/o */
8ae12a0d 4224 status = spi_sync(spi, &message);
9b938b74 4225 if (status == 0)
bdff549e 4226 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 4227
bdff549e 4228 if (x[0].tx_buf == buf)
068f4070 4229 mutex_unlock(&lock);
8ae12a0d
DB
4230 else
4231 kfree(local_buf);
4232
4233 return status;
4234}
4235EXPORT_SYMBOL_GPL(spi_write_then_read);
4236
4237/*-------------------------------------------------------------------------*/
4238
da21fde0 4239#if IS_ENABLED(CONFIG_OF_DYNAMIC)
ce79d54a 4240/* must call put_device() when done with returned spi_device device */
da21fde0 4241static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 4242{
cfba5de9
SP
4243 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
4244
ce79d54a
PA
4245 return dev ? to_spi_device(dev) : NULL;
4246}
4247
8caab75f
GU
4248/* the spi controllers are not using spi_bus, so we find it with another way */
4249static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
4250{
4251 struct device *dev;
4252
cfba5de9 4253 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 4254 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 4255 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA
4256 if (!dev)
4257 return NULL;
4258
4259 /* reference got in class_find_device */
8caab75f 4260 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
4261}
4262
4263static int of_spi_notify(struct notifier_block *nb, unsigned long action,
4264 void *arg)
4265{
4266 struct of_reconfig_data *rd = arg;
8caab75f 4267 struct spi_controller *ctlr;
ce79d54a
PA
4268 struct spi_device *spi;
4269
4270 switch (of_reconfig_get_state_change(action, arg)) {
4271 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
4272 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
4273 if (ctlr == NULL)
ce79d54a
PA
4274 return NOTIFY_OK; /* not for us */
4275
bd6c1644 4276 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 4277 put_device(&ctlr->dev);
bd6c1644
GU
4278 return NOTIFY_OK;
4279 }
4280
8caab75f
GU
4281 spi = of_register_spi_device(ctlr, rd->dn);
4282 put_device(&ctlr->dev);
ce79d54a
PA
4283
4284 if (IS_ERR(spi)) {
25c56c88
RH
4285 pr_err("%s: failed to create for '%pOF'\n",
4286 __func__, rd->dn);
e0af98a7 4287 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
4288 return notifier_from_errno(PTR_ERR(spi));
4289 }
4290 break;
4291
4292 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
4293 /* already depopulated? */
4294 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4295 return NOTIFY_OK;
4296
ce79d54a
PA
4297 /* find our device by node */
4298 spi = of_find_spi_device_by_node(rd->dn);
4299 if (spi == NULL)
4300 return NOTIFY_OK; /* no? not meant for us */
4301
4302 /* unregister takes one ref away */
4303 spi_unregister_device(spi);
4304
4305 /* and put the reference of the find */
4306 put_device(&spi->dev);
4307 break;
4308 }
4309
4310 return NOTIFY_OK;
4311}
4312
4313static struct notifier_block spi_of_notifier = {
4314 .notifier_call = of_spi_notify,
4315};
4316#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4317extern struct notifier_block spi_of_notifier;
4318#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4319
7f24467f 4320#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4321static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
4322{
4323 return ACPI_COMPANION(dev->parent) == data;
4324}
4325
8caab75f 4326static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
4327{
4328 struct device *dev;
4329
4330 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4331 spi_acpi_controller_match);
6c364062
GU
4332 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4333 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4334 spi_acpi_controller_match);
7f24467f
OP
4335 if (!dev)
4336 return NULL;
4337
8caab75f 4338 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
4339}
4340
4341static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4342{
4343 struct device *dev;
4344
00500147 4345 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4346 return to_spi_device(dev);
7f24467f
OP
4347}
4348
4349static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4350 void *arg)
4351{
4352 struct acpi_device *adev = arg;
8caab75f 4353 struct spi_controller *ctlr;
7f24467f
OP
4354 struct spi_device *spi;
4355
4356 switch (value) {
4357 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
4358 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4359 if (!ctlr)
7f24467f
OP
4360 break;
4361
8caab75f
GU
4362 acpi_register_spi_device(ctlr, adev);
4363 put_device(&ctlr->dev);
7f24467f
OP
4364 break;
4365 case ACPI_RECONFIG_DEVICE_REMOVE:
4366 if (!acpi_device_enumerated(adev))
4367 break;
4368
4369 spi = acpi_spi_find_device_by_adev(adev);
4370 if (!spi)
4371 break;
4372
4373 spi_unregister_device(spi);
4374 put_device(&spi->dev);
4375 break;
4376 }
4377
4378 return NOTIFY_OK;
4379}
4380
4381static struct notifier_block spi_acpi_notifier = {
4382 .notifier_call = acpi_spi_notify,
4383};
4384#else
4385extern struct notifier_block spi_acpi_notifier;
4386#endif
4387
8ae12a0d
DB
4388static int __init spi_init(void)
4389{
b885244e
DB
4390 int status;
4391
e94b1766 4392 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
4393 if (!buf) {
4394 status = -ENOMEM;
4395 goto err0;
4396 }
4397
4398 status = bus_register(&spi_bus_type);
4399 if (status < 0)
4400 goto err1;
8ae12a0d 4401
b885244e
DB
4402 status = class_register(&spi_master_class);
4403 if (status < 0)
4404 goto err2;
ce79d54a 4405
6c364062
GU
4406 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4407 status = class_register(&spi_slave_class);
4408 if (status < 0)
4409 goto err3;
4410 }
4411
5267720e 4412 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4413 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
4414 if (IS_ENABLED(CONFIG_ACPI))
4415 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4416
8ae12a0d 4417 return 0;
b885244e 4418
6c364062
GU
4419err3:
4420 class_unregister(&spi_master_class);
b885244e
DB
4421err2:
4422 bus_unregister(&spi_bus_type);
4423err1:
4424 kfree(buf);
4425 buf = NULL;
4426err0:
4427 return status;
8ae12a0d 4428}
b885244e 4429
350de7ce
AS
4430/*
4431 * A board_info is normally registered in arch_initcall(),
4432 * but even essential drivers wait till later.
b885244e 4433 *
350de7ce
AS
4434 * REVISIT only boardinfo really needs static linking. The rest (device and
4435 * driver registration) _could_ be dynamically linked (modular) ... Costs
b885244e 4436 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4437 */
673c0c00 4438postcore_initcall(spi_init);