Commit | Line | Data |
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b445bfcb | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
787f4889 MB |
2 | // SPI init/core code |
3 | // | |
4 | // Copyright (C) 2005 David Brownell | |
5 | // Copyright (C) 2008 Secret Lab Technologies Ltd. | |
8ae12a0d | 6 | |
8ae12a0d DB |
7 | #include <linux/kernel.h> |
8 | #include <linux/device.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/cache.h> | |
99adef31 MB |
11 | #include <linux/dma-mapping.h> |
12 | #include <linux/dmaengine.h> | |
94040828 | 13 | #include <linux/mutex.h> |
2b7a32f7 | 14 | #include <linux/of_device.h> |
d57a4282 | 15 | #include <linux/of_irq.h> |
86be408b | 16 | #include <linux/clk/clk-conf.h> |
5a0e3ad6 | 17 | #include <linux/slab.h> |
e0626e38 | 18 | #include <linux/mod_devicetable.h> |
8ae12a0d | 19 | #include <linux/spi/spi.h> |
b5932f5c | 20 | #include <linux/spi/spi-mem.h> |
74317984 | 21 | #include <linux/of_gpio.h> |
f3186dd8 | 22 | #include <linux/gpio/consumer.h> |
3ae22e8c | 23 | #include <linux/pm_runtime.h> |
f48c767c | 24 | #include <linux/pm_domain.h> |
826cf175 | 25 | #include <linux/property.h> |
025ed130 | 26 | #include <linux/export.h> |
8bd75c77 | 27 | #include <linux/sched/rt.h> |
ae7e81c0 | 28 | #include <uapi/linux/sched/types.h> |
ffbbdd21 LW |
29 | #include <linux/delay.h> |
30 | #include <linux/kthread.h> | |
64bee4d2 MW |
31 | #include <linux/ioport.h> |
32 | #include <linux/acpi.h> | |
b1b8153c | 33 | #include <linux/highmem.h> |
9b61e302 | 34 | #include <linux/idr.h> |
8a2e487e | 35 | #include <linux/platform_data/x86/apple.h> |
8ae12a0d | 36 | |
56ec1978 MB |
37 | #define CREATE_TRACE_POINTS |
38 | #include <trace/events/spi.h> | |
ca1438dc AB |
39 | EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start); |
40 | EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop); | |
9b61e302 | 41 | |
46336966 BB |
42 | #include "internals.h" |
43 | ||
9b61e302 | 44 | static DEFINE_IDR(spi_master_idr); |
56ec1978 | 45 | |
8ae12a0d DB |
46 | static void spidev_release(struct device *dev) |
47 | { | |
0ffa0285 | 48 | struct spi_device *spi = to_spi_device(dev); |
8ae12a0d | 49 | |
8caab75f GU |
50 | /* spi controllers may cleanup for released devices */ |
51 | if (spi->controller->cleanup) | |
52 | spi->controller->cleanup(spi); | |
8ae12a0d | 53 | |
8caab75f | 54 | spi_controller_put(spi->controller); |
5039563e | 55 | kfree(spi->driver_override); |
07a389fe | 56 | kfree(spi); |
8ae12a0d DB |
57 | } |
58 | ||
59 | static ssize_t | |
60 | modalias_show(struct device *dev, struct device_attribute *a, char *buf) | |
61 | { | |
62 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
63 | int len; |
64 | ||
65 | len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); | |
66 | if (len != -ENODEV) | |
67 | return len; | |
8ae12a0d | 68 | |
d8e328b3 | 69 | return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d | 70 | } |
aa7da564 | 71 | static DEVICE_ATTR_RO(modalias); |
8ae12a0d | 72 | |
5039563e TP |
73 | static ssize_t driver_override_store(struct device *dev, |
74 | struct device_attribute *a, | |
75 | const char *buf, size_t count) | |
76 | { | |
77 | struct spi_device *spi = to_spi_device(dev); | |
78 | const char *end = memchr(buf, '\n', count); | |
79 | const size_t len = end ? end - buf : count; | |
80 | const char *driver_override, *old; | |
81 | ||
82 | /* We need to keep extra room for a newline when displaying value */ | |
83 | if (len >= (PAGE_SIZE - 1)) | |
84 | return -EINVAL; | |
85 | ||
86 | driver_override = kstrndup(buf, len, GFP_KERNEL); | |
87 | if (!driver_override) | |
88 | return -ENOMEM; | |
89 | ||
90 | device_lock(dev); | |
91 | old = spi->driver_override; | |
92 | if (len) { | |
93 | spi->driver_override = driver_override; | |
94 | } else { | |
95 | /* Emptry string, disable driver override */ | |
96 | spi->driver_override = NULL; | |
97 | kfree(driver_override); | |
98 | } | |
99 | device_unlock(dev); | |
100 | kfree(old); | |
101 | ||
102 | return count; | |
103 | } | |
104 | ||
105 | static ssize_t driver_override_show(struct device *dev, | |
106 | struct device_attribute *a, char *buf) | |
107 | { | |
108 | const struct spi_device *spi = to_spi_device(dev); | |
109 | ssize_t len; | |
110 | ||
111 | device_lock(dev); | |
112 | len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : ""); | |
113 | device_unlock(dev); | |
114 | return len; | |
115 | } | |
116 | static DEVICE_ATTR_RW(driver_override); | |
117 | ||
eca2ebc7 | 118 | #define SPI_STATISTICS_ATTRS(field, file) \ |
8caab75f GU |
119 | static ssize_t spi_controller_##field##_show(struct device *dev, \ |
120 | struct device_attribute *attr, \ | |
121 | char *buf) \ | |
eca2ebc7 | 122 | { \ |
8caab75f GU |
123 | struct spi_controller *ctlr = container_of(dev, \ |
124 | struct spi_controller, dev); \ | |
125 | return spi_statistics_##field##_show(&ctlr->statistics, buf); \ | |
eca2ebc7 | 126 | } \ |
8caab75f | 127 | static struct device_attribute dev_attr_spi_controller_##field = { \ |
ad25c92e | 128 | .attr = { .name = file, .mode = 0444 }, \ |
8caab75f | 129 | .show = spi_controller_##field##_show, \ |
eca2ebc7 MS |
130 | }; \ |
131 | static ssize_t spi_device_##field##_show(struct device *dev, \ | |
132 | struct device_attribute *attr, \ | |
133 | char *buf) \ | |
134 | { \ | |
d1eba93b | 135 | struct spi_device *spi = to_spi_device(dev); \ |
eca2ebc7 MS |
136 | return spi_statistics_##field##_show(&spi->statistics, buf); \ |
137 | } \ | |
138 | static struct device_attribute dev_attr_spi_device_##field = { \ | |
ad25c92e | 139 | .attr = { .name = file, .mode = 0444 }, \ |
eca2ebc7 MS |
140 | .show = spi_device_##field##_show, \ |
141 | } | |
142 | ||
143 | #define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \ | |
144 | static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \ | |
145 | char *buf) \ | |
146 | { \ | |
147 | unsigned long flags; \ | |
148 | ssize_t len; \ | |
149 | spin_lock_irqsave(&stat->lock, flags); \ | |
150 | len = sprintf(buf, format_string, stat->field); \ | |
151 | spin_unlock_irqrestore(&stat->lock, flags); \ | |
152 | return len; \ | |
153 | } \ | |
154 | SPI_STATISTICS_ATTRS(name, file) | |
155 | ||
156 | #define SPI_STATISTICS_SHOW(field, format_string) \ | |
157 | SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \ | |
158 | field, format_string) | |
159 | ||
160 | SPI_STATISTICS_SHOW(messages, "%lu"); | |
161 | SPI_STATISTICS_SHOW(transfers, "%lu"); | |
162 | SPI_STATISTICS_SHOW(errors, "%lu"); | |
163 | SPI_STATISTICS_SHOW(timedout, "%lu"); | |
164 | ||
165 | SPI_STATISTICS_SHOW(spi_sync, "%lu"); | |
166 | SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu"); | |
167 | SPI_STATISTICS_SHOW(spi_async, "%lu"); | |
168 | ||
169 | SPI_STATISTICS_SHOW(bytes, "%llu"); | |
170 | SPI_STATISTICS_SHOW(bytes_rx, "%llu"); | |
171 | SPI_STATISTICS_SHOW(bytes_tx, "%llu"); | |
172 | ||
6b7bc061 MS |
173 | #define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \ |
174 | SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \ | |
175 | "transfer_bytes_histo_" number, \ | |
176 | transfer_bytes_histo[index], "%lu") | |
177 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1"); | |
178 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3"); | |
179 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7"); | |
180 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15"); | |
181 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31"); | |
182 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63"); | |
183 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127"); | |
184 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255"); | |
185 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511"); | |
186 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023"); | |
187 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047"); | |
188 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095"); | |
189 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191"); | |
190 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383"); | |
191 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767"); | |
192 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535"); | |
193 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+"); | |
194 | ||
d9f12122 MS |
195 | SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu"); |
196 | ||
aa7da564 GKH |
197 | static struct attribute *spi_dev_attrs[] = { |
198 | &dev_attr_modalias.attr, | |
5039563e | 199 | &dev_attr_driver_override.attr, |
aa7da564 | 200 | NULL, |
8ae12a0d | 201 | }; |
eca2ebc7 MS |
202 | |
203 | static const struct attribute_group spi_dev_group = { | |
204 | .attrs = spi_dev_attrs, | |
205 | }; | |
206 | ||
207 | static struct attribute *spi_device_statistics_attrs[] = { | |
208 | &dev_attr_spi_device_messages.attr, | |
209 | &dev_attr_spi_device_transfers.attr, | |
210 | &dev_attr_spi_device_errors.attr, | |
211 | &dev_attr_spi_device_timedout.attr, | |
212 | &dev_attr_spi_device_spi_sync.attr, | |
213 | &dev_attr_spi_device_spi_sync_immediate.attr, | |
214 | &dev_attr_spi_device_spi_async.attr, | |
215 | &dev_attr_spi_device_bytes.attr, | |
216 | &dev_attr_spi_device_bytes_rx.attr, | |
217 | &dev_attr_spi_device_bytes_tx.attr, | |
6b7bc061 MS |
218 | &dev_attr_spi_device_transfer_bytes_histo0.attr, |
219 | &dev_attr_spi_device_transfer_bytes_histo1.attr, | |
220 | &dev_attr_spi_device_transfer_bytes_histo2.attr, | |
221 | &dev_attr_spi_device_transfer_bytes_histo3.attr, | |
222 | &dev_attr_spi_device_transfer_bytes_histo4.attr, | |
223 | &dev_attr_spi_device_transfer_bytes_histo5.attr, | |
224 | &dev_attr_spi_device_transfer_bytes_histo6.attr, | |
225 | &dev_attr_spi_device_transfer_bytes_histo7.attr, | |
226 | &dev_attr_spi_device_transfer_bytes_histo8.attr, | |
227 | &dev_attr_spi_device_transfer_bytes_histo9.attr, | |
228 | &dev_attr_spi_device_transfer_bytes_histo10.attr, | |
229 | &dev_attr_spi_device_transfer_bytes_histo11.attr, | |
230 | &dev_attr_spi_device_transfer_bytes_histo12.attr, | |
231 | &dev_attr_spi_device_transfer_bytes_histo13.attr, | |
232 | &dev_attr_spi_device_transfer_bytes_histo14.attr, | |
233 | &dev_attr_spi_device_transfer_bytes_histo15.attr, | |
234 | &dev_attr_spi_device_transfer_bytes_histo16.attr, | |
d9f12122 | 235 | &dev_attr_spi_device_transfers_split_maxsize.attr, |
eca2ebc7 MS |
236 | NULL, |
237 | }; | |
238 | ||
239 | static const struct attribute_group spi_device_statistics_group = { | |
240 | .name = "statistics", | |
241 | .attrs = spi_device_statistics_attrs, | |
242 | }; | |
243 | ||
244 | static const struct attribute_group *spi_dev_groups[] = { | |
245 | &spi_dev_group, | |
246 | &spi_device_statistics_group, | |
247 | NULL, | |
248 | }; | |
249 | ||
8caab75f GU |
250 | static struct attribute *spi_controller_statistics_attrs[] = { |
251 | &dev_attr_spi_controller_messages.attr, | |
252 | &dev_attr_spi_controller_transfers.attr, | |
253 | &dev_attr_spi_controller_errors.attr, | |
254 | &dev_attr_spi_controller_timedout.attr, | |
255 | &dev_attr_spi_controller_spi_sync.attr, | |
256 | &dev_attr_spi_controller_spi_sync_immediate.attr, | |
257 | &dev_attr_spi_controller_spi_async.attr, | |
258 | &dev_attr_spi_controller_bytes.attr, | |
259 | &dev_attr_spi_controller_bytes_rx.attr, | |
260 | &dev_attr_spi_controller_bytes_tx.attr, | |
261 | &dev_attr_spi_controller_transfer_bytes_histo0.attr, | |
262 | &dev_attr_spi_controller_transfer_bytes_histo1.attr, | |
263 | &dev_attr_spi_controller_transfer_bytes_histo2.attr, | |
264 | &dev_attr_spi_controller_transfer_bytes_histo3.attr, | |
265 | &dev_attr_spi_controller_transfer_bytes_histo4.attr, | |
266 | &dev_attr_spi_controller_transfer_bytes_histo5.attr, | |
267 | &dev_attr_spi_controller_transfer_bytes_histo6.attr, | |
268 | &dev_attr_spi_controller_transfer_bytes_histo7.attr, | |
269 | &dev_attr_spi_controller_transfer_bytes_histo8.attr, | |
270 | &dev_attr_spi_controller_transfer_bytes_histo9.attr, | |
271 | &dev_attr_spi_controller_transfer_bytes_histo10.attr, | |
272 | &dev_attr_spi_controller_transfer_bytes_histo11.attr, | |
273 | &dev_attr_spi_controller_transfer_bytes_histo12.attr, | |
274 | &dev_attr_spi_controller_transfer_bytes_histo13.attr, | |
275 | &dev_attr_spi_controller_transfer_bytes_histo14.attr, | |
276 | &dev_attr_spi_controller_transfer_bytes_histo15.attr, | |
277 | &dev_attr_spi_controller_transfer_bytes_histo16.attr, | |
278 | &dev_attr_spi_controller_transfers_split_maxsize.attr, | |
eca2ebc7 MS |
279 | NULL, |
280 | }; | |
281 | ||
8caab75f | 282 | static const struct attribute_group spi_controller_statistics_group = { |
eca2ebc7 | 283 | .name = "statistics", |
8caab75f | 284 | .attrs = spi_controller_statistics_attrs, |
eca2ebc7 MS |
285 | }; |
286 | ||
287 | static const struct attribute_group *spi_master_groups[] = { | |
8caab75f | 288 | &spi_controller_statistics_group, |
eca2ebc7 MS |
289 | NULL, |
290 | }; | |
291 | ||
292 | void spi_statistics_add_transfer_stats(struct spi_statistics *stats, | |
293 | struct spi_transfer *xfer, | |
8caab75f | 294 | struct spi_controller *ctlr) |
eca2ebc7 MS |
295 | { |
296 | unsigned long flags; | |
6b7bc061 MS |
297 | int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1; |
298 | ||
299 | if (l2len < 0) | |
300 | l2len = 0; | |
eca2ebc7 MS |
301 | |
302 | spin_lock_irqsave(&stats->lock, flags); | |
303 | ||
304 | stats->transfers++; | |
6b7bc061 | 305 | stats->transfer_bytes_histo[l2len]++; |
eca2ebc7 MS |
306 | |
307 | stats->bytes += xfer->len; | |
308 | if ((xfer->tx_buf) && | |
8caab75f | 309 | (xfer->tx_buf != ctlr->dummy_tx)) |
eca2ebc7 MS |
310 | stats->bytes_tx += xfer->len; |
311 | if ((xfer->rx_buf) && | |
8caab75f | 312 | (xfer->rx_buf != ctlr->dummy_rx)) |
eca2ebc7 MS |
313 | stats->bytes_rx += xfer->len; |
314 | ||
315 | spin_unlock_irqrestore(&stats->lock, flags); | |
316 | } | |
317 | EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats); | |
8ae12a0d DB |
318 | |
319 | /* modalias support makes "modprobe $MODALIAS" new-style hotplug work, | |
320 | * and the sysfs version makes coldplug work too. | |
321 | */ | |
322 | ||
75368bf6 AV |
323 | static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, |
324 | const struct spi_device *sdev) | |
325 | { | |
326 | while (id->name[0]) { | |
327 | if (!strcmp(sdev->modalias, id->name)) | |
328 | return id; | |
329 | id++; | |
330 | } | |
331 | return NULL; | |
332 | } | |
333 | ||
334 | const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev) | |
335 | { | |
336 | const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver); | |
337 | ||
338 | return spi_match_id(sdrv->id_table, sdev); | |
339 | } | |
340 | EXPORT_SYMBOL_GPL(spi_get_device_id); | |
341 | ||
8ae12a0d DB |
342 | static int spi_match_device(struct device *dev, struct device_driver *drv) |
343 | { | |
344 | const struct spi_device *spi = to_spi_device(dev); | |
75368bf6 AV |
345 | const struct spi_driver *sdrv = to_spi_driver(drv); |
346 | ||
5039563e TP |
347 | /* Check override first, and if set, only use the named driver */ |
348 | if (spi->driver_override) | |
349 | return strcmp(spi->driver_override, drv->name) == 0; | |
350 | ||
2b7a32f7 SA |
351 | /* Attempt an OF style match */ |
352 | if (of_driver_match_device(dev, drv)) | |
353 | return 1; | |
354 | ||
64bee4d2 MW |
355 | /* Then try ACPI */ |
356 | if (acpi_driver_match_device(dev, drv)) | |
357 | return 1; | |
358 | ||
75368bf6 AV |
359 | if (sdrv->id_table) |
360 | return !!spi_match_id(sdrv->id_table, spi); | |
8ae12a0d | 361 | |
35f74fca | 362 | return strcmp(spi->modalias, drv->name) == 0; |
8ae12a0d DB |
363 | } |
364 | ||
7eff2e7a | 365 | static int spi_uevent(struct device *dev, struct kobj_uevent_env *env) |
8ae12a0d DB |
366 | { |
367 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
368 | int rc; |
369 | ||
370 | rc = acpi_device_uevent_modalias(dev, env); | |
371 | if (rc != -ENODEV) | |
372 | return rc; | |
8ae12a0d | 373 | |
2856670f | 374 | return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d DB |
375 | } |
376 | ||
8ae12a0d DB |
377 | struct bus_type spi_bus_type = { |
378 | .name = "spi", | |
aa7da564 | 379 | .dev_groups = spi_dev_groups, |
8ae12a0d DB |
380 | .match = spi_match_device, |
381 | .uevent = spi_uevent, | |
8ae12a0d DB |
382 | }; |
383 | EXPORT_SYMBOL_GPL(spi_bus_type); | |
384 | ||
b885244e DB |
385 | |
386 | static int spi_drv_probe(struct device *dev) | |
387 | { | |
388 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
44af7927 | 389 | struct spi_device *spi = to_spi_device(dev); |
33cf00e5 MW |
390 | int ret; |
391 | ||
86be408b SN |
392 | ret = of_clk_set_defaults(dev->of_node, false); |
393 | if (ret) | |
394 | return ret; | |
395 | ||
44af7927 JH |
396 | if (dev->of_node) { |
397 | spi->irq = of_irq_get(dev->of_node, 0); | |
398 | if (spi->irq == -EPROBE_DEFER) | |
399 | return -EPROBE_DEFER; | |
400 | if (spi->irq < 0) | |
401 | spi->irq = 0; | |
402 | } | |
403 | ||
676e7c25 | 404 | ret = dev_pm_domain_attach(dev, true); |
71f277a7 UH |
405 | if (ret) |
406 | return ret; | |
407 | ||
408 | ret = sdrv->probe(spi); | |
409 | if (ret) | |
410 | dev_pm_domain_detach(dev, true); | |
b885244e | 411 | |
33cf00e5 | 412 | return ret; |
b885244e DB |
413 | } |
414 | ||
415 | static int spi_drv_remove(struct device *dev) | |
416 | { | |
417 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
33cf00e5 MW |
418 | int ret; |
419 | ||
aec35f4e | 420 | ret = sdrv->remove(to_spi_device(dev)); |
676e7c25 | 421 | dev_pm_domain_detach(dev, true); |
b885244e | 422 | |
33cf00e5 | 423 | return ret; |
b885244e DB |
424 | } |
425 | ||
426 | static void spi_drv_shutdown(struct device *dev) | |
427 | { | |
428 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
429 | ||
430 | sdrv->shutdown(to_spi_device(dev)); | |
431 | } | |
432 | ||
33e34dc6 | 433 | /** |
ca5d2485 | 434 | * __spi_register_driver - register a SPI driver |
88c9321d | 435 | * @owner: owner module of the driver to register |
33e34dc6 DB |
436 | * @sdrv: the driver to register |
437 | * Context: can sleep | |
97d56dc6 JMC |
438 | * |
439 | * Return: zero on success, else a negative error code. | |
33e34dc6 | 440 | */ |
ca5d2485 | 441 | int __spi_register_driver(struct module *owner, struct spi_driver *sdrv) |
b885244e | 442 | { |
ca5d2485 | 443 | sdrv->driver.owner = owner; |
b885244e DB |
444 | sdrv->driver.bus = &spi_bus_type; |
445 | if (sdrv->probe) | |
446 | sdrv->driver.probe = spi_drv_probe; | |
447 | if (sdrv->remove) | |
448 | sdrv->driver.remove = spi_drv_remove; | |
449 | if (sdrv->shutdown) | |
450 | sdrv->driver.shutdown = spi_drv_shutdown; | |
451 | return driver_register(&sdrv->driver); | |
452 | } | |
ca5d2485 | 453 | EXPORT_SYMBOL_GPL(__spi_register_driver); |
b885244e | 454 | |
8ae12a0d DB |
455 | /*-------------------------------------------------------------------------*/ |
456 | ||
457 | /* SPI devices should normally not be created by SPI device drivers; that | |
8caab75f | 458 | * would make them board-specific. Similarly with SPI controller drivers. |
8ae12a0d DB |
459 | * Device registration normally goes into like arch/.../mach.../board-YYY.c |
460 | * with other readonly (flashable) information about mainboard devices. | |
461 | */ | |
462 | ||
463 | struct boardinfo { | |
464 | struct list_head list; | |
2b9603a0 | 465 | struct spi_board_info board_info; |
8ae12a0d DB |
466 | }; |
467 | ||
468 | static LIST_HEAD(board_list); | |
8caab75f | 469 | static LIST_HEAD(spi_controller_list); |
2b9603a0 FT |
470 | |
471 | /* | |
472 | * Used to protect add/del opertion for board_info list and | |
8caab75f | 473 | * spi_controller list, and their matching process |
9a9a047a | 474 | * also used to protect object of type struct idr |
2b9603a0 | 475 | */ |
94040828 | 476 | static DEFINE_MUTEX(board_lock); |
8ae12a0d | 477 | |
dc87c98e GL |
478 | /** |
479 | * spi_alloc_device - Allocate a new SPI device | |
8caab75f | 480 | * @ctlr: Controller to which device is connected |
dc87c98e GL |
481 | * Context: can sleep |
482 | * | |
483 | * Allows a driver to allocate and initialize a spi_device without | |
484 | * registering it immediately. This allows a driver to directly | |
485 | * fill the spi_device with device parameters before calling | |
486 | * spi_add_device() on it. | |
487 | * | |
488 | * Caller is responsible to call spi_add_device() on the returned | |
8caab75f | 489 | * spi_device structure to add it to the SPI controller. If the caller |
dc87c98e GL |
490 | * needs to discard the spi_device without adding it, then it should |
491 | * call spi_dev_put() on it. | |
492 | * | |
97d56dc6 | 493 | * Return: a pointer to the new device, or NULL. |
dc87c98e | 494 | */ |
8caab75f | 495 | struct spi_device *spi_alloc_device(struct spi_controller *ctlr) |
dc87c98e GL |
496 | { |
497 | struct spi_device *spi; | |
dc87c98e | 498 | |
8caab75f | 499 | if (!spi_controller_get(ctlr)) |
dc87c98e GL |
500 | return NULL; |
501 | ||
5fe5f05e | 502 | spi = kzalloc(sizeof(*spi), GFP_KERNEL); |
dc87c98e | 503 | if (!spi) { |
8caab75f | 504 | spi_controller_put(ctlr); |
dc87c98e GL |
505 | return NULL; |
506 | } | |
507 | ||
8caab75f GU |
508 | spi->master = spi->controller = ctlr; |
509 | spi->dev.parent = &ctlr->dev; | |
dc87c98e GL |
510 | spi->dev.bus = &spi_bus_type; |
511 | spi->dev.release = spidev_release; | |
446411e1 | 512 | spi->cs_gpio = -ENOENT; |
eca2ebc7 MS |
513 | |
514 | spin_lock_init(&spi->statistics.lock); | |
515 | ||
dc87c98e GL |
516 | device_initialize(&spi->dev); |
517 | return spi; | |
518 | } | |
519 | EXPORT_SYMBOL_GPL(spi_alloc_device); | |
520 | ||
e13ac47b JN |
521 | static void spi_dev_set_name(struct spi_device *spi) |
522 | { | |
523 | struct acpi_device *adev = ACPI_COMPANION(&spi->dev); | |
524 | ||
525 | if (adev) { | |
526 | dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev)); | |
527 | return; | |
528 | } | |
529 | ||
8caab75f | 530 | dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev), |
e13ac47b JN |
531 | spi->chip_select); |
532 | } | |
533 | ||
b6fb8d3a MW |
534 | static int spi_dev_check(struct device *dev, void *data) |
535 | { | |
536 | struct spi_device *spi = to_spi_device(dev); | |
537 | struct spi_device *new_spi = data; | |
538 | ||
8caab75f | 539 | if (spi->controller == new_spi->controller && |
b6fb8d3a MW |
540 | spi->chip_select == new_spi->chip_select) |
541 | return -EBUSY; | |
542 | return 0; | |
543 | } | |
544 | ||
dc87c98e GL |
545 | /** |
546 | * spi_add_device - Add spi_device allocated with spi_alloc_device | |
547 | * @spi: spi_device to register | |
548 | * | |
549 | * Companion function to spi_alloc_device. Devices allocated with | |
550 | * spi_alloc_device can be added onto the spi bus with this function. | |
551 | * | |
97d56dc6 | 552 | * Return: 0 on success; negative errno on failure |
dc87c98e GL |
553 | */ |
554 | int spi_add_device(struct spi_device *spi) | |
555 | { | |
e48880e0 | 556 | static DEFINE_MUTEX(spi_add_lock); |
8caab75f GU |
557 | struct spi_controller *ctlr = spi->controller; |
558 | struct device *dev = ctlr->dev.parent; | |
dc87c98e GL |
559 | int status; |
560 | ||
561 | /* Chipselects are numbered 0..max; validate. */ | |
8caab75f GU |
562 | if (spi->chip_select >= ctlr->num_chipselect) { |
563 | dev_err(dev, "cs%d >= max %d\n", spi->chip_select, | |
564 | ctlr->num_chipselect); | |
dc87c98e GL |
565 | return -EINVAL; |
566 | } | |
567 | ||
568 | /* Set the bus ID string */ | |
e13ac47b | 569 | spi_dev_set_name(spi); |
e48880e0 DB |
570 | |
571 | /* We need to make sure there's no other device with this | |
572 | * chipselect **BEFORE** we call setup(), else we'll trash | |
573 | * its configuration. Lock against concurrent add() calls. | |
574 | */ | |
575 | mutex_lock(&spi_add_lock); | |
576 | ||
b6fb8d3a MW |
577 | status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); |
578 | if (status) { | |
e48880e0 DB |
579 | dev_err(dev, "chipselect %d already in use\n", |
580 | spi->chip_select); | |
e48880e0 DB |
581 | goto done; |
582 | } | |
583 | ||
f3186dd8 LW |
584 | /* Descriptors take precedence */ |
585 | if (ctlr->cs_gpiods) | |
586 | spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select]; | |
587 | else if (ctlr->cs_gpios) | |
8caab75f | 588 | spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; |
74317984 | 589 | |
e48880e0 DB |
590 | /* Drivers may modify this initial i/o setup, but will |
591 | * normally rely on the device being setup. Devices | |
592 | * using SPI_CS_HIGH can't coexist well otherwise... | |
593 | */ | |
7d077197 | 594 | status = spi_setup(spi); |
dc87c98e | 595 | if (status < 0) { |
eb288a1f LW |
596 | dev_err(dev, "can't setup %s, status %d\n", |
597 | dev_name(&spi->dev), status); | |
e48880e0 | 598 | goto done; |
dc87c98e GL |
599 | } |
600 | ||
e48880e0 | 601 | /* Device may be bound to an active driver when this returns */ |
dc87c98e | 602 | status = device_add(&spi->dev); |
e48880e0 | 603 | if (status < 0) |
eb288a1f LW |
604 | dev_err(dev, "can't add %s, status %d\n", |
605 | dev_name(&spi->dev), status); | |
e48880e0 | 606 | else |
35f74fca | 607 | dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev)); |
dc87c98e | 608 | |
e48880e0 DB |
609 | done: |
610 | mutex_unlock(&spi_add_lock); | |
611 | return status; | |
dc87c98e GL |
612 | } |
613 | EXPORT_SYMBOL_GPL(spi_add_device); | |
8ae12a0d | 614 | |
33e34dc6 DB |
615 | /** |
616 | * spi_new_device - instantiate one new SPI device | |
8caab75f | 617 | * @ctlr: Controller to which device is connected |
33e34dc6 DB |
618 | * @chip: Describes the SPI device |
619 | * Context: can sleep | |
620 | * | |
621 | * On typical mainboards, this is purely internal; and it's not needed | |
8ae12a0d DB |
622 | * after board init creates the hard-wired devices. Some development |
623 | * platforms may not be able to use spi_register_board_info though, and | |
624 | * this is exported so that for example a USB or parport based adapter | |
625 | * driver could add devices (which it would learn about out-of-band). | |
082c8cb4 | 626 | * |
97d56dc6 | 627 | * Return: the new device, or NULL. |
8ae12a0d | 628 | */ |
8caab75f | 629 | struct spi_device *spi_new_device(struct spi_controller *ctlr, |
e9d5a461 | 630 | struct spi_board_info *chip) |
8ae12a0d DB |
631 | { |
632 | struct spi_device *proxy; | |
8ae12a0d DB |
633 | int status; |
634 | ||
082c8cb4 DB |
635 | /* NOTE: caller did any chip->bus_num checks necessary. |
636 | * | |
637 | * Also, unless we change the return value convention to use | |
638 | * error-or-pointer (not NULL-or-pointer), troubleshootability | |
639 | * suggests syslogged diagnostics are best here (ugh). | |
640 | */ | |
641 | ||
8caab75f | 642 | proxy = spi_alloc_device(ctlr); |
dc87c98e | 643 | if (!proxy) |
8ae12a0d DB |
644 | return NULL; |
645 | ||
102eb975 GL |
646 | WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); |
647 | ||
8ae12a0d DB |
648 | proxy->chip_select = chip->chip_select; |
649 | proxy->max_speed_hz = chip->max_speed_hz; | |
980a01c9 | 650 | proxy->mode = chip->mode; |
8ae12a0d | 651 | proxy->irq = chip->irq; |
102eb975 | 652 | strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); |
8ae12a0d DB |
653 | proxy->dev.platform_data = (void *) chip->platform_data; |
654 | proxy->controller_data = chip->controller_data; | |
655 | proxy->controller_state = NULL; | |
8ae12a0d | 656 | |
826cf175 DT |
657 | if (chip->properties) { |
658 | status = device_add_properties(&proxy->dev, chip->properties); | |
659 | if (status) { | |
8caab75f | 660 | dev_err(&ctlr->dev, |
826cf175 DT |
661 | "failed to add properties to '%s': %d\n", |
662 | chip->modalias, status); | |
663 | goto err_dev_put; | |
664 | } | |
8ae12a0d DB |
665 | } |
666 | ||
826cf175 DT |
667 | status = spi_add_device(proxy); |
668 | if (status < 0) | |
669 | goto err_remove_props; | |
670 | ||
8ae12a0d | 671 | return proxy; |
826cf175 DT |
672 | |
673 | err_remove_props: | |
674 | if (chip->properties) | |
675 | device_remove_properties(&proxy->dev); | |
676 | err_dev_put: | |
677 | spi_dev_put(proxy); | |
678 | return NULL; | |
8ae12a0d DB |
679 | } |
680 | EXPORT_SYMBOL_GPL(spi_new_device); | |
681 | ||
3b1884c2 GU |
682 | /** |
683 | * spi_unregister_device - unregister a single SPI device | |
684 | * @spi: spi_device to unregister | |
685 | * | |
686 | * Start making the passed SPI device vanish. Normally this would be handled | |
8caab75f | 687 | * by spi_unregister_controller(). |
3b1884c2 GU |
688 | */ |
689 | void spi_unregister_device(struct spi_device *spi) | |
690 | { | |
bd6c1644 GU |
691 | if (!spi) |
692 | return; | |
693 | ||
8324147f | 694 | if (spi->dev.of_node) { |
bd6c1644 | 695 | of_node_clear_flag(spi->dev.of_node, OF_POPULATED); |
8324147f JH |
696 | of_node_put(spi->dev.of_node); |
697 | } | |
7f24467f OP |
698 | if (ACPI_COMPANION(&spi->dev)) |
699 | acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev)); | |
bd6c1644 | 700 | device_unregister(&spi->dev); |
3b1884c2 GU |
701 | } |
702 | EXPORT_SYMBOL_GPL(spi_unregister_device); | |
703 | ||
8caab75f GU |
704 | static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr, |
705 | struct spi_board_info *bi) | |
2b9603a0 FT |
706 | { |
707 | struct spi_device *dev; | |
708 | ||
8caab75f | 709 | if (ctlr->bus_num != bi->bus_num) |
2b9603a0 FT |
710 | return; |
711 | ||
8caab75f | 712 | dev = spi_new_device(ctlr, bi); |
2b9603a0 | 713 | if (!dev) |
8caab75f | 714 | dev_err(ctlr->dev.parent, "can't create new device for %s\n", |
2b9603a0 FT |
715 | bi->modalias); |
716 | } | |
717 | ||
33e34dc6 DB |
718 | /** |
719 | * spi_register_board_info - register SPI devices for a given board | |
720 | * @info: array of chip descriptors | |
721 | * @n: how many descriptors are provided | |
722 | * Context: can sleep | |
723 | * | |
8ae12a0d DB |
724 | * Board-specific early init code calls this (probably during arch_initcall) |
725 | * with segments of the SPI device table. Any device nodes are created later, | |
726 | * after the relevant parent SPI controller (bus_num) is defined. We keep | |
727 | * this table of devices forever, so that reloading a controller driver will | |
728 | * not make Linux forget about these hard-wired devices. | |
729 | * | |
730 | * Other code can also call this, e.g. a particular add-on board might provide | |
731 | * SPI devices through its expansion connector, so code initializing that board | |
732 | * would naturally declare its SPI devices. | |
733 | * | |
734 | * The board info passed can safely be __initdata ... but be careful of | |
735 | * any embedded pointers (platform_data, etc), they're copied as-is. | |
826cf175 | 736 | * Device properties are deep-copied though. |
97d56dc6 JMC |
737 | * |
738 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 739 | */ |
fd4a319b | 740 | int spi_register_board_info(struct spi_board_info const *info, unsigned n) |
8ae12a0d | 741 | { |
2b9603a0 FT |
742 | struct boardinfo *bi; |
743 | int i; | |
8ae12a0d | 744 | |
c7908a37 | 745 | if (!n) |
f974cf57 | 746 | return 0; |
c7908a37 | 747 | |
f9bdb7fd | 748 | bi = kcalloc(n, sizeof(*bi), GFP_KERNEL); |
8ae12a0d DB |
749 | if (!bi) |
750 | return -ENOMEM; | |
8ae12a0d | 751 | |
2b9603a0 | 752 | for (i = 0; i < n; i++, bi++, info++) { |
8caab75f | 753 | struct spi_controller *ctlr; |
8ae12a0d | 754 | |
2b9603a0 | 755 | memcpy(&bi->board_info, info, sizeof(*info)); |
826cf175 DT |
756 | if (info->properties) { |
757 | bi->board_info.properties = | |
758 | property_entries_dup(info->properties); | |
759 | if (IS_ERR(bi->board_info.properties)) | |
760 | return PTR_ERR(bi->board_info.properties); | |
761 | } | |
762 | ||
2b9603a0 FT |
763 | mutex_lock(&board_lock); |
764 | list_add_tail(&bi->list, &board_list); | |
8caab75f GU |
765 | list_for_each_entry(ctlr, &spi_controller_list, list) |
766 | spi_match_controller_to_boardinfo(ctlr, | |
767 | &bi->board_info); | |
2b9603a0 | 768 | mutex_unlock(&board_lock); |
8ae12a0d | 769 | } |
2b9603a0 FT |
770 | |
771 | return 0; | |
8ae12a0d DB |
772 | } |
773 | ||
774 | /*-------------------------------------------------------------------------*/ | |
775 | ||
b158935f MB |
776 | static void spi_set_cs(struct spi_device *spi, bool enable) |
777 | { | |
778 | if (spi->mode & SPI_CS_HIGH) | |
779 | enable = !enable; | |
780 | ||
f3186dd8 LW |
781 | if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) { |
782 | /* | |
783 | * Honour the SPI_NO_CS flag and invert the enable line, as | |
784 | * active low is default for SPI. Execution paths that handle | |
785 | * polarity inversion in gpiolib (such as device tree) will | |
786 | * enforce active high using the SPI_CS_HIGH resulting in a | |
787 | * double inversion through the code above. | |
788 | */ | |
789 | if (!(spi->mode & SPI_NO_CS)) { | |
790 | if (spi->cs_gpiod) | |
28f7604f FF |
791 | gpiod_set_value_cansleep(spi->cs_gpiod, |
792 | !enable); | |
f3186dd8 | 793 | else |
28f7604f | 794 | gpio_set_value_cansleep(spi->cs_gpio, !enable); |
f3186dd8 | 795 | } |
8eee6b9d | 796 | /* Some SPI masters need both GPIO CS & slave_select */ |
8caab75f GU |
797 | if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && |
798 | spi->controller->set_cs) | |
799 | spi->controller->set_cs(spi, !enable); | |
800 | } else if (spi->controller->set_cs) { | |
801 | spi->controller->set_cs(spi, !enable); | |
8eee6b9d | 802 | } |
b158935f MB |
803 | } |
804 | ||
2de440f5 | 805 | #ifdef CONFIG_HAS_DMA |
46336966 BB |
806 | int spi_map_buf(struct spi_controller *ctlr, struct device *dev, |
807 | struct sg_table *sgt, void *buf, size_t len, | |
808 | enum dma_data_direction dir) | |
6ad45a27 MB |
809 | { |
810 | const bool vmalloced_buf = is_vmalloc_addr(buf); | |
df88e91b | 811 | unsigned int max_seg_size = dma_get_max_seg_size(dev); |
b1b8153c V |
812 | #ifdef CONFIG_HIGHMEM |
813 | const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE && | |
814 | (unsigned long)buf < (PKMAP_BASE + | |
815 | (LAST_PKMAP * PAGE_SIZE))); | |
816 | #else | |
817 | const bool kmap_buf = false; | |
818 | #endif | |
65598c13 AG |
819 | int desc_len; |
820 | int sgs; | |
6ad45a27 | 821 | struct page *vm_page; |
8dd4a016 | 822 | struct scatterlist *sg; |
6ad45a27 MB |
823 | void *sg_buf; |
824 | size_t min; | |
825 | int i, ret; | |
826 | ||
b1b8153c | 827 | if (vmalloced_buf || kmap_buf) { |
df88e91b | 828 | desc_len = min_t(int, max_seg_size, PAGE_SIZE); |
65598c13 | 829 | sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len); |
0569a88f | 830 | } else if (virt_addr_valid(buf)) { |
8caab75f | 831 | desc_len = min_t(int, max_seg_size, ctlr->max_dma_len); |
65598c13 | 832 | sgs = DIV_ROUND_UP(len, desc_len); |
0569a88f V |
833 | } else { |
834 | return -EINVAL; | |
65598c13 AG |
835 | } |
836 | ||
6ad45a27 MB |
837 | ret = sg_alloc_table(sgt, sgs, GFP_KERNEL); |
838 | if (ret != 0) | |
839 | return ret; | |
840 | ||
8dd4a016 | 841 | sg = &sgt->sgl[0]; |
6ad45a27 | 842 | for (i = 0; i < sgs; i++) { |
6ad45a27 | 843 | |
b1b8153c | 844 | if (vmalloced_buf || kmap_buf) { |
ce99319a MC |
845 | /* |
846 | * Next scatterlist entry size is the minimum between | |
847 | * the desc_len and the remaining buffer length that | |
848 | * fits in a page. | |
849 | */ | |
850 | min = min_t(size_t, desc_len, | |
851 | min_t(size_t, len, | |
852 | PAGE_SIZE - offset_in_page(buf))); | |
b1b8153c V |
853 | if (vmalloced_buf) |
854 | vm_page = vmalloc_to_page(buf); | |
855 | else | |
856 | vm_page = kmap_to_page(buf); | |
6ad45a27 MB |
857 | if (!vm_page) { |
858 | sg_free_table(sgt); | |
859 | return -ENOMEM; | |
860 | } | |
8dd4a016 | 861 | sg_set_page(sg, vm_page, |
c1aefbdd | 862 | min, offset_in_page(buf)); |
6ad45a27 | 863 | } else { |
65598c13 | 864 | min = min_t(size_t, len, desc_len); |
6ad45a27 | 865 | sg_buf = buf; |
8dd4a016 | 866 | sg_set_buf(sg, sg_buf, min); |
6ad45a27 MB |
867 | } |
868 | ||
6ad45a27 MB |
869 | buf += min; |
870 | len -= min; | |
8dd4a016 | 871 | sg = sg_next(sg); |
6ad45a27 MB |
872 | } |
873 | ||
874 | ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | |
89e4b66a GU |
875 | if (!ret) |
876 | ret = -ENOMEM; | |
6ad45a27 MB |
877 | if (ret < 0) { |
878 | sg_free_table(sgt); | |
879 | return ret; | |
880 | } | |
881 | ||
882 | sgt->nents = ret; | |
883 | ||
884 | return 0; | |
885 | } | |
886 | ||
46336966 BB |
887 | void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev, |
888 | struct sg_table *sgt, enum dma_data_direction dir) | |
6ad45a27 MB |
889 | { |
890 | if (sgt->orig_nents) { | |
891 | dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir); | |
892 | sg_free_table(sgt); | |
893 | } | |
894 | } | |
895 | ||
8caab75f | 896 | static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 | 897 | { |
99adef31 MB |
898 | struct device *tx_dev, *rx_dev; |
899 | struct spi_transfer *xfer; | |
6ad45a27 | 900 | int ret; |
3a2eba9b | 901 | |
8caab75f | 902 | if (!ctlr->can_dma) |
99adef31 MB |
903 | return 0; |
904 | ||
8caab75f GU |
905 | if (ctlr->dma_tx) |
906 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 907 | else |
8caab75f | 908 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 909 | |
8caab75f GU |
910 | if (ctlr->dma_rx) |
911 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 912 | else |
8caab75f | 913 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
914 | |
915 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 916 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
917 | continue; |
918 | ||
919 | if (xfer->tx_buf != NULL) { | |
8caab75f | 920 | ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
921 | (void *)xfer->tx_buf, xfer->len, |
922 | DMA_TO_DEVICE); | |
923 | if (ret != 0) | |
924 | return ret; | |
99adef31 MB |
925 | } |
926 | ||
927 | if (xfer->rx_buf != NULL) { | |
8caab75f | 928 | ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg, |
6ad45a27 MB |
929 | xfer->rx_buf, xfer->len, |
930 | DMA_FROM_DEVICE); | |
931 | if (ret != 0) { | |
8caab75f | 932 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
933 | DMA_TO_DEVICE); |
934 | return ret; | |
99adef31 MB |
935 | } |
936 | } | |
937 | } | |
938 | ||
8caab75f | 939 | ctlr->cur_msg_mapped = true; |
99adef31 MB |
940 | |
941 | return 0; | |
942 | } | |
943 | ||
8caab75f | 944 | static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 MB |
945 | { |
946 | struct spi_transfer *xfer; | |
947 | struct device *tx_dev, *rx_dev; | |
948 | ||
8caab75f | 949 | if (!ctlr->cur_msg_mapped || !ctlr->can_dma) |
99adef31 MB |
950 | return 0; |
951 | ||
8caab75f GU |
952 | if (ctlr->dma_tx) |
953 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 954 | else |
8caab75f | 955 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 956 | |
8caab75f GU |
957 | if (ctlr->dma_rx) |
958 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 959 | else |
8caab75f | 960 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
961 | |
962 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 963 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
964 | continue; |
965 | ||
8caab75f GU |
966 | spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE); |
967 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE); | |
99adef31 MB |
968 | } |
969 | ||
970 | return 0; | |
971 | } | |
2de440f5 | 972 | #else /* !CONFIG_HAS_DMA */ |
8caab75f | 973 | static inline int __spi_map_msg(struct spi_controller *ctlr, |
2de440f5 GU |
974 | struct spi_message *msg) |
975 | { | |
976 | return 0; | |
977 | } | |
978 | ||
8caab75f | 979 | static inline int __spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 | 980 | struct spi_message *msg) |
2de440f5 GU |
981 | { |
982 | return 0; | |
983 | } | |
984 | #endif /* !CONFIG_HAS_DMA */ | |
985 | ||
8caab75f | 986 | static inline int spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 MS |
987 | struct spi_message *msg) |
988 | { | |
989 | struct spi_transfer *xfer; | |
990 | ||
991 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
992 | /* | |
993 | * Restore the original value of tx_buf or rx_buf if they are | |
994 | * NULL. | |
995 | */ | |
8caab75f | 996 | if (xfer->tx_buf == ctlr->dummy_tx) |
4b786458 | 997 | xfer->tx_buf = NULL; |
8caab75f | 998 | if (xfer->rx_buf == ctlr->dummy_rx) |
4b786458 MS |
999 | xfer->rx_buf = NULL; |
1000 | } | |
1001 | ||
8caab75f | 1002 | return __spi_unmap_msg(ctlr, msg); |
4b786458 MS |
1003 | } |
1004 | ||
8caab75f | 1005 | static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
2de440f5 GU |
1006 | { |
1007 | struct spi_transfer *xfer; | |
1008 | void *tmp; | |
1009 | unsigned int max_tx, max_rx; | |
1010 | ||
8caab75f | 1011 | if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) { |
2de440f5 GU |
1012 | max_tx = 0; |
1013 | max_rx = 0; | |
1014 | ||
1015 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 1016 | if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) && |
2de440f5 GU |
1017 | !xfer->tx_buf) |
1018 | max_tx = max(xfer->len, max_tx); | |
8caab75f | 1019 | if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) && |
2de440f5 GU |
1020 | !xfer->rx_buf) |
1021 | max_rx = max(xfer->len, max_rx); | |
1022 | } | |
1023 | ||
1024 | if (max_tx) { | |
8caab75f | 1025 | tmp = krealloc(ctlr->dummy_tx, max_tx, |
2de440f5 GU |
1026 | GFP_KERNEL | GFP_DMA); |
1027 | if (!tmp) | |
1028 | return -ENOMEM; | |
8caab75f | 1029 | ctlr->dummy_tx = tmp; |
2de440f5 GU |
1030 | memset(tmp, 0, max_tx); |
1031 | } | |
1032 | ||
1033 | if (max_rx) { | |
8caab75f | 1034 | tmp = krealloc(ctlr->dummy_rx, max_rx, |
2de440f5 GU |
1035 | GFP_KERNEL | GFP_DMA); |
1036 | if (!tmp) | |
1037 | return -ENOMEM; | |
8caab75f | 1038 | ctlr->dummy_rx = tmp; |
2de440f5 GU |
1039 | } |
1040 | ||
1041 | if (max_tx || max_rx) { | |
1042 | list_for_each_entry(xfer, &msg->transfers, | |
1043 | transfer_list) { | |
5442dcaa CL |
1044 | if (!xfer->len) |
1045 | continue; | |
2de440f5 | 1046 | if (!xfer->tx_buf) |
8caab75f | 1047 | xfer->tx_buf = ctlr->dummy_tx; |
2de440f5 | 1048 | if (!xfer->rx_buf) |
8caab75f | 1049 | xfer->rx_buf = ctlr->dummy_rx; |
2de440f5 GU |
1050 | } |
1051 | } | |
1052 | } | |
1053 | ||
8caab75f | 1054 | return __spi_map_msg(ctlr, msg); |
2de440f5 | 1055 | } |
99adef31 | 1056 | |
810923f3 LR |
1057 | static int spi_transfer_wait(struct spi_controller *ctlr, |
1058 | struct spi_message *msg, | |
1059 | struct spi_transfer *xfer) | |
1060 | { | |
1061 | struct spi_statistics *statm = &ctlr->statistics; | |
1062 | struct spi_statistics *stats = &msg->spi->statistics; | |
1063 | unsigned long long ms = 1; | |
1064 | ||
1065 | if (spi_controller_is_slave(ctlr)) { | |
1066 | if (wait_for_completion_interruptible(&ctlr->xfer_completion)) { | |
1067 | dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n"); | |
1068 | return -EINTR; | |
1069 | } | |
1070 | } else { | |
1071 | ms = 8LL * 1000LL * xfer->len; | |
1072 | do_div(ms, xfer->speed_hz); | |
1073 | ms += ms + 200; /* some tolerance */ | |
1074 | ||
1075 | if (ms > UINT_MAX) | |
1076 | ms = UINT_MAX; | |
1077 | ||
1078 | ms = wait_for_completion_timeout(&ctlr->xfer_completion, | |
1079 | msecs_to_jiffies(ms)); | |
1080 | ||
1081 | if (ms == 0) { | |
1082 | SPI_STATISTICS_INCREMENT_FIELD(statm, timedout); | |
1083 | SPI_STATISTICS_INCREMENT_FIELD(stats, timedout); | |
1084 | dev_err(&msg->spi->dev, | |
1085 | "SPI transfer timed out\n"); | |
1086 | return -ETIMEDOUT; | |
1087 | } | |
1088 | } | |
1089 | ||
1090 | return 0; | |
1091 | } | |
1092 | ||
0ff2de8b MS |
1093 | static void _spi_transfer_delay_ns(u32 ns) |
1094 | { | |
1095 | if (!ns) | |
1096 | return; | |
1097 | if (ns <= 1000) { | |
1098 | ndelay(ns); | |
1099 | } else { | |
1100 | u32 us = DIV_ROUND_UP(ns, 1000); | |
1101 | ||
1102 | if (us <= 10) | |
1103 | udelay(us); | |
1104 | else | |
1105 | usleep_range(us, us + DIV_ROUND_UP(us, 10)); | |
1106 | } | |
1107 | } | |
1108 | ||
1109 | static void _spi_transfer_cs_change_delay(struct spi_message *msg, | |
1110 | struct spi_transfer *xfer) | |
1111 | { | |
1112 | u32 delay = xfer->cs_change_delay; | |
1113 | u32 unit = xfer->cs_change_delay_unit; | |
d5864e5b | 1114 | u32 hz; |
0ff2de8b MS |
1115 | |
1116 | /* return early on "fast" mode - for everything but USECS */ | |
1117 | if (!delay && unit != SPI_DELAY_UNIT_USECS) | |
1118 | return; | |
1119 | ||
1120 | switch (unit) { | |
1121 | case SPI_DELAY_UNIT_USECS: | |
1122 | /* for compatibility use default of 10us */ | |
1123 | if (!delay) | |
1124 | delay = 10000; | |
1125 | else | |
1126 | delay *= 1000; | |
1127 | break; | |
1128 | case SPI_DELAY_UNIT_NSECS: /* nothing to do here */ | |
1129 | break; | |
d5864e5b MS |
1130 | case SPI_DELAY_UNIT_SCK: |
1131 | /* if there is no effective speed know, then approximate | |
1132 | * by underestimating with half the requested hz | |
1133 | */ | |
1134 | hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2; | |
1135 | delay *= DIV_ROUND_UP(1000000000, hz); | |
1136 | break; | |
0ff2de8b MS |
1137 | default: |
1138 | dev_err_once(&msg->spi->dev, | |
1139 | "Use of unsupported delay unit %i, using default of 10us\n", | |
1140 | xfer->cs_change_delay_unit); | |
1141 | delay = 10000; | |
1142 | } | |
1143 | /* now sleep for the requested amount of time */ | |
1144 | _spi_transfer_delay_ns(delay); | |
1145 | } | |
1146 | ||
b158935f MB |
1147 | /* |
1148 | * spi_transfer_one_message - Default implementation of transfer_one_message() | |
1149 | * | |
1150 | * This is a standard implementation of transfer_one_message() for | |
8ba811a7 | 1151 | * drivers which implement a transfer_one() operation. It provides |
b158935f MB |
1152 | * standard handling of delays and chip select management. |
1153 | */ | |
8caab75f | 1154 | static int spi_transfer_one_message(struct spi_controller *ctlr, |
b158935f MB |
1155 | struct spi_message *msg) |
1156 | { | |
1157 | struct spi_transfer *xfer; | |
b158935f MB |
1158 | bool keep_cs = false; |
1159 | int ret = 0; | |
8caab75f | 1160 | struct spi_statistics *statm = &ctlr->statistics; |
eca2ebc7 | 1161 | struct spi_statistics *stats = &msg->spi->statistics; |
b158935f MB |
1162 | |
1163 | spi_set_cs(msg->spi, true); | |
1164 | ||
eca2ebc7 MS |
1165 | SPI_STATISTICS_INCREMENT_FIELD(statm, messages); |
1166 | SPI_STATISTICS_INCREMENT_FIELD(stats, messages); | |
1167 | ||
b158935f MB |
1168 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
1169 | trace_spi_transfer_start(msg, xfer); | |
1170 | ||
8caab75f GU |
1171 | spi_statistics_add_transfer_stats(statm, xfer, ctlr); |
1172 | spi_statistics_add_transfer_stats(stats, xfer, ctlr); | |
eca2ebc7 | 1173 | |
38ec10f6 | 1174 | if (xfer->tx_buf || xfer->rx_buf) { |
8caab75f | 1175 | reinit_completion(&ctlr->xfer_completion); |
b158935f | 1176 | |
8caab75f | 1177 | ret = ctlr->transfer_one(ctlr, msg->spi, xfer); |
38ec10f6 | 1178 | if (ret < 0) { |
eca2ebc7 MS |
1179 | SPI_STATISTICS_INCREMENT_FIELD(statm, |
1180 | errors); | |
1181 | SPI_STATISTICS_INCREMENT_FIELD(stats, | |
1182 | errors); | |
38ec10f6 MB |
1183 | dev_err(&msg->spi->dev, |
1184 | "SPI transfer failed: %d\n", ret); | |
1185 | goto out; | |
1186 | } | |
b158935f | 1187 | |
d57e7960 MB |
1188 | if (ret > 0) { |
1189 | ret = spi_transfer_wait(ctlr, msg, xfer); | |
1190 | if (ret < 0) | |
1191 | msg->status = ret; | |
1192 | } | |
38ec10f6 MB |
1193 | } else { |
1194 | if (xfer->len) | |
1195 | dev_err(&msg->spi->dev, | |
1196 | "Bufferless transfer has length %u\n", | |
1197 | xfer->len); | |
13a42798 | 1198 | } |
b158935f MB |
1199 | |
1200 | trace_spi_transfer_stop(msg, xfer); | |
1201 | ||
1202 | if (msg->status != -EINPROGRESS) | |
1203 | goto out; | |
1204 | ||
0ff2de8b MS |
1205 | if (xfer->delay_usecs) |
1206 | _spi_transfer_delay_ns(xfer->delay_usecs * 1000); | |
b158935f MB |
1207 | |
1208 | if (xfer->cs_change) { | |
1209 | if (list_is_last(&xfer->transfer_list, | |
1210 | &msg->transfers)) { | |
1211 | keep_cs = true; | |
1212 | } else { | |
0b73aa63 | 1213 | spi_set_cs(msg->spi, false); |
0ff2de8b | 1214 | _spi_transfer_cs_change_delay(msg, xfer); |
0b73aa63 | 1215 | spi_set_cs(msg->spi, true); |
b158935f MB |
1216 | } |
1217 | } | |
1218 | ||
1219 | msg->actual_length += xfer->len; | |
1220 | } | |
1221 | ||
1222 | out: | |
1223 | if (ret != 0 || !keep_cs) | |
1224 | spi_set_cs(msg->spi, false); | |
1225 | ||
1226 | if (msg->status == -EINPROGRESS) | |
1227 | msg->status = ret; | |
1228 | ||
8caab75f GU |
1229 | if (msg->status && ctlr->handle_err) |
1230 | ctlr->handle_err(ctlr, msg); | |
b716c4ff | 1231 | |
c9ba7a16 NT |
1232 | spi_res_release(ctlr, msg); |
1233 | ||
0ed56252 MB |
1234 | spi_finalize_current_message(ctlr); |
1235 | ||
b158935f MB |
1236 | return ret; |
1237 | } | |
1238 | ||
1239 | /** | |
1240 | * spi_finalize_current_transfer - report completion of a transfer | |
8caab75f | 1241 | * @ctlr: the controller reporting completion |
b158935f MB |
1242 | * |
1243 | * Called by SPI drivers using the core transfer_one_message() | |
1244 | * implementation to notify it that the current interrupt driven | |
9e8f4882 | 1245 | * transfer has finished and the next one may be scheduled. |
b158935f | 1246 | */ |
8caab75f | 1247 | void spi_finalize_current_transfer(struct spi_controller *ctlr) |
b158935f | 1248 | { |
8caab75f | 1249 | complete(&ctlr->xfer_completion); |
b158935f MB |
1250 | } |
1251 | EXPORT_SYMBOL_GPL(spi_finalize_current_transfer); | |
1252 | ||
ffbbdd21 | 1253 | /** |
fc9e0f71 | 1254 | * __spi_pump_messages - function which processes spi message queue |
8caab75f | 1255 | * @ctlr: controller to process queue for |
fc9e0f71 | 1256 | * @in_kthread: true if we are in the context of the message pump thread |
ffbbdd21 LW |
1257 | * |
1258 | * This function checks if there is any spi message in the queue that | |
1259 | * needs processing and if so call out to the driver to initialize hardware | |
1260 | * and transfer each message. | |
1261 | * | |
0461a414 MB |
1262 | * Note that it is called both from the kthread itself and also from |
1263 | * inside spi_sync(); the queue extraction handling at the top of the | |
1264 | * function should deal with this safely. | |
ffbbdd21 | 1265 | */ |
8caab75f | 1266 | static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread) |
ffbbdd21 | 1267 | { |
ffbbdd21 LW |
1268 | unsigned long flags; |
1269 | bool was_busy = false; | |
1270 | int ret; | |
1271 | ||
983aee5d | 1272 | /* Lock queue */ |
8caab75f | 1273 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
983aee5d MB |
1274 | |
1275 | /* Make sure we are not already running a message */ | |
8caab75f GU |
1276 | if (ctlr->cur_msg) { |
1277 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
983aee5d MB |
1278 | return; |
1279 | } | |
1280 | ||
f0125f1a | 1281 | /* If another context is idling the device then defer */ |
8caab75f GU |
1282 | if (ctlr->idling) { |
1283 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
1284 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
0461a414 MB |
1285 | return; |
1286 | } | |
1287 | ||
983aee5d | 1288 | /* Check if the queue is idle */ |
8caab75f GU |
1289 | if (list_empty(&ctlr->queue) || !ctlr->running) { |
1290 | if (!ctlr->busy) { | |
1291 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
b0b36b86 | 1292 | return; |
ffbbdd21 | 1293 | } |
fc9e0f71 | 1294 | |
f0125f1a MB |
1295 | /* Only do teardown in the thread */ |
1296 | if (!in_kthread) { | |
1297 | kthread_queue_work(&ctlr->kworker, | |
1298 | &ctlr->pump_messages); | |
1299 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
1300 | return; | |
1301 | } | |
1302 | ||
1303 | ctlr->busy = false; | |
1304 | ctlr->idling = true; | |
1305 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
1306 | ||
1307 | kfree(ctlr->dummy_rx); | |
1308 | ctlr->dummy_rx = NULL; | |
1309 | kfree(ctlr->dummy_tx); | |
1310 | ctlr->dummy_tx = NULL; | |
1311 | if (ctlr->unprepare_transfer_hardware && | |
1312 | ctlr->unprepare_transfer_hardware(ctlr)) | |
1313 | dev_err(&ctlr->dev, | |
1314 | "failed to unprepare transfer hardware\n"); | |
1315 | if (ctlr->auto_runtime_pm) { | |
1316 | pm_runtime_mark_last_busy(ctlr->dev.parent); | |
1317 | pm_runtime_put_autosuspend(ctlr->dev.parent); | |
1318 | } | |
1319 | trace_spi_controller_idle(ctlr); | |
1320 | ||
1321 | spin_lock_irqsave(&ctlr->queue_lock, flags); | |
1322 | ctlr->idling = false; | |
8caab75f | 1323 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1324 | return; |
1325 | } | |
ffbbdd21 | 1326 | |
ffbbdd21 | 1327 | /* Extract head of queue */ |
8caab75f GU |
1328 | ctlr->cur_msg = |
1329 | list_first_entry(&ctlr->queue, struct spi_message, queue); | |
ffbbdd21 | 1330 | |
8caab75f GU |
1331 | list_del_init(&ctlr->cur_msg->queue); |
1332 | if (ctlr->busy) | |
ffbbdd21 LW |
1333 | was_busy = true; |
1334 | else | |
8caab75f GU |
1335 | ctlr->busy = true; |
1336 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1337 | |
8caab75f | 1338 | mutex_lock(&ctlr->io_mutex); |
ef4d96ec | 1339 | |
8caab75f GU |
1340 | if (!was_busy && ctlr->auto_runtime_pm) { |
1341 | ret = pm_runtime_get_sync(ctlr->dev.parent); | |
49834de2 | 1342 | if (ret < 0) { |
7e48e23a | 1343 | pm_runtime_put_noidle(ctlr->dev.parent); |
8caab75f | 1344 | dev_err(&ctlr->dev, "Failed to power device: %d\n", |
49834de2 | 1345 | ret); |
8caab75f | 1346 | mutex_unlock(&ctlr->io_mutex); |
49834de2 MB |
1347 | return; |
1348 | } | |
1349 | } | |
1350 | ||
56ec1978 | 1351 | if (!was_busy) |
8caab75f | 1352 | trace_spi_controller_busy(ctlr); |
56ec1978 | 1353 | |
8caab75f GU |
1354 | if (!was_busy && ctlr->prepare_transfer_hardware) { |
1355 | ret = ctlr->prepare_transfer_hardware(ctlr); | |
ffbbdd21 | 1356 | if (ret) { |
8caab75f | 1357 | dev_err(&ctlr->dev, |
f3440d9a SL |
1358 | "failed to prepare transfer hardware: %d\n", |
1359 | ret); | |
49834de2 | 1360 | |
8caab75f GU |
1361 | if (ctlr->auto_runtime_pm) |
1362 | pm_runtime_put(ctlr->dev.parent); | |
f3440d9a SL |
1363 | |
1364 | ctlr->cur_msg->status = ret; | |
1365 | spi_finalize_current_message(ctlr); | |
1366 | ||
8caab75f | 1367 | mutex_unlock(&ctlr->io_mutex); |
ffbbdd21 LW |
1368 | return; |
1369 | } | |
1370 | } | |
1371 | ||
8caab75f | 1372 | trace_spi_message_start(ctlr->cur_msg); |
56ec1978 | 1373 | |
8caab75f GU |
1374 | if (ctlr->prepare_message) { |
1375 | ret = ctlr->prepare_message(ctlr, ctlr->cur_msg); | |
2841a5fc | 1376 | if (ret) { |
8caab75f GU |
1377 | dev_err(&ctlr->dev, "failed to prepare message: %d\n", |
1378 | ret); | |
1379 | ctlr->cur_msg->status = ret; | |
1380 | spi_finalize_current_message(ctlr); | |
49023d2e | 1381 | goto out; |
2841a5fc | 1382 | } |
8caab75f | 1383 | ctlr->cur_msg_prepared = true; |
2841a5fc MB |
1384 | } |
1385 | ||
8caab75f | 1386 | ret = spi_map_msg(ctlr, ctlr->cur_msg); |
99adef31 | 1387 | if (ret) { |
8caab75f GU |
1388 | ctlr->cur_msg->status = ret; |
1389 | spi_finalize_current_message(ctlr); | |
49023d2e | 1390 | goto out; |
99adef31 MB |
1391 | } |
1392 | ||
8caab75f | 1393 | ret = ctlr->transfer_one_message(ctlr, ctlr->cur_msg); |
ffbbdd21 | 1394 | if (ret) { |
8caab75f | 1395 | dev_err(&ctlr->dev, |
1f802f82 | 1396 | "failed to transfer one message from queue\n"); |
49023d2e | 1397 | goto out; |
ffbbdd21 | 1398 | } |
49023d2e JH |
1399 | |
1400 | out: | |
8caab75f | 1401 | mutex_unlock(&ctlr->io_mutex); |
62826970 MB |
1402 | |
1403 | /* Prod the scheduler in case transfer_one() was busy waiting */ | |
49023d2e JH |
1404 | if (!ret) |
1405 | cond_resched(); | |
ffbbdd21 LW |
1406 | } |
1407 | ||
fc9e0f71 MB |
1408 | /** |
1409 | * spi_pump_messages - kthread work function which processes spi message queue | |
8caab75f | 1410 | * @work: pointer to kthread work struct contained in the controller struct |
fc9e0f71 MB |
1411 | */ |
1412 | static void spi_pump_messages(struct kthread_work *work) | |
1413 | { | |
8caab75f GU |
1414 | struct spi_controller *ctlr = |
1415 | container_of(work, struct spi_controller, pump_messages); | |
fc9e0f71 | 1416 | |
8caab75f | 1417 | __spi_pump_messages(ctlr, true); |
fc9e0f71 MB |
1418 | } |
1419 | ||
924b5867 DA |
1420 | /** |
1421 | * spi_set_thread_rt - set the controller to pump at realtime priority | |
1422 | * @ctlr: controller to boost priority of | |
1423 | * | |
1424 | * This can be called because the controller requested realtime priority | |
1425 | * (by setting the ->rt value before calling spi_register_controller()) or | |
1426 | * because a device on the bus said that its transfers needed realtime | |
1427 | * priority. | |
1428 | * | |
1429 | * NOTE: at the moment if any device on a bus says it needs realtime then | |
1430 | * the thread will be at realtime priority for all transfers on that | |
1431 | * controller. If this eventually becomes a problem we may see if we can | |
1432 | * find a way to boost the priority only temporarily during relevant | |
1433 | * transfers. | |
1434 | */ | |
1435 | static void spi_set_thread_rt(struct spi_controller *ctlr) | |
ffbbdd21 LW |
1436 | { |
1437 | struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; | |
1438 | ||
924b5867 DA |
1439 | dev_info(&ctlr->dev, |
1440 | "will run message pump with realtime priority\n"); | |
1441 | sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, ¶m); | |
1442 | } | |
1443 | ||
1444 | static int spi_init_queue(struct spi_controller *ctlr) | |
1445 | { | |
8caab75f GU |
1446 | ctlr->running = false; |
1447 | ctlr->busy = false; | |
ffbbdd21 | 1448 | |
8caab75f GU |
1449 | kthread_init_worker(&ctlr->kworker); |
1450 | ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker, | |
1451 | "%s", dev_name(&ctlr->dev)); | |
1452 | if (IS_ERR(ctlr->kworker_task)) { | |
1453 | dev_err(&ctlr->dev, "failed to create message pump task\n"); | |
1454 | return PTR_ERR(ctlr->kworker_task); | |
ffbbdd21 | 1455 | } |
8caab75f | 1456 | kthread_init_work(&ctlr->pump_messages, spi_pump_messages); |
f0125f1a | 1457 | |
ffbbdd21 | 1458 | /* |
8caab75f | 1459 | * Controller config will indicate if this controller should run the |
ffbbdd21 LW |
1460 | * message pump with high (realtime) priority to reduce the transfer |
1461 | * latency on the bus by minimising the delay between a transfer | |
1462 | * request and the scheduling of the message pump thread. Without this | |
1463 | * setting the message pump thread will remain at default priority. | |
1464 | */ | |
924b5867 DA |
1465 | if (ctlr->rt) |
1466 | spi_set_thread_rt(ctlr); | |
ffbbdd21 LW |
1467 | |
1468 | return 0; | |
1469 | } | |
1470 | ||
1471 | /** | |
1472 | * spi_get_next_queued_message() - called by driver to check for queued | |
1473 | * messages | |
8caab75f | 1474 | * @ctlr: the controller to check for queued messages |
ffbbdd21 LW |
1475 | * |
1476 | * If there are more messages in the queue, the next message is returned from | |
1477 | * this call. | |
97d56dc6 JMC |
1478 | * |
1479 | * Return: the next message in the queue, else NULL if the queue is empty. | |
ffbbdd21 | 1480 | */ |
8caab75f | 1481 | struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1482 | { |
1483 | struct spi_message *next; | |
1484 | unsigned long flags; | |
1485 | ||
1486 | /* get a pointer to the next message, if any */ | |
8caab75f GU |
1487 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1488 | next = list_first_entry_or_null(&ctlr->queue, struct spi_message, | |
1cfd97f9 | 1489 | queue); |
8caab75f | 1490 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1491 | |
1492 | return next; | |
1493 | } | |
1494 | EXPORT_SYMBOL_GPL(spi_get_next_queued_message); | |
1495 | ||
1496 | /** | |
1497 | * spi_finalize_current_message() - the current message is complete | |
8caab75f | 1498 | * @ctlr: the controller to return the message to |
ffbbdd21 LW |
1499 | * |
1500 | * Called by the driver to notify the core that the message in the front of the | |
1501 | * queue is complete and can be removed from the queue. | |
1502 | */ | |
8caab75f | 1503 | void spi_finalize_current_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1504 | { |
1505 | struct spi_message *mesg; | |
1506 | unsigned long flags; | |
2841a5fc | 1507 | int ret; |
ffbbdd21 | 1508 | |
8caab75f GU |
1509 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1510 | mesg = ctlr->cur_msg; | |
1511 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1512 | |
8caab75f | 1513 | spi_unmap_msg(ctlr, mesg); |
99adef31 | 1514 | |
8caab75f GU |
1515 | if (ctlr->cur_msg_prepared && ctlr->unprepare_message) { |
1516 | ret = ctlr->unprepare_message(ctlr, mesg); | |
2841a5fc | 1517 | if (ret) { |
8caab75f GU |
1518 | dev_err(&ctlr->dev, "failed to unprepare message: %d\n", |
1519 | ret); | |
2841a5fc MB |
1520 | } |
1521 | } | |
391949b6 | 1522 | |
8caab75f GU |
1523 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1524 | ctlr->cur_msg = NULL; | |
1525 | ctlr->cur_msg_prepared = false; | |
f0125f1a | 1526 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); |
8caab75f | 1527 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
8e76ef88 MS |
1528 | |
1529 | trace_spi_message_done(mesg); | |
2841a5fc | 1530 | |
ffbbdd21 LW |
1531 | mesg->state = NULL; |
1532 | if (mesg->complete) | |
1533 | mesg->complete(mesg->context); | |
1534 | } | |
1535 | EXPORT_SYMBOL_GPL(spi_finalize_current_message); | |
1536 | ||
8caab75f | 1537 | static int spi_start_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1538 | { |
1539 | unsigned long flags; | |
1540 | ||
8caab75f | 1541 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1542 | |
8caab75f GU |
1543 | if (ctlr->running || ctlr->busy) { |
1544 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1545 | return -EBUSY; |
1546 | } | |
1547 | ||
8caab75f GU |
1548 | ctlr->running = true; |
1549 | ctlr->cur_msg = NULL; | |
1550 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1551 | |
8caab75f | 1552 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); |
ffbbdd21 LW |
1553 | |
1554 | return 0; | |
1555 | } | |
1556 | ||
8caab75f | 1557 | static int spi_stop_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1558 | { |
1559 | unsigned long flags; | |
1560 | unsigned limit = 500; | |
1561 | int ret = 0; | |
1562 | ||
8caab75f | 1563 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1564 | |
1565 | /* | |
1566 | * This is a bit lame, but is optimized for the common execution path. | |
8caab75f | 1567 | * A wait_queue on the ctlr->busy could be used, but then the common |
ffbbdd21 LW |
1568 | * execution path (pump_messages) would be required to call wake_up or |
1569 | * friends on every SPI message. Do this instead. | |
1570 | */ | |
8caab75f GU |
1571 | while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) { |
1572 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
f97b26b0 | 1573 | usleep_range(10000, 11000); |
8caab75f | 1574 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1575 | } |
1576 | ||
8caab75f | 1577 | if (!list_empty(&ctlr->queue) || ctlr->busy) |
ffbbdd21 LW |
1578 | ret = -EBUSY; |
1579 | else | |
8caab75f | 1580 | ctlr->running = false; |
ffbbdd21 | 1581 | |
8caab75f | 1582 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1583 | |
1584 | if (ret) { | |
8caab75f | 1585 | dev_warn(&ctlr->dev, "could not stop message queue\n"); |
ffbbdd21 LW |
1586 | return ret; |
1587 | } | |
1588 | return ret; | |
1589 | } | |
1590 | ||
8caab75f | 1591 | static int spi_destroy_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1592 | { |
1593 | int ret; | |
1594 | ||
8caab75f | 1595 | ret = spi_stop_queue(ctlr); |
ffbbdd21 LW |
1596 | |
1597 | /* | |
3989144f | 1598 | * kthread_flush_worker will block until all work is done. |
ffbbdd21 LW |
1599 | * If the reason that stop_queue timed out is that the work will never |
1600 | * finish, then it does no good to call flush/stop thread, so | |
1601 | * return anyway. | |
1602 | */ | |
1603 | if (ret) { | |
8caab75f | 1604 | dev_err(&ctlr->dev, "problem destroying queue\n"); |
ffbbdd21 LW |
1605 | return ret; |
1606 | } | |
1607 | ||
8caab75f GU |
1608 | kthread_flush_worker(&ctlr->kworker); |
1609 | kthread_stop(ctlr->kworker_task); | |
ffbbdd21 LW |
1610 | |
1611 | return 0; | |
1612 | } | |
1613 | ||
0461a414 MB |
1614 | static int __spi_queued_transfer(struct spi_device *spi, |
1615 | struct spi_message *msg, | |
1616 | bool need_pump) | |
ffbbdd21 | 1617 | { |
8caab75f | 1618 | struct spi_controller *ctlr = spi->controller; |
ffbbdd21 LW |
1619 | unsigned long flags; |
1620 | ||
8caab75f | 1621 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1622 | |
8caab75f GU |
1623 | if (!ctlr->running) { |
1624 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1625 | return -ESHUTDOWN; |
1626 | } | |
1627 | msg->actual_length = 0; | |
1628 | msg->status = -EINPROGRESS; | |
1629 | ||
8caab75f | 1630 | list_add_tail(&msg->queue, &ctlr->queue); |
f0125f1a | 1631 | if (!ctlr->busy && need_pump) |
8caab75f | 1632 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); |
ffbbdd21 | 1633 | |
8caab75f | 1634 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1635 | return 0; |
1636 | } | |
1637 | ||
0461a414 MB |
1638 | /** |
1639 | * spi_queued_transfer - transfer function for queued transfers | |
1640 | * @spi: spi device which is requesting transfer | |
1641 | * @msg: spi message which is to handled is queued to driver queue | |
97d56dc6 JMC |
1642 | * |
1643 | * Return: zero on success, else a negative error code. | |
0461a414 MB |
1644 | */ |
1645 | static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg) | |
1646 | { | |
1647 | return __spi_queued_transfer(spi, msg, true); | |
1648 | } | |
1649 | ||
8caab75f | 1650 | static int spi_controller_initialize_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1651 | { |
1652 | int ret; | |
1653 | ||
8caab75f GU |
1654 | ctlr->transfer = spi_queued_transfer; |
1655 | if (!ctlr->transfer_one_message) | |
1656 | ctlr->transfer_one_message = spi_transfer_one_message; | |
ffbbdd21 LW |
1657 | |
1658 | /* Initialize and start queue */ | |
8caab75f | 1659 | ret = spi_init_queue(ctlr); |
ffbbdd21 | 1660 | if (ret) { |
8caab75f | 1661 | dev_err(&ctlr->dev, "problem initializing queue\n"); |
ffbbdd21 LW |
1662 | goto err_init_queue; |
1663 | } | |
8caab75f GU |
1664 | ctlr->queued = true; |
1665 | ret = spi_start_queue(ctlr); | |
ffbbdd21 | 1666 | if (ret) { |
8caab75f | 1667 | dev_err(&ctlr->dev, "problem starting queue\n"); |
ffbbdd21 LW |
1668 | goto err_start_queue; |
1669 | } | |
1670 | ||
1671 | return 0; | |
1672 | ||
1673 | err_start_queue: | |
8caab75f | 1674 | spi_destroy_queue(ctlr); |
c3676d5c | 1675 | err_init_queue: |
ffbbdd21 LW |
1676 | return ret; |
1677 | } | |
1678 | ||
988f259b BB |
1679 | /** |
1680 | * spi_flush_queue - Send all pending messages in the queue from the callers' | |
1681 | * context | |
1682 | * @ctlr: controller to process queue for | |
1683 | * | |
1684 | * This should be used when one wants to ensure all pending messages have been | |
1685 | * sent before doing something. Is used by the spi-mem code to make sure SPI | |
1686 | * memory operations do not preempt regular SPI transfers that have been queued | |
1687 | * before the spi-mem operation. | |
1688 | */ | |
1689 | void spi_flush_queue(struct spi_controller *ctlr) | |
1690 | { | |
1691 | if (ctlr->transfer == spi_queued_transfer) | |
1692 | __spi_pump_messages(ctlr, false); | |
1693 | } | |
1694 | ||
ffbbdd21 LW |
1695 | /*-------------------------------------------------------------------------*/ |
1696 | ||
7cb94361 | 1697 | #if defined(CONFIG_OF) |
8caab75f | 1698 | static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, |
c2e51ac3 | 1699 | struct device_node *nc) |
aff5e3f8 | 1700 | { |
aff5e3f8 | 1701 | u32 value; |
c2e51ac3 | 1702 | int rc; |
aff5e3f8 | 1703 | |
aff5e3f8 | 1704 | /* Mode (clock phase/polarity/etc.) */ |
e0bcb680 | 1705 | if (of_property_read_bool(nc, "spi-cpha")) |
aff5e3f8 | 1706 | spi->mode |= SPI_CPHA; |
e0bcb680 | 1707 | if (of_property_read_bool(nc, "spi-cpol")) |
aff5e3f8 | 1708 | spi->mode |= SPI_CPOL; |
e0bcb680 | 1709 | if (of_property_read_bool(nc, "spi-3wire")) |
aff5e3f8 | 1710 | spi->mode |= SPI_3WIRE; |
e0bcb680 | 1711 | if (of_property_read_bool(nc, "spi-lsb-first")) |
aff5e3f8 PA |
1712 | spi->mode |= SPI_LSB_FIRST; |
1713 | ||
f3186dd8 LW |
1714 | /* |
1715 | * For descriptors associated with the device, polarity inversion is | |
1716 | * handled in the gpiolib, so all chip selects are "active high" in | |
1717 | * the logical sense, the gpiolib will invert the line if need be. | |
1718 | */ | |
1719 | if (ctlr->use_gpio_descriptors) | |
1720 | spi->mode |= SPI_CS_HIGH; | |
1721 | else if (of_property_read_bool(nc, "spi-cs-high")) | |
1722 | spi->mode |= SPI_CS_HIGH; | |
1723 | ||
aff5e3f8 PA |
1724 | /* Device DUAL/QUAD mode */ |
1725 | if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { | |
1726 | switch (value) { | |
1727 | case 1: | |
1728 | break; | |
1729 | case 2: | |
1730 | spi->mode |= SPI_TX_DUAL; | |
1731 | break; | |
1732 | case 4: | |
1733 | spi->mode |= SPI_TX_QUAD; | |
1734 | break; | |
6b03061f YNG |
1735 | case 8: |
1736 | spi->mode |= SPI_TX_OCTAL; | |
1737 | break; | |
aff5e3f8 | 1738 | default: |
8caab75f | 1739 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1740 | "spi-tx-bus-width %d not supported\n", |
1741 | value); | |
1742 | break; | |
1743 | } | |
1744 | } | |
1745 | ||
1746 | if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) { | |
1747 | switch (value) { | |
1748 | case 1: | |
1749 | break; | |
1750 | case 2: | |
1751 | spi->mode |= SPI_RX_DUAL; | |
1752 | break; | |
1753 | case 4: | |
1754 | spi->mode |= SPI_RX_QUAD; | |
1755 | break; | |
6b03061f YNG |
1756 | case 8: |
1757 | spi->mode |= SPI_RX_OCTAL; | |
1758 | break; | |
aff5e3f8 | 1759 | default: |
8caab75f | 1760 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1761 | "spi-rx-bus-width %d not supported\n", |
1762 | value); | |
1763 | break; | |
1764 | } | |
1765 | } | |
1766 | ||
8caab75f | 1767 | if (spi_controller_is_slave(ctlr)) { |
194276b0 | 1768 | if (!of_node_name_eq(nc, "slave")) { |
25c56c88 RH |
1769 | dev_err(&ctlr->dev, "%pOF is not called 'slave'\n", |
1770 | nc); | |
6c364062 GU |
1771 | return -EINVAL; |
1772 | } | |
1773 | return 0; | |
1774 | } | |
1775 | ||
1776 | /* Device address */ | |
1777 | rc = of_property_read_u32(nc, "reg", &value); | |
1778 | if (rc) { | |
25c56c88 RH |
1779 | dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n", |
1780 | nc, rc); | |
6c364062 GU |
1781 | return rc; |
1782 | } | |
1783 | spi->chip_select = value; | |
1784 | ||
aff5e3f8 PA |
1785 | /* Device speed */ |
1786 | rc = of_property_read_u32(nc, "spi-max-frequency", &value); | |
1787 | if (rc) { | |
8caab75f | 1788 | dev_err(&ctlr->dev, |
25c56c88 | 1789 | "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc); |
c2e51ac3 | 1790 | return rc; |
aff5e3f8 PA |
1791 | } |
1792 | spi->max_speed_hz = value; | |
1793 | ||
c2e51ac3 GU |
1794 | return 0; |
1795 | } | |
1796 | ||
1797 | static struct spi_device * | |
8caab75f | 1798 | of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) |
c2e51ac3 GU |
1799 | { |
1800 | struct spi_device *spi; | |
1801 | int rc; | |
1802 | ||
1803 | /* Alloc an spi_device */ | |
8caab75f | 1804 | spi = spi_alloc_device(ctlr); |
c2e51ac3 | 1805 | if (!spi) { |
25c56c88 | 1806 | dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc); |
c2e51ac3 GU |
1807 | rc = -ENOMEM; |
1808 | goto err_out; | |
1809 | } | |
1810 | ||
1811 | /* Select device driver */ | |
1812 | rc = of_modalias_node(nc, spi->modalias, | |
1813 | sizeof(spi->modalias)); | |
1814 | if (rc < 0) { | |
25c56c88 | 1815 | dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc); |
c2e51ac3 GU |
1816 | goto err_out; |
1817 | } | |
1818 | ||
8caab75f | 1819 | rc = of_spi_parse_dt(ctlr, spi, nc); |
c2e51ac3 GU |
1820 | if (rc) |
1821 | goto err_out; | |
1822 | ||
aff5e3f8 PA |
1823 | /* Store a pointer to the node in the device structure */ |
1824 | of_node_get(nc); | |
1825 | spi->dev.of_node = nc; | |
1826 | ||
1827 | /* Register the new device */ | |
aff5e3f8 PA |
1828 | rc = spi_add_device(spi); |
1829 | if (rc) { | |
25c56c88 | 1830 | dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc); |
8324147f | 1831 | goto err_of_node_put; |
aff5e3f8 PA |
1832 | } |
1833 | ||
1834 | return spi; | |
1835 | ||
8324147f JH |
1836 | err_of_node_put: |
1837 | of_node_put(nc); | |
aff5e3f8 PA |
1838 | err_out: |
1839 | spi_dev_put(spi); | |
1840 | return ERR_PTR(rc); | |
1841 | } | |
1842 | ||
d57a4282 GL |
1843 | /** |
1844 | * of_register_spi_devices() - Register child devices onto the SPI bus | |
8caab75f | 1845 | * @ctlr: Pointer to spi_controller device |
d57a4282 | 1846 | * |
6c364062 GU |
1847 | * Registers an spi_device for each child node of controller node which |
1848 | * represents a valid SPI slave. | |
d57a4282 | 1849 | */ |
8caab75f | 1850 | static void of_register_spi_devices(struct spi_controller *ctlr) |
d57a4282 GL |
1851 | { |
1852 | struct spi_device *spi; | |
1853 | struct device_node *nc; | |
d57a4282 | 1854 | |
8caab75f | 1855 | if (!ctlr->dev.of_node) |
d57a4282 GL |
1856 | return; |
1857 | ||
8caab75f | 1858 | for_each_available_child_of_node(ctlr->dev.of_node, nc) { |
bd6c1644 GU |
1859 | if (of_node_test_and_set_flag(nc, OF_POPULATED)) |
1860 | continue; | |
8caab75f | 1861 | spi = of_register_spi_device(ctlr, nc); |
e0af98a7 | 1862 | if (IS_ERR(spi)) { |
8caab75f | 1863 | dev_warn(&ctlr->dev, |
25c56c88 | 1864 | "Failed to create SPI device for %pOF\n", nc); |
e0af98a7 RR |
1865 | of_node_clear_flag(nc, OF_POPULATED); |
1866 | } | |
d57a4282 GL |
1867 | } |
1868 | } | |
1869 | #else | |
8caab75f | 1870 | static void of_register_spi_devices(struct spi_controller *ctlr) { } |
d57a4282 GL |
1871 | #endif |
1872 | ||
64bee4d2 | 1873 | #ifdef CONFIG_ACPI |
4c3c5954 AB |
1874 | struct acpi_spi_lookup { |
1875 | struct spi_controller *ctlr; | |
1876 | u32 max_speed_hz; | |
1877 | u32 mode; | |
1878 | int irq; | |
1879 | u8 bits_per_word; | |
1880 | u8 chip_select; | |
1881 | }; | |
1882 | ||
1883 | static void acpi_spi_parse_apple_properties(struct acpi_device *dev, | |
1884 | struct acpi_spi_lookup *lookup) | |
8a2e487e | 1885 | { |
8a2e487e LW |
1886 | const union acpi_object *obj; |
1887 | ||
1888 | if (!x86_apple_machine) | |
1889 | return; | |
1890 | ||
1891 | if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj) | |
1892 | && obj->buffer.length >= 4) | |
4c3c5954 | 1893 | lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer; |
8a2e487e LW |
1894 | |
1895 | if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj) | |
1896 | && obj->buffer.length == 8) | |
4c3c5954 | 1897 | lookup->bits_per_word = *(u64 *)obj->buffer.pointer; |
8a2e487e LW |
1898 | |
1899 | if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj) | |
1900 | && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer) | |
4c3c5954 | 1901 | lookup->mode |= SPI_LSB_FIRST; |
8a2e487e LW |
1902 | |
1903 | if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj) | |
1904 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
4c3c5954 | 1905 | lookup->mode |= SPI_CPOL; |
8a2e487e LW |
1906 | |
1907 | if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj) | |
1908 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
4c3c5954 | 1909 | lookup->mode |= SPI_CPHA; |
8a2e487e LW |
1910 | } |
1911 | ||
64bee4d2 MW |
1912 | static int acpi_spi_add_resource(struct acpi_resource *ares, void *data) |
1913 | { | |
4c3c5954 AB |
1914 | struct acpi_spi_lookup *lookup = data; |
1915 | struct spi_controller *ctlr = lookup->ctlr; | |
64bee4d2 MW |
1916 | |
1917 | if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) { | |
1918 | struct acpi_resource_spi_serialbus *sb; | |
4c3c5954 AB |
1919 | acpi_handle parent_handle; |
1920 | acpi_status status; | |
64bee4d2 MW |
1921 | |
1922 | sb = &ares->data.spi_serial_bus; | |
1923 | if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) { | |
4c3c5954 AB |
1924 | |
1925 | status = acpi_get_handle(NULL, | |
1926 | sb->resource_source.string_ptr, | |
1927 | &parent_handle); | |
1928 | ||
b5e3cf41 | 1929 | if (ACPI_FAILURE(status) || |
4c3c5954 AB |
1930 | ACPI_HANDLE(ctlr->dev.parent) != parent_handle) |
1931 | return -ENODEV; | |
1932 | ||
a0a90718 MW |
1933 | /* |
1934 | * ACPI DeviceSelection numbering is handled by the | |
1935 | * host controller driver in Windows and can vary | |
1936 | * from driver to driver. In Linux we always expect | |
1937 | * 0 .. max - 1 so we need to ask the driver to | |
1938 | * translate between the two schemes. | |
1939 | */ | |
8caab75f GU |
1940 | if (ctlr->fw_translate_cs) { |
1941 | int cs = ctlr->fw_translate_cs(ctlr, | |
a0a90718 MW |
1942 | sb->device_selection); |
1943 | if (cs < 0) | |
1944 | return cs; | |
4c3c5954 | 1945 | lookup->chip_select = cs; |
a0a90718 | 1946 | } else { |
4c3c5954 | 1947 | lookup->chip_select = sb->device_selection; |
a0a90718 MW |
1948 | } |
1949 | ||
4c3c5954 | 1950 | lookup->max_speed_hz = sb->connection_speed; |
64bee4d2 MW |
1951 | |
1952 | if (sb->clock_phase == ACPI_SPI_SECOND_PHASE) | |
4c3c5954 | 1953 | lookup->mode |= SPI_CPHA; |
64bee4d2 | 1954 | if (sb->clock_polarity == ACPI_SPI_START_HIGH) |
4c3c5954 | 1955 | lookup->mode |= SPI_CPOL; |
64bee4d2 | 1956 | if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH) |
4c3c5954 | 1957 | lookup->mode |= SPI_CS_HIGH; |
64bee4d2 | 1958 | } |
4c3c5954 | 1959 | } else if (lookup->irq < 0) { |
64bee4d2 MW |
1960 | struct resource r; |
1961 | ||
1962 | if (acpi_dev_resource_interrupt(ares, 0, &r)) | |
4c3c5954 | 1963 | lookup->irq = r.start; |
64bee4d2 MW |
1964 | } |
1965 | ||
1966 | /* Always tell the ACPI core to skip this resource */ | |
1967 | return 1; | |
1968 | } | |
1969 | ||
8caab75f | 1970 | static acpi_status acpi_register_spi_device(struct spi_controller *ctlr, |
7f24467f | 1971 | struct acpi_device *adev) |
64bee4d2 | 1972 | { |
4c3c5954 | 1973 | acpi_handle parent_handle = NULL; |
64bee4d2 | 1974 | struct list_head resource_list; |
b28944c6 | 1975 | struct acpi_spi_lookup lookup = {}; |
64bee4d2 MW |
1976 | struct spi_device *spi; |
1977 | int ret; | |
1978 | ||
7f24467f OP |
1979 | if (acpi_bus_get_status(adev) || !adev->status.present || |
1980 | acpi_device_enumerated(adev)) | |
64bee4d2 MW |
1981 | return AE_OK; |
1982 | ||
4c3c5954 | 1983 | lookup.ctlr = ctlr; |
4c3c5954 | 1984 | lookup.irq = -1; |
64bee4d2 MW |
1985 | |
1986 | INIT_LIST_HEAD(&resource_list); | |
1987 | ret = acpi_dev_get_resources(adev, &resource_list, | |
4c3c5954 | 1988 | acpi_spi_add_resource, &lookup); |
64bee4d2 MW |
1989 | acpi_dev_free_resource_list(&resource_list); |
1990 | ||
4c3c5954 AB |
1991 | if (ret < 0) |
1992 | /* found SPI in _CRS but it points to another controller */ | |
1993 | return AE_OK; | |
8a2e487e | 1994 | |
4c3c5954 AB |
1995 | if (!lookup.max_speed_hz && |
1996 | !ACPI_FAILURE(acpi_get_parent(adev->handle, &parent_handle)) && | |
1997 | ACPI_HANDLE(ctlr->dev.parent) == parent_handle) { | |
1998 | /* Apple does not use _CRS but nested devices for SPI slaves */ | |
1999 | acpi_spi_parse_apple_properties(adev, &lookup); | |
2000 | } | |
2001 | ||
2002 | if (!lookup.max_speed_hz) | |
64bee4d2 | 2003 | return AE_OK; |
4c3c5954 AB |
2004 | |
2005 | spi = spi_alloc_device(ctlr); | |
2006 | if (!spi) { | |
2007 | dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n", | |
2008 | dev_name(&adev->dev)); | |
2009 | return AE_NO_MEMORY; | |
64bee4d2 MW |
2010 | } |
2011 | ||
4c3c5954 AB |
2012 | ACPI_COMPANION_SET(&spi->dev, adev); |
2013 | spi->max_speed_hz = lookup.max_speed_hz; | |
2014 | spi->mode = lookup.mode; | |
2015 | spi->irq = lookup.irq; | |
2016 | spi->bits_per_word = lookup.bits_per_word; | |
2017 | spi->chip_select = lookup.chip_select; | |
2018 | ||
0c6543f6 DD |
2019 | acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias, |
2020 | sizeof(spi->modalias)); | |
2021 | ||
33ada67d CR |
2022 | if (spi->irq < 0) |
2023 | spi->irq = acpi_dev_gpio_irq_get(adev, 0); | |
2024 | ||
7f24467f OP |
2025 | acpi_device_set_enumerated(adev); |
2026 | ||
33cf00e5 | 2027 | adev->power.flags.ignore_parent = true; |
64bee4d2 | 2028 | if (spi_add_device(spi)) { |
33cf00e5 | 2029 | adev->power.flags.ignore_parent = false; |
8caab75f | 2030 | dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n", |
64bee4d2 MW |
2031 | dev_name(&adev->dev)); |
2032 | spi_dev_put(spi); | |
2033 | } | |
2034 | ||
2035 | return AE_OK; | |
2036 | } | |
2037 | ||
7f24467f OP |
2038 | static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level, |
2039 | void *data, void **return_value) | |
2040 | { | |
8caab75f | 2041 | struct spi_controller *ctlr = data; |
7f24467f OP |
2042 | struct acpi_device *adev; |
2043 | ||
2044 | if (acpi_bus_get_device(handle, &adev)) | |
2045 | return AE_OK; | |
2046 | ||
8caab75f | 2047 | return acpi_register_spi_device(ctlr, adev); |
7f24467f OP |
2048 | } |
2049 | ||
4c3c5954 AB |
2050 | #define SPI_ACPI_ENUMERATE_MAX_DEPTH 32 |
2051 | ||
8caab75f | 2052 | static void acpi_register_spi_devices(struct spi_controller *ctlr) |
64bee4d2 MW |
2053 | { |
2054 | acpi_status status; | |
2055 | acpi_handle handle; | |
2056 | ||
8caab75f | 2057 | handle = ACPI_HANDLE(ctlr->dev.parent); |
64bee4d2 MW |
2058 | if (!handle) |
2059 | return; | |
2060 | ||
4c3c5954 AB |
2061 | status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, |
2062 | SPI_ACPI_ENUMERATE_MAX_DEPTH, | |
8caab75f | 2063 | acpi_spi_add_device, NULL, ctlr, NULL); |
64bee4d2 | 2064 | if (ACPI_FAILURE(status)) |
8caab75f | 2065 | dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n"); |
64bee4d2 MW |
2066 | } |
2067 | #else | |
8caab75f | 2068 | static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {} |
64bee4d2 MW |
2069 | #endif /* CONFIG_ACPI */ |
2070 | ||
8caab75f | 2071 | static void spi_controller_release(struct device *dev) |
8ae12a0d | 2072 | { |
8caab75f | 2073 | struct spi_controller *ctlr; |
8ae12a0d | 2074 | |
8caab75f GU |
2075 | ctlr = container_of(dev, struct spi_controller, dev); |
2076 | kfree(ctlr); | |
8ae12a0d DB |
2077 | } |
2078 | ||
2079 | static struct class spi_master_class = { | |
2080 | .name = "spi_master", | |
2081 | .owner = THIS_MODULE, | |
8caab75f | 2082 | .dev_release = spi_controller_release, |
eca2ebc7 | 2083 | .dev_groups = spi_master_groups, |
8ae12a0d DB |
2084 | }; |
2085 | ||
6c364062 GU |
2086 | #ifdef CONFIG_SPI_SLAVE |
2087 | /** | |
2088 | * spi_slave_abort - abort the ongoing transfer request on an SPI slave | |
2089 | * controller | |
2090 | * @spi: device used for the current transfer | |
2091 | */ | |
2092 | int spi_slave_abort(struct spi_device *spi) | |
2093 | { | |
8caab75f | 2094 | struct spi_controller *ctlr = spi->controller; |
6c364062 | 2095 | |
8caab75f GU |
2096 | if (spi_controller_is_slave(ctlr) && ctlr->slave_abort) |
2097 | return ctlr->slave_abort(ctlr); | |
6c364062 GU |
2098 | |
2099 | return -ENOTSUPP; | |
2100 | } | |
2101 | EXPORT_SYMBOL_GPL(spi_slave_abort); | |
2102 | ||
2103 | static int match_true(struct device *dev, void *data) | |
2104 | { | |
2105 | return 1; | |
2106 | } | |
2107 | ||
2108 | static ssize_t spi_slave_show(struct device *dev, | |
2109 | struct device_attribute *attr, char *buf) | |
2110 | { | |
8caab75f GU |
2111 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
2112 | dev); | |
6c364062 GU |
2113 | struct device *child; |
2114 | ||
2115 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
2116 | return sprintf(buf, "%s\n", | |
2117 | child ? to_spi_device(child)->modalias : NULL); | |
2118 | } | |
2119 | ||
2120 | static ssize_t spi_slave_store(struct device *dev, | |
2121 | struct device_attribute *attr, const char *buf, | |
2122 | size_t count) | |
2123 | { | |
8caab75f GU |
2124 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
2125 | dev); | |
6c364062 GU |
2126 | struct spi_device *spi; |
2127 | struct device *child; | |
2128 | char name[32]; | |
2129 | int rc; | |
2130 | ||
2131 | rc = sscanf(buf, "%31s", name); | |
2132 | if (rc != 1 || !name[0]) | |
2133 | return -EINVAL; | |
2134 | ||
2135 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
2136 | if (child) { | |
2137 | /* Remove registered slave */ | |
2138 | device_unregister(child); | |
2139 | put_device(child); | |
2140 | } | |
2141 | ||
2142 | if (strcmp(name, "(null)")) { | |
2143 | /* Register new slave */ | |
2144 | spi = spi_alloc_device(ctlr); | |
2145 | if (!spi) | |
2146 | return -ENOMEM; | |
2147 | ||
2148 | strlcpy(spi->modalias, name, sizeof(spi->modalias)); | |
2149 | ||
2150 | rc = spi_add_device(spi); | |
2151 | if (rc) { | |
2152 | spi_dev_put(spi); | |
2153 | return rc; | |
2154 | } | |
2155 | } | |
2156 | ||
2157 | return count; | |
2158 | } | |
2159 | ||
2160 | static DEVICE_ATTR(slave, 0644, spi_slave_show, spi_slave_store); | |
2161 | ||
2162 | static struct attribute *spi_slave_attrs[] = { | |
2163 | &dev_attr_slave.attr, | |
2164 | NULL, | |
2165 | }; | |
2166 | ||
2167 | static const struct attribute_group spi_slave_group = { | |
2168 | .attrs = spi_slave_attrs, | |
2169 | }; | |
2170 | ||
2171 | static const struct attribute_group *spi_slave_groups[] = { | |
8caab75f | 2172 | &spi_controller_statistics_group, |
6c364062 GU |
2173 | &spi_slave_group, |
2174 | NULL, | |
2175 | }; | |
2176 | ||
2177 | static struct class spi_slave_class = { | |
2178 | .name = "spi_slave", | |
2179 | .owner = THIS_MODULE, | |
8caab75f | 2180 | .dev_release = spi_controller_release, |
6c364062 GU |
2181 | .dev_groups = spi_slave_groups, |
2182 | }; | |
2183 | #else | |
2184 | extern struct class spi_slave_class; /* dummy */ | |
2185 | #endif | |
8ae12a0d DB |
2186 | |
2187 | /** | |
6c364062 | 2188 | * __spi_alloc_controller - allocate an SPI master or slave controller |
8ae12a0d | 2189 | * @dev: the controller, possibly using the platform_bus |
33e34dc6 | 2190 | * @size: how much zeroed driver-private data to allocate; the pointer to this |
49dce689 | 2191 | * memory is in the driver_data field of the returned device, |
8caab75f | 2192 | * accessible with spi_controller_get_devdata(). |
6c364062 GU |
2193 | * @slave: flag indicating whether to allocate an SPI master (false) or SPI |
2194 | * slave (true) controller | |
33e34dc6 | 2195 | * Context: can sleep |
8ae12a0d | 2196 | * |
6c364062 | 2197 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d | 2198 | * only ones directly touching chip registers. It's how they allocate |
8caab75f | 2199 | * an spi_controller structure, prior to calling spi_register_controller(). |
8ae12a0d | 2200 | * |
97d56dc6 | 2201 | * This must be called from context that can sleep. |
8ae12a0d | 2202 | * |
6c364062 | 2203 | * The caller is responsible for assigning the bus number and initializing the |
8caab75f GU |
2204 | * controller's methods before calling spi_register_controller(); and (after |
2205 | * errors adding the device) calling spi_controller_put() to prevent a memory | |
2206 | * leak. | |
97d56dc6 | 2207 | * |
6c364062 | 2208 | * Return: the SPI controller structure on success, else NULL. |
8ae12a0d | 2209 | */ |
8caab75f GU |
2210 | struct spi_controller *__spi_alloc_controller(struct device *dev, |
2211 | unsigned int size, bool slave) | |
8ae12a0d | 2212 | { |
8caab75f | 2213 | struct spi_controller *ctlr; |
8ae12a0d | 2214 | |
0c868461 DB |
2215 | if (!dev) |
2216 | return NULL; | |
2217 | ||
8caab75f GU |
2218 | ctlr = kzalloc(size + sizeof(*ctlr), GFP_KERNEL); |
2219 | if (!ctlr) | |
8ae12a0d DB |
2220 | return NULL; |
2221 | ||
8caab75f GU |
2222 | device_initialize(&ctlr->dev); |
2223 | ctlr->bus_num = -1; | |
2224 | ctlr->num_chipselect = 1; | |
2225 | ctlr->slave = slave; | |
6c364062 | 2226 | if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave) |
8caab75f | 2227 | ctlr->dev.class = &spi_slave_class; |
6c364062 | 2228 | else |
8caab75f GU |
2229 | ctlr->dev.class = &spi_master_class; |
2230 | ctlr->dev.parent = dev; | |
2231 | pm_suspend_ignore_children(&ctlr->dev, true); | |
2232 | spi_controller_set_devdata(ctlr, &ctlr[1]); | |
8ae12a0d | 2233 | |
8caab75f | 2234 | return ctlr; |
8ae12a0d | 2235 | } |
6c364062 | 2236 | EXPORT_SYMBOL_GPL(__spi_alloc_controller); |
8ae12a0d | 2237 | |
74317984 | 2238 | #ifdef CONFIG_OF |
8caab75f | 2239 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 | 2240 | { |
e80beb27 | 2241 | int nb, i, *cs; |
8caab75f | 2242 | struct device_node *np = ctlr->dev.of_node; |
74317984 JCPV |
2243 | |
2244 | if (!np) | |
2245 | return 0; | |
2246 | ||
2247 | nb = of_gpio_named_count(np, "cs-gpios"); | |
8caab75f | 2248 | ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); |
74317984 | 2249 | |
8ec5d84e AL |
2250 | /* Return error only for an incorrectly formed cs-gpios property */ |
2251 | if (nb == 0 || nb == -ENOENT) | |
74317984 | 2252 | return 0; |
8ec5d84e AL |
2253 | else if (nb < 0) |
2254 | return nb; | |
74317984 | 2255 | |
a86854d0 | 2256 | cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int), |
74317984 | 2257 | GFP_KERNEL); |
8caab75f | 2258 | ctlr->cs_gpios = cs; |
74317984 | 2259 | |
8caab75f | 2260 | if (!ctlr->cs_gpios) |
74317984 JCPV |
2261 | return -ENOMEM; |
2262 | ||
8caab75f | 2263 | for (i = 0; i < ctlr->num_chipselect; i++) |
446411e1 | 2264 | cs[i] = -ENOENT; |
74317984 JCPV |
2265 | |
2266 | for (i = 0; i < nb; i++) | |
2267 | cs[i] = of_get_named_gpio(np, "cs-gpios", i); | |
2268 | ||
2269 | return 0; | |
2270 | } | |
2271 | #else | |
8caab75f | 2272 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 JCPV |
2273 | { |
2274 | return 0; | |
2275 | } | |
2276 | #endif | |
2277 | ||
f3186dd8 LW |
2278 | /** |
2279 | * spi_get_gpio_descs() - grab chip select GPIOs for the master | |
2280 | * @ctlr: The SPI master to grab GPIO descriptors for | |
2281 | */ | |
2282 | static int spi_get_gpio_descs(struct spi_controller *ctlr) | |
2283 | { | |
2284 | int nb, i; | |
2285 | struct gpio_desc **cs; | |
2286 | struct device *dev = &ctlr->dev; | |
2287 | ||
2288 | nb = gpiod_count(dev, "cs"); | |
2289 | ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); | |
2290 | ||
2291 | /* No GPIOs at all is fine, else return the error */ | |
2292 | if (nb == 0 || nb == -ENOENT) | |
2293 | return 0; | |
2294 | else if (nb < 0) | |
2295 | return nb; | |
2296 | ||
2297 | cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs), | |
2298 | GFP_KERNEL); | |
2299 | if (!cs) | |
2300 | return -ENOMEM; | |
2301 | ctlr->cs_gpiods = cs; | |
2302 | ||
2303 | for (i = 0; i < nb; i++) { | |
2304 | /* | |
2305 | * Most chipselects are active low, the inverted | |
2306 | * semantics are handled by special quirks in gpiolib, | |
2307 | * so initializing them GPIOD_OUT_LOW here means | |
2308 | * "unasserted", in most cases this will drive the physical | |
2309 | * line high. | |
2310 | */ | |
2311 | cs[i] = devm_gpiod_get_index_optional(dev, "cs", i, | |
2312 | GPIOD_OUT_LOW); | |
1723fdec GU |
2313 | if (IS_ERR(cs[i])) |
2314 | return PTR_ERR(cs[i]); | |
f3186dd8 LW |
2315 | |
2316 | if (cs[i]) { | |
2317 | /* | |
2318 | * If we find a CS GPIO, name it after the device and | |
2319 | * chip select line. | |
2320 | */ | |
2321 | char *gpioname; | |
2322 | ||
2323 | gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d", | |
2324 | dev_name(dev), i); | |
2325 | if (!gpioname) | |
2326 | return -ENOMEM; | |
2327 | gpiod_set_consumer_name(cs[i], gpioname); | |
2328 | } | |
2329 | } | |
2330 | ||
2331 | return 0; | |
2332 | } | |
2333 | ||
bdf3a3b5 BB |
2334 | static int spi_controller_check_ops(struct spi_controller *ctlr) |
2335 | { | |
2336 | /* | |
b5932f5c BB |
2337 | * The controller may implement only the high-level SPI-memory like |
2338 | * operations if it does not support regular SPI transfers, and this is | |
2339 | * valid use case. | |
2340 | * If ->mem_ops is NULL, we request that at least one of the | |
2341 | * ->transfer_xxx() method be implemented. | |
bdf3a3b5 | 2342 | */ |
b5932f5c BB |
2343 | if (ctlr->mem_ops) { |
2344 | if (!ctlr->mem_ops->exec_op) | |
2345 | return -EINVAL; | |
2346 | } else if (!ctlr->transfer && !ctlr->transfer_one && | |
2347 | !ctlr->transfer_one_message) { | |
bdf3a3b5 | 2348 | return -EINVAL; |
b5932f5c | 2349 | } |
bdf3a3b5 BB |
2350 | |
2351 | return 0; | |
2352 | } | |
2353 | ||
8ae12a0d | 2354 | /** |
8caab75f GU |
2355 | * spi_register_controller - register SPI master or slave controller |
2356 | * @ctlr: initialized master, originally from spi_alloc_master() or | |
2357 | * spi_alloc_slave() | |
33e34dc6 | 2358 | * Context: can sleep |
8ae12a0d | 2359 | * |
8caab75f | 2360 | * SPI controllers connect to their drivers using some non-SPI bus, |
8ae12a0d | 2361 | * such as the platform bus. The final stage of probe() in that code |
8caab75f | 2362 | * includes calling spi_register_controller() to hook up to this SPI bus glue. |
8ae12a0d DB |
2363 | * |
2364 | * SPI controllers use board specific (often SOC specific) bus numbers, | |
2365 | * and board-specific addressing for SPI devices combines those numbers | |
2366 | * with chip select numbers. Since SPI does not directly support dynamic | |
2367 | * device identification, boards need configuration tables telling which | |
2368 | * chip is at which address. | |
2369 | * | |
2370 | * This must be called from context that can sleep. It returns zero on | |
8caab75f | 2371 | * success, else a negative error code (dropping the controller's refcount). |
0c868461 | 2372 | * After a successful return, the caller is responsible for calling |
8caab75f | 2373 | * spi_unregister_controller(). |
97d56dc6 JMC |
2374 | * |
2375 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 2376 | */ |
8caab75f | 2377 | int spi_register_controller(struct spi_controller *ctlr) |
8ae12a0d | 2378 | { |
8caab75f | 2379 | struct device *dev = ctlr->dev.parent; |
2b9603a0 | 2380 | struct boardinfo *bi; |
b93318a2 | 2381 | int status; |
42bdd706 | 2382 | int id, first_dynamic; |
8ae12a0d | 2383 | |
0c868461 DB |
2384 | if (!dev) |
2385 | return -ENODEV; | |
2386 | ||
bdf3a3b5 BB |
2387 | /* |
2388 | * Make sure all necessary hooks are implemented before registering | |
2389 | * the SPI controller. | |
2390 | */ | |
2391 | status = spi_controller_check_ops(ctlr); | |
2392 | if (status) | |
2393 | return status; | |
2394 | ||
04b2d03a GU |
2395 | if (ctlr->bus_num >= 0) { |
2396 | /* devices with a fixed bus num must check-in with the num */ | |
2397 | mutex_lock(&board_lock); | |
2398 | id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, | |
2399 | ctlr->bus_num + 1, GFP_KERNEL); | |
2400 | mutex_unlock(&board_lock); | |
2401 | if (WARN(id < 0, "couldn't get idr")) | |
2402 | return id == -ENOSPC ? -EBUSY : id; | |
2403 | ctlr->bus_num = id; | |
2404 | } else if (ctlr->dev.of_node) { | |
2405 | /* allocate dynamic bus number using Linux idr */ | |
9b61e302 SM |
2406 | id = of_alias_get_id(ctlr->dev.of_node, "spi"); |
2407 | if (id >= 0) { | |
2408 | ctlr->bus_num = id; | |
2409 | mutex_lock(&board_lock); | |
2410 | id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, | |
2411 | ctlr->bus_num + 1, GFP_KERNEL); | |
2412 | mutex_unlock(&board_lock); | |
2413 | if (WARN(id < 0, "couldn't get idr")) | |
2414 | return id == -ENOSPC ? -EBUSY : id; | |
2415 | } | |
2416 | } | |
8caab75f | 2417 | if (ctlr->bus_num < 0) { |
42bdd706 LS |
2418 | first_dynamic = of_alias_get_highest_id("spi"); |
2419 | if (first_dynamic < 0) | |
2420 | first_dynamic = 0; | |
2421 | else | |
2422 | first_dynamic++; | |
2423 | ||
9a9a047a | 2424 | mutex_lock(&board_lock); |
42bdd706 LS |
2425 | id = idr_alloc(&spi_master_idr, ctlr, first_dynamic, |
2426 | 0, GFP_KERNEL); | |
9a9a047a SM |
2427 | mutex_unlock(&board_lock); |
2428 | if (WARN(id < 0, "couldn't get idr")) | |
2429 | return id; | |
2430 | ctlr->bus_num = id; | |
8ae12a0d | 2431 | } |
8caab75f GU |
2432 | INIT_LIST_HEAD(&ctlr->queue); |
2433 | spin_lock_init(&ctlr->queue_lock); | |
2434 | spin_lock_init(&ctlr->bus_lock_spinlock); | |
2435 | mutex_init(&ctlr->bus_lock_mutex); | |
2436 | mutex_init(&ctlr->io_mutex); | |
2437 | ctlr->bus_lock_flag = 0; | |
2438 | init_completion(&ctlr->xfer_completion); | |
2439 | if (!ctlr->max_dma_len) | |
2440 | ctlr->max_dma_len = INT_MAX; | |
cf32b71e | 2441 | |
8ae12a0d DB |
2442 | /* register the device, then userspace will see it. |
2443 | * registration fails if the bus ID is in use. | |
2444 | */ | |
8caab75f | 2445 | dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num); |
0a919ae4 AS |
2446 | |
2447 | if (!spi_controller_is_slave(ctlr)) { | |
2448 | if (ctlr->use_gpio_descriptors) { | |
2449 | status = spi_get_gpio_descs(ctlr); | |
2450 | if (status) | |
2451 | return status; | |
2452 | /* | |
2453 | * A controller using GPIO descriptors always | |
2454 | * supports SPI_CS_HIGH if need be. | |
2455 | */ | |
2456 | ctlr->mode_bits |= SPI_CS_HIGH; | |
2457 | } else { | |
2458 | /* Legacy code path for GPIOs from DT */ | |
2459 | status = of_spi_register_master(ctlr); | |
2460 | if (status) | |
2461 | return status; | |
2462 | } | |
2463 | } | |
2464 | ||
f9481b08 TA |
2465 | /* |
2466 | * Even if it's just one always-selected device, there must | |
2467 | * be at least one chipselect. | |
2468 | */ | |
2469 | if (!ctlr->num_chipselect) | |
2470 | return -EINVAL; | |
2471 | ||
8caab75f | 2472 | status = device_add(&ctlr->dev); |
9b61e302 SM |
2473 | if (status < 0) { |
2474 | /* free bus id */ | |
2475 | mutex_lock(&board_lock); | |
2476 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2477 | mutex_unlock(&board_lock); | |
8ae12a0d | 2478 | goto done; |
9b61e302 SM |
2479 | } |
2480 | dev_dbg(dev, "registered %s %s\n", | |
8caab75f | 2481 | spi_controller_is_slave(ctlr) ? "slave" : "master", |
9b61e302 | 2482 | dev_name(&ctlr->dev)); |
8ae12a0d | 2483 | |
b5932f5c BB |
2484 | /* |
2485 | * If we're using a queued driver, start the queue. Note that we don't | |
2486 | * need the queueing logic if the driver is only supporting high-level | |
2487 | * memory operations. | |
2488 | */ | |
2489 | if (ctlr->transfer) { | |
8caab75f | 2490 | dev_info(dev, "controller is unqueued, this is deprecated\n"); |
b5932f5c | 2491 | } else if (ctlr->transfer_one || ctlr->transfer_one_message) { |
8caab75f | 2492 | status = spi_controller_initialize_queue(ctlr); |
ffbbdd21 | 2493 | if (status) { |
8caab75f | 2494 | device_del(&ctlr->dev); |
9b61e302 SM |
2495 | /* free bus id */ |
2496 | mutex_lock(&board_lock); | |
2497 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2498 | mutex_unlock(&board_lock); | |
ffbbdd21 LW |
2499 | goto done; |
2500 | } | |
2501 | } | |
eca2ebc7 | 2502 | /* add statistics */ |
8caab75f | 2503 | spin_lock_init(&ctlr->statistics.lock); |
ffbbdd21 | 2504 | |
2b9603a0 | 2505 | mutex_lock(&board_lock); |
8caab75f | 2506 | list_add_tail(&ctlr->list, &spi_controller_list); |
2b9603a0 | 2507 | list_for_each_entry(bi, &board_list, list) |
8caab75f | 2508 | spi_match_controller_to_boardinfo(ctlr, &bi->board_info); |
2b9603a0 FT |
2509 | mutex_unlock(&board_lock); |
2510 | ||
64bee4d2 | 2511 | /* Register devices from the device tree and ACPI */ |
8caab75f GU |
2512 | of_register_spi_devices(ctlr); |
2513 | acpi_register_spi_devices(ctlr); | |
8ae12a0d DB |
2514 | done: |
2515 | return status; | |
2516 | } | |
8caab75f | 2517 | EXPORT_SYMBOL_GPL(spi_register_controller); |
8ae12a0d | 2518 | |
666d5b4c MB |
2519 | static void devm_spi_unregister(struct device *dev, void *res) |
2520 | { | |
8caab75f | 2521 | spi_unregister_controller(*(struct spi_controller **)res); |
666d5b4c MB |
2522 | } |
2523 | ||
2524 | /** | |
8caab75f GU |
2525 | * devm_spi_register_controller - register managed SPI master or slave |
2526 | * controller | |
2527 | * @dev: device managing SPI controller | |
2528 | * @ctlr: initialized controller, originally from spi_alloc_master() or | |
2529 | * spi_alloc_slave() | |
666d5b4c MB |
2530 | * Context: can sleep |
2531 | * | |
8caab75f | 2532 | * Register a SPI device as with spi_register_controller() which will |
68b892f1 | 2533 | * automatically be unregistered and freed. |
97d56dc6 JMC |
2534 | * |
2535 | * Return: zero on success, else a negative error code. | |
666d5b4c | 2536 | */ |
8caab75f GU |
2537 | int devm_spi_register_controller(struct device *dev, |
2538 | struct spi_controller *ctlr) | |
666d5b4c | 2539 | { |
8caab75f | 2540 | struct spi_controller **ptr; |
666d5b4c MB |
2541 | int ret; |
2542 | ||
2543 | ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL); | |
2544 | if (!ptr) | |
2545 | return -ENOMEM; | |
2546 | ||
8caab75f | 2547 | ret = spi_register_controller(ctlr); |
4b92894e | 2548 | if (!ret) { |
8caab75f | 2549 | *ptr = ctlr; |
666d5b4c MB |
2550 | devres_add(dev, ptr); |
2551 | } else { | |
2552 | devres_free(ptr); | |
2553 | } | |
2554 | ||
2555 | return ret; | |
2556 | } | |
8caab75f | 2557 | EXPORT_SYMBOL_GPL(devm_spi_register_controller); |
666d5b4c | 2558 | |
34860089 | 2559 | static int __unregister(struct device *dev, void *null) |
8ae12a0d | 2560 | { |
34860089 | 2561 | spi_unregister_device(to_spi_device(dev)); |
8ae12a0d DB |
2562 | return 0; |
2563 | } | |
2564 | ||
2565 | /** | |
8caab75f GU |
2566 | * spi_unregister_controller - unregister SPI master or slave controller |
2567 | * @ctlr: the controller being unregistered | |
33e34dc6 | 2568 | * Context: can sleep |
8ae12a0d | 2569 | * |
8caab75f | 2570 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d DB |
2571 | * only ones directly touching chip registers. |
2572 | * | |
2573 | * This must be called from context that can sleep. | |
68b892f1 JH |
2574 | * |
2575 | * Note that this function also drops a reference to the controller. | |
8ae12a0d | 2576 | */ |
8caab75f | 2577 | void spi_unregister_controller(struct spi_controller *ctlr) |
8ae12a0d | 2578 | { |
9b61e302 | 2579 | struct spi_controller *found; |
67f7b278 | 2580 | int id = ctlr->bus_num; |
89fc9a1a | 2581 | |
9b61e302 SM |
2582 | /* First make sure that this controller was ever added */ |
2583 | mutex_lock(&board_lock); | |
67f7b278 | 2584 | found = idr_find(&spi_master_idr, id); |
9b61e302 | 2585 | mutex_unlock(&board_lock); |
8caab75f GU |
2586 | if (ctlr->queued) { |
2587 | if (spi_destroy_queue(ctlr)) | |
2588 | dev_err(&ctlr->dev, "queue remove failed\n"); | |
ffbbdd21 | 2589 | } |
2b9603a0 | 2590 | mutex_lock(&board_lock); |
8caab75f | 2591 | list_del(&ctlr->list); |
2b9603a0 FT |
2592 | mutex_unlock(&board_lock); |
2593 | ||
ebc37af5 | 2594 | device_for_each_child(&ctlr->dev, NULL, __unregister); |
8caab75f | 2595 | device_unregister(&ctlr->dev); |
9b61e302 SM |
2596 | /* free bus id */ |
2597 | mutex_lock(&board_lock); | |
613bd1ea JN |
2598 | if (found == ctlr) |
2599 | idr_remove(&spi_master_idr, id); | |
9b61e302 | 2600 | mutex_unlock(&board_lock); |
8ae12a0d | 2601 | } |
8caab75f | 2602 | EXPORT_SYMBOL_GPL(spi_unregister_controller); |
8ae12a0d | 2603 | |
8caab75f | 2604 | int spi_controller_suspend(struct spi_controller *ctlr) |
ffbbdd21 LW |
2605 | { |
2606 | int ret; | |
2607 | ||
8caab75f GU |
2608 | /* Basically no-ops for non-queued controllers */ |
2609 | if (!ctlr->queued) | |
ffbbdd21 LW |
2610 | return 0; |
2611 | ||
8caab75f | 2612 | ret = spi_stop_queue(ctlr); |
ffbbdd21 | 2613 | if (ret) |
8caab75f | 2614 | dev_err(&ctlr->dev, "queue stop failed\n"); |
ffbbdd21 LW |
2615 | |
2616 | return ret; | |
2617 | } | |
8caab75f | 2618 | EXPORT_SYMBOL_GPL(spi_controller_suspend); |
ffbbdd21 | 2619 | |
8caab75f | 2620 | int spi_controller_resume(struct spi_controller *ctlr) |
ffbbdd21 LW |
2621 | { |
2622 | int ret; | |
2623 | ||
8caab75f | 2624 | if (!ctlr->queued) |
ffbbdd21 LW |
2625 | return 0; |
2626 | ||
8caab75f | 2627 | ret = spi_start_queue(ctlr); |
ffbbdd21 | 2628 | if (ret) |
8caab75f | 2629 | dev_err(&ctlr->dev, "queue restart failed\n"); |
ffbbdd21 LW |
2630 | |
2631 | return ret; | |
2632 | } | |
8caab75f | 2633 | EXPORT_SYMBOL_GPL(spi_controller_resume); |
ffbbdd21 | 2634 | |
8caab75f | 2635 | static int __spi_controller_match(struct device *dev, const void *data) |
5ed2c832 | 2636 | { |
8caab75f | 2637 | struct spi_controller *ctlr; |
9f3b795a | 2638 | const u16 *bus_num = data; |
5ed2c832 | 2639 | |
8caab75f GU |
2640 | ctlr = container_of(dev, struct spi_controller, dev); |
2641 | return ctlr->bus_num == *bus_num; | |
5ed2c832 DY |
2642 | } |
2643 | ||
8ae12a0d DB |
2644 | /** |
2645 | * spi_busnum_to_master - look up master associated with bus_num | |
2646 | * @bus_num: the master's bus number | |
33e34dc6 | 2647 | * Context: can sleep |
8ae12a0d DB |
2648 | * |
2649 | * This call may be used with devices that are registered after | |
2650 | * arch init time. It returns a refcounted pointer to the relevant | |
8caab75f | 2651 | * spi_controller (which the caller must release), or NULL if there is |
8ae12a0d | 2652 | * no such master registered. |
97d56dc6 JMC |
2653 | * |
2654 | * Return: the SPI master structure on success, else NULL. | |
8ae12a0d | 2655 | */ |
8caab75f | 2656 | struct spi_controller *spi_busnum_to_master(u16 bus_num) |
8ae12a0d | 2657 | { |
49dce689 | 2658 | struct device *dev; |
8caab75f | 2659 | struct spi_controller *ctlr = NULL; |
5ed2c832 | 2660 | |
695794ae | 2661 | dev = class_find_device(&spi_master_class, NULL, &bus_num, |
8caab75f | 2662 | __spi_controller_match); |
5ed2c832 | 2663 | if (dev) |
8caab75f | 2664 | ctlr = container_of(dev, struct spi_controller, dev); |
5ed2c832 | 2665 | /* reference got in class_find_device */ |
8caab75f | 2666 | return ctlr; |
8ae12a0d DB |
2667 | } |
2668 | EXPORT_SYMBOL_GPL(spi_busnum_to_master); | |
2669 | ||
d780c371 MS |
2670 | /*-------------------------------------------------------------------------*/ |
2671 | ||
2672 | /* Core methods for SPI resource management */ | |
2673 | ||
2674 | /** | |
2675 | * spi_res_alloc - allocate a spi resource that is life-cycle managed | |
2676 | * during the processing of a spi_message while using | |
2677 | * spi_transfer_one | |
2678 | * @spi: the spi device for which we allocate memory | |
2679 | * @release: the release code to execute for this resource | |
2680 | * @size: size to alloc and return | |
2681 | * @gfp: GFP allocation flags | |
2682 | * | |
2683 | * Return: the pointer to the allocated data | |
2684 | * | |
2685 | * This may get enhanced in the future to allocate from a memory pool | |
8caab75f | 2686 | * of the @spi_device or @spi_controller to avoid repeated allocations. |
d780c371 MS |
2687 | */ |
2688 | void *spi_res_alloc(struct spi_device *spi, | |
2689 | spi_res_release_t release, | |
2690 | size_t size, gfp_t gfp) | |
2691 | { | |
2692 | struct spi_res *sres; | |
2693 | ||
2694 | sres = kzalloc(sizeof(*sres) + size, gfp); | |
2695 | if (!sres) | |
2696 | return NULL; | |
2697 | ||
2698 | INIT_LIST_HEAD(&sres->entry); | |
2699 | sres->release = release; | |
2700 | ||
2701 | return sres->data; | |
2702 | } | |
2703 | EXPORT_SYMBOL_GPL(spi_res_alloc); | |
2704 | ||
2705 | /** | |
2706 | * spi_res_free - free an spi resource | |
2707 | * @res: pointer to the custom data of a resource | |
2708 | * | |
2709 | */ | |
2710 | void spi_res_free(void *res) | |
2711 | { | |
2712 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2713 | ||
2714 | if (!res) | |
2715 | return; | |
2716 | ||
2717 | WARN_ON(!list_empty(&sres->entry)); | |
2718 | kfree(sres); | |
2719 | } | |
2720 | EXPORT_SYMBOL_GPL(spi_res_free); | |
2721 | ||
2722 | /** | |
2723 | * spi_res_add - add a spi_res to the spi_message | |
2724 | * @message: the spi message | |
2725 | * @res: the spi_resource | |
2726 | */ | |
2727 | void spi_res_add(struct spi_message *message, void *res) | |
2728 | { | |
2729 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2730 | ||
2731 | WARN_ON(!list_empty(&sres->entry)); | |
2732 | list_add_tail(&sres->entry, &message->resources); | |
2733 | } | |
2734 | EXPORT_SYMBOL_GPL(spi_res_add); | |
2735 | ||
2736 | /** | |
2737 | * spi_res_release - release all spi resources for this message | |
8caab75f | 2738 | * @ctlr: the @spi_controller |
d780c371 MS |
2739 | * @message: the @spi_message |
2740 | */ | |
8caab75f | 2741 | void spi_res_release(struct spi_controller *ctlr, struct spi_message *message) |
d780c371 | 2742 | { |
f5694369 | 2743 | struct spi_res *res, *tmp; |
d780c371 | 2744 | |
f5694369 | 2745 | list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) { |
d780c371 | 2746 | if (res->release) |
8caab75f | 2747 | res->release(ctlr, message, res->data); |
d780c371 MS |
2748 | |
2749 | list_del(&res->entry); | |
2750 | ||
2751 | kfree(res); | |
2752 | } | |
2753 | } | |
2754 | EXPORT_SYMBOL_GPL(spi_res_release); | |
8ae12a0d DB |
2755 | |
2756 | /*-------------------------------------------------------------------------*/ | |
2757 | ||
523baf5a MS |
2758 | /* Core methods for spi_message alterations */ |
2759 | ||
8caab75f | 2760 | static void __spi_replace_transfers_release(struct spi_controller *ctlr, |
523baf5a MS |
2761 | struct spi_message *msg, |
2762 | void *res) | |
2763 | { | |
2764 | struct spi_replaced_transfers *rxfer = res; | |
2765 | size_t i; | |
2766 | ||
2767 | /* call extra callback if requested */ | |
2768 | if (rxfer->release) | |
8caab75f | 2769 | rxfer->release(ctlr, msg, res); |
523baf5a MS |
2770 | |
2771 | /* insert replaced transfers back into the message */ | |
2772 | list_splice(&rxfer->replaced_transfers, rxfer->replaced_after); | |
2773 | ||
2774 | /* remove the formerly inserted entries */ | |
2775 | for (i = 0; i < rxfer->inserted; i++) | |
2776 | list_del(&rxfer->inserted_transfers[i].transfer_list); | |
2777 | } | |
2778 | ||
2779 | /** | |
2780 | * spi_replace_transfers - replace transfers with several transfers | |
2781 | * and register change with spi_message.resources | |
2782 | * @msg: the spi_message we work upon | |
2783 | * @xfer_first: the first spi_transfer we want to replace | |
2784 | * @remove: number of transfers to remove | |
2785 | * @insert: the number of transfers we want to insert instead | |
2786 | * @release: extra release code necessary in some circumstances | |
2787 | * @extradatasize: extra data to allocate (with alignment guarantees | |
2788 | * of struct @spi_transfer) | |
05885397 | 2789 | * @gfp: gfp flags |
523baf5a MS |
2790 | * |
2791 | * Returns: pointer to @spi_replaced_transfers, | |
2792 | * PTR_ERR(...) in case of errors. | |
2793 | */ | |
2794 | struct spi_replaced_transfers *spi_replace_transfers( | |
2795 | struct spi_message *msg, | |
2796 | struct spi_transfer *xfer_first, | |
2797 | size_t remove, | |
2798 | size_t insert, | |
2799 | spi_replaced_release_t release, | |
2800 | size_t extradatasize, | |
2801 | gfp_t gfp) | |
2802 | { | |
2803 | struct spi_replaced_transfers *rxfer; | |
2804 | struct spi_transfer *xfer; | |
2805 | size_t i; | |
2806 | ||
2807 | /* allocate the structure using spi_res */ | |
2808 | rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release, | |
aef97522 | 2809 | struct_size(rxfer, inserted_transfers, insert) |
523baf5a MS |
2810 | + extradatasize, |
2811 | gfp); | |
2812 | if (!rxfer) | |
2813 | return ERR_PTR(-ENOMEM); | |
2814 | ||
2815 | /* the release code to invoke before running the generic release */ | |
2816 | rxfer->release = release; | |
2817 | ||
2818 | /* assign extradata */ | |
2819 | if (extradatasize) | |
2820 | rxfer->extradata = | |
2821 | &rxfer->inserted_transfers[insert]; | |
2822 | ||
2823 | /* init the replaced_transfers list */ | |
2824 | INIT_LIST_HEAD(&rxfer->replaced_transfers); | |
2825 | ||
2826 | /* assign the list_entry after which we should reinsert | |
2827 | * the @replaced_transfers - it may be spi_message.messages! | |
2828 | */ | |
2829 | rxfer->replaced_after = xfer_first->transfer_list.prev; | |
2830 | ||
2831 | /* remove the requested number of transfers */ | |
2832 | for (i = 0; i < remove; i++) { | |
2833 | /* if the entry after replaced_after it is msg->transfers | |
2834 | * then we have been requested to remove more transfers | |
2835 | * than are in the list | |
2836 | */ | |
2837 | if (rxfer->replaced_after->next == &msg->transfers) { | |
2838 | dev_err(&msg->spi->dev, | |
2839 | "requested to remove more spi_transfers than are available\n"); | |
2840 | /* insert replaced transfers back into the message */ | |
2841 | list_splice(&rxfer->replaced_transfers, | |
2842 | rxfer->replaced_after); | |
2843 | ||
2844 | /* free the spi_replace_transfer structure */ | |
2845 | spi_res_free(rxfer); | |
2846 | ||
2847 | /* and return with an error */ | |
2848 | return ERR_PTR(-EINVAL); | |
2849 | } | |
2850 | ||
2851 | /* remove the entry after replaced_after from list of | |
2852 | * transfers and add it to list of replaced_transfers | |
2853 | */ | |
2854 | list_move_tail(rxfer->replaced_after->next, | |
2855 | &rxfer->replaced_transfers); | |
2856 | } | |
2857 | ||
2858 | /* create copy of the given xfer with identical settings | |
2859 | * based on the first transfer to get removed | |
2860 | */ | |
2861 | for (i = 0; i < insert; i++) { | |
2862 | /* we need to run in reverse order */ | |
2863 | xfer = &rxfer->inserted_transfers[insert - 1 - i]; | |
2864 | ||
2865 | /* copy all spi_transfer data */ | |
2866 | memcpy(xfer, xfer_first, sizeof(*xfer)); | |
2867 | ||
2868 | /* add to list */ | |
2869 | list_add(&xfer->transfer_list, rxfer->replaced_after); | |
2870 | ||
2871 | /* clear cs_change and delay_usecs for all but the last */ | |
2872 | if (i) { | |
2873 | xfer->cs_change = false; | |
2874 | xfer->delay_usecs = 0; | |
2875 | } | |
2876 | } | |
2877 | ||
2878 | /* set up inserted */ | |
2879 | rxfer->inserted = insert; | |
2880 | ||
2881 | /* and register it with spi_res/spi_message */ | |
2882 | spi_res_add(msg, rxfer); | |
2883 | ||
2884 | return rxfer; | |
2885 | } | |
2886 | EXPORT_SYMBOL_GPL(spi_replace_transfers); | |
2887 | ||
8caab75f | 2888 | static int __spi_split_transfer_maxsize(struct spi_controller *ctlr, |
08933418 FE |
2889 | struct spi_message *msg, |
2890 | struct spi_transfer **xferp, | |
2891 | size_t maxsize, | |
2892 | gfp_t gfp) | |
d9f12122 MS |
2893 | { |
2894 | struct spi_transfer *xfer = *xferp, *xfers; | |
2895 | struct spi_replaced_transfers *srt; | |
2896 | size_t offset; | |
2897 | size_t count, i; | |
2898 | ||
d9f12122 MS |
2899 | /* calculate how many we have to replace */ |
2900 | count = DIV_ROUND_UP(xfer->len, maxsize); | |
2901 | ||
2902 | /* create replacement */ | |
2903 | srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp); | |
657d32ef DC |
2904 | if (IS_ERR(srt)) |
2905 | return PTR_ERR(srt); | |
d9f12122 MS |
2906 | xfers = srt->inserted_transfers; |
2907 | ||
2908 | /* now handle each of those newly inserted spi_transfers | |
2909 | * note that the replacements spi_transfers all are preset | |
2910 | * to the same values as *xferp, so tx_buf, rx_buf and len | |
2911 | * are all identical (as well as most others) | |
2912 | * so we just have to fix up len and the pointers. | |
2913 | * | |
2914 | * this also includes support for the depreciated | |
2915 | * spi_message.is_dma_mapped interface | |
2916 | */ | |
2917 | ||
2918 | /* the first transfer just needs the length modified, so we | |
2919 | * run it outside the loop | |
2920 | */ | |
c8dab77a | 2921 | xfers[0].len = min_t(size_t, maxsize, xfer[0].len); |
d9f12122 MS |
2922 | |
2923 | /* all the others need rx_buf/tx_buf also set */ | |
2924 | for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) { | |
2925 | /* update rx_buf, tx_buf and dma */ | |
2926 | if (xfers[i].rx_buf) | |
2927 | xfers[i].rx_buf += offset; | |
2928 | if (xfers[i].rx_dma) | |
2929 | xfers[i].rx_dma += offset; | |
2930 | if (xfers[i].tx_buf) | |
2931 | xfers[i].tx_buf += offset; | |
2932 | if (xfers[i].tx_dma) | |
2933 | xfers[i].tx_dma += offset; | |
2934 | ||
2935 | /* update length */ | |
2936 | xfers[i].len = min(maxsize, xfers[i].len - offset); | |
2937 | } | |
2938 | ||
2939 | /* we set up xferp to the last entry we have inserted, | |
2940 | * so that we skip those already split transfers | |
2941 | */ | |
2942 | *xferp = &xfers[count - 1]; | |
2943 | ||
2944 | /* increment statistics counters */ | |
8caab75f | 2945 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, |
d9f12122 MS |
2946 | transfers_split_maxsize); |
2947 | SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics, | |
2948 | transfers_split_maxsize); | |
2949 | ||
2950 | return 0; | |
2951 | } | |
2952 | ||
2953 | /** | |
2954 | * spi_split_tranfers_maxsize - split spi transfers into multiple transfers | |
2955 | * when an individual transfer exceeds a | |
2956 | * certain size | |
8caab75f | 2957 | * @ctlr: the @spi_controller for this transfer |
3700ce95 MI |
2958 | * @msg: the @spi_message to transform |
2959 | * @maxsize: the maximum when to apply this | |
10f11a22 | 2960 | * @gfp: GFP allocation flags |
d9f12122 MS |
2961 | * |
2962 | * Return: status of transformation | |
2963 | */ | |
8caab75f | 2964 | int spi_split_transfers_maxsize(struct spi_controller *ctlr, |
d9f12122 MS |
2965 | struct spi_message *msg, |
2966 | size_t maxsize, | |
2967 | gfp_t gfp) | |
2968 | { | |
2969 | struct spi_transfer *xfer; | |
2970 | int ret; | |
2971 | ||
2972 | /* iterate over the transfer_list, | |
2973 | * but note that xfer is advanced to the last transfer inserted | |
2974 | * to avoid checking sizes again unnecessarily (also xfer does | |
2975 | * potentiall belong to a different list by the time the | |
2976 | * replacement has happened | |
2977 | */ | |
2978 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
2979 | if (xfer->len > maxsize) { | |
8caab75f GU |
2980 | ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer, |
2981 | maxsize, gfp); | |
d9f12122 MS |
2982 | if (ret) |
2983 | return ret; | |
2984 | } | |
2985 | } | |
2986 | ||
2987 | return 0; | |
2988 | } | |
2989 | EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize); | |
8ae12a0d DB |
2990 | |
2991 | /*-------------------------------------------------------------------------*/ | |
2992 | ||
8caab75f | 2993 | /* Core methods for SPI controller protocol drivers. Some of the |
7d077197 DB |
2994 | * other core methods are currently defined as inline functions. |
2995 | */ | |
2996 | ||
8caab75f GU |
2997 | static int __spi_validate_bits_per_word(struct spi_controller *ctlr, |
2998 | u8 bits_per_word) | |
63ab645f | 2999 | { |
8caab75f | 3000 | if (ctlr->bits_per_word_mask) { |
63ab645f SB |
3001 | /* Only 32 bits fit in the mask */ |
3002 | if (bits_per_word > 32) | |
3003 | return -EINVAL; | |
8caab75f | 3004 | if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word))) |
63ab645f SB |
3005 | return -EINVAL; |
3006 | } | |
3007 | ||
3008 | return 0; | |
3009 | } | |
3010 | ||
7d077197 DB |
3011 | /** |
3012 | * spi_setup - setup SPI mode and clock rate | |
3013 | * @spi: the device whose settings are being modified | |
3014 | * Context: can sleep, and no requests are queued to the device | |
3015 | * | |
3016 | * SPI protocol drivers may need to update the transfer mode if the | |
3017 | * device doesn't work with its default. They may likewise need | |
3018 | * to update clock rates or word sizes from initial values. This function | |
3019 | * changes those settings, and must be called from a context that can sleep. | |
3020 | * Except for SPI_CS_HIGH, which takes effect immediately, the changes take | |
3021 | * effect the next time the device is selected and data is transferred to | |
3022 | * or from it. When this function returns, the spi device is deselected. | |
3023 | * | |
3024 | * Note that this call will fail if the protocol driver specifies an option | |
3025 | * that the underlying controller or its driver does not support. For | |
3026 | * example, not all hardware supports wire transfers using nine bit words, | |
3027 | * LSB-first wire encoding, or active-high chipselects. | |
97d56dc6 JMC |
3028 | * |
3029 | * Return: zero on success, else a negative error code. | |
7d077197 DB |
3030 | */ |
3031 | int spi_setup(struct spi_device *spi) | |
3032 | { | |
83596fbe | 3033 | unsigned bad_bits, ugly_bits; |
5ab8d262 | 3034 | int status; |
7d077197 | 3035 | |
f477b7fb | 3036 | /* check mode to prevent that DUAL and QUAD set at the same time |
3037 | */ | |
3038 | if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) || | |
3039 | ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) { | |
3040 | dev_err(&spi->dev, | |
3041 | "setup: can not select dual and quad at the same time\n"); | |
3042 | return -EINVAL; | |
3043 | } | |
3044 | /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden | |
3045 | */ | |
3046 | if ((spi->mode & SPI_3WIRE) && (spi->mode & | |
6b03061f YNG |
3047 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL | |
3048 | SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))) | |
f477b7fb | 3049 | return -EINVAL; |
e7db06b5 | 3050 | /* help drivers fail *cleanly* when they need options |
8caab75f | 3051 | * that aren't supported with their current controller |
cbaa62e0 DL |
3052 | * SPI_CS_WORD has a fallback software implementation, |
3053 | * so it is ignored here. | |
e7db06b5 | 3054 | */ |
cbaa62e0 | 3055 | bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD); |
d61ad23c SS |
3056 | /* nothing prevents from working with active-high CS in case if it |
3057 | * is driven by GPIO. | |
3058 | */ | |
3059 | if (gpio_is_valid(spi->cs_gpio)) | |
3060 | bad_bits &= ~SPI_CS_HIGH; | |
83596fbe | 3061 | ugly_bits = bad_bits & |
6b03061f YNG |
3062 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL | |
3063 | SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL); | |
83596fbe GU |
3064 | if (ugly_bits) { |
3065 | dev_warn(&spi->dev, | |
3066 | "setup: ignoring unsupported mode bits %x\n", | |
3067 | ugly_bits); | |
3068 | spi->mode &= ~ugly_bits; | |
3069 | bad_bits &= ~ugly_bits; | |
3070 | } | |
e7db06b5 | 3071 | if (bad_bits) { |
eb288a1f | 3072 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", |
e7db06b5 DB |
3073 | bad_bits); |
3074 | return -EINVAL; | |
3075 | } | |
3076 | ||
7d077197 DB |
3077 | if (!spi->bits_per_word) |
3078 | spi->bits_per_word = 8; | |
3079 | ||
8caab75f GU |
3080 | status = __spi_validate_bits_per_word(spi->controller, |
3081 | spi->bits_per_word); | |
5ab8d262 AS |
3082 | if (status) |
3083 | return status; | |
63ab645f | 3084 | |
052eb2d4 | 3085 | if (!spi->max_speed_hz) |
8caab75f | 3086 | spi->max_speed_hz = spi->controller->max_speed_hz; |
052eb2d4 | 3087 | |
8caab75f GU |
3088 | if (spi->controller->setup) |
3089 | status = spi->controller->setup(spi); | |
7d077197 | 3090 | |
abeedb01 FCJ |
3091 | spi_set_cs(spi, false); |
3092 | ||
924b5867 DA |
3093 | if (spi->rt && !spi->controller->rt) { |
3094 | spi->controller->rt = true; | |
3095 | spi_set_thread_rt(spi->controller); | |
3096 | } | |
3097 | ||
5fe5f05e | 3098 | dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n", |
7d077197 DB |
3099 | (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), |
3100 | (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", | |
3101 | (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", | |
3102 | (spi->mode & SPI_3WIRE) ? "3wire, " : "", | |
3103 | (spi->mode & SPI_LOOP) ? "loopback, " : "", | |
3104 | spi->bits_per_word, spi->max_speed_hz, | |
3105 | status); | |
3106 | ||
3107 | return status; | |
3108 | } | |
3109 | EXPORT_SYMBOL_GPL(spi_setup); | |
3110 | ||
f1ca9992 SK |
3111 | /** |
3112 | * spi_set_cs_timing - configure CS setup, hold, and inactive delays | |
3113 | * @spi: the device that requires specific CS timing configuration | |
3114 | * @setup: CS setup time in terms of clock count | |
3115 | * @hold: CS hold time in terms of clock count | |
3116 | * @inactive_dly: CS inactive delay between transfers in terms of clock count | |
3117 | */ | |
3118 | void spi_set_cs_timing(struct spi_device *spi, u8 setup, u8 hold, | |
3119 | u8 inactive_dly) | |
3120 | { | |
3121 | if (spi->controller->set_cs_timing) | |
3122 | spi->controller->set_cs_timing(spi, setup, hold, inactive_dly); | |
3123 | } | |
3124 | EXPORT_SYMBOL_GPL(spi_set_cs_timing); | |
3125 | ||
90808738 | 3126 | static int __spi_validate(struct spi_device *spi, struct spi_message *message) |
cf32b71e | 3127 | { |
8caab75f | 3128 | struct spi_controller *ctlr = spi->controller; |
e6811d1d | 3129 | struct spi_transfer *xfer; |
6ea31293 | 3130 | int w_size; |
cf32b71e | 3131 | |
24a0013a MB |
3132 | if (list_empty(&message->transfers)) |
3133 | return -EINVAL; | |
24a0013a | 3134 | |
cbaa62e0 | 3135 | /* If an SPI controller does not support toggling the CS line on each |
71388b21 DL |
3136 | * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO |
3137 | * for the CS line, we can emulate the CS-per-word hardware function by | |
cbaa62e0 DL |
3138 | * splitting transfers into one-word transfers and ensuring that |
3139 | * cs_change is set for each transfer. | |
3140 | */ | |
71388b21 | 3141 | if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) || |
f3186dd8 | 3142 | spi->cs_gpiod || |
71388b21 | 3143 | gpio_is_valid(spi->cs_gpio))) { |
cbaa62e0 DL |
3144 | size_t maxsize; |
3145 | int ret; | |
3146 | ||
3147 | maxsize = (spi->bits_per_word + 7) / 8; | |
3148 | ||
3149 | /* spi_split_transfers_maxsize() requires message->spi */ | |
3150 | message->spi = spi; | |
3151 | ||
3152 | ret = spi_split_transfers_maxsize(ctlr, message, maxsize, | |
3153 | GFP_KERNEL); | |
3154 | if (ret) | |
3155 | return ret; | |
3156 | ||
3157 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
3158 | /* don't change cs_change on the last entry in the list */ | |
3159 | if (list_is_last(&xfer->transfer_list, &message->transfers)) | |
3160 | break; | |
3161 | xfer->cs_change = 1; | |
3162 | } | |
3163 | } | |
3164 | ||
cf32b71e ES |
3165 | /* Half-duplex links include original MicroWire, and ones with |
3166 | * only one data pin like SPI_3WIRE (switches direction) or where | |
3167 | * either MOSI or MISO is missing. They can also be caused by | |
3168 | * software limitations. | |
3169 | */ | |
8caab75f GU |
3170 | if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) || |
3171 | (spi->mode & SPI_3WIRE)) { | |
3172 | unsigned flags = ctlr->flags; | |
cf32b71e ES |
3173 | |
3174 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
3175 | if (xfer->rx_buf && xfer->tx_buf) | |
3176 | return -EINVAL; | |
8caab75f | 3177 | if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf) |
cf32b71e | 3178 | return -EINVAL; |
8caab75f | 3179 | if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf) |
cf32b71e ES |
3180 | return -EINVAL; |
3181 | } | |
3182 | } | |
3183 | ||
e6811d1d | 3184 | /** |
059b8ffe LD |
3185 | * Set transfer bits_per_word and max speed as spi device default if |
3186 | * it is not set for this transfer. | |
f477b7fb | 3187 | * Set transfer tx_nbits and rx_nbits as single transfer default |
3188 | * (SPI_NBITS_SINGLE) if it is not set for this transfer. | |
b7bb367a JB |
3189 | * Ensure transfer word_delay is at least as long as that required by |
3190 | * device itself. | |
e6811d1d | 3191 | */ |
77e80588 | 3192 | message->frame_length = 0; |
e6811d1d | 3193 | list_for_each_entry(xfer, &message->transfers, transfer_list) { |
5d7e2b5e | 3194 | xfer->effective_speed_hz = 0; |
078726ce | 3195 | message->frame_length += xfer->len; |
e6811d1d LD |
3196 | if (!xfer->bits_per_word) |
3197 | xfer->bits_per_word = spi->bits_per_word; | |
a6f87fad AL |
3198 | |
3199 | if (!xfer->speed_hz) | |
059b8ffe | 3200 | xfer->speed_hz = spi->max_speed_hz; |
a6f87fad | 3201 | |
8caab75f GU |
3202 | if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz) |
3203 | xfer->speed_hz = ctlr->max_speed_hz; | |
56ede94a | 3204 | |
8caab75f | 3205 | if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word)) |
63ab645f | 3206 | return -EINVAL; |
a2fd4f9f | 3207 | |
4d94bd21 II |
3208 | /* |
3209 | * SPI transfer length should be multiple of SPI word size | |
3210 | * where SPI word size should be power-of-two multiple | |
3211 | */ | |
3212 | if (xfer->bits_per_word <= 8) | |
3213 | w_size = 1; | |
3214 | else if (xfer->bits_per_word <= 16) | |
3215 | w_size = 2; | |
3216 | else | |
3217 | w_size = 4; | |
3218 | ||
4d94bd21 | 3219 | /* No partial transfers accepted */ |
6ea31293 | 3220 | if (xfer->len % w_size) |
4d94bd21 II |
3221 | return -EINVAL; |
3222 | ||
8caab75f GU |
3223 | if (xfer->speed_hz && ctlr->min_speed_hz && |
3224 | xfer->speed_hz < ctlr->min_speed_hz) | |
a2fd4f9f | 3225 | return -EINVAL; |
f477b7fb | 3226 | |
3227 | if (xfer->tx_buf && !xfer->tx_nbits) | |
3228 | xfer->tx_nbits = SPI_NBITS_SINGLE; | |
3229 | if (xfer->rx_buf && !xfer->rx_nbits) | |
3230 | xfer->rx_nbits = SPI_NBITS_SINGLE; | |
3231 | /* check transfer tx/rx_nbits: | |
1afd9989 GU |
3232 | * 1. check the value matches one of single, dual and quad |
3233 | * 2. check tx/rx_nbits match the mode in spi_device | |
f477b7fb | 3234 | */ |
db90a441 SP |
3235 | if (xfer->tx_buf) { |
3236 | if (xfer->tx_nbits != SPI_NBITS_SINGLE && | |
3237 | xfer->tx_nbits != SPI_NBITS_DUAL && | |
3238 | xfer->tx_nbits != SPI_NBITS_QUAD) | |
3239 | return -EINVAL; | |
3240 | if ((xfer->tx_nbits == SPI_NBITS_DUAL) && | |
3241 | !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) | |
3242 | return -EINVAL; | |
3243 | if ((xfer->tx_nbits == SPI_NBITS_QUAD) && | |
3244 | !(spi->mode & SPI_TX_QUAD)) | |
3245 | return -EINVAL; | |
db90a441 | 3246 | } |
f477b7fb | 3247 | /* check transfer rx_nbits */ |
db90a441 SP |
3248 | if (xfer->rx_buf) { |
3249 | if (xfer->rx_nbits != SPI_NBITS_SINGLE && | |
3250 | xfer->rx_nbits != SPI_NBITS_DUAL && | |
3251 | xfer->rx_nbits != SPI_NBITS_QUAD) | |
3252 | return -EINVAL; | |
3253 | if ((xfer->rx_nbits == SPI_NBITS_DUAL) && | |
3254 | !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD))) | |
3255 | return -EINVAL; | |
3256 | if ((xfer->rx_nbits == SPI_NBITS_QUAD) && | |
3257 | !(spi->mode & SPI_RX_QUAD)) | |
3258 | return -EINVAL; | |
db90a441 | 3259 | } |
b7bb367a JB |
3260 | |
3261 | if (xfer->word_delay_usecs < spi->word_delay_usecs) | |
3262 | xfer->word_delay_usecs = spi->word_delay_usecs; | |
e6811d1d LD |
3263 | } |
3264 | ||
cf32b71e | 3265 | message->status = -EINPROGRESS; |
90808738 MB |
3266 | |
3267 | return 0; | |
3268 | } | |
3269 | ||
3270 | static int __spi_async(struct spi_device *spi, struct spi_message *message) | |
3271 | { | |
8caab75f | 3272 | struct spi_controller *ctlr = spi->controller; |
90808738 | 3273 | |
b5932f5c BB |
3274 | /* |
3275 | * Some controllers do not support doing regular SPI transfers. Return | |
3276 | * ENOTSUPP when this is the case. | |
3277 | */ | |
3278 | if (!ctlr->transfer) | |
3279 | return -ENOTSUPP; | |
3280 | ||
90808738 MB |
3281 | message->spi = spi; |
3282 | ||
8caab75f | 3283 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async); |
eca2ebc7 MS |
3284 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async); |
3285 | ||
90808738 MB |
3286 | trace_spi_message_submit(message); |
3287 | ||
8caab75f | 3288 | return ctlr->transfer(spi, message); |
cf32b71e ES |
3289 | } |
3290 | ||
568d0697 DB |
3291 | /** |
3292 | * spi_async - asynchronous SPI transfer | |
3293 | * @spi: device with which data will be exchanged | |
3294 | * @message: describes the data transfers, including completion callback | |
3295 | * Context: any (irqs may be blocked, etc) | |
3296 | * | |
3297 | * This call may be used in_irq and other contexts which can't sleep, | |
3298 | * as well as from task contexts which can sleep. | |
3299 | * | |
3300 | * The completion callback is invoked in a context which can't sleep. | |
3301 | * Before that invocation, the value of message->status is undefined. | |
3302 | * When the callback is issued, message->status holds either zero (to | |
3303 | * indicate complete success) or a negative error code. After that | |
3304 | * callback returns, the driver which issued the transfer request may | |
3305 | * deallocate the associated memory; it's no longer in use by any SPI | |
3306 | * core or controller driver code. | |
3307 | * | |
3308 | * Note that although all messages to a spi_device are handled in | |
3309 | * FIFO order, messages may go to different devices in other orders. | |
3310 | * Some device might be higher priority, or have various "hard" access | |
3311 | * time requirements, for example. | |
3312 | * | |
3313 | * On detection of any fault during the transfer, processing of | |
3314 | * the entire message is aborted, and the device is deselected. | |
3315 | * Until returning from the associated message completion callback, | |
3316 | * no other spi_message queued to that device will be processed. | |
3317 | * (This rule applies equally to all the synchronous transfer calls, | |
3318 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
3319 | * |
3320 | * Return: zero on success, else a negative error code. | |
568d0697 DB |
3321 | */ |
3322 | int spi_async(struct spi_device *spi, struct spi_message *message) | |
3323 | { | |
8caab75f | 3324 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
3325 | int ret; |
3326 | unsigned long flags; | |
568d0697 | 3327 | |
90808738 MB |
3328 | ret = __spi_validate(spi, message); |
3329 | if (ret != 0) | |
3330 | return ret; | |
3331 | ||
8caab75f | 3332 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
568d0697 | 3333 | |
8caab75f | 3334 | if (ctlr->bus_lock_flag) |
cf32b71e ES |
3335 | ret = -EBUSY; |
3336 | else | |
3337 | ret = __spi_async(spi, message); | |
568d0697 | 3338 | |
8caab75f | 3339 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3340 | |
3341 | return ret; | |
568d0697 DB |
3342 | } |
3343 | EXPORT_SYMBOL_GPL(spi_async); | |
3344 | ||
cf32b71e ES |
3345 | /** |
3346 | * spi_async_locked - version of spi_async with exclusive bus usage | |
3347 | * @spi: device with which data will be exchanged | |
3348 | * @message: describes the data transfers, including completion callback | |
3349 | * Context: any (irqs may be blocked, etc) | |
3350 | * | |
3351 | * This call may be used in_irq and other contexts which can't sleep, | |
3352 | * as well as from task contexts which can sleep. | |
3353 | * | |
3354 | * The completion callback is invoked in a context which can't sleep. | |
3355 | * Before that invocation, the value of message->status is undefined. | |
3356 | * When the callback is issued, message->status holds either zero (to | |
3357 | * indicate complete success) or a negative error code. After that | |
3358 | * callback returns, the driver which issued the transfer request may | |
3359 | * deallocate the associated memory; it's no longer in use by any SPI | |
3360 | * core or controller driver code. | |
3361 | * | |
3362 | * Note that although all messages to a spi_device are handled in | |
3363 | * FIFO order, messages may go to different devices in other orders. | |
3364 | * Some device might be higher priority, or have various "hard" access | |
3365 | * time requirements, for example. | |
3366 | * | |
3367 | * On detection of any fault during the transfer, processing of | |
3368 | * the entire message is aborted, and the device is deselected. | |
3369 | * Until returning from the associated message completion callback, | |
3370 | * no other spi_message queued to that device will be processed. | |
3371 | * (This rule applies equally to all the synchronous transfer calls, | |
3372 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
3373 | * |
3374 | * Return: zero on success, else a negative error code. | |
cf32b71e ES |
3375 | */ |
3376 | int spi_async_locked(struct spi_device *spi, struct spi_message *message) | |
3377 | { | |
8caab75f | 3378 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
3379 | int ret; |
3380 | unsigned long flags; | |
3381 | ||
90808738 MB |
3382 | ret = __spi_validate(spi, message); |
3383 | if (ret != 0) | |
3384 | return ret; | |
3385 | ||
8caab75f | 3386 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3387 | |
3388 | ret = __spi_async(spi, message); | |
3389 | ||
8caab75f | 3390 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3391 | |
3392 | return ret; | |
3393 | ||
3394 | } | |
3395 | EXPORT_SYMBOL_GPL(spi_async_locked); | |
3396 | ||
7d077197 DB |
3397 | /*-------------------------------------------------------------------------*/ |
3398 | ||
8caab75f | 3399 | /* Utility methods for SPI protocol drivers, layered on |
7d077197 DB |
3400 | * top of the core. Some other utility methods are defined as |
3401 | * inline functions. | |
3402 | */ | |
3403 | ||
5d870c8e AM |
3404 | static void spi_complete(void *arg) |
3405 | { | |
3406 | complete(arg); | |
3407 | } | |
3408 | ||
ef4d96ec | 3409 | static int __spi_sync(struct spi_device *spi, struct spi_message *message) |
cf32b71e ES |
3410 | { |
3411 | DECLARE_COMPLETION_ONSTACK(done); | |
3412 | int status; | |
8caab75f | 3413 | struct spi_controller *ctlr = spi->controller; |
0461a414 MB |
3414 | unsigned long flags; |
3415 | ||
3416 | status = __spi_validate(spi, message); | |
3417 | if (status != 0) | |
3418 | return status; | |
cf32b71e ES |
3419 | |
3420 | message->complete = spi_complete; | |
3421 | message->context = &done; | |
0461a414 | 3422 | message->spi = spi; |
cf32b71e | 3423 | |
8caab75f | 3424 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync); |
eca2ebc7 MS |
3425 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync); |
3426 | ||
0461a414 MB |
3427 | /* If we're not using the legacy transfer method then we will |
3428 | * try to transfer in the calling context so special case. | |
3429 | * This code would be less tricky if we could remove the | |
3430 | * support for driver implemented message queues. | |
3431 | */ | |
8caab75f GU |
3432 | if (ctlr->transfer == spi_queued_transfer) { |
3433 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); | |
0461a414 MB |
3434 | |
3435 | trace_spi_message_submit(message); | |
3436 | ||
3437 | status = __spi_queued_transfer(spi, message, false); | |
3438 | ||
8caab75f | 3439 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
0461a414 MB |
3440 | } else { |
3441 | status = spi_async_locked(spi, message); | |
3442 | } | |
cf32b71e | 3443 | |
cf32b71e | 3444 | if (status == 0) { |
0461a414 MB |
3445 | /* Push out the messages in the calling context if we |
3446 | * can. | |
3447 | */ | |
8caab75f GU |
3448 | if (ctlr->transfer == spi_queued_transfer) { |
3449 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, | |
eca2ebc7 MS |
3450 | spi_sync_immediate); |
3451 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, | |
3452 | spi_sync_immediate); | |
8caab75f | 3453 | __spi_pump_messages(ctlr, false); |
eca2ebc7 | 3454 | } |
0461a414 | 3455 | |
cf32b71e ES |
3456 | wait_for_completion(&done); |
3457 | status = message->status; | |
3458 | } | |
3459 | message->context = NULL; | |
3460 | return status; | |
3461 | } | |
3462 | ||
8ae12a0d DB |
3463 | /** |
3464 | * spi_sync - blocking/synchronous SPI data transfers | |
3465 | * @spi: device with which data will be exchanged | |
3466 | * @message: describes the data transfers | |
33e34dc6 | 3467 | * Context: can sleep |
8ae12a0d DB |
3468 | * |
3469 | * This call may only be used from a context that may sleep. The sleep | |
3470 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3471 | * drivers may DMA directly into and out of the message buffers. | |
3472 | * | |
3473 | * Note that the SPI device's chip select is active during the message, | |
3474 | * and then is normally disabled between messages. Drivers for some | |
3475 | * frequently-used devices may want to minimize costs of selecting a chip, | |
3476 | * by leaving it selected in anticipation that the next message will go | |
3477 | * to the same chip. (That may increase power usage.) | |
3478 | * | |
0c868461 DB |
3479 | * Also, the caller is guaranteeing that the memory associated with the |
3480 | * message will not be freed before this call returns. | |
3481 | * | |
97d56dc6 | 3482 | * Return: zero on success, else a negative error code. |
8ae12a0d DB |
3483 | */ |
3484 | int spi_sync(struct spi_device *spi, struct spi_message *message) | |
3485 | { | |
ef4d96ec MB |
3486 | int ret; |
3487 | ||
8caab75f | 3488 | mutex_lock(&spi->controller->bus_lock_mutex); |
ef4d96ec | 3489 | ret = __spi_sync(spi, message); |
8caab75f | 3490 | mutex_unlock(&spi->controller->bus_lock_mutex); |
ef4d96ec MB |
3491 | |
3492 | return ret; | |
8ae12a0d DB |
3493 | } |
3494 | EXPORT_SYMBOL_GPL(spi_sync); | |
3495 | ||
cf32b71e ES |
3496 | /** |
3497 | * spi_sync_locked - version of spi_sync with exclusive bus usage | |
3498 | * @spi: device with which data will be exchanged | |
3499 | * @message: describes the data transfers | |
3500 | * Context: can sleep | |
3501 | * | |
3502 | * This call may only be used from a context that may sleep. The sleep | |
3503 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3504 | * drivers may DMA directly into and out of the message buffers. | |
3505 | * | |
3506 | * This call should be used by drivers that require exclusive access to the | |
25985edc | 3507 | * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must |
cf32b71e ES |
3508 | * be released by a spi_bus_unlock call when the exclusive access is over. |
3509 | * | |
97d56dc6 | 3510 | * Return: zero on success, else a negative error code. |
cf32b71e ES |
3511 | */ |
3512 | int spi_sync_locked(struct spi_device *spi, struct spi_message *message) | |
3513 | { | |
ef4d96ec | 3514 | return __spi_sync(spi, message); |
cf32b71e ES |
3515 | } |
3516 | EXPORT_SYMBOL_GPL(spi_sync_locked); | |
3517 | ||
3518 | /** | |
3519 | * spi_bus_lock - obtain a lock for exclusive SPI bus usage | |
8caab75f | 3520 | * @ctlr: SPI bus master that should be locked for exclusive bus access |
cf32b71e ES |
3521 | * Context: can sleep |
3522 | * | |
3523 | * This call may only be used from a context that may sleep. The sleep | |
3524 | * is non-interruptible, and has no timeout. | |
3525 | * | |
3526 | * This call should be used by drivers that require exclusive access to the | |
3527 | * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the | |
3528 | * exclusive access is over. Data transfer must be done by spi_sync_locked | |
3529 | * and spi_async_locked calls when the SPI bus lock is held. | |
3530 | * | |
97d56dc6 | 3531 | * Return: always zero. |
cf32b71e | 3532 | */ |
8caab75f | 3533 | int spi_bus_lock(struct spi_controller *ctlr) |
cf32b71e ES |
3534 | { |
3535 | unsigned long flags; | |
3536 | ||
8caab75f | 3537 | mutex_lock(&ctlr->bus_lock_mutex); |
cf32b71e | 3538 | |
8caab75f GU |
3539 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
3540 | ctlr->bus_lock_flag = 1; | |
3541 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); | |
cf32b71e ES |
3542 | |
3543 | /* mutex remains locked until spi_bus_unlock is called */ | |
3544 | ||
3545 | return 0; | |
3546 | } | |
3547 | EXPORT_SYMBOL_GPL(spi_bus_lock); | |
3548 | ||
3549 | /** | |
3550 | * spi_bus_unlock - release the lock for exclusive SPI bus usage | |
8caab75f | 3551 | * @ctlr: SPI bus master that was locked for exclusive bus access |
cf32b71e ES |
3552 | * Context: can sleep |
3553 | * | |
3554 | * This call may only be used from a context that may sleep. The sleep | |
3555 | * is non-interruptible, and has no timeout. | |
3556 | * | |
3557 | * This call releases an SPI bus lock previously obtained by an spi_bus_lock | |
3558 | * call. | |
3559 | * | |
97d56dc6 | 3560 | * Return: always zero. |
cf32b71e | 3561 | */ |
8caab75f | 3562 | int spi_bus_unlock(struct spi_controller *ctlr) |
cf32b71e | 3563 | { |
8caab75f | 3564 | ctlr->bus_lock_flag = 0; |
cf32b71e | 3565 | |
8caab75f | 3566 | mutex_unlock(&ctlr->bus_lock_mutex); |
cf32b71e ES |
3567 | |
3568 | return 0; | |
3569 | } | |
3570 | EXPORT_SYMBOL_GPL(spi_bus_unlock); | |
3571 | ||
a9948b61 | 3572 | /* portable code must never pass more than 32 bytes */ |
5fe5f05e | 3573 | #define SPI_BUFSIZ max(32, SMP_CACHE_BYTES) |
8ae12a0d DB |
3574 | |
3575 | static u8 *buf; | |
3576 | ||
3577 | /** | |
3578 | * spi_write_then_read - SPI synchronous write followed by read | |
3579 | * @spi: device with which data will be exchanged | |
3580 | * @txbuf: data to be written (need not be dma-safe) | |
3581 | * @n_tx: size of txbuf, in bytes | |
27570497 JP |
3582 | * @rxbuf: buffer into which data will be read (need not be dma-safe) |
3583 | * @n_rx: size of rxbuf, in bytes | |
33e34dc6 | 3584 | * Context: can sleep |
8ae12a0d DB |
3585 | * |
3586 | * This performs a half duplex MicroWire style transaction with the | |
3587 | * device, sending txbuf and then reading rxbuf. The return value | |
3588 | * is zero for success, else a negative errno status code. | |
b885244e | 3589 | * This call may only be used from a context that may sleep. |
8ae12a0d | 3590 | * |
0c868461 | 3591 | * Parameters to this routine are always copied using a small buffer; |
33e34dc6 DB |
3592 | * portable code should never use this for more than 32 bytes. |
3593 | * Performance-sensitive or bulk transfer code should instead use | |
0c868461 | 3594 | * spi_{async,sync}() calls with dma-safe buffers. |
97d56dc6 JMC |
3595 | * |
3596 | * Return: zero on success, else a negative error code. | |
8ae12a0d DB |
3597 | */ |
3598 | int spi_write_then_read(struct spi_device *spi, | |
0c4a1590 MB |
3599 | const void *txbuf, unsigned n_tx, |
3600 | void *rxbuf, unsigned n_rx) | |
8ae12a0d | 3601 | { |
068f4070 | 3602 | static DEFINE_MUTEX(lock); |
8ae12a0d DB |
3603 | |
3604 | int status; | |
3605 | struct spi_message message; | |
bdff549e | 3606 | struct spi_transfer x[2]; |
8ae12a0d DB |
3607 | u8 *local_buf; |
3608 | ||
b3a223ee MB |
3609 | /* Use preallocated DMA-safe buffer if we can. We can't avoid |
3610 | * copying here, (as a pure convenience thing), but we can | |
3611 | * keep heap costs out of the hot path unless someone else is | |
3612 | * using the pre-allocated buffer or the transfer is too large. | |
8ae12a0d | 3613 | */ |
b3a223ee | 3614 | if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) { |
2cd94c8a MB |
3615 | local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx), |
3616 | GFP_KERNEL | GFP_DMA); | |
b3a223ee MB |
3617 | if (!local_buf) |
3618 | return -ENOMEM; | |
3619 | } else { | |
3620 | local_buf = buf; | |
3621 | } | |
8ae12a0d | 3622 | |
8275c642 | 3623 | spi_message_init(&message); |
5fe5f05e | 3624 | memset(x, 0, sizeof(x)); |
bdff549e DB |
3625 | if (n_tx) { |
3626 | x[0].len = n_tx; | |
3627 | spi_message_add_tail(&x[0], &message); | |
3628 | } | |
3629 | if (n_rx) { | |
3630 | x[1].len = n_rx; | |
3631 | spi_message_add_tail(&x[1], &message); | |
3632 | } | |
8275c642 | 3633 | |
8ae12a0d | 3634 | memcpy(local_buf, txbuf, n_tx); |
bdff549e DB |
3635 | x[0].tx_buf = local_buf; |
3636 | x[1].rx_buf = local_buf + n_tx; | |
8ae12a0d DB |
3637 | |
3638 | /* do the i/o */ | |
8ae12a0d | 3639 | status = spi_sync(spi, &message); |
9b938b74 | 3640 | if (status == 0) |
bdff549e | 3641 | memcpy(rxbuf, x[1].rx_buf, n_rx); |
8ae12a0d | 3642 | |
bdff549e | 3643 | if (x[0].tx_buf == buf) |
068f4070 | 3644 | mutex_unlock(&lock); |
8ae12a0d DB |
3645 | else |
3646 | kfree(local_buf); | |
3647 | ||
3648 | return status; | |
3649 | } | |
3650 | EXPORT_SYMBOL_GPL(spi_write_then_read); | |
3651 | ||
3652 | /*-------------------------------------------------------------------------*/ | |
3653 | ||
5f143af7 | 3654 | #if IS_ENABLED(CONFIG_OF) |
418e3ea1 | 3655 | static int __spi_of_device_match(struct device *dev, const void *data) |
ce79d54a PA |
3656 | { |
3657 | return dev->of_node == data; | |
3658 | } | |
3659 | ||
3660 | /* must call put_device() when done with returned spi_device device */ | |
5f143af7 | 3661 | struct spi_device *of_find_spi_device_by_node(struct device_node *node) |
ce79d54a PA |
3662 | { |
3663 | struct device *dev = bus_find_device(&spi_bus_type, NULL, node, | |
3664 | __spi_of_device_match); | |
3665 | return dev ? to_spi_device(dev) : NULL; | |
3666 | } | |
5f143af7 MF |
3667 | EXPORT_SYMBOL_GPL(of_find_spi_device_by_node); |
3668 | #endif /* IS_ENABLED(CONFIG_OF) */ | |
ce79d54a | 3669 | |
5f143af7 | 3670 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) |
8caab75f | 3671 | static int __spi_of_controller_match(struct device *dev, const void *data) |
ce79d54a PA |
3672 | { |
3673 | return dev->of_node == data; | |
3674 | } | |
3675 | ||
8caab75f GU |
3676 | /* the spi controllers are not using spi_bus, so we find it with another way */ |
3677 | static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node) | |
ce79d54a PA |
3678 | { |
3679 | struct device *dev; | |
3680 | ||
3681 | dev = class_find_device(&spi_master_class, NULL, node, | |
8caab75f | 3682 | __spi_of_controller_match); |
6c364062 GU |
3683 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3684 | dev = class_find_device(&spi_slave_class, NULL, node, | |
8caab75f | 3685 | __spi_of_controller_match); |
ce79d54a PA |
3686 | if (!dev) |
3687 | return NULL; | |
3688 | ||
3689 | /* reference got in class_find_device */ | |
8caab75f | 3690 | return container_of(dev, struct spi_controller, dev); |
ce79d54a PA |
3691 | } |
3692 | ||
3693 | static int of_spi_notify(struct notifier_block *nb, unsigned long action, | |
3694 | void *arg) | |
3695 | { | |
3696 | struct of_reconfig_data *rd = arg; | |
8caab75f | 3697 | struct spi_controller *ctlr; |
ce79d54a PA |
3698 | struct spi_device *spi; |
3699 | ||
3700 | switch (of_reconfig_get_state_change(action, arg)) { | |
3701 | case OF_RECONFIG_CHANGE_ADD: | |
8caab75f GU |
3702 | ctlr = of_find_spi_controller_by_node(rd->dn->parent); |
3703 | if (ctlr == NULL) | |
ce79d54a PA |
3704 | return NOTIFY_OK; /* not for us */ |
3705 | ||
bd6c1644 | 3706 | if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) { |
8caab75f | 3707 | put_device(&ctlr->dev); |
bd6c1644 GU |
3708 | return NOTIFY_OK; |
3709 | } | |
3710 | ||
8caab75f GU |
3711 | spi = of_register_spi_device(ctlr, rd->dn); |
3712 | put_device(&ctlr->dev); | |
ce79d54a PA |
3713 | |
3714 | if (IS_ERR(spi)) { | |
25c56c88 RH |
3715 | pr_err("%s: failed to create for '%pOF'\n", |
3716 | __func__, rd->dn); | |
e0af98a7 | 3717 | of_node_clear_flag(rd->dn, OF_POPULATED); |
ce79d54a PA |
3718 | return notifier_from_errno(PTR_ERR(spi)); |
3719 | } | |
3720 | break; | |
3721 | ||
3722 | case OF_RECONFIG_CHANGE_REMOVE: | |
bd6c1644 GU |
3723 | /* already depopulated? */ |
3724 | if (!of_node_check_flag(rd->dn, OF_POPULATED)) | |
3725 | return NOTIFY_OK; | |
3726 | ||
ce79d54a PA |
3727 | /* find our device by node */ |
3728 | spi = of_find_spi_device_by_node(rd->dn); | |
3729 | if (spi == NULL) | |
3730 | return NOTIFY_OK; /* no? not meant for us */ | |
3731 | ||
3732 | /* unregister takes one ref away */ | |
3733 | spi_unregister_device(spi); | |
3734 | ||
3735 | /* and put the reference of the find */ | |
3736 | put_device(&spi->dev); | |
3737 | break; | |
3738 | } | |
3739 | ||
3740 | return NOTIFY_OK; | |
3741 | } | |
3742 | ||
3743 | static struct notifier_block spi_of_notifier = { | |
3744 | .notifier_call = of_spi_notify, | |
3745 | }; | |
3746 | #else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3747 | extern struct notifier_block spi_of_notifier; | |
3748 | #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3749 | ||
7f24467f | 3750 | #if IS_ENABLED(CONFIG_ACPI) |
8caab75f | 3751 | static int spi_acpi_controller_match(struct device *dev, const void *data) |
7f24467f OP |
3752 | { |
3753 | return ACPI_COMPANION(dev->parent) == data; | |
3754 | } | |
3755 | ||
418e3ea1 | 3756 | static int spi_acpi_device_match(struct device *dev, const void *data) |
7f24467f OP |
3757 | { |
3758 | return ACPI_COMPANION(dev) == data; | |
3759 | } | |
3760 | ||
8caab75f | 3761 | static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev) |
7f24467f OP |
3762 | { |
3763 | struct device *dev; | |
3764 | ||
3765 | dev = class_find_device(&spi_master_class, NULL, adev, | |
8caab75f | 3766 | spi_acpi_controller_match); |
6c364062 GU |
3767 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3768 | dev = class_find_device(&spi_slave_class, NULL, adev, | |
8caab75f | 3769 | spi_acpi_controller_match); |
7f24467f OP |
3770 | if (!dev) |
3771 | return NULL; | |
3772 | ||
8caab75f | 3773 | return container_of(dev, struct spi_controller, dev); |
7f24467f OP |
3774 | } |
3775 | ||
3776 | static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev) | |
3777 | { | |
3778 | struct device *dev; | |
3779 | ||
3780 | dev = bus_find_device(&spi_bus_type, NULL, adev, spi_acpi_device_match); | |
3781 | ||
3782 | return dev ? to_spi_device(dev) : NULL; | |
3783 | } | |
3784 | ||
3785 | static int acpi_spi_notify(struct notifier_block *nb, unsigned long value, | |
3786 | void *arg) | |
3787 | { | |
3788 | struct acpi_device *adev = arg; | |
8caab75f | 3789 | struct spi_controller *ctlr; |
7f24467f OP |
3790 | struct spi_device *spi; |
3791 | ||
3792 | switch (value) { | |
3793 | case ACPI_RECONFIG_DEVICE_ADD: | |
8caab75f GU |
3794 | ctlr = acpi_spi_find_controller_by_adev(adev->parent); |
3795 | if (!ctlr) | |
7f24467f OP |
3796 | break; |
3797 | ||
8caab75f GU |
3798 | acpi_register_spi_device(ctlr, adev); |
3799 | put_device(&ctlr->dev); | |
7f24467f OP |
3800 | break; |
3801 | case ACPI_RECONFIG_DEVICE_REMOVE: | |
3802 | if (!acpi_device_enumerated(adev)) | |
3803 | break; | |
3804 | ||
3805 | spi = acpi_spi_find_device_by_adev(adev); | |
3806 | if (!spi) | |
3807 | break; | |
3808 | ||
3809 | spi_unregister_device(spi); | |
3810 | put_device(&spi->dev); | |
3811 | break; | |
3812 | } | |
3813 | ||
3814 | return NOTIFY_OK; | |
3815 | } | |
3816 | ||
3817 | static struct notifier_block spi_acpi_notifier = { | |
3818 | .notifier_call = acpi_spi_notify, | |
3819 | }; | |
3820 | #else | |
3821 | extern struct notifier_block spi_acpi_notifier; | |
3822 | #endif | |
3823 | ||
8ae12a0d DB |
3824 | static int __init spi_init(void) |
3825 | { | |
b885244e DB |
3826 | int status; |
3827 | ||
e94b1766 | 3828 | buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); |
b885244e DB |
3829 | if (!buf) { |
3830 | status = -ENOMEM; | |
3831 | goto err0; | |
3832 | } | |
3833 | ||
3834 | status = bus_register(&spi_bus_type); | |
3835 | if (status < 0) | |
3836 | goto err1; | |
8ae12a0d | 3837 | |
b885244e DB |
3838 | status = class_register(&spi_master_class); |
3839 | if (status < 0) | |
3840 | goto err2; | |
ce79d54a | 3841 | |
6c364062 GU |
3842 | if (IS_ENABLED(CONFIG_SPI_SLAVE)) { |
3843 | status = class_register(&spi_slave_class); | |
3844 | if (status < 0) | |
3845 | goto err3; | |
3846 | } | |
3847 | ||
5267720e | 3848 | if (IS_ENABLED(CONFIG_OF_DYNAMIC)) |
ce79d54a | 3849 | WARN_ON(of_reconfig_notifier_register(&spi_of_notifier)); |
7f24467f OP |
3850 | if (IS_ENABLED(CONFIG_ACPI)) |
3851 | WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier)); | |
ce79d54a | 3852 | |
8ae12a0d | 3853 | return 0; |
b885244e | 3854 | |
6c364062 GU |
3855 | err3: |
3856 | class_unregister(&spi_master_class); | |
b885244e DB |
3857 | err2: |
3858 | bus_unregister(&spi_bus_type); | |
3859 | err1: | |
3860 | kfree(buf); | |
3861 | buf = NULL; | |
3862 | err0: | |
3863 | return status; | |
8ae12a0d | 3864 | } |
b885244e | 3865 | |
8ae12a0d DB |
3866 | /* board_info is normally registered in arch_initcall(), |
3867 | * but even essential drivers wait till later | |
b885244e DB |
3868 | * |
3869 | * REVISIT only boardinfo really needs static linking. the rest (device and | |
3870 | * driver registration) _could_ be dynamically linked (modular) ... costs | |
3871 | * include needing to have boardinfo data structures be much more public. | |
8ae12a0d | 3872 | */ |
673c0c00 | 3873 | postcore_initcall(spi_init); |