spi: spi-geni-qcom: fix error handling in spi_geni_grab_gpi_chan()
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB
7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB
11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
74317984 21#include <linux/of_gpio.h>
f3186dd8 22#include <linux/gpio/consumer.h>
3ae22e8c 23#include <linux/pm_runtime.h>
f48c767c 24#include <linux/pm_domain.h>
826cf175 25#include <linux/property.h>
025ed130 26#include <linux/export.h>
8bd75c77 27#include <linux/sched/rt.h>
ae7e81c0 28#include <uapi/linux/sched/types.h>
ffbbdd21
LW
29#include <linux/delay.h>
30#include <linux/kthread.h>
64bee4d2
MW
31#include <linux/ioport.h>
32#include <linux/acpi.h>
b1b8153c 33#include <linux/highmem.h>
9b61e302 34#include <linux/idr.h>
8a2e487e 35#include <linux/platform_data/x86/apple.h>
8ae12a0d 36
56ec1978
MB
37#define CREATE_TRACE_POINTS
38#include <trace/events/spi.h>
ca1438dc
AB
39EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 41
46336966
BB
42#include "internals.h"
43
9b61e302 44static DEFINE_IDR(spi_master_idr);
56ec1978 45
8ae12a0d
DB
46static void spidev_release(struct device *dev)
47{
0ffa0285 48 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 49
8caab75f 50 spi_controller_put(spi->controller);
5039563e 51 kfree(spi->driver_override);
07a389fe 52 kfree(spi);
8ae12a0d
DB
53}
54
55static ssize_t
56modalias_show(struct device *dev, struct device_attribute *a, char *buf)
57{
58 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
59 int len;
60
61 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
62 if (len != -ENODEV)
63 return len;
8ae12a0d 64
d8e328b3 65 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 66}
aa7da564 67static DEVICE_ATTR_RO(modalias);
8ae12a0d 68
5039563e
TP
69static ssize_t driver_override_store(struct device *dev,
70 struct device_attribute *a,
71 const char *buf, size_t count)
72{
73 struct spi_device *spi = to_spi_device(dev);
74 const char *end = memchr(buf, '\n', count);
75 const size_t len = end ? end - buf : count;
76 const char *driver_override, *old;
77
78 /* We need to keep extra room for a newline when displaying value */
79 if (len >= (PAGE_SIZE - 1))
80 return -EINVAL;
81
82 driver_override = kstrndup(buf, len, GFP_KERNEL);
83 if (!driver_override)
84 return -ENOMEM;
85
86 device_lock(dev);
87 old = spi->driver_override;
88 if (len) {
89 spi->driver_override = driver_override;
90 } else {
be73e323 91 /* Empty string, disable driver override */
5039563e
TP
92 spi->driver_override = NULL;
93 kfree(driver_override);
94 }
95 device_unlock(dev);
96 kfree(old);
97
98 return count;
99}
100
101static ssize_t driver_override_show(struct device *dev,
102 struct device_attribute *a, char *buf)
103{
104 const struct spi_device *spi = to_spi_device(dev);
105 ssize_t len;
106
107 device_lock(dev);
108 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
109 device_unlock(dev);
110 return len;
111}
112static DEVICE_ATTR_RW(driver_override);
113
eca2ebc7 114#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
115static ssize_t spi_controller_##field##_show(struct device *dev, \
116 struct device_attribute *attr, \
117 char *buf) \
eca2ebc7 118{ \
8caab75f
GU
119 struct spi_controller *ctlr = container_of(dev, \
120 struct spi_controller, dev); \
121 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 122} \
8caab75f 123static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 124 .attr = { .name = file, .mode = 0444 }, \
8caab75f 125 .show = spi_controller_##field##_show, \
eca2ebc7
MS
126}; \
127static ssize_t spi_device_##field##_show(struct device *dev, \
128 struct device_attribute *attr, \
129 char *buf) \
130{ \
d1eba93b 131 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS
132 return spi_statistics_##field##_show(&spi->statistics, buf); \
133} \
134static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 135 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
136 .show = spi_device_##field##_show, \
137}
138
139#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
140static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
141 char *buf) \
142{ \
143 unsigned long flags; \
144 ssize_t len; \
145 spin_lock_irqsave(&stat->lock, flags); \
146 len = sprintf(buf, format_string, stat->field); \
147 spin_unlock_irqrestore(&stat->lock, flags); \
148 return len; \
149} \
150SPI_STATISTICS_ATTRS(name, file)
151
152#define SPI_STATISTICS_SHOW(field, format_string) \
153 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
154 field, format_string)
155
156SPI_STATISTICS_SHOW(messages, "%lu");
157SPI_STATISTICS_SHOW(transfers, "%lu");
158SPI_STATISTICS_SHOW(errors, "%lu");
159SPI_STATISTICS_SHOW(timedout, "%lu");
160
161SPI_STATISTICS_SHOW(spi_sync, "%lu");
162SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
163SPI_STATISTICS_SHOW(spi_async, "%lu");
164
165SPI_STATISTICS_SHOW(bytes, "%llu");
166SPI_STATISTICS_SHOW(bytes_rx, "%llu");
167SPI_STATISTICS_SHOW(bytes_tx, "%llu");
168
6b7bc061
MS
169#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
170 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
171 "transfer_bytes_histo_" number, \
172 transfer_bytes_histo[index], "%lu")
173SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
174SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
175SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
176SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
177SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
178SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
179SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
180SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
181SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
182SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
183SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
184SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
185SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
186SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
187SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
188SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
189SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
190
d9f12122
MS
191SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
192
aa7da564
GKH
193static struct attribute *spi_dev_attrs[] = {
194 &dev_attr_modalias.attr,
5039563e 195 &dev_attr_driver_override.attr,
aa7da564 196 NULL,
8ae12a0d 197};
eca2ebc7
MS
198
199static const struct attribute_group spi_dev_group = {
200 .attrs = spi_dev_attrs,
201};
202
203static struct attribute *spi_device_statistics_attrs[] = {
204 &dev_attr_spi_device_messages.attr,
205 &dev_attr_spi_device_transfers.attr,
206 &dev_attr_spi_device_errors.attr,
207 &dev_attr_spi_device_timedout.attr,
208 &dev_attr_spi_device_spi_sync.attr,
209 &dev_attr_spi_device_spi_sync_immediate.attr,
210 &dev_attr_spi_device_spi_async.attr,
211 &dev_attr_spi_device_bytes.attr,
212 &dev_attr_spi_device_bytes_rx.attr,
213 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
214 &dev_attr_spi_device_transfer_bytes_histo0.attr,
215 &dev_attr_spi_device_transfer_bytes_histo1.attr,
216 &dev_attr_spi_device_transfer_bytes_histo2.attr,
217 &dev_attr_spi_device_transfer_bytes_histo3.attr,
218 &dev_attr_spi_device_transfer_bytes_histo4.attr,
219 &dev_attr_spi_device_transfer_bytes_histo5.attr,
220 &dev_attr_spi_device_transfer_bytes_histo6.attr,
221 &dev_attr_spi_device_transfer_bytes_histo7.attr,
222 &dev_attr_spi_device_transfer_bytes_histo8.attr,
223 &dev_attr_spi_device_transfer_bytes_histo9.attr,
224 &dev_attr_spi_device_transfer_bytes_histo10.attr,
225 &dev_attr_spi_device_transfer_bytes_histo11.attr,
226 &dev_attr_spi_device_transfer_bytes_histo12.attr,
227 &dev_attr_spi_device_transfer_bytes_histo13.attr,
228 &dev_attr_spi_device_transfer_bytes_histo14.attr,
229 &dev_attr_spi_device_transfer_bytes_histo15.attr,
230 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 231 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
232 NULL,
233};
234
235static const struct attribute_group spi_device_statistics_group = {
236 .name = "statistics",
237 .attrs = spi_device_statistics_attrs,
238};
239
240static const struct attribute_group *spi_dev_groups[] = {
241 &spi_dev_group,
242 &spi_device_statistics_group,
243 NULL,
244};
245
8caab75f
GU
246static struct attribute *spi_controller_statistics_attrs[] = {
247 &dev_attr_spi_controller_messages.attr,
248 &dev_attr_spi_controller_transfers.attr,
249 &dev_attr_spi_controller_errors.attr,
250 &dev_attr_spi_controller_timedout.attr,
251 &dev_attr_spi_controller_spi_sync.attr,
252 &dev_attr_spi_controller_spi_sync_immediate.attr,
253 &dev_attr_spi_controller_spi_async.attr,
254 &dev_attr_spi_controller_bytes.attr,
255 &dev_attr_spi_controller_bytes_rx.attr,
256 &dev_attr_spi_controller_bytes_tx.attr,
257 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
258 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
259 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
260 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
261 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
262 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
263 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
264 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
265 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
266 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
267 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
268 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
269 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
270 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
271 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
272 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
273 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
274 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
275 NULL,
276};
277
8caab75f 278static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 279 .name = "statistics",
8caab75f 280 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
281};
282
283static const struct attribute_group *spi_master_groups[] = {
8caab75f 284 &spi_controller_statistics_group,
eca2ebc7
MS
285 NULL,
286};
287
da21fde0
UKK
288static void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
289 struct spi_transfer *xfer,
290 struct spi_controller *ctlr)
eca2ebc7
MS
291{
292 unsigned long flags;
6b7bc061
MS
293 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
294
295 if (l2len < 0)
296 l2len = 0;
eca2ebc7
MS
297
298 spin_lock_irqsave(&stats->lock, flags);
299
300 stats->transfers++;
6b7bc061 301 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS
302
303 stats->bytes += xfer->len;
304 if ((xfer->tx_buf) &&
8caab75f 305 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS
306 stats->bytes_tx += xfer->len;
307 if ((xfer->rx_buf) &&
8caab75f 308 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS
309 stats->bytes_rx += xfer->len;
310
311 spin_unlock_irqrestore(&stats->lock, flags);
312}
8ae12a0d
DB
313
314/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
315 * and the sysfs version makes coldplug work too.
316 */
317
75368bf6
AV
318static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
319 const struct spi_device *sdev)
320{
321 while (id->name[0]) {
322 if (!strcmp(sdev->modalias, id->name))
323 return id;
324 id++;
325 }
326 return NULL;
327}
328
329const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
330{
331 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
332
333 return spi_match_id(sdrv->id_table, sdev);
334}
335EXPORT_SYMBOL_GPL(spi_get_device_id);
336
8ae12a0d
DB
337static int spi_match_device(struct device *dev, struct device_driver *drv)
338{
339 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
340 const struct spi_driver *sdrv = to_spi_driver(drv);
341
5039563e
TP
342 /* Check override first, and if set, only use the named driver */
343 if (spi->driver_override)
344 return strcmp(spi->driver_override, drv->name) == 0;
345
2b7a32f7
SA
346 /* Attempt an OF style match */
347 if (of_driver_match_device(dev, drv))
348 return 1;
349
64bee4d2
MW
350 /* Then try ACPI */
351 if (acpi_driver_match_device(dev, drv))
352 return 1;
353
75368bf6
AV
354 if (sdrv->id_table)
355 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 356
35f74fca 357 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
358}
359
7eff2e7a 360static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
361{
362 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
363 int rc;
364
365 rc = acpi_device_uevent_modalias(dev, env);
366 if (rc != -ENODEV)
367 return rc;
8ae12a0d 368
2856670f 369 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
370}
371
9db34ee6 372static int spi_probe(struct device *dev)
b885244e
DB
373{
374 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 375 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
376 int ret;
377
86be408b
SN
378 ret = of_clk_set_defaults(dev->of_node, false);
379 if (ret)
380 return ret;
381
44af7927
JH
382 if (dev->of_node) {
383 spi->irq = of_irq_get(dev->of_node, 0);
384 if (spi->irq == -EPROBE_DEFER)
385 return -EPROBE_DEFER;
386 if (spi->irq < 0)
387 spi->irq = 0;
388 }
389
676e7c25 390 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
391 if (ret)
392 return ret;
393
440408db
UKK
394 if (sdrv->probe) {
395 ret = sdrv->probe(spi);
396 if (ret)
397 dev_pm_domain_detach(dev, true);
398 }
b885244e 399
33cf00e5 400 return ret;
b885244e
DB
401}
402
fc7a6209 403static void spi_remove(struct device *dev)
b885244e
DB
404{
405 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5 406
7795d475
UKK
407 if (sdrv->remove) {
408 int ret;
409
440408db 410 ret = sdrv->remove(to_spi_device(dev));
7795d475
UKK
411 if (ret)
412 dev_warn(dev,
413 "Failed to unbind driver (%pe), ignoring\n",
414 ERR_PTR(ret));
415 }
416
676e7c25 417 dev_pm_domain_detach(dev, true);
b885244e
DB
418}
419
9db34ee6 420static void spi_shutdown(struct device *dev)
b885244e 421{
a6f483b2
MS
422 if (dev->driver) {
423 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
b885244e 424
a6f483b2
MS
425 if (sdrv->shutdown)
426 sdrv->shutdown(to_spi_device(dev));
427 }
b885244e
DB
428}
429
9db34ee6
UKK
430struct bus_type spi_bus_type = {
431 .name = "spi",
432 .dev_groups = spi_dev_groups,
433 .match = spi_match_device,
434 .uevent = spi_uevent,
435 .probe = spi_probe,
436 .remove = spi_remove,
437 .shutdown = spi_shutdown,
438};
439EXPORT_SYMBOL_GPL(spi_bus_type);
440
33e34dc6 441/**
ca5d2485 442 * __spi_register_driver - register a SPI driver
88c9321d 443 * @owner: owner module of the driver to register
33e34dc6
DB
444 * @sdrv: the driver to register
445 * Context: can sleep
97d56dc6
JMC
446 *
447 * Return: zero on success, else a negative error code.
33e34dc6 448 */
ca5d2485 449int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 450{
ca5d2485 451 sdrv->driver.owner = owner;
b885244e 452 sdrv->driver.bus = &spi_bus_type;
b885244e
DB
453 return driver_register(&sdrv->driver);
454}
ca5d2485 455EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 456
8ae12a0d
DB
457/*-------------------------------------------------------------------------*/
458
459/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 460 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
461 * Device registration normally goes into like arch/.../mach.../board-YYY.c
462 * with other readonly (flashable) information about mainboard devices.
463 */
464
465struct boardinfo {
466 struct list_head list;
2b9603a0 467 struct spi_board_info board_info;
8ae12a0d
DB
468};
469
470static LIST_HEAD(board_list);
8caab75f 471static LIST_HEAD(spi_controller_list);
2b9603a0
FT
472
473/*
be73e323 474 * Used to protect add/del operation for board_info list and
8caab75f 475 * spi_controller list, and their matching process
9a9a047a 476 * also used to protect object of type struct idr
2b9603a0 477 */
94040828 478static DEFINE_MUTEX(board_lock);
8ae12a0d 479
dc87c98e
GL
480/**
481 * spi_alloc_device - Allocate a new SPI device
8caab75f 482 * @ctlr: Controller to which device is connected
dc87c98e
GL
483 * Context: can sleep
484 *
485 * Allows a driver to allocate and initialize a spi_device without
486 * registering it immediately. This allows a driver to directly
487 * fill the spi_device with device parameters before calling
488 * spi_add_device() on it.
489 *
490 * Caller is responsible to call spi_add_device() on the returned
8caab75f 491 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
492 * needs to discard the spi_device without adding it, then it should
493 * call spi_dev_put() on it.
494 *
97d56dc6 495 * Return: a pointer to the new device, or NULL.
dc87c98e 496 */
da21fde0 497static struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
498{
499 struct spi_device *spi;
dc87c98e 500
8caab75f 501 if (!spi_controller_get(ctlr))
dc87c98e
GL
502 return NULL;
503
5fe5f05e 504 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 505 if (!spi) {
8caab75f 506 spi_controller_put(ctlr);
dc87c98e
GL
507 return NULL;
508 }
509
8caab75f
GU
510 spi->master = spi->controller = ctlr;
511 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
512 spi->dev.bus = &spi_bus_type;
513 spi->dev.release = spidev_release;
446411e1 514 spi->cs_gpio = -ENOENT;
ea235786 515 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7
MS
516
517 spin_lock_init(&spi->statistics.lock);
518
dc87c98e
GL
519 device_initialize(&spi->dev);
520 return spi;
521}
dc87c98e 522
e13ac47b
JN
523static void spi_dev_set_name(struct spi_device *spi)
524{
525 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
526
527 if (adev) {
528 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
529 return;
530 }
531
8caab75f 532 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
533 spi->chip_select);
534}
535
b6fb8d3a
MW
536static int spi_dev_check(struct device *dev, void *data)
537{
538 struct spi_device *spi = to_spi_device(dev);
539 struct spi_device *new_spi = data;
540
8caab75f 541 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
542 spi->chip_select == new_spi->chip_select)
543 return -EBUSY;
544 return 0;
545}
546
c7299fea
SK
547static void spi_cleanup(struct spi_device *spi)
548{
549 if (spi->controller->cleanup)
550 spi->controller->cleanup(spi);
551}
552
0c79378c 553static int __spi_add_device(struct spi_device *spi)
dc87c98e 554{
8caab75f
GU
555 struct spi_controller *ctlr = spi->controller;
556 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
557 int status;
558
6bfb15f3
UKK
559 /*
560 * We need to make sure there's no other device with this
561 * chipselect **BEFORE** we call setup(), else we'll trash
562 * its configuration.
563 */
b6fb8d3a
MW
564 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
565 if (status) {
e48880e0
DB
566 dev_err(dev, "chipselect %d already in use\n",
567 spi->chip_select);
0c79378c 568 return status;
e48880e0
DB
569 }
570
ddf75be4
LW
571 /* Controller may unregister concurrently */
572 if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
573 !device_is_registered(&ctlr->dev)) {
0c79378c 574 return -ENODEV;
ddf75be4
LW
575 }
576
f3186dd8
LW
577 /* Descriptors take precedence */
578 if (ctlr->cs_gpiods)
579 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
580 else if (ctlr->cs_gpios)
8caab75f 581 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 582
e48880e0
DB
583 /* Drivers may modify this initial i/o setup, but will
584 * normally rely on the device being setup. Devices
585 * using SPI_CS_HIGH can't coexist well otherwise...
586 */
7d077197 587 status = spi_setup(spi);
dc87c98e 588 if (status < 0) {
eb288a1f
LW
589 dev_err(dev, "can't setup %s, status %d\n",
590 dev_name(&spi->dev), status);
0c79378c 591 return status;
dc87c98e
GL
592 }
593
e48880e0 594 /* Device may be bound to an active driver when this returns */
dc87c98e 595 status = device_add(&spi->dev);
c7299fea 596 if (status < 0) {
eb288a1f
LW
597 dev_err(dev, "can't add %s, status %d\n",
598 dev_name(&spi->dev), status);
c7299fea
SK
599 spi_cleanup(spi);
600 } else {
35f74fca 601 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
c7299fea 602 }
dc87c98e 603
0c79378c
SR
604 return status;
605}
606
607/**
608 * spi_add_device - Add spi_device allocated with spi_alloc_device
609 * @spi: spi_device to register
610 *
611 * Companion function to spi_alloc_device. Devices allocated with
612 * spi_alloc_device can be added onto the spi bus with this function.
613 *
614 * Return: 0 on success; negative errno on failure
615 */
da21fde0 616static int spi_add_device(struct spi_device *spi)
0c79378c
SR
617{
618 struct spi_controller *ctlr = spi->controller;
619 struct device *dev = ctlr->dev.parent;
620 int status;
621
622 /* Chipselects are numbered 0..max; validate. */
623 if (spi->chip_select >= ctlr->num_chipselect) {
624 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
625 ctlr->num_chipselect);
626 return -EINVAL;
627 }
628
629 /* Set the bus ID string */
630 spi_dev_set_name(spi);
631
6098475d 632 mutex_lock(&ctlr->add_lock);
0c79378c 633 status = __spi_add_device(spi);
6098475d 634 mutex_unlock(&ctlr->add_lock);
e48880e0 635 return status;
dc87c98e 636}
8ae12a0d 637
0c79378c
SR
638static int spi_add_device_locked(struct spi_device *spi)
639{
640 struct spi_controller *ctlr = spi->controller;
641 struct device *dev = ctlr->dev.parent;
642
643 /* Chipselects are numbered 0..max; validate. */
644 if (spi->chip_select >= ctlr->num_chipselect) {
645 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
646 ctlr->num_chipselect);
647 return -EINVAL;
648 }
649
650 /* Set the bus ID string */
651 spi_dev_set_name(spi);
652
6098475d 653 WARN_ON(!mutex_is_locked(&ctlr->add_lock));
0c79378c
SR
654 return __spi_add_device(spi);
655}
656
33e34dc6
DB
657/**
658 * spi_new_device - instantiate one new SPI device
8caab75f 659 * @ctlr: Controller to which device is connected
33e34dc6
DB
660 * @chip: Describes the SPI device
661 * Context: can sleep
662 *
663 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
664 * after board init creates the hard-wired devices. Some development
665 * platforms may not be able to use spi_register_board_info though, and
666 * this is exported so that for example a USB or parport based adapter
667 * driver could add devices (which it would learn about out-of-band).
082c8cb4 668 *
97d56dc6 669 * Return: the new device, or NULL.
8ae12a0d 670 */
8caab75f 671struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 672 struct spi_board_info *chip)
8ae12a0d
DB
673{
674 struct spi_device *proxy;
8ae12a0d
DB
675 int status;
676
082c8cb4
DB
677 /* NOTE: caller did any chip->bus_num checks necessary.
678 *
679 * Also, unless we change the return value convention to use
680 * error-or-pointer (not NULL-or-pointer), troubleshootability
681 * suggests syslogged diagnostics are best here (ugh).
682 */
683
8caab75f 684 proxy = spi_alloc_device(ctlr);
dc87c98e 685 if (!proxy)
8ae12a0d
DB
686 return NULL;
687
102eb975
GL
688 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
689
8ae12a0d
DB
690 proxy->chip_select = chip->chip_select;
691 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 692 proxy->mode = chip->mode;
8ae12a0d 693 proxy->irq = chip->irq;
102eb975 694 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
695 proxy->dev.platform_data = (void *) chip->platform_data;
696 proxy->controller_data = chip->controller_data;
697 proxy->controller_state = NULL;
8ae12a0d 698
47afc77b
HK
699 if (chip->swnode) {
700 status = device_add_software_node(&proxy->dev, chip->swnode);
826cf175 701 if (status) {
9d902c2a 702 dev_err(&ctlr->dev, "failed to add software node to '%s': %d\n",
826cf175
DT
703 chip->modalias, status);
704 goto err_dev_put;
705 }
8ae12a0d
DB
706 }
707
826cf175
DT
708 status = spi_add_device(proxy);
709 if (status < 0)
df41a5da 710 goto err_dev_put;
826cf175 711
8ae12a0d 712 return proxy;
826cf175 713
826cf175 714err_dev_put:
df41a5da 715 device_remove_software_node(&proxy->dev);
826cf175
DT
716 spi_dev_put(proxy);
717 return NULL;
8ae12a0d
DB
718}
719EXPORT_SYMBOL_GPL(spi_new_device);
720
3b1884c2
GU
721/**
722 * spi_unregister_device - unregister a single SPI device
723 * @spi: spi_device to unregister
724 *
725 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 726 * by spi_unregister_controller().
3b1884c2
GU
727 */
728void spi_unregister_device(struct spi_device *spi)
729{
bd6c1644
GU
730 if (!spi)
731 return;
732
8324147f 733 if (spi->dev.of_node) {
bd6c1644 734 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
735 of_node_put(spi->dev.of_node);
736 }
7f24467f
OP
737 if (ACPI_COMPANION(&spi->dev))
738 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
47afc77b 739 device_remove_software_node(&spi->dev);
27e7db56
SK
740 device_del(&spi->dev);
741 spi_cleanup(spi);
742 put_device(&spi->dev);
3b1884c2
GU
743}
744EXPORT_SYMBOL_GPL(spi_unregister_device);
745
8caab75f
GU
746static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
747 struct spi_board_info *bi)
2b9603a0
FT
748{
749 struct spi_device *dev;
750
8caab75f 751 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
752 return;
753
8caab75f 754 dev = spi_new_device(ctlr, bi);
2b9603a0 755 if (!dev)
8caab75f 756 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
757 bi->modalias);
758}
759
33e34dc6
DB
760/**
761 * spi_register_board_info - register SPI devices for a given board
762 * @info: array of chip descriptors
763 * @n: how many descriptors are provided
764 * Context: can sleep
765 *
8ae12a0d
DB
766 * Board-specific early init code calls this (probably during arch_initcall)
767 * with segments of the SPI device table. Any device nodes are created later,
768 * after the relevant parent SPI controller (bus_num) is defined. We keep
769 * this table of devices forever, so that reloading a controller driver will
770 * not make Linux forget about these hard-wired devices.
771 *
772 * Other code can also call this, e.g. a particular add-on board might provide
773 * SPI devices through its expansion connector, so code initializing that board
774 * would naturally declare its SPI devices.
775 *
776 * The board info passed can safely be __initdata ... but be careful of
777 * any embedded pointers (platform_data, etc), they're copied as-is.
97d56dc6
JMC
778 *
779 * Return: zero on success, else a negative error code.
8ae12a0d 780 */
fd4a319b 781int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 782{
2b9603a0
FT
783 struct boardinfo *bi;
784 int i;
8ae12a0d 785
c7908a37 786 if (!n)
f974cf57 787 return 0;
c7908a37 788
f9bdb7fd 789 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
790 if (!bi)
791 return -ENOMEM;
8ae12a0d 792
2b9603a0 793 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 794 struct spi_controller *ctlr;
8ae12a0d 795
2b9603a0 796 memcpy(&bi->board_info, info, sizeof(*info));
826cf175 797
2b9603a0
FT
798 mutex_lock(&board_lock);
799 list_add_tail(&bi->list, &board_list);
8caab75f
GU
800 list_for_each_entry(ctlr, &spi_controller_list, list)
801 spi_match_controller_to_boardinfo(ctlr,
802 &bi->board_info);
2b9603a0 803 mutex_unlock(&board_lock);
8ae12a0d 804 }
2b9603a0
FT
805
806 return 0;
8ae12a0d
DB
807}
808
809/*-------------------------------------------------------------------------*/
810
fb51601b
UKK
811/* Core methods for SPI resource management */
812
813/**
814 * spi_res_alloc - allocate a spi resource that is life-cycle managed
815 * during the processing of a spi_message while using
816 * spi_transfer_one
817 * @spi: the spi device for which we allocate memory
818 * @release: the release code to execute for this resource
819 * @size: size to alloc and return
820 * @gfp: GFP allocation flags
821 *
822 * Return: the pointer to the allocated data
823 *
824 * This may get enhanced in the future to allocate from a memory pool
825 * of the @spi_device or @spi_controller to avoid repeated allocations.
826 */
da21fde0
UKK
827static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
828 size_t size, gfp_t gfp)
fb51601b
UKK
829{
830 struct spi_res *sres;
831
832 sres = kzalloc(sizeof(*sres) + size, gfp);
833 if (!sres)
834 return NULL;
835
836 INIT_LIST_HEAD(&sres->entry);
837 sres->release = release;
838
839 return sres->data;
840}
fb51601b
UKK
841
842/**
843 * spi_res_free - free an spi resource
844 * @res: pointer to the custom data of a resource
845 *
846 */
da21fde0 847static void spi_res_free(void *res)
fb51601b
UKK
848{
849 struct spi_res *sres = container_of(res, struct spi_res, data);
850
851 if (!res)
852 return;
853
854 WARN_ON(!list_empty(&sres->entry));
855 kfree(sres);
856}
fb51601b
UKK
857
858/**
859 * spi_res_add - add a spi_res to the spi_message
860 * @message: the spi message
861 * @res: the spi_resource
862 */
da21fde0 863static void spi_res_add(struct spi_message *message, void *res)
fb51601b
UKK
864{
865 struct spi_res *sres = container_of(res, struct spi_res, data);
866
867 WARN_ON(!list_empty(&sres->entry));
868 list_add_tail(&sres->entry, &message->resources);
869}
fb51601b
UKK
870
871/**
872 * spi_res_release - release all spi resources for this message
873 * @ctlr: the @spi_controller
874 * @message: the @spi_message
875 */
da21fde0 876static void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
fb51601b
UKK
877{
878 struct spi_res *res, *tmp;
879
880 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
881 if (res->release)
882 res->release(ctlr, message, res->data);
883
884 list_del(&res->entry);
885
886 kfree(res);
887 }
888}
fb51601b
UKK
889
890/*-------------------------------------------------------------------------*/
891
d347b4aa 892static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
b158935f 893{
86527bcb 894 bool activate = enable;
25093bde 895
d40f0b6f
DA
896 /*
897 * Avoid calling into the driver (or doing delays) if the chip select
898 * isn't actually changing from the last time this was called.
899 */
d347b4aa 900 if (!force && (spi->controller->last_cs_enable == enable) &&
d40f0b6f
DA
901 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
902 return;
903
5cb4e1f3
AS
904 trace_spi_set_cs(spi, activate);
905
d40f0b6f
DA
906 spi->controller->last_cs_enable = enable;
907 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
908
0486d9f9 909 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) ||
910 !spi->controller->set_cs_timing) {
86527bcb 911 if (activate)
8c33ebfe 912 spi_delay_exec(&spi->cs_setup, NULL);
25093bde 913 else
8c33ebfe 914 spi_delay_exec(&spi->cs_hold, NULL);
25093bde
AA
915 }
916
b158935f
MB
917 if (spi->mode & SPI_CS_HIGH)
918 enable = !enable;
919
f3186dd8 920 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) {
f3186dd8 921 if (!(spi->mode & SPI_NO_CS)) {
6b695469
AS
922 if (spi->cs_gpiod) {
923 /*
924 * Historically ACPI has no means of the GPIO polarity and
925 * thus the SPISerialBus() resource defines it on the per-chip
926 * basis. In order to avoid a chain of negations, the GPIO
927 * polarity is considered being Active High. Even for the cases
928 * when _DSD() is involved (in the updated versions of ACPI)
929 * the GPIO CS polarity must be defined Active High to avoid
930 * ambiguity. That's why we use enable, that takes SPI_CS_HIGH
931 * into account.
932 */
933 if (has_acpi_companion(&spi->dev))
934 gpiod_set_value_cansleep(spi->cs_gpiod, !enable);
935 else
936 /* Polarity handled by GPIO library */
937 gpiod_set_value_cansleep(spi->cs_gpiod, activate);
938 } else {
766c6b63
SVA
939 /*
940 * invert the enable line, as active low is
941 * default for SPI.
942 */
28f7604f 943 gpio_set_value_cansleep(spi->cs_gpio, !enable);
6b695469 944 }
f3186dd8 945 }
8eee6b9d 946 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
947 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
948 spi->controller->set_cs)
949 spi->controller->set_cs(spi, !enable);
950 } else if (spi->controller->set_cs) {
951 spi->controller->set_cs(spi, !enable);
8eee6b9d 952 }
25093bde 953
0486d9f9 954 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio) ||
955 !spi->controller->set_cs_timing) {
86527bcb 956 if (!activate)
8c33ebfe 957 spi_delay_exec(&spi->cs_inactive, NULL);
25093bde 958 }
b158935f
MB
959}
960
2de440f5 961#ifdef CONFIG_HAS_DMA
46336966
BB
962int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
963 struct sg_table *sgt, void *buf, size_t len,
964 enum dma_data_direction dir)
6ad45a27
MB
965{
966 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 967 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
968#ifdef CONFIG_HIGHMEM
969 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
970 (unsigned long)buf < (PKMAP_BASE +
971 (LAST_PKMAP * PAGE_SIZE)));
972#else
973 const bool kmap_buf = false;
974#endif
65598c13
AG
975 int desc_len;
976 int sgs;
6ad45a27 977 struct page *vm_page;
8dd4a016 978 struct scatterlist *sg;
6ad45a27
MB
979 void *sg_buf;
980 size_t min;
981 int i, ret;
982
b1b8153c 983 if (vmalloced_buf || kmap_buf) {
df88e91b 984 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 985 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 986 } else if (virt_addr_valid(buf)) {
8caab75f 987 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 988 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
989 } else {
990 return -EINVAL;
65598c13
AG
991 }
992
6ad45a27
MB
993 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
994 if (ret != 0)
995 return ret;
996
8dd4a016 997 sg = &sgt->sgl[0];
6ad45a27 998 for (i = 0; i < sgs; i++) {
6ad45a27 999
b1b8153c 1000 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
1001 /*
1002 * Next scatterlist entry size is the minimum between
1003 * the desc_len and the remaining buffer length that
1004 * fits in a page.
1005 */
1006 min = min_t(size_t, desc_len,
1007 min_t(size_t, len,
1008 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
1009 if (vmalloced_buf)
1010 vm_page = vmalloc_to_page(buf);
1011 else
1012 vm_page = kmap_to_page(buf);
6ad45a27
MB
1013 if (!vm_page) {
1014 sg_free_table(sgt);
1015 return -ENOMEM;
1016 }
8dd4a016 1017 sg_set_page(sg, vm_page,
c1aefbdd 1018 min, offset_in_page(buf));
6ad45a27 1019 } else {
65598c13 1020 min = min_t(size_t, len, desc_len);
6ad45a27 1021 sg_buf = buf;
8dd4a016 1022 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
1023 }
1024
6ad45a27
MB
1025 buf += min;
1026 len -= min;
8dd4a016 1027 sg = sg_next(sg);
6ad45a27
MB
1028 }
1029
1030 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
1031 if (!ret)
1032 ret = -ENOMEM;
6ad45a27
MB
1033 if (ret < 0) {
1034 sg_free_table(sgt);
1035 return ret;
1036 }
1037
1038 sgt->nents = ret;
1039
1040 return 0;
1041}
1042
46336966
BB
1043void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
1044 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB
1045{
1046 if (sgt->orig_nents) {
1047 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
1048 sg_free_table(sgt);
1049 }
1050}
1051
8caab75f 1052static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1053{
99adef31
MB
1054 struct device *tx_dev, *rx_dev;
1055 struct spi_transfer *xfer;
6ad45a27 1056 int ret;
3a2eba9b 1057
8caab75f 1058 if (!ctlr->can_dma)
99adef31
MB
1059 return 0;
1060
8caab75f
GU
1061 if (ctlr->dma_tx)
1062 tx_dev = ctlr->dma_tx->device->dev;
b470e10e
VK
1063 else if (ctlr->dma_map_dev)
1064 tx_dev = ctlr->dma_map_dev;
c37f45b5 1065 else
8caab75f 1066 tx_dev = ctlr->dev.parent;
c37f45b5 1067
8caab75f
GU
1068 if (ctlr->dma_rx)
1069 rx_dev = ctlr->dma_rx->device->dev;
b470e10e
VK
1070 else if (ctlr->dma_map_dev)
1071 rx_dev = ctlr->dma_map_dev;
c37f45b5 1072 else
8caab75f 1073 rx_dev = ctlr->dev.parent;
99adef31
MB
1074
1075 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1076 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1077 continue;
1078
1079 if (xfer->tx_buf != NULL) {
8caab75f 1080 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1081 (void *)xfer->tx_buf, xfer->len,
1082 DMA_TO_DEVICE);
1083 if (ret != 0)
1084 return ret;
99adef31
MB
1085 }
1086
1087 if (xfer->rx_buf != NULL) {
8caab75f 1088 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
1089 xfer->rx_buf, xfer->len,
1090 DMA_FROM_DEVICE);
1091 if (ret != 0) {
8caab75f 1092 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
1093 DMA_TO_DEVICE);
1094 return ret;
99adef31
MB
1095 }
1096 }
1097 }
1098
8caab75f 1099 ctlr->cur_msg_mapped = true;
99adef31
MB
1100
1101 return 0;
1102}
1103
8caab75f 1104static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
1105{
1106 struct spi_transfer *xfer;
1107 struct device *tx_dev, *rx_dev;
1108
8caab75f 1109 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
1110 return 0;
1111
8caab75f
GU
1112 if (ctlr->dma_tx)
1113 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 1114 else
8caab75f 1115 tx_dev = ctlr->dev.parent;
c37f45b5 1116
8caab75f
GU
1117 if (ctlr->dma_rx)
1118 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 1119 else
8caab75f 1120 rx_dev = ctlr->dev.parent;
99adef31
MB
1121
1122 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1123 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
1124 continue;
1125
8caab75f
GU
1126 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1127 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
1128 }
1129
809b1b04
RG
1130 ctlr->cur_msg_mapped = false;
1131
99adef31
MB
1132 return 0;
1133}
2de440f5 1134#else /* !CONFIG_HAS_DMA */
8caab75f 1135static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
1136 struct spi_message *msg)
1137{
1138 return 0;
1139}
1140
8caab75f 1141static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1142 struct spi_message *msg)
2de440f5
GU
1143{
1144 return 0;
1145}
1146#endif /* !CONFIG_HAS_DMA */
1147
8caab75f 1148static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
1149 struct spi_message *msg)
1150{
1151 struct spi_transfer *xfer;
1152
1153 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1154 /*
1155 * Restore the original value of tx_buf or rx_buf if they are
1156 * NULL.
1157 */
8caab75f 1158 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1159 xfer->tx_buf = NULL;
8caab75f 1160 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
1161 xfer->rx_buf = NULL;
1162 }
1163
8caab75f 1164 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1165}
1166
8caab75f 1167static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1168{
1169 struct spi_transfer *xfer;
1170 void *tmp;
1171 unsigned int max_tx, max_rx;
1172
aee67fe8 1173 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1174 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU
1175 max_tx = 0;
1176 max_rx = 0;
1177
1178 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1179 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1180 !xfer->tx_buf)
1181 max_tx = max(xfer->len, max_tx);
8caab75f 1182 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1183 !xfer->rx_buf)
1184 max_rx = max(xfer->len, max_rx);
1185 }
1186
1187 if (max_tx) {
8caab75f 1188 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU
1189 GFP_KERNEL | GFP_DMA);
1190 if (!tmp)
1191 return -ENOMEM;
8caab75f 1192 ctlr->dummy_tx = tmp;
2de440f5
GU
1193 memset(tmp, 0, max_tx);
1194 }
1195
1196 if (max_rx) {
8caab75f 1197 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1198 GFP_KERNEL | GFP_DMA);
1199 if (!tmp)
1200 return -ENOMEM;
8caab75f 1201 ctlr->dummy_rx = tmp;
2de440f5
GU
1202 }
1203
1204 if (max_tx || max_rx) {
1205 list_for_each_entry(xfer, &msg->transfers,
1206 transfer_list) {
5442dcaa
CL
1207 if (!xfer->len)
1208 continue;
2de440f5 1209 if (!xfer->tx_buf)
8caab75f 1210 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1211 if (!xfer->rx_buf)
8caab75f 1212 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1213 }
1214 }
1215 }
1216
8caab75f 1217 return __spi_map_msg(ctlr, msg);
2de440f5 1218}
99adef31 1219
810923f3
LR
1220static int spi_transfer_wait(struct spi_controller *ctlr,
1221 struct spi_message *msg,
1222 struct spi_transfer *xfer)
1223{
1224 struct spi_statistics *statm = &ctlr->statistics;
1225 struct spi_statistics *stats = &msg->spi->statistics;
6170d077 1226 u32 speed_hz = xfer->speed_hz;
49686df5 1227 unsigned long long ms;
810923f3
LR
1228
1229 if (spi_controller_is_slave(ctlr)) {
1230 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1231 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1232 return -EINTR;
1233 }
1234 } else {
6170d077
XY
1235 if (!speed_hz)
1236 speed_hz = 100000;
1237
86b8bff7
AS
1238 /*
1239 * For each byte we wait for 8 cycles of the SPI clock.
1240 * Since speed is defined in Hz and we want milliseconds,
1241 * use respective multiplier, but before the division,
1242 * otherwise we may get 0 for short transfers.
1243 */
1244 ms = 8LL * MSEC_PER_SEC * xfer->len;
6170d077 1245 do_div(ms, speed_hz);
810923f3 1246
86b8bff7
AS
1247 /*
1248 * Increase it twice and add 200 ms tolerance, use
1249 * predefined maximum in case of overflow.
1250 */
1251 ms += ms + 200;
810923f3
LR
1252 if (ms > UINT_MAX)
1253 ms = UINT_MAX;
1254
1255 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1256 msecs_to_jiffies(ms));
1257
1258 if (ms == 0) {
1259 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1260 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1261 dev_err(&msg->spi->dev,
1262 "SPI transfer timed out\n");
1263 return -ETIMEDOUT;
1264 }
1265 }
1266
1267 return 0;
1268}
1269
0ff2de8b
MS
1270static void _spi_transfer_delay_ns(u32 ns)
1271{
1272 if (!ns)
1273 return;
86b8bff7 1274 if (ns <= NSEC_PER_USEC) {
0ff2de8b
MS
1275 ndelay(ns);
1276 } else {
86b8bff7 1277 u32 us = DIV_ROUND_UP(ns, NSEC_PER_USEC);
0ff2de8b
MS
1278
1279 if (us <= 10)
1280 udelay(us);
1281 else
1282 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1283 }
1284}
1285
3984d39b 1286int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1287{
b2c98153
AA
1288 u32 delay = _delay->value;
1289 u32 unit = _delay->unit;
d5864e5b 1290 u32 hz;
0ff2de8b 1291
b2c98153
AA
1292 if (!delay)
1293 return 0;
0ff2de8b
MS
1294
1295 switch (unit) {
1296 case SPI_DELAY_UNIT_USECS:
86b8bff7 1297 delay *= NSEC_PER_USEC;
0ff2de8b 1298 break;
86b8bff7
AS
1299 case SPI_DELAY_UNIT_NSECS:
1300 /* Nothing to do here */
0ff2de8b 1301 break;
d5864e5b 1302 case SPI_DELAY_UNIT_SCK:
b2c98153
AA
1303 /* clock cycles need to be obtained from spi_transfer */
1304 if (!xfer)
1305 return -EINVAL;
86b8bff7
AS
1306 /*
1307 * If there is unknown effective speed, approximate it
1308 * by underestimating with half of the requested hz.
d5864e5b
MS
1309 */
1310 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA
1311 if (!hz)
1312 return -EINVAL;
86b8bff7
AS
1313
1314 /* Convert delay to nanoseconds */
1315 delay *= DIV_ROUND_UP(NSEC_PER_SEC, hz);
d5864e5b 1316 break;
0ff2de8b 1317 default:
b2c98153
AA
1318 return -EINVAL;
1319 }
1320
1321 return delay;
1322}
3984d39b 1323EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA
1324
1325int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1326{
1327 int delay;
1328
8fede89f
MB
1329 might_sleep();
1330
b2c98153
AA
1331 if (!_delay)
1332 return -EINVAL;
1333
3984d39b 1334 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA
1335 if (delay < 0)
1336 return delay;
1337
1338 _spi_transfer_delay_ns(delay);
1339
1340 return 0;
1341}
1342EXPORT_SYMBOL_GPL(spi_delay_exec);
1343
0ff2de8b
MS
1344static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1345 struct spi_transfer *xfer)
1346{
86b8bff7 1347 u32 default_delay_ns = 10 * NSEC_PER_USEC;
329f0dac
AA
1348 u32 delay = xfer->cs_change_delay.value;
1349 u32 unit = xfer->cs_change_delay.unit;
1350 int ret;
0ff2de8b
MS
1351
1352 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA
1353 if (!delay) {
1354 if (unit == SPI_DELAY_UNIT_USECS)
86b8bff7 1355 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1356 return;
6b3f236a 1357 }
0ff2de8b 1358
329f0dac
AA
1359 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1360 if (ret) {
0ff2de8b 1361 dev_err_once(&msg->spi->dev,
86b8bff7
AS
1362 "Use of unsupported delay unit %i, using default of %luus\n",
1363 unit, default_delay_ns / NSEC_PER_USEC);
1364 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1365 }
0ff2de8b
MS
1366}
1367
b158935f
MB
1368/*
1369 * spi_transfer_one_message - Default implementation of transfer_one_message()
1370 *
1371 * This is a standard implementation of transfer_one_message() for
8ba811a7 1372 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1373 * standard handling of delays and chip select management.
1374 */
8caab75f 1375static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1376 struct spi_message *msg)
1377{
1378 struct spi_transfer *xfer;
b158935f
MB
1379 bool keep_cs = false;
1380 int ret = 0;
8caab75f 1381 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1382 struct spi_statistics *stats = &msg->spi->statistics;
b158935f 1383
d347b4aa 1384 spi_set_cs(msg->spi, true, false);
b158935f 1385
eca2ebc7
MS
1386 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1387 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1388
b158935f
MB
1389 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1390 trace_spi_transfer_start(msg, xfer);
1391
8caab75f
GU
1392 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1393 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1394
b42faeee
VO
1395 if (!ctlr->ptp_sts_supported) {
1396 xfer->ptp_sts_word_pre = 0;
1397 ptp_read_system_prets(xfer->ptp_sts);
1398 }
1399
b3063203 1400 if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) {
8caab75f 1401 reinit_completion(&ctlr->xfer_completion);
b158935f 1402
809b1b04 1403fallback_pio:
8caab75f 1404 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1405 if (ret < 0) {
809b1b04
RG
1406 if (ctlr->cur_msg_mapped &&
1407 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1408 __spi_unmap_msg(ctlr, msg);
1409 ctlr->fallback = true;
1410 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1411 goto fallback_pio;
1412 }
1413
eca2ebc7
MS
1414 SPI_STATISTICS_INCREMENT_FIELD(statm,
1415 errors);
1416 SPI_STATISTICS_INCREMENT_FIELD(stats,
1417 errors);
38ec10f6
MB
1418 dev_err(&msg->spi->dev,
1419 "SPI transfer failed: %d\n", ret);
1420 goto out;
1421 }
b158935f 1422
d57e7960
MB
1423 if (ret > 0) {
1424 ret = spi_transfer_wait(ctlr, msg, xfer);
1425 if (ret < 0)
1426 msg->status = ret;
1427 }
38ec10f6
MB
1428 } else {
1429 if (xfer->len)
1430 dev_err(&msg->spi->dev,
1431 "Bufferless transfer has length %u\n",
1432 xfer->len);
13a42798 1433 }
b158935f 1434
b42faeee
VO
1435 if (!ctlr->ptp_sts_supported) {
1436 ptp_read_system_postts(xfer->ptp_sts);
1437 xfer->ptp_sts_word_post = xfer->len;
1438 }
1439
b158935f
MB
1440 trace_spi_transfer_stop(msg, xfer);
1441
1442 if (msg->status != -EINPROGRESS)
1443 goto out;
1444
bebcfd27 1445 spi_transfer_delay_exec(xfer);
b158935f
MB
1446
1447 if (xfer->cs_change) {
1448 if (list_is_last(&xfer->transfer_list,
1449 &msg->transfers)) {
1450 keep_cs = true;
1451 } else {
d347b4aa 1452 spi_set_cs(msg->spi, false, false);
0ff2de8b 1453 _spi_transfer_cs_change_delay(msg, xfer);
d347b4aa 1454 spi_set_cs(msg->spi, true, false);
b158935f
MB
1455 }
1456 }
1457
1458 msg->actual_length += xfer->len;
1459 }
1460
1461out:
1462 if (ret != 0 || !keep_cs)
d347b4aa 1463 spi_set_cs(msg->spi, false, false);
b158935f
MB
1464
1465 if (msg->status == -EINPROGRESS)
1466 msg->status = ret;
1467
8caab75f
GU
1468 if (msg->status && ctlr->handle_err)
1469 ctlr->handle_err(ctlr, msg);
b716c4ff 1470
0ed56252
MB
1471 spi_finalize_current_message(ctlr);
1472
b158935f
MB
1473 return ret;
1474}
1475
1476/**
1477 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1478 * @ctlr: the controller reporting completion
b158935f
MB
1479 *
1480 * Called by SPI drivers using the core transfer_one_message()
1481 * implementation to notify it that the current interrupt driven
9e8f4882 1482 * transfer has finished and the next one may be scheduled.
b158935f 1483 */
8caab75f 1484void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1485{
8caab75f 1486 complete(&ctlr->xfer_completion);
b158935f
MB
1487}
1488EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1489
e1268597
MB
1490static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1491{
1492 if (ctlr->auto_runtime_pm) {
1493 pm_runtime_mark_last_busy(ctlr->dev.parent);
1494 pm_runtime_put_autosuspend(ctlr->dev.parent);
1495 }
1496}
1497
ffbbdd21 1498/**
fc9e0f71 1499 * __spi_pump_messages - function which processes spi message queue
8caab75f 1500 * @ctlr: controller to process queue for
fc9e0f71 1501 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1502 *
1503 * This function checks if there is any spi message in the queue that
1504 * needs processing and if so call out to the driver to initialize hardware
1505 * and transfer each message.
1506 *
0461a414
MB
1507 * Note that it is called both from the kthread itself and also from
1508 * inside spi_sync(); the queue extraction handling at the top of the
1509 * function should deal with this safely.
ffbbdd21 1510 */
8caab75f 1511static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1512{
b42faeee 1513 struct spi_transfer *xfer;
d1c44c93 1514 struct spi_message *msg;
ffbbdd21 1515 bool was_busy = false;
d1c44c93 1516 unsigned long flags;
ffbbdd21
LW
1517 int ret;
1518
983aee5d 1519 /* Lock queue */
8caab75f 1520 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1521
1522 /* Make sure we are not already running a message */
8caab75f
GU
1523 if (ctlr->cur_msg) {
1524 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB
1525 return;
1526 }
1527
f0125f1a 1528 /* If another context is idling the device then defer */
8caab75f 1529 if (ctlr->idling) {
60a883d1 1530 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
8caab75f 1531 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB
1532 return;
1533 }
1534
983aee5d 1535 /* Check if the queue is idle */
8caab75f
GU
1536 if (list_empty(&ctlr->queue) || !ctlr->running) {
1537 if (!ctlr->busy) {
1538 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1539 return;
ffbbdd21 1540 }
fc9e0f71 1541
e1268597 1542 /* Defer any non-atomic teardown to the thread */
f0125f1a 1543 if (!in_kthread) {
e1268597
MB
1544 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1545 !ctlr->unprepare_transfer_hardware) {
1546 spi_idle_runtime_pm(ctlr);
1547 ctlr->busy = false;
1548 trace_spi_controller_idle(ctlr);
1549 } else {
1550 kthread_queue_work(ctlr->kworker,
1551 &ctlr->pump_messages);
1552 }
f0125f1a
MB
1553 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1554 return;
1555 }
1556
1557 ctlr->busy = false;
1558 ctlr->idling = true;
1559 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1560
1561 kfree(ctlr->dummy_rx);
1562 ctlr->dummy_rx = NULL;
1563 kfree(ctlr->dummy_tx);
1564 ctlr->dummy_tx = NULL;
1565 if (ctlr->unprepare_transfer_hardware &&
1566 ctlr->unprepare_transfer_hardware(ctlr))
1567 dev_err(&ctlr->dev,
1568 "failed to unprepare transfer hardware\n");
e1268597 1569 spi_idle_runtime_pm(ctlr);
f0125f1a
MB
1570 trace_spi_controller_idle(ctlr);
1571
1572 spin_lock_irqsave(&ctlr->queue_lock, flags);
1573 ctlr->idling = false;
8caab75f 1574 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1575 return;
1576 }
ffbbdd21 1577
ffbbdd21 1578 /* Extract head of queue */
d1c44c93
VO
1579 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1580 ctlr->cur_msg = msg;
ffbbdd21 1581
d1c44c93 1582 list_del_init(&msg->queue);
8caab75f 1583 if (ctlr->busy)
ffbbdd21
LW
1584 was_busy = true;
1585 else
8caab75f
GU
1586 ctlr->busy = true;
1587 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1588
8caab75f 1589 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1590
8caab75f
GU
1591 if (!was_busy && ctlr->auto_runtime_pm) {
1592 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1593 if (ret < 0) {
7e48e23a 1594 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1595 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1596 ret);
8caab75f 1597 mutex_unlock(&ctlr->io_mutex);
49834de2
MB
1598 return;
1599 }
1600 }
1601
56ec1978 1602 if (!was_busy)
8caab75f 1603 trace_spi_controller_busy(ctlr);
56ec1978 1604
8caab75f
GU
1605 if (!was_busy && ctlr->prepare_transfer_hardware) {
1606 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1607 if (ret) {
8caab75f 1608 dev_err(&ctlr->dev,
f3440d9a
SL
1609 "failed to prepare transfer hardware: %d\n",
1610 ret);
49834de2 1611
8caab75f
GU
1612 if (ctlr->auto_runtime_pm)
1613 pm_runtime_put(ctlr->dev.parent);
f3440d9a 1614
d1c44c93 1615 msg->status = ret;
f3440d9a
SL
1616 spi_finalize_current_message(ctlr);
1617
8caab75f 1618 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1619 return;
1620 }
1621 }
1622
d1c44c93 1623 trace_spi_message_start(msg);
56ec1978 1624
8caab75f 1625 if (ctlr->prepare_message) {
d1c44c93 1626 ret = ctlr->prepare_message(ctlr, msg);
2841a5fc 1627 if (ret) {
8caab75f
GU
1628 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1629 ret);
d1c44c93 1630 msg->status = ret;
8caab75f 1631 spi_finalize_current_message(ctlr);
49023d2e 1632 goto out;
2841a5fc 1633 }
8caab75f 1634 ctlr->cur_msg_prepared = true;
2841a5fc
MB
1635 }
1636
d1c44c93 1637 ret = spi_map_msg(ctlr, msg);
99adef31 1638 if (ret) {
d1c44c93 1639 msg->status = ret;
8caab75f 1640 spi_finalize_current_message(ctlr);
49023d2e 1641 goto out;
99adef31
MB
1642 }
1643
b42faeee
VO
1644 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1645 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1646 xfer->ptp_sts_word_pre = 0;
1647 ptp_read_system_prets(xfer->ptp_sts);
1648 }
1649 }
1650
d1c44c93 1651 ret = ctlr->transfer_one_message(ctlr, msg);
ffbbdd21 1652 if (ret) {
8caab75f 1653 dev_err(&ctlr->dev,
1f802f82 1654 "failed to transfer one message from queue\n");
49023d2e 1655 goto out;
ffbbdd21 1656 }
49023d2e
JH
1657
1658out:
8caab75f 1659 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1660
1661 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1662 if (!ret)
1663 cond_resched();
ffbbdd21
LW
1664}
1665
fc9e0f71
MB
1666/**
1667 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1668 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1669 */
1670static void spi_pump_messages(struct kthread_work *work)
1671{
8caab75f
GU
1672 struct spi_controller *ctlr =
1673 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1674
8caab75f 1675 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1676}
1677
b42faeee
VO
1678/**
1679 * spi_take_timestamp_pre - helper for drivers to collect the beginning of the
1680 * TX timestamp for the requested byte from the SPI
1681 * transfer. The frequency with which this function
1682 * must be called (once per word, once for the whole
1683 * transfer, once per batch of words etc) is arbitrary
1684 * as long as the @tx buffer offset is greater than or
1685 * equal to the requested byte at the time of the
1686 * call. The timestamp is only taken once, at the
1687 * first such call. It is assumed that the driver
1688 * advances its @tx buffer pointer monotonically.
1689 * @ctlr: Pointer to the spi_controller structure of the driver
1690 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1691 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1692 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1693 * transfer, for less jitter in time measurement. Only compatible
1694 * with PIO drivers. If true, must follow up with
1695 * spi_take_timestamp_post or otherwise system will crash.
1696 * WARNING: for fully predictable results, the CPU frequency must
1697 * also be under control (governor).
1698 */
1699void spi_take_timestamp_pre(struct spi_controller *ctlr,
1700 struct spi_transfer *xfer,
862dd2a9 1701 size_t progress, bool irqs_off)
b42faeee 1702{
b42faeee
VO
1703 if (!xfer->ptp_sts)
1704 return;
1705
6a726824 1706 if (xfer->timestamped)
b42faeee
VO
1707 return;
1708
6a726824 1709 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO
1710 return;
1711
1712 /* Capture the resolution of the timestamp */
862dd2a9 1713 xfer->ptp_sts_word_pre = progress;
b42faeee 1714
b42faeee
VO
1715 if (irqs_off) {
1716 local_irq_save(ctlr->irq_flags);
1717 preempt_disable();
1718 }
1719
1720 ptp_read_system_prets(xfer->ptp_sts);
1721}
1722EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1723
1724/**
1725 * spi_take_timestamp_post - helper for drivers to collect the end of the
1726 * TX timestamp for the requested byte from the SPI
1727 * transfer. Can be called with an arbitrary
1728 * frequency: only the first call where @tx exceeds
1729 * or is equal to the requested word will be
1730 * timestamped.
1731 * @ctlr: Pointer to the spi_controller structure of the driver
1732 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1733 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1734 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
1735 */
1736void spi_take_timestamp_post(struct spi_controller *ctlr,
1737 struct spi_transfer *xfer,
862dd2a9 1738 size_t progress, bool irqs_off)
b42faeee 1739{
b42faeee
VO
1740 if (!xfer->ptp_sts)
1741 return;
1742
6a726824 1743 if (xfer->timestamped)
b42faeee
VO
1744 return;
1745
862dd2a9 1746 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO
1747 return;
1748
1749 ptp_read_system_postts(xfer->ptp_sts);
1750
1751 if (irqs_off) {
1752 local_irq_restore(ctlr->irq_flags);
1753 preempt_enable();
1754 }
1755
1756 /* Capture the resolution of the timestamp */
862dd2a9 1757 xfer->ptp_sts_word_post = progress;
b42faeee 1758
6a726824 1759 xfer->timestamped = true;
b42faeee
VO
1760}
1761EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1762
924b5867
DA
1763/**
1764 * spi_set_thread_rt - set the controller to pump at realtime priority
1765 * @ctlr: controller to boost priority of
1766 *
1767 * This can be called because the controller requested realtime priority
1768 * (by setting the ->rt value before calling spi_register_controller()) or
1769 * because a device on the bus said that its transfers needed realtime
1770 * priority.
1771 *
1772 * NOTE: at the moment if any device on a bus says it needs realtime then
1773 * the thread will be at realtime priority for all transfers on that
1774 * controller. If this eventually becomes a problem we may see if we can
1775 * find a way to boost the priority only temporarily during relevant
1776 * transfers.
1777 */
1778static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1779{
924b5867
DA
1780 dev_info(&ctlr->dev,
1781 "will run message pump with realtime priority\n");
6d2b84a4 1782 sched_set_fifo(ctlr->kworker->task);
924b5867
DA
1783}
1784
1785static int spi_init_queue(struct spi_controller *ctlr)
1786{
8caab75f
GU
1787 ctlr->running = false;
1788 ctlr->busy = false;
ffbbdd21 1789
60a883d1
MS
1790 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
1791 if (IS_ERR(ctlr->kworker)) {
1792 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
1793 return PTR_ERR(ctlr->kworker);
ffbbdd21 1794 }
60a883d1 1795
8caab75f 1796 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1797
ffbbdd21 1798 /*
8caab75f 1799 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1800 * message pump with high (realtime) priority to reduce the transfer
1801 * latency on the bus by minimising the delay between a transfer
1802 * request and the scheduling of the message pump thread. Without this
1803 * setting the message pump thread will remain at default priority.
1804 */
924b5867
DA
1805 if (ctlr->rt)
1806 spi_set_thread_rt(ctlr);
ffbbdd21
LW
1807
1808 return 0;
1809}
1810
1811/**
1812 * spi_get_next_queued_message() - called by driver to check for queued
1813 * messages
8caab75f 1814 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1815 *
1816 * If there are more messages in the queue, the next message is returned from
1817 * this call.
97d56dc6
JMC
1818 *
1819 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1820 */
8caab75f 1821struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1822{
1823 struct spi_message *next;
1824 unsigned long flags;
1825
1826 /* get a pointer to the next message, if any */
8caab75f
GU
1827 spin_lock_irqsave(&ctlr->queue_lock, flags);
1828 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1829 queue);
8caab75f 1830 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1831
1832 return next;
1833}
1834EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1835
1836/**
1837 * spi_finalize_current_message() - the current message is complete
8caab75f 1838 * @ctlr: the controller to return the message to
ffbbdd21
LW
1839 *
1840 * Called by the driver to notify the core that the message in the front of the
1841 * queue is complete and can be removed from the queue.
1842 */
8caab75f 1843void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1844{
b42faeee 1845 struct spi_transfer *xfer;
ffbbdd21
LW
1846 struct spi_message *mesg;
1847 unsigned long flags;
2841a5fc 1848 int ret;
ffbbdd21 1849
8caab75f
GU
1850 spin_lock_irqsave(&ctlr->queue_lock, flags);
1851 mesg = ctlr->cur_msg;
1852 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1853
b42faeee
VO
1854 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1855 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1856 ptp_read_system_postts(xfer->ptp_sts);
1857 xfer->ptp_sts_word_post = xfer->len;
1858 }
1859 }
1860
6a726824
VO
1861 if (unlikely(ctlr->ptp_sts_supported))
1862 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
1863 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 1864
8caab75f 1865 spi_unmap_msg(ctlr, mesg);
99adef31 1866
b59a7ca1
GW
1867 /* In the prepare_messages callback the spi bus has the opportunity to
1868 * split a transfer to smaller chunks.
1869 * Release splited transfers here since spi_map_msg is done on the
1870 * splited transfers.
1871 */
1872 spi_res_release(ctlr, mesg);
1873
8caab75f
GU
1874 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1875 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1876 if (ret) {
8caab75f
GU
1877 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1878 ret);
2841a5fc
MB
1879 }
1880 }
391949b6 1881
8caab75f
GU
1882 spin_lock_irqsave(&ctlr->queue_lock, flags);
1883 ctlr->cur_msg = NULL;
1884 ctlr->cur_msg_prepared = false;
809b1b04 1885 ctlr->fallback = false;
60a883d1 1886 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
8caab75f 1887 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS
1888
1889 trace_spi_message_done(mesg);
2841a5fc 1890
ffbbdd21
LW
1891 mesg->state = NULL;
1892 if (mesg->complete)
1893 mesg->complete(mesg->context);
1894}
1895EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1896
8caab75f 1897static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1898{
1899 unsigned long flags;
1900
8caab75f 1901 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1902
8caab75f
GU
1903 if (ctlr->running || ctlr->busy) {
1904 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1905 return -EBUSY;
1906 }
1907
8caab75f
GU
1908 ctlr->running = true;
1909 ctlr->cur_msg = NULL;
1910 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1911
60a883d1 1912 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1913
1914 return 0;
1915}
1916
8caab75f 1917static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1918{
1919 unsigned long flags;
1920 unsigned limit = 500;
1921 int ret = 0;
1922
8caab75f 1923 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1924
1925 /*
1926 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1927 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
1928 * execution path (pump_messages) would be required to call wake_up or
1929 * friends on every SPI message. Do this instead.
1930 */
8caab75f
GU
1931 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1932 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1933 usleep_range(10000, 11000);
8caab75f 1934 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1935 }
1936
8caab75f 1937 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
1938 ret = -EBUSY;
1939 else
8caab75f 1940 ctlr->running = false;
ffbbdd21 1941
8caab75f 1942 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1943
1944 if (ret) {
8caab75f 1945 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
1946 return ret;
1947 }
1948 return ret;
1949}
1950
8caab75f 1951static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1952{
1953 int ret;
1954
8caab75f 1955 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
1956
1957 /*
3989144f 1958 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
1959 * If the reason that stop_queue timed out is that the work will never
1960 * finish, then it does no good to call flush/stop thread, so
1961 * return anyway.
1962 */
1963 if (ret) {
8caab75f 1964 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
1965 return ret;
1966 }
1967
60a883d1 1968 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW
1969
1970 return 0;
1971}
1972
0461a414
MB
1973static int __spi_queued_transfer(struct spi_device *spi,
1974 struct spi_message *msg,
1975 bool need_pump)
ffbbdd21 1976{
8caab75f 1977 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
1978 unsigned long flags;
1979
8caab75f 1980 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1981
8caab75f
GU
1982 if (!ctlr->running) {
1983 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1984 return -ESHUTDOWN;
1985 }
1986 msg->actual_length = 0;
1987 msg->status = -EINPROGRESS;
1988
8caab75f 1989 list_add_tail(&msg->queue, &ctlr->queue);
f0125f1a 1990 if (!ctlr->busy && need_pump)
60a883d1 1991 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1992
8caab75f 1993 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1994 return 0;
1995}
1996
0461a414
MB
1997/**
1998 * spi_queued_transfer - transfer function for queued transfers
1999 * @spi: spi device which is requesting transfer
2000 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
2001 *
2002 * Return: zero on success, else a negative error code.
0461a414
MB
2003 */
2004static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
2005{
2006 return __spi_queued_transfer(spi, msg, true);
2007}
2008
8caab75f 2009static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
2010{
2011 int ret;
2012
8caab75f
GU
2013 ctlr->transfer = spi_queued_transfer;
2014 if (!ctlr->transfer_one_message)
2015 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
2016
2017 /* Initialize and start queue */
8caab75f 2018 ret = spi_init_queue(ctlr);
ffbbdd21 2019 if (ret) {
8caab75f 2020 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
2021 goto err_init_queue;
2022 }
8caab75f
GU
2023 ctlr->queued = true;
2024 ret = spi_start_queue(ctlr);
ffbbdd21 2025 if (ret) {
8caab75f 2026 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
2027 goto err_start_queue;
2028 }
2029
2030 return 0;
2031
2032err_start_queue:
8caab75f 2033 spi_destroy_queue(ctlr);
c3676d5c 2034err_init_queue:
ffbbdd21
LW
2035 return ret;
2036}
2037
988f259b
BB
2038/**
2039 * spi_flush_queue - Send all pending messages in the queue from the callers'
2040 * context
2041 * @ctlr: controller to process queue for
2042 *
2043 * This should be used when one wants to ensure all pending messages have been
2044 * sent before doing something. Is used by the spi-mem code to make sure SPI
2045 * memory operations do not preempt regular SPI transfers that have been queued
2046 * before the spi-mem operation.
2047 */
2048void spi_flush_queue(struct spi_controller *ctlr)
2049{
2050 if (ctlr->transfer == spi_queued_transfer)
2051 __spi_pump_messages(ctlr, false);
2052}
2053
ffbbdd21
LW
2054/*-------------------------------------------------------------------------*/
2055
7cb94361 2056#if defined(CONFIG_OF)
8caab75f 2057static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 2058 struct device_node *nc)
aff5e3f8 2059{
aff5e3f8 2060 u32 value;
c2e51ac3 2061 int rc;
aff5e3f8 2062
aff5e3f8 2063 /* Mode (clock phase/polarity/etc.) */
e0bcb680 2064 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 2065 spi->mode |= SPI_CPHA;
e0bcb680 2066 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 2067 spi->mode |= SPI_CPOL;
e0bcb680 2068 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 2069 spi->mode |= SPI_3WIRE;
e0bcb680 2070 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 2071 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 2072 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW
2073 spi->mode |= SPI_CS_HIGH;
2074
aff5e3f8
PA
2075 /* Device DUAL/QUAD mode */
2076 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
2077 switch (value) {
d962608c
DB
2078 case 0:
2079 spi->mode |= SPI_NO_TX;
2080 break;
aff5e3f8
PA
2081 case 1:
2082 break;
2083 case 2:
2084 spi->mode |= SPI_TX_DUAL;
2085 break;
2086 case 4:
2087 spi->mode |= SPI_TX_QUAD;
2088 break;
6b03061f
YNG
2089 case 8:
2090 spi->mode |= SPI_TX_OCTAL;
2091 break;
aff5e3f8 2092 default:
8caab75f 2093 dev_warn(&ctlr->dev,
aff5e3f8
PA
2094 "spi-tx-bus-width %d not supported\n",
2095 value);
2096 break;
2097 }
2098 }
2099
2100 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
2101 switch (value) {
d962608c
DB
2102 case 0:
2103 spi->mode |= SPI_NO_RX;
2104 break;
aff5e3f8
PA
2105 case 1:
2106 break;
2107 case 2:
2108 spi->mode |= SPI_RX_DUAL;
2109 break;
2110 case 4:
2111 spi->mode |= SPI_RX_QUAD;
2112 break;
6b03061f
YNG
2113 case 8:
2114 spi->mode |= SPI_RX_OCTAL;
2115 break;
aff5e3f8 2116 default:
8caab75f 2117 dev_warn(&ctlr->dev,
aff5e3f8
PA
2118 "spi-rx-bus-width %d not supported\n",
2119 value);
2120 break;
2121 }
2122 }
2123
8caab75f 2124 if (spi_controller_is_slave(ctlr)) {
194276b0 2125 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
2126 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
2127 nc);
6c364062
GU
2128 return -EINVAL;
2129 }
2130 return 0;
2131 }
2132
2133 /* Device address */
2134 rc = of_property_read_u32(nc, "reg", &value);
2135 if (rc) {
25c56c88
RH
2136 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
2137 nc, rc);
6c364062
GU
2138 return rc;
2139 }
2140 spi->chip_select = value;
2141
aff5e3f8 2142 /* Device speed */
671c3bf5
CG
2143 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
2144 spi->max_speed_hz = value;
aff5e3f8 2145
c2e51ac3
GU
2146 return 0;
2147}
2148
2149static struct spi_device *
8caab75f 2150of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
2151{
2152 struct spi_device *spi;
2153 int rc;
2154
2155 /* Alloc an spi_device */
8caab75f 2156 spi = spi_alloc_device(ctlr);
c2e51ac3 2157 if (!spi) {
25c56c88 2158 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
2159 rc = -ENOMEM;
2160 goto err_out;
2161 }
2162
2163 /* Select device driver */
2164 rc = of_modalias_node(nc, spi->modalias,
2165 sizeof(spi->modalias));
2166 if (rc < 0) {
25c56c88 2167 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
2168 goto err_out;
2169 }
2170
8caab75f 2171 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
2172 if (rc)
2173 goto err_out;
2174
aff5e3f8
PA
2175 /* Store a pointer to the node in the device structure */
2176 of_node_get(nc);
2177 spi->dev.of_node = nc;
0e793ba7 2178 spi->dev.fwnode = of_fwnode_handle(nc);
aff5e3f8
PA
2179
2180 /* Register the new device */
aff5e3f8
PA
2181 rc = spi_add_device(spi);
2182 if (rc) {
25c56c88 2183 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2184 goto err_of_node_put;
aff5e3f8
PA
2185 }
2186
2187 return spi;
2188
8324147f
JH
2189err_of_node_put:
2190 of_node_put(nc);
aff5e3f8
PA
2191err_out:
2192 spi_dev_put(spi);
2193 return ERR_PTR(rc);
2194}
2195
d57a4282
GL
2196/**
2197 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2198 * @ctlr: Pointer to spi_controller device
d57a4282 2199 *
6c364062
GU
2200 * Registers an spi_device for each child node of controller node which
2201 * represents a valid SPI slave.
d57a4282 2202 */
8caab75f 2203static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
2204{
2205 struct spi_device *spi;
2206 struct device_node *nc;
d57a4282 2207
8caab75f 2208 if (!ctlr->dev.of_node)
d57a4282
GL
2209 return;
2210
8caab75f 2211 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
2212 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2213 continue;
8caab75f 2214 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2215 if (IS_ERR(spi)) {
8caab75f 2216 dev_warn(&ctlr->dev,
25c56c88 2217 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
2218 of_node_clear_flag(nc, OF_POPULATED);
2219 }
d57a4282
GL
2220 }
2221}
2222#else
8caab75f 2223static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
2224#endif
2225
0c79378c
SR
2226/**
2227 * spi_new_ancillary_device() - Register ancillary SPI device
2228 * @spi: Pointer to the main SPI device registering the ancillary device
2229 * @chip_select: Chip Select of the ancillary device
2230 *
2231 * Register an ancillary SPI device; for example some chips have a chip-select
2232 * for normal device usage and another one for setup/firmware upload.
2233 *
2234 * This may only be called from main SPI device's probe routine.
2235 *
2236 * Return: 0 on success; negative errno on failure
2237 */
2238struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
2239 u8 chip_select)
2240{
2241 struct spi_device *ancillary;
2242 int rc = 0;
2243
2244 /* Alloc an spi_device */
2245 ancillary = spi_alloc_device(spi->controller);
2246 if (!ancillary) {
2247 rc = -ENOMEM;
2248 goto err_out;
2249 }
2250
2251 strlcpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
2252
2253 /* Use provided chip-select for ancillary device */
2254 ancillary->chip_select = chip_select;
2255
2256 /* Take over SPI mode/speed from SPI main device */
2257 ancillary->max_speed_hz = spi->max_speed_hz;
b01d5506 2258 ancillary->mode = spi->mode;
0c79378c
SR
2259
2260 /* Register the new device */
2261 rc = spi_add_device_locked(ancillary);
2262 if (rc) {
2263 dev_err(&spi->dev, "failed to register ancillary device\n");
2264 goto err_out;
2265 }
2266
2267 return ancillary;
2268
2269err_out:
2270 spi_dev_put(ancillary);
2271 return ERR_PTR(rc);
2272}
2273EXPORT_SYMBOL_GPL(spi_new_ancillary_device);
2274
64bee4d2 2275#ifdef CONFIG_ACPI
4c3c5954
AB
2276struct acpi_spi_lookup {
2277 struct spi_controller *ctlr;
2278 u32 max_speed_hz;
2279 u32 mode;
2280 int irq;
2281 u8 bits_per_word;
2282 u8 chip_select;
2283};
2284
2285static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2286 struct acpi_spi_lookup *lookup)
8a2e487e 2287{
8a2e487e
LW
2288 const union acpi_object *obj;
2289
2290 if (!x86_apple_machine)
2291 return;
2292
2293 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2294 && obj->buffer.length >= 4)
4c3c5954 2295 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW
2296
2297 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2298 && obj->buffer.length == 8)
4c3c5954 2299 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW
2300
2301 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2302 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2303 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW
2304
2305 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2306 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2307 lookup->mode |= SPI_CPOL;
8a2e487e
LW
2308
2309 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2310 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2311 lookup->mode |= SPI_CPHA;
8a2e487e
LW
2312}
2313
64bee4d2
MW
2314static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2315{
4c3c5954
AB
2316 struct acpi_spi_lookup *lookup = data;
2317 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW
2318
2319 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2320 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB
2321 acpi_handle parent_handle;
2322 acpi_status status;
64bee4d2
MW
2323
2324 sb = &ares->data.spi_serial_bus;
2325 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954
AB
2326
2327 status = acpi_get_handle(NULL,
2328 sb->resource_source.string_ptr,
2329 &parent_handle);
2330
b5e3cf41 2331 if (ACPI_FAILURE(status) ||
4c3c5954
AB
2332 ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2333 return -ENODEV;
2334
a0a90718
MW
2335 /*
2336 * ACPI DeviceSelection numbering is handled by the
2337 * host controller driver in Windows and can vary
2338 * from driver to driver. In Linux we always expect
2339 * 0 .. max - 1 so we need to ask the driver to
2340 * translate between the two schemes.
2341 */
8caab75f
GU
2342 if (ctlr->fw_translate_cs) {
2343 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
2344 sb->device_selection);
2345 if (cs < 0)
2346 return cs;
4c3c5954 2347 lookup->chip_select = cs;
a0a90718 2348 } else {
4c3c5954 2349 lookup->chip_select = sb->device_selection;
a0a90718
MW
2350 }
2351
4c3c5954 2352 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2353 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW
2354
2355 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2356 lookup->mode |= SPI_CPHA;
64bee4d2 2357 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2358 lookup->mode |= SPI_CPOL;
64bee4d2 2359 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2360 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2361 }
4c3c5954 2362 } else if (lookup->irq < 0) {
64bee4d2
MW
2363 struct resource r;
2364
2365 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2366 lookup->irq = r.start;
64bee4d2
MW
2367 }
2368
2369 /* Always tell the ACPI core to skip this resource */
2370 return 1;
2371}
2372
8caab75f 2373static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 2374 struct acpi_device *adev)
64bee4d2 2375{
4c3c5954 2376 acpi_handle parent_handle = NULL;
64bee4d2 2377 struct list_head resource_list;
b28944c6 2378 struct acpi_spi_lookup lookup = {};
64bee4d2
MW
2379 struct spi_device *spi;
2380 int ret;
2381
7f24467f
OP
2382 if (acpi_bus_get_status(adev) || !adev->status.present ||
2383 acpi_device_enumerated(adev))
64bee4d2
MW
2384 return AE_OK;
2385
4c3c5954 2386 lookup.ctlr = ctlr;
4c3c5954 2387 lookup.irq = -1;
64bee4d2
MW
2388
2389 INIT_LIST_HEAD(&resource_list);
2390 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2391 acpi_spi_add_resource, &lookup);
64bee4d2
MW
2392 acpi_dev_free_resource_list(&resource_list);
2393
4c3c5954
AB
2394 if (ret < 0)
2395 /* found SPI in _CRS but it points to another controller */
2396 return AE_OK;
8a2e487e 2397
4c3c5954 2398 if (!lookup.max_speed_hz &&
10e92724 2399 ACPI_SUCCESS(acpi_get_parent(adev->handle, &parent_handle)) &&
4c3c5954
AB
2400 ACPI_HANDLE(ctlr->dev.parent) == parent_handle) {
2401 /* Apple does not use _CRS but nested devices for SPI slaves */
2402 acpi_spi_parse_apple_properties(adev, &lookup);
2403 }
2404
2405 if (!lookup.max_speed_hz)
64bee4d2 2406 return AE_OK;
4c3c5954
AB
2407
2408 spi = spi_alloc_device(ctlr);
2409 if (!spi) {
2410 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
2411 dev_name(&adev->dev));
2412 return AE_NO_MEMORY;
64bee4d2
MW
2413 }
2414
ea235786 2415
4c3c5954
AB
2416 ACPI_COMPANION_SET(&spi->dev, adev);
2417 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2418 spi->mode |= lookup.mode;
4c3c5954
AB
2419 spi->irq = lookup.irq;
2420 spi->bits_per_word = lookup.bits_per_word;
2421 spi->chip_select = lookup.chip_select;
2422
0c6543f6
DD
2423 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2424 sizeof(spi->modalias));
2425
33ada67d
CR
2426 if (spi->irq < 0)
2427 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2428
7f24467f
OP
2429 acpi_device_set_enumerated(adev);
2430
33cf00e5 2431 adev->power.flags.ignore_parent = true;
64bee4d2 2432 if (spi_add_device(spi)) {
33cf00e5 2433 adev->power.flags.ignore_parent = false;
8caab75f 2434 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
2435 dev_name(&adev->dev));
2436 spi_dev_put(spi);
2437 }
2438
2439 return AE_OK;
2440}
2441
7f24467f
OP
2442static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2443 void *data, void **return_value)
2444{
8caab75f 2445 struct spi_controller *ctlr = data;
7f24467f
OP
2446 struct acpi_device *adev;
2447
2448 if (acpi_bus_get_device(handle, &adev))
2449 return AE_OK;
2450
8caab75f 2451 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
2452}
2453
4c3c5954
AB
2454#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2455
8caab75f 2456static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
2457{
2458 acpi_status status;
2459 acpi_handle handle;
2460
8caab75f 2461 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
2462 if (!handle)
2463 return;
2464
4c3c5954
AB
2465 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2466 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2467 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2468 if (ACPI_FAILURE(status))
8caab75f 2469 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
2470}
2471#else
8caab75f 2472static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
2473#endif /* CONFIG_ACPI */
2474
8caab75f 2475static void spi_controller_release(struct device *dev)
8ae12a0d 2476{
8caab75f 2477 struct spi_controller *ctlr;
8ae12a0d 2478
8caab75f
GU
2479 ctlr = container_of(dev, struct spi_controller, dev);
2480 kfree(ctlr);
8ae12a0d
DB
2481}
2482
2483static struct class spi_master_class = {
2484 .name = "spi_master",
2485 .owner = THIS_MODULE,
8caab75f 2486 .dev_release = spi_controller_release,
eca2ebc7 2487 .dev_groups = spi_master_groups,
8ae12a0d
DB
2488};
2489
6c364062
GU
2490#ifdef CONFIG_SPI_SLAVE
2491/**
2492 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2493 * controller
2494 * @spi: device used for the current transfer
2495 */
2496int spi_slave_abort(struct spi_device *spi)
2497{
8caab75f 2498 struct spi_controller *ctlr = spi->controller;
6c364062 2499
8caab75f
GU
2500 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2501 return ctlr->slave_abort(ctlr);
6c364062
GU
2502
2503 return -ENOTSUPP;
2504}
2505EXPORT_SYMBOL_GPL(spi_slave_abort);
2506
2507static int match_true(struct device *dev, void *data)
2508{
2509 return 1;
2510}
2511
cc8b4659
GU
2512static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2513 char *buf)
6c364062 2514{
8caab75f
GU
2515 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2516 dev);
6c364062
GU
2517 struct device *child;
2518
2519 child = device_find_child(&ctlr->dev, NULL, match_true);
2520 return sprintf(buf, "%s\n",
2521 child ? to_spi_device(child)->modalias : NULL);
2522}
2523
cc8b4659
GU
2524static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2525 const char *buf, size_t count)
6c364062 2526{
8caab75f
GU
2527 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2528 dev);
6c364062
GU
2529 struct spi_device *spi;
2530 struct device *child;
2531 char name[32];
2532 int rc;
2533
2534 rc = sscanf(buf, "%31s", name);
2535 if (rc != 1 || !name[0])
2536 return -EINVAL;
2537
2538 child = device_find_child(&ctlr->dev, NULL, match_true);
2539 if (child) {
2540 /* Remove registered slave */
2541 device_unregister(child);
2542 put_device(child);
2543 }
2544
2545 if (strcmp(name, "(null)")) {
2546 /* Register new slave */
2547 spi = spi_alloc_device(ctlr);
2548 if (!spi)
2549 return -ENOMEM;
2550
2551 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2552
2553 rc = spi_add_device(spi);
2554 if (rc) {
2555 spi_dev_put(spi);
2556 return rc;
2557 }
2558 }
2559
2560 return count;
2561}
2562
cc8b4659 2563static DEVICE_ATTR_RW(slave);
6c364062
GU
2564
2565static struct attribute *spi_slave_attrs[] = {
2566 &dev_attr_slave.attr,
2567 NULL,
2568};
2569
2570static const struct attribute_group spi_slave_group = {
2571 .attrs = spi_slave_attrs,
2572};
2573
2574static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2575 &spi_controller_statistics_group,
6c364062
GU
2576 &spi_slave_group,
2577 NULL,
2578};
2579
2580static struct class spi_slave_class = {
2581 .name = "spi_slave",
2582 .owner = THIS_MODULE,
8caab75f 2583 .dev_release = spi_controller_release,
6c364062
GU
2584 .dev_groups = spi_slave_groups,
2585};
2586#else
2587extern struct class spi_slave_class; /* dummy */
2588#endif
8ae12a0d
DB
2589
2590/**
6c364062 2591 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2592 * @dev: the controller, possibly using the platform_bus
33e34dc6 2593 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW
2594 * memory is in the driver_data field of the returned device, accessible
2595 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2596 * drivers granting DMA access to portions of their private data need to
2597 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU
2598 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2599 * slave (true) controller
33e34dc6 2600 * Context: can sleep
8ae12a0d 2601 *
6c364062 2602 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2603 * only ones directly touching chip registers. It's how they allocate
8caab75f 2604 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2605 *
97d56dc6 2606 * This must be called from context that can sleep.
8ae12a0d 2607 *
6c364062 2608 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
2609 * controller's methods before calling spi_register_controller(); and (after
2610 * errors adding the device) calling spi_controller_put() to prevent a memory
2611 * leak.
97d56dc6 2612 *
6c364062 2613 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2614 */
8caab75f
GU
2615struct spi_controller *__spi_alloc_controller(struct device *dev,
2616 unsigned int size, bool slave)
8ae12a0d 2617{
8caab75f 2618 struct spi_controller *ctlr;
229e6af1 2619 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2620
0c868461
DB
2621 if (!dev)
2622 return NULL;
2623
229e6af1 2624 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2625 if (!ctlr)
8ae12a0d
DB
2626 return NULL;
2627
8caab75f 2628 device_initialize(&ctlr->dev);
16a8e2fb
UKK
2629 INIT_LIST_HEAD(&ctlr->queue);
2630 spin_lock_init(&ctlr->queue_lock);
2631 spin_lock_init(&ctlr->bus_lock_spinlock);
2632 mutex_init(&ctlr->bus_lock_mutex);
2633 mutex_init(&ctlr->io_mutex);
2634 mutex_init(&ctlr->add_lock);
8caab75f
GU
2635 ctlr->bus_num = -1;
2636 ctlr->num_chipselect = 1;
2637 ctlr->slave = slave;
6c364062 2638 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2639 ctlr->dev.class = &spi_slave_class;
6c364062 2640 else
8caab75f
GU
2641 ctlr->dev.class = &spi_master_class;
2642 ctlr->dev.parent = dev;
2643 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2644 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2645
8caab75f 2646 return ctlr;
8ae12a0d 2647}
6c364062 2648EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2649
5e844cc3
LW
2650static void devm_spi_release_controller(struct device *dev, void *ctlr)
2651{
2652 spi_controller_put(*(struct spi_controller **)ctlr);
2653}
2654
2655/**
2656 * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller()
2657 * @dev: physical device of SPI controller
2658 * @size: how much zeroed driver-private data to allocate
2659 * @slave: whether to allocate an SPI master (false) or SPI slave (true)
2660 * Context: can sleep
2661 *
2662 * Allocate an SPI controller and automatically release a reference on it
2663 * when @dev is unbound from its driver. Drivers are thus relieved from
2664 * having to call spi_controller_put().
2665 *
2666 * The arguments to this function are identical to __spi_alloc_controller().
2667 *
2668 * Return: the SPI controller structure on success, else NULL.
2669 */
2670struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
2671 unsigned int size,
2672 bool slave)
2673{
2674 struct spi_controller **ptr, *ctlr;
2675
2676 ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr),
2677 GFP_KERNEL);
2678 if (!ptr)
2679 return NULL;
2680
2681 ctlr = __spi_alloc_controller(dev, size, slave);
2682 if (ctlr) {
794aaf01 2683 ctlr->devm_allocated = true;
5e844cc3
LW
2684 *ptr = ctlr;
2685 devres_add(dev, ptr);
2686 } else {
2687 devres_free(ptr);
2688 }
2689
2690 return ctlr;
2691}
2692EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller);
2693
74317984 2694#ifdef CONFIG_OF
43004f31 2695static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984 2696{
e80beb27 2697 int nb, i, *cs;
8caab75f 2698 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV
2699
2700 if (!np)
2701 return 0;
2702
2703 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2704 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2705
8ec5d84e
AL
2706 /* Return error only for an incorrectly formed cs-gpios property */
2707 if (nb == 0 || nb == -ENOENT)
74317984 2708 return 0;
8ec5d84e
AL
2709 else if (nb < 0)
2710 return nb;
74317984 2711
a86854d0 2712 cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int),
74317984 2713 GFP_KERNEL);
8caab75f 2714 ctlr->cs_gpios = cs;
74317984 2715
8caab75f 2716 if (!ctlr->cs_gpios)
74317984
JCPV
2717 return -ENOMEM;
2718
8caab75f 2719 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2720 cs[i] = -ENOENT;
74317984
JCPV
2721
2722 for (i = 0; i < nb; i++)
2723 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2724
2725 return 0;
2726}
2727#else
43004f31 2728static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984
JCPV
2729{
2730 return 0;
2731}
2732#endif
2733
f3186dd8
LW
2734/**
2735 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2736 * @ctlr: The SPI master to grab GPIO descriptors for
2737 */
2738static int spi_get_gpio_descs(struct spi_controller *ctlr)
2739{
2740 int nb, i;
2741 struct gpio_desc **cs;
2742 struct device *dev = &ctlr->dev;
7d93aecd
GU
2743 unsigned long native_cs_mask = 0;
2744 unsigned int num_cs_gpios = 0;
f3186dd8
LW
2745
2746 nb = gpiod_count(dev, "cs");
31ed8ebc
AS
2747 if (nb < 0) {
2748 /* No GPIOs at all is fine, else return the error */
2749 if (nb == -ENOENT)
2750 return 0;
f3186dd8 2751 return nb;
31ed8ebc
AS
2752 }
2753
2754 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
f3186dd8
LW
2755
2756 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2757 GFP_KERNEL);
2758 if (!cs)
2759 return -ENOMEM;
2760 ctlr->cs_gpiods = cs;
2761
2762 for (i = 0; i < nb; i++) {
2763 /*
2764 * Most chipselects are active low, the inverted
2765 * semantics are handled by special quirks in gpiolib,
2766 * so initializing them GPIOD_OUT_LOW here means
2767 * "unasserted", in most cases this will drive the physical
2768 * line high.
2769 */
2770 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2771 GPIOD_OUT_LOW);
1723fdec
GU
2772 if (IS_ERR(cs[i]))
2773 return PTR_ERR(cs[i]);
f3186dd8
LW
2774
2775 if (cs[i]) {
2776 /*
2777 * If we find a CS GPIO, name it after the device and
2778 * chip select line.
2779 */
2780 char *gpioname;
2781
2782 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2783 dev_name(dev), i);
2784 if (!gpioname)
2785 return -ENOMEM;
2786 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU
2787 num_cs_gpios++;
2788 continue;
f3186dd8 2789 }
7d93aecd
GU
2790
2791 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
2792 dev_err(dev, "Invalid native chip select %d\n", i);
2793 return -EINVAL;
f3186dd8 2794 }
7d93aecd
GU
2795 native_cs_mask |= BIT(i);
2796 }
2797
f60d7270 2798 ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
dbaca8e5
AS
2799
2800 if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
2801 ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
7d93aecd
GU
2802 dev_err(dev, "No unused native chip select available\n");
2803 return -EINVAL;
f3186dd8
LW
2804 }
2805
2806 return 0;
2807}
2808
bdf3a3b5
BB
2809static int spi_controller_check_ops(struct spi_controller *ctlr)
2810{
2811 /*
b5932f5c
BB
2812 * The controller may implement only the high-level SPI-memory like
2813 * operations if it does not support regular SPI transfers, and this is
2814 * valid use case.
2815 * If ->mem_ops is NULL, we request that at least one of the
2816 * ->transfer_xxx() method be implemented.
bdf3a3b5 2817 */
b5932f5c
BB
2818 if (ctlr->mem_ops) {
2819 if (!ctlr->mem_ops->exec_op)
2820 return -EINVAL;
2821 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2822 !ctlr->transfer_one_message) {
bdf3a3b5 2823 return -EINVAL;
b5932f5c 2824 }
bdf3a3b5
BB
2825
2826 return 0;
2827}
2828
8ae12a0d 2829/**
8caab75f
GU
2830 * spi_register_controller - register SPI master or slave controller
2831 * @ctlr: initialized master, originally from spi_alloc_master() or
2832 * spi_alloc_slave()
33e34dc6 2833 * Context: can sleep
8ae12a0d 2834 *
8caab75f 2835 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2836 * such as the platform bus. The final stage of probe() in that code
8caab75f 2837 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2838 *
2839 * SPI controllers use board specific (often SOC specific) bus numbers,
2840 * and board-specific addressing for SPI devices combines those numbers
2841 * with chip select numbers. Since SPI does not directly support dynamic
2842 * device identification, boards need configuration tables telling which
2843 * chip is at which address.
2844 *
2845 * This must be called from context that can sleep. It returns zero on
8caab75f 2846 * success, else a negative error code (dropping the controller's refcount).
0c868461 2847 * After a successful return, the caller is responsible for calling
8caab75f 2848 * spi_unregister_controller().
97d56dc6
JMC
2849 *
2850 * Return: zero on success, else a negative error code.
8ae12a0d 2851 */
8caab75f 2852int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2853{
8caab75f 2854 struct device *dev = ctlr->dev.parent;
2b9603a0 2855 struct boardinfo *bi;
b93318a2 2856 int status;
42bdd706 2857 int id, first_dynamic;
8ae12a0d 2858
0c868461
DB
2859 if (!dev)
2860 return -ENODEV;
2861
bdf3a3b5
BB
2862 /*
2863 * Make sure all necessary hooks are implemented before registering
2864 * the SPI controller.
2865 */
2866 status = spi_controller_check_ops(ctlr);
2867 if (status)
2868 return status;
2869
04b2d03a
GU
2870 if (ctlr->bus_num >= 0) {
2871 /* devices with a fixed bus num must check-in with the num */
2872 mutex_lock(&board_lock);
2873 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2874 ctlr->bus_num + 1, GFP_KERNEL);
2875 mutex_unlock(&board_lock);
2876 if (WARN(id < 0, "couldn't get idr"))
2877 return id == -ENOSPC ? -EBUSY : id;
2878 ctlr->bus_num = id;
2879 } else if (ctlr->dev.of_node) {
2880 /* allocate dynamic bus number using Linux idr */
9b61e302
SM
2881 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2882 if (id >= 0) {
2883 ctlr->bus_num = id;
2884 mutex_lock(&board_lock);
2885 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2886 ctlr->bus_num + 1, GFP_KERNEL);
2887 mutex_unlock(&board_lock);
2888 if (WARN(id < 0, "couldn't get idr"))
2889 return id == -ENOSPC ? -EBUSY : id;
2890 }
2891 }
8caab75f 2892 if (ctlr->bus_num < 0) {
42bdd706
LS
2893 first_dynamic = of_alias_get_highest_id("spi");
2894 if (first_dynamic < 0)
2895 first_dynamic = 0;
2896 else
2897 first_dynamic++;
2898
9a9a047a 2899 mutex_lock(&board_lock);
42bdd706
LS
2900 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2901 0, GFP_KERNEL);
9a9a047a
SM
2902 mutex_unlock(&board_lock);
2903 if (WARN(id < 0, "couldn't get idr"))
2904 return id;
2905 ctlr->bus_num = id;
8ae12a0d 2906 }
8caab75f
GU
2907 ctlr->bus_lock_flag = 0;
2908 init_completion(&ctlr->xfer_completion);
2909 if (!ctlr->max_dma_len)
2910 ctlr->max_dma_len = INT_MAX;
cf32b71e 2911
8ae12a0d
DB
2912 /* register the device, then userspace will see it.
2913 * registration fails if the bus ID is in use.
2914 */
8caab75f 2915 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4
AS
2916
2917 if (!spi_controller_is_slave(ctlr)) {
2918 if (ctlr->use_gpio_descriptors) {
2919 status = spi_get_gpio_descs(ctlr);
2920 if (status)
f9981d4f 2921 goto free_bus_id;
0a919ae4
AS
2922 /*
2923 * A controller using GPIO descriptors always
2924 * supports SPI_CS_HIGH if need be.
2925 */
2926 ctlr->mode_bits |= SPI_CS_HIGH;
2927 } else {
2928 /* Legacy code path for GPIOs from DT */
43004f31 2929 status = of_spi_get_gpio_numbers(ctlr);
0a919ae4 2930 if (status)
f9981d4f 2931 goto free_bus_id;
0a919ae4
AS
2932 }
2933 }
2934
f9481b08
TA
2935 /*
2936 * Even if it's just one always-selected device, there must
2937 * be at least one chipselect.
2938 */
f9981d4f
AK
2939 if (!ctlr->num_chipselect) {
2940 status = -EINVAL;
2941 goto free_bus_id;
2942 }
f9481b08 2943
8caab75f 2944 status = device_add(&ctlr->dev);
f9981d4f
AK
2945 if (status < 0)
2946 goto free_bus_id;
9b61e302 2947 dev_dbg(dev, "registered %s %s\n",
8caab75f 2948 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2949 dev_name(&ctlr->dev));
8ae12a0d 2950
b5932f5c
BB
2951 /*
2952 * If we're using a queued driver, start the queue. Note that we don't
2953 * need the queueing logic if the driver is only supporting high-level
2954 * memory operations.
2955 */
2956 if (ctlr->transfer) {
8caab75f 2957 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 2958 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 2959 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2960 if (status) {
8caab75f 2961 device_del(&ctlr->dev);
f9981d4f 2962 goto free_bus_id;
ffbbdd21
LW
2963 }
2964 }
eca2ebc7 2965 /* add statistics */
8caab75f 2966 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2967
2b9603a0 2968 mutex_lock(&board_lock);
8caab75f 2969 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2970 list_for_each_entry(bi, &board_list, list)
8caab75f 2971 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
2972 mutex_unlock(&board_lock);
2973
64bee4d2 2974 /* Register devices from the device tree and ACPI */
8caab75f
GU
2975 of_register_spi_devices(ctlr);
2976 acpi_register_spi_devices(ctlr);
f9981d4f
AK
2977 return status;
2978
2979free_bus_id:
2980 mutex_lock(&board_lock);
2981 idr_remove(&spi_master_idr, ctlr->bus_num);
2982 mutex_unlock(&board_lock);
8ae12a0d
DB
2983 return status;
2984}
8caab75f 2985EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2986
59ebbe40 2987static void devm_spi_unregister(void *ctlr)
666d5b4c 2988{
59ebbe40 2989 spi_unregister_controller(ctlr);
666d5b4c
MB
2990}
2991
2992/**
8caab75f
GU
2993 * devm_spi_register_controller - register managed SPI master or slave
2994 * controller
2995 * @dev: device managing SPI controller
2996 * @ctlr: initialized controller, originally from spi_alloc_master() or
2997 * spi_alloc_slave()
666d5b4c
MB
2998 * Context: can sleep
2999 *
8caab75f 3000 * Register a SPI device as with spi_register_controller() which will
68b892f1 3001 * automatically be unregistered and freed.
97d56dc6
JMC
3002 *
3003 * Return: zero on success, else a negative error code.
666d5b4c 3004 */
8caab75f
GU
3005int devm_spi_register_controller(struct device *dev,
3006 struct spi_controller *ctlr)
666d5b4c 3007{
666d5b4c
MB
3008 int ret;
3009
8caab75f 3010 ret = spi_register_controller(ctlr);
59ebbe40
TT
3011 if (ret)
3012 return ret;
666d5b4c 3013
59ebbe40 3014 return devm_add_action_or_reset(dev, devm_spi_unregister, ctlr);
666d5b4c 3015}
8caab75f 3016EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 3017
34860089 3018static int __unregister(struct device *dev, void *null)
8ae12a0d 3019{
34860089 3020 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
3021 return 0;
3022}
3023
3024/**
8caab75f
GU
3025 * spi_unregister_controller - unregister SPI master or slave controller
3026 * @ctlr: the controller being unregistered
33e34dc6 3027 * Context: can sleep
8ae12a0d 3028 *
8caab75f 3029 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
3030 * only ones directly touching chip registers.
3031 *
3032 * This must be called from context that can sleep.
68b892f1
JH
3033 *
3034 * Note that this function also drops a reference to the controller.
8ae12a0d 3035 */
8caab75f 3036void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 3037{
9b61e302 3038 struct spi_controller *found;
67f7b278 3039 int id = ctlr->bus_num;
89fc9a1a 3040
ddf75be4
LW
3041 /* Prevent addition of new devices, unregister existing ones */
3042 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3043 mutex_lock(&ctlr->add_lock);
ddf75be4 3044
84855678
LW
3045 device_for_each_child(&ctlr->dev, NULL, __unregister);
3046
9b61e302
SM
3047 /* First make sure that this controller was ever added */
3048 mutex_lock(&board_lock);
67f7b278 3049 found = idr_find(&spi_master_idr, id);
9b61e302 3050 mutex_unlock(&board_lock);
8caab75f
GU
3051 if (ctlr->queued) {
3052 if (spi_destroy_queue(ctlr))
3053 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 3054 }
2b9603a0 3055 mutex_lock(&board_lock);
8caab75f 3056 list_del(&ctlr->list);
2b9603a0
FT
3057 mutex_unlock(&board_lock);
3058
5e844cc3
LW
3059 device_del(&ctlr->dev);
3060
3061 /* Release the last reference on the controller if its driver
3062 * has not yet been converted to devm_spi_alloc_master/slave().
3063 */
794aaf01 3064 if (!ctlr->devm_allocated)
5e844cc3
LW
3065 put_device(&ctlr->dev);
3066
9b61e302
SM
3067 /* free bus id */
3068 mutex_lock(&board_lock);
613bd1ea
JN
3069 if (found == ctlr)
3070 idr_remove(&spi_master_idr, id);
9b61e302 3071 mutex_unlock(&board_lock);
ddf75be4
LW
3072
3073 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3074 mutex_unlock(&ctlr->add_lock);
8ae12a0d 3075}
8caab75f 3076EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 3077
8caab75f 3078int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
3079{
3080 int ret;
3081
8caab75f
GU
3082 /* Basically no-ops for non-queued controllers */
3083 if (!ctlr->queued)
ffbbdd21
LW
3084 return 0;
3085
8caab75f 3086 ret = spi_stop_queue(ctlr);
ffbbdd21 3087 if (ret)
8caab75f 3088 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
3089
3090 return ret;
3091}
8caab75f 3092EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 3093
8caab75f 3094int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
3095{
3096 int ret;
3097
8caab75f 3098 if (!ctlr->queued)
ffbbdd21
LW
3099 return 0;
3100
8caab75f 3101 ret = spi_start_queue(ctlr);
ffbbdd21 3102 if (ret)
8caab75f 3103 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
3104
3105 return ret;
3106}
8caab75f 3107EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 3108
d780c371
MS
3109/*-------------------------------------------------------------------------*/
3110
523baf5a
MS
3111/* Core methods for spi_message alterations */
3112
8caab75f 3113static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
3114 struct spi_message *msg,
3115 void *res)
3116{
3117 struct spi_replaced_transfers *rxfer = res;
3118 size_t i;
3119
3120 /* call extra callback if requested */
3121 if (rxfer->release)
8caab75f 3122 rxfer->release(ctlr, msg, res);
523baf5a
MS
3123
3124 /* insert replaced transfers back into the message */
3125 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
3126
3127 /* remove the formerly inserted entries */
3128 for (i = 0; i < rxfer->inserted; i++)
3129 list_del(&rxfer->inserted_transfers[i].transfer_list);
3130}
3131
3132/**
3133 * spi_replace_transfers - replace transfers with several transfers
3134 * and register change with spi_message.resources
3135 * @msg: the spi_message we work upon
3136 * @xfer_first: the first spi_transfer we want to replace
3137 * @remove: number of transfers to remove
3138 * @insert: the number of transfers we want to insert instead
3139 * @release: extra release code necessary in some circumstances
3140 * @extradatasize: extra data to allocate (with alignment guarantees
3141 * of struct @spi_transfer)
05885397 3142 * @gfp: gfp flags
523baf5a
MS
3143 *
3144 * Returns: pointer to @spi_replaced_transfers,
3145 * PTR_ERR(...) in case of errors.
3146 */
da21fde0 3147static struct spi_replaced_transfers *spi_replace_transfers(
523baf5a
MS
3148 struct spi_message *msg,
3149 struct spi_transfer *xfer_first,
3150 size_t remove,
3151 size_t insert,
3152 spi_replaced_release_t release,
3153 size_t extradatasize,
3154 gfp_t gfp)
3155{
3156 struct spi_replaced_transfers *rxfer;
3157 struct spi_transfer *xfer;
3158 size_t i;
3159
3160 /* allocate the structure using spi_res */
3161 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3162 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS
3163 + extradatasize,
3164 gfp);
3165 if (!rxfer)
3166 return ERR_PTR(-ENOMEM);
3167
3168 /* the release code to invoke before running the generic release */
3169 rxfer->release = release;
3170
3171 /* assign extradata */
3172 if (extradatasize)
3173 rxfer->extradata =
3174 &rxfer->inserted_transfers[insert];
3175
3176 /* init the replaced_transfers list */
3177 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3178
3179 /* assign the list_entry after which we should reinsert
3180 * the @replaced_transfers - it may be spi_message.messages!
3181 */
3182 rxfer->replaced_after = xfer_first->transfer_list.prev;
3183
3184 /* remove the requested number of transfers */
3185 for (i = 0; i < remove; i++) {
3186 /* if the entry after replaced_after it is msg->transfers
3187 * then we have been requested to remove more transfers
3188 * than are in the list
3189 */
3190 if (rxfer->replaced_after->next == &msg->transfers) {
3191 dev_err(&msg->spi->dev,
3192 "requested to remove more spi_transfers than are available\n");
3193 /* insert replaced transfers back into the message */
3194 list_splice(&rxfer->replaced_transfers,
3195 rxfer->replaced_after);
3196
3197 /* free the spi_replace_transfer structure */
3198 spi_res_free(rxfer);
3199
3200 /* and return with an error */
3201 return ERR_PTR(-EINVAL);
3202 }
3203
3204 /* remove the entry after replaced_after from list of
3205 * transfers and add it to list of replaced_transfers
3206 */
3207 list_move_tail(rxfer->replaced_after->next,
3208 &rxfer->replaced_transfers);
3209 }
3210
3211 /* create copy of the given xfer with identical settings
3212 * based on the first transfer to get removed
3213 */
3214 for (i = 0; i < insert; i++) {
3215 /* we need to run in reverse order */
3216 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3217
3218 /* copy all spi_transfer data */
3219 memcpy(xfer, xfer_first, sizeof(*xfer));
3220
3221 /* add to list */
3222 list_add(&xfer->transfer_list, rxfer->replaced_after);
3223
bebcfd27 3224 /* clear cs_change and delay for all but the last */
523baf5a
MS
3225 if (i) {
3226 xfer->cs_change = false;
bebcfd27 3227 xfer->delay.value = 0;
523baf5a
MS
3228 }
3229 }
3230
3231 /* set up inserted */
3232 rxfer->inserted = insert;
3233
3234 /* and register it with spi_res/spi_message */
3235 spi_res_add(msg, rxfer);
3236
3237 return rxfer;
3238}
523baf5a 3239
8caab75f 3240static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
3241 struct spi_message *msg,
3242 struct spi_transfer **xferp,
3243 size_t maxsize,
3244 gfp_t gfp)
d9f12122
MS
3245{
3246 struct spi_transfer *xfer = *xferp, *xfers;
3247 struct spi_replaced_transfers *srt;
3248 size_t offset;
3249 size_t count, i;
3250
d9f12122
MS
3251 /* calculate how many we have to replace */
3252 count = DIV_ROUND_UP(xfer->len, maxsize);
3253
3254 /* create replacement */
3255 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
3256 if (IS_ERR(srt))
3257 return PTR_ERR(srt);
d9f12122
MS
3258 xfers = srt->inserted_transfers;
3259
3260 /* now handle each of those newly inserted spi_transfers
3261 * note that the replacements spi_transfers all are preset
3262 * to the same values as *xferp, so tx_buf, rx_buf and len
3263 * are all identical (as well as most others)
3264 * so we just have to fix up len and the pointers.
3265 *
3266 * this also includes support for the depreciated
3267 * spi_message.is_dma_mapped interface
3268 */
3269
3270 /* the first transfer just needs the length modified, so we
3271 * run it outside the loop
3272 */
c8dab77a 3273 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
3274
3275 /* all the others need rx_buf/tx_buf also set */
3276 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3277 /* update rx_buf, tx_buf and dma */
3278 if (xfers[i].rx_buf)
3279 xfers[i].rx_buf += offset;
3280 if (xfers[i].rx_dma)
3281 xfers[i].rx_dma += offset;
3282 if (xfers[i].tx_buf)
3283 xfers[i].tx_buf += offset;
3284 if (xfers[i].tx_dma)
3285 xfers[i].tx_dma += offset;
3286
3287 /* update length */
3288 xfers[i].len = min(maxsize, xfers[i].len - offset);
3289 }
3290
3291 /* we set up xferp to the last entry we have inserted,
3292 * so that we skip those already split transfers
3293 */
3294 *xferp = &xfers[count - 1];
3295
3296 /* increment statistics counters */
8caab75f 3297 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS
3298 transfers_split_maxsize);
3299 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
3300 transfers_split_maxsize);
3301
3302 return 0;
3303}
3304
3305/**
ce2424d7
MCC
3306 * spi_split_transfers_maxsize - split spi transfers into multiple transfers
3307 * when an individual transfer exceeds a
3308 * certain size
8caab75f 3309 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
3310 * @msg: the @spi_message to transform
3311 * @maxsize: the maximum when to apply this
10f11a22 3312 * @gfp: GFP allocation flags
d9f12122
MS
3313 *
3314 * Return: status of transformation
3315 */
8caab75f 3316int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
3317 struct spi_message *msg,
3318 size_t maxsize,
3319 gfp_t gfp)
3320{
3321 struct spi_transfer *xfer;
3322 int ret;
3323
3324 /* iterate over the transfer_list,
3325 * but note that xfer is advanced to the last transfer inserted
3326 * to avoid checking sizes again unnecessarily (also xfer does
3327 * potentiall belong to a different list by the time the
3328 * replacement has happened
3329 */
3330 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3331 if (xfer->len > maxsize) {
8caab75f
GU
3332 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3333 maxsize, gfp);
d9f12122
MS
3334 if (ret)
3335 return ret;
3336 }
3337 }
3338
3339 return 0;
3340}
3341EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
3342
3343/*-------------------------------------------------------------------------*/
3344
8caab75f 3345/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
3346 * other core methods are currently defined as inline functions.
3347 */
3348
8caab75f
GU
3349static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3350 u8 bits_per_word)
63ab645f 3351{
8caab75f 3352 if (ctlr->bits_per_word_mask) {
63ab645f
SB
3353 /* Only 32 bits fit in the mask */
3354 if (bits_per_word > 32)
3355 return -EINVAL;
8caab75f 3356 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
3357 return -EINVAL;
3358 }
3359
3360 return 0;
3361}
3362
7d077197
DB
3363/**
3364 * spi_setup - setup SPI mode and clock rate
3365 * @spi: the device whose settings are being modified
3366 * Context: can sleep, and no requests are queued to the device
3367 *
3368 * SPI protocol drivers may need to update the transfer mode if the
3369 * device doesn't work with its default. They may likewise need
3370 * to update clock rates or word sizes from initial values. This function
3371 * changes those settings, and must be called from a context that can sleep.
3372 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3373 * effect the next time the device is selected and data is transferred to
3374 * or from it. When this function returns, the spi device is deselected.
3375 *
3376 * Note that this call will fail if the protocol driver specifies an option
3377 * that the underlying controller or its driver does not support. For
3378 * example, not all hardware supports wire transfers using nine bit words,
3379 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
3380 *
3381 * Return: zero on success, else a negative error code.
7d077197
DB
3382 */
3383int spi_setup(struct spi_device *spi)
3384{
83596fbe 3385 unsigned bad_bits, ugly_bits;
5ab8d262 3386 int status;
7d077197 3387
d962608c
DB
3388 /*
3389 * check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
3390 * are set at the same time
f477b7fb 3391 */
d962608c
DB
3392 if ((hweight_long(spi->mode &
3393 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
3394 (hweight_long(spi->mode &
3395 (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
f477b7fb 3396 dev_err(&spi->dev,
d962608c 3397 "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
f477b7fb 3398 return -EINVAL;
3399 }
3400 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
3401 */
3402 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
3403 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3404 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3405 return -EINVAL;
e7db06b5 3406 /* help drivers fail *cleanly* when they need options
8caab75f 3407 * that aren't supported with their current controller
cbaa62e0
DL
3408 * SPI_CS_WORD has a fallback software implementation,
3409 * so it is ignored here.
e7db06b5 3410 */
d962608c
DB
3411 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
3412 SPI_NO_TX | SPI_NO_RX);
d61ad23c
SS
3413 /* nothing prevents from working with active-high CS in case if it
3414 * is driven by GPIO.
3415 */
3416 if (gpio_is_valid(spi->cs_gpio))
3417 bad_bits &= ~SPI_CS_HIGH;
83596fbe 3418 ugly_bits = bad_bits &
6b03061f
YNG
3419 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3420 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
3421 if (ugly_bits) {
3422 dev_warn(&spi->dev,
3423 "setup: ignoring unsupported mode bits %x\n",
3424 ugly_bits);
3425 spi->mode &= ~ugly_bits;
3426 bad_bits &= ~ugly_bits;
3427 }
e7db06b5 3428 if (bad_bits) {
eb288a1f 3429 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
3430 bad_bits);
3431 return -EINVAL;
3432 }
3433
7d077197
DB
3434 if (!spi->bits_per_word)
3435 spi->bits_per_word = 8;
3436
8caab75f
GU
3437 status = __spi_validate_bits_per_word(spi->controller,
3438 spi->bits_per_word);
5ab8d262
AS
3439 if (status)
3440 return status;
63ab645f 3441
6820e812
TA
3442 if (spi->controller->max_speed_hz &&
3443 (!spi->max_speed_hz ||
3444 spi->max_speed_hz > spi->controller->max_speed_hz))
8caab75f 3445 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3446
4fae3a58
SS
3447 mutex_lock(&spi->controller->io_mutex);
3448
c914dbf8 3449 if (spi->controller->setup) {
8caab75f 3450 status = spi->controller->setup(spi);
c914dbf8
JB
3451 if (status) {
3452 mutex_unlock(&spi->controller->io_mutex);
3453 dev_err(&spi->controller->dev, "Failed to setup device: %d\n",
3454 status);
3455 return status;
3456 }
3457 }
7d077197 3458
d948e6ca
LX
3459 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
3460 status = pm_runtime_get_sync(spi->controller->dev.parent);
3461 if (status < 0) {
4fae3a58 3462 mutex_unlock(&spi->controller->io_mutex);
d948e6ca
LX
3463 pm_runtime_put_noidle(spi->controller->dev.parent);
3464 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3465 status);
3466 return status;
3467 }
57a94607
TL
3468
3469 /*
3470 * We do not want to return positive value from pm_runtime_get,
3471 * there are many instances of devices calling spi_setup() and
3472 * checking for a non-zero return value instead of a negative
3473 * return value.
3474 */
3475 status = 0;
3476
d347b4aa 3477 spi_set_cs(spi, false, true);
d948e6ca
LX
3478 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3479 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3480 } else {
d347b4aa 3481 spi_set_cs(spi, false, true);
d948e6ca 3482 }
abeedb01 3483
4fae3a58
SS
3484 mutex_unlock(&spi->controller->io_mutex);
3485
924b5867
DA
3486 if (spi->rt && !spi->controller->rt) {
3487 spi->controller->rt = true;
3488 spi_set_thread_rt(spi->controller);
3489 }
3490
5cb4e1f3
AS
3491 trace_spi_setup(spi, status);
3492
40b82c2d
AS
3493 dev_dbg(&spi->dev, "setup mode %lu, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
3494 spi->mode & SPI_MODE_X_MASK,
7d077197
DB
3495 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3496 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3497 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3498 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3499 spi->bits_per_word, spi->max_speed_hz,
3500 status);
3501
3502 return status;
3503}
3504EXPORT_SYMBOL_GPL(spi_setup);
3505
6c613f68
AA
3506static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3507 struct spi_device *spi)
3508{
3509 int delay1, delay2;
3510
3984d39b 3511 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA
3512 if (delay1 < 0)
3513 return delay1;
3514
3984d39b 3515 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA
3516 if (delay2 < 0)
3517 return delay2;
3518
3519 if (delay1 < delay2)
3520 memcpy(&xfer->word_delay, &spi->word_delay,
3521 sizeof(xfer->word_delay));
3522
3523 return 0;
3524}
3525
90808738 3526static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3527{
8caab75f 3528 struct spi_controller *ctlr = spi->controller;
e6811d1d 3529 struct spi_transfer *xfer;
6ea31293 3530 int w_size;
cf32b71e 3531
24a0013a
MB
3532 if (list_empty(&message->transfers))
3533 return -EINVAL;
24a0013a 3534
cbaa62e0 3535 /* If an SPI controller does not support toggling the CS line on each
71388b21
DL
3536 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3537 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL
3538 * splitting transfers into one-word transfers and ensuring that
3539 * cs_change is set for each transfer.
3540 */
71388b21 3541 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f3186dd8 3542 spi->cs_gpiod ||
71388b21 3543 gpio_is_valid(spi->cs_gpio))) {
cbaa62e0
DL
3544 size_t maxsize;
3545 int ret;
3546
3547 maxsize = (spi->bits_per_word + 7) / 8;
3548
3549 /* spi_split_transfers_maxsize() requires message->spi */
3550 message->spi = spi;
3551
3552 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3553 GFP_KERNEL);
3554 if (ret)
3555 return ret;
3556
3557 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3558 /* don't change cs_change on the last entry in the list */
3559 if (list_is_last(&xfer->transfer_list, &message->transfers))
3560 break;
3561 xfer->cs_change = 1;
3562 }
3563 }
3564
cf32b71e
ES
3565 /* Half-duplex links include original MicroWire, and ones with
3566 * only one data pin like SPI_3WIRE (switches direction) or where
3567 * either MOSI or MISO is missing. They can also be caused by
3568 * software limitations.
3569 */
8caab75f
GU
3570 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3571 (spi->mode & SPI_3WIRE)) {
3572 unsigned flags = ctlr->flags;
cf32b71e
ES
3573
3574 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3575 if (xfer->rx_buf && xfer->tx_buf)
3576 return -EINVAL;
8caab75f 3577 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3578 return -EINVAL;
8caab75f 3579 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
3580 return -EINVAL;
3581 }
3582 }
3583
e6811d1d 3584 /**
059b8ffe
LD
3585 * Set transfer bits_per_word and max speed as spi device default if
3586 * it is not set for this transfer.
f477b7fb 3587 * Set transfer tx_nbits and rx_nbits as single transfer default
3588 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB
3589 * Ensure transfer word_delay is at least as long as that required by
3590 * device itself.
e6811d1d 3591 */
77e80588 3592 message->frame_length = 0;
e6811d1d 3593 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3594 xfer->effective_speed_hz = 0;
078726ce 3595 message->frame_length += xfer->len;
e6811d1d
LD
3596 if (!xfer->bits_per_word)
3597 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
3598
3599 if (!xfer->speed_hz)
059b8ffe 3600 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3601
8caab75f
GU
3602 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3603 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3604
8caab75f 3605 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3606 return -EINVAL;
a2fd4f9f 3607
4d94bd21
II
3608 /*
3609 * SPI transfer length should be multiple of SPI word size
3610 * where SPI word size should be power-of-two multiple
3611 */
3612 if (xfer->bits_per_word <= 8)
3613 w_size = 1;
3614 else if (xfer->bits_per_word <= 16)
3615 w_size = 2;
3616 else
3617 w_size = 4;
3618
4d94bd21 3619 /* No partial transfers accepted */
6ea31293 3620 if (xfer->len % w_size)
4d94bd21
II
3621 return -EINVAL;
3622
8caab75f
GU
3623 if (xfer->speed_hz && ctlr->min_speed_hz &&
3624 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3625 return -EINVAL;
f477b7fb 3626
3627 if (xfer->tx_buf && !xfer->tx_nbits)
3628 xfer->tx_nbits = SPI_NBITS_SINGLE;
3629 if (xfer->rx_buf && !xfer->rx_nbits)
3630 xfer->rx_nbits = SPI_NBITS_SINGLE;
3631 /* check transfer tx/rx_nbits:
1afd9989
GU
3632 * 1. check the value matches one of single, dual and quad
3633 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3634 */
db90a441 3635 if (xfer->tx_buf) {
d962608c
DB
3636 if (spi->mode & SPI_NO_TX)
3637 return -EINVAL;
db90a441
SP
3638 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3639 xfer->tx_nbits != SPI_NBITS_DUAL &&
3640 xfer->tx_nbits != SPI_NBITS_QUAD)
3641 return -EINVAL;
3642 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3643 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3644 return -EINVAL;
3645 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3646 !(spi->mode & SPI_TX_QUAD))
3647 return -EINVAL;
db90a441 3648 }
f477b7fb 3649 /* check transfer rx_nbits */
db90a441 3650 if (xfer->rx_buf) {
d962608c
DB
3651 if (spi->mode & SPI_NO_RX)
3652 return -EINVAL;
db90a441
SP
3653 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3654 xfer->rx_nbits != SPI_NBITS_DUAL &&
3655 xfer->rx_nbits != SPI_NBITS_QUAD)
3656 return -EINVAL;
3657 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3658 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3659 return -EINVAL;
3660 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3661 !(spi->mode & SPI_RX_QUAD))
3662 return -EINVAL;
db90a441 3663 }
b7bb367a 3664
6c613f68
AA
3665 if (_spi_xfer_word_delay_update(xfer, spi))
3666 return -EINVAL;
e6811d1d
LD
3667 }
3668
cf32b71e 3669 message->status = -EINPROGRESS;
90808738
MB
3670
3671 return 0;
3672}
3673
3674static int __spi_async(struct spi_device *spi, struct spi_message *message)
3675{
8caab75f 3676 struct spi_controller *ctlr = spi->controller;
b42faeee 3677 struct spi_transfer *xfer;
90808738 3678
b5932f5c
BB
3679 /*
3680 * Some controllers do not support doing regular SPI transfers. Return
3681 * ENOTSUPP when this is the case.
3682 */
3683 if (!ctlr->transfer)
3684 return -ENOTSUPP;
3685
90808738
MB
3686 message->spi = spi;
3687
8caab75f 3688 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS
3689 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
3690
90808738
MB
3691 trace_spi_message_submit(message);
3692
b42faeee
VO
3693 if (!ctlr->ptp_sts_supported) {
3694 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3695 xfer->ptp_sts_word_pre = 0;
3696 ptp_read_system_prets(xfer->ptp_sts);
3697 }
3698 }
3699
8caab75f 3700 return ctlr->transfer(spi, message);
cf32b71e
ES
3701}
3702
568d0697
DB
3703/**
3704 * spi_async - asynchronous SPI transfer
3705 * @spi: device with which data will be exchanged
3706 * @message: describes the data transfers, including completion callback
3707 * Context: any (irqs may be blocked, etc)
3708 *
3709 * This call may be used in_irq and other contexts which can't sleep,
3710 * as well as from task contexts which can sleep.
3711 *
3712 * The completion callback is invoked in a context which can't sleep.
3713 * Before that invocation, the value of message->status is undefined.
3714 * When the callback is issued, message->status holds either zero (to
3715 * indicate complete success) or a negative error code. After that
3716 * callback returns, the driver which issued the transfer request may
3717 * deallocate the associated memory; it's no longer in use by any SPI
3718 * core or controller driver code.
3719 *
3720 * Note that although all messages to a spi_device are handled in
3721 * FIFO order, messages may go to different devices in other orders.
3722 * Some device might be higher priority, or have various "hard" access
3723 * time requirements, for example.
3724 *
3725 * On detection of any fault during the transfer, processing of
3726 * the entire message is aborted, and the device is deselected.
3727 * Until returning from the associated message completion callback,
3728 * no other spi_message queued to that device will be processed.
3729 * (This rule applies equally to all the synchronous transfer calls,
3730 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3731 *
3732 * Return: zero on success, else a negative error code.
568d0697
DB
3733 */
3734int spi_async(struct spi_device *spi, struct spi_message *message)
3735{
8caab75f 3736 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3737 int ret;
3738 unsigned long flags;
568d0697 3739
90808738
MB
3740 ret = __spi_validate(spi, message);
3741 if (ret != 0)
3742 return ret;
3743
8caab75f 3744 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3745
8caab75f 3746 if (ctlr->bus_lock_flag)
cf32b71e
ES
3747 ret = -EBUSY;
3748 else
3749 ret = __spi_async(spi, message);
568d0697 3750
8caab75f 3751 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3752
3753 return ret;
568d0697
DB
3754}
3755EXPORT_SYMBOL_GPL(spi_async);
3756
cf32b71e
ES
3757/**
3758 * spi_async_locked - version of spi_async with exclusive bus usage
3759 * @spi: device with which data will be exchanged
3760 * @message: describes the data transfers, including completion callback
3761 * Context: any (irqs may be blocked, etc)
3762 *
3763 * This call may be used in_irq and other contexts which can't sleep,
3764 * as well as from task contexts which can sleep.
3765 *
3766 * The completion callback is invoked in a context which can't sleep.
3767 * Before that invocation, the value of message->status is undefined.
3768 * When the callback is issued, message->status holds either zero (to
3769 * indicate complete success) or a negative error code. After that
3770 * callback returns, the driver which issued the transfer request may
3771 * deallocate the associated memory; it's no longer in use by any SPI
3772 * core or controller driver code.
3773 *
3774 * Note that although all messages to a spi_device are handled in
3775 * FIFO order, messages may go to different devices in other orders.
3776 * Some device might be higher priority, or have various "hard" access
3777 * time requirements, for example.
3778 *
3779 * On detection of any fault during the transfer, processing of
3780 * the entire message is aborted, and the device is deselected.
3781 * Until returning from the associated message completion callback,
3782 * no other spi_message queued to that device will be processed.
3783 * (This rule applies equally to all the synchronous transfer calls,
3784 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3785 *
3786 * Return: zero on success, else a negative error code.
cf32b71e 3787 */
da21fde0 3788static int spi_async_locked(struct spi_device *spi, struct spi_message *message)
cf32b71e 3789{
8caab75f 3790 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3791 int ret;
3792 unsigned long flags;
3793
90808738
MB
3794 ret = __spi_validate(spi, message);
3795 if (ret != 0)
3796 return ret;
3797
8caab75f 3798 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3799
3800 ret = __spi_async(spi, message);
3801
8caab75f 3802 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3803
3804 return ret;
3805
3806}
cf32b71e 3807
7d077197
DB
3808/*-------------------------------------------------------------------------*/
3809
8caab75f 3810/* Utility methods for SPI protocol drivers, layered on
7d077197
DB
3811 * top of the core. Some other utility methods are defined as
3812 * inline functions.
3813 */
3814
5d870c8e
AM
3815static void spi_complete(void *arg)
3816{
3817 complete(arg);
3818}
3819
ef4d96ec 3820static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
3821{
3822 DECLARE_COMPLETION_ONSTACK(done);
3823 int status;
8caab75f 3824 struct spi_controller *ctlr = spi->controller;
0461a414
MB
3825 unsigned long flags;
3826
3827 status = __spi_validate(spi, message);
3828 if (status != 0)
3829 return status;
cf32b71e
ES
3830
3831 message->complete = spi_complete;
3832 message->context = &done;
0461a414 3833 message->spi = spi;
cf32b71e 3834
8caab75f 3835 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS
3836 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3837
0461a414
MB
3838 /* If we're not using the legacy transfer method then we will
3839 * try to transfer in the calling context so special case.
3840 * This code would be less tricky if we could remove the
3841 * support for driver implemented message queues.
3842 */
8caab75f
GU
3843 if (ctlr->transfer == spi_queued_transfer) {
3844 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3845
3846 trace_spi_message_submit(message);
3847
3848 status = __spi_queued_transfer(spi, message, false);
3849
8caab75f 3850 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3851 } else {
3852 status = spi_async_locked(spi, message);
3853 }
cf32b71e 3854
cf32b71e 3855 if (status == 0) {
0461a414
MB
3856 /* Push out the messages in the calling context if we
3857 * can.
3858 */
8caab75f
GU
3859 if (ctlr->transfer == spi_queued_transfer) {
3860 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS
3861 spi_sync_immediate);
3862 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3863 spi_sync_immediate);
8caab75f 3864 __spi_pump_messages(ctlr, false);
eca2ebc7 3865 }
0461a414 3866
cf32b71e
ES
3867 wait_for_completion(&done);
3868 status = message->status;
3869 }
3870 message->context = NULL;
3871 return status;
3872}
3873
8ae12a0d
DB
3874/**
3875 * spi_sync - blocking/synchronous SPI data transfers
3876 * @spi: device with which data will be exchanged
3877 * @message: describes the data transfers
33e34dc6 3878 * Context: can sleep
8ae12a0d
DB
3879 *
3880 * This call may only be used from a context that may sleep. The sleep
3881 * is non-interruptible, and has no timeout. Low-overhead controller
3882 * drivers may DMA directly into and out of the message buffers.
3883 *
3884 * Note that the SPI device's chip select is active during the message,
3885 * and then is normally disabled between messages. Drivers for some
3886 * frequently-used devices may want to minimize costs of selecting a chip,
3887 * by leaving it selected in anticipation that the next message will go
3888 * to the same chip. (That may increase power usage.)
3889 *
0c868461
DB
3890 * Also, the caller is guaranteeing that the memory associated with the
3891 * message will not be freed before this call returns.
3892 *
97d56dc6 3893 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3894 */
3895int spi_sync(struct spi_device *spi, struct spi_message *message)
3896{
ef4d96ec
MB
3897 int ret;
3898
8caab75f 3899 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3900 ret = __spi_sync(spi, message);
8caab75f 3901 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
3902
3903 return ret;
8ae12a0d
DB
3904}
3905EXPORT_SYMBOL_GPL(spi_sync);
3906
cf32b71e
ES
3907/**
3908 * spi_sync_locked - version of spi_sync with exclusive bus usage
3909 * @spi: device with which data will be exchanged
3910 * @message: describes the data transfers
3911 * Context: can sleep
3912 *
3913 * This call may only be used from a context that may sleep. The sleep
3914 * is non-interruptible, and has no timeout. Low-overhead controller
3915 * drivers may DMA directly into and out of the message buffers.
3916 *
3917 * This call should be used by drivers that require exclusive access to the
25985edc 3918 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
3919 * be released by a spi_bus_unlock call when the exclusive access is over.
3920 *
97d56dc6 3921 * Return: zero on success, else a negative error code.
cf32b71e
ES
3922 */
3923int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3924{
ef4d96ec 3925 return __spi_sync(spi, message);
cf32b71e
ES
3926}
3927EXPORT_SYMBOL_GPL(spi_sync_locked);
3928
3929/**
3930 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3931 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
3932 * Context: can sleep
3933 *
3934 * This call may only be used from a context that may sleep. The sleep
3935 * is non-interruptible, and has no timeout.
3936 *
3937 * This call should be used by drivers that require exclusive access to the
3938 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3939 * exclusive access is over. Data transfer must be done by spi_sync_locked
3940 * and spi_async_locked calls when the SPI bus lock is held.
3941 *
97d56dc6 3942 * Return: always zero.
cf32b71e 3943 */
8caab75f 3944int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
3945{
3946 unsigned long flags;
3947
8caab75f 3948 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3949
8caab75f
GU
3950 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3951 ctlr->bus_lock_flag = 1;
3952 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3953
3954 /* mutex remains locked until spi_bus_unlock is called */
3955
3956 return 0;
3957}
3958EXPORT_SYMBOL_GPL(spi_bus_lock);
3959
3960/**
3961 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3962 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
3963 * Context: can sleep
3964 *
3965 * This call may only be used from a context that may sleep. The sleep
3966 * is non-interruptible, and has no timeout.
3967 *
3968 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3969 * call.
3970 *
97d56dc6 3971 * Return: always zero.
cf32b71e 3972 */
8caab75f 3973int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3974{
8caab75f 3975 ctlr->bus_lock_flag = 0;
cf32b71e 3976
8caab75f 3977 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
3978
3979 return 0;
3980}
3981EXPORT_SYMBOL_GPL(spi_bus_unlock);
3982
a9948b61 3983/* portable code must never pass more than 32 bytes */
5fe5f05e 3984#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
3985
3986static u8 *buf;
3987
3988/**
3989 * spi_write_then_read - SPI synchronous write followed by read
3990 * @spi: device with which data will be exchanged
3991 * @txbuf: data to be written (need not be dma-safe)
3992 * @n_tx: size of txbuf, in bytes
27570497
JP
3993 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3994 * @n_rx: size of rxbuf, in bytes
33e34dc6 3995 * Context: can sleep
8ae12a0d
DB
3996 *
3997 * This performs a half duplex MicroWire style transaction with the
3998 * device, sending txbuf and then reading rxbuf. The return value
3999 * is zero for success, else a negative errno status code.
b885244e 4000 * This call may only be used from a context that may sleep.
8ae12a0d 4001 *
c373643b 4002 * Parameters to this routine are always copied using a small buffer.
33e34dc6 4003 * Performance-sensitive or bulk transfer code should instead use
0c868461 4004 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
4005 *
4006 * Return: zero on success, else a negative error code.
8ae12a0d
DB
4007 */
4008int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
4009 const void *txbuf, unsigned n_tx,
4010 void *rxbuf, unsigned n_rx)
8ae12a0d 4011{
068f4070 4012 static DEFINE_MUTEX(lock);
8ae12a0d
DB
4013
4014 int status;
4015 struct spi_message message;
bdff549e 4016 struct spi_transfer x[2];
8ae12a0d
DB
4017 u8 *local_buf;
4018
b3a223ee
MB
4019 /* Use preallocated DMA-safe buffer if we can. We can't avoid
4020 * copying here, (as a pure convenience thing), but we can
4021 * keep heap costs out of the hot path unless someone else is
4022 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 4023 */
b3a223ee 4024 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
4025 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
4026 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
4027 if (!local_buf)
4028 return -ENOMEM;
4029 } else {
4030 local_buf = buf;
4031 }
8ae12a0d 4032
8275c642 4033 spi_message_init(&message);
5fe5f05e 4034 memset(x, 0, sizeof(x));
bdff549e
DB
4035 if (n_tx) {
4036 x[0].len = n_tx;
4037 spi_message_add_tail(&x[0], &message);
4038 }
4039 if (n_rx) {
4040 x[1].len = n_rx;
4041 spi_message_add_tail(&x[1], &message);
4042 }
8275c642 4043
8ae12a0d 4044 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
4045 x[0].tx_buf = local_buf;
4046 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
4047
4048 /* do the i/o */
8ae12a0d 4049 status = spi_sync(spi, &message);
9b938b74 4050 if (status == 0)
bdff549e 4051 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 4052
bdff549e 4053 if (x[0].tx_buf == buf)
068f4070 4054 mutex_unlock(&lock);
8ae12a0d
DB
4055 else
4056 kfree(local_buf);
4057
4058 return status;
4059}
4060EXPORT_SYMBOL_GPL(spi_write_then_read);
4061
4062/*-------------------------------------------------------------------------*/
4063
da21fde0 4064#if IS_ENABLED(CONFIG_OF_DYNAMIC)
ce79d54a 4065/* must call put_device() when done with returned spi_device device */
da21fde0 4066static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 4067{
cfba5de9
SP
4068 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
4069
ce79d54a
PA
4070 return dev ? to_spi_device(dev) : NULL;
4071}
4072
8caab75f
GU
4073/* the spi controllers are not using spi_bus, so we find it with another way */
4074static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
4075{
4076 struct device *dev;
4077
cfba5de9 4078 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 4079 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 4080 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA
4081 if (!dev)
4082 return NULL;
4083
4084 /* reference got in class_find_device */
8caab75f 4085 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
4086}
4087
4088static int of_spi_notify(struct notifier_block *nb, unsigned long action,
4089 void *arg)
4090{
4091 struct of_reconfig_data *rd = arg;
8caab75f 4092 struct spi_controller *ctlr;
ce79d54a
PA
4093 struct spi_device *spi;
4094
4095 switch (of_reconfig_get_state_change(action, arg)) {
4096 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
4097 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
4098 if (ctlr == NULL)
ce79d54a
PA
4099 return NOTIFY_OK; /* not for us */
4100
bd6c1644 4101 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 4102 put_device(&ctlr->dev);
bd6c1644
GU
4103 return NOTIFY_OK;
4104 }
4105
8caab75f
GU
4106 spi = of_register_spi_device(ctlr, rd->dn);
4107 put_device(&ctlr->dev);
ce79d54a
PA
4108
4109 if (IS_ERR(spi)) {
25c56c88
RH
4110 pr_err("%s: failed to create for '%pOF'\n",
4111 __func__, rd->dn);
e0af98a7 4112 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
4113 return notifier_from_errno(PTR_ERR(spi));
4114 }
4115 break;
4116
4117 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
4118 /* already depopulated? */
4119 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4120 return NOTIFY_OK;
4121
ce79d54a
PA
4122 /* find our device by node */
4123 spi = of_find_spi_device_by_node(rd->dn);
4124 if (spi == NULL)
4125 return NOTIFY_OK; /* no? not meant for us */
4126
4127 /* unregister takes one ref away */
4128 spi_unregister_device(spi);
4129
4130 /* and put the reference of the find */
4131 put_device(&spi->dev);
4132 break;
4133 }
4134
4135 return NOTIFY_OK;
4136}
4137
4138static struct notifier_block spi_of_notifier = {
4139 .notifier_call = of_spi_notify,
4140};
4141#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4142extern struct notifier_block spi_of_notifier;
4143#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4144
7f24467f 4145#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4146static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
4147{
4148 return ACPI_COMPANION(dev->parent) == data;
4149}
4150
8caab75f 4151static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
4152{
4153 struct device *dev;
4154
4155 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4156 spi_acpi_controller_match);
6c364062
GU
4157 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4158 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4159 spi_acpi_controller_match);
7f24467f
OP
4160 if (!dev)
4161 return NULL;
4162
8caab75f 4163 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
4164}
4165
4166static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4167{
4168 struct device *dev;
4169
00500147 4170 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4171 return to_spi_device(dev);
7f24467f
OP
4172}
4173
4174static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4175 void *arg)
4176{
4177 struct acpi_device *adev = arg;
8caab75f 4178 struct spi_controller *ctlr;
7f24467f
OP
4179 struct spi_device *spi;
4180
4181 switch (value) {
4182 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
4183 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4184 if (!ctlr)
7f24467f
OP
4185 break;
4186
8caab75f
GU
4187 acpi_register_spi_device(ctlr, adev);
4188 put_device(&ctlr->dev);
7f24467f
OP
4189 break;
4190 case ACPI_RECONFIG_DEVICE_REMOVE:
4191 if (!acpi_device_enumerated(adev))
4192 break;
4193
4194 spi = acpi_spi_find_device_by_adev(adev);
4195 if (!spi)
4196 break;
4197
4198 spi_unregister_device(spi);
4199 put_device(&spi->dev);
4200 break;
4201 }
4202
4203 return NOTIFY_OK;
4204}
4205
4206static struct notifier_block spi_acpi_notifier = {
4207 .notifier_call = acpi_spi_notify,
4208};
4209#else
4210extern struct notifier_block spi_acpi_notifier;
4211#endif
4212
8ae12a0d
DB
4213static int __init spi_init(void)
4214{
b885244e
DB
4215 int status;
4216
e94b1766 4217 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
4218 if (!buf) {
4219 status = -ENOMEM;
4220 goto err0;
4221 }
4222
4223 status = bus_register(&spi_bus_type);
4224 if (status < 0)
4225 goto err1;
8ae12a0d 4226
b885244e
DB
4227 status = class_register(&spi_master_class);
4228 if (status < 0)
4229 goto err2;
ce79d54a 4230
6c364062
GU
4231 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4232 status = class_register(&spi_slave_class);
4233 if (status < 0)
4234 goto err3;
4235 }
4236
5267720e 4237 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4238 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
4239 if (IS_ENABLED(CONFIG_ACPI))
4240 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4241
8ae12a0d 4242 return 0;
b885244e 4243
6c364062
GU
4244err3:
4245 class_unregister(&spi_master_class);
b885244e
DB
4246err2:
4247 bus_unregister(&spi_bus_type);
4248err1:
4249 kfree(buf);
4250 buf = NULL;
4251err0:
4252 return status;
8ae12a0d 4253}
b885244e 4254
8ae12a0d
DB
4255/* board_info is normally registered in arch_initcall(),
4256 * but even essential drivers wait till later
b885244e
DB
4257 *
4258 * REVISIT only boardinfo really needs static linking. the rest (device and
4259 * driver registration) _could_ be dynamically linked (modular) ... costs
4260 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4261 */
673c0c00 4262postcore_initcall(spi_init);