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spi: pxa2xx: Add missed security checks
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB		 2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB		 7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB		 11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
74317984 21#include <linux/of_gpio.h>
f3186dd8 22#include <linux/gpio/consumer.h>
3ae22e8c 23#include <linux/pm_runtime.h>
f48c767c 24#include <linux/pm_domain.h>
826cf175 25#include <linux/property.h>
025ed130 26#include <linux/export.h>
8bd75c77 27#include <linux/sched/rt.h>
ae7e81c0 28#include <uapi/linux/sched/types.h>
ffbbdd21
LW		 29#include <linux/delay.h>
30#include <linux/kthread.h>
64bee4d2
MW		 31#include <linux/ioport.h>
32#include <linux/acpi.h>
b1b8153c 33#include <linux/highmem.h>
9b61e302 34#include <linux/idr.h>
8a2e487e 35#include <linux/platform_data/x86/apple.h>
8ae12a0d 36
56ec1978
MB		 37#define CREATE_TRACE_POINTS
38#include <trace/events/spi.h>
ca1438dc
AB		 39EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 41
46336966
BB		 42#include "internals.h"
43
9b61e302 44static DEFINE_IDR(spi_master_idr);
56ec1978 45
8ae12a0d
DB		 46static void spidev_release(struct device *dev)
47{
0ffa0285 48 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 49
8caab75f
GU		 50 /* spi controllers may cleanup for released devices */
51 if (spi->controller->cleanup)
52 spi->controller->cleanup(spi);
8ae12a0d 53
8caab75f 54 spi_controller_put(spi->controller);
5039563e 55 kfree(spi->driver_override);
07a389fe 56 kfree(spi);
8ae12a0d
DB		 57}
58
59static ssize_t
60modalias_show(struct device *dev, struct device_attribute *a, char *buf)
61{
62 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 63 int len;
64
65 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
66 if (len != -ENODEV)
67 return len;
8ae12a0d 68
d8e328b3 69 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 70}
aa7da564 71static DEVICE_ATTR_RO(modalias);
8ae12a0d 72
5039563e
TP		 73static ssize_t driver_override_store(struct device *dev,
74 struct device_attribute *a,
75 const char *buf, size_t count)
76{
77 struct spi_device *spi = to_spi_device(dev);
78 const char *end = memchr(buf, '\n', count);
79 const size_t len = end ? end - buf : count;
80 const char *driver_override, *old;
81
82 /* We need to keep extra room for a newline when displaying value */
83 if (len >= (PAGE_SIZE - 1))
84 return -EINVAL;
85
86 driver_override = kstrndup(buf, len, GFP_KERNEL);
87 if (!driver_override)
88 return -ENOMEM;
89
90 device_lock(dev);
91 old = spi->driver_override;
92 if (len) {
93 spi->driver_override = driver_override;
94 } else {
be73e323 95 /* Empty string, disable driver override */
5039563e
TP		 96 spi->driver_override = NULL;
97 kfree(driver_override);
98 }
99 device_unlock(dev);
100 kfree(old);
101
102 return count;
103}
104
105static ssize_t driver_override_show(struct device *dev,
106 struct device_attribute *a, char *buf)
107{
108 const struct spi_device *spi = to_spi_device(dev);
109 ssize_t len;
110
111 device_lock(dev);
112 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
113 device_unlock(dev);
114 return len;
115}
116static DEVICE_ATTR_RW(driver_override);
117
eca2ebc7 118#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU		 119static ssize_t spi_controller_##field##_show(struct device *dev, \
120 struct device_attribute *attr, \
121 char *buf) \
eca2ebc7 122{ \
8caab75f
GU		 123 struct spi_controller *ctlr = container_of(dev, \
124 struct spi_controller, dev); \
125 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 126} \
8caab75f 127static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 128 .attr = { .name = file, .mode = 0444 }, \
8caab75f 129 .show = spi_controller_##field##_show, \
eca2ebc7
MS		 130}; \
131static ssize_t spi_device_##field##_show(struct device *dev, \
132 struct device_attribute *attr, \
133 char *buf) \
134{ \
d1eba93b 135 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS		 136 return spi_statistics_##field##_show(&spi->statistics, buf); \
137} \
138static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 139 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS		 140 .show = spi_device_##field##_show, \
141}
142
143#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
144static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
145 char *buf) \
146{ \
147 unsigned long flags; \
148 ssize_t len; \
149 spin_lock_irqsave(&stat->lock, flags); \
150 len = sprintf(buf, format_string, stat->field); \
151 spin_unlock_irqrestore(&stat->lock, flags); \
152 return len; \
153} \
154SPI_STATISTICS_ATTRS(name, file)
155
156#define SPI_STATISTICS_SHOW(field, format_string) \
157 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
158 field, format_string)
159
160SPI_STATISTICS_SHOW(messages, "%lu");
161SPI_STATISTICS_SHOW(transfers, "%lu");
162SPI_STATISTICS_SHOW(errors, "%lu");
163SPI_STATISTICS_SHOW(timedout, "%lu");
164
165SPI_STATISTICS_SHOW(spi_sync, "%lu");
166SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
167SPI_STATISTICS_SHOW(spi_async, "%lu");
168
169SPI_STATISTICS_SHOW(bytes, "%llu");
170SPI_STATISTICS_SHOW(bytes_rx, "%llu");
171SPI_STATISTICS_SHOW(bytes_tx, "%llu");
172
6b7bc061
MS		 173#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
174 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
175 "transfer_bytes_histo_" number, \
176 transfer_bytes_histo[index], "%lu")
177SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
178SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
179SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
180SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
181SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
182SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
183SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
184SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
185SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
186SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
187SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
188SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
189SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
190SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
191SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
192SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
193SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
194
d9f12122
MS		 195SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
196
aa7da564
GKH		 197static struct attribute *spi_dev_attrs[] = {
198 &dev_attr_modalias.attr,
5039563e 199 &dev_attr_driver_override.attr,
aa7da564 200 NULL,
8ae12a0d 201};
eca2ebc7
MS		 202
203static const struct attribute_group spi_dev_group = {
204 .attrs = spi_dev_attrs,
205};
206
207static struct attribute *spi_device_statistics_attrs[] = {
208 &dev_attr_spi_device_messages.attr,
209 &dev_attr_spi_device_transfers.attr,
210 &dev_attr_spi_device_errors.attr,
211 &dev_attr_spi_device_timedout.attr,
212 &dev_attr_spi_device_spi_sync.attr,
213 &dev_attr_spi_device_spi_sync_immediate.attr,
214 &dev_attr_spi_device_spi_async.attr,
215 &dev_attr_spi_device_bytes.attr,
216 &dev_attr_spi_device_bytes_rx.attr,
217 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS		 218 &dev_attr_spi_device_transfer_bytes_histo0.attr,
219 &dev_attr_spi_device_transfer_bytes_histo1.attr,
220 &dev_attr_spi_device_transfer_bytes_histo2.attr,
221 &dev_attr_spi_device_transfer_bytes_histo3.attr,
222 &dev_attr_spi_device_transfer_bytes_histo4.attr,
223 &dev_attr_spi_device_transfer_bytes_histo5.attr,
224 &dev_attr_spi_device_transfer_bytes_histo6.attr,
225 &dev_attr_spi_device_transfer_bytes_histo7.attr,
226 &dev_attr_spi_device_transfer_bytes_histo8.attr,
227 &dev_attr_spi_device_transfer_bytes_histo9.attr,
228 &dev_attr_spi_device_transfer_bytes_histo10.attr,
229 &dev_attr_spi_device_transfer_bytes_histo11.attr,
230 &dev_attr_spi_device_transfer_bytes_histo12.attr,
231 &dev_attr_spi_device_transfer_bytes_histo13.attr,
232 &dev_attr_spi_device_transfer_bytes_histo14.attr,
233 &dev_attr_spi_device_transfer_bytes_histo15.attr,
234 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 235 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS		 236 NULL,
237};
238
239static const struct attribute_group spi_device_statistics_group = {
240 .name = "statistics",
241 .attrs = spi_device_statistics_attrs,
242};
243
244static const struct attribute_group *spi_dev_groups[] = {
245 &spi_dev_group,
246 &spi_device_statistics_group,
247 NULL,
248};
249
8caab75f
GU		 250static struct attribute *spi_controller_statistics_attrs[] = {
251 &dev_attr_spi_controller_messages.attr,
252 &dev_attr_spi_controller_transfers.attr,
253 &dev_attr_spi_controller_errors.attr,
254 &dev_attr_spi_controller_timedout.attr,
255 &dev_attr_spi_controller_spi_sync.attr,
256 &dev_attr_spi_controller_spi_sync_immediate.attr,
257 &dev_attr_spi_controller_spi_async.attr,
258 &dev_attr_spi_controller_bytes.attr,
259 &dev_attr_spi_controller_bytes_rx.attr,
260 &dev_attr_spi_controller_bytes_tx.attr,
261 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
262 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
263 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
264 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
265 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
266 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
267 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
268 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
269 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
270 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
271 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
272 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
273 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
274 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
275 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
276 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
277 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
278 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS		 279 NULL,
280};
281
8caab75f 282static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 283 .name = "statistics",
8caab75f 284 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS		 285};
286
287static const struct attribute_group *spi_master_groups[] = {
8caab75f 288 &spi_controller_statistics_group,
eca2ebc7
MS		 289 NULL,
290};
291
292void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
293 struct spi_transfer *xfer,
8caab75f 294 struct spi_controller *ctlr)
eca2ebc7
MS		 295{
296 unsigned long flags;
6b7bc061
MS		 297 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
298
299 if (l2len < 0)
300 l2len = 0;
eca2ebc7
MS		 301
302 spin_lock_irqsave(&stats->lock, flags);
303
304 stats->transfers++;
6b7bc061 305 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS		 306
307 stats->bytes += xfer->len;
308 if ((xfer->tx_buf) &&
8caab75f 309 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS		 310 stats->bytes_tx += xfer->len;
311 if ((xfer->rx_buf) &&
8caab75f 312 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS		 313 stats->bytes_rx += xfer->len;
314
315 spin_unlock_irqrestore(&stats->lock, flags);
316}
317EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats);
8ae12a0d
DB		 318
319/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
320 * and the sysfs version makes coldplug work too.
321 */
322
75368bf6
AV		 323static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
324 const struct spi_device *sdev)
325{
326 while (id->name[0]) {
327 if (!strcmp(sdev->modalias, id->name))
328 return id;
329 id++;
330 }
331 return NULL;
332}
333
334const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
335{
336 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
337
338 return spi_match_id(sdrv->id_table, sdev);
339}
340EXPORT_SYMBOL_GPL(spi_get_device_id);
341
8ae12a0d
DB		 342static int spi_match_device(struct device *dev, struct device_driver *drv)
343{
344 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV		 345 const struct spi_driver *sdrv = to_spi_driver(drv);
346
5039563e
TP		 347 /* Check override first, and if set, only use the named driver */
348 if (spi->driver_override)
349 return strcmp(spi->driver_override, drv->name) == 0;
350
2b7a32f7
SA		 351 /* Attempt an OF style match */
352 if (of_driver_match_device(dev, drv))
353 return 1;
354
64bee4d2
MW		 355 /* Then try ACPI */
356 if (acpi_driver_match_device(dev, drv))
357 return 1;
358
75368bf6
AV		 359 if (sdrv->id_table)
360 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 361
35f74fca 362 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB		 363}
364
7eff2e7a 365static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB		 366{
367 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 368 int rc;
369
370 rc = acpi_device_uevent_modalias(dev, env);
371 if (rc != -ENODEV)
372 return rc;
8ae12a0d 373
2856670f 374 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB		 375}
376
8ae12a0d
DB		 377struct bus_type spi_bus_type = {
378 .name = "spi",
aa7da564 379 .dev_groups = spi_dev_groups,
8ae12a0d
DB		 380 .match = spi_match_device,
381 .uevent = spi_uevent,
8ae12a0d
DB		 382};
383EXPORT_SYMBOL_GPL(spi_bus_type);
384
b885244e
DB		 385
386static int spi_drv_probe(struct device *dev)
387{
388 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 389 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW		 390 int ret;
391
86be408b
SN		 392 ret = of_clk_set_defaults(dev->of_node, false);
393 if (ret)
394 return ret;
395
44af7927
JH		 396 if (dev->of_node) {
397 spi->irq = of_irq_get(dev->of_node, 0);
398 if (spi->irq == -EPROBE_DEFER)
399 return -EPROBE_DEFER;
400 if (spi->irq < 0)
401 spi->irq = 0;
402 }
403
676e7c25 404 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH		 405 if (ret)
406 return ret;
407
408 ret = sdrv->probe(spi);
409 if (ret)
410 dev_pm_domain_detach(dev, true);
b885244e 411
33cf00e5 412 return ret;
b885244e
DB		 413}
414
415static int spi_drv_remove(struct device *dev)
416{
417 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5
MW		 418 int ret;
419
aec35f4e 420 ret = sdrv->remove(to_spi_device(dev));
676e7c25 421 dev_pm_domain_detach(dev, true);
b885244e 422
33cf00e5 423 return ret;
b885244e
DB		 424}
425
426static void spi_drv_shutdown(struct device *dev)
427{
428 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
429
430 sdrv->shutdown(to_spi_device(dev));
431}
432
33e34dc6 433/**
ca5d2485 434 * __spi_register_driver - register a SPI driver
88c9321d 435 * @owner: owner module of the driver to register
33e34dc6
DB		 436 * @sdrv: the driver to register
437 * Context: can sleep
97d56dc6
JMC		 438 *
439 * Return: zero on success, else a negative error code.
33e34dc6 440 */
ca5d2485 441int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 442{
ca5d2485 443 sdrv->driver.owner = owner;
b885244e
DB		 444 sdrv->driver.bus = &spi_bus_type;
445 if (sdrv->probe)
446 sdrv->driver.probe = spi_drv_probe;
447 if (sdrv->remove)
448 sdrv->driver.remove = spi_drv_remove;
449 if (sdrv->shutdown)
450 sdrv->driver.shutdown = spi_drv_shutdown;
451 return driver_register(&sdrv->driver);
452}
ca5d2485 453EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 454
8ae12a0d
DB		 455/*-------------------------------------------------------------------------*/
456
457/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 458 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB		 459 * Device registration normally goes into like arch/.../mach.../board-YYY.c
460 * with other readonly (flashable) information about mainboard devices.
461 */
462
463struct boardinfo {
464 struct list_head list;
2b9603a0 465 struct spi_board_info board_info;
8ae12a0d
DB		 466};
467
468static LIST_HEAD(board_list);
8caab75f 469static LIST_HEAD(spi_controller_list);
2b9603a0
FT		 470
471/*
be73e323 472 * Used to protect add/del operation for board_info list and
8caab75f 473 * spi_controller list, and their matching process
9a9a047a 474 * also used to protect object of type struct idr
2b9603a0 475 */
94040828 476static DEFINE_MUTEX(board_lock);
8ae12a0d 477
dc87c98e
GL		 478/**
479 * spi_alloc_device - Allocate a new SPI device
8caab75f 480 * @ctlr: Controller to which device is connected
dc87c98e
GL		 481 * Context: can sleep
482 *
483 * Allows a driver to allocate and initialize a spi_device without
484 * registering it immediately. This allows a driver to directly
485 * fill the spi_device with device parameters before calling
486 * spi_add_device() on it.
487 *
488 * Caller is responsible to call spi_add_device() on the returned
8caab75f 489 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL		 490 * needs to discard the spi_device without adding it, then it should
491 * call spi_dev_put() on it.
492 *
97d56dc6 493 * Return: a pointer to the new device, or NULL.
dc87c98e 494 */
8caab75f 495struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL		 496{
497 struct spi_device *spi;
dc87c98e 498
8caab75f 499 if (!spi_controller_get(ctlr))
dc87c98e
GL		 500 return NULL;
501
5fe5f05e 502 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 503 if (!spi) {
8caab75f 504 spi_controller_put(ctlr);
dc87c98e
GL		 505 return NULL;
506 }
507
8caab75f
GU		 508 spi->master = spi->controller = ctlr;
509 spi->dev.parent = &ctlr->dev;
dc87c98e
GL		 510 spi->dev.bus = &spi_bus_type;
511 spi->dev.release = spidev_release;
446411e1 512 spi->cs_gpio = -ENOENT;
eca2ebc7
MS		 513
514 spin_lock_init(&spi->statistics.lock);
515
dc87c98e
GL		 516 device_initialize(&spi->dev);
517 return spi;
518}
519EXPORT_SYMBOL_GPL(spi_alloc_device);
520
e13ac47b
JN		 521static void spi_dev_set_name(struct spi_device *spi)
522{
523 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
524
525 if (adev) {
526 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
527 return;
528 }
529
8caab75f 530 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN		 531 spi->chip_select);
532}
533
b6fb8d3a
MW		 534static int spi_dev_check(struct device *dev, void *data)
535{
536 struct spi_device *spi = to_spi_device(dev);
537 struct spi_device *new_spi = data;
538
8caab75f 539 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW		 540 spi->chip_select == new_spi->chip_select)
541 return -EBUSY;
542 return 0;
543}
544
dc87c98e
GL		 545/**
546 * spi_add_device - Add spi_device allocated with spi_alloc_device
547 * @spi: spi_device to register
548 *
549 * Companion function to spi_alloc_device. Devices allocated with
550 * spi_alloc_device can be added onto the spi bus with this function.
551 *
97d56dc6 552 * Return: 0 on success; negative errno on failure
dc87c98e
GL		 553 */
554int spi_add_device(struct spi_device *spi)
555{
e48880e0 556 static DEFINE_MUTEX(spi_add_lock);
8caab75f
GU		 557 struct spi_controller *ctlr = spi->controller;
558 struct device *dev = ctlr->dev.parent;
dc87c98e
GL		 559 int status;
560
561 /* Chipselects are numbered 0..max; validate. */
8caab75f
GU		 562 if (spi->chip_select >= ctlr->num_chipselect) {
563 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
564 ctlr->num_chipselect);
dc87c98e
GL		 565 return -EINVAL;
566 }
567
568 /* Set the bus ID string */
e13ac47b 569 spi_dev_set_name(spi);
e48880e0
DB		 570
571 /* We need to make sure there's no other device with this
572 * chipselect **BEFORE** we call setup(), else we'll trash
573 * its configuration. Lock against concurrent add() calls.
574 */
575 mutex_lock(&spi_add_lock);
576
b6fb8d3a
MW		 577 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
578 if (status) {
e48880e0
DB		 579 dev_err(dev, "chipselect %d already in use\n",
580 spi->chip_select);
e48880e0
DB		 581 goto done;
582 }
583
f3186dd8
LW		 584 /* Descriptors take precedence */
585 if (ctlr->cs_gpiods)
586 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
587 else if (ctlr->cs_gpios)
8caab75f 588 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 589
e48880e0
DB		 590 /* Drivers may modify this initial i/o setup, but will
591 * normally rely on the device being setup. Devices
592 * using SPI_CS_HIGH can't coexist well otherwise...
593 */
7d077197 594 status = spi_setup(spi);
dc87c98e 595 if (status < 0) {
eb288a1f
LW		 596 dev_err(dev, "can't setup %s, status %d\n",
597 dev_name(&spi->dev), status);
e48880e0 598 goto done;
dc87c98e
GL		 599 }
600
e48880e0 601 /* Device may be bound to an active driver when this returns */
dc87c98e 602 status = device_add(&spi->dev);
e48880e0 603 if (status < 0)
eb288a1f
LW		 604 dev_err(dev, "can't add %s, status %d\n",
605 dev_name(&spi->dev), status);
e48880e0 606 else
35f74fca 607 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
dc87c98e 608
e48880e0
DB		 609done:
610 mutex_unlock(&spi_add_lock);
611 return status;
dc87c98e
GL		 612}
613EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 614
33e34dc6
DB		 615/**
616 * spi_new_device - instantiate one new SPI device
8caab75f 617 * @ctlr: Controller to which device is connected
33e34dc6
DB		 618 * @chip: Describes the SPI device
619 * Context: can sleep
620 *
621 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB		 622 * after board init creates the hard-wired devices. Some development
623 * platforms may not be able to use spi_register_board_info though, and
624 * this is exported so that for example a USB or parport based adapter
625 * driver could add devices (which it would learn about out-of-band).
082c8cb4 626 *
97d56dc6 627 * Return: the new device, or NULL.
8ae12a0d 628 */
8caab75f 629struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 630 struct spi_board_info *chip)
8ae12a0d
DB		 631{
632 struct spi_device *proxy;
8ae12a0d
DB		 633 int status;
634
082c8cb4
DB		 635 /* NOTE: caller did any chip->bus_num checks necessary.
636 *
637 * Also, unless we change the return value convention to use
638 * error-or-pointer (not NULL-or-pointer), troubleshootability
639 * suggests syslogged diagnostics are best here (ugh).
640 */
641
8caab75f 642 proxy = spi_alloc_device(ctlr);
dc87c98e 643 if (!proxy)
8ae12a0d
DB		 644 return NULL;
645
102eb975
GL		 646 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
647
8ae12a0d
DB		 648 proxy->chip_select = chip->chip_select;
649 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 650 proxy->mode = chip->mode;
8ae12a0d 651 proxy->irq = chip->irq;
102eb975 652 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB		 653 proxy->dev.platform_data = (void *) chip->platform_data;
654 proxy->controller_data = chip->controller_data;
655 proxy->controller_state = NULL;
8ae12a0d 656
826cf175
DT		 657 if (chip->properties) {
658 status = device_add_properties(&proxy->dev, chip->properties);
659 if (status) {
8caab75f 660 dev_err(&ctlr->dev,
826cf175
DT		 661 "failed to add properties to '%s': %d\n",
662 chip->modalias, status);
663 goto err_dev_put;
664 }
8ae12a0d
DB		 665 }
666
826cf175
DT		 667 status = spi_add_device(proxy);
668 if (status < 0)
669 goto err_remove_props;
670
8ae12a0d 671 return proxy;
826cf175
DT		 672
673err_remove_props:
674 if (chip->properties)
675 device_remove_properties(&proxy->dev);
676err_dev_put:
677 spi_dev_put(proxy);
678 return NULL;
8ae12a0d
DB		 679}
680EXPORT_SYMBOL_GPL(spi_new_device);
681
3b1884c2
GU		 682/**
683 * spi_unregister_device - unregister a single SPI device
684 * @spi: spi_device to unregister
685 *
686 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 687 * by spi_unregister_controller().
3b1884c2
GU		 688 */
689void spi_unregister_device(struct spi_device *spi)
690{
bd6c1644
GU		 691 if (!spi)
692 return;
693
8324147f 694 if (spi->dev.of_node) {
bd6c1644 695 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH		 696 of_node_put(spi->dev.of_node);
697 }
7f24467f
OP		 698 if (ACPI_COMPANION(&spi->dev))
699 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
bd6c1644 700 device_unregister(&spi->dev);
3b1884c2
GU		 701}
702EXPORT_SYMBOL_GPL(spi_unregister_device);
703
8caab75f
GU		 704static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
705 struct spi_board_info *bi)
2b9603a0
FT		 706{
707 struct spi_device *dev;
708
8caab75f 709 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT		 710 return;
711
8caab75f 712 dev = spi_new_device(ctlr, bi);
2b9603a0 713 if (!dev)
8caab75f 714 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT		 715 bi->modalias);
716}
717
33e34dc6
DB		 718/**
719 * spi_register_board_info - register SPI devices for a given board
720 * @info: array of chip descriptors
721 * @n: how many descriptors are provided
722 * Context: can sleep
723 *
8ae12a0d
DB		 724 * Board-specific early init code calls this (probably during arch_initcall)
725 * with segments of the SPI device table. Any device nodes are created later,
726 * after the relevant parent SPI controller (bus_num) is defined. We keep
727 * this table of devices forever, so that reloading a controller driver will
728 * not make Linux forget about these hard-wired devices.
729 *
730 * Other code can also call this, e.g. a particular add-on board might provide
731 * SPI devices through its expansion connector, so code initializing that board
732 * would naturally declare its SPI devices.
733 *
734 * The board info passed can safely be __initdata ... but be careful of
735 * any embedded pointers (platform_data, etc), they're copied as-is.
826cf175 736 * Device properties are deep-copied though.
97d56dc6
JMC		 737 *
738 * Return: zero on success, else a negative error code.
8ae12a0d 739 */
fd4a319b 740int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 741{
2b9603a0
FT		 742 struct boardinfo *bi;
743 int i;
8ae12a0d 744
c7908a37 745 if (!n)
f974cf57 746 return 0;
c7908a37 747
f9bdb7fd 748 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB		 749 if (!bi)
750 return -ENOMEM;
8ae12a0d 751
2b9603a0 752 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 753 struct spi_controller *ctlr;
8ae12a0d 754
2b9603a0 755 memcpy(&bi->board_info, info, sizeof(*info));
826cf175
DT		 756 if (info->properties) {
757 bi->board_info.properties =
758 property_entries_dup(info->properties);
759 if (IS_ERR(bi->board_info.properties))
760 return PTR_ERR(bi->board_info.properties);
761 }
762
2b9603a0
FT		 763 mutex_lock(&board_lock);
764 list_add_tail(&bi->list, &board_list);
8caab75f
GU		 765 list_for_each_entry(ctlr, &spi_controller_list, list)
766 spi_match_controller_to_boardinfo(ctlr,
767 &bi->board_info);
2b9603a0 768 mutex_unlock(&board_lock);
8ae12a0d 769 }
2b9603a0
FT		 770
771 return 0;
8ae12a0d
DB		 772}
773
774/*-------------------------------------------------------------------------*/
775
b158935f
MB		 776static void spi_set_cs(struct spi_device *spi, bool enable)
777{
25093bde
AA		 778 bool enable1 = enable;
779
780 if (!spi->controller->set_cs_timing) {
781 if (enable1)
782 spi_delay_exec(&spi->controller->cs_setup, NULL);
783 else
784 spi_delay_exec(&spi->controller->cs_hold, NULL);
785 }
786
b158935f
MB		 787 if (spi->mode & SPI_CS_HIGH)
788 enable = !enable;
789
f3186dd8
LW		 790 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) {
791 /*
792 * Honour the SPI_NO_CS flag and invert the enable line, as
793 * active low is default for SPI. Execution paths that handle
794 * polarity inversion in gpiolib (such as device tree) will
795 * enforce active high using the SPI_CS_HIGH resulting in a
796 * double inversion through the code above.
797 */
798 if (!(spi->mode & SPI_NO_CS)) {
799 if (spi->cs_gpiod)
28f7604f
FF		 800 gpiod_set_value_cansleep(spi->cs_gpiod,
801 !enable);
f3186dd8 802 else
28f7604f 803 gpio_set_value_cansleep(spi->cs_gpio, !enable);
f3186dd8 804 }
8eee6b9d 805 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU		 806 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
807 spi->controller->set_cs)
808 spi->controller->set_cs(spi, !enable);
809 } else if (spi->controller->set_cs) {
810 spi->controller->set_cs(spi, !enable);
8eee6b9d 811 }
25093bde
AA		 812
813 if (!spi->controller->set_cs_timing) {
814 if (!enable1)
815 spi_delay_exec(&spi->controller->cs_inactive, NULL);
816 }
b158935f
MB		 817}
818
2de440f5 819#ifdef CONFIG_HAS_DMA
46336966
BB		 820int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
821 struct sg_table *sgt, void *buf, size_t len,
822 enum dma_data_direction dir)
6ad45a27
MB		 823{
824 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 825 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V		 826#ifdef CONFIG_HIGHMEM
827 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
828 (unsigned long)buf < (PKMAP_BASE +
829 (LAST_PKMAP * PAGE_SIZE)));
830#else
831 const bool kmap_buf = false;
832#endif
65598c13
AG		 833 int desc_len;
834 int sgs;
6ad45a27 835 struct page *vm_page;
8dd4a016 836 struct scatterlist *sg;
6ad45a27
MB		 837 void *sg_buf;
838 size_t min;
839 int i, ret;
840
b1b8153c 841 if (vmalloced_buf || kmap_buf) {
df88e91b 842 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 843 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 844 } else if (virt_addr_valid(buf)) {
8caab75f 845 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 846 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V		 847 } else {
848 return -EINVAL;
65598c13
AG		 849 }
850
6ad45a27
MB		 851 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
852 if (ret != 0)
853 return ret;
854
8dd4a016 855 sg = &sgt->sgl[0];
6ad45a27 856 for (i = 0; i < sgs; i++) {
6ad45a27 857
b1b8153c 858 if (vmalloced_buf || kmap_buf) {
ce99319a
MC		 859 /*
860 * Next scatterlist entry size is the minimum between
861 * the desc_len and the remaining buffer length that
862 * fits in a page.
863 */
864 min = min_t(size_t, desc_len,
865 min_t(size_t, len,
866 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V		 867 if (vmalloced_buf)
868 vm_page = vmalloc_to_page(buf);
869 else
870 vm_page = kmap_to_page(buf);
6ad45a27
MB		 871 if (!vm_page) {
872 sg_free_table(sgt);
873 return -ENOMEM;
874 }
8dd4a016 875 sg_set_page(sg, vm_page,
c1aefbdd 876 min, offset_in_page(buf));
6ad45a27 877 } else {
65598c13 878 min = min_t(size_t, len, desc_len);
6ad45a27 879 sg_buf = buf;
8dd4a016 880 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB		 881 }
882
6ad45a27
MB		 883 buf += min;
884 len -= min;
8dd4a016 885 sg = sg_next(sg);
6ad45a27
MB		 886 }
887
888 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU		 889 if (!ret)
890 ret = -ENOMEM;
6ad45a27
MB		 891 if (ret < 0) {
892 sg_free_table(sgt);
893 return ret;
894 }
895
896 sgt->nents = ret;
897
898 return 0;
899}
900
46336966
BB		 901void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
902 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB		 903{
904 if (sgt->orig_nents) {
905 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
906 sg_free_table(sgt);
907 }
908}
909
8caab75f 910static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 911{
99adef31
MB		 912 struct device *tx_dev, *rx_dev;
913 struct spi_transfer *xfer;
6ad45a27 914 int ret;
3a2eba9b 915
8caab75f 916 if (!ctlr->can_dma)
99adef31
MB		 917 return 0;
918
8caab75f
GU		 919 if (ctlr->dma_tx)
920 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 921 else
8caab75f 922 tx_dev = ctlr->dev.parent;
c37f45b5 923
8caab75f
GU		 924 if (ctlr->dma_rx)
925 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 926 else
8caab75f 927 rx_dev = ctlr->dev.parent;
99adef31
MB		 928
929 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 930 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 931 continue;
932
933 if (xfer->tx_buf != NULL) {
8caab75f 934 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB		 935 (void *)xfer->tx_buf, xfer->len,
936 DMA_TO_DEVICE);
937 if (ret != 0)
938 return ret;
99adef31
MB		 939 }
940
941 if (xfer->rx_buf != NULL) {
8caab75f 942 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB		 943 xfer->rx_buf, xfer->len,
944 DMA_FROM_DEVICE);
945 if (ret != 0) {
8caab75f 946 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB		 947 DMA_TO_DEVICE);
948 return ret;
99adef31
MB		 949 }
950 }
951 }
952
8caab75f 953 ctlr->cur_msg_mapped = true;
99adef31
MB		 954
955 return 0;
956}
957
8caab75f 958static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB		 959{
960 struct spi_transfer *xfer;
961 struct device *tx_dev, *rx_dev;
962
8caab75f 963 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB		 964 return 0;
965
8caab75f
GU		 966 if (ctlr->dma_tx)
967 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 968 else
8caab75f 969 tx_dev = ctlr->dev.parent;
c37f45b5 970
8caab75f
GU		 971 if (ctlr->dma_rx)
972 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 973 else
8caab75f 974 rx_dev = ctlr->dev.parent;
99adef31
MB		 975
976 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 977 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 978 continue;
979
8caab75f
GU		 980 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
981 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB		 982 }
983
984 return 0;
985}
2de440f5 986#else /* !CONFIG_HAS_DMA */
8caab75f 987static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU		 988 struct spi_message *msg)
989{
990 return 0;
991}
992
8caab75f 993static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 994 struct spi_message *msg)
2de440f5
GU		 995{
996 return 0;
997}
998#endif /* !CONFIG_HAS_DMA */
999
8caab75f 1000static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS		 1001 struct spi_message *msg)
1002{
1003 struct spi_transfer *xfer;
1004
1005 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1006 /*
1007 * Restore the original value of tx_buf or rx_buf if they are
1008 * NULL.
1009 */
8caab75f 1010 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1011 xfer->tx_buf = NULL;
8caab75f 1012 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS		 1013 xfer->rx_buf = NULL;
1014 }
1015
8caab75f 1016 return __spi_unmap_msg(ctlr, msg);
4b786458
MS		 1017}
1018
8caab75f 1019static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU		 1020{
1021 struct spi_transfer *xfer;
1022 void *tmp;
1023 unsigned int max_tx, max_rx;
1024
8caab75f 1025 if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
2de440f5
GU		 1026 max_tx = 0;
1027 max_rx = 0;
1028
1029 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1030 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU		 1031 !xfer->tx_buf)
1032 max_tx = max(xfer->len, max_tx);
8caab75f 1033 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU		 1034 !xfer->rx_buf)
1035 max_rx = max(xfer->len, max_rx);
1036 }
1037
1038 if (max_tx) {
8caab75f 1039 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU		 1040 GFP_KERNEL | GFP_DMA);
1041 if (!tmp)
1042 return -ENOMEM;
8caab75f 1043 ctlr->dummy_tx = tmp;
2de440f5
GU		 1044 memset(tmp, 0, max_tx);
1045 }
1046
1047 if (max_rx) {
8caab75f 1048 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU		 1049 GFP_KERNEL | GFP_DMA);
1050 if (!tmp)
1051 return -ENOMEM;
8caab75f 1052 ctlr->dummy_rx = tmp;
2de440f5
GU		 1053 }
1054
1055 if (max_tx || max_rx) {
1056 list_for_each_entry(xfer, &msg->transfers,
1057 transfer_list) {
5442dcaa
CL		 1058 if (!xfer->len)
1059 continue;
2de440f5 1060 if (!xfer->tx_buf)
8caab75f 1061 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1062 if (!xfer->rx_buf)
8caab75f 1063 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU		 1064 }
1065 }
1066 }
1067
8caab75f 1068 return __spi_map_msg(ctlr, msg);
2de440f5 1069}
99adef31 1070
810923f3
LR		 1071static int spi_transfer_wait(struct spi_controller *ctlr,
1072 struct spi_message *msg,
1073 struct spi_transfer *xfer)
1074{
1075 struct spi_statistics *statm = &ctlr->statistics;
1076 struct spi_statistics *stats = &msg->spi->statistics;
1077 unsigned long long ms = 1;
1078
1079 if (spi_controller_is_slave(ctlr)) {
1080 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1081 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1082 return -EINTR;
1083 }
1084 } else {
1085 ms = 8LL * 1000LL * xfer->len;
1086 do_div(ms, xfer->speed_hz);
1087 ms += ms + 200; /* some tolerance */
1088
1089 if (ms > UINT_MAX)
1090 ms = UINT_MAX;
1091
1092 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1093 msecs_to_jiffies(ms));
1094
1095 if (ms == 0) {
1096 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1097 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1098 dev_err(&msg->spi->dev,
1099 "SPI transfer timed out\n");
1100 return -ETIMEDOUT;
1101 }
1102 }
1103
1104 return 0;
1105}
1106
0ff2de8b
MS		 1107static void _spi_transfer_delay_ns(u32 ns)
1108{
1109 if (!ns)
1110 return;
1111 if (ns <= 1000) {
1112 ndelay(ns);
1113 } else {
1114 u32 us = DIV_ROUND_UP(ns, 1000);
1115
1116 if (us <= 10)
1117 udelay(us);
1118 else
1119 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1120 }
1121}
1122
3984d39b 1123int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
b2c98153
AA		 1124{
1125 u32 delay = _delay->value;
1126 u32 unit = _delay->unit;
1127 u32 hz;
1128
1129 if (!delay)
1130 return 0;
1131
1132 switch (unit) {
1133 case SPI_DELAY_UNIT_USECS:
1134 delay *= 1000;
1135 break;
1136 case SPI_DELAY_UNIT_NSECS: /* nothing to do here */
1137 break;
1138 case SPI_DELAY_UNIT_SCK:
1139 /* clock cycles need to be obtained from spi_transfer */
1140 if (!xfer)
1141 return -EINVAL;
1142 /* if there is no effective speed know, then approximate
1143 * by underestimating with half the requested hz
1144 */
1145 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
1146 if (!hz)
1147 return -EINVAL;
1148 delay *= DIV_ROUND_UP(1000000000, hz);
1149 break;
1150 default:
1151 return -EINVAL;
1152 }
1153
1154 return delay;
1155}
3984d39b 1156EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA		 1157
1158int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1159{
1160 int delay;
1161
1162 if (!_delay)
1163 return -EINVAL;
1164
3984d39b 1165 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA		 1166 if (delay < 0)
1167 return delay;
1168
1169 _spi_transfer_delay_ns(delay);
1170
1171 return 0;
1172}
1173EXPORT_SYMBOL_GPL(spi_delay_exec);
1174
0ff2de8b
MS		 1175static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1176 struct spi_transfer *xfer)
1177{
329f0dac
AA		 1178 u32 delay = xfer->cs_change_delay.value;
1179 u32 unit = xfer->cs_change_delay.unit;
1180 int ret;
0ff2de8b
MS		 1181
1182 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA		 1183 if (!delay) {
1184 if (unit == SPI_DELAY_UNIT_USECS)
1185 _spi_transfer_delay_ns(10000);
0ff2de8b 1186 return;
6b3f236a 1187 }
0ff2de8b 1188
329f0dac
AA		 1189 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1190 if (ret) {
0ff2de8b
MS		 1191 dev_err_once(&msg->spi->dev,
1192 "Use of unsupported delay unit %i, using default of 10us\n",
329f0dac
AA		 1193 unit);
1194 _spi_transfer_delay_ns(10000);
0ff2de8b 1195 }
0ff2de8b
MS		 1196}
1197
b158935f
MB		 1198/*
1199 * spi_transfer_one_message - Default implementation of transfer_one_message()
1200 *
1201 * This is a standard implementation of transfer_one_message() for
8ba811a7 1202 * drivers which implement a transfer_one() operation. It provides
b158935f
MB		 1203 * standard handling of delays and chip select management.
1204 */
8caab75f 1205static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB		 1206 struct spi_message *msg)
1207{
1208 struct spi_transfer *xfer;
b158935f
MB		 1209 bool keep_cs = false;
1210 int ret = 0;
8caab75f 1211 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1212 struct spi_statistics *stats = &msg->spi->statistics;
b158935f
MB		 1213
1214 spi_set_cs(msg->spi, true);
1215
eca2ebc7
MS		 1216 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1217 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1218
b158935f
MB		 1219 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1220 trace_spi_transfer_start(msg, xfer);
1221
8caab75f
GU		 1222 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1223 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1224
b42faeee
VO		 1225 if (!ctlr->ptp_sts_supported) {
1226 xfer->ptp_sts_word_pre = 0;
1227 ptp_read_system_prets(xfer->ptp_sts);
1228 }
1229
38ec10f6 1230 if (xfer->tx_buf || xfer->rx_buf) {
8caab75f 1231 reinit_completion(&ctlr->xfer_completion);
b158935f 1232
8caab75f 1233 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1234 if (ret < 0) {
eca2ebc7
MS		 1235 SPI_STATISTICS_INCREMENT_FIELD(statm,
1236 errors);
1237 SPI_STATISTICS_INCREMENT_FIELD(stats,
1238 errors);
38ec10f6
MB		 1239 dev_err(&msg->spi->dev,
1240 "SPI transfer failed: %d\n", ret);
1241 goto out;
1242 }
b158935f 1243
d57e7960
MB		 1244 if (ret > 0) {
1245 ret = spi_transfer_wait(ctlr, msg, xfer);
1246 if (ret < 0)
1247 msg->status = ret;
1248 }
38ec10f6
MB		 1249 } else {
1250 if (xfer->len)
1251 dev_err(&msg->spi->dev,
1252 "Bufferless transfer has length %u\n",
1253 xfer->len);
13a42798 1254 }
b158935f 1255
b42faeee
VO		 1256 if (!ctlr->ptp_sts_supported) {
1257 ptp_read_system_postts(xfer->ptp_sts);
1258 xfer->ptp_sts_word_post = xfer->len;
1259 }
1260
b158935f
MB		 1261 trace_spi_transfer_stop(msg, xfer);
1262
1263 if (msg->status != -EINPROGRESS)
1264 goto out;
1265
bebcfd27 1266 spi_transfer_delay_exec(xfer);
b158935f
MB		 1267
1268 if (xfer->cs_change) {
1269 if (list_is_last(&xfer->transfer_list,
1270 &msg->transfers)) {
1271 keep_cs = true;
1272 } else {
0b73aa63 1273 spi_set_cs(msg->spi, false);
0ff2de8b 1274 _spi_transfer_cs_change_delay(msg, xfer);
0b73aa63 1275 spi_set_cs(msg->spi, true);
b158935f
MB		 1276 }
1277 }
1278
1279 msg->actual_length += xfer->len;
1280 }
1281
1282out:
1283 if (ret != 0 || !keep_cs)
1284 spi_set_cs(msg->spi, false);
1285
1286 if (msg->status == -EINPROGRESS)
1287 msg->status = ret;
1288
8caab75f
GU		 1289 if (msg->status && ctlr->handle_err)
1290 ctlr->handle_err(ctlr, msg);
b716c4ff 1291
c9ba7a16
NT		 1292 spi_res_release(ctlr, msg);
1293
0ed56252
MB		 1294 spi_finalize_current_message(ctlr);
1295
b158935f
MB		 1296 return ret;
1297}
1298
1299/**
1300 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1301 * @ctlr: the controller reporting completion
b158935f
MB		 1302 *
1303 * Called by SPI drivers using the core transfer_one_message()
1304 * implementation to notify it that the current interrupt driven
9e8f4882 1305 * transfer has finished and the next one may be scheduled.
b158935f 1306 */
8caab75f 1307void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1308{
8caab75f 1309 complete(&ctlr->xfer_completion);
b158935f
MB		 1310}
1311EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1312
ffbbdd21 1313/**
fc9e0f71 1314 * __spi_pump_messages - function which processes spi message queue
8caab75f 1315 * @ctlr: controller to process queue for
fc9e0f71 1316 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW		 1317 *
1318 * This function checks if there is any spi message in the queue that
1319 * needs processing and if so call out to the driver to initialize hardware
1320 * and transfer each message.
1321 *
0461a414
MB		 1322 * Note that it is called both from the kthread itself and also from
1323 * inside spi_sync(); the queue extraction handling at the top of the
1324 * function should deal with this safely.
ffbbdd21 1325 */
8caab75f 1326static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1327{
b42faeee 1328 struct spi_transfer *xfer;
d1c44c93 1329 struct spi_message *msg;
ffbbdd21 1330 bool was_busy = false;
d1c44c93 1331 unsigned long flags;
ffbbdd21
LW		 1332 int ret;
1333
983aee5d 1334 /* Lock queue */
8caab75f 1335 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB		 1336
1337 /* Make sure we are not already running a message */
8caab75f
GU		 1338 if (ctlr->cur_msg) {
1339 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB		 1340 return;
1341 }
1342
f0125f1a 1343 /* If another context is idling the device then defer */
8caab75f
GU		 1344 if (ctlr->idling) {
1345 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
1346 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB		 1347 return;
1348 }
1349
983aee5d 1350 /* Check if the queue is idle */
8caab75f
GU		 1351 if (list_empty(&ctlr->queue) || !ctlr->running) {
1352 if (!ctlr->busy) {
1353 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1354 return;
ffbbdd21 1355 }
fc9e0f71 1356
f0125f1a
MB		 1357 /* Only do teardown in the thread */
1358 if (!in_kthread) {
1359 kthread_queue_work(&ctlr->kworker,
1360 &ctlr->pump_messages);
1361 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1362 return;
1363 }
1364
1365 ctlr->busy = false;
1366 ctlr->idling = true;
1367 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1368
1369 kfree(ctlr->dummy_rx);
1370 ctlr->dummy_rx = NULL;
1371 kfree(ctlr->dummy_tx);
1372 ctlr->dummy_tx = NULL;
1373 if (ctlr->unprepare_transfer_hardware &&
1374 ctlr->unprepare_transfer_hardware(ctlr))
1375 dev_err(&ctlr->dev,
1376 "failed to unprepare transfer hardware\n");
1377 if (ctlr->auto_runtime_pm) {
1378 pm_runtime_mark_last_busy(ctlr->dev.parent);
1379 pm_runtime_put_autosuspend(ctlr->dev.parent);
1380 }
1381 trace_spi_controller_idle(ctlr);
1382
1383 spin_lock_irqsave(&ctlr->queue_lock, flags);
1384 ctlr->idling = false;
8caab75f 1385 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1386 return;
1387 }
ffbbdd21 1388
ffbbdd21 1389 /* Extract head of queue */
d1c44c93
VO		 1390 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1391 ctlr->cur_msg = msg;
ffbbdd21 1392
d1c44c93 1393 list_del_init(&msg->queue);
8caab75f 1394 if (ctlr->busy)
ffbbdd21
LW		 1395 was_busy = true;
1396 else
8caab75f
GU		 1397 ctlr->busy = true;
1398 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1399
8caab75f 1400 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1401
8caab75f
GU		 1402 if (!was_busy && ctlr->auto_runtime_pm) {
1403 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1404 if (ret < 0) {
7e48e23a 1405 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1406 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1407 ret);
8caab75f 1408 mutex_unlock(&ctlr->io_mutex);
49834de2
MB		 1409 return;
1410 }
1411 }
1412
56ec1978 1413 if (!was_busy)
8caab75f 1414 trace_spi_controller_busy(ctlr);
56ec1978 1415
8caab75f
GU		 1416 if (!was_busy && ctlr->prepare_transfer_hardware) {
1417 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1418 if (ret) {
8caab75f 1419 dev_err(&ctlr->dev,
f3440d9a
SL		 1420 "failed to prepare transfer hardware: %d\n",
1421 ret);
49834de2 1422
8caab75f
GU		 1423 if (ctlr->auto_runtime_pm)
1424 pm_runtime_put(ctlr->dev.parent);
f3440d9a 1425
d1c44c93 1426 msg->status = ret;
f3440d9a
SL		 1427 spi_finalize_current_message(ctlr);
1428
8caab75f 1429 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW		 1430 return;
1431 }
1432 }
1433
d1c44c93 1434 trace_spi_message_start(msg);
56ec1978 1435
8caab75f 1436 if (ctlr->prepare_message) {
d1c44c93 1437 ret = ctlr->prepare_message(ctlr, msg);
2841a5fc 1438 if (ret) {
8caab75f
GU		 1439 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1440 ret);
d1c44c93 1441 msg->status = ret;
8caab75f 1442 spi_finalize_current_message(ctlr);
49023d2e 1443 goto out;
2841a5fc 1444 }
8caab75f 1445 ctlr->cur_msg_prepared = true;
2841a5fc
MB		 1446 }
1447
d1c44c93 1448 ret = spi_map_msg(ctlr, msg);
99adef31 1449 if (ret) {
d1c44c93 1450 msg->status = ret;
8caab75f 1451 spi_finalize_current_message(ctlr);
49023d2e 1452 goto out;
99adef31
MB		 1453 }
1454
b42faeee
VO		 1455 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1456 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1457 xfer->ptp_sts_word_pre = 0;
1458 ptp_read_system_prets(xfer->ptp_sts);
1459 }
1460 }
1461
d1c44c93 1462 ret = ctlr->transfer_one_message(ctlr, msg);
ffbbdd21 1463 if (ret) {
8caab75f 1464 dev_err(&ctlr->dev,
1f802f82 1465 "failed to transfer one message from queue\n");
49023d2e 1466 goto out;
ffbbdd21 1467 }
49023d2e
JH		 1468
1469out:
8caab75f 1470 mutex_unlock(&ctlr->io_mutex);
62826970
MB		 1471
1472 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH		 1473 if (!ret)
1474 cond_resched();
ffbbdd21
LW		 1475}
1476
fc9e0f71
MB		 1477/**
1478 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1479 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB		 1480 */
1481static void spi_pump_messages(struct kthread_work *work)
1482{
8caab75f
GU		 1483 struct spi_controller *ctlr =
1484 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1485
8caab75f 1486 __spi_pump_messages(ctlr, true);
fc9e0f71
MB		 1487}
1488
b42faeee
VO		 1489/**
1490 * spi_take_timestamp_pre - helper for drivers to collect the beginning of the
1491 * TX timestamp for the requested byte from the SPI
1492 * transfer. The frequency with which this function
1493 * must be called (once per word, once for the whole
1494 * transfer, once per batch of words etc) is arbitrary
1495 * as long as the @tx buffer offset is greater than or
1496 * equal to the requested byte at the time of the
1497 * call. The timestamp is only taken once, at the
1498 * first such call. It is assumed that the driver
1499 * advances its @tx buffer pointer monotonically.
1500 * @ctlr: Pointer to the spi_controller structure of the driver
1501 * @xfer: Pointer to the transfer being timestamped
1502 * @tx: Pointer to the current word within the xfer->tx_buf that the driver is
1503 * preparing to transmit right now.
1504 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1505 * transfer, for less jitter in time measurement. Only compatible
1506 * with PIO drivers. If true, must follow up with
1507 * spi_take_timestamp_post or otherwise system will crash.
1508 * WARNING: for fully predictable results, the CPU frequency must
1509 * also be under control (governor).
1510 */
1511void spi_take_timestamp_pre(struct spi_controller *ctlr,
1512 struct spi_transfer *xfer,
1513 const void *tx, bool irqs_off)
1514{
1515 u8 bytes_per_word = DIV_ROUND_UP(xfer->bits_per_word, 8);
1516
1517 if (!xfer->ptp_sts)
1518 return;
1519
1520 if (xfer->timestamped_pre)
1521 return;
1522
1523 if (tx < (xfer->tx_buf + xfer->ptp_sts_word_pre * bytes_per_word))
1524 return;
1525
1526 /* Capture the resolution of the timestamp */
1527 xfer->ptp_sts_word_pre = (tx - xfer->tx_buf) / bytes_per_word;
1528
1529 xfer->timestamped_pre = true;
1530
1531 if (irqs_off) {
1532 local_irq_save(ctlr->irq_flags);
1533 preempt_disable();
1534 }
1535
1536 ptp_read_system_prets(xfer->ptp_sts);
1537}
1538EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1539
1540/**
1541 * spi_take_timestamp_post - helper for drivers to collect the end of the
1542 * TX timestamp for the requested byte from the SPI
1543 * transfer. Can be called with an arbitrary
1544 * frequency: only the first call where @tx exceeds
1545 * or is equal to the requested word will be
1546 * timestamped.
1547 * @ctlr: Pointer to the spi_controller structure of the driver
1548 * @xfer: Pointer to the transfer being timestamped
1549 * @tx: Pointer to the current word within the xfer->tx_buf that the driver has
1550 * just transmitted.
1551 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
1552 */
1553void spi_take_timestamp_post(struct spi_controller *ctlr,
1554 struct spi_transfer *xfer,
1555 const void *tx, bool irqs_off)
1556{
1557 u8 bytes_per_word = DIV_ROUND_UP(xfer->bits_per_word, 8);
1558
1559 if (!xfer->ptp_sts)
1560 return;
1561
1562 if (xfer->timestamped_post)
1563 return;
1564
1565 if (tx < (xfer->tx_buf + xfer->ptp_sts_word_post * bytes_per_word))
1566 return;
1567
1568 ptp_read_system_postts(xfer->ptp_sts);
1569
1570 if (irqs_off) {
1571 local_irq_restore(ctlr->irq_flags);
1572 preempt_enable();
1573 }
1574
1575 /* Capture the resolution of the timestamp */
1576 xfer->ptp_sts_word_post = (tx - xfer->tx_buf) / bytes_per_word;
1577
1578 xfer->timestamped_post = true;
1579}
1580EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1581
924b5867
DA		 1582/**
1583 * spi_set_thread_rt - set the controller to pump at realtime priority
1584 * @ctlr: controller to boost priority of
1585 *
1586 * This can be called because the controller requested realtime priority
1587 * (by setting the ->rt value before calling spi_register_controller()) or
1588 * because a device on the bus said that its transfers needed realtime
1589 * priority.
1590 *
1591 * NOTE: at the moment if any device on a bus says it needs realtime then
1592 * the thread will be at realtime priority for all transfers on that
1593 * controller. If this eventually becomes a problem we may see if we can
1594 * find a way to boost the priority only temporarily during relevant
1595 * transfers.
1596 */
1597static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1598{
4ff13d00 1599 struct sched_param param = { .sched_priority = MAX_RT_PRIO / 2 };
ffbbdd21 1600
924b5867
DA		 1601 dev_info(&ctlr->dev,
1602 "will run message pump with realtime priority\n");
1603 sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, &param);
1604}
1605
1606static int spi_init_queue(struct spi_controller *ctlr)
1607{
8caab75f
GU		 1608 ctlr->running = false;
1609 ctlr->busy = false;
ffbbdd21 1610
8caab75f
GU		 1611 kthread_init_worker(&ctlr->kworker);
1612 ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker,
1613 "%s", dev_name(&ctlr->dev));
1614 if (IS_ERR(ctlr->kworker_task)) {
1615 dev_err(&ctlr->dev, "failed to create message pump task\n");
1616 return PTR_ERR(ctlr->kworker_task);
ffbbdd21 1617 }
8caab75f 1618 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1619
ffbbdd21 1620 /*
8caab75f 1621 * Controller config will indicate if this controller should run the
ffbbdd21
LW		 1622 * message pump with high (realtime) priority to reduce the transfer
1623 * latency on the bus by minimising the delay between a transfer
1624 * request and the scheduling of the message pump thread. Without this
1625 * setting the message pump thread will remain at default priority.
1626 */
924b5867
DA		 1627 if (ctlr->rt)
1628 spi_set_thread_rt(ctlr);
ffbbdd21
LW		 1629
1630 return 0;
1631}
1632
1633/**
1634 * spi_get_next_queued_message() - called by driver to check for queued
1635 * messages
8caab75f 1636 * @ctlr: the controller to check for queued messages
ffbbdd21
LW		 1637 *
1638 * If there are more messages in the queue, the next message is returned from
1639 * this call.
97d56dc6
JMC		 1640 *
1641 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1642 */
8caab75f 1643struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW		 1644{
1645 struct spi_message *next;
1646 unsigned long flags;
1647
1648 /* get a pointer to the next message, if any */
8caab75f
GU		 1649 spin_lock_irqsave(&ctlr->queue_lock, flags);
1650 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1651 queue);
8caab75f 1652 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1653
1654 return next;
1655}
1656EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1657
1658/**
1659 * spi_finalize_current_message() - the current message is complete
8caab75f 1660 * @ctlr: the controller to return the message to
ffbbdd21
LW		 1661 *
1662 * Called by the driver to notify the core that the message in the front of the
1663 * queue is complete and can be removed from the queue.
1664 */
8caab75f 1665void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1666{
b42faeee 1667 struct spi_transfer *xfer;
ffbbdd21
LW		 1668 struct spi_message *mesg;
1669 unsigned long flags;
2841a5fc 1670 int ret;
ffbbdd21 1671
8caab75f
GU		 1672 spin_lock_irqsave(&ctlr->queue_lock, flags);
1673 mesg = ctlr->cur_msg;
1674 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1675
b42faeee
VO		 1676 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1677 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1678 ptp_read_system_postts(xfer->ptp_sts);
1679 xfer->ptp_sts_word_post = xfer->len;
1680 }
1681 }
1682
8caab75f 1683 spi_unmap_msg(ctlr, mesg);
99adef31 1684
8caab75f
GU		 1685 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1686 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1687 if (ret) {
8caab75f
GU		 1688 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1689 ret);
2841a5fc
MB		 1690 }
1691 }
391949b6 1692
8caab75f
GU		 1693 spin_lock_irqsave(&ctlr->queue_lock, flags);
1694 ctlr->cur_msg = NULL;
1695 ctlr->cur_msg_prepared = false;
f0125f1a 1696 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
8caab75f 1697 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS		 1698
1699 trace_spi_message_done(mesg);
2841a5fc 1700
ffbbdd21
LW		 1701 mesg->state = NULL;
1702 if (mesg->complete)
1703 mesg->complete(mesg->context);
1704}
1705EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1706
8caab75f 1707static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1708{
1709 unsigned long flags;
1710
8caab75f 1711 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1712
8caab75f
GU		 1713 if (ctlr->running || ctlr->busy) {
1714 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1715 return -EBUSY;
1716 }
1717
8caab75f
GU		 1718 ctlr->running = true;
1719 ctlr->cur_msg = NULL;
1720 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1721
8caab75f 1722 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW		 1723
1724 return 0;
1725}
1726
8caab75f 1727static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1728{
1729 unsigned long flags;
1730 unsigned limit = 500;
1731 int ret = 0;
1732
8caab75f 1733 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1734
1735 /*
1736 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1737 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW		 1738 * execution path (pump_messages) would be required to call wake_up or
1739 * friends on every SPI message. Do this instead.
1740 */
8caab75f
GU		 1741 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1742 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1743 usleep_range(10000, 11000);
8caab75f 1744 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1745 }
1746
8caab75f 1747 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW		 1748 ret = -EBUSY;
1749 else
8caab75f 1750 ctlr->running = false;
ffbbdd21 1751
8caab75f 1752 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1753
1754 if (ret) {
8caab75f 1755 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW		 1756 return ret;
1757 }
1758 return ret;
1759}
1760
8caab75f 1761static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1762{
1763 int ret;
1764
8caab75f 1765 ret = spi_stop_queue(ctlr);
ffbbdd21
LW		 1766
1767 /*
3989144f 1768 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW		 1769 * If the reason that stop_queue timed out is that the work will never
1770 * finish, then it does no good to call flush/stop thread, so
1771 * return anyway.
1772 */
1773 if (ret) {
8caab75f 1774 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW		 1775 return ret;
1776 }
1777
8caab75f
GU		 1778 kthread_flush_worker(&ctlr->kworker);
1779 kthread_stop(ctlr->kworker_task);
ffbbdd21
LW		 1780
1781 return 0;
1782}
1783
0461a414
MB		 1784static int __spi_queued_transfer(struct spi_device *spi,
1785 struct spi_message *msg,
1786 bool need_pump)
ffbbdd21 1787{
8caab75f 1788 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW		 1789 unsigned long flags;
1790
8caab75f 1791 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1792
8caab75f
GU		 1793 if (!ctlr->running) {
1794 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1795 return -ESHUTDOWN;
1796 }
1797 msg->actual_length = 0;
1798 msg->status = -EINPROGRESS;
1799
8caab75f 1800 list_add_tail(&msg->queue, &ctlr->queue);
f0125f1a 1801 if (!ctlr->busy && need_pump)
8caab75f 1802 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1803
8caab75f 1804 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1805 return 0;
1806}
1807
0461a414
MB		 1808/**
1809 * spi_queued_transfer - transfer function for queued transfers
1810 * @spi: spi device which is requesting transfer
1811 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC		 1812 *
1813 * Return: zero on success, else a negative error code.
0461a414
MB		 1814 */
1815static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
1816{
1817 return __spi_queued_transfer(spi, msg, true);
1818}
1819
8caab75f 1820static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1821{
1822 int ret;
1823
8caab75f
GU		 1824 ctlr->transfer = spi_queued_transfer;
1825 if (!ctlr->transfer_one_message)
1826 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW		 1827
1828 /* Initialize and start queue */
8caab75f 1829 ret = spi_init_queue(ctlr);
ffbbdd21 1830 if (ret) {
8caab75f 1831 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW		 1832 goto err_init_queue;
1833 }
8caab75f
GU		 1834 ctlr->queued = true;
1835 ret = spi_start_queue(ctlr);
ffbbdd21 1836 if (ret) {
8caab75f 1837 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW		 1838 goto err_start_queue;
1839 }
1840
1841 return 0;
1842
1843err_start_queue:
8caab75f 1844 spi_destroy_queue(ctlr);
c3676d5c 1845err_init_queue:
ffbbdd21
LW		 1846 return ret;
1847}
1848
988f259b
BB		 1849/**
1850 * spi_flush_queue - Send all pending messages in the queue from the callers'
1851 * context
1852 * @ctlr: controller to process queue for
1853 *
1854 * This should be used when one wants to ensure all pending messages have been
1855 * sent before doing something. Is used by the spi-mem code to make sure SPI
1856 * memory operations do not preempt regular SPI transfers that have been queued
1857 * before the spi-mem operation.
1858 */
1859void spi_flush_queue(struct spi_controller *ctlr)
1860{
1861 if (ctlr->transfer == spi_queued_transfer)
1862 __spi_pump_messages(ctlr, false);
1863}
1864
ffbbdd21
LW		 1865/*-------------------------------------------------------------------------*/
1866
7cb94361 1867#if defined(CONFIG_OF)
8caab75f 1868static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 1869 struct device_node *nc)
aff5e3f8 1870{
aff5e3f8 1871 u32 value;
c2e51ac3 1872 int rc;
aff5e3f8 1873
aff5e3f8 1874 /* Mode (clock phase/polarity/etc.) */
e0bcb680 1875 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 1876 spi->mode |= SPI_CPHA;
e0bcb680 1877 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 1878 spi->mode |= SPI_CPOL;
e0bcb680 1879 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 1880 spi->mode |= SPI_3WIRE;
e0bcb680 1881 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8
PA		 1882 spi->mode |= SPI_LSB_FIRST;
1883
f3186dd8
LW		 1884 /*
1885 * For descriptors associated with the device, polarity inversion is
1886 * handled in the gpiolib, so all chip selects are "active high" in
1887 * the logical sense, the gpiolib will invert the line if need be.
1888 */
1889 if (ctlr->use_gpio_descriptors)
1890 spi->mode |= SPI_CS_HIGH;
1891 else if (of_property_read_bool(nc, "spi-cs-high"))
1892 spi->mode |= SPI_CS_HIGH;
1893
aff5e3f8
PA		 1894 /* Device DUAL/QUAD mode */
1895 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
1896 switch (value) {
1897 case 1:
1898 break;
1899 case 2:
1900 spi->mode |= SPI_TX_DUAL;
1901 break;
1902 case 4:
1903 spi->mode |= SPI_TX_QUAD;
1904 break;
6b03061f
YNG		 1905 case 8:
1906 spi->mode |= SPI_TX_OCTAL;
1907 break;
aff5e3f8 1908 default:
8caab75f 1909 dev_warn(&ctlr->dev,
aff5e3f8
PA		 1910 "spi-tx-bus-width %d not supported\n",
1911 value);
1912 break;
1913 }
1914 }
1915
1916 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
1917 switch (value) {
1918 case 1:
1919 break;
1920 case 2:
1921 spi->mode |= SPI_RX_DUAL;
1922 break;
1923 case 4:
1924 spi->mode |= SPI_RX_QUAD;
1925 break;
6b03061f
YNG		 1926 case 8:
1927 spi->mode |= SPI_RX_OCTAL;
1928 break;
aff5e3f8 1929 default:
8caab75f 1930 dev_warn(&ctlr->dev,
aff5e3f8
PA		 1931 "spi-rx-bus-width %d not supported\n",
1932 value);
1933 break;
1934 }
1935 }
1936
8caab75f 1937 if (spi_controller_is_slave(ctlr)) {
194276b0 1938 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH		 1939 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
1940 nc);
6c364062
GU		 1941 return -EINVAL;
1942 }
1943 return 0;
1944 }
1945
1946 /* Device address */
1947 rc = of_property_read_u32(nc, "reg", &value);
1948 if (rc) {
25c56c88
RH		 1949 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
1950 nc, rc);
6c364062
GU		 1951 return rc;
1952 }
1953 spi->chip_select = value;
1954
aff5e3f8
PA		 1955 /* Device speed */
1956 rc = of_property_read_u32(nc, "spi-max-frequency", &value);
1957 if (rc) {
8caab75f 1958 dev_err(&ctlr->dev,
25c56c88 1959 "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc);
c2e51ac3 1960 return rc;
aff5e3f8
PA		 1961 }
1962 spi->max_speed_hz = value;
1963
c2e51ac3
GU		 1964 return 0;
1965}
1966
1967static struct spi_device *
8caab75f 1968of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU		 1969{
1970 struct spi_device *spi;
1971 int rc;
1972
1973 /* Alloc an spi_device */
8caab75f 1974 spi = spi_alloc_device(ctlr);
c2e51ac3 1975 if (!spi) {
25c56c88 1976 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU		 1977 rc = -ENOMEM;
1978 goto err_out;
1979 }
1980
1981 /* Select device driver */
1982 rc = of_modalias_node(nc, spi->modalias,
1983 sizeof(spi->modalias));
1984 if (rc < 0) {
25c56c88 1985 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU		 1986 goto err_out;
1987 }
1988
8caab75f 1989 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU		 1990 if (rc)
1991 goto err_out;
1992
aff5e3f8
PA		 1993 /* Store a pointer to the node in the device structure */
1994 of_node_get(nc);
1995 spi->dev.of_node = nc;
1996
1997 /* Register the new device */
aff5e3f8
PA		 1998 rc = spi_add_device(spi);
1999 if (rc) {
25c56c88 2000 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2001 goto err_of_node_put;
aff5e3f8
PA		 2002 }
2003
2004 return spi;
2005
8324147f
JH		 2006err_of_node_put:
2007 of_node_put(nc);
aff5e3f8
PA		 2008err_out:
2009 spi_dev_put(spi);
2010 return ERR_PTR(rc);
2011}
2012
d57a4282
GL		 2013/**
2014 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2015 * @ctlr: Pointer to spi_controller device
d57a4282 2016 *
6c364062
GU		 2017 * Registers an spi_device for each child node of controller node which
2018 * represents a valid SPI slave.
d57a4282 2019 */
8caab75f 2020static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL		 2021{
2022 struct spi_device *spi;
2023 struct device_node *nc;
d57a4282 2024
8caab75f 2025 if (!ctlr->dev.of_node)
d57a4282
GL		 2026 return;
2027
8caab75f 2028 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU		 2029 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2030 continue;
8caab75f 2031 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2032 if (IS_ERR(spi)) {
8caab75f 2033 dev_warn(&ctlr->dev,
25c56c88 2034 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR		 2035 of_node_clear_flag(nc, OF_POPULATED);
2036 }
d57a4282
GL		 2037 }
2038}
2039#else
8caab75f 2040static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL		 2041#endif
2042
64bee4d2 2043#ifdef CONFIG_ACPI
4c3c5954
AB		 2044struct acpi_spi_lookup {
2045 struct spi_controller *ctlr;
2046 u32 max_speed_hz;
2047 u32 mode;
2048 int irq;
2049 u8 bits_per_word;
2050 u8 chip_select;
2051};
2052
2053static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2054 struct acpi_spi_lookup *lookup)
8a2e487e 2055{
8a2e487e
LW		 2056 const union acpi_object *obj;
2057
2058 if (!x86_apple_machine)
2059 return;
2060
2061 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2062 && obj->buffer.length >= 4)
4c3c5954 2063 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW		 2064
2065 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2066 && obj->buffer.length == 8)
4c3c5954 2067 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW		 2068
2069 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2070 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2071 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW		 2072
2073 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2074 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2075 lookup->mode |= SPI_CPOL;
8a2e487e
LW		 2076
2077 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2078 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2079 lookup->mode |= SPI_CPHA;
8a2e487e
LW		 2080}
2081
64bee4d2
MW		 2082static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2083{
4c3c5954
AB		 2084 struct acpi_spi_lookup *lookup = data;
2085 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW		 2086
2087 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2088 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB		 2089 acpi_handle parent_handle;
2090 acpi_status status;
64bee4d2
MW		 2091
2092 sb = &ares->data.spi_serial_bus;
2093 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954
AB		 2094
2095 status = acpi_get_handle(NULL,
2096 sb->resource_source.string_ptr,
2097 &parent_handle);
2098
b5e3cf41 2099 if (ACPI_FAILURE(status) ||
4c3c5954
AB		 2100 ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2101 return -ENODEV;
2102
a0a90718
MW		 2103 /*
2104 * ACPI DeviceSelection numbering is handled by the
2105 * host controller driver in Windows and can vary
2106 * from driver to driver. In Linux we always expect
2107 * 0 .. max - 1 so we need to ask the driver to
2108 * translate between the two schemes.
2109 */
8caab75f
GU		 2110 if (ctlr->fw_translate_cs) {
2111 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW		 2112 sb->device_selection);
2113 if (cs < 0)
2114 return cs;
4c3c5954 2115 lookup->chip_select = cs;
a0a90718 2116 } else {
4c3c5954 2117 lookup->chip_select = sb->device_selection;
a0a90718
MW		 2118 }
2119
4c3c5954 2120 lookup->max_speed_hz = sb->connection_speed;
64bee4d2
MW		 2121
2122 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2123 lookup->mode |= SPI_CPHA;
64bee4d2 2124 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2125 lookup->mode |= SPI_CPOL;
64bee4d2 2126 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2127 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2128 }
4c3c5954 2129 } else if (lookup->irq < 0) {
64bee4d2
MW		 2130 struct resource r;
2131
2132 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2133 lookup->irq = r.start;
64bee4d2
MW		 2134 }
2135
2136 /* Always tell the ACPI core to skip this resource */
2137 return 1;
2138}
2139
8caab75f 2140static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 2141 struct acpi_device *adev)
64bee4d2 2142{
4c3c5954 2143 acpi_handle parent_handle = NULL;
64bee4d2 2144 struct list_head resource_list;
b28944c6 2145 struct acpi_spi_lookup lookup = {};
64bee4d2
MW		 2146 struct spi_device *spi;
2147 int ret;
2148
7f24467f
OP		 2149 if (acpi_bus_get_status(adev) || !adev->status.present ||
2150 acpi_device_enumerated(adev))
64bee4d2
MW		 2151 return AE_OK;
2152
4c3c5954 2153 lookup.ctlr = ctlr;
4c3c5954 2154 lookup.irq = -1;
64bee4d2
MW		 2155
2156 INIT_LIST_HEAD(&resource_list);
2157 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2158 acpi_spi_add_resource, &lookup);
64bee4d2
MW		 2159 acpi_dev_free_resource_list(&resource_list);
2160
4c3c5954
AB		 2161 if (ret < 0)
2162 /* found SPI in _CRS but it points to another controller */
2163 return AE_OK;
8a2e487e 2164
4c3c5954
AB		 2165 if (!lookup.max_speed_hz &&
2166 !ACPI_FAILURE(acpi_get_parent(adev->handle, &parent_handle)) &&
2167 ACPI_HANDLE(ctlr->dev.parent) == parent_handle) {
2168 /* Apple does not use _CRS but nested devices for SPI slaves */
2169 acpi_spi_parse_apple_properties(adev, &lookup);
2170 }
2171
2172 if (!lookup.max_speed_hz)
64bee4d2 2173 return AE_OK;
4c3c5954
AB		 2174
2175 spi = spi_alloc_device(ctlr);
2176 if (!spi) {
2177 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
2178 dev_name(&adev->dev));
2179 return AE_NO_MEMORY;
64bee4d2
MW		 2180 }
2181
4c3c5954
AB		 2182 ACPI_COMPANION_SET(&spi->dev, adev);
2183 spi->max_speed_hz = lookup.max_speed_hz;
2184 spi->mode = lookup.mode;
2185 spi->irq = lookup.irq;
2186 spi->bits_per_word = lookup.bits_per_word;
2187 spi->chip_select = lookup.chip_select;
2188
0c6543f6
DD		 2189 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2190 sizeof(spi->modalias));
2191
33ada67d
CR		 2192 if (spi->irq < 0)
2193 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2194
7f24467f
OP		 2195 acpi_device_set_enumerated(adev);
2196
33cf00e5 2197 adev->power.flags.ignore_parent = true;
64bee4d2 2198 if (spi_add_device(spi)) {
33cf00e5 2199 adev->power.flags.ignore_parent = false;
8caab75f 2200 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW		 2201 dev_name(&adev->dev));
2202 spi_dev_put(spi);
2203 }
2204
2205 return AE_OK;
2206}
2207
7f24467f
OP		 2208static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2209 void *data, void **return_value)
2210{
8caab75f 2211 struct spi_controller *ctlr = data;
7f24467f
OP		 2212 struct acpi_device *adev;
2213
2214 if (acpi_bus_get_device(handle, &adev))
2215 return AE_OK;
2216
8caab75f 2217 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP		 2218}
2219
4c3c5954
AB		 2220#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2221
8caab75f 2222static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW		 2223{
2224 acpi_status status;
2225 acpi_handle handle;
2226
8caab75f 2227 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW		 2228 if (!handle)
2229 return;
2230
4c3c5954
AB		 2231 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2232 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2233 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2234 if (ACPI_FAILURE(status))
8caab75f 2235 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW		 2236}
2237#else
8caab75f 2238static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW		 2239#endif /* CONFIG_ACPI */
2240
8caab75f 2241static void spi_controller_release(struct device *dev)
8ae12a0d 2242{
8caab75f 2243 struct spi_controller *ctlr;
8ae12a0d 2244
8caab75f
GU		 2245 ctlr = container_of(dev, struct spi_controller, dev);
2246 kfree(ctlr);
8ae12a0d
DB		 2247}
2248
2249static struct class spi_master_class = {
2250 .name = "spi_master",
2251 .owner = THIS_MODULE,
8caab75f 2252 .dev_release = spi_controller_release,
eca2ebc7 2253 .dev_groups = spi_master_groups,
8ae12a0d
DB		 2254};
2255
6c364062
GU		 2256#ifdef CONFIG_SPI_SLAVE
2257/**
2258 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2259 * controller
2260 * @spi: device used for the current transfer
2261 */
2262int spi_slave_abort(struct spi_device *spi)
2263{
8caab75f 2264 struct spi_controller *ctlr = spi->controller;
6c364062 2265
8caab75f
GU		 2266 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2267 return ctlr->slave_abort(ctlr);
6c364062
GU		 2268
2269 return -ENOTSUPP;
2270}
2271EXPORT_SYMBOL_GPL(spi_slave_abort);
2272
2273static int match_true(struct device *dev, void *data)
2274{
2275 return 1;
2276}
2277
cc8b4659
GU		 2278static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2279 char *buf)
6c364062 2280{
8caab75f
GU		 2281 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2282 dev);
6c364062
GU		 2283 struct device *child;
2284
2285 child = device_find_child(&ctlr->dev, NULL, match_true);
2286 return sprintf(buf, "%s\n",
2287 child ? to_spi_device(child)->modalias : NULL);
2288}
2289
cc8b4659
GU		 2290static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2291 const char *buf, size_t count)
6c364062 2292{
8caab75f
GU		 2293 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2294 dev);
6c364062
GU		 2295 struct spi_device *spi;
2296 struct device *child;
2297 char name[32];
2298 int rc;
2299
2300 rc = sscanf(buf, "%31s", name);
2301 if (rc != 1 || !name[0])
2302 return -EINVAL;
2303
2304 child = device_find_child(&ctlr->dev, NULL, match_true);
2305 if (child) {
2306 /* Remove registered slave */
2307 device_unregister(child);
2308 put_device(child);
2309 }
2310
2311 if (strcmp(name, "(null)")) {
2312 /* Register new slave */
2313 spi = spi_alloc_device(ctlr);
2314 if (!spi)
2315 return -ENOMEM;
2316
2317 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2318
2319 rc = spi_add_device(spi);
2320 if (rc) {
2321 spi_dev_put(spi);
2322 return rc;
2323 }
2324 }
2325
2326 return count;
2327}
2328
cc8b4659 2329static DEVICE_ATTR_RW(slave);
6c364062
GU		 2330
2331static struct attribute *spi_slave_attrs[] = {
2332 &dev_attr_slave.attr,
2333 NULL,
2334};
2335
2336static const struct attribute_group spi_slave_group = {
2337 .attrs = spi_slave_attrs,
2338};
2339
2340static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2341 &spi_controller_statistics_group,
6c364062
GU		 2342 &spi_slave_group,
2343 NULL,
2344};
2345
2346static struct class spi_slave_class = {
2347 .name = "spi_slave",
2348 .owner = THIS_MODULE,
8caab75f 2349 .dev_release = spi_controller_release,
6c364062
GU		 2350 .dev_groups = spi_slave_groups,
2351};
2352#else
2353extern struct class spi_slave_class; /* dummy */
2354#endif
8ae12a0d
DB		 2355
2356/**
6c364062 2357 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2358 * @dev: the controller, possibly using the platform_bus
33e34dc6 2359 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW		 2360 * memory is in the driver_data field of the returned device, accessible
2361 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2362 * drivers granting DMA access to portions of their private data need to
2363 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU		 2364 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2365 * slave (true) controller
33e34dc6 2366 * Context: can sleep
8ae12a0d 2367 *
6c364062 2368 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2369 * only ones directly touching chip registers. It's how they allocate
8caab75f 2370 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2371 *
97d56dc6 2372 * This must be called from context that can sleep.
8ae12a0d 2373 *
6c364062 2374 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU		 2375 * controller's methods before calling spi_register_controller(); and (after
2376 * errors adding the device) calling spi_controller_put() to prevent a memory
2377 * leak.
97d56dc6 2378 *
6c364062 2379 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2380 */
8caab75f
GU		 2381struct spi_controller *__spi_alloc_controller(struct device *dev,
2382 unsigned int size, bool slave)
8ae12a0d 2383{
8caab75f 2384 struct spi_controller *ctlr;
229e6af1 2385 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2386
0c868461
DB		 2387 if (!dev)
2388 return NULL;
2389
229e6af1 2390 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2391 if (!ctlr)
8ae12a0d
DB		 2392 return NULL;
2393
8caab75f
GU		 2394 device_initialize(&ctlr->dev);
2395 ctlr->bus_num = -1;
2396 ctlr->num_chipselect = 1;
2397 ctlr->slave = slave;
6c364062 2398 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2399 ctlr->dev.class = &spi_slave_class;
6c364062 2400 else
8caab75f
GU		 2401 ctlr->dev.class = &spi_master_class;
2402 ctlr->dev.parent = dev;
2403 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2404 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2405
8caab75f 2406 return ctlr;
8ae12a0d 2407}
6c364062 2408EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2409
74317984 2410#ifdef CONFIG_OF
43004f31 2411static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984 2412{
e80beb27 2413 int nb, i, *cs;
8caab75f 2414 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV		 2415
2416 if (!np)
2417 return 0;
2418
2419 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2420 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2421
8ec5d84e
AL		 2422 /* Return error only for an incorrectly formed cs-gpios property */
2423 if (nb == 0 || nb == -ENOENT)
74317984 2424 return 0;
8ec5d84e
AL		 2425 else if (nb < 0)
2426 return nb;
74317984 2427
a86854d0 2428 cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int),
74317984 2429 GFP_KERNEL);
8caab75f 2430 ctlr->cs_gpios = cs;
74317984 2431
8caab75f 2432 if (!ctlr->cs_gpios)
74317984
JCPV		 2433 return -ENOMEM;
2434
8caab75f 2435 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2436 cs[i] = -ENOENT;
74317984
JCPV		 2437
2438 for (i = 0; i < nb; i++)
2439 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2440
2441 return 0;
2442}
2443#else
43004f31 2444static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984
JCPV		 2445{
2446 return 0;
2447}
2448#endif
2449
f3186dd8
LW		 2450/**
2451 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2452 * @ctlr: The SPI master to grab GPIO descriptors for
2453 */
2454static int spi_get_gpio_descs(struct spi_controller *ctlr)
2455{
2456 int nb, i;
2457 struct gpio_desc **cs;
2458 struct device *dev = &ctlr->dev;
2459
2460 nb = gpiod_count(dev, "cs");
2461 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
2462
2463 /* No GPIOs at all is fine, else return the error */
2464 if (nb == 0 || nb == -ENOENT)
2465 return 0;
2466 else if (nb < 0)
2467 return nb;
2468
2469 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2470 GFP_KERNEL);
2471 if (!cs)
2472 return -ENOMEM;
2473 ctlr->cs_gpiods = cs;
2474
2475 for (i = 0; i < nb; i++) {
2476 /*
2477 * Most chipselects are active low, the inverted
2478 * semantics are handled by special quirks in gpiolib,
2479 * so initializing them GPIOD_OUT_LOW here means
2480 * "unasserted", in most cases this will drive the physical
2481 * line high.
2482 */
2483 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2484 GPIOD_OUT_LOW);
1723fdec
GU		 2485 if (IS_ERR(cs[i]))
2486 return PTR_ERR(cs[i]);
f3186dd8
LW		 2487
2488 if (cs[i]) {
2489 /*
2490 * If we find a CS GPIO, name it after the device and
2491 * chip select line.
2492 */
2493 char *gpioname;
2494
2495 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2496 dev_name(dev), i);
2497 if (!gpioname)
2498 return -ENOMEM;
2499 gpiod_set_consumer_name(cs[i], gpioname);
2500 }
2501 }
2502
2503 return 0;
2504}
2505
bdf3a3b5
BB		 2506static int spi_controller_check_ops(struct spi_controller *ctlr)
2507{
2508 /*
b5932f5c
BB		 2509 * The controller may implement only the high-level SPI-memory like
2510 * operations if it does not support regular SPI transfers, and this is
2511 * valid use case.
2512 * If ->mem_ops is NULL, we request that at least one of the
2513 * ->transfer_xxx() method be implemented.
bdf3a3b5 2514 */
b5932f5c
BB		 2515 if (ctlr->mem_ops) {
2516 if (!ctlr->mem_ops->exec_op)
2517 return -EINVAL;
2518 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2519 !ctlr->transfer_one_message) {
bdf3a3b5 2520 return -EINVAL;
b5932f5c 2521 }
bdf3a3b5
BB		 2522
2523 return 0;
2524}
2525
8ae12a0d 2526/**
8caab75f
GU		 2527 * spi_register_controller - register SPI master or slave controller
2528 * @ctlr: initialized master, originally from spi_alloc_master() or
2529 * spi_alloc_slave()
33e34dc6 2530 * Context: can sleep
8ae12a0d 2531 *
8caab75f 2532 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2533 * such as the platform bus. The final stage of probe() in that code
8caab75f 2534 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB		 2535 *
2536 * SPI controllers use board specific (often SOC specific) bus numbers,
2537 * and board-specific addressing for SPI devices combines those numbers
2538 * with chip select numbers. Since SPI does not directly support dynamic
2539 * device identification, boards need configuration tables telling which
2540 * chip is at which address.
2541 *
2542 * This must be called from context that can sleep. It returns zero on
8caab75f 2543 * success, else a negative error code (dropping the controller's refcount).
0c868461 2544 * After a successful return, the caller is responsible for calling
8caab75f 2545 * spi_unregister_controller().
97d56dc6
JMC		 2546 *
2547 * Return: zero on success, else a negative error code.
8ae12a0d 2548 */
8caab75f 2549int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2550{
8caab75f 2551 struct device *dev = ctlr->dev.parent;
2b9603a0 2552 struct boardinfo *bi;
b93318a2 2553 int status;
42bdd706 2554 int id, first_dynamic;
8ae12a0d 2555
0c868461
DB		 2556 if (!dev)
2557 return -ENODEV;
2558
bdf3a3b5
BB		 2559 /*
2560 * Make sure all necessary hooks are implemented before registering
2561 * the SPI controller.
2562 */
2563 status = spi_controller_check_ops(ctlr);
2564 if (status)
2565 return status;
2566
04b2d03a
GU		 2567 if (ctlr->bus_num >= 0) {
2568 /* devices with a fixed bus num must check-in with the num */
2569 mutex_lock(&board_lock);
2570 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2571 ctlr->bus_num + 1, GFP_KERNEL);
2572 mutex_unlock(&board_lock);
2573 if (WARN(id < 0, "couldn't get idr"))
2574 return id == -ENOSPC ? -EBUSY : id;
2575 ctlr->bus_num = id;
2576 } else if (ctlr->dev.of_node) {
2577 /* allocate dynamic bus number using Linux idr */
9b61e302
SM		 2578 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2579 if (id >= 0) {
2580 ctlr->bus_num = id;
2581 mutex_lock(&board_lock);
2582 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2583 ctlr->bus_num + 1, GFP_KERNEL);
2584 mutex_unlock(&board_lock);
2585 if (WARN(id < 0, "couldn't get idr"))
2586 return id == -ENOSPC ? -EBUSY : id;
2587 }
2588 }
8caab75f 2589 if (ctlr->bus_num < 0) {
42bdd706
LS		 2590 first_dynamic = of_alias_get_highest_id("spi");
2591 if (first_dynamic < 0)
2592 first_dynamic = 0;
2593 else
2594 first_dynamic++;
2595
9a9a047a 2596 mutex_lock(&board_lock);
42bdd706
LS		 2597 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2598 0, GFP_KERNEL);
9a9a047a
SM		 2599 mutex_unlock(&board_lock);
2600 if (WARN(id < 0, "couldn't get idr"))
2601 return id;
2602 ctlr->bus_num = id;
8ae12a0d 2603 }
8caab75f
GU		 2604 INIT_LIST_HEAD(&ctlr->queue);
2605 spin_lock_init(&ctlr->queue_lock);
2606 spin_lock_init(&ctlr->bus_lock_spinlock);
2607 mutex_init(&ctlr->bus_lock_mutex);
2608 mutex_init(&ctlr->io_mutex);
2609 ctlr->bus_lock_flag = 0;
2610 init_completion(&ctlr->xfer_completion);
2611 if (!ctlr->max_dma_len)
2612 ctlr->max_dma_len = INT_MAX;
cf32b71e 2613
8ae12a0d
DB		 2614 /* register the device, then userspace will see it.
2615 * registration fails if the bus ID is in use.
2616 */
8caab75f 2617 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4
AS		 2618
2619 if (!spi_controller_is_slave(ctlr)) {
2620 if (ctlr->use_gpio_descriptors) {
2621 status = spi_get_gpio_descs(ctlr);
2622 if (status)
2623 return status;
2624 /*
2625 * A controller using GPIO descriptors always
2626 * supports SPI_CS_HIGH if need be.
2627 */
2628 ctlr->mode_bits |= SPI_CS_HIGH;
2629 } else {
2630 /* Legacy code path for GPIOs from DT */
43004f31 2631 status = of_spi_get_gpio_numbers(ctlr);
0a919ae4
AS		 2632 if (status)
2633 return status;
2634 }
2635 }
2636
f9481b08
TA		 2637 /*
2638 * Even if it's just one always-selected device, there must
2639 * be at least one chipselect.
2640 */
2641 if (!ctlr->num_chipselect)
2642 return -EINVAL;
2643
8caab75f 2644 status = device_add(&ctlr->dev);
9b61e302
SM		 2645 if (status < 0) {
2646 /* free bus id */
2647 mutex_lock(&board_lock);
2648 idr_remove(&spi_master_idr, ctlr->bus_num);
2649 mutex_unlock(&board_lock);
8ae12a0d 2650 goto done;
9b61e302
SM		 2651 }
2652 dev_dbg(dev, "registered %s %s\n",
8caab75f 2653 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2654 dev_name(&ctlr->dev));
8ae12a0d 2655
b5932f5c
BB		 2656 /*
2657 * If we're using a queued driver, start the queue. Note that we don't
2658 * need the queueing logic if the driver is only supporting high-level
2659 * memory operations.
2660 */
2661 if (ctlr->transfer) {
8caab75f 2662 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 2663 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 2664 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2665 if (status) {
8caab75f 2666 device_del(&ctlr->dev);
9b61e302
SM		 2667 /* free bus id */
2668 mutex_lock(&board_lock);
2669 idr_remove(&spi_master_idr, ctlr->bus_num);
2670 mutex_unlock(&board_lock);
ffbbdd21
LW		 2671 goto done;
2672 }
2673 }
eca2ebc7 2674 /* add statistics */
8caab75f 2675 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2676
2b9603a0 2677 mutex_lock(&board_lock);
8caab75f 2678 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2679 list_for_each_entry(bi, &board_list, list)
8caab75f 2680 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT		 2681 mutex_unlock(&board_lock);
2682
64bee4d2 2683 /* Register devices from the device tree and ACPI */
8caab75f
GU		 2684 of_register_spi_devices(ctlr);
2685 acpi_register_spi_devices(ctlr);
8ae12a0d
DB		 2686done:
2687 return status;
2688}
8caab75f 2689EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2690
666d5b4c
MB		 2691static void devm_spi_unregister(struct device *dev, void *res)
2692{
8caab75f 2693 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB		 2694}
2695
2696/**
8caab75f
GU		 2697 * devm_spi_register_controller - register managed SPI master or slave
2698 * controller
2699 * @dev: device managing SPI controller
2700 * @ctlr: initialized controller, originally from spi_alloc_master() or
2701 * spi_alloc_slave()
666d5b4c
MB		 2702 * Context: can sleep
2703 *
8caab75f 2704 * Register a SPI device as with spi_register_controller() which will
68b892f1 2705 * automatically be unregistered and freed.
97d56dc6
JMC		 2706 *
2707 * Return: zero on success, else a negative error code.
666d5b4c 2708 */
8caab75f
GU		 2709int devm_spi_register_controller(struct device *dev,
2710 struct spi_controller *ctlr)
666d5b4c 2711{
8caab75f 2712 struct spi_controller **ptr;
666d5b4c
MB		 2713 int ret;
2714
2715 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
2716 if (!ptr)
2717 return -ENOMEM;
2718
8caab75f 2719 ret = spi_register_controller(ctlr);
4b92894e 2720 if (!ret) {
8caab75f 2721 *ptr = ctlr;
666d5b4c
MB		 2722 devres_add(dev, ptr);
2723 } else {
2724 devres_free(ptr);
2725 }
2726
2727 return ret;
2728}
8caab75f 2729EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 2730
34860089 2731static int __unregister(struct device *dev, void *null)
8ae12a0d 2732{
34860089 2733 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB		 2734 return 0;
2735}
2736
2737/**
8caab75f
GU		 2738 * spi_unregister_controller - unregister SPI master or slave controller
2739 * @ctlr: the controller being unregistered
33e34dc6 2740 * Context: can sleep
8ae12a0d 2741 *
8caab75f 2742 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB		 2743 * only ones directly touching chip registers.
2744 *
2745 * This must be called from context that can sleep.
68b892f1
JH		 2746 *
2747 * Note that this function also drops a reference to the controller.
8ae12a0d 2748 */
8caab75f 2749void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 2750{
9b61e302 2751 struct spi_controller *found;
67f7b278 2752 int id = ctlr->bus_num;
89fc9a1a 2753
9b61e302
SM		 2754 /* First make sure that this controller was ever added */
2755 mutex_lock(&board_lock);
67f7b278 2756 found = idr_find(&spi_master_idr, id);
9b61e302 2757 mutex_unlock(&board_lock);
8caab75f
GU		 2758 if (ctlr->queued) {
2759 if (spi_destroy_queue(ctlr))
2760 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 2761 }
2b9603a0 2762 mutex_lock(&board_lock);
8caab75f 2763 list_del(&ctlr->list);
2b9603a0
FT		 2764 mutex_unlock(&board_lock);
2765
ebc37af5 2766 device_for_each_child(&ctlr->dev, NULL, __unregister);
8caab75f 2767 device_unregister(&ctlr->dev);
9b61e302
SM		 2768 /* free bus id */
2769 mutex_lock(&board_lock);
613bd1ea
JN		 2770 if (found == ctlr)
2771 idr_remove(&spi_master_idr, id);
9b61e302 2772 mutex_unlock(&board_lock);
8ae12a0d 2773}
8caab75f 2774EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 2775
8caab75f 2776int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW		 2777{
2778 int ret;
2779
8caab75f
GU		 2780 /* Basically no-ops for non-queued controllers */
2781 if (!ctlr->queued)
ffbbdd21
LW		 2782 return 0;
2783
8caab75f 2784 ret = spi_stop_queue(ctlr);
ffbbdd21 2785 if (ret)
8caab75f 2786 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW		 2787
2788 return ret;
2789}
8caab75f 2790EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 2791
8caab75f 2792int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW		 2793{
2794 int ret;
2795
8caab75f 2796 if (!ctlr->queued)
ffbbdd21
LW		 2797 return 0;
2798
8caab75f 2799 ret = spi_start_queue(ctlr);
ffbbdd21 2800 if (ret)
8caab75f 2801 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW		 2802
2803 return ret;
2804}
8caab75f 2805EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 2806
8caab75f 2807static int __spi_controller_match(struct device *dev, const void *data)
5ed2c832 2808{
8caab75f 2809 struct spi_controller *ctlr;
9f3b795a 2810 const u16 *bus_num = data;
5ed2c832 2811
8caab75f
GU		 2812 ctlr = container_of(dev, struct spi_controller, dev);
2813 return ctlr->bus_num == *bus_num;
5ed2c832
DY		 2814}
2815
8ae12a0d
DB		 2816/**
2817 * spi_busnum_to_master - look up master associated with bus_num
2818 * @bus_num: the master's bus number
33e34dc6 2819 * Context: can sleep
8ae12a0d
DB		 2820 *
2821 * This call may be used with devices that are registered after
2822 * arch init time. It returns a refcounted pointer to the relevant
8caab75f 2823 * spi_controller (which the caller must release), or NULL if there is
8ae12a0d 2824 * no such master registered.
97d56dc6
JMC		 2825 *
2826 * Return: the SPI master structure on success, else NULL.
8ae12a0d 2827 */
8caab75f 2828struct spi_controller *spi_busnum_to_master(u16 bus_num)
8ae12a0d 2829{
49dce689 2830 struct device *dev;
8caab75f 2831 struct spi_controller *ctlr = NULL;
5ed2c832 2832
695794ae 2833 dev = class_find_device(&spi_master_class, NULL, &bus_num,
8caab75f 2834 __spi_controller_match);
5ed2c832 2835 if (dev)
8caab75f 2836 ctlr = container_of(dev, struct spi_controller, dev);
5ed2c832 2837 /* reference got in class_find_device */
8caab75f 2838 return ctlr;
8ae12a0d
DB		 2839}
2840EXPORT_SYMBOL_GPL(spi_busnum_to_master);
2841
d780c371
MS		 2842/*-------------------------------------------------------------------------*/
2843
2844/* Core methods for SPI resource management */
2845
2846/**
2847 * spi_res_alloc - allocate a spi resource that is life-cycle managed
2848 * during the processing of a spi_message while using
2849 * spi_transfer_one
2850 * @spi: the spi device for which we allocate memory
2851 * @release: the release code to execute for this resource
2852 * @size: size to alloc and return
2853 * @gfp: GFP allocation flags
2854 *
2855 * Return: the pointer to the allocated data
2856 *
2857 * This may get enhanced in the future to allocate from a memory pool
8caab75f 2858 * of the @spi_device or @spi_controller to avoid repeated allocations.
d780c371
MS		 2859 */
2860void *spi_res_alloc(struct spi_device *spi,
2861 spi_res_release_t release,
2862 size_t size, gfp_t gfp)
2863{
2864 struct spi_res *sres;
2865
2866 sres = kzalloc(sizeof(*sres) + size, gfp);
2867 if (!sres)
2868 return NULL;
2869
2870 INIT_LIST_HEAD(&sres->entry);
2871 sres->release = release;
2872
2873 return sres->data;
2874}
2875EXPORT_SYMBOL_GPL(spi_res_alloc);
2876
2877/**
2878 * spi_res_free - free an spi resource
2879 * @res: pointer to the custom data of a resource
2880 *
2881 */
2882void spi_res_free(void *res)
2883{
2884 struct spi_res *sres = container_of(res, struct spi_res, data);
2885
2886 if (!res)
2887 return;
2888
2889 WARN_ON(!list_empty(&sres->entry));
2890 kfree(sres);
2891}
2892EXPORT_SYMBOL_GPL(spi_res_free);
2893
2894/**
2895 * spi_res_add - add a spi_res to the spi_message
2896 * @message: the spi message
2897 * @res: the spi_resource
2898 */
2899void spi_res_add(struct spi_message *message, void *res)
2900{
2901 struct spi_res *sres = container_of(res, struct spi_res, data);
2902
2903 WARN_ON(!list_empty(&sres->entry));
2904 list_add_tail(&sres->entry, &message->resources);
2905}
2906EXPORT_SYMBOL_GPL(spi_res_add);
2907
2908/**
2909 * spi_res_release - release all spi resources for this message
8caab75f 2910 * @ctlr: the @spi_controller
d780c371
MS		 2911 * @message: the @spi_message
2912 */
8caab75f 2913void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
d780c371 2914{
f5694369 2915 struct spi_res *res, *tmp;
d780c371 2916
f5694369 2917 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
d780c371 2918 if (res->release)
8caab75f 2919 res->release(ctlr, message, res->data);
d780c371
MS		 2920
2921 list_del(&res->entry);
2922
2923 kfree(res);
2924 }
2925}
2926EXPORT_SYMBOL_GPL(spi_res_release);
8ae12a0d
DB		 2927
2928/*-------------------------------------------------------------------------*/
2929
523baf5a
MS		 2930/* Core methods for spi_message alterations */
2931
8caab75f 2932static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS		 2933 struct spi_message *msg,
2934 void *res)
2935{
2936 struct spi_replaced_transfers *rxfer = res;
2937 size_t i;
2938
2939 /* call extra callback if requested */
2940 if (rxfer->release)
8caab75f 2941 rxfer->release(ctlr, msg, res);
523baf5a
MS		 2942
2943 /* insert replaced transfers back into the message */
2944 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
2945
2946 /* remove the formerly inserted entries */
2947 for (i = 0; i < rxfer->inserted; i++)
2948 list_del(&rxfer->inserted_transfers[i].transfer_list);
2949}
2950
2951/**
2952 * spi_replace_transfers - replace transfers with several transfers
2953 * and register change with spi_message.resources
2954 * @msg: the spi_message we work upon
2955 * @xfer_first: the first spi_transfer we want to replace
2956 * @remove: number of transfers to remove
2957 * @insert: the number of transfers we want to insert instead
2958 * @release: extra release code necessary in some circumstances
2959 * @extradatasize: extra data to allocate (with alignment guarantees
2960 * of struct @spi_transfer)
05885397 2961 * @gfp: gfp flags
523baf5a
MS		 2962 *
2963 * Returns: pointer to @spi_replaced_transfers,
2964 * PTR_ERR(...) in case of errors.
2965 */
2966struct spi_replaced_transfers *spi_replace_transfers(
2967 struct spi_message *msg,
2968 struct spi_transfer *xfer_first,
2969 size_t remove,
2970 size_t insert,
2971 spi_replaced_release_t release,
2972 size_t extradatasize,
2973 gfp_t gfp)
2974{
2975 struct spi_replaced_transfers *rxfer;
2976 struct spi_transfer *xfer;
2977 size_t i;
2978
2979 /* allocate the structure using spi_res */
2980 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 2981 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS		 2982 + extradatasize,
2983 gfp);
2984 if (!rxfer)
2985 return ERR_PTR(-ENOMEM);
2986
2987 /* the release code to invoke before running the generic release */
2988 rxfer->release = release;
2989
2990 /* assign extradata */
2991 if (extradatasize)
2992 rxfer->extradata =
2993 &rxfer->inserted_transfers[insert];
2994
2995 /* init the replaced_transfers list */
2996 INIT_LIST_HEAD(&rxfer->replaced_transfers);
2997
2998 /* assign the list_entry after which we should reinsert
2999 * the @replaced_transfers - it may be spi_message.messages!
3000 */
3001 rxfer->replaced_after = xfer_first->transfer_list.prev;
3002
3003 /* remove the requested number of transfers */
3004 for (i = 0; i < remove; i++) {
3005 /* if the entry after replaced_after it is msg->transfers
3006 * then we have been requested to remove more transfers
3007 * than are in the list
3008 */
3009 if (rxfer->replaced_after->next == &msg->transfers) {
3010 dev_err(&msg->spi->dev,
3011 "requested to remove more spi_transfers than are available\n");
3012 /* insert replaced transfers back into the message */
3013 list_splice(&rxfer->replaced_transfers,
3014 rxfer->replaced_after);
3015
3016 /* free the spi_replace_transfer structure */
3017 spi_res_free(rxfer);
3018
3019 /* and return with an error */
3020 return ERR_PTR(-EINVAL);
3021 }
3022
3023 /* remove the entry after replaced_after from list of
3024 * transfers and add it to list of replaced_transfers
3025 */
3026 list_move_tail(rxfer->replaced_after->next,
3027 &rxfer->replaced_transfers);
3028 }
3029
3030 /* create copy of the given xfer with identical settings
3031 * based on the first transfer to get removed
3032 */
3033 for (i = 0; i < insert; i++) {
3034 /* we need to run in reverse order */
3035 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3036
3037 /* copy all spi_transfer data */
3038 memcpy(xfer, xfer_first, sizeof(*xfer));
3039
3040 /* add to list */
3041 list_add(&xfer->transfer_list, rxfer->replaced_after);
3042
bebcfd27 3043 /* clear cs_change and delay for all but the last */
523baf5a
MS		 3044 if (i) {
3045 xfer->cs_change = false;
3046 xfer->delay_usecs = 0;
bebcfd27 3047 xfer->delay.value = 0;
523baf5a
MS		 3048 }
3049 }
3050
3051 /* set up inserted */
3052 rxfer->inserted = insert;
3053
3054 /* and register it with spi_res/spi_message */
3055 spi_res_add(msg, rxfer);
3056
3057 return rxfer;
3058}
3059EXPORT_SYMBOL_GPL(spi_replace_transfers);
3060
8caab75f 3061static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE		 3062 struct spi_message *msg,
3063 struct spi_transfer **xferp,
3064 size_t maxsize,
3065 gfp_t gfp)
d9f12122
MS		 3066{
3067 struct spi_transfer *xfer = *xferp, *xfers;
3068 struct spi_replaced_transfers *srt;
3069 size_t offset;
3070 size_t count, i;
3071
d9f12122
MS		 3072 /* calculate how many we have to replace */
3073 count = DIV_ROUND_UP(xfer->len, maxsize);
3074
3075 /* create replacement */
3076 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC		 3077 if (IS_ERR(srt))
3078 return PTR_ERR(srt);
d9f12122
MS		 3079 xfers = srt->inserted_transfers;
3080
3081 /* now handle each of those newly inserted spi_transfers
3082 * note that the replacements spi_transfers all are preset
3083 * to the same values as *xferp, so tx_buf, rx_buf and len
3084 * are all identical (as well as most others)
3085 * so we just have to fix up len and the pointers.
3086 *
3087 * this also includes support for the depreciated
3088 * spi_message.is_dma_mapped interface
3089 */
3090
3091 /* the first transfer just needs the length modified, so we
3092 * run it outside the loop
3093 */
c8dab77a 3094 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS		 3095
3096 /* all the others need rx_buf/tx_buf also set */
3097 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3098 /* update rx_buf, tx_buf and dma */
3099 if (xfers[i].rx_buf)
3100 xfers[i].rx_buf += offset;
3101 if (xfers[i].rx_dma)
3102 xfers[i].rx_dma += offset;
3103 if (xfers[i].tx_buf)
3104 xfers[i].tx_buf += offset;
3105 if (xfers[i].tx_dma)
3106 xfers[i].tx_dma += offset;
3107
3108 /* update length */
3109 xfers[i].len = min(maxsize, xfers[i].len - offset);
3110 }
3111
3112 /* we set up xferp to the last entry we have inserted,
3113 * so that we skip those already split transfers
3114 */
3115 *xferp = &xfers[count - 1];
3116
3117 /* increment statistics counters */
8caab75f 3118 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS		 3119 transfers_split_maxsize);
3120 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
3121 transfers_split_maxsize);
3122
3123 return 0;
3124}
3125
3126/**
3127 * spi_split_tranfers_maxsize - split spi transfers into multiple transfers
3128 * when an individual transfer exceeds a
3129 * certain size
8caab75f 3130 * @ctlr: the @spi_controller for this transfer
3700ce95
MI		 3131 * @msg: the @spi_message to transform
3132 * @maxsize: the maximum when to apply this
10f11a22 3133 * @gfp: GFP allocation flags
d9f12122
MS		 3134 *
3135 * Return: status of transformation
3136 */
8caab75f 3137int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS		 3138 struct spi_message *msg,
3139 size_t maxsize,
3140 gfp_t gfp)
3141{
3142 struct spi_transfer *xfer;
3143 int ret;
3144
3145 /* iterate over the transfer_list,
3146 * but note that xfer is advanced to the last transfer inserted
3147 * to avoid checking sizes again unnecessarily (also xfer does
3148 * potentiall belong to a different list by the time the
3149 * replacement has happened
3150 */
3151 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3152 if (xfer->len > maxsize) {
8caab75f
GU		 3153 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3154 maxsize, gfp);
d9f12122
MS		 3155 if (ret)
3156 return ret;
3157 }
3158 }
3159
3160 return 0;
3161}
3162EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB		 3163
3164/*-------------------------------------------------------------------------*/
3165
8caab75f 3166/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB		 3167 * other core methods are currently defined as inline functions.
3168 */
3169
8caab75f
GU		 3170static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3171 u8 bits_per_word)
63ab645f 3172{
8caab75f 3173 if (ctlr->bits_per_word_mask) {
63ab645f
SB		 3174 /* Only 32 bits fit in the mask */
3175 if (bits_per_word > 32)
3176 return -EINVAL;
8caab75f 3177 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB		 3178 return -EINVAL;
3179 }
3180
3181 return 0;
3182}
3183
7d077197
DB		 3184/**
3185 * spi_setup - setup SPI mode and clock rate
3186 * @spi: the device whose settings are being modified
3187 * Context: can sleep, and no requests are queued to the device
3188 *
3189 * SPI protocol drivers may need to update the transfer mode if the
3190 * device doesn't work with its default. They may likewise need
3191 * to update clock rates or word sizes from initial values. This function
3192 * changes those settings, and must be called from a context that can sleep.
3193 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3194 * effect the next time the device is selected and data is transferred to
3195 * or from it. When this function returns, the spi device is deselected.
3196 *
3197 * Note that this call will fail if the protocol driver specifies an option
3198 * that the underlying controller or its driver does not support. For
3199 * example, not all hardware supports wire transfers using nine bit words,
3200 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC		 3201 *
3202 * Return: zero on success, else a negative error code.
7d077197
DB		 3203 */
3204int spi_setup(struct spi_device *spi)
3205{
83596fbe 3206 unsigned bad_bits, ugly_bits;
5ab8d262 3207 int status;
7d077197 3208
f477b7fb 3209 /* check mode to prevent that DUAL and QUAD set at the same time
3210 */
3211 if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
3212 ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
3213 dev_err(&spi->dev,
3214 "setup: can not select dual and quad at the same time\n");
3215 return -EINVAL;
3216 }
3217 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
3218 */
3219 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG		 3220 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3221 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3222 return -EINVAL;
e7db06b5 3223 /* help drivers fail *cleanly* when they need options
8caab75f 3224 * that aren't supported with their current controller
cbaa62e0
DL		 3225 * SPI_CS_WORD has a fallback software implementation,
3226 * so it is ignored here.
e7db06b5 3227 */
cbaa62e0 3228 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD);
d61ad23c
SS		 3229 /* nothing prevents from working with active-high CS in case if it
3230 * is driven by GPIO.
3231 */
3232 if (gpio_is_valid(spi->cs_gpio))
3233 bad_bits &= ~SPI_CS_HIGH;
83596fbe 3234 ugly_bits = bad_bits &
6b03061f
YNG		 3235 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3236 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU		 3237 if (ugly_bits) {
3238 dev_warn(&spi->dev,
3239 "setup: ignoring unsupported mode bits %x\n",
3240 ugly_bits);
3241 spi->mode &= ~ugly_bits;
3242 bad_bits &= ~ugly_bits;
3243 }
e7db06b5 3244 if (bad_bits) {
eb288a1f 3245 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB		 3246 bad_bits);
3247 return -EINVAL;
3248 }
3249
7d077197
DB		 3250 if (!spi->bits_per_word)
3251 spi->bits_per_word = 8;
3252
8caab75f
GU		 3253 status = __spi_validate_bits_per_word(spi->controller,
3254 spi->bits_per_word);
5ab8d262
AS		 3255 if (status)
3256 return status;
63ab645f 3257
052eb2d4 3258 if (!spi->max_speed_hz)
8caab75f 3259 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3260
8caab75f
GU		 3261 if (spi->controller->setup)
3262 status = spi->controller->setup(spi);
7d077197 3263
d948e6ca
LX		 3264 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
3265 status = pm_runtime_get_sync(spi->controller->dev.parent);
3266 if (status < 0) {
3267 pm_runtime_put_noidle(spi->controller->dev.parent);
3268 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3269 status);
3270 return status;
3271 }
3272 spi_set_cs(spi, false);
3273 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3274 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3275 } else {
3276 spi_set_cs(spi, false);
3277 }
abeedb01 3278
924b5867
DA		 3279 if (spi->rt && !spi->controller->rt) {
3280 spi->controller->rt = true;
3281 spi_set_thread_rt(spi->controller);
3282 }
3283
5fe5f05e 3284 dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
7d077197
DB		 3285 (int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
3286 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3287 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3288 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3289 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3290 spi->bits_per_word, spi->max_speed_hz,
3291 status);
3292
3293 return status;
3294}
3295EXPORT_SYMBOL_GPL(spi_setup);
3296
f1ca9992
SK		 3297/**
3298 * spi_set_cs_timing - configure CS setup, hold, and inactive delays
3299 * @spi: the device that requires specific CS timing configuration
81059366
AA		 3300 * @setup: CS setup time specified via @spi_delay
3301 * @hold: CS hold time specified via @spi_delay
3302 * @inactive: CS inactive delay between transfers specified via @spi_delay
3303 *
3304 * Return: zero on success, else a negative error code.
f1ca9992 3305 */
81059366
AA		 3306int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup,
3307 struct spi_delay *hold, struct spi_delay *inactive)
f1ca9992 3308{
25093bde
AA		 3309 size_t len;
3310
f1ca9992 3311 if (spi->controller->set_cs_timing)
81059366
AA		 3312 return spi->controller->set_cs_timing(spi, setup, hold,
3313 inactive);
25093bde
AA		 3314
3315 if ((setup && setup->unit == SPI_DELAY_UNIT_SCK) ||
3316 (hold && hold->unit == SPI_DELAY_UNIT_SCK) ||
3317 (inactive && inactive->unit == SPI_DELAY_UNIT_SCK)) {
3318 dev_err(&spi->dev,
3319 "Clock-cycle delays for CS not supported in SW mode\n");
3320 return -ENOTSUPP;
3321 }
3322
3323 len = sizeof(struct spi_delay);
3324
3325 /* copy delays to controller */
3326 if (setup)
3327 memcpy(&spi->controller->cs_setup, setup, len);
3328 else
3329 memset(&spi->controller->cs_setup, 0, len);
3330
3331 if (hold)
3332 memcpy(&spi->controller->cs_hold, hold, len);
3333 else
3334 memset(&spi->controller->cs_hold, 0, len);
3335
3336 if (inactive)
3337 memcpy(&spi->controller->cs_inactive, inactive, len);
3338 else
3339 memset(&spi->controller->cs_inactive, 0, len);
3340
3341 return 0;
f1ca9992
SK		 3342}
3343EXPORT_SYMBOL_GPL(spi_set_cs_timing);
3344
6c613f68
AA		 3345static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3346 struct spi_device *spi)
3347{
3348 int delay1, delay2;
3349
3984d39b 3350 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA		 3351 if (delay1 < 0)
3352 return delay1;
3353
3984d39b 3354 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA		 3355 if (delay2 < 0)
3356 return delay2;
3357
3358 if (delay1 < delay2)
3359 memcpy(&xfer->word_delay, &spi->word_delay,
3360 sizeof(xfer->word_delay));
3361
3362 return 0;
3363}
3364
90808738 3365static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3366{
8caab75f 3367 struct spi_controller *ctlr = spi->controller;
e6811d1d 3368 struct spi_transfer *xfer;
6ea31293 3369 int w_size;
cf32b71e 3370
24a0013a
MB		 3371 if (list_empty(&message->transfers))
3372 return -EINVAL;
24a0013a 3373
cbaa62e0 3374 /* If an SPI controller does not support toggling the CS line on each
71388b21
DL		 3375 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3376 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL		 3377 * splitting transfers into one-word transfers and ensuring that
3378 * cs_change is set for each transfer.
3379 */
71388b21 3380 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f3186dd8 3381 spi->cs_gpiod ||
71388b21 3382 gpio_is_valid(spi->cs_gpio))) {
cbaa62e0
DL		 3383 size_t maxsize;
3384 int ret;
3385
3386 maxsize = (spi->bits_per_word + 7) / 8;
3387
3388 /* spi_split_transfers_maxsize() requires message->spi */
3389 message->spi = spi;
3390
3391 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3392 GFP_KERNEL);
3393 if (ret)
3394 return ret;
3395
3396 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3397 /* don't change cs_change on the last entry in the list */
3398 if (list_is_last(&xfer->transfer_list, &message->transfers))
3399 break;
3400 xfer->cs_change = 1;
3401 }
3402 }
3403
cf32b71e
ES		 3404 /* Half-duplex links include original MicroWire, and ones with
3405 * only one data pin like SPI_3WIRE (switches direction) or where
3406 * either MOSI or MISO is missing. They can also be caused by
3407 * software limitations.
3408 */
8caab75f
GU		 3409 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3410 (spi->mode & SPI_3WIRE)) {
3411 unsigned flags = ctlr->flags;
cf32b71e
ES		 3412
3413 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3414 if (xfer->rx_buf && xfer->tx_buf)
3415 return -EINVAL;
8caab75f 3416 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3417 return -EINVAL;
8caab75f 3418 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES		 3419 return -EINVAL;
3420 }
3421 }
3422
e6811d1d 3423 /**
059b8ffe
LD		 3424 * Set transfer bits_per_word and max speed as spi device default if
3425 * it is not set for this transfer.
f477b7fb 3426 * Set transfer tx_nbits and rx_nbits as single transfer default
3427 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB		 3428 * Ensure transfer word_delay is at least as long as that required by
3429 * device itself.
e6811d1d 3430 */
77e80588 3431 message->frame_length = 0;
e6811d1d 3432 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3433 xfer->effective_speed_hz = 0;
078726ce 3434 message->frame_length += xfer->len;
e6811d1d
LD		 3435 if (!xfer->bits_per_word)
3436 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL		 3437
3438 if (!xfer->speed_hz)
059b8ffe 3439 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3440
8caab75f
GU		 3441 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3442 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3443
8caab75f 3444 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3445 return -EINVAL;
a2fd4f9f 3446
4d94bd21
II		 3447 /*
3448 * SPI transfer length should be multiple of SPI word size
3449 * where SPI word size should be power-of-two multiple
3450 */
3451 if (xfer->bits_per_word <= 8)
3452 w_size = 1;
3453 else if (xfer->bits_per_word <= 16)
3454 w_size = 2;
3455 else
3456 w_size = 4;
3457
4d94bd21 3458 /* No partial transfers accepted */
6ea31293 3459 if (xfer->len % w_size)
4d94bd21
II		 3460 return -EINVAL;
3461
8caab75f
GU		 3462 if (xfer->speed_hz && ctlr->min_speed_hz &&
3463 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3464 return -EINVAL;
f477b7fb 3465
3466 if (xfer->tx_buf && !xfer->tx_nbits)
3467 xfer->tx_nbits = SPI_NBITS_SINGLE;
3468 if (xfer->rx_buf && !xfer->rx_nbits)
3469 xfer->rx_nbits = SPI_NBITS_SINGLE;
3470 /* check transfer tx/rx_nbits:
1afd9989
GU		 3471 * 1. check the value matches one of single, dual and quad
3472 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3473 */
db90a441
SP		 3474 if (xfer->tx_buf) {
3475 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3476 xfer->tx_nbits != SPI_NBITS_DUAL &&
3477 xfer->tx_nbits != SPI_NBITS_QUAD)
3478 return -EINVAL;
3479 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3480 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3481 return -EINVAL;
3482 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3483 !(spi->mode & SPI_TX_QUAD))
3484 return -EINVAL;
db90a441 3485 }
f477b7fb 3486 /* check transfer rx_nbits */
db90a441
SP		 3487 if (xfer->rx_buf) {
3488 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3489 xfer->rx_nbits != SPI_NBITS_DUAL &&
3490 xfer->rx_nbits != SPI_NBITS_QUAD)
3491 return -EINVAL;
3492 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3493 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3494 return -EINVAL;
3495 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3496 !(spi->mode & SPI_RX_QUAD))
3497 return -EINVAL;
db90a441 3498 }
b7bb367a 3499
6c613f68
AA		 3500 if (_spi_xfer_word_delay_update(xfer, spi))
3501 return -EINVAL;
e6811d1d
LD		 3502 }
3503
cf32b71e 3504 message->status = -EINPROGRESS;
90808738
MB		 3505
3506 return 0;
3507}
3508
3509static int __spi_async(struct spi_device *spi, struct spi_message *message)
3510{
8caab75f 3511 struct spi_controller *ctlr = spi->controller;
b42faeee 3512 struct spi_transfer *xfer;
90808738 3513
b5932f5c
BB		 3514 /*
3515 * Some controllers do not support doing regular SPI transfers. Return
3516 * ENOTSUPP when this is the case.
3517 */
3518 if (!ctlr->transfer)
3519 return -ENOTSUPP;
3520
90808738
MB		 3521 message->spi = spi;
3522
8caab75f 3523 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS		 3524 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
3525
90808738
MB		 3526 trace_spi_message_submit(message);
3527
b42faeee
VO		 3528 if (!ctlr->ptp_sts_supported) {
3529 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3530 xfer->ptp_sts_word_pre = 0;
3531 ptp_read_system_prets(xfer->ptp_sts);
3532 }
3533 }
3534
8caab75f 3535 return ctlr->transfer(spi, message);
cf32b71e
ES		 3536}
3537
568d0697
DB		 3538/**
3539 * spi_async - asynchronous SPI transfer
3540 * @spi: device with which data will be exchanged
3541 * @message: describes the data transfers, including completion callback
3542 * Context: any (irqs may be blocked, etc)
3543 *
3544 * This call may be used in_irq and other contexts which can't sleep,
3545 * as well as from task contexts which can sleep.
3546 *
3547 * The completion callback is invoked in a context which can't sleep.
3548 * Before that invocation, the value of message->status is undefined.
3549 * When the callback is issued, message->status holds either zero (to
3550 * indicate complete success) or a negative error code. After that
3551 * callback returns, the driver which issued the transfer request may
3552 * deallocate the associated memory; it's no longer in use by any SPI
3553 * core or controller driver code.
3554 *
3555 * Note that although all messages to a spi_device are handled in
3556 * FIFO order, messages may go to different devices in other orders.
3557 * Some device might be higher priority, or have various "hard" access
3558 * time requirements, for example.
3559 *
3560 * On detection of any fault during the transfer, processing of
3561 * the entire message is aborted, and the device is deselected.
3562 * Until returning from the associated message completion callback,
3563 * no other spi_message queued to that device will be processed.
3564 * (This rule applies equally to all the synchronous transfer calls,
3565 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 3566 *
3567 * Return: zero on success, else a negative error code.
568d0697
DB		 3568 */
3569int spi_async(struct spi_device *spi, struct spi_message *message)
3570{
8caab75f 3571 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 3572 int ret;
3573 unsigned long flags;
568d0697 3574
90808738
MB		 3575 ret = __spi_validate(spi, message);
3576 if (ret != 0)
3577 return ret;
3578
8caab75f 3579 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3580
8caab75f 3581 if (ctlr->bus_lock_flag)
cf32b71e
ES		 3582 ret = -EBUSY;
3583 else
3584 ret = __spi_async(spi, message);
568d0697 3585
8caab75f 3586 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3587
3588 return ret;
568d0697
DB		 3589}
3590EXPORT_SYMBOL_GPL(spi_async);
3591
cf32b71e
ES		 3592/**
3593 * spi_async_locked - version of spi_async with exclusive bus usage
3594 * @spi: device with which data will be exchanged
3595 * @message: describes the data transfers, including completion callback
3596 * Context: any (irqs may be blocked, etc)
3597 *
3598 * This call may be used in_irq and other contexts which can't sleep,
3599 * as well as from task contexts which can sleep.
3600 *
3601 * The completion callback is invoked in a context which can't sleep.
3602 * Before that invocation, the value of message->status is undefined.
3603 * When the callback is issued, message->status holds either zero (to
3604 * indicate complete success) or a negative error code. After that
3605 * callback returns, the driver which issued the transfer request may
3606 * deallocate the associated memory; it's no longer in use by any SPI
3607 * core or controller driver code.
3608 *
3609 * Note that although all messages to a spi_device are handled in
3610 * FIFO order, messages may go to different devices in other orders.
3611 * Some device might be higher priority, or have various "hard" access
3612 * time requirements, for example.
3613 *
3614 * On detection of any fault during the transfer, processing of
3615 * the entire message is aborted, and the device is deselected.
3616 * Until returning from the associated message completion callback,
3617 * no other spi_message queued to that device will be processed.
3618 * (This rule applies equally to all the synchronous transfer calls,
3619 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 3620 *
3621 * Return: zero on success, else a negative error code.
cf32b71e
ES		 3622 */
3623int spi_async_locked(struct spi_device *spi, struct spi_message *message)
3624{
8caab75f 3625 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 3626 int ret;
3627 unsigned long flags;
3628
90808738
MB		 3629 ret = __spi_validate(spi, message);
3630 if (ret != 0)
3631 return ret;
3632
8caab75f 3633 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3634
3635 ret = __spi_async(spi, message);
3636
8caab75f 3637 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3638
3639 return ret;
3640
3641}
3642EXPORT_SYMBOL_GPL(spi_async_locked);
3643
7d077197
DB		 3644/*-------------------------------------------------------------------------*/
3645
8caab75f 3646/* Utility methods for SPI protocol drivers, layered on
7d077197
DB		 3647 * top of the core. Some other utility methods are defined as
3648 * inline functions.
3649 */
3650
5d870c8e
AM		 3651static void spi_complete(void *arg)
3652{
3653 complete(arg);
3654}
3655
ef4d96ec 3656static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES		 3657{
3658 DECLARE_COMPLETION_ONSTACK(done);
3659 int status;
8caab75f 3660 struct spi_controller *ctlr = spi->controller;
0461a414
MB		 3661 unsigned long flags;
3662
3663 status = __spi_validate(spi, message);
3664 if (status != 0)
3665 return status;
cf32b71e
ES		 3666
3667 message->complete = spi_complete;
3668 message->context = &done;
0461a414 3669 message->spi = spi;
cf32b71e 3670
8caab75f 3671 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS		 3672 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3673
0461a414
MB		 3674 /* If we're not using the legacy transfer method then we will
3675 * try to transfer in the calling context so special case.
3676 * This code would be less tricky if we could remove the
3677 * support for driver implemented message queues.
3678 */
8caab75f
GU		 3679 if (ctlr->transfer == spi_queued_transfer) {
3680 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB		 3681
3682 trace_spi_message_submit(message);
3683
3684 status = __spi_queued_transfer(spi, message, false);
3685
8caab75f 3686 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB		 3687 } else {
3688 status = spi_async_locked(spi, message);
3689 }
cf32b71e 3690
cf32b71e 3691 if (status == 0) {
0461a414
MB		 3692 /* Push out the messages in the calling context if we
3693 * can.
3694 */
8caab75f
GU		 3695 if (ctlr->transfer == spi_queued_transfer) {
3696 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS		 3697 spi_sync_immediate);
3698 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3699 spi_sync_immediate);
8caab75f 3700 __spi_pump_messages(ctlr, false);
eca2ebc7 3701 }
0461a414 3702
cf32b71e
ES		 3703 wait_for_completion(&done);
3704 status = message->status;
3705 }
3706 message->context = NULL;
3707 return status;
3708}
3709
8ae12a0d
DB		 3710/**
3711 * spi_sync - blocking/synchronous SPI data transfers
3712 * @spi: device with which data will be exchanged
3713 * @message: describes the data transfers
33e34dc6 3714 * Context: can sleep
8ae12a0d
DB		 3715 *
3716 * This call may only be used from a context that may sleep. The sleep
3717 * is non-interruptible, and has no timeout. Low-overhead controller
3718 * drivers may DMA directly into and out of the message buffers.
3719 *
3720 * Note that the SPI device's chip select is active during the message,
3721 * and then is normally disabled between messages. Drivers for some
3722 * frequently-used devices may want to minimize costs of selecting a chip,
3723 * by leaving it selected in anticipation that the next message will go
3724 * to the same chip. (That may increase power usage.)
3725 *
0c868461
DB		 3726 * Also, the caller is guaranteeing that the memory associated with the
3727 * message will not be freed before this call returns.
3728 *
97d56dc6 3729 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 3730 */
3731int spi_sync(struct spi_device *spi, struct spi_message *message)
3732{
ef4d96ec
MB		 3733 int ret;
3734
8caab75f 3735 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3736 ret = __spi_sync(spi, message);
8caab75f 3737 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB		 3738
3739 return ret;
8ae12a0d
DB		 3740}
3741EXPORT_SYMBOL_GPL(spi_sync);
3742
cf32b71e
ES		 3743/**
3744 * spi_sync_locked - version of spi_sync with exclusive bus usage
3745 * @spi: device with which data will be exchanged
3746 * @message: describes the data transfers
3747 * Context: can sleep
3748 *
3749 * This call may only be used from a context that may sleep. The sleep
3750 * is non-interruptible, and has no timeout. Low-overhead controller
3751 * drivers may DMA directly into and out of the message buffers.
3752 *
3753 * This call should be used by drivers that require exclusive access to the
25985edc 3754 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES		 3755 * be released by a spi_bus_unlock call when the exclusive access is over.
3756 *
97d56dc6 3757 * Return: zero on success, else a negative error code.
cf32b71e
ES		 3758 */
3759int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3760{
ef4d96ec 3761 return __spi_sync(spi, message);
cf32b71e
ES		 3762}
3763EXPORT_SYMBOL_GPL(spi_sync_locked);
3764
3765/**
3766 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3767 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES		 3768 * Context: can sleep
3769 *
3770 * This call may only be used from a context that may sleep. The sleep
3771 * is non-interruptible, and has no timeout.
3772 *
3773 * This call should be used by drivers that require exclusive access to the
3774 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3775 * exclusive access is over. Data transfer must be done by spi_sync_locked
3776 * and spi_async_locked calls when the SPI bus lock is held.
3777 *
97d56dc6 3778 * Return: always zero.
cf32b71e 3779 */
8caab75f 3780int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES		 3781{
3782 unsigned long flags;
3783
8caab75f 3784 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3785
8caab75f
GU		 3786 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3787 ctlr->bus_lock_flag = 1;
3788 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3789
3790 /* mutex remains locked until spi_bus_unlock is called */
3791
3792 return 0;
3793}
3794EXPORT_SYMBOL_GPL(spi_bus_lock);
3795
3796/**
3797 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3798 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES		 3799 * Context: can sleep
3800 *
3801 * This call may only be used from a context that may sleep. The sleep
3802 * is non-interruptible, and has no timeout.
3803 *
3804 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3805 * call.
3806 *
97d56dc6 3807 * Return: always zero.
cf32b71e 3808 */
8caab75f 3809int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3810{
8caab75f 3811 ctlr->bus_lock_flag = 0;
cf32b71e 3812
8caab75f 3813 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES		 3814
3815 return 0;
3816}
3817EXPORT_SYMBOL_GPL(spi_bus_unlock);
3818
a9948b61 3819/* portable code must never pass more than 32 bytes */
5fe5f05e 3820#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB		 3821
3822static u8 *buf;
3823
3824/**
3825 * spi_write_then_read - SPI synchronous write followed by read
3826 * @spi: device with which data will be exchanged
3827 * @txbuf: data to be written (need not be dma-safe)
3828 * @n_tx: size of txbuf, in bytes
27570497
JP		 3829 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3830 * @n_rx: size of rxbuf, in bytes
33e34dc6 3831 * Context: can sleep
8ae12a0d
DB		 3832 *
3833 * This performs a half duplex MicroWire style transaction with the
3834 * device, sending txbuf and then reading rxbuf. The return value
3835 * is zero for success, else a negative errno status code.
b885244e 3836 * This call may only be used from a context that may sleep.
8ae12a0d 3837 *
0c868461 3838 * Parameters to this routine are always copied using a small buffer;
33e34dc6
DB		 3839 * portable code should never use this for more than 32 bytes.
3840 * Performance-sensitive or bulk transfer code should instead use
0c868461 3841 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC		 3842 *
3843 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 3844 */
3845int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB		 3846 const void *txbuf, unsigned n_tx,
3847 void *rxbuf, unsigned n_rx)
8ae12a0d 3848{
068f4070 3849 static DEFINE_MUTEX(lock);
8ae12a0d
DB		 3850
3851 int status;
3852 struct spi_message message;
bdff549e 3853 struct spi_transfer x[2];
8ae12a0d
DB		 3854 u8 *local_buf;
3855
b3a223ee
MB		 3856 /* Use preallocated DMA-safe buffer if we can. We can't avoid
3857 * copying here, (as a pure convenience thing), but we can
3858 * keep heap costs out of the hot path unless someone else is
3859 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 3860 */
b3a223ee 3861 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB		 3862 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
3863 GFP_KERNEL | GFP_DMA);
b3a223ee
MB		 3864 if (!local_buf)
3865 return -ENOMEM;
3866 } else {
3867 local_buf = buf;
3868 }
8ae12a0d 3869
8275c642 3870 spi_message_init(&message);
5fe5f05e 3871 memset(x, 0, sizeof(x));
bdff549e
DB		 3872 if (n_tx) {
3873 x[0].len = n_tx;
3874 spi_message_add_tail(&x[0], &message);
3875 }
3876 if (n_rx) {
3877 x[1].len = n_rx;
3878 spi_message_add_tail(&x[1], &message);
3879 }
8275c642 3880
8ae12a0d 3881 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB		 3882 x[0].tx_buf = local_buf;
3883 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB		 3884
3885 /* do the i/o */
8ae12a0d 3886 status = spi_sync(spi, &message);
9b938b74 3887 if (status == 0)
bdff549e 3888 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 3889
bdff549e 3890 if (x[0].tx_buf == buf)
068f4070 3891 mutex_unlock(&lock);
8ae12a0d
DB		 3892 else
3893 kfree(local_buf);
3894
3895 return status;
3896}
3897EXPORT_SYMBOL_GPL(spi_write_then_read);
3898
3899/*-------------------------------------------------------------------------*/
3900
5f143af7 3901#if IS_ENABLED(CONFIG_OF)
ce79d54a 3902/* must call put_device() when done with returned spi_device device */
5f143af7 3903struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 3904{
cfba5de9
SP		 3905 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
3906
ce79d54a
PA		 3907 return dev ? to_spi_device(dev) : NULL;
3908}
5f143af7
MF		 3909EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
3910#endif /* IS_ENABLED(CONFIG_OF) */
ce79d54a 3911
5f143af7 3912#if IS_ENABLED(CONFIG_OF_DYNAMIC)
8caab75f
GU		 3913/* the spi controllers are not using spi_bus, so we find it with another way */
3914static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA		 3915{
3916 struct device *dev;
3917
cfba5de9 3918 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 3919 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 3920 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA		 3921 if (!dev)
3922 return NULL;
3923
3924 /* reference got in class_find_device */
8caab75f 3925 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA		 3926}
3927
3928static int of_spi_notify(struct notifier_block *nb, unsigned long action,
3929 void *arg)
3930{
3931 struct of_reconfig_data *rd = arg;
8caab75f 3932 struct spi_controller *ctlr;
ce79d54a
PA		 3933 struct spi_device *spi;
3934
3935 switch (of_reconfig_get_state_change(action, arg)) {
3936 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU		 3937 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
3938 if (ctlr == NULL)
ce79d54a
PA		 3939 return NOTIFY_OK; /* not for us */
3940
bd6c1644 3941 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 3942 put_device(&ctlr->dev);
bd6c1644
GU		 3943 return NOTIFY_OK;
3944 }
3945
8caab75f
GU		 3946 spi = of_register_spi_device(ctlr, rd->dn);
3947 put_device(&ctlr->dev);
ce79d54a
PA		 3948
3949 if (IS_ERR(spi)) {
25c56c88
RH		 3950 pr_err("%s: failed to create for '%pOF'\n",
3951 __func__, rd->dn);
e0af98a7 3952 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA		 3953 return notifier_from_errno(PTR_ERR(spi));
3954 }
3955 break;
3956
3957 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU		 3958 /* already depopulated? */
3959 if (!of_node_check_flag(rd->dn, OF_POPULATED))
3960 return NOTIFY_OK;
3961
ce79d54a
PA		 3962 /* find our device by node */
3963 spi = of_find_spi_device_by_node(rd->dn);
3964 if (spi == NULL)
3965 return NOTIFY_OK; /* no? not meant for us */
3966
3967 /* unregister takes one ref away */
3968 spi_unregister_device(spi);
3969
3970 /* and put the reference of the find */
3971 put_device(&spi->dev);
3972 break;
3973 }
3974
3975 return NOTIFY_OK;
3976}
3977
3978static struct notifier_block spi_of_notifier = {
3979 .notifier_call = of_spi_notify,
3980};
3981#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3982extern struct notifier_block spi_of_notifier;
3983#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
3984
7f24467f 3985#if IS_ENABLED(CONFIG_ACPI)
8caab75f 3986static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP		 3987{
3988 return ACPI_COMPANION(dev->parent) == data;
3989}
3990
8caab75f 3991static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP		 3992{
3993 struct device *dev;
3994
3995 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 3996 spi_acpi_controller_match);
6c364062
GU		 3997 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
3998 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 3999 spi_acpi_controller_match);
7f24467f
OP		 4000 if (!dev)
4001 return NULL;
4002
8caab75f 4003 return container_of(dev, struct spi_controller, dev);
7f24467f
OP		 4004}
4005
4006static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4007{
4008 struct device *dev;
4009
00500147 4010 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
7f24467f
OP		 4011 return dev ? to_spi_device(dev) : NULL;
4012}
4013
4014static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4015 void *arg)
4016{
4017 struct acpi_device *adev = arg;
8caab75f 4018 struct spi_controller *ctlr;
7f24467f
OP		 4019 struct spi_device *spi;
4020
4021 switch (value) {
4022 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU		 4023 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4024 if (!ctlr)
7f24467f
OP		 4025 break;
4026
8caab75f
GU		 4027 acpi_register_spi_device(ctlr, adev);
4028 put_device(&ctlr->dev);
7f24467f
OP		 4029 break;
4030 case ACPI_RECONFIG_DEVICE_REMOVE:
4031 if (!acpi_device_enumerated(adev))
4032 break;
4033
4034 spi = acpi_spi_find_device_by_adev(adev);
4035 if (!spi)
4036 break;
4037
4038 spi_unregister_device(spi);
4039 put_device(&spi->dev);
4040 break;
4041 }
4042
4043 return NOTIFY_OK;
4044}
4045
4046static struct notifier_block spi_acpi_notifier = {
4047 .notifier_call = acpi_spi_notify,
4048};
4049#else
4050extern struct notifier_block spi_acpi_notifier;
4051#endif
4052
8ae12a0d
DB		 4053static int __init spi_init(void)
4054{
b885244e
DB		 4055 int status;
4056
e94b1766 4057 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB		 4058 if (!buf) {
4059 status = -ENOMEM;
4060 goto err0;
4061 }
4062
4063 status = bus_register(&spi_bus_type);
4064 if (status < 0)
4065 goto err1;
8ae12a0d 4066
b885244e
DB		 4067 status = class_register(&spi_master_class);
4068 if (status < 0)
4069 goto err2;
ce79d54a 4070
6c364062
GU		 4071 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4072 status = class_register(&spi_slave_class);
4073 if (status < 0)
4074 goto err3;
4075 }
4076
5267720e 4077 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4078 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP		 4079 if (IS_ENABLED(CONFIG_ACPI))
4080 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4081
8ae12a0d 4082 return 0;
b885244e 4083
6c364062
GU		 4084err3:
4085 class_unregister(&spi_master_class);
b885244e
DB		 4086err2:
4087 bus_unregister(&spi_bus_type);
4088err1:
4089 kfree(buf);
4090 buf = NULL;
4091err0:
4092 return status;
8ae12a0d 4093}
b885244e 4094
8ae12a0d
DB		 4095/* board_info is normally registered in arch_initcall(),
4096 * but even essential drivers wait till later
b885244e
DB		 4097 *
4098 * REVISIT only boardinfo really needs static linking. the rest (device and
4099 * driver registration) _could_ be dynamically linked (modular) ... costs
4100 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4101 */
673c0c00 4102postcore_initcall(spi_init);
Linux 6.x block layer and io_uring tree(s)