Merge tag 'integrity-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/zohar...
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB
2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB
7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB
11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
74317984 21#include <linux/of_gpio.h>
f3186dd8 22#include <linux/gpio/consumer.h>
3ae22e8c 23#include <linux/pm_runtime.h>
f48c767c 24#include <linux/pm_domain.h>
826cf175 25#include <linux/property.h>
025ed130 26#include <linux/export.h>
8bd75c77 27#include <linux/sched/rt.h>
ae7e81c0 28#include <uapi/linux/sched/types.h>
ffbbdd21
LW
29#include <linux/delay.h>
30#include <linux/kthread.h>
64bee4d2
MW
31#include <linux/ioport.h>
32#include <linux/acpi.h>
b1b8153c 33#include <linux/highmem.h>
9b61e302 34#include <linux/idr.h>
8a2e487e 35#include <linux/platform_data/x86/apple.h>
8ae12a0d 36
56ec1978
MB
37#define CREATE_TRACE_POINTS
38#include <trace/events/spi.h>
ca1438dc
AB
39EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 41
46336966
BB
42#include "internals.h"
43
9b61e302 44static DEFINE_IDR(spi_master_idr);
56ec1978 45
8ae12a0d
DB
46static void spidev_release(struct device *dev)
47{
0ffa0285 48 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 49
8caab75f
GU
50 /* spi controllers may cleanup for released devices */
51 if (spi->controller->cleanup)
52 spi->controller->cleanup(spi);
8ae12a0d 53
8caab75f 54 spi_controller_put(spi->controller);
5039563e 55 kfree(spi->driver_override);
07a389fe 56 kfree(spi);
8ae12a0d
DB
57}
58
59static ssize_t
60modalias_show(struct device *dev, struct device_attribute *a, char *buf)
61{
62 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
63 int len;
64
65 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
66 if (len != -ENODEV)
67 return len;
8ae12a0d 68
d8e328b3 69 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 70}
aa7da564 71static DEVICE_ATTR_RO(modalias);
8ae12a0d 72
5039563e
TP
73static ssize_t driver_override_store(struct device *dev,
74 struct device_attribute *a,
75 const char *buf, size_t count)
76{
77 struct spi_device *spi = to_spi_device(dev);
78 const char *end = memchr(buf, '\n', count);
79 const size_t len = end ? end - buf : count;
80 const char *driver_override, *old;
81
82 /* We need to keep extra room for a newline when displaying value */
83 if (len >= (PAGE_SIZE - 1))
84 return -EINVAL;
85
86 driver_override = kstrndup(buf, len, GFP_KERNEL);
87 if (!driver_override)
88 return -ENOMEM;
89
90 device_lock(dev);
91 old = spi->driver_override;
92 if (len) {
93 spi->driver_override = driver_override;
94 } else {
be73e323 95 /* Empty string, disable driver override */
5039563e
TP
96 spi->driver_override = NULL;
97 kfree(driver_override);
98 }
99 device_unlock(dev);
100 kfree(old);
101
102 return count;
103}
104
105static ssize_t driver_override_show(struct device *dev,
106 struct device_attribute *a, char *buf)
107{
108 const struct spi_device *spi = to_spi_device(dev);
109 ssize_t len;
110
111 device_lock(dev);
112 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
113 device_unlock(dev);
114 return len;
115}
116static DEVICE_ATTR_RW(driver_override);
117
eca2ebc7 118#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU
119static ssize_t spi_controller_##field##_show(struct device *dev, \
120 struct device_attribute *attr, \
121 char *buf) \
eca2ebc7 122{ \
8caab75f
GU
123 struct spi_controller *ctlr = container_of(dev, \
124 struct spi_controller, dev); \
125 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 126} \
8caab75f 127static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 128 .attr = { .name = file, .mode = 0444 }, \
8caab75f 129 .show = spi_controller_##field##_show, \
eca2ebc7
MS
130}; \
131static ssize_t spi_device_##field##_show(struct device *dev, \
132 struct device_attribute *attr, \
133 char *buf) \
134{ \
d1eba93b 135 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS
136 return spi_statistics_##field##_show(&spi->statistics, buf); \
137} \
138static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 139 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS
140 .show = spi_device_##field##_show, \
141}
142
143#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
144static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
145 char *buf) \
146{ \
147 unsigned long flags; \
148 ssize_t len; \
149 spin_lock_irqsave(&stat->lock, flags); \
150 len = sprintf(buf, format_string, stat->field); \
151 spin_unlock_irqrestore(&stat->lock, flags); \
152 return len; \
153} \
154SPI_STATISTICS_ATTRS(name, file)
155
156#define SPI_STATISTICS_SHOW(field, format_string) \
157 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
158 field, format_string)
159
160SPI_STATISTICS_SHOW(messages, "%lu");
161SPI_STATISTICS_SHOW(transfers, "%lu");
162SPI_STATISTICS_SHOW(errors, "%lu");
163SPI_STATISTICS_SHOW(timedout, "%lu");
164
165SPI_STATISTICS_SHOW(spi_sync, "%lu");
166SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
167SPI_STATISTICS_SHOW(spi_async, "%lu");
168
169SPI_STATISTICS_SHOW(bytes, "%llu");
170SPI_STATISTICS_SHOW(bytes_rx, "%llu");
171SPI_STATISTICS_SHOW(bytes_tx, "%llu");
172
6b7bc061
MS
173#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
174 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
175 "transfer_bytes_histo_" number, \
176 transfer_bytes_histo[index], "%lu")
177SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
178SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
179SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
180SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
181SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
182SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
183SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
184SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
185SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
186SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
187SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
188SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
189SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
190SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
191SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
192SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
193SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
194
d9f12122
MS
195SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
196
aa7da564
GKH
197static struct attribute *spi_dev_attrs[] = {
198 &dev_attr_modalias.attr,
5039563e 199 &dev_attr_driver_override.attr,
aa7da564 200 NULL,
8ae12a0d 201};
eca2ebc7
MS
202
203static const struct attribute_group spi_dev_group = {
204 .attrs = spi_dev_attrs,
205};
206
207static struct attribute *spi_device_statistics_attrs[] = {
208 &dev_attr_spi_device_messages.attr,
209 &dev_attr_spi_device_transfers.attr,
210 &dev_attr_spi_device_errors.attr,
211 &dev_attr_spi_device_timedout.attr,
212 &dev_attr_spi_device_spi_sync.attr,
213 &dev_attr_spi_device_spi_sync_immediate.attr,
214 &dev_attr_spi_device_spi_async.attr,
215 &dev_attr_spi_device_bytes.attr,
216 &dev_attr_spi_device_bytes_rx.attr,
217 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS
218 &dev_attr_spi_device_transfer_bytes_histo0.attr,
219 &dev_attr_spi_device_transfer_bytes_histo1.attr,
220 &dev_attr_spi_device_transfer_bytes_histo2.attr,
221 &dev_attr_spi_device_transfer_bytes_histo3.attr,
222 &dev_attr_spi_device_transfer_bytes_histo4.attr,
223 &dev_attr_spi_device_transfer_bytes_histo5.attr,
224 &dev_attr_spi_device_transfer_bytes_histo6.attr,
225 &dev_attr_spi_device_transfer_bytes_histo7.attr,
226 &dev_attr_spi_device_transfer_bytes_histo8.attr,
227 &dev_attr_spi_device_transfer_bytes_histo9.attr,
228 &dev_attr_spi_device_transfer_bytes_histo10.attr,
229 &dev_attr_spi_device_transfer_bytes_histo11.attr,
230 &dev_attr_spi_device_transfer_bytes_histo12.attr,
231 &dev_attr_spi_device_transfer_bytes_histo13.attr,
232 &dev_attr_spi_device_transfer_bytes_histo14.attr,
233 &dev_attr_spi_device_transfer_bytes_histo15.attr,
234 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 235 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS
236 NULL,
237};
238
239static const struct attribute_group spi_device_statistics_group = {
240 .name = "statistics",
241 .attrs = spi_device_statistics_attrs,
242};
243
244static const struct attribute_group *spi_dev_groups[] = {
245 &spi_dev_group,
246 &spi_device_statistics_group,
247 NULL,
248};
249
8caab75f
GU
250static struct attribute *spi_controller_statistics_attrs[] = {
251 &dev_attr_spi_controller_messages.attr,
252 &dev_attr_spi_controller_transfers.attr,
253 &dev_attr_spi_controller_errors.attr,
254 &dev_attr_spi_controller_timedout.attr,
255 &dev_attr_spi_controller_spi_sync.attr,
256 &dev_attr_spi_controller_spi_sync_immediate.attr,
257 &dev_attr_spi_controller_spi_async.attr,
258 &dev_attr_spi_controller_bytes.attr,
259 &dev_attr_spi_controller_bytes_rx.attr,
260 &dev_attr_spi_controller_bytes_tx.attr,
261 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
262 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
263 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
264 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
265 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
266 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
267 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
268 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
269 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
270 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
271 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
272 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
273 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
274 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
275 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
276 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
277 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
278 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS
279 NULL,
280};
281
8caab75f 282static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 283 .name = "statistics",
8caab75f 284 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS
285};
286
287static const struct attribute_group *spi_master_groups[] = {
8caab75f 288 &spi_controller_statistics_group,
eca2ebc7
MS
289 NULL,
290};
291
292void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
293 struct spi_transfer *xfer,
8caab75f 294 struct spi_controller *ctlr)
eca2ebc7
MS
295{
296 unsigned long flags;
6b7bc061
MS
297 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
298
299 if (l2len < 0)
300 l2len = 0;
eca2ebc7
MS
301
302 spin_lock_irqsave(&stats->lock, flags);
303
304 stats->transfers++;
6b7bc061 305 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS
306
307 stats->bytes += xfer->len;
308 if ((xfer->tx_buf) &&
8caab75f 309 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS
310 stats->bytes_tx += xfer->len;
311 if ((xfer->rx_buf) &&
8caab75f 312 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS
313 stats->bytes_rx += xfer->len;
314
315 spin_unlock_irqrestore(&stats->lock, flags);
316}
317EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats);
8ae12a0d
DB
318
319/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
320 * and the sysfs version makes coldplug work too.
321 */
322
75368bf6
AV
323static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
324 const struct spi_device *sdev)
325{
326 while (id->name[0]) {
327 if (!strcmp(sdev->modalias, id->name))
328 return id;
329 id++;
330 }
331 return NULL;
332}
333
334const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
335{
336 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
337
338 return spi_match_id(sdrv->id_table, sdev);
339}
340EXPORT_SYMBOL_GPL(spi_get_device_id);
341
8ae12a0d
DB
342static int spi_match_device(struct device *dev, struct device_driver *drv)
343{
344 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV
345 const struct spi_driver *sdrv = to_spi_driver(drv);
346
5039563e
TP
347 /* Check override first, and if set, only use the named driver */
348 if (spi->driver_override)
349 return strcmp(spi->driver_override, drv->name) == 0;
350
2b7a32f7
SA
351 /* Attempt an OF style match */
352 if (of_driver_match_device(dev, drv))
353 return 1;
354
64bee4d2
MW
355 /* Then try ACPI */
356 if (acpi_driver_match_device(dev, drv))
357 return 1;
358
75368bf6
AV
359 if (sdrv->id_table)
360 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 361
35f74fca 362 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB
363}
364
7eff2e7a 365static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB
366{
367 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR
368 int rc;
369
370 rc = acpi_device_uevent_modalias(dev, env);
371 if (rc != -ENODEV)
372 return rc;
8ae12a0d 373
2856670f 374 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB
375}
376
8ae12a0d
DB
377struct bus_type spi_bus_type = {
378 .name = "spi",
aa7da564 379 .dev_groups = spi_dev_groups,
8ae12a0d
DB
380 .match = spi_match_device,
381 .uevent = spi_uevent,
8ae12a0d
DB
382};
383EXPORT_SYMBOL_GPL(spi_bus_type);
384
b885244e
DB
385
386static int spi_drv_probe(struct device *dev)
387{
388 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 389 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW
390 int ret;
391
86be408b
SN
392 ret = of_clk_set_defaults(dev->of_node, false);
393 if (ret)
394 return ret;
395
44af7927
JH
396 if (dev->of_node) {
397 spi->irq = of_irq_get(dev->of_node, 0);
398 if (spi->irq == -EPROBE_DEFER)
399 return -EPROBE_DEFER;
400 if (spi->irq < 0)
401 spi->irq = 0;
402 }
403
676e7c25 404 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH
405 if (ret)
406 return ret;
407
408 ret = sdrv->probe(spi);
409 if (ret)
410 dev_pm_domain_detach(dev, true);
b885244e 411
33cf00e5 412 return ret;
b885244e
DB
413}
414
415static int spi_drv_remove(struct device *dev)
416{
417 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5
MW
418 int ret;
419
aec35f4e 420 ret = sdrv->remove(to_spi_device(dev));
676e7c25 421 dev_pm_domain_detach(dev, true);
b885244e 422
33cf00e5 423 return ret;
b885244e
DB
424}
425
426static void spi_drv_shutdown(struct device *dev)
427{
428 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
429
430 sdrv->shutdown(to_spi_device(dev));
431}
432
33e34dc6 433/**
ca5d2485 434 * __spi_register_driver - register a SPI driver
88c9321d 435 * @owner: owner module of the driver to register
33e34dc6
DB
436 * @sdrv: the driver to register
437 * Context: can sleep
97d56dc6
JMC
438 *
439 * Return: zero on success, else a negative error code.
33e34dc6 440 */
ca5d2485 441int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 442{
ca5d2485 443 sdrv->driver.owner = owner;
b885244e
DB
444 sdrv->driver.bus = &spi_bus_type;
445 if (sdrv->probe)
446 sdrv->driver.probe = spi_drv_probe;
447 if (sdrv->remove)
448 sdrv->driver.remove = spi_drv_remove;
449 if (sdrv->shutdown)
450 sdrv->driver.shutdown = spi_drv_shutdown;
451 return driver_register(&sdrv->driver);
452}
ca5d2485 453EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 454
8ae12a0d
DB
455/*-------------------------------------------------------------------------*/
456
457/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 458 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB
459 * Device registration normally goes into like arch/.../mach.../board-YYY.c
460 * with other readonly (flashable) information about mainboard devices.
461 */
462
463struct boardinfo {
464 struct list_head list;
2b9603a0 465 struct spi_board_info board_info;
8ae12a0d
DB
466};
467
468static LIST_HEAD(board_list);
8caab75f 469static LIST_HEAD(spi_controller_list);
2b9603a0
FT
470
471/*
be73e323 472 * Used to protect add/del operation for board_info list and
8caab75f 473 * spi_controller list, and their matching process
9a9a047a 474 * also used to protect object of type struct idr
2b9603a0 475 */
94040828 476static DEFINE_MUTEX(board_lock);
8ae12a0d 477
dc87c98e
GL
478/**
479 * spi_alloc_device - Allocate a new SPI device
8caab75f 480 * @ctlr: Controller to which device is connected
dc87c98e
GL
481 * Context: can sleep
482 *
483 * Allows a driver to allocate and initialize a spi_device without
484 * registering it immediately. This allows a driver to directly
485 * fill the spi_device with device parameters before calling
486 * spi_add_device() on it.
487 *
488 * Caller is responsible to call spi_add_device() on the returned
8caab75f 489 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL
490 * needs to discard the spi_device without adding it, then it should
491 * call spi_dev_put() on it.
492 *
97d56dc6 493 * Return: a pointer to the new device, or NULL.
dc87c98e 494 */
8caab75f 495struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL
496{
497 struct spi_device *spi;
dc87c98e 498
8caab75f 499 if (!spi_controller_get(ctlr))
dc87c98e
GL
500 return NULL;
501
5fe5f05e 502 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 503 if (!spi) {
8caab75f 504 spi_controller_put(ctlr);
dc87c98e
GL
505 return NULL;
506 }
507
8caab75f
GU
508 spi->master = spi->controller = ctlr;
509 spi->dev.parent = &ctlr->dev;
dc87c98e
GL
510 spi->dev.bus = &spi_bus_type;
511 spi->dev.release = spidev_release;
446411e1 512 spi->cs_gpio = -ENOENT;
ea235786 513 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7
MS
514
515 spin_lock_init(&spi->statistics.lock);
516
dc87c98e
GL
517 device_initialize(&spi->dev);
518 return spi;
519}
520EXPORT_SYMBOL_GPL(spi_alloc_device);
521
e13ac47b
JN
522static void spi_dev_set_name(struct spi_device *spi)
523{
524 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
525
526 if (adev) {
527 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
528 return;
529 }
530
8caab75f 531 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN
532 spi->chip_select);
533}
534
b6fb8d3a
MW
535static int spi_dev_check(struct device *dev, void *data)
536{
537 struct spi_device *spi = to_spi_device(dev);
538 struct spi_device *new_spi = data;
539
8caab75f 540 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW
541 spi->chip_select == new_spi->chip_select)
542 return -EBUSY;
543 return 0;
544}
545
dc87c98e
GL
546/**
547 * spi_add_device - Add spi_device allocated with spi_alloc_device
548 * @spi: spi_device to register
549 *
550 * Companion function to spi_alloc_device. Devices allocated with
551 * spi_alloc_device can be added onto the spi bus with this function.
552 *
97d56dc6 553 * Return: 0 on success; negative errno on failure
dc87c98e
GL
554 */
555int spi_add_device(struct spi_device *spi)
556{
e48880e0 557 static DEFINE_MUTEX(spi_add_lock);
8caab75f
GU
558 struct spi_controller *ctlr = spi->controller;
559 struct device *dev = ctlr->dev.parent;
dc87c98e
GL
560 int status;
561
562 /* Chipselects are numbered 0..max; validate. */
8caab75f
GU
563 if (spi->chip_select >= ctlr->num_chipselect) {
564 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
565 ctlr->num_chipselect);
dc87c98e
GL
566 return -EINVAL;
567 }
568
569 /* Set the bus ID string */
e13ac47b 570 spi_dev_set_name(spi);
e48880e0
DB
571
572 /* We need to make sure there's no other device with this
573 * chipselect **BEFORE** we call setup(), else we'll trash
574 * its configuration. Lock against concurrent add() calls.
575 */
576 mutex_lock(&spi_add_lock);
577
b6fb8d3a
MW
578 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
579 if (status) {
e48880e0
DB
580 dev_err(dev, "chipselect %d already in use\n",
581 spi->chip_select);
e48880e0
DB
582 goto done;
583 }
584
f3186dd8
LW
585 /* Descriptors take precedence */
586 if (ctlr->cs_gpiods)
587 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
588 else if (ctlr->cs_gpios)
8caab75f 589 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 590
e48880e0
DB
591 /* Drivers may modify this initial i/o setup, but will
592 * normally rely on the device being setup. Devices
593 * using SPI_CS_HIGH can't coexist well otherwise...
594 */
7d077197 595 status = spi_setup(spi);
dc87c98e 596 if (status < 0) {
eb288a1f
LW
597 dev_err(dev, "can't setup %s, status %d\n",
598 dev_name(&spi->dev), status);
e48880e0 599 goto done;
dc87c98e
GL
600 }
601
e48880e0 602 /* Device may be bound to an active driver when this returns */
dc87c98e 603 status = device_add(&spi->dev);
e48880e0 604 if (status < 0)
eb288a1f
LW
605 dev_err(dev, "can't add %s, status %d\n",
606 dev_name(&spi->dev), status);
e48880e0 607 else
35f74fca 608 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
dc87c98e 609
e48880e0
DB
610done:
611 mutex_unlock(&spi_add_lock);
612 return status;
dc87c98e
GL
613}
614EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 615
33e34dc6
DB
616/**
617 * spi_new_device - instantiate one new SPI device
8caab75f 618 * @ctlr: Controller to which device is connected
33e34dc6
DB
619 * @chip: Describes the SPI device
620 * Context: can sleep
621 *
622 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB
623 * after board init creates the hard-wired devices. Some development
624 * platforms may not be able to use spi_register_board_info though, and
625 * this is exported so that for example a USB or parport based adapter
626 * driver could add devices (which it would learn about out-of-band).
082c8cb4 627 *
97d56dc6 628 * Return: the new device, or NULL.
8ae12a0d 629 */
8caab75f 630struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 631 struct spi_board_info *chip)
8ae12a0d
DB
632{
633 struct spi_device *proxy;
8ae12a0d
DB
634 int status;
635
082c8cb4
DB
636 /* NOTE: caller did any chip->bus_num checks necessary.
637 *
638 * Also, unless we change the return value convention to use
639 * error-or-pointer (not NULL-or-pointer), troubleshootability
640 * suggests syslogged diagnostics are best here (ugh).
641 */
642
8caab75f 643 proxy = spi_alloc_device(ctlr);
dc87c98e 644 if (!proxy)
8ae12a0d
DB
645 return NULL;
646
102eb975
GL
647 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
648
8ae12a0d
DB
649 proxy->chip_select = chip->chip_select;
650 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 651 proxy->mode = chip->mode;
8ae12a0d 652 proxy->irq = chip->irq;
102eb975 653 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB
654 proxy->dev.platform_data = (void *) chip->platform_data;
655 proxy->controller_data = chip->controller_data;
656 proxy->controller_state = NULL;
8ae12a0d 657
826cf175
DT
658 if (chip->properties) {
659 status = device_add_properties(&proxy->dev, chip->properties);
660 if (status) {
8caab75f 661 dev_err(&ctlr->dev,
826cf175
DT
662 "failed to add properties to '%s': %d\n",
663 chip->modalias, status);
664 goto err_dev_put;
665 }
8ae12a0d
DB
666 }
667
826cf175
DT
668 status = spi_add_device(proxy);
669 if (status < 0)
670 goto err_remove_props;
671
8ae12a0d 672 return proxy;
826cf175
DT
673
674err_remove_props:
675 if (chip->properties)
676 device_remove_properties(&proxy->dev);
677err_dev_put:
678 spi_dev_put(proxy);
679 return NULL;
8ae12a0d
DB
680}
681EXPORT_SYMBOL_GPL(spi_new_device);
682
3b1884c2
GU
683/**
684 * spi_unregister_device - unregister a single SPI device
685 * @spi: spi_device to unregister
686 *
687 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 688 * by spi_unregister_controller().
3b1884c2
GU
689 */
690void spi_unregister_device(struct spi_device *spi)
691{
bd6c1644
GU
692 if (!spi)
693 return;
694
8324147f 695 if (spi->dev.of_node) {
bd6c1644 696 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH
697 of_node_put(spi->dev.of_node);
698 }
7f24467f
OP
699 if (ACPI_COMPANION(&spi->dev))
700 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
bd6c1644 701 device_unregister(&spi->dev);
3b1884c2
GU
702}
703EXPORT_SYMBOL_GPL(spi_unregister_device);
704
8caab75f
GU
705static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
706 struct spi_board_info *bi)
2b9603a0
FT
707{
708 struct spi_device *dev;
709
8caab75f 710 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT
711 return;
712
8caab75f 713 dev = spi_new_device(ctlr, bi);
2b9603a0 714 if (!dev)
8caab75f 715 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT
716 bi->modalias);
717}
718
33e34dc6
DB
719/**
720 * spi_register_board_info - register SPI devices for a given board
721 * @info: array of chip descriptors
722 * @n: how many descriptors are provided
723 * Context: can sleep
724 *
8ae12a0d
DB
725 * Board-specific early init code calls this (probably during arch_initcall)
726 * with segments of the SPI device table. Any device nodes are created later,
727 * after the relevant parent SPI controller (bus_num) is defined. We keep
728 * this table of devices forever, so that reloading a controller driver will
729 * not make Linux forget about these hard-wired devices.
730 *
731 * Other code can also call this, e.g. a particular add-on board might provide
732 * SPI devices through its expansion connector, so code initializing that board
733 * would naturally declare its SPI devices.
734 *
735 * The board info passed can safely be __initdata ... but be careful of
736 * any embedded pointers (platform_data, etc), they're copied as-is.
826cf175 737 * Device properties are deep-copied though.
97d56dc6
JMC
738 *
739 * Return: zero on success, else a negative error code.
8ae12a0d 740 */
fd4a319b 741int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 742{
2b9603a0
FT
743 struct boardinfo *bi;
744 int i;
8ae12a0d 745
c7908a37 746 if (!n)
f974cf57 747 return 0;
c7908a37 748
f9bdb7fd 749 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB
750 if (!bi)
751 return -ENOMEM;
8ae12a0d 752
2b9603a0 753 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 754 struct spi_controller *ctlr;
8ae12a0d 755
2b9603a0 756 memcpy(&bi->board_info, info, sizeof(*info));
826cf175
DT
757 if (info->properties) {
758 bi->board_info.properties =
759 property_entries_dup(info->properties);
760 if (IS_ERR(bi->board_info.properties))
761 return PTR_ERR(bi->board_info.properties);
762 }
763
2b9603a0
FT
764 mutex_lock(&board_lock);
765 list_add_tail(&bi->list, &board_list);
8caab75f
GU
766 list_for_each_entry(ctlr, &spi_controller_list, list)
767 spi_match_controller_to_boardinfo(ctlr,
768 &bi->board_info);
2b9603a0 769 mutex_unlock(&board_lock);
8ae12a0d 770 }
2b9603a0
FT
771
772 return 0;
8ae12a0d
DB
773}
774
775/*-------------------------------------------------------------------------*/
776
b158935f
MB
777static void spi_set_cs(struct spi_device *spi, bool enable)
778{
25093bde
AA
779 bool enable1 = enable;
780
d40f0b6f
DA
781 /*
782 * Avoid calling into the driver (or doing delays) if the chip select
783 * isn't actually changing from the last time this was called.
784 */
785 if ((spi->controller->last_cs_enable == enable) &&
786 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
787 return;
788
789 spi->controller->last_cs_enable = enable;
790 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
791
25093bde
AA
792 if (!spi->controller->set_cs_timing) {
793 if (enable1)
794 spi_delay_exec(&spi->controller->cs_setup, NULL);
795 else
796 spi_delay_exec(&spi->controller->cs_hold, NULL);
797 }
798
b158935f
MB
799 if (spi->mode & SPI_CS_HIGH)
800 enable = !enable;
801
f3186dd8
LW
802 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) {
803 /*
804 * Honour the SPI_NO_CS flag and invert the enable line, as
805 * active low is default for SPI. Execution paths that handle
806 * polarity inversion in gpiolib (such as device tree) will
807 * enforce active high using the SPI_CS_HIGH resulting in a
808 * double inversion through the code above.
809 */
810 if (!(spi->mode & SPI_NO_CS)) {
811 if (spi->cs_gpiod)
28f7604f
FF
812 gpiod_set_value_cansleep(spi->cs_gpiod,
813 !enable);
f3186dd8 814 else
28f7604f 815 gpio_set_value_cansleep(spi->cs_gpio, !enable);
f3186dd8 816 }
8eee6b9d 817 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU
818 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
819 spi->controller->set_cs)
820 spi->controller->set_cs(spi, !enable);
821 } else if (spi->controller->set_cs) {
822 spi->controller->set_cs(spi, !enable);
8eee6b9d 823 }
25093bde
AA
824
825 if (!spi->controller->set_cs_timing) {
826 if (!enable1)
827 spi_delay_exec(&spi->controller->cs_inactive, NULL);
828 }
b158935f
MB
829}
830
2de440f5 831#ifdef CONFIG_HAS_DMA
46336966
BB
832int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
833 struct sg_table *sgt, void *buf, size_t len,
834 enum dma_data_direction dir)
6ad45a27
MB
835{
836 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 837 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V
838#ifdef CONFIG_HIGHMEM
839 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
840 (unsigned long)buf < (PKMAP_BASE +
841 (LAST_PKMAP * PAGE_SIZE)));
842#else
843 const bool kmap_buf = false;
844#endif
65598c13
AG
845 int desc_len;
846 int sgs;
6ad45a27 847 struct page *vm_page;
8dd4a016 848 struct scatterlist *sg;
6ad45a27
MB
849 void *sg_buf;
850 size_t min;
851 int i, ret;
852
b1b8153c 853 if (vmalloced_buf || kmap_buf) {
df88e91b 854 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 855 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 856 } else if (virt_addr_valid(buf)) {
8caab75f 857 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 858 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V
859 } else {
860 return -EINVAL;
65598c13
AG
861 }
862
6ad45a27
MB
863 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
864 if (ret != 0)
865 return ret;
866
8dd4a016 867 sg = &sgt->sgl[0];
6ad45a27 868 for (i = 0; i < sgs; i++) {
6ad45a27 869
b1b8153c 870 if (vmalloced_buf || kmap_buf) {
ce99319a
MC
871 /*
872 * Next scatterlist entry size is the minimum between
873 * the desc_len and the remaining buffer length that
874 * fits in a page.
875 */
876 min = min_t(size_t, desc_len,
877 min_t(size_t, len,
878 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V
879 if (vmalloced_buf)
880 vm_page = vmalloc_to_page(buf);
881 else
882 vm_page = kmap_to_page(buf);
6ad45a27
MB
883 if (!vm_page) {
884 sg_free_table(sgt);
885 return -ENOMEM;
886 }
8dd4a016 887 sg_set_page(sg, vm_page,
c1aefbdd 888 min, offset_in_page(buf));
6ad45a27 889 } else {
65598c13 890 min = min_t(size_t, len, desc_len);
6ad45a27 891 sg_buf = buf;
8dd4a016 892 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB
893 }
894
6ad45a27
MB
895 buf += min;
896 len -= min;
8dd4a016 897 sg = sg_next(sg);
6ad45a27
MB
898 }
899
900 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU
901 if (!ret)
902 ret = -ENOMEM;
6ad45a27
MB
903 if (ret < 0) {
904 sg_free_table(sgt);
905 return ret;
906 }
907
908 sgt->nents = ret;
909
910 return 0;
911}
912
46336966
BB
913void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
914 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB
915{
916 if (sgt->orig_nents) {
917 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
918 sg_free_table(sgt);
919 }
920}
921
8caab75f 922static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 923{
99adef31
MB
924 struct device *tx_dev, *rx_dev;
925 struct spi_transfer *xfer;
6ad45a27 926 int ret;
3a2eba9b 927
8caab75f 928 if (!ctlr->can_dma)
99adef31
MB
929 return 0;
930
8caab75f
GU
931 if (ctlr->dma_tx)
932 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 933 else
8caab75f 934 tx_dev = ctlr->dev.parent;
c37f45b5 935
8caab75f
GU
936 if (ctlr->dma_rx)
937 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 938 else
8caab75f 939 rx_dev = ctlr->dev.parent;
99adef31
MB
940
941 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 942 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
943 continue;
944
945 if (xfer->tx_buf != NULL) {
8caab75f 946 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
947 (void *)xfer->tx_buf, xfer->len,
948 DMA_TO_DEVICE);
949 if (ret != 0)
950 return ret;
99adef31
MB
951 }
952
953 if (xfer->rx_buf != NULL) {
8caab75f 954 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB
955 xfer->rx_buf, xfer->len,
956 DMA_FROM_DEVICE);
957 if (ret != 0) {
8caab75f 958 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB
959 DMA_TO_DEVICE);
960 return ret;
99adef31
MB
961 }
962 }
963 }
964
8caab75f 965 ctlr->cur_msg_mapped = true;
99adef31
MB
966
967 return 0;
968}
969
8caab75f 970static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB
971{
972 struct spi_transfer *xfer;
973 struct device *tx_dev, *rx_dev;
974
8caab75f 975 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB
976 return 0;
977
8caab75f
GU
978 if (ctlr->dma_tx)
979 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 980 else
8caab75f 981 tx_dev = ctlr->dev.parent;
c37f45b5 982
8caab75f
GU
983 if (ctlr->dma_rx)
984 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 985 else
8caab75f 986 rx_dev = ctlr->dev.parent;
99adef31
MB
987
988 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 989 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB
990 continue;
991
8caab75f
GU
992 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
993 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB
994 }
995
809b1b04
RG
996 ctlr->cur_msg_mapped = false;
997
99adef31
MB
998 return 0;
999}
2de440f5 1000#else /* !CONFIG_HAS_DMA */
8caab75f 1001static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU
1002 struct spi_message *msg)
1003{
1004 return 0;
1005}
1006
8caab75f 1007static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1008 struct spi_message *msg)
2de440f5
GU
1009{
1010 return 0;
1011}
1012#endif /* !CONFIG_HAS_DMA */
1013
8caab75f 1014static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS
1015 struct spi_message *msg)
1016{
1017 struct spi_transfer *xfer;
1018
1019 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1020 /*
1021 * Restore the original value of tx_buf or rx_buf if they are
1022 * NULL.
1023 */
8caab75f 1024 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1025 xfer->tx_buf = NULL;
8caab75f 1026 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS
1027 xfer->rx_buf = NULL;
1028 }
1029
8caab75f 1030 return __spi_unmap_msg(ctlr, msg);
4b786458
MS
1031}
1032
8caab75f 1033static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU
1034{
1035 struct spi_transfer *xfer;
1036 void *tmp;
1037 unsigned int max_tx, max_rx;
1038
aee67fe8 1039 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1040 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU
1041 max_tx = 0;
1042 max_rx = 0;
1043
1044 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1045 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU
1046 !xfer->tx_buf)
1047 max_tx = max(xfer->len, max_tx);
8caab75f 1048 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU
1049 !xfer->rx_buf)
1050 max_rx = max(xfer->len, max_rx);
1051 }
1052
1053 if (max_tx) {
8caab75f 1054 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU
1055 GFP_KERNEL | GFP_DMA);
1056 if (!tmp)
1057 return -ENOMEM;
8caab75f 1058 ctlr->dummy_tx = tmp;
2de440f5
GU
1059 memset(tmp, 0, max_tx);
1060 }
1061
1062 if (max_rx) {
8caab75f 1063 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU
1064 GFP_KERNEL | GFP_DMA);
1065 if (!tmp)
1066 return -ENOMEM;
8caab75f 1067 ctlr->dummy_rx = tmp;
2de440f5
GU
1068 }
1069
1070 if (max_tx || max_rx) {
1071 list_for_each_entry(xfer, &msg->transfers,
1072 transfer_list) {
5442dcaa
CL
1073 if (!xfer->len)
1074 continue;
2de440f5 1075 if (!xfer->tx_buf)
8caab75f 1076 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1077 if (!xfer->rx_buf)
8caab75f 1078 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU
1079 }
1080 }
1081 }
1082
8caab75f 1083 return __spi_map_msg(ctlr, msg);
2de440f5 1084}
99adef31 1085
810923f3
LR
1086static int spi_transfer_wait(struct spi_controller *ctlr,
1087 struct spi_message *msg,
1088 struct spi_transfer *xfer)
1089{
1090 struct spi_statistics *statm = &ctlr->statistics;
1091 struct spi_statistics *stats = &msg->spi->statistics;
49686df5 1092 unsigned long long ms;
810923f3
LR
1093
1094 if (spi_controller_is_slave(ctlr)) {
1095 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1096 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1097 return -EINTR;
1098 }
1099 } else {
1100 ms = 8LL * 1000LL * xfer->len;
1101 do_div(ms, xfer->speed_hz);
1102 ms += ms + 200; /* some tolerance */
1103
1104 if (ms > UINT_MAX)
1105 ms = UINT_MAX;
1106
1107 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1108 msecs_to_jiffies(ms));
1109
1110 if (ms == 0) {
1111 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1112 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1113 dev_err(&msg->spi->dev,
1114 "SPI transfer timed out\n");
1115 return -ETIMEDOUT;
1116 }
1117 }
1118
1119 return 0;
1120}
1121
0ff2de8b
MS
1122static void _spi_transfer_delay_ns(u32 ns)
1123{
1124 if (!ns)
1125 return;
1126 if (ns <= 1000) {
1127 ndelay(ns);
1128 } else {
1129 u32 us = DIV_ROUND_UP(ns, 1000);
1130
1131 if (us <= 10)
1132 udelay(us);
1133 else
1134 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1135 }
1136}
1137
3984d39b 1138int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1139{
b2c98153
AA
1140 u32 delay = _delay->value;
1141 u32 unit = _delay->unit;
d5864e5b 1142 u32 hz;
0ff2de8b 1143
b2c98153
AA
1144 if (!delay)
1145 return 0;
0ff2de8b
MS
1146
1147 switch (unit) {
1148 case SPI_DELAY_UNIT_USECS:
b2c98153 1149 delay *= 1000;
0ff2de8b
MS
1150 break;
1151 case SPI_DELAY_UNIT_NSECS: /* nothing to do here */
1152 break;
d5864e5b 1153 case SPI_DELAY_UNIT_SCK:
b2c98153
AA
1154 /* clock cycles need to be obtained from spi_transfer */
1155 if (!xfer)
1156 return -EINVAL;
d5864e5b
MS
1157 /* if there is no effective speed know, then approximate
1158 * by underestimating with half the requested hz
1159 */
1160 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA
1161 if (!hz)
1162 return -EINVAL;
d5864e5b
MS
1163 delay *= DIV_ROUND_UP(1000000000, hz);
1164 break;
0ff2de8b 1165 default:
b2c98153
AA
1166 return -EINVAL;
1167 }
1168
1169 return delay;
1170}
3984d39b 1171EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA
1172
1173int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1174{
1175 int delay;
1176
8fede89f
MB
1177 might_sleep();
1178
b2c98153
AA
1179 if (!_delay)
1180 return -EINVAL;
1181
3984d39b 1182 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA
1183 if (delay < 0)
1184 return delay;
1185
1186 _spi_transfer_delay_ns(delay);
1187
1188 return 0;
1189}
1190EXPORT_SYMBOL_GPL(spi_delay_exec);
1191
0ff2de8b
MS
1192static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1193 struct spi_transfer *xfer)
1194{
329f0dac
AA
1195 u32 delay = xfer->cs_change_delay.value;
1196 u32 unit = xfer->cs_change_delay.unit;
1197 int ret;
0ff2de8b
MS
1198
1199 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA
1200 if (!delay) {
1201 if (unit == SPI_DELAY_UNIT_USECS)
1202 _spi_transfer_delay_ns(10000);
0ff2de8b 1203 return;
6b3f236a 1204 }
0ff2de8b 1205
329f0dac
AA
1206 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1207 if (ret) {
0ff2de8b
MS
1208 dev_err_once(&msg->spi->dev,
1209 "Use of unsupported delay unit %i, using default of 10us\n",
329f0dac
AA
1210 unit);
1211 _spi_transfer_delay_ns(10000);
0ff2de8b 1212 }
0ff2de8b
MS
1213}
1214
b158935f
MB
1215/*
1216 * spi_transfer_one_message - Default implementation of transfer_one_message()
1217 *
1218 * This is a standard implementation of transfer_one_message() for
8ba811a7 1219 * drivers which implement a transfer_one() operation. It provides
b158935f
MB
1220 * standard handling of delays and chip select management.
1221 */
8caab75f 1222static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB
1223 struct spi_message *msg)
1224{
1225 struct spi_transfer *xfer;
b158935f
MB
1226 bool keep_cs = false;
1227 int ret = 0;
8caab75f 1228 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1229 struct spi_statistics *stats = &msg->spi->statistics;
b158935f
MB
1230
1231 spi_set_cs(msg->spi, true);
1232
eca2ebc7
MS
1233 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1234 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1235
b158935f
MB
1236 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1237 trace_spi_transfer_start(msg, xfer);
1238
8caab75f
GU
1239 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1240 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1241
b42faeee
VO
1242 if (!ctlr->ptp_sts_supported) {
1243 xfer->ptp_sts_word_pre = 0;
1244 ptp_read_system_prets(xfer->ptp_sts);
1245 }
1246
38ec10f6 1247 if (xfer->tx_buf || xfer->rx_buf) {
8caab75f 1248 reinit_completion(&ctlr->xfer_completion);
b158935f 1249
809b1b04 1250fallback_pio:
8caab75f 1251 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1252 if (ret < 0) {
809b1b04
RG
1253 if (ctlr->cur_msg_mapped &&
1254 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1255 __spi_unmap_msg(ctlr, msg);
1256 ctlr->fallback = true;
1257 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1258 goto fallback_pio;
1259 }
1260
eca2ebc7
MS
1261 SPI_STATISTICS_INCREMENT_FIELD(statm,
1262 errors);
1263 SPI_STATISTICS_INCREMENT_FIELD(stats,
1264 errors);
38ec10f6
MB
1265 dev_err(&msg->spi->dev,
1266 "SPI transfer failed: %d\n", ret);
1267 goto out;
1268 }
b158935f 1269
d57e7960
MB
1270 if (ret > 0) {
1271 ret = spi_transfer_wait(ctlr, msg, xfer);
1272 if (ret < 0)
1273 msg->status = ret;
1274 }
38ec10f6
MB
1275 } else {
1276 if (xfer->len)
1277 dev_err(&msg->spi->dev,
1278 "Bufferless transfer has length %u\n",
1279 xfer->len);
13a42798 1280 }
b158935f 1281
b42faeee
VO
1282 if (!ctlr->ptp_sts_supported) {
1283 ptp_read_system_postts(xfer->ptp_sts);
1284 xfer->ptp_sts_word_post = xfer->len;
1285 }
1286
b158935f
MB
1287 trace_spi_transfer_stop(msg, xfer);
1288
1289 if (msg->status != -EINPROGRESS)
1290 goto out;
1291
bebcfd27 1292 spi_transfer_delay_exec(xfer);
b158935f
MB
1293
1294 if (xfer->cs_change) {
1295 if (list_is_last(&xfer->transfer_list,
1296 &msg->transfers)) {
1297 keep_cs = true;
1298 } else {
0b73aa63 1299 spi_set_cs(msg->spi, false);
0ff2de8b 1300 _spi_transfer_cs_change_delay(msg, xfer);
0b73aa63 1301 spi_set_cs(msg->spi, true);
b158935f
MB
1302 }
1303 }
1304
1305 msg->actual_length += xfer->len;
1306 }
1307
1308out:
1309 if (ret != 0 || !keep_cs)
1310 spi_set_cs(msg->spi, false);
1311
1312 if (msg->status == -EINPROGRESS)
1313 msg->status = ret;
1314
8caab75f
GU
1315 if (msg->status && ctlr->handle_err)
1316 ctlr->handle_err(ctlr, msg);
b716c4ff 1317
c9ba7a16
NT
1318 spi_res_release(ctlr, msg);
1319
0ed56252
MB
1320 spi_finalize_current_message(ctlr);
1321
b158935f
MB
1322 return ret;
1323}
1324
1325/**
1326 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1327 * @ctlr: the controller reporting completion
b158935f
MB
1328 *
1329 * Called by SPI drivers using the core transfer_one_message()
1330 * implementation to notify it that the current interrupt driven
9e8f4882 1331 * transfer has finished and the next one may be scheduled.
b158935f 1332 */
8caab75f 1333void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1334{
8caab75f 1335 complete(&ctlr->xfer_completion);
b158935f
MB
1336}
1337EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1338
e1268597
MB
1339static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1340{
1341 if (ctlr->auto_runtime_pm) {
1342 pm_runtime_mark_last_busy(ctlr->dev.parent);
1343 pm_runtime_put_autosuspend(ctlr->dev.parent);
1344 }
1345}
1346
ffbbdd21 1347/**
fc9e0f71 1348 * __spi_pump_messages - function which processes spi message queue
8caab75f 1349 * @ctlr: controller to process queue for
fc9e0f71 1350 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW
1351 *
1352 * This function checks if there is any spi message in the queue that
1353 * needs processing and if so call out to the driver to initialize hardware
1354 * and transfer each message.
1355 *
0461a414
MB
1356 * Note that it is called both from the kthread itself and also from
1357 * inside spi_sync(); the queue extraction handling at the top of the
1358 * function should deal with this safely.
ffbbdd21 1359 */
8caab75f 1360static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1361{
b42faeee 1362 struct spi_transfer *xfer;
d1c44c93 1363 struct spi_message *msg;
ffbbdd21 1364 bool was_busy = false;
d1c44c93 1365 unsigned long flags;
ffbbdd21
LW
1366 int ret;
1367
983aee5d 1368 /* Lock queue */
8caab75f 1369 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB
1370
1371 /* Make sure we are not already running a message */
8caab75f
GU
1372 if (ctlr->cur_msg) {
1373 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB
1374 return;
1375 }
1376
f0125f1a 1377 /* If another context is idling the device then defer */
8caab75f 1378 if (ctlr->idling) {
60a883d1 1379 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
8caab75f 1380 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB
1381 return;
1382 }
1383
983aee5d 1384 /* Check if the queue is idle */
8caab75f
GU
1385 if (list_empty(&ctlr->queue) || !ctlr->running) {
1386 if (!ctlr->busy) {
1387 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1388 return;
ffbbdd21 1389 }
fc9e0f71 1390
e1268597 1391 /* Defer any non-atomic teardown to the thread */
f0125f1a 1392 if (!in_kthread) {
e1268597
MB
1393 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1394 !ctlr->unprepare_transfer_hardware) {
1395 spi_idle_runtime_pm(ctlr);
1396 ctlr->busy = false;
1397 trace_spi_controller_idle(ctlr);
1398 } else {
1399 kthread_queue_work(ctlr->kworker,
1400 &ctlr->pump_messages);
1401 }
f0125f1a
MB
1402 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1403 return;
1404 }
1405
1406 ctlr->busy = false;
1407 ctlr->idling = true;
1408 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1409
1410 kfree(ctlr->dummy_rx);
1411 ctlr->dummy_rx = NULL;
1412 kfree(ctlr->dummy_tx);
1413 ctlr->dummy_tx = NULL;
1414 if (ctlr->unprepare_transfer_hardware &&
1415 ctlr->unprepare_transfer_hardware(ctlr))
1416 dev_err(&ctlr->dev,
1417 "failed to unprepare transfer hardware\n");
e1268597 1418 spi_idle_runtime_pm(ctlr);
f0125f1a
MB
1419 trace_spi_controller_idle(ctlr);
1420
1421 spin_lock_irqsave(&ctlr->queue_lock, flags);
1422 ctlr->idling = false;
8caab75f 1423 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1424 return;
1425 }
ffbbdd21 1426
ffbbdd21 1427 /* Extract head of queue */
d1c44c93
VO
1428 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1429 ctlr->cur_msg = msg;
ffbbdd21 1430
d1c44c93 1431 list_del_init(&msg->queue);
8caab75f 1432 if (ctlr->busy)
ffbbdd21
LW
1433 was_busy = true;
1434 else
8caab75f
GU
1435 ctlr->busy = true;
1436 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1437
8caab75f 1438 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1439
8caab75f
GU
1440 if (!was_busy && ctlr->auto_runtime_pm) {
1441 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1442 if (ret < 0) {
7e48e23a 1443 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1444 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1445 ret);
8caab75f 1446 mutex_unlock(&ctlr->io_mutex);
49834de2
MB
1447 return;
1448 }
1449 }
1450
56ec1978 1451 if (!was_busy)
8caab75f 1452 trace_spi_controller_busy(ctlr);
56ec1978 1453
8caab75f
GU
1454 if (!was_busy && ctlr->prepare_transfer_hardware) {
1455 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1456 if (ret) {
8caab75f 1457 dev_err(&ctlr->dev,
f3440d9a
SL
1458 "failed to prepare transfer hardware: %d\n",
1459 ret);
49834de2 1460
8caab75f
GU
1461 if (ctlr->auto_runtime_pm)
1462 pm_runtime_put(ctlr->dev.parent);
f3440d9a 1463
d1c44c93 1464 msg->status = ret;
f3440d9a
SL
1465 spi_finalize_current_message(ctlr);
1466
8caab75f 1467 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW
1468 return;
1469 }
1470 }
1471
d1c44c93 1472 trace_spi_message_start(msg);
56ec1978 1473
8caab75f 1474 if (ctlr->prepare_message) {
d1c44c93 1475 ret = ctlr->prepare_message(ctlr, msg);
2841a5fc 1476 if (ret) {
8caab75f
GU
1477 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1478 ret);
d1c44c93 1479 msg->status = ret;
8caab75f 1480 spi_finalize_current_message(ctlr);
49023d2e 1481 goto out;
2841a5fc 1482 }
8caab75f 1483 ctlr->cur_msg_prepared = true;
2841a5fc
MB
1484 }
1485
d1c44c93 1486 ret = spi_map_msg(ctlr, msg);
99adef31 1487 if (ret) {
d1c44c93 1488 msg->status = ret;
8caab75f 1489 spi_finalize_current_message(ctlr);
49023d2e 1490 goto out;
99adef31
MB
1491 }
1492
b42faeee
VO
1493 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1494 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1495 xfer->ptp_sts_word_pre = 0;
1496 ptp_read_system_prets(xfer->ptp_sts);
1497 }
1498 }
1499
d1c44c93 1500 ret = ctlr->transfer_one_message(ctlr, msg);
ffbbdd21 1501 if (ret) {
8caab75f 1502 dev_err(&ctlr->dev,
1f802f82 1503 "failed to transfer one message from queue\n");
49023d2e 1504 goto out;
ffbbdd21 1505 }
49023d2e
JH
1506
1507out:
8caab75f 1508 mutex_unlock(&ctlr->io_mutex);
62826970
MB
1509
1510 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH
1511 if (!ret)
1512 cond_resched();
ffbbdd21
LW
1513}
1514
fc9e0f71
MB
1515/**
1516 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1517 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB
1518 */
1519static void spi_pump_messages(struct kthread_work *work)
1520{
8caab75f
GU
1521 struct spi_controller *ctlr =
1522 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1523
8caab75f 1524 __spi_pump_messages(ctlr, true);
fc9e0f71
MB
1525}
1526
b42faeee
VO
1527/**
1528 * spi_take_timestamp_pre - helper for drivers to collect the beginning of the
1529 * TX timestamp for the requested byte from the SPI
1530 * transfer. The frequency with which this function
1531 * must be called (once per word, once for the whole
1532 * transfer, once per batch of words etc) is arbitrary
1533 * as long as the @tx buffer offset is greater than or
1534 * equal to the requested byte at the time of the
1535 * call. The timestamp is only taken once, at the
1536 * first such call. It is assumed that the driver
1537 * advances its @tx buffer pointer monotonically.
1538 * @ctlr: Pointer to the spi_controller structure of the driver
1539 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1540 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1541 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1542 * transfer, for less jitter in time measurement. Only compatible
1543 * with PIO drivers. If true, must follow up with
1544 * spi_take_timestamp_post or otherwise system will crash.
1545 * WARNING: for fully predictable results, the CPU frequency must
1546 * also be under control (governor).
1547 */
1548void spi_take_timestamp_pre(struct spi_controller *ctlr,
1549 struct spi_transfer *xfer,
862dd2a9 1550 size_t progress, bool irqs_off)
b42faeee 1551{
b42faeee
VO
1552 if (!xfer->ptp_sts)
1553 return;
1554
6a726824 1555 if (xfer->timestamped)
b42faeee
VO
1556 return;
1557
6a726824 1558 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO
1559 return;
1560
1561 /* Capture the resolution of the timestamp */
862dd2a9 1562 xfer->ptp_sts_word_pre = progress;
b42faeee 1563
b42faeee
VO
1564 if (irqs_off) {
1565 local_irq_save(ctlr->irq_flags);
1566 preempt_disable();
1567 }
1568
1569 ptp_read_system_prets(xfer->ptp_sts);
1570}
1571EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1572
1573/**
1574 * spi_take_timestamp_post - helper for drivers to collect the end of the
1575 * TX timestamp for the requested byte from the SPI
1576 * transfer. Can be called with an arbitrary
1577 * frequency: only the first call where @tx exceeds
1578 * or is equal to the requested word will be
1579 * timestamped.
1580 * @ctlr: Pointer to the spi_controller structure of the driver
1581 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1582 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO
1583 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
1584 */
1585void spi_take_timestamp_post(struct spi_controller *ctlr,
1586 struct spi_transfer *xfer,
862dd2a9 1587 size_t progress, bool irqs_off)
b42faeee 1588{
b42faeee
VO
1589 if (!xfer->ptp_sts)
1590 return;
1591
6a726824 1592 if (xfer->timestamped)
b42faeee
VO
1593 return;
1594
862dd2a9 1595 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO
1596 return;
1597
1598 ptp_read_system_postts(xfer->ptp_sts);
1599
1600 if (irqs_off) {
1601 local_irq_restore(ctlr->irq_flags);
1602 preempt_enable();
1603 }
1604
1605 /* Capture the resolution of the timestamp */
862dd2a9 1606 xfer->ptp_sts_word_post = progress;
b42faeee 1607
6a726824 1608 xfer->timestamped = true;
b42faeee
VO
1609}
1610EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1611
924b5867
DA
1612/**
1613 * spi_set_thread_rt - set the controller to pump at realtime priority
1614 * @ctlr: controller to boost priority of
1615 *
1616 * This can be called because the controller requested realtime priority
1617 * (by setting the ->rt value before calling spi_register_controller()) or
1618 * because a device on the bus said that its transfers needed realtime
1619 * priority.
1620 *
1621 * NOTE: at the moment if any device on a bus says it needs realtime then
1622 * the thread will be at realtime priority for all transfers on that
1623 * controller. If this eventually becomes a problem we may see if we can
1624 * find a way to boost the priority only temporarily during relevant
1625 * transfers.
1626 */
1627static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1628{
4ff13d00 1629 struct sched_param param = { .sched_priority = MAX_RT_PRIO / 2 };
ffbbdd21 1630
924b5867
DA
1631 dev_info(&ctlr->dev,
1632 "will run message pump with realtime priority\n");
60a883d1 1633 sched_setscheduler(ctlr->kworker->task, SCHED_FIFO, &param);
924b5867
DA
1634}
1635
1636static int spi_init_queue(struct spi_controller *ctlr)
1637{
8caab75f
GU
1638 ctlr->running = false;
1639 ctlr->busy = false;
ffbbdd21 1640
60a883d1
MS
1641 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
1642 if (IS_ERR(ctlr->kworker)) {
1643 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
1644 return PTR_ERR(ctlr->kworker);
ffbbdd21 1645 }
60a883d1 1646
8caab75f 1647 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1648
ffbbdd21 1649 /*
8caab75f 1650 * Controller config will indicate if this controller should run the
ffbbdd21
LW
1651 * message pump with high (realtime) priority to reduce the transfer
1652 * latency on the bus by minimising the delay between a transfer
1653 * request and the scheduling of the message pump thread. Without this
1654 * setting the message pump thread will remain at default priority.
1655 */
924b5867
DA
1656 if (ctlr->rt)
1657 spi_set_thread_rt(ctlr);
ffbbdd21
LW
1658
1659 return 0;
1660}
1661
1662/**
1663 * spi_get_next_queued_message() - called by driver to check for queued
1664 * messages
8caab75f 1665 * @ctlr: the controller to check for queued messages
ffbbdd21
LW
1666 *
1667 * If there are more messages in the queue, the next message is returned from
1668 * this call.
97d56dc6
JMC
1669 *
1670 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1671 */
8caab75f 1672struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW
1673{
1674 struct spi_message *next;
1675 unsigned long flags;
1676
1677 /* get a pointer to the next message, if any */
8caab75f
GU
1678 spin_lock_irqsave(&ctlr->queue_lock, flags);
1679 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1680 queue);
8caab75f 1681 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1682
1683 return next;
1684}
1685EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1686
1687/**
1688 * spi_finalize_current_message() - the current message is complete
8caab75f 1689 * @ctlr: the controller to return the message to
ffbbdd21
LW
1690 *
1691 * Called by the driver to notify the core that the message in the front of the
1692 * queue is complete and can be removed from the queue.
1693 */
8caab75f 1694void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1695{
b42faeee 1696 struct spi_transfer *xfer;
ffbbdd21
LW
1697 struct spi_message *mesg;
1698 unsigned long flags;
2841a5fc 1699 int ret;
ffbbdd21 1700
8caab75f
GU
1701 spin_lock_irqsave(&ctlr->queue_lock, flags);
1702 mesg = ctlr->cur_msg;
1703 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1704
b42faeee
VO
1705 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1706 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1707 ptp_read_system_postts(xfer->ptp_sts);
1708 xfer->ptp_sts_word_post = xfer->len;
1709 }
1710 }
1711
6a726824
VO
1712 if (unlikely(ctlr->ptp_sts_supported))
1713 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
1714 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 1715
8caab75f 1716 spi_unmap_msg(ctlr, mesg);
99adef31 1717
8caab75f
GU
1718 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1719 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1720 if (ret) {
8caab75f
GU
1721 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1722 ret);
2841a5fc
MB
1723 }
1724 }
391949b6 1725
8caab75f
GU
1726 spin_lock_irqsave(&ctlr->queue_lock, flags);
1727 ctlr->cur_msg = NULL;
1728 ctlr->cur_msg_prepared = false;
809b1b04 1729 ctlr->fallback = false;
60a883d1 1730 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
8caab75f 1731 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS
1732
1733 trace_spi_message_done(mesg);
2841a5fc 1734
ffbbdd21
LW
1735 mesg->state = NULL;
1736 if (mesg->complete)
1737 mesg->complete(mesg->context);
1738}
1739EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1740
8caab75f 1741static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1742{
1743 unsigned long flags;
1744
8caab75f 1745 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1746
8caab75f
GU
1747 if (ctlr->running || ctlr->busy) {
1748 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1749 return -EBUSY;
1750 }
1751
8caab75f
GU
1752 ctlr->running = true;
1753 ctlr->cur_msg = NULL;
1754 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1755
60a883d1 1756 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW
1757
1758 return 0;
1759}
1760
8caab75f 1761static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1762{
1763 unsigned long flags;
1764 unsigned limit = 500;
1765 int ret = 0;
1766
8caab75f 1767 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1768
1769 /*
1770 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1771 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW
1772 * execution path (pump_messages) would be required to call wake_up or
1773 * friends on every SPI message. Do this instead.
1774 */
8caab75f
GU
1775 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1776 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1777 usleep_range(10000, 11000);
8caab75f 1778 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW
1779 }
1780
8caab75f 1781 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW
1782 ret = -EBUSY;
1783 else
8caab75f 1784 ctlr->running = false;
ffbbdd21 1785
8caab75f 1786 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1787
1788 if (ret) {
8caab75f 1789 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW
1790 return ret;
1791 }
1792 return ret;
1793}
1794
8caab75f 1795static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1796{
1797 int ret;
1798
8caab75f 1799 ret = spi_stop_queue(ctlr);
ffbbdd21
LW
1800
1801 /*
3989144f 1802 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW
1803 * If the reason that stop_queue timed out is that the work will never
1804 * finish, then it does no good to call flush/stop thread, so
1805 * return anyway.
1806 */
1807 if (ret) {
8caab75f 1808 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW
1809 return ret;
1810 }
1811
60a883d1 1812 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW
1813
1814 return 0;
1815}
1816
0461a414
MB
1817static int __spi_queued_transfer(struct spi_device *spi,
1818 struct spi_message *msg,
1819 bool need_pump)
ffbbdd21 1820{
8caab75f 1821 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW
1822 unsigned long flags;
1823
8caab75f 1824 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1825
8caab75f
GU
1826 if (!ctlr->running) {
1827 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1828 return -ESHUTDOWN;
1829 }
1830 msg->actual_length = 0;
1831 msg->status = -EINPROGRESS;
1832
8caab75f 1833 list_add_tail(&msg->queue, &ctlr->queue);
f0125f1a 1834 if (!ctlr->busy && need_pump)
60a883d1 1835 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1836
8caab75f 1837 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW
1838 return 0;
1839}
1840
0461a414
MB
1841/**
1842 * spi_queued_transfer - transfer function for queued transfers
1843 * @spi: spi device which is requesting transfer
1844 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC
1845 *
1846 * Return: zero on success, else a negative error code.
0461a414
MB
1847 */
1848static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
1849{
1850 return __spi_queued_transfer(spi, msg, true);
1851}
1852
8caab75f 1853static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW
1854{
1855 int ret;
1856
8caab75f
GU
1857 ctlr->transfer = spi_queued_transfer;
1858 if (!ctlr->transfer_one_message)
1859 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW
1860
1861 /* Initialize and start queue */
8caab75f 1862 ret = spi_init_queue(ctlr);
ffbbdd21 1863 if (ret) {
8caab75f 1864 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW
1865 goto err_init_queue;
1866 }
8caab75f
GU
1867 ctlr->queued = true;
1868 ret = spi_start_queue(ctlr);
ffbbdd21 1869 if (ret) {
8caab75f 1870 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW
1871 goto err_start_queue;
1872 }
1873
1874 return 0;
1875
1876err_start_queue:
8caab75f 1877 spi_destroy_queue(ctlr);
c3676d5c 1878err_init_queue:
ffbbdd21
LW
1879 return ret;
1880}
1881
988f259b
BB
1882/**
1883 * spi_flush_queue - Send all pending messages in the queue from the callers'
1884 * context
1885 * @ctlr: controller to process queue for
1886 *
1887 * This should be used when one wants to ensure all pending messages have been
1888 * sent before doing something. Is used by the spi-mem code to make sure SPI
1889 * memory operations do not preempt regular SPI transfers that have been queued
1890 * before the spi-mem operation.
1891 */
1892void spi_flush_queue(struct spi_controller *ctlr)
1893{
1894 if (ctlr->transfer == spi_queued_transfer)
1895 __spi_pump_messages(ctlr, false);
1896}
1897
ffbbdd21
LW
1898/*-------------------------------------------------------------------------*/
1899
7cb94361 1900#if defined(CONFIG_OF)
8caab75f 1901static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 1902 struct device_node *nc)
aff5e3f8 1903{
aff5e3f8 1904 u32 value;
c2e51ac3 1905 int rc;
aff5e3f8 1906
aff5e3f8 1907 /* Mode (clock phase/polarity/etc.) */
e0bcb680 1908 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 1909 spi->mode |= SPI_CPHA;
e0bcb680 1910 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 1911 spi->mode |= SPI_CPOL;
e0bcb680 1912 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 1913 spi->mode |= SPI_3WIRE;
e0bcb680 1914 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 1915 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 1916 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW
1917 spi->mode |= SPI_CS_HIGH;
1918
aff5e3f8
PA
1919 /* Device DUAL/QUAD mode */
1920 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
1921 switch (value) {
1922 case 1:
1923 break;
1924 case 2:
1925 spi->mode |= SPI_TX_DUAL;
1926 break;
1927 case 4:
1928 spi->mode |= SPI_TX_QUAD;
1929 break;
6b03061f
YNG
1930 case 8:
1931 spi->mode |= SPI_TX_OCTAL;
1932 break;
aff5e3f8 1933 default:
8caab75f 1934 dev_warn(&ctlr->dev,
aff5e3f8
PA
1935 "spi-tx-bus-width %d not supported\n",
1936 value);
1937 break;
1938 }
1939 }
1940
1941 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
1942 switch (value) {
1943 case 1:
1944 break;
1945 case 2:
1946 spi->mode |= SPI_RX_DUAL;
1947 break;
1948 case 4:
1949 spi->mode |= SPI_RX_QUAD;
1950 break;
6b03061f
YNG
1951 case 8:
1952 spi->mode |= SPI_RX_OCTAL;
1953 break;
aff5e3f8 1954 default:
8caab75f 1955 dev_warn(&ctlr->dev,
aff5e3f8
PA
1956 "spi-rx-bus-width %d not supported\n",
1957 value);
1958 break;
1959 }
1960 }
1961
8caab75f 1962 if (spi_controller_is_slave(ctlr)) {
194276b0 1963 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH
1964 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
1965 nc);
6c364062
GU
1966 return -EINVAL;
1967 }
1968 return 0;
1969 }
1970
1971 /* Device address */
1972 rc = of_property_read_u32(nc, "reg", &value);
1973 if (rc) {
25c56c88
RH
1974 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
1975 nc, rc);
6c364062
GU
1976 return rc;
1977 }
1978 spi->chip_select = value;
1979
3e5ec1db
GC
1980 /*
1981 * For descriptors associated with the device, polarity inversion is
1982 * handled in the gpiolib, so all gpio chip selects are "active high"
1983 * in the logical sense, the gpiolib will invert the line if need be.
1984 */
15f794bd
GC
1985 if ((ctlr->use_gpio_descriptors) && ctlr->cs_gpiods &&
1986 ctlr->cs_gpiods[spi->chip_select])
3e5ec1db
GC
1987 spi->mode |= SPI_CS_HIGH;
1988
aff5e3f8 1989 /* Device speed */
671c3bf5
CG
1990 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
1991 spi->max_speed_hz = value;
aff5e3f8 1992
c2e51ac3
GU
1993 return 0;
1994}
1995
1996static struct spi_device *
8caab75f 1997of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU
1998{
1999 struct spi_device *spi;
2000 int rc;
2001
2002 /* Alloc an spi_device */
8caab75f 2003 spi = spi_alloc_device(ctlr);
c2e51ac3 2004 if (!spi) {
25c56c88 2005 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU
2006 rc = -ENOMEM;
2007 goto err_out;
2008 }
2009
2010 /* Select device driver */
2011 rc = of_modalias_node(nc, spi->modalias,
2012 sizeof(spi->modalias));
2013 if (rc < 0) {
25c56c88 2014 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU
2015 goto err_out;
2016 }
2017
8caab75f 2018 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU
2019 if (rc)
2020 goto err_out;
2021
aff5e3f8
PA
2022 /* Store a pointer to the node in the device structure */
2023 of_node_get(nc);
2024 spi->dev.of_node = nc;
2025
2026 /* Register the new device */
aff5e3f8
PA
2027 rc = spi_add_device(spi);
2028 if (rc) {
25c56c88 2029 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2030 goto err_of_node_put;
aff5e3f8
PA
2031 }
2032
2033 return spi;
2034
8324147f
JH
2035err_of_node_put:
2036 of_node_put(nc);
aff5e3f8
PA
2037err_out:
2038 spi_dev_put(spi);
2039 return ERR_PTR(rc);
2040}
2041
d57a4282
GL
2042/**
2043 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2044 * @ctlr: Pointer to spi_controller device
d57a4282 2045 *
6c364062
GU
2046 * Registers an spi_device for each child node of controller node which
2047 * represents a valid SPI slave.
d57a4282 2048 */
8caab75f 2049static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL
2050{
2051 struct spi_device *spi;
2052 struct device_node *nc;
d57a4282 2053
8caab75f 2054 if (!ctlr->dev.of_node)
d57a4282
GL
2055 return;
2056
8caab75f 2057 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU
2058 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2059 continue;
8caab75f 2060 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2061 if (IS_ERR(spi)) {
8caab75f 2062 dev_warn(&ctlr->dev,
25c56c88 2063 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR
2064 of_node_clear_flag(nc, OF_POPULATED);
2065 }
d57a4282
GL
2066 }
2067}
2068#else
8caab75f 2069static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL
2070#endif
2071
64bee4d2 2072#ifdef CONFIG_ACPI
4c3c5954
AB
2073struct acpi_spi_lookup {
2074 struct spi_controller *ctlr;
2075 u32 max_speed_hz;
2076 u32 mode;
2077 int irq;
2078 u8 bits_per_word;
2079 u8 chip_select;
2080};
2081
2082static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2083 struct acpi_spi_lookup *lookup)
8a2e487e 2084{
8a2e487e
LW
2085 const union acpi_object *obj;
2086
2087 if (!x86_apple_machine)
2088 return;
2089
2090 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2091 && obj->buffer.length >= 4)
4c3c5954 2092 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW
2093
2094 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2095 && obj->buffer.length == 8)
4c3c5954 2096 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW
2097
2098 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2099 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2100 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW
2101
2102 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2103 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2104 lookup->mode |= SPI_CPOL;
8a2e487e
LW
2105
2106 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2107 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2108 lookup->mode |= SPI_CPHA;
8a2e487e
LW
2109}
2110
64bee4d2
MW
2111static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2112{
4c3c5954
AB
2113 struct acpi_spi_lookup *lookup = data;
2114 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW
2115
2116 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2117 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB
2118 acpi_handle parent_handle;
2119 acpi_status status;
64bee4d2
MW
2120
2121 sb = &ares->data.spi_serial_bus;
2122 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954
AB
2123
2124 status = acpi_get_handle(NULL,
2125 sb->resource_source.string_ptr,
2126 &parent_handle);
2127
b5e3cf41 2128 if (ACPI_FAILURE(status) ||
4c3c5954
AB
2129 ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2130 return -ENODEV;
2131
a0a90718
MW
2132 /*
2133 * ACPI DeviceSelection numbering is handled by the
2134 * host controller driver in Windows and can vary
2135 * from driver to driver. In Linux we always expect
2136 * 0 .. max - 1 so we need to ask the driver to
2137 * translate between the two schemes.
2138 */
8caab75f
GU
2139 if (ctlr->fw_translate_cs) {
2140 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW
2141 sb->device_selection);
2142 if (cs < 0)
2143 return cs;
4c3c5954 2144 lookup->chip_select = cs;
a0a90718 2145 } else {
4c3c5954 2146 lookup->chip_select = sb->device_selection;
a0a90718
MW
2147 }
2148
4c3c5954 2149 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2150 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW
2151
2152 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2153 lookup->mode |= SPI_CPHA;
64bee4d2 2154 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2155 lookup->mode |= SPI_CPOL;
64bee4d2 2156 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2157 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2158 }
4c3c5954 2159 } else if (lookup->irq < 0) {
64bee4d2
MW
2160 struct resource r;
2161
2162 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2163 lookup->irq = r.start;
64bee4d2
MW
2164 }
2165
2166 /* Always tell the ACPI core to skip this resource */
2167 return 1;
2168}
2169
8caab75f 2170static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 2171 struct acpi_device *adev)
64bee4d2 2172{
4c3c5954 2173 acpi_handle parent_handle = NULL;
64bee4d2 2174 struct list_head resource_list;
b28944c6 2175 struct acpi_spi_lookup lookup = {};
64bee4d2
MW
2176 struct spi_device *spi;
2177 int ret;
2178
7f24467f
OP
2179 if (acpi_bus_get_status(adev) || !adev->status.present ||
2180 acpi_device_enumerated(adev))
64bee4d2
MW
2181 return AE_OK;
2182
4c3c5954 2183 lookup.ctlr = ctlr;
4c3c5954 2184 lookup.irq = -1;
64bee4d2
MW
2185
2186 INIT_LIST_HEAD(&resource_list);
2187 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2188 acpi_spi_add_resource, &lookup);
64bee4d2
MW
2189 acpi_dev_free_resource_list(&resource_list);
2190
4c3c5954
AB
2191 if (ret < 0)
2192 /* found SPI in _CRS but it points to another controller */
2193 return AE_OK;
8a2e487e 2194
4c3c5954
AB
2195 if (!lookup.max_speed_hz &&
2196 !ACPI_FAILURE(acpi_get_parent(adev->handle, &parent_handle)) &&
2197 ACPI_HANDLE(ctlr->dev.parent) == parent_handle) {
2198 /* Apple does not use _CRS but nested devices for SPI slaves */
2199 acpi_spi_parse_apple_properties(adev, &lookup);
2200 }
2201
2202 if (!lookup.max_speed_hz)
64bee4d2 2203 return AE_OK;
4c3c5954
AB
2204
2205 spi = spi_alloc_device(ctlr);
2206 if (!spi) {
2207 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
2208 dev_name(&adev->dev));
2209 return AE_NO_MEMORY;
64bee4d2
MW
2210 }
2211
ea235786 2212
4c3c5954
AB
2213 ACPI_COMPANION_SET(&spi->dev, adev);
2214 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2215 spi->mode |= lookup.mode;
4c3c5954
AB
2216 spi->irq = lookup.irq;
2217 spi->bits_per_word = lookup.bits_per_word;
2218 spi->chip_select = lookup.chip_select;
2219
0c6543f6
DD
2220 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2221 sizeof(spi->modalias));
2222
33ada67d
CR
2223 if (spi->irq < 0)
2224 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2225
7f24467f
OP
2226 acpi_device_set_enumerated(adev);
2227
33cf00e5 2228 adev->power.flags.ignore_parent = true;
64bee4d2 2229 if (spi_add_device(spi)) {
33cf00e5 2230 adev->power.flags.ignore_parent = false;
8caab75f 2231 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW
2232 dev_name(&adev->dev));
2233 spi_dev_put(spi);
2234 }
2235
2236 return AE_OK;
2237}
2238
7f24467f
OP
2239static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2240 void *data, void **return_value)
2241{
8caab75f 2242 struct spi_controller *ctlr = data;
7f24467f
OP
2243 struct acpi_device *adev;
2244
2245 if (acpi_bus_get_device(handle, &adev))
2246 return AE_OK;
2247
8caab75f 2248 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP
2249}
2250
4c3c5954
AB
2251#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2252
8caab75f 2253static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW
2254{
2255 acpi_status status;
2256 acpi_handle handle;
2257
8caab75f 2258 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW
2259 if (!handle)
2260 return;
2261
4c3c5954
AB
2262 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2263 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2264 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2265 if (ACPI_FAILURE(status))
8caab75f 2266 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW
2267}
2268#else
8caab75f 2269static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW
2270#endif /* CONFIG_ACPI */
2271
8caab75f 2272static void spi_controller_release(struct device *dev)
8ae12a0d 2273{
8caab75f 2274 struct spi_controller *ctlr;
8ae12a0d 2275
8caab75f
GU
2276 ctlr = container_of(dev, struct spi_controller, dev);
2277 kfree(ctlr);
8ae12a0d
DB
2278}
2279
2280static struct class spi_master_class = {
2281 .name = "spi_master",
2282 .owner = THIS_MODULE,
8caab75f 2283 .dev_release = spi_controller_release,
eca2ebc7 2284 .dev_groups = spi_master_groups,
8ae12a0d
DB
2285};
2286
6c364062
GU
2287#ifdef CONFIG_SPI_SLAVE
2288/**
2289 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2290 * controller
2291 * @spi: device used for the current transfer
2292 */
2293int spi_slave_abort(struct spi_device *spi)
2294{
8caab75f 2295 struct spi_controller *ctlr = spi->controller;
6c364062 2296
8caab75f
GU
2297 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2298 return ctlr->slave_abort(ctlr);
6c364062
GU
2299
2300 return -ENOTSUPP;
2301}
2302EXPORT_SYMBOL_GPL(spi_slave_abort);
2303
2304static int match_true(struct device *dev, void *data)
2305{
2306 return 1;
2307}
2308
cc8b4659
GU
2309static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2310 char *buf)
6c364062 2311{
8caab75f
GU
2312 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2313 dev);
6c364062
GU
2314 struct device *child;
2315
2316 child = device_find_child(&ctlr->dev, NULL, match_true);
2317 return sprintf(buf, "%s\n",
2318 child ? to_spi_device(child)->modalias : NULL);
2319}
2320
cc8b4659
GU
2321static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2322 const char *buf, size_t count)
6c364062 2323{
8caab75f
GU
2324 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2325 dev);
6c364062
GU
2326 struct spi_device *spi;
2327 struct device *child;
2328 char name[32];
2329 int rc;
2330
2331 rc = sscanf(buf, "%31s", name);
2332 if (rc != 1 || !name[0])
2333 return -EINVAL;
2334
2335 child = device_find_child(&ctlr->dev, NULL, match_true);
2336 if (child) {
2337 /* Remove registered slave */
2338 device_unregister(child);
2339 put_device(child);
2340 }
2341
2342 if (strcmp(name, "(null)")) {
2343 /* Register new slave */
2344 spi = spi_alloc_device(ctlr);
2345 if (!spi)
2346 return -ENOMEM;
2347
2348 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2349
2350 rc = spi_add_device(spi);
2351 if (rc) {
2352 spi_dev_put(spi);
2353 return rc;
2354 }
2355 }
2356
2357 return count;
2358}
2359
cc8b4659 2360static DEVICE_ATTR_RW(slave);
6c364062
GU
2361
2362static struct attribute *spi_slave_attrs[] = {
2363 &dev_attr_slave.attr,
2364 NULL,
2365};
2366
2367static const struct attribute_group spi_slave_group = {
2368 .attrs = spi_slave_attrs,
2369};
2370
2371static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2372 &spi_controller_statistics_group,
6c364062
GU
2373 &spi_slave_group,
2374 NULL,
2375};
2376
2377static struct class spi_slave_class = {
2378 .name = "spi_slave",
2379 .owner = THIS_MODULE,
8caab75f 2380 .dev_release = spi_controller_release,
6c364062
GU
2381 .dev_groups = spi_slave_groups,
2382};
2383#else
2384extern struct class spi_slave_class; /* dummy */
2385#endif
8ae12a0d
DB
2386
2387/**
6c364062 2388 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2389 * @dev: the controller, possibly using the platform_bus
33e34dc6 2390 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW
2391 * memory is in the driver_data field of the returned device, accessible
2392 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2393 * drivers granting DMA access to portions of their private data need to
2394 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU
2395 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2396 * slave (true) controller
33e34dc6 2397 * Context: can sleep
8ae12a0d 2398 *
6c364062 2399 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2400 * only ones directly touching chip registers. It's how they allocate
8caab75f 2401 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2402 *
97d56dc6 2403 * This must be called from context that can sleep.
8ae12a0d 2404 *
6c364062 2405 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU
2406 * controller's methods before calling spi_register_controller(); and (after
2407 * errors adding the device) calling spi_controller_put() to prevent a memory
2408 * leak.
97d56dc6 2409 *
6c364062 2410 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2411 */
8caab75f
GU
2412struct spi_controller *__spi_alloc_controller(struct device *dev,
2413 unsigned int size, bool slave)
8ae12a0d 2414{
8caab75f 2415 struct spi_controller *ctlr;
229e6af1 2416 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2417
0c868461
DB
2418 if (!dev)
2419 return NULL;
2420
229e6af1 2421 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2422 if (!ctlr)
8ae12a0d
DB
2423 return NULL;
2424
8caab75f
GU
2425 device_initialize(&ctlr->dev);
2426 ctlr->bus_num = -1;
2427 ctlr->num_chipselect = 1;
2428 ctlr->slave = slave;
6c364062 2429 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2430 ctlr->dev.class = &spi_slave_class;
6c364062 2431 else
8caab75f
GU
2432 ctlr->dev.class = &spi_master_class;
2433 ctlr->dev.parent = dev;
2434 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2435 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2436
8caab75f 2437 return ctlr;
8ae12a0d 2438}
6c364062 2439EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2440
74317984 2441#ifdef CONFIG_OF
43004f31 2442static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984 2443{
e80beb27 2444 int nb, i, *cs;
8caab75f 2445 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV
2446
2447 if (!np)
2448 return 0;
2449
2450 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2451 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2452
8ec5d84e
AL
2453 /* Return error only for an incorrectly formed cs-gpios property */
2454 if (nb == 0 || nb == -ENOENT)
74317984 2455 return 0;
8ec5d84e
AL
2456 else if (nb < 0)
2457 return nb;
74317984 2458
a86854d0 2459 cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int),
74317984 2460 GFP_KERNEL);
8caab75f 2461 ctlr->cs_gpios = cs;
74317984 2462
8caab75f 2463 if (!ctlr->cs_gpios)
74317984
JCPV
2464 return -ENOMEM;
2465
8caab75f 2466 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2467 cs[i] = -ENOENT;
74317984
JCPV
2468
2469 for (i = 0; i < nb; i++)
2470 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2471
2472 return 0;
2473}
2474#else
43004f31 2475static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984
JCPV
2476{
2477 return 0;
2478}
2479#endif
2480
f3186dd8
LW
2481/**
2482 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2483 * @ctlr: The SPI master to grab GPIO descriptors for
2484 */
2485static int spi_get_gpio_descs(struct spi_controller *ctlr)
2486{
2487 int nb, i;
2488 struct gpio_desc **cs;
2489 struct device *dev = &ctlr->dev;
7d93aecd
GU
2490 unsigned long native_cs_mask = 0;
2491 unsigned int num_cs_gpios = 0;
f3186dd8
LW
2492
2493 nb = gpiod_count(dev, "cs");
2494 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
2495
2496 /* No GPIOs at all is fine, else return the error */
2497 if (nb == 0 || nb == -ENOENT)
2498 return 0;
2499 else if (nb < 0)
2500 return nb;
2501
2502 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2503 GFP_KERNEL);
2504 if (!cs)
2505 return -ENOMEM;
2506 ctlr->cs_gpiods = cs;
2507
2508 for (i = 0; i < nb; i++) {
2509 /*
2510 * Most chipselects are active low, the inverted
2511 * semantics are handled by special quirks in gpiolib,
2512 * so initializing them GPIOD_OUT_LOW here means
2513 * "unasserted", in most cases this will drive the physical
2514 * line high.
2515 */
2516 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2517 GPIOD_OUT_LOW);
1723fdec
GU
2518 if (IS_ERR(cs[i]))
2519 return PTR_ERR(cs[i]);
f3186dd8
LW
2520
2521 if (cs[i]) {
2522 /*
2523 * If we find a CS GPIO, name it after the device and
2524 * chip select line.
2525 */
2526 char *gpioname;
2527
2528 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2529 dev_name(dev), i);
2530 if (!gpioname)
2531 return -ENOMEM;
2532 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU
2533 num_cs_gpios++;
2534 continue;
f3186dd8 2535 }
7d93aecd
GU
2536
2537 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
2538 dev_err(dev, "Invalid native chip select %d\n", i);
2539 return -EINVAL;
f3186dd8 2540 }
7d93aecd
GU
2541 native_cs_mask |= BIT(i);
2542 }
2543
2544 ctlr->unused_native_cs = ffz(native_cs_mask);
2545 if (num_cs_gpios && ctlr->max_native_cs &&
2546 ctlr->unused_native_cs >= ctlr->max_native_cs) {
2547 dev_err(dev, "No unused native chip select available\n");
2548 return -EINVAL;
f3186dd8
LW
2549 }
2550
2551 return 0;
2552}
2553
bdf3a3b5
BB
2554static int spi_controller_check_ops(struct spi_controller *ctlr)
2555{
2556 /*
b5932f5c
BB
2557 * The controller may implement only the high-level SPI-memory like
2558 * operations if it does not support regular SPI transfers, and this is
2559 * valid use case.
2560 * If ->mem_ops is NULL, we request that at least one of the
2561 * ->transfer_xxx() method be implemented.
bdf3a3b5 2562 */
b5932f5c
BB
2563 if (ctlr->mem_ops) {
2564 if (!ctlr->mem_ops->exec_op)
2565 return -EINVAL;
2566 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2567 !ctlr->transfer_one_message) {
bdf3a3b5 2568 return -EINVAL;
b5932f5c 2569 }
bdf3a3b5
BB
2570
2571 return 0;
2572}
2573
8ae12a0d 2574/**
8caab75f
GU
2575 * spi_register_controller - register SPI master or slave controller
2576 * @ctlr: initialized master, originally from spi_alloc_master() or
2577 * spi_alloc_slave()
33e34dc6 2578 * Context: can sleep
8ae12a0d 2579 *
8caab75f 2580 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2581 * such as the platform bus. The final stage of probe() in that code
8caab75f 2582 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB
2583 *
2584 * SPI controllers use board specific (often SOC specific) bus numbers,
2585 * and board-specific addressing for SPI devices combines those numbers
2586 * with chip select numbers. Since SPI does not directly support dynamic
2587 * device identification, boards need configuration tables telling which
2588 * chip is at which address.
2589 *
2590 * This must be called from context that can sleep. It returns zero on
8caab75f 2591 * success, else a negative error code (dropping the controller's refcount).
0c868461 2592 * After a successful return, the caller is responsible for calling
8caab75f 2593 * spi_unregister_controller().
97d56dc6
JMC
2594 *
2595 * Return: zero on success, else a negative error code.
8ae12a0d 2596 */
8caab75f 2597int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2598{
8caab75f 2599 struct device *dev = ctlr->dev.parent;
2b9603a0 2600 struct boardinfo *bi;
b93318a2 2601 int status;
42bdd706 2602 int id, first_dynamic;
8ae12a0d 2603
0c868461
DB
2604 if (!dev)
2605 return -ENODEV;
2606
bdf3a3b5
BB
2607 /*
2608 * Make sure all necessary hooks are implemented before registering
2609 * the SPI controller.
2610 */
2611 status = spi_controller_check_ops(ctlr);
2612 if (status)
2613 return status;
2614
04b2d03a
GU
2615 if (ctlr->bus_num >= 0) {
2616 /* devices with a fixed bus num must check-in with the num */
2617 mutex_lock(&board_lock);
2618 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2619 ctlr->bus_num + 1, GFP_KERNEL);
2620 mutex_unlock(&board_lock);
2621 if (WARN(id < 0, "couldn't get idr"))
2622 return id == -ENOSPC ? -EBUSY : id;
2623 ctlr->bus_num = id;
2624 } else if (ctlr->dev.of_node) {
2625 /* allocate dynamic bus number using Linux idr */
9b61e302
SM
2626 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2627 if (id >= 0) {
2628 ctlr->bus_num = id;
2629 mutex_lock(&board_lock);
2630 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2631 ctlr->bus_num + 1, GFP_KERNEL);
2632 mutex_unlock(&board_lock);
2633 if (WARN(id < 0, "couldn't get idr"))
2634 return id == -ENOSPC ? -EBUSY : id;
2635 }
2636 }
8caab75f 2637 if (ctlr->bus_num < 0) {
42bdd706
LS
2638 first_dynamic = of_alias_get_highest_id("spi");
2639 if (first_dynamic < 0)
2640 first_dynamic = 0;
2641 else
2642 first_dynamic++;
2643
9a9a047a 2644 mutex_lock(&board_lock);
42bdd706
LS
2645 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2646 0, GFP_KERNEL);
9a9a047a
SM
2647 mutex_unlock(&board_lock);
2648 if (WARN(id < 0, "couldn't get idr"))
2649 return id;
2650 ctlr->bus_num = id;
8ae12a0d 2651 }
8caab75f
GU
2652 INIT_LIST_HEAD(&ctlr->queue);
2653 spin_lock_init(&ctlr->queue_lock);
2654 spin_lock_init(&ctlr->bus_lock_spinlock);
2655 mutex_init(&ctlr->bus_lock_mutex);
2656 mutex_init(&ctlr->io_mutex);
2657 ctlr->bus_lock_flag = 0;
2658 init_completion(&ctlr->xfer_completion);
2659 if (!ctlr->max_dma_len)
2660 ctlr->max_dma_len = INT_MAX;
cf32b71e 2661
8ae12a0d
DB
2662 /* register the device, then userspace will see it.
2663 * registration fails if the bus ID is in use.
2664 */
8caab75f 2665 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4
AS
2666
2667 if (!spi_controller_is_slave(ctlr)) {
2668 if (ctlr->use_gpio_descriptors) {
2669 status = spi_get_gpio_descs(ctlr);
2670 if (status)
f9981d4f 2671 goto free_bus_id;
0a919ae4
AS
2672 /*
2673 * A controller using GPIO descriptors always
2674 * supports SPI_CS_HIGH if need be.
2675 */
2676 ctlr->mode_bits |= SPI_CS_HIGH;
2677 } else {
2678 /* Legacy code path for GPIOs from DT */
43004f31 2679 status = of_spi_get_gpio_numbers(ctlr);
0a919ae4 2680 if (status)
f9981d4f 2681 goto free_bus_id;
0a919ae4
AS
2682 }
2683 }
2684
f9481b08
TA
2685 /*
2686 * Even if it's just one always-selected device, there must
2687 * be at least one chipselect.
2688 */
f9981d4f
AK
2689 if (!ctlr->num_chipselect) {
2690 status = -EINVAL;
2691 goto free_bus_id;
2692 }
f9481b08 2693
8caab75f 2694 status = device_add(&ctlr->dev);
f9981d4f
AK
2695 if (status < 0)
2696 goto free_bus_id;
9b61e302 2697 dev_dbg(dev, "registered %s %s\n",
8caab75f 2698 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2699 dev_name(&ctlr->dev));
8ae12a0d 2700
b5932f5c
BB
2701 /*
2702 * If we're using a queued driver, start the queue. Note that we don't
2703 * need the queueing logic if the driver is only supporting high-level
2704 * memory operations.
2705 */
2706 if (ctlr->transfer) {
8caab75f 2707 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 2708 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 2709 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2710 if (status) {
8caab75f 2711 device_del(&ctlr->dev);
f9981d4f 2712 goto free_bus_id;
ffbbdd21
LW
2713 }
2714 }
eca2ebc7 2715 /* add statistics */
8caab75f 2716 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2717
2b9603a0 2718 mutex_lock(&board_lock);
8caab75f 2719 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2720 list_for_each_entry(bi, &board_list, list)
8caab75f 2721 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT
2722 mutex_unlock(&board_lock);
2723
64bee4d2 2724 /* Register devices from the device tree and ACPI */
8caab75f
GU
2725 of_register_spi_devices(ctlr);
2726 acpi_register_spi_devices(ctlr);
f9981d4f
AK
2727 return status;
2728
2729free_bus_id:
2730 mutex_lock(&board_lock);
2731 idr_remove(&spi_master_idr, ctlr->bus_num);
2732 mutex_unlock(&board_lock);
8ae12a0d
DB
2733 return status;
2734}
8caab75f 2735EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2736
666d5b4c
MB
2737static void devm_spi_unregister(struct device *dev, void *res)
2738{
8caab75f 2739 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB
2740}
2741
2742/**
8caab75f
GU
2743 * devm_spi_register_controller - register managed SPI master or slave
2744 * controller
2745 * @dev: device managing SPI controller
2746 * @ctlr: initialized controller, originally from spi_alloc_master() or
2747 * spi_alloc_slave()
666d5b4c
MB
2748 * Context: can sleep
2749 *
8caab75f 2750 * Register a SPI device as with spi_register_controller() which will
68b892f1 2751 * automatically be unregistered and freed.
97d56dc6
JMC
2752 *
2753 * Return: zero on success, else a negative error code.
666d5b4c 2754 */
8caab75f
GU
2755int devm_spi_register_controller(struct device *dev,
2756 struct spi_controller *ctlr)
666d5b4c 2757{
8caab75f 2758 struct spi_controller **ptr;
666d5b4c
MB
2759 int ret;
2760
2761 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
2762 if (!ptr)
2763 return -ENOMEM;
2764
8caab75f 2765 ret = spi_register_controller(ctlr);
4b92894e 2766 if (!ret) {
8caab75f 2767 *ptr = ctlr;
666d5b4c
MB
2768 devres_add(dev, ptr);
2769 } else {
2770 devres_free(ptr);
2771 }
2772
2773 return ret;
2774}
8caab75f 2775EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 2776
34860089 2777static int __unregister(struct device *dev, void *null)
8ae12a0d 2778{
34860089 2779 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB
2780 return 0;
2781}
2782
2783/**
8caab75f
GU
2784 * spi_unregister_controller - unregister SPI master or slave controller
2785 * @ctlr: the controller being unregistered
33e34dc6 2786 * Context: can sleep
8ae12a0d 2787 *
8caab75f 2788 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB
2789 * only ones directly touching chip registers.
2790 *
2791 * This must be called from context that can sleep.
68b892f1
JH
2792 *
2793 * Note that this function also drops a reference to the controller.
8ae12a0d 2794 */
8caab75f 2795void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 2796{
9b61e302 2797 struct spi_controller *found;
67f7b278 2798 int id = ctlr->bus_num;
89fc9a1a 2799
84855678
LW
2800 device_for_each_child(&ctlr->dev, NULL, __unregister);
2801
9b61e302
SM
2802 /* First make sure that this controller was ever added */
2803 mutex_lock(&board_lock);
67f7b278 2804 found = idr_find(&spi_master_idr, id);
9b61e302 2805 mutex_unlock(&board_lock);
8caab75f
GU
2806 if (ctlr->queued) {
2807 if (spi_destroy_queue(ctlr))
2808 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 2809 }
2b9603a0 2810 mutex_lock(&board_lock);
8caab75f 2811 list_del(&ctlr->list);
2b9603a0
FT
2812 mutex_unlock(&board_lock);
2813
8caab75f 2814 device_unregister(&ctlr->dev);
9b61e302
SM
2815 /* free bus id */
2816 mutex_lock(&board_lock);
613bd1ea
JN
2817 if (found == ctlr)
2818 idr_remove(&spi_master_idr, id);
9b61e302 2819 mutex_unlock(&board_lock);
8ae12a0d 2820}
8caab75f 2821EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 2822
8caab75f 2823int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW
2824{
2825 int ret;
2826
8caab75f
GU
2827 /* Basically no-ops for non-queued controllers */
2828 if (!ctlr->queued)
ffbbdd21
LW
2829 return 0;
2830
8caab75f 2831 ret = spi_stop_queue(ctlr);
ffbbdd21 2832 if (ret)
8caab75f 2833 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW
2834
2835 return ret;
2836}
8caab75f 2837EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 2838
8caab75f 2839int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW
2840{
2841 int ret;
2842
8caab75f 2843 if (!ctlr->queued)
ffbbdd21
LW
2844 return 0;
2845
8caab75f 2846 ret = spi_start_queue(ctlr);
ffbbdd21 2847 if (ret)
8caab75f 2848 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW
2849
2850 return ret;
2851}
8caab75f 2852EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 2853
8caab75f 2854static int __spi_controller_match(struct device *dev, const void *data)
5ed2c832 2855{
8caab75f 2856 struct spi_controller *ctlr;
9f3b795a 2857 const u16 *bus_num = data;
5ed2c832 2858
8caab75f
GU
2859 ctlr = container_of(dev, struct spi_controller, dev);
2860 return ctlr->bus_num == *bus_num;
5ed2c832
DY
2861}
2862
8ae12a0d
DB
2863/**
2864 * spi_busnum_to_master - look up master associated with bus_num
2865 * @bus_num: the master's bus number
33e34dc6 2866 * Context: can sleep
8ae12a0d
DB
2867 *
2868 * This call may be used with devices that are registered after
2869 * arch init time. It returns a refcounted pointer to the relevant
8caab75f 2870 * spi_controller (which the caller must release), or NULL if there is
8ae12a0d 2871 * no such master registered.
97d56dc6
JMC
2872 *
2873 * Return: the SPI master structure on success, else NULL.
8ae12a0d 2874 */
8caab75f 2875struct spi_controller *spi_busnum_to_master(u16 bus_num)
8ae12a0d 2876{
49dce689 2877 struct device *dev;
8caab75f 2878 struct spi_controller *ctlr = NULL;
5ed2c832 2879
695794ae 2880 dev = class_find_device(&spi_master_class, NULL, &bus_num,
8caab75f 2881 __spi_controller_match);
5ed2c832 2882 if (dev)
8caab75f 2883 ctlr = container_of(dev, struct spi_controller, dev);
5ed2c832 2884 /* reference got in class_find_device */
8caab75f 2885 return ctlr;
8ae12a0d
DB
2886}
2887EXPORT_SYMBOL_GPL(spi_busnum_to_master);
2888
d780c371
MS
2889/*-------------------------------------------------------------------------*/
2890
2891/* Core methods for SPI resource management */
2892
2893/**
2894 * spi_res_alloc - allocate a spi resource that is life-cycle managed
2895 * during the processing of a spi_message while using
2896 * spi_transfer_one
2897 * @spi: the spi device for which we allocate memory
2898 * @release: the release code to execute for this resource
2899 * @size: size to alloc and return
2900 * @gfp: GFP allocation flags
2901 *
2902 * Return: the pointer to the allocated data
2903 *
2904 * This may get enhanced in the future to allocate from a memory pool
8caab75f 2905 * of the @spi_device or @spi_controller to avoid repeated allocations.
d780c371
MS
2906 */
2907void *spi_res_alloc(struct spi_device *spi,
2908 spi_res_release_t release,
2909 size_t size, gfp_t gfp)
2910{
2911 struct spi_res *sres;
2912
2913 sres = kzalloc(sizeof(*sres) + size, gfp);
2914 if (!sres)
2915 return NULL;
2916
2917 INIT_LIST_HEAD(&sres->entry);
2918 sres->release = release;
2919
2920 return sres->data;
2921}
2922EXPORT_SYMBOL_GPL(spi_res_alloc);
2923
2924/**
2925 * spi_res_free - free an spi resource
2926 * @res: pointer to the custom data of a resource
2927 *
2928 */
2929void spi_res_free(void *res)
2930{
2931 struct spi_res *sres = container_of(res, struct spi_res, data);
2932
2933 if (!res)
2934 return;
2935
2936 WARN_ON(!list_empty(&sres->entry));
2937 kfree(sres);
2938}
2939EXPORT_SYMBOL_GPL(spi_res_free);
2940
2941/**
2942 * spi_res_add - add a spi_res to the spi_message
2943 * @message: the spi message
2944 * @res: the spi_resource
2945 */
2946void spi_res_add(struct spi_message *message, void *res)
2947{
2948 struct spi_res *sres = container_of(res, struct spi_res, data);
2949
2950 WARN_ON(!list_empty(&sres->entry));
2951 list_add_tail(&sres->entry, &message->resources);
2952}
2953EXPORT_SYMBOL_GPL(spi_res_add);
2954
2955/**
2956 * spi_res_release - release all spi resources for this message
8caab75f 2957 * @ctlr: the @spi_controller
d780c371
MS
2958 * @message: the @spi_message
2959 */
8caab75f 2960void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
d780c371 2961{
f5694369 2962 struct spi_res *res, *tmp;
d780c371 2963
f5694369 2964 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
d780c371 2965 if (res->release)
8caab75f 2966 res->release(ctlr, message, res->data);
d780c371
MS
2967
2968 list_del(&res->entry);
2969
2970 kfree(res);
2971 }
2972}
2973EXPORT_SYMBOL_GPL(spi_res_release);
8ae12a0d
DB
2974
2975/*-------------------------------------------------------------------------*/
2976
523baf5a
MS
2977/* Core methods for spi_message alterations */
2978
8caab75f 2979static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS
2980 struct spi_message *msg,
2981 void *res)
2982{
2983 struct spi_replaced_transfers *rxfer = res;
2984 size_t i;
2985
2986 /* call extra callback if requested */
2987 if (rxfer->release)
8caab75f 2988 rxfer->release(ctlr, msg, res);
523baf5a
MS
2989
2990 /* insert replaced transfers back into the message */
2991 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
2992
2993 /* remove the formerly inserted entries */
2994 for (i = 0; i < rxfer->inserted; i++)
2995 list_del(&rxfer->inserted_transfers[i].transfer_list);
2996}
2997
2998/**
2999 * spi_replace_transfers - replace transfers with several transfers
3000 * and register change with spi_message.resources
3001 * @msg: the spi_message we work upon
3002 * @xfer_first: the first spi_transfer we want to replace
3003 * @remove: number of transfers to remove
3004 * @insert: the number of transfers we want to insert instead
3005 * @release: extra release code necessary in some circumstances
3006 * @extradatasize: extra data to allocate (with alignment guarantees
3007 * of struct @spi_transfer)
05885397 3008 * @gfp: gfp flags
523baf5a
MS
3009 *
3010 * Returns: pointer to @spi_replaced_transfers,
3011 * PTR_ERR(...) in case of errors.
3012 */
3013struct spi_replaced_transfers *spi_replace_transfers(
3014 struct spi_message *msg,
3015 struct spi_transfer *xfer_first,
3016 size_t remove,
3017 size_t insert,
3018 spi_replaced_release_t release,
3019 size_t extradatasize,
3020 gfp_t gfp)
3021{
3022 struct spi_replaced_transfers *rxfer;
3023 struct spi_transfer *xfer;
3024 size_t i;
3025
3026 /* allocate the structure using spi_res */
3027 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3028 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS
3029 + extradatasize,
3030 gfp);
3031 if (!rxfer)
3032 return ERR_PTR(-ENOMEM);
3033
3034 /* the release code to invoke before running the generic release */
3035 rxfer->release = release;
3036
3037 /* assign extradata */
3038 if (extradatasize)
3039 rxfer->extradata =
3040 &rxfer->inserted_transfers[insert];
3041
3042 /* init the replaced_transfers list */
3043 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3044
3045 /* assign the list_entry after which we should reinsert
3046 * the @replaced_transfers - it may be spi_message.messages!
3047 */
3048 rxfer->replaced_after = xfer_first->transfer_list.prev;
3049
3050 /* remove the requested number of transfers */
3051 for (i = 0; i < remove; i++) {
3052 /* if the entry after replaced_after it is msg->transfers
3053 * then we have been requested to remove more transfers
3054 * than are in the list
3055 */
3056 if (rxfer->replaced_after->next == &msg->transfers) {
3057 dev_err(&msg->spi->dev,
3058 "requested to remove more spi_transfers than are available\n");
3059 /* insert replaced transfers back into the message */
3060 list_splice(&rxfer->replaced_transfers,
3061 rxfer->replaced_after);
3062
3063 /* free the spi_replace_transfer structure */
3064 spi_res_free(rxfer);
3065
3066 /* and return with an error */
3067 return ERR_PTR(-EINVAL);
3068 }
3069
3070 /* remove the entry after replaced_after from list of
3071 * transfers and add it to list of replaced_transfers
3072 */
3073 list_move_tail(rxfer->replaced_after->next,
3074 &rxfer->replaced_transfers);
3075 }
3076
3077 /* create copy of the given xfer with identical settings
3078 * based on the first transfer to get removed
3079 */
3080 for (i = 0; i < insert; i++) {
3081 /* we need to run in reverse order */
3082 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3083
3084 /* copy all spi_transfer data */
3085 memcpy(xfer, xfer_first, sizeof(*xfer));
3086
3087 /* add to list */
3088 list_add(&xfer->transfer_list, rxfer->replaced_after);
3089
bebcfd27 3090 /* clear cs_change and delay for all but the last */
523baf5a
MS
3091 if (i) {
3092 xfer->cs_change = false;
3093 xfer->delay_usecs = 0;
bebcfd27 3094 xfer->delay.value = 0;
523baf5a
MS
3095 }
3096 }
3097
3098 /* set up inserted */
3099 rxfer->inserted = insert;
3100
3101 /* and register it with spi_res/spi_message */
3102 spi_res_add(msg, rxfer);
3103
3104 return rxfer;
3105}
3106EXPORT_SYMBOL_GPL(spi_replace_transfers);
3107
8caab75f 3108static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE
3109 struct spi_message *msg,
3110 struct spi_transfer **xferp,
3111 size_t maxsize,
3112 gfp_t gfp)
d9f12122
MS
3113{
3114 struct spi_transfer *xfer = *xferp, *xfers;
3115 struct spi_replaced_transfers *srt;
3116 size_t offset;
3117 size_t count, i;
3118
d9f12122
MS
3119 /* calculate how many we have to replace */
3120 count = DIV_ROUND_UP(xfer->len, maxsize);
3121
3122 /* create replacement */
3123 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC
3124 if (IS_ERR(srt))
3125 return PTR_ERR(srt);
d9f12122
MS
3126 xfers = srt->inserted_transfers;
3127
3128 /* now handle each of those newly inserted spi_transfers
3129 * note that the replacements spi_transfers all are preset
3130 * to the same values as *xferp, so tx_buf, rx_buf and len
3131 * are all identical (as well as most others)
3132 * so we just have to fix up len and the pointers.
3133 *
3134 * this also includes support for the depreciated
3135 * spi_message.is_dma_mapped interface
3136 */
3137
3138 /* the first transfer just needs the length modified, so we
3139 * run it outside the loop
3140 */
c8dab77a 3141 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS
3142
3143 /* all the others need rx_buf/tx_buf also set */
3144 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3145 /* update rx_buf, tx_buf and dma */
3146 if (xfers[i].rx_buf)
3147 xfers[i].rx_buf += offset;
3148 if (xfers[i].rx_dma)
3149 xfers[i].rx_dma += offset;
3150 if (xfers[i].tx_buf)
3151 xfers[i].tx_buf += offset;
3152 if (xfers[i].tx_dma)
3153 xfers[i].tx_dma += offset;
3154
3155 /* update length */
3156 xfers[i].len = min(maxsize, xfers[i].len - offset);
3157 }
3158
3159 /* we set up xferp to the last entry we have inserted,
3160 * so that we skip those already split transfers
3161 */
3162 *xferp = &xfers[count - 1];
3163
3164 /* increment statistics counters */
8caab75f 3165 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS
3166 transfers_split_maxsize);
3167 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
3168 transfers_split_maxsize);
3169
3170 return 0;
3171}
3172
3173/**
3174 * spi_split_tranfers_maxsize - split spi transfers into multiple transfers
3175 * when an individual transfer exceeds a
3176 * certain size
8caab75f 3177 * @ctlr: the @spi_controller for this transfer
3700ce95
MI
3178 * @msg: the @spi_message to transform
3179 * @maxsize: the maximum when to apply this
10f11a22 3180 * @gfp: GFP allocation flags
d9f12122
MS
3181 *
3182 * Return: status of transformation
3183 */
8caab75f 3184int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS
3185 struct spi_message *msg,
3186 size_t maxsize,
3187 gfp_t gfp)
3188{
3189 struct spi_transfer *xfer;
3190 int ret;
3191
3192 /* iterate over the transfer_list,
3193 * but note that xfer is advanced to the last transfer inserted
3194 * to avoid checking sizes again unnecessarily (also xfer does
3195 * potentiall belong to a different list by the time the
3196 * replacement has happened
3197 */
3198 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3199 if (xfer->len > maxsize) {
8caab75f
GU
3200 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3201 maxsize, gfp);
d9f12122
MS
3202 if (ret)
3203 return ret;
3204 }
3205 }
3206
3207 return 0;
3208}
3209EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB
3210
3211/*-------------------------------------------------------------------------*/
3212
8caab75f 3213/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB
3214 * other core methods are currently defined as inline functions.
3215 */
3216
8caab75f
GU
3217static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3218 u8 bits_per_word)
63ab645f 3219{
8caab75f 3220 if (ctlr->bits_per_word_mask) {
63ab645f
SB
3221 /* Only 32 bits fit in the mask */
3222 if (bits_per_word > 32)
3223 return -EINVAL;
8caab75f 3224 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB
3225 return -EINVAL;
3226 }
3227
3228 return 0;
3229}
3230
7d077197
DB
3231/**
3232 * spi_setup - setup SPI mode and clock rate
3233 * @spi: the device whose settings are being modified
3234 * Context: can sleep, and no requests are queued to the device
3235 *
3236 * SPI protocol drivers may need to update the transfer mode if the
3237 * device doesn't work with its default. They may likewise need
3238 * to update clock rates or word sizes from initial values. This function
3239 * changes those settings, and must be called from a context that can sleep.
3240 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3241 * effect the next time the device is selected and data is transferred to
3242 * or from it. When this function returns, the spi device is deselected.
3243 *
3244 * Note that this call will fail if the protocol driver specifies an option
3245 * that the underlying controller or its driver does not support. For
3246 * example, not all hardware supports wire transfers using nine bit words,
3247 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC
3248 *
3249 * Return: zero on success, else a negative error code.
7d077197
DB
3250 */
3251int spi_setup(struct spi_device *spi)
3252{
83596fbe 3253 unsigned bad_bits, ugly_bits;
5ab8d262 3254 int status;
7d077197 3255
f477b7fb 3256 /* check mode to prevent that DUAL and QUAD set at the same time
3257 */
3258 if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
3259 ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
3260 dev_err(&spi->dev,
3261 "setup: can not select dual and quad at the same time\n");
3262 return -EINVAL;
3263 }
3264 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
3265 */
3266 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG
3267 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3268 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3269 return -EINVAL;
e7db06b5 3270 /* help drivers fail *cleanly* when they need options
8caab75f 3271 * that aren't supported with their current controller
cbaa62e0
DL
3272 * SPI_CS_WORD has a fallback software implementation,
3273 * so it is ignored here.
e7db06b5 3274 */
cbaa62e0 3275 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD);
d61ad23c
SS
3276 /* nothing prevents from working with active-high CS in case if it
3277 * is driven by GPIO.
3278 */
3279 if (gpio_is_valid(spi->cs_gpio))
3280 bad_bits &= ~SPI_CS_HIGH;
83596fbe 3281 ugly_bits = bad_bits &
6b03061f
YNG
3282 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3283 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU
3284 if (ugly_bits) {
3285 dev_warn(&spi->dev,
3286 "setup: ignoring unsupported mode bits %x\n",
3287 ugly_bits);
3288 spi->mode &= ~ugly_bits;
3289 bad_bits &= ~ugly_bits;
3290 }
e7db06b5 3291 if (bad_bits) {
eb288a1f 3292 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB
3293 bad_bits);
3294 return -EINVAL;
3295 }
3296
7d077197
DB
3297 if (!spi->bits_per_word)
3298 spi->bits_per_word = 8;
3299
8caab75f
GU
3300 status = __spi_validate_bits_per_word(spi->controller,
3301 spi->bits_per_word);
5ab8d262
AS
3302 if (status)
3303 return status;
63ab645f 3304
052eb2d4 3305 if (!spi->max_speed_hz)
8caab75f 3306 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3307
8caab75f
GU
3308 if (spi->controller->setup)
3309 status = spi->controller->setup(spi);
7d077197 3310
d948e6ca
LX
3311 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
3312 status = pm_runtime_get_sync(spi->controller->dev.parent);
3313 if (status < 0) {
3314 pm_runtime_put_noidle(spi->controller->dev.parent);
3315 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3316 status);
3317 return status;
3318 }
57a94607
TL
3319
3320 /*
3321 * We do not want to return positive value from pm_runtime_get,
3322 * there are many instances of devices calling spi_setup() and
3323 * checking for a non-zero return value instead of a negative
3324 * return value.
3325 */
3326 status = 0;
3327
d948e6ca
LX
3328 spi_set_cs(spi, false);
3329 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3330 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3331 } else {
3332 spi_set_cs(spi, false);
3333 }
abeedb01 3334
924b5867
DA
3335 if (spi->rt && !spi->controller->rt) {
3336 spi->controller->rt = true;
3337 spi_set_thread_rt(spi->controller);
3338 }
3339
5fe5f05e 3340 dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
7d077197
DB
3341 (int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
3342 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3343 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3344 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3345 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3346 spi->bits_per_word, spi->max_speed_hz,
3347 status);
3348
3349 return status;
3350}
3351EXPORT_SYMBOL_GPL(spi_setup);
3352
f1ca9992
SK
3353/**
3354 * spi_set_cs_timing - configure CS setup, hold, and inactive delays
3355 * @spi: the device that requires specific CS timing configuration
81059366
AA
3356 * @setup: CS setup time specified via @spi_delay
3357 * @hold: CS hold time specified via @spi_delay
3358 * @inactive: CS inactive delay between transfers specified via @spi_delay
3359 *
3360 * Return: zero on success, else a negative error code.
f1ca9992 3361 */
81059366
AA
3362int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup,
3363 struct spi_delay *hold, struct spi_delay *inactive)
f1ca9992 3364{
25093bde
AA
3365 size_t len;
3366
f1ca9992 3367 if (spi->controller->set_cs_timing)
81059366
AA
3368 return spi->controller->set_cs_timing(spi, setup, hold,
3369 inactive);
25093bde
AA
3370
3371 if ((setup && setup->unit == SPI_DELAY_UNIT_SCK) ||
3372 (hold && hold->unit == SPI_DELAY_UNIT_SCK) ||
3373 (inactive && inactive->unit == SPI_DELAY_UNIT_SCK)) {
3374 dev_err(&spi->dev,
3375 "Clock-cycle delays for CS not supported in SW mode\n");
3376 return -ENOTSUPP;
3377 }
3378
3379 len = sizeof(struct spi_delay);
3380
3381 /* copy delays to controller */
3382 if (setup)
3383 memcpy(&spi->controller->cs_setup, setup, len);
3384 else
3385 memset(&spi->controller->cs_setup, 0, len);
3386
3387 if (hold)
3388 memcpy(&spi->controller->cs_hold, hold, len);
3389 else
3390 memset(&spi->controller->cs_hold, 0, len);
3391
3392 if (inactive)
3393 memcpy(&spi->controller->cs_inactive, inactive, len);
3394 else
3395 memset(&spi->controller->cs_inactive, 0, len);
3396
3397 return 0;
f1ca9992
SK
3398}
3399EXPORT_SYMBOL_GPL(spi_set_cs_timing);
3400
6c613f68
AA
3401static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3402 struct spi_device *spi)
3403{
3404 int delay1, delay2;
3405
3984d39b 3406 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA
3407 if (delay1 < 0)
3408 return delay1;
3409
3984d39b 3410 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA
3411 if (delay2 < 0)
3412 return delay2;
3413
3414 if (delay1 < delay2)
3415 memcpy(&xfer->word_delay, &spi->word_delay,
3416 sizeof(xfer->word_delay));
3417
3418 return 0;
3419}
3420
90808738 3421static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3422{
8caab75f 3423 struct spi_controller *ctlr = spi->controller;
e6811d1d 3424 struct spi_transfer *xfer;
6ea31293 3425 int w_size;
cf32b71e 3426
24a0013a
MB
3427 if (list_empty(&message->transfers))
3428 return -EINVAL;
24a0013a 3429
cbaa62e0 3430 /* If an SPI controller does not support toggling the CS line on each
71388b21
DL
3431 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3432 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL
3433 * splitting transfers into one-word transfers and ensuring that
3434 * cs_change is set for each transfer.
3435 */
71388b21 3436 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f3186dd8 3437 spi->cs_gpiod ||
71388b21 3438 gpio_is_valid(spi->cs_gpio))) {
cbaa62e0
DL
3439 size_t maxsize;
3440 int ret;
3441
3442 maxsize = (spi->bits_per_word + 7) / 8;
3443
3444 /* spi_split_transfers_maxsize() requires message->spi */
3445 message->spi = spi;
3446
3447 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3448 GFP_KERNEL);
3449 if (ret)
3450 return ret;
3451
3452 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3453 /* don't change cs_change on the last entry in the list */
3454 if (list_is_last(&xfer->transfer_list, &message->transfers))
3455 break;
3456 xfer->cs_change = 1;
3457 }
3458 }
3459
cf32b71e
ES
3460 /* Half-duplex links include original MicroWire, and ones with
3461 * only one data pin like SPI_3WIRE (switches direction) or where
3462 * either MOSI or MISO is missing. They can also be caused by
3463 * software limitations.
3464 */
8caab75f
GU
3465 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3466 (spi->mode & SPI_3WIRE)) {
3467 unsigned flags = ctlr->flags;
cf32b71e
ES
3468
3469 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3470 if (xfer->rx_buf && xfer->tx_buf)
3471 return -EINVAL;
8caab75f 3472 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3473 return -EINVAL;
8caab75f 3474 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES
3475 return -EINVAL;
3476 }
3477 }
3478
e6811d1d 3479 /**
059b8ffe
LD
3480 * Set transfer bits_per_word and max speed as spi device default if
3481 * it is not set for this transfer.
f477b7fb 3482 * Set transfer tx_nbits and rx_nbits as single transfer default
3483 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB
3484 * Ensure transfer word_delay is at least as long as that required by
3485 * device itself.
e6811d1d 3486 */
77e80588 3487 message->frame_length = 0;
e6811d1d 3488 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3489 xfer->effective_speed_hz = 0;
078726ce 3490 message->frame_length += xfer->len;
e6811d1d
LD
3491 if (!xfer->bits_per_word)
3492 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL
3493
3494 if (!xfer->speed_hz)
059b8ffe 3495 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3496
8caab75f
GU
3497 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3498 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3499
8caab75f 3500 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3501 return -EINVAL;
a2fd4f9f 3502
4d94bd21
II
3503 /*
3504 * SPI transfer length should be multiple of SPI word size
3505 * where SPI word size should be power-of-two multiple
3506 */
3507 if (xfer->bits_per_word <= 8)
3508 w_size = 1;
3509 else if (xfer->bits_per_word <= 16)
3510 w_size = 2;
3511 else
3512 w_size = 4;
3513
4d94bd21 3514 /* No partial transfers accepted */
6ea31293 3515 if (xfer->len % w_size)
4d94bd21
II
3516 return -EINVAL;
3517
8caab75f
GU
3518 if (xfer->speed_hz && ctlr->min_speed_hz &&
3519 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3520 return -EINVAL;
f477b7fb 3521
3522 if (xfer->tx_buf && !xfer->tx_nbits)
3523 xfer->tx_nbits = SPI_NBITS_SINGLE;
3524 if (xfer->rx_buf && !xfer->rx_nbits)
3525 xfer->rx_nbits = SPI_NBITS_SINGLE;
3526 /* check transfer tx/rx_nbits:
1afd9989
GU
3527 * 1. check the value matches one of single, dual and quad
3528 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3529 */
db90a441
SP
3530 if (xfer->tx_buf) {
3531 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3532 xfer->tx_nbits != SPI_NBITS_DUAL &&
3533 xfer->tx_nbits != SPI_NBITS_QUAD)
3534 return -EINVAL;
3535 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3536 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3537 return -EINVAL;
3538 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3539 !(spi->mode & SPI_TX_QUAD))
3540 return -EINVAL;
db90a441 3541 }
f477b7fb 3542 /* check transfer rx_nbits */
db90a441
SP
3543 if (xfer->rx_buf) {
3544 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3545 xfer->rx_nbits != SPI_NBITS_DUAL &&
3546 xfer->rx_nbits != SPI_NBITS_QUAD)
3547 return -EINVAL;
3548 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3549 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3550 return -EINVAL;
3551 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3552 !(spi->mode & SPI_RX_QUAD))
3553 return -EINVAL;
db90a441 3554 }
b7bb367a 3555
6c613f68
AA
3556 if (_spi_xfer_word_delay_update(xfer, spi))
3557 return -EINVAL;
e6811d1d
LD
3558 }
3559
cf32b71e 3560 message->status = -EINPROGRESS;
90808738
MB
3561
3562 return 0;
3563}
3564
3565static int __spi_async(struct spi_device *spi, struct spi_message *message)
3566{
8caab75f 3567 struct spi_controller *ctlr = spi->controller;
b42faeee 3568 struct spi_transfer *xfer;
90808738 3569
b5932f5c
BB
3570 /*
3571 * Some controllers do not support doing regular SPI transfers. Return
3572 * ENOTSUPP when this is the case.
3573 */
3574 if (!ctlr->transfer)
3575 return -ENOTSUPP;
3576
90808738
MB
3577 message->spi = spi;
3578
8caab75f 3579 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS
3580 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
3581
90808738
MB
3582 trace_spi_message_submit(message);
3583
b42faeee
VO
3584 if (!ctlr->ptp_sts_supported) {
3585 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3586 xfer->ptp_sts_word_pre = 0;
3587 ptp_read_system_prets(xfer->ptp_sts);
3588 }
3589 }
3590
8caab75f 3591 return ctlr->transfer(spi, message);
cf32b71e
ES
3592}
3593
568d0697
DB
3594/**
3595 * spi_async - asynchronous SPI transfer
3596 * @spi: device with which data will be exchanged
3597 * @message: describes the data transfers, including completion callback
3598 * Context: any (irqs may be blocked, etc)
3599 *
3600 * This call may be used in_irq and other contexts which can't sleep,
3601 * as well as from task contexts which can sleep.
3602 *
3603 * The completion callback is invoked in a context which can't sleep.
3604 * Before that invocation, the value of message->status is undefined.
3605 * When the callback is issued, message->status holds either zero (to
3606 * indicate complete success) or a negative error code. After that
3607 * callback returns, the driver which issued the transfer request may
3608 * deallocate the associated memory; it's no longer in use by any SPI
3609 * core or controller driver code.
3610 *
3611 * Note that although all messages to a spi_device are handled in
3612 * FIFO order, messages may go to different devices in other orders.
3613 * Some device might be higher priority, or have various "hard" access
3614 * time requirements, for example.
3615 *
3616 * On detection of any fault during the transfer, processing of
3617 * the entire message is aborted, and the device is deselected.
3618 * Until returning from the associated message completion callback,
3619 * no other spi_message queued to that device will be processed.
3620 * (This rule applies equally to all the synchronous transfer calls,
3621 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3622 *
3623 * Return: zero on success, else a negative error code.
568d0697
DB
3624 */
3625int spi_async(struct spi_device *spi, struct spi_message *message)
3626{
8caab75f 3627 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3628 int ret;
3629 unsigned long flags;
568d0697 3630
90808738
MB
3631 ret = __spi_validate(spi, message);
3632 if (ret != 0)
3633 return ret;
3634
8caab75f 3635 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3636
8caab75f 3637 if (ctlr->bus_lock_flag)
cf32b71e
ES
3638 ret = -EBUSY;
3639 else
3640 ret = __spi_async(spi, message);
568d0697 3641
8caab75f 3642 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3643
3644 return ret;
568d0697
DB
3645}
3646EXPORT_SYMBOL_GPL(spi_async);
3647
cf32b71e
ES
3648/**
3649 * spi_async_locked - version of spi_async with exclusive bus usage
3650 * @spi: device with which data will be exchanged
3651 * @message: describes the data transfers, including completion callback
3652 * Context: any (irqs may be blocked, etc)
3653 *
3654 * This call may be used in_irq and other contexts which can't sleep,
3655 * as well as from task contexts which can sleep.
3656 *
3657 * The completion callback is invoked in a context which can't sleep.
3658 * Before that invocation, the value of message->status is undefined.
3659 * When the callback is issued, message->status holds either zero (to
3660 * indicate complete success) or a negative error code. After that
3661 * callback returns, the driver which issued the transfer request may
3662 * deallocate the associated memory; it's no longer in use by any SPI
3663 * core or controller driver code.
3664 *
3665 * Note that although all messages to a spi_device are handled in
3666 * FIFO order, messages may go to different devices in other orders.
3667 * Some device might be higher priority, or have various "hard" access
3668 * time requirements, for example.
3669 *
3670 * On detection of any fault during the transfer, processing of
3671 * the entire message is aborted, and the device is deselected.
3672 * Until returning from the associated message completion callback,
3673 * no other spi_message queued to that device will be processed.
3674 * (This rule applies equally to all the synchronous transfer calls,
3675 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC
3676 *
3677 * Return: zero on success, else a negative error code.
cf32b71e
ES
3678 */
3679int spi_async_locked(struct spi_device *spi, struct spi_message *message)
3680{
8caab75f 3681 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES
3682 int ret;
3683 unsigned long flags;
3684
90808738
MB
3685 ret = __spi_validate(spi, message);
3686 if (ret != 0)
3687 return ret;
3688
8caab75f 3689 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3690
3691 ret = __spi_async(spi, message);
3692
8caab75f 3693 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3694
3695 return ret;
3696
3697}
3698EXPORT_SYMBOL_GPL(spi_async_locked);
3699
7d077197
DB
3700/*-------------------------------------------------------------------------*/
3701
8caab75f 3702/* Utility methods for SPI protocol drivers, layered on
7d077197
DB
3703 * top of the core. Some other utility methods are defined as
3704 * inline functions.
3705 */
3706
5d870c8e
AM
3707static void spi_complete(void *arg)
3708{
3709 complete(arg);
3710}
3711
ef4d96ec 3712static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES
3713{
3714 DECLARE_COMPLETION_ONSTACK(done);
3715 int status;
8caab75f 3716 struct spi_controller *ctlr = spi->controller;
0461a414
MB
3717 unsigned long flags;
3718
3719 status = __spi_validate(spi, message);
3720 if (status != 0)
3721 return status;
cf32b71e
ES
3722
3723 message->complete = spi_complete;
3724 message->context = &done;
0461a414 3725 message->spi = spi;
cf32b71e 3726
8caab75f 3727 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS
3728 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3729
0461a414
MB
3730 /* If we're not using the legacy transfer method then we will
3731 * try to transfer in the calling context so special case.
3732 * This code would be less tricky if we could remove the
3733 * support for driver implemented message queues.
3734 */
8caab75f
GU
3735 if (ctlr->transfer == spi_queued_transfer) {
3736 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3737
3738 trace_spi_message_submit(message);
3739
3740 status = __spi_queued_transfer(spi, message, false);
3741
8caab75f 3742 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB
3743 } else {
3744 status = spi_async_locked(spi, message);
3745 }
cf32b71e 3746
cf32b71e 3747 if (status == 0) {
0461a414
MB
3748 /* Push out the messages in the calling context if we
3749 * can.
3750 */
8caab75f
GU
3751 if (ctlr->transfer == spi_queued_transfer) {
3752 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS
3753 spi_sync_immediate);
3754 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3755 spi_sync_immediate);
8caab75f 3756 __spi_pump_messages(ctlr, false);
eca2ebc7 3757 }
0461a414 3758
cf32b71e
ES
3759 wait_for_completion(&done);
3760 status = message->status;
3761 }
3762 message->context = NULL;
3763 return status;
3764}
3765
8ae12a0d
DB
3766/**
3767 * spi_sync - blocking/synchronous SPI data transfers
3768 * @spi: device with which data will be exchanged
3769 * @message: describes the data transfers
33e34dc6 3770 * Context: can sleep
8ae12a0d
DB
3771 *
3772 * This call may only be used from a context that may sleep. The sleep
3773 * is non-interruptible, and has no timeout. Low-overhead controller
3774 * drivers may DMA directly into and out of the message buffers.
3775 *
3776 * Note that the SPI device's chip select is active during the message,
3777 * and then is normally disabled between messages. Drivers for some
3778 * frequently-used devices may want to minimize costs of selecting a chip,
3779 * by leaving it selected in anticipation that the next message will go
3780 * to the same chip. (That may increase power usage.)
3781 *
0c868461
DB
3782 * Also, the caller is guaranteeing that the memory associated with the
3783 * message will not be freed before this call returns.
3784 *
97d56dc6 3785 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3786 */
3787int spi_sync(struct spi_device *spi, struct spi_message *message)
3788{
ef4d96ec
MB
3789 int ret;
3790
8caab75f 3791 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3792 ret = __spi_sync(spi, message);
8caab75f 3793 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB
3794
3795 return ret;
8ae12a0d
DB
3796}
3797EXPORT_SYMBOL_GPL(spi_sync);
3798
cf32b71e
ES
3799/**
3800 * spi_sync_locked - version of spi_sync with exclusive bus usage
3801 * @spi: device with which data will be exchanged
3802 * @message: describes the data transfers
3803 * Context: can sleep
3804 *
3805 * This call may only be used from a context that may sleep. The sleep
3806 * is non-interruptible, and has no timeout. Low-overhead controller
3807 * drivers may DMA directly into and out of the message buffers.
3808 *
3809 * This call should be used by drivers that require exclusive access to the
25985edc 3810 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES
3811 * be released by a spi_bus_unlock call when the exclusive access is over.
3812 *
97d56dc6 3813 * Return: zero on success, else a negative error code.
cf32b71e
ES
3814 */
3815int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3816{
ef4d96ec 3817 return __spi_sync(spi, message);
cf32b71e
ES
3818}
3819EXPORT_SYMBOL_GPL(spi_sync_locked);
3820
3821/**
3822 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3823 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES
3824 * Context: can sleep
3825 *
3826 * This call may only be used from a context that may sleep. The sleep
3827 * is non-interruptible, and has no timeout.
3828 *
3829 * This call should be used by drivers that require exclusive access to the
3830 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3831 * exclusive access is over. Data transfer must be done by spi_sync_locked
3832 * and spi_async_locked calls when the SPI bus lock is held.
3833 *
97d56dc6 3834 * Return: always zero.
cf32b71e 3835 */
8caab75f 3836int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES
3837{
3838 unsigned long flags;
3839
8caab75f 3840 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3841
8caab75f
GU
3842 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3843 ctlr->bus_lock_flag = 1;
3844 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES
3845
3846 /* mutex remains locked until spi_bus_unlock is called */
3847
3848 return 0;
3849}
3850EXPORT_SYMBOL_GPL(spi_bus_lock);
3851
3852/**
3853 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3854 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES
3855 * Context: can sleep
3856 *
3857 * This call may only be used from a context that may sleep. The sleep
3858 * is non-interruptible, and has no timeout.
3859 *
3860 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3861 * call.
3862 *
97d56dc6 3863 * Return: always zero.
cf32b71e 3864 */
8caab75f 3865int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3866{
8caab75f 3867 ctlr->bus_lock_flag = 0;
cf32b71e 3868
8caab75f 3869 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES
3870
3871 return 0;
3872}
3873EXPORT_SYMBOL_GPL(spi_bus_unlock);
3874
a9948b61 3875/* portable code must never pass more than 32 bytes */
5fe5f05e 3876#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB
3877
3878static u8 *buf;
3879
3880/**
3881 * spi_write_then_read - SPI synchronous write followed by read
3882 * @spi: device with which data will be exchanged
3883 * @txbuf: data to be written (need not be dma-safe)
3884 * @n_tx: size of txbuf, in bytes
27570497
JP
3885 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3886 * @n_rx: size of rxbuf, in bytes
33e34dc6 3887 * Context: can sleep
8ae12a0d
DB
3888 *
3889 * This performs a half duplex MicroWire style transaction with the
3890 * device, sending txbuf and then reading rxbuf. The return value
3891 * is zero for success, else a negative errno status code.
b885244e 3892 * This call may only be used from a context that may sleep.
8ae12a0d 3893 *
c373643b 3894 * Parameters to this routine are always copied using a small buffer.
33e34dc6 3895 * Performance-sensitive or bulk transfer code should instead use
0c868461 3896 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC
3897 *
3898 * Return: zero on success, else a negative error code.
8ae12a0d
DB
3899 */
3900int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB
3901 const void *txbuf, unsigned n_tx,
3902 void *rxbuf, unsigned n_rx)
8ae12a0d 3903{
068f4070 3904 static DEFINE_MUTEX(lock);
8ae12a0d
DB
3905
3906 int status;
3907 struct spi_message message;
bdff549e 3908 struct spi_transfer x[2];
8ae12a0d
DB
3909 u8 *local_buf;
3910
b3a223ee
MB
3911 /* Use preallocated DMA-safe buffer if we can. We can't avoid
3912 * copying here, (as a pure convenience thing), but we can
3913 * keep heap costs out of the hot path unless someone else is
3914 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 3915 */
b3a223ee 3916 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB
3917 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
3918 GFP_KERNEL | GFP_DMA);
b3a223ee
MB
3919 if (!local_buf)
3920 return -ENOMEM;
3921 } else {
3922 local_buf = buf;
3923 }
8ae12a0d 3924
8275c642 3925 spi_message_init(&message);
5fe5f05e 3926 memset(x, 0, sizeof(x));
bdff549e
DB
3927 if (n_tx) {
3928 x[0].len = n_tx;
3929 spi_message_add_tail(&x[0], &message);
3930 }
3931 if (n_rx) {
3932 x[1].len = n_rx;
3933 spi_message_add_tail(&x[1], &message);
3934 }
8275c642 3935
8ae12a0d 3936 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB
3937 x[0].tx_buf = local_buf;
3938 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB
3939
3940 /* do the i/o */
8ae12a0d 3941 status = spi_sync(spi, &message);
9b938b74 3942 if (status == 0)
bdff549e 3943 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 3944
bdff549e 3945 if (x[0].tx_buf == buf)
068f4070 3946 mutex_unlock(&lock);
8ae12a0d
DB
3947 else
3948 kfree(local_buf);
3949
3950 return status;
3951}
3952EXPORT_SYMBOL_GPL(spi_write_then_read);
3953
3954/*-------------------------------------------------------------------------*/
3955
5f143af7 3956#if IS_ENABLED(CONFIG_OF)
ce79d54a 3957/* must call put_device() when done with returned spi_device device */
5f143af7 3958struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 3959{
cfba5de9
SP
3960 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
3961
ce79d54a
PA
3962 return dev ? to_spi_device(dev) : NULL;
3963}
5f143af7
MF
3964EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
3965#endif /* IS_ENABLED(CONFIG_OF) */
ce79d54a 3966
5f143af7 3967#if IS_ENABLED(CONFIG_OF_DYNAMIC)
8caab75f
GU
3968/* the spi controllers are not using spi_bus, so we find it with another way */
3969static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA
3970{
3971 struct device *dev;
3972
cfba5de9 3973 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 3974 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 3975 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA
3976 if (!dev)
3977 return NULL;
3978
3979 /* reference got in class_find_device */
8caab75f 3980 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA
3981}
3982
3983static int of_spi_notify(struct notifier_block *nb, unsigned long action,
3984 void *arg)
3985{
3986 struct of_reconfig_data *rd = arg;
8caab75f 3987 struct spi_controller *ctlr;
ce79d54a
PA
3988 struct spi_device *spi;
3989
3990 switch (of_reconfig_get_state_change(action, arg)) {
3991 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU
3992 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
3993 if (ctlr == NULL)
ce79d54a
PA
3994 return NOTIFY_OK; /* not for us */
3995
bd6c1644 3996 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 3997 put_device(&ctlr->dev);
bd6c1644
GU
3998 return NOTIFY_OK;
3999 }
4000
8caab75f
GU
4001 spi = of_register_spi_device(ctlr, rd->dn);
4002 put_device(&ctlr->dev);
ce79d54a
PA
4003
4004 if (IS_ERR(spi)) {
25c56c88
RH
4005 pr_err("%s: failed to create for '%pOF'\n",
4006 __func__, rd->dn);
e0af98a7 4007 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA
4008 return notifier_from_errno(PTR_ERR(spi));
4009 }
4010 break;
4011
4012 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU
4013 /* already depopulated? */
4014 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4015 return NOTIFY_OK;
4016
ce79d54a
PA
4017 /* find our device by node */
4018 spi = of_find_spi_device_by_node(rd->dn);
4019 if (spi == NULL)
4020 return NOTIFY_OK; /* no? not meant for us */
4021
4022 /* unregister takes one ref away */
4023 spi_unregister_device(spi);
4024
4025 /* and put the reference of the find */
4026 put_device(&spi->dev);
4027 break;
4028 }
4029
4030 return NOTIFY_OK;
4031}
4032
4033static struct notifier_block spi_of_notifier = {
4034 .notifier_call = of_spi_notify,
4035};
4036#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4037extern struct notifier_block spi_of_notifier;
4038#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4039
7f24467f 4040#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4041static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP
4042{
4043 return ACPI_COMPANION(dev->parent) == data;
4044}
4045
8caab75f 4046static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP
4047{
4048 struct device *dev;
4049
4050 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4051 spi_acpi_controller_match);
6c364062
GU
4052 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4053 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4054 spi_acpi_controller_match);
7f24467f
OP
4055 if (!dev)
4056 return NULL;
4057
8caab75f 4058 return container_of(dev, struct spi_controller, dev);
7f24467f
OP
4059}
4060
4061static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4062{
4063 struct device *dev;
4064
00500147 4065 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4066 return to_spi_device(dev);
7f24467f
OP
4067}
4068
4069static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4070 void *arg)
4071{
4072 struct acpi_device *adev = arg;
8caab75f 4073 struct spi_controller *ctlr;
7f24467f
OP
4074 struct spi_device *spi;
4075
4076 switch (value) {
4077 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU
4078 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4079 if (!ctlr)
7f24467f
OP
4080 break;
4081
8caab75f
GU
4082 acpi_register_spi_device(ctlr, adev);
4083 put_device(&ctlr->dev);
7f24467f
OP
4084 break;
4085 case ACPI_RECONFIG_DEVICE_REMOVE:
4086 if (!acpi_device_enumerated(adev))
4087 break;
4088
4089 spi = acpi_spi_find_device_by_adev(adev);
4090 if (!spi)
4091 break;
4092
4093 spi_unregister_device(spi);
4094 put_device(&spi->dev);
4095 break;
4096 }
4097
4098 return NOTIFY_OK;
4099}
4100
4101static struct notifier_block spi_acpi_notifier = {
4102 .notifier_call = acpi_spi_notify,
4103};
4104#else
4105extern struct notifier_block spi_acpi_notifier;
4106#endif
4107
8ae12a0d
DB
4108static int __init spi_init(void)
4109{
b885244e
DB
4110 int status;
4111
e94b1766 4112 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB
4113 if (!buf) {
4114 status = -ENOMEM;
4115 goto err0;
4116 }
4117
4118 status = bus_register(&spi_bus_type);
4119 if (status < 0)
4120 goto err1;
8ae12a0d 4121
b885244e
DB
4122 status = class_register(&spi_master_class);
4123 if (status < 0)
4124 goto err2;
ce79d54a 4125
6c364062
GU
4126 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4127 status = class_register(&spi_slave_class);
4128 if (status < 0)
4129 goto err3;
4130 }
4131
5267720e 4132 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4133 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP
4134 if (IS_ENABLED(CONFIG_ACPI))
4135 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4136
8ae12a0d 4137 return 0;
b885244e 4138
6c364062
GU
4139err3:
4140 class_unregister(&spi_master_class);
b885244e
DB
4141err2:
4142 bus_unregister(&spi_bus_type);
4143err1:
4144 kfree(buf);
4145 buf = NULL;
4146err0:
4147 return status;
8ae12a0d 4148}
b885244e 4149
8ae12a0d
DB
4150/* board_info is normally registered in arch_initcall(),
4151 * but even essential drivers wait till later
b885244e
DB
4152 *
4153 * REVISIT only boardinfo really needs static linking. the rest (device and
4154 * driver registration) _could_ be dynamically linked (modular) ... costs
4155 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4156 */
673c0c00 4157postcore_initcall(spi_init);