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spi: spi-nxp-fspi: Fix a NULL vs IS_ERR() check in probe
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB		 2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
8ae12a0d
DB		 7#include <linux/kernel.h>
8#include <linux/device.h>
9#include <linux/init.h>
10#include <linux/cache.h>
99adef31
MB		 11#include <linux/dma-mapping.h>
12#include <linux/dmaengine.h>
94040828 13#include <linux/mutex.h>
2b7a32f7 14#include <linux/of_device.h>
d57a4282 15#include <linux/of_irq.h>
86be408b 16#include <linux/clk/clk-conf.h>
5a0e3ad6 17#include <linux/slab.h>
e0626e38 18#include <linux/mod_devicetable.h>
8ae12a0d 19#include <linux/spi/spi.h>
b5932f5c 20#include <linux/spi/spi-mem.h>
74317984 21#include <linux/of_gpio.h>
f3186dd8 22#include <linux/gpio/consumer.h>
3ae22e8c 23#include <linux/pm_runtime.h>
f48c767c 24#include <linux/pm_domain.h>
826cf175 25#include <linux/property.h>
025ed130 26#include <linux/export.h>
8bd75c77 27#include <linux/sched/rt.h>
ae7e81c0 28#include <uapi/linux/sched/types.h>
ffbbdd21
LW		 29#include <linux/delay.h>
30#include <linux/kthread.h>
64bee4d2
MW		 31#include <linux/ioport.h>
32#include <linux/acpi.h>
b1b8153c 33#include <linux/highmem.h>
9b61e302 34#include <linux/idr.h>
8a2e487e 35#include <linux/platform_data/x86/apple.h>
8ae12a0d 36
56ec1978
MB		 37#define CREATE_TRACE_POINTS
38#include <trace/events/spi.h>
ca1438dc
AB		 39EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 41
46336966
BB		 42#include "internals.h"
43
9b61e302 44static DEFINE_IDR(spi_master_idr);
56ec1978 45
8ae12a0d
DB		 46static void spidev_release(struct device *dev)
47{
0ffa0285 48 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 49
8caab75f
GU		 50 /* spi controllers may cleanup for released devices */
51 if (spi->controller->cleanup)
52 spi->controller->cleanup(spi);
8ae12a0d 53
8caab75f 54 spi_controller_put(spi->controller);
5039563e 55 kfree(spi->driver_override);
07a389fe 56 kfree(spi);
8ae12a0d
DB		 57}
58
59static ssize_t
60modalias_show(struct device *dev, struct device_attribute *a, char *buf)
61{
62 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 63 int len;
64
65 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
66 if (len != -ENODEV)
67 return len;
8ae12a0d 68
d8e328b3 69 return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 70}
aa7da564 71static DEVICE_ATTR_RO(modalias);
8ae12a0d 72
5039563e
TP		 73static ssize_t driver_override_store(struct device *dev,
74 struct device_attribute *a,
75 const char *buf, size_t count)
76{
77 struct spi_device *spi = to_spi_device(dev);
78 const char *end = memchr(buf, '\n', count);
79 const size_t len = end ? end - buf : count;
80 const char *driver_override, *old;
81
82 /* We need to keep extra room for a newline when displaying value */
83 if (len >= (PAGE_SIZE - 1))
84 return -EINVAL;
85
86 driver_override = kstrndup(buf, len, GFP_KERNEL);
87 if (!driver_override)
88 return -ENOMEM;
89
90 device_lock(dev);
91 old = spi->driver_override;
92 if (len) {
93 spi->driver_override = driver_override;
94 } else {
be73e323 95 /* Empty string, disable driver override */
5039563e
TP		 96 spi->driver_override = NULL;
97 kfree(driver_override);
98 }
99 device_unlock(dev);
100 kfree(old);
101
102 return count;
103}
104
105static ssize_t driver_override_show(struct device *dev,
106 struct device_attribute *a, char *buf)
107{
108 const struct spi_device *spi = to_spi_device(dev);
109 ssize_t len;
110
111 device_lock(dev);
112 len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
113 device_unlock(dev);
114 return len;
115}
116static DEVICE_ATTR_RW(driver_override);
117
eca2ebc7 118#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU		 119static ssize_t spi_controller_##field##_show(struct device *dev, \
120 struct device_attribute *attr, \
121 char *buf) \
eca2ebc7 122{ \
8caab75f
GU		 123 struct spi_controller *ctlr = container_of(dev, \
124 struct spi_controller, dev); \
125 return spi_statistics_##field##_show(&ctlr->statistics, buf); \
eca2ebc7 126} \
8caab75f 127static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 128 .attr = { .name = file, .mode = 0444 }, \
8caab75f 129 .show = spi_controller_##field##_show, \
eca2ebc7
MS		 130}; \
131static ssize_t spi_device_##field##_show(struct device *dev, \
132 struct device_attribute *attr, \
133 char *buf) \
134{ \
d1eba93b 135 struct spi_device *spi = to_spi_device(dev); \
eca2ebc7
MS		 136 return spi_statistics_##field##_show(&spi->statistics, buf); \
137} \
138static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 139 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS		 140 .show = spi_device_##field##_show, \
141}
142
143#define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \
144static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \
145 char *buf) \
146{ \
147 unsigned long flags; \
148 ssize_t len; \
149 spin_lock_irqsave(&stat->lock, flags); \
150 len = sprintf(buf, format_string, stat->field); \
151 spin_unlock_irqrestore(&stat->lock, flags); \
152 return len; \
153} \
154SPI_STATISTICS_ATTRS(name, file)
155
156#define SPI_STATISTICS_SHOW(field, format_string) \
157 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
158 field, format_string)
159
160SPI_STATISTICS_SHOW(messages, "%lu");
161SPI_STATISTICS_SHOW(transfers, "%lu");
162SPI_STATISTICS_SHOW(errors, "%lu");
163SPI_STATISTICS_SHOW(timedout, "%lu");
164
165SPI_STATISTICS_SHOW(spi_sync, "%lu");
166SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu");
167SPI_STATISTICS_SHOW(spi_async, "%lu");
168
169SPI_STATISTICS_SHOW(bytes, "%llu");
170SPI_STATISTICS_SHOW(bytes_rx, "%llu");
171SPI_STATISTICS_SHOW(bytes_tx, "%llu");
172
6b7bc061
MS		 173#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
174 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
175 "transfer_bytes_histo_" number, \
176 transfer_bytes_histo[index], "%lu")
177SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
178SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
179SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
180SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
181SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
182SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
183SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
184SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
185SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
186SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
187SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
188SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
189SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
190SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
191SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
192SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
193SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
194
d9f12122
MS		 195SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu");
196
aa7da564
GKH		 197static struct attribute *spi_dev_attrs[] = {
198 &dev_attr_modalias.attr,
5039563e 199 &dev_attr_driver_override.attr,
aa7da564 200 NULL,
8ae12a0d 201};
eca2ebc7
MS		 202
203static const struct attribute_group spi_dev_group = {
204 .attrs = spi_dev_attrs,
205};
206
207static struct attribute *spi_device_statistics_attrs[] = {
208 &dev_attr_spi_device_messages.attr,
209 &dev_attr_spi_device_transfers.attr,
210 &dev_attr_spi_device_errors.attr,
211 &dev_attr_spi_device_timedout.attr,
212 &dev_attr_spi_device_spi_sync.attr,
213 &dev_attr_spi_device_spi_sync_immediate.attr,
214 &dev_attr_spi_device_spi_async.attr,
215 &dev_attr_spi_device_bytes.attr,
216 &dev_attr_spi_device_bytes_rx.attr,
217 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS		 218 &dev_attr_spi_device_transfer_bytes_histo0.attr,
219 &dev_attr_spi_device_transfer_bytes_histo1.attr,
220 &dev_attr_spi_device_transfer_bytes_histo2.attr,
221 &dev_attr_spi_device_transfer_bytes_histo3.attr,
222 &dev_attr_spi_device_transfer_bytes_histo4.attr,
223 &dev_attr_spi_device_transfer_bytes_histo5.attr,
224 &dev_attr_spi_device_transfer_bytes_histo6.attr,
225 &dev_attr_spi_device_transfer_bytes_histo7.attr,
226 &dev_attr_spi_device_transfer_bytes_histo8.attr,
227 &dev_attr_spi_device_transfer_bytes_histo9.attr,
228 &dev_attr_spi_device_transfer_bytes_histo10.attr,
229 &dev_attr_spi_device_transfer_bytes_histo11.attr,
230 &dev_attr_spi_device_transfer_bytes_histo12.attr,
231 &dev_attr_spi_device_transfer_bytes_histo13.attr,
232 &dev_attr_spi_device_transfer_bytes_histo14.attr,
233 &dev_attr_spi_device_transfer_bytes_histo15.attr,
234 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 235 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS		 236 NULL,
237};
238
239static const struct attribute_group spi_device_statistics_group = {
240 .name = "statistics",
241 .attrs = spi_device_statistics_attrs,
242};
243
244static const struct attribute_group *spi_dev_groups[] = {
245 &spi_dev_group,
246 &spi_device_statistics_group,
247 NULL,
248};
249
8caab75f
GU		 250static struct attribute *spi_controller_statistics_attrs[] = {
251 &dev_attr_spi_controller_messages.attr,
252 &dev_attr_spi_controller_transfers.attr,
253 &dev_attr_spi_controller_errors.attr,
254 &dev_attr_spi_controller_timedout.attr,
255 &dev_attr_spi_controller_spi_sync.attr,
256 &dev_attr_spi_controller_spi_sync_immediate.attr,
257 &dev_attr_spi_controller_spi_async.attr,
258 &dev_attr_spi_controller_bytes.attr,
259 &dev_attr_spi_controller_bytes_rx.attr,
260 &dev_attr_spi_controller_bytes_tx.attr,
261 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
262 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
263 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
264 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
265 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
266 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
267 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
268 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
269 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
270 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
271 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
272 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
273 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
274 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
275 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
276 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
277 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
278 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS		 279 NULL,
280};
281
8caab75f 282static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 283 .name = "statistics",
8caab75f 284 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS		 285};
286
287static const struct attribute_group *spi_master_groups[] = {
8caab75f 288 &spi_controller_statistics_group,
eca2ebc7
MS		 289 NULL,
290};
291
292void spi_statistics_add_transfer_stats(struct spi_statistics *stats,
293 struct spi_transfer *xfer,
8caab75f 294 struct spi_controller *ctlr)
eca2ebc7
MS		 295{
296 unsigned long flags;
6b7bc061
MS		 297 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
298
299 if (l2len < 0)
300 l2len = 0;
eca2ebc7
MS		 301
302 spin_lock_irqsave(&stats->lock, flags);
303
304 stats->transfers++;
6b7bc061 305 stats->transfer_bytes_histo[l2len]++;
eca2ebc7
MS		 306
307 stats->bytes += xfer->len;
308 if ((xfer->tx_buf) &&
8caab75f 309 (xfer->tx_buf != ctlr->dummy_tx))
eca2ebc7
MS		 310 stats->bytes_tx += xfer->len;
311 if ((xfer->rx_buf) &&
8caab75f 312 (xfer->rx_buf != ctlr->dummy_rx))
eca2ebc7
MS		 313 stats->bytes_rx += xfer->len;
314
315 spin_unlock_irqrestore(&stats->lock, flags);
316}
317EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats);
8ae12a0d
DB		 318
319/* modalias support makes "modprobe $MODALIAS" new-style hotplug work,
320 * and the sysfs version makes coldplug work too.
321 */
322
75368bf6
AV		 323static const struct spi_device_id *spi_match_id(const struct spi_device_id *id,
324 const struct spi_device *sdev)
325{
326 while (id->name[0]) {
327 if (!strcmp(sdev->modalias, id->name))
328 return id;
329 id++;
330 }
331 return NULL;
332}
333
334const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
335{
336 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
337
338 return spi_match_id(sdrv->id_table, sdev);
339}
340EXPORT_SYMBOL_GPL(spi_get_device_id);
341
8ae12a0d
DB		 342static int spi_match_device(struct device *dev, struct device_driver *drv)
343{
344 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV		 345 const struct spi_driver *sdrv = to_spi_driver(drv);
346
5039563e
TP		 347 /* Check override first, and if set, only use the named driver */
348 if (spi->driver_override)
349 return strcmp(spi->driver_override, drv->name) == 0;
350
2b7a32f7
SA		 351 /* Attempt an OF style match */
352 if (of_driver_match_device(dev, drv))
353 return 1;
354
64bee4d2
MW		 355 /* Then try ACPI */
356 if (acpi_driver_match_device(dev, drv))
357 return 1;
358
75368bf6
AV		 359 if (sdrv->id_table)
360 return !!spi_match_id(sdrv->id_table, spi);
8ae12a0d 361
35f74fca 362 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB		 363}
364
7eff2e7a 365static int spi_uevent(struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB		 366{
367 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 368 int rc;
369
370 rc = acpi_device_uevent_modalias(dev, env);
371 if (rc != -ENODEV)
372 return rc;
8ae12a0d 373
2856670f 374 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB		 375}
376
8ae12a0d
DB		 377struct bus_type spi_bus_type = {
378 .name = "spi",
aa7da564 379 .dev_groups = spi_dev_groups,
8ae12a0d
DB		 380 .match = spi_match_device,
381 .uevent = spi_uevent,
8ae12a0d
DB		 382};
383EXPORT_SYMBOL_GPL(spi_bus_type);
384
b885244e
DB		 385
386static int spi_drv_probe(struct device *dev)
387{
388 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 389 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW		 390 int ret;
391
86be408b
SN		 392 ret = of_clk_set_defaults(dev->of_node, false);
393 if (ret)
394 return ret;
395
44af7927
JH		 396 if (dev->of_node) {
397 spi->irq = of_irq_get(dev->of_node, 0);
398 if (spi->irq == -EPROBE_DEFER)
399 return -EPROBE_DEFER;
400 if (spi->irq < 0)
401 spi->irq = 0;
402 }
403
676e7c25 404 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH		 405 if (ret)
406 return ret;
407
408 ret = sdrv->probe(spi);
409 if (ret)
410 dev_pm_domain_detach(dev, true);
b885244e 411
33cf00e5 412 return ret;
b885244e
DB		 413}
414
415static int spi_drv_remove(struct device *dev)
416{
417 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5
MW		 418 int ret;
419
aec35f4e 420 ret = sdrv->remove(to_spi_device(dev));
676e7c25 421 dev_pm_domain_detach(dev, true);
b885244e 422
33cf00e5 423 return ret;
b885244e
DB		 424}
425
426static void spi_drv_shutdown(struct device *dev)
427{
428 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
429
430 sdrv->shutdown(to_spi_device(dev));
431}
432
33e34dc6 433/**
ca5d2485 434 * __spi_register_driver - register a SPI driver
88c9321d 435 * @owner: owner module of the driver to register
33e34dc6
DB		 436 * @sdrv: the driver to register
437 * Context: can sleep
97d56dc6
JMC		 438 *
439 * Return: zero on success, else a negative error code.
33e34dc6 440 */
ca5d2485 441int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 442{
ca5d2485 443 sdrv->driver.owner = owner;
b885244e
DB		 444 sdrv->driver.bus = &spi_bus_type;
445 if (sdrv->probe)
446 sdrv->driver.probe = spi_drv_probe;
447 if (sdrv->remove)
448 sdrv->driver.remove = spi_drv_remove;
449 if (sdrv->shutdown)
450 sdrv->driver.shutdown = spi_drv_shutdown;
451 return driver_register(&sdrv->driver);
452}
ca5d2485 453EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 454
8ae12a0d
DB		 455/*-------------------------------------------------------------------------*/
456
457/* SPI devices should normally not be created by SPI device drivers; that
8caab75f 458 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB		 459 * Device registration normally goes into like arch/.../mach.../board-YYY.c
460 * with other readonly (flashable) information about mainboard devices.
461 */
462
463struct boardinfo {
464 struct list_head list;
2b9603a0 465 struct spi_board_info board_info;
8ae12a0d
DB		 466};
467
468static LIST_HEAD(board_list);
8caab75f 469static LIST_HEAD(spi_controller_list);
2b9603a0
FT		 470
471/*
be73e323 472 * Used to protect add/del operation for board_info list and
8caab75f 473 * spi_controller list, and their matching process
9a9a047a 474 * also used to protect object of type struct idr
2b9603a0 475 */
94040828 476static DEFINE_MUTEX(board_lock);
8ae12a0d 477
dc87c98e
GL		 478/**
479 * spi_alloc_device - Allocate a new SPI device
8caab75f 480 * @ctlr: Controller to which device is connected
dc87c98e
GL		 481 * Context: can sleep
482 *
483 * Allows a driver to allocate and initialize a spi_device without
484 * registering it immediately. This allows a driver to directly
485 * fill the spi_device with device parameters before calling
486 * spi_add_device() on it.
487 *
488 * Caller is responsible to call spi_add_device() on the returned
8caab75f 489 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL		 490 * needs to discard the spi_device without adding it, then it should
491 * call spi_dev_put() on it.
492 *
97d56dc6 493 * Return: a pointer to the new device, or NULL.
dc87c98e 494 */
8caab75f 495struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL		 496{
497 struct spi_device *spi;
dc87c98e 498
8caab75f 499 if (!spi_controller_get(ctlr))
dc87c98e
GL		 500 return NULL;
501
5fe5f05e 502 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 503 if (!spi) {
8caab75f 504 spi_controller_put(ctlr);
dc87c98e
GL		 505 return NULL;
506 }
507
8caab75f
GU		 508 spi->master = spi->controller = ctlr;
509 spi->dev.parent = &ctlr->dev;
dc87c98e
GL		 510 spi->dev.bus = &spi_bus_type;
511 spi->dev.release = spidev_release;
446411e1 512 spi->cs_gpio = -ENOENT;
ea235786 513 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7
MS		 514
515 spin_lock_init(&spi->statistics.lock);
516
dc87c98e
GL		 517 device_initialize(&spi->dev);
518 return spi;
519}
520EXPORT_SYMBOL_GPL(spi_alloc_device);
521
e13ac47b
JN		 522static void spi_dev_set_name(struct spi_device *spi)
523{
524 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
525
526 if (adev) {
527 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
528 return;
529 }
530
8caab75f 531 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
e13ac47b
JN		 532 spi->chip_select);
533}
534
b6fb8d3a
MW		 535static int spi_dev_check(struct device *dev, void *data)
536{
537 struct spi_device *spi = to_spi_device(dev);
538 struct spi_device *new_spi = data;
539
8caab75f 540 if (spi->controller == new_spi->controller &&
b6fb8d3a
MW		 541 spi->chip_select == new_spi->chip_select)
542 return -EBUSY;
543 return 0;
544}
545
dc87c98e
GL		 546/**
547 * spi_add_device - Add spi_device allocated with spi_alloc_device
548 * @spi: spi_device to register
549 *
550 * Companion function to spi_alloc_device. Devices allocated with
551 * spi_alloc_device can be added onto the spi bus with this function.
552 *
97d56dc6 553 * Return: 0 on success; negative errno on failure
dc87c98e
GL		 554 */
555int spi_add_device(struct spi_device *spi)
556{
e48880e0 557 static DEFINE_MUTEX(spi_add_lock);
8caab75f
GU		 558 struct spi_controller *ctlr = spi->controller;
559 struct device *dev = ctlr->dev.parent;
dc87c98e
GL		 560 int status;
561
562 /* Chipselects are numbered 0..max; validate. */
8caab75f
GU		 563 if (spi->chip_select >= ctlr->num_chipselect) {
564 dev_err(dev, "cs%d >= max %d\n", spi->chip_select,
565 ctlr->num_chipselect);
dc87c98e
GL		 566 return -EINVAL;
567 }
568
569 /* Set the bus ID string */
e13ac47b 570 spi_dev_set_name(spi);
e48880e0
DB		 571
572 /* We need to make sure there's no other device with this
573 * chipselect **BEFORE** we call setup(), else we'll trash
574 * its configuration. Lock against concurrent add() calls.
575 */
576 mutex_lock(&spi_add_lock);
577
b6fb8d3a
MW		 578 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
579 if (status) {
e48880e0
DB		 580 dev_err(dev, "chipselect %d already in use\n",
581 spi->chip_select);
e48880e0
DB		 582 goto done;
583 }
584
f3186dd8
LW		 585 /* Descriptors take precedence */
586 if (ctlr->cs_gpiods)
587 spi->cs_gpiod = ctlr->cs_gpiods[spi->chip_select];
588 else if (ctlr->cs_gpios)
8caab75f 589 spi->cs_gpio = ctlr->cs_gpios[spi->chip_select];
74317984 590
e48880e0
DB		 591 /* Drivers may modify this initial i/o setup, but will
592 * normally rely on the device being setup. Devices
593 * using SPI_CS_HIGH can't coexist well otherwise...
594 */
7d077197 595 status = spi_setup(spi);
dc87c98e 596 if (status < 0) {
eb288a1f
LW		 597 dev_err(dev, "can't setup %s, status %d\n",
598 dev_name(&spi->dev), status);
e48880e0 599 goto done;
dc87c98e
GL		 600 }
601
e48880e0 602 /* Device may be bound to an active driver when this returns */
dc87c98e 603 status = device_add(&spi->dev);
e48880e0 604 if (status < 0)
eb288a1f
LW		 605 dev_err(dev, "can't add %s, status %d\n",
606 dev_name(&spi->dev), status);
e48880e0 607 else
35f74fca 608 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
dc87c98e 609
e48880e0
DB		 610done:
611 mutex_unlock(&spi_add_lock);
612 return status;
dc87c98e
GL		 613}
614EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 615
33e34dc6
DB		 616/**
617 * spi_new_device - instantiate one new SPI device
8caab75f 618 * @ctlr: Controller to which device is connected
33e34dc6
DB		 619 * @chip: Describes the SPI device
620 * Context: can sleep
621 *
622 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB		 623 * after board init creates the hard-wired devices. Some development
624 * platforms may not be able to use spi_register_board_info though, and
625 * this is exported so that for example a USB or parport based adapter
626 * driver could add devices (which it would learn about out-of-band).
082c8cb4 627 *
97d56dc6 628 * Return: the new device, or NULL.
8ae12a0d 629 */
8caab75f 630struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 631 struct spi_board_info *chip)
8ae12a0d
DB		 632{
633 struct spi_device *proxy;
8ae12a0d
DB		 634 int status;
635
082c8cb4
DB		 636 /* NOTE: caller did any chip->bus_num checks necessary.
637 *
638 * Also, unless we change the return value convention to use
639 * error-or-pointer (not NULL-or-pointer), troubleshootability
640 * suggests syslogged diagnostics are best here (ugh).
641 */
642
8caab75f 643 proxy = spi_alloc_device(ctlr);
dc87c98e 644 if (!proxy)
8ae12a0d
DB		 645 return NULL;
646
102eb975
GL		 647 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
648
8ae12a0d
DB		 649 proxy->chip_select = chip->chip_select;
650 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 651 proxy->mode = chip->mode;
8ae12a0d 652 proxy->irq = chip->irq;
102eb975 653 strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB		 654 proxy->dev.platform_data = (void *) chip->platform_data;
655 proxy->controller_data = chip->controller_data;
656 proxy->controller_state = NULL;
8ae12a0d 657
826cf175
DT		 658 if (chip->properties) {
659 status = device_add_properties(&proxy->dev, chip->properties);
660 if (status) {
8caab75f 661 dev_err(&ctlr->dev,
826cf175
DT		 662 "failed to add properties to '%s': %d\n",
663 chip->modalias, status);
664 goto err_dev_put;
665 }
8ae12a0d
DB		 666 }
667
826cf175
DT		 668 status = spi_add_device(proxy);
669 if (status < 0)
670 goto err_remove_props;
671
8ae12a0d 672 return proxy;
826cf175
DT		 673
674err_remove_props:
675 if (chip->properties)
676 device_remove_properties(&proxy->dev);
677err_dev_put:
678 spi_dev_put(proxy);
679 return NULL;
8ae12a0d
DB		 680}
681EXPORT_SYMBOL_GPL(spi_new_device);
682
3b1884c2
GU		 683/**
684 * spi_unregister_device - unregister a single SPI device
685 * @spi: spi_device to unregister
686 *
687 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 688 * by spi_unregister_controller().
3b1884c2
GU		 689 */
690void spi_unregister_device(struct spi_device *spi)
691{
bd6c1644
GU		 692 if (!spi)
693 return;
694
8324147f 695 if (spi->dev.of_node) {
bd6c1644 696 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH		 697 of_node_put(spi->dev.of_node);
698 }
7f24467f
OP		 699 if (ACPI_COMPANION(&spi->dev))
700 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
bd6c1644 701 device_unregister(&spi->dev);
3b1884c2
GU		 702}
703EXPORT_SYMBOL_GPL(spi_unregister_device);
704
8caab75f
GU		 705static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
706 struct spi_board_info *bi)
2b9603a0
FT		 707{
708 struct spi_device *dev;
709
8caab75f 710 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT		 711 return;
712
8caab75f 713 dev = spi_new_device(ctlr, bi);
2b9603a0 714 if (!dev)
8caab75f 715 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT		 716 bi->modalias);
717}
718
33e34dc6
DB		 719/**
720 * spi_register_board_info - register SPI devices for a given board
721 * @info: array of chip descriptors
722 * @n: how many descriptors are provided
723 * Context: can sleep
724 *
8ae12a0d
DB		 725 * Board-specific early init code calls this (probably during arch_initcall)
726 * with segments of the SPI device table. Any device nodes are created later,
727 * after the relevant parent SPI controller (bus_num) is defined. We keep
728 * this table of devices forever, so that reloading a controller driver will
729 * not make Linux forget about these hard-wired devices.
730 *
731 * Other code can also call this, e.g. a particular add-on board might provide
732 * SPI devices through its expansion connector, so code initializing that board
733 * would naturally declare its SPI devices.
734 *
735 * The board info passed can safely be __initdata ... but be careful of
736 * any embedded pointers (platform_data, etc), they're copied as-is.
826cf175 737 * Device properties are deep-copied though.
97d56dc6
JMC		 738 *
739 * Return: zero on success, else a negative error code.
8ae12a0d 740 */
fd4a319b 741int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 742{
2b9603a0
FT		 743 struct boardinfo *bi;
744 int i;
8ae12a0d 745
c7908a37 746 if (!n)
f974cf57 747 return 0;
c7908a37 748
f9bdb7fd 749 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB		 750 if (!bi)
751 return -ENOMEM;
8ae12a0d 752
2b9603a0 753 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 754 struct spi_controller *ctlr;
8ae12a0d 755
2b9603a0 756 memcpy(&bi->board_info, info, sizeof(*info));
826cf175
DT		 757 if (info->properties) {
758 bi->board_info.properties =
759 property_entries_dup(info->properties);
760 if (IS_ERR(bi->board_info.properties))
761 return PTR_ERR(bi->board_info.properties);
762 }
763
2b9603a0
FT		 764 mutex_lock(&board_lock);
765 list_add_tail(&bi->list, &board_list);
8caab75f
GU		 766 list_for_each_entry(ctlr, &spi_controller_list, list)
767 spi_match_controller_to_boardinfo(ctlr,
768 &bi->board_info);
2b9603a0 769 mutex_unlock(&board_lock);
8ae12a0d 770 }
2b9603a0
FT		 771
772 return 0;
8ae12a0d
DB		 773}
774
775/*-------------------------------------------------------------------------*/
776
b158935f
MB		 777static void spi_set_cs(struct spi_device *spi, bool enable)
778{
25093bde
AA		 779 bool enable1 = enable;
780
781 if (!spi->controller->set_cs_timing) {
782 if (enable1)
783 spi_delay_exec(&spi->controller->cs_setup, NULL);
784 else
785 spi_delay_exec(&spi->controller->cs_hold, NULL);
786 }
787
b158935f
MB		 788 if (spi->mode & SPI_CS_HIGH)
789 enable = !enable;
790
f3186dd8
LW		 791 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) {
792 /*
793 * Honour the SPI_NO_CS flag and invert the enable line, as
794 * active low is default for SPI. Execution paths that handle
795 * polarity inversion in gpiolib (such as device tree) will
796 * enforce active high using the SPI_CS_HIGH resulting in a
797 * double inversion through the code above.
798 */
799 if (!(spi->mode & SPI_NO_CS)) {
800 if (spi->cs_gpiod)
28f7604f
FF		 801 gpiod_set_value_cansleep(spi->cs_gpiod,
802 !enable);
f3186dd8 803 else
28f7604f 804 gpio_set_value_cansleep(spi->cs_gpio, !enable);
f3186dd8 805 }
8eee6b9d 806 /* Some SPI masters need both GPIO CS & slave_select */
8caab75f
GU		 807 if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
808 spi->controller->set_cs)
809 spi->controller->set_cs(spi, !enable);
810 } else if (spi->controller->set_cs) {
811 spi->controller->set_cs(spi, !enable);
8eee6b9d 812 }
25093bde
AA		 813
814 if (!spi->controller->set_cs_timing) {
815 if (!enable1)
816 spi_delay_exec(&spi->controller->cs_inactive, NULL);
817 }
b158935f
MB		 818}
819
2de440f5 820#ifdef CONFIG_HAS_DMA
46336966
BB		 821int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
822 struct sg_table *sgt, void *buf, size_t len,
823 enum dma_data_direction dir)
6ad45a27
MB		 824{
825 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 826 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V		 827#ifdef CONFIG_HIGHMEM
828 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
829 (unsigned long)buf < (PKMAP_BASE +
830 (LAST_PKMAP * PAGE_SIZE)));
831#else
832 const bool kmap_buf = false;
833#endif
65598c13
AG		 834 int desc_len;
835 int sgs;
6ad45a27 836 struct page *vm_page;
8dd4a016 837 struct scatterlist *sg;
6ad45a27
MB		 838 void *sg_buf;
839 size_t min;
840 int i, ret;
841
b1b8153c 842 if (vmalloced_buf || kmap_buf) {
df88e91b 843 desc_len = min_t(int, max_seg_size, PAGE_SIZE);
65598c13 844 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 845 } else if (virt_addr_valid(buf)) {
8caab75f 846 desc_len = min_t(int, max_seg_size, ctlr->max_dma_len);
65598c13 847 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V		 848 } else {
849 return -EINVAL;
65598c13
AG		 850 }
851
6ad45a27
MB		 852 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
853 if (ret != 0)
854 return ret;
855
8dd4a016 856 sg = &sgt->sgl[0];
6ad45a27 857 for (i = 0; i < sgs; i++) {
6ad45a27 858
b1b8153c 859 if (vmalloced_buf || kmap_buf) {
ce99319a
MC		 860 /*
861 * Next scatterlist entry size is the minimum between
862 * the desc_len and the remaining buffer length that
863 * fits in a page.
864 */
865 min = min_t(size_t, desc_len,
866 min_t(size_t, len,
867 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V		 868 if (vmalloced_buf)
869 vm_page = vmalloc_to_page(buf);
870 else
871 vm_page = kmap_to_page(buf);
6ad45a27
MB		 872 if (!vm_page) {
873 sg_free_table(sgt);
874 return -ENOMEM;
875 }
8dd4a016 876 sg_set_page(sg, vm_page,
c1aefbdd 877 min, offset_in_page(buf));
6ad45a27 878 } else {
65598c13 879 min = min_t(size_t, len, desc_len);
6ad45a27 880 sg_buf = buf;
8dd4a016 881 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB		 882 }
883
6ad45a27
MB		 884 buf += min;
885 len -= min;
8dd4a016 886 sg = sg_next(sg);
6ad45a27
MB		 887 }
888
889 ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir);
89e4b66a
GU		 890 if (!ret)
891 ret = -ENOMEM;
6ad45a27
MB		 892 if (ret < 0) {
893 sg_free_table(sgt);
894 return ret;
895 }
896
897 sgt->nents = ret;
898
899 return 0;
900}
901
46336966
BB		 902void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
903 struct sg_table *sgt, enum dma_data_direction dir)
6ad45a27
MB		 904{
905 if (sgt->orig_nents) {
906 dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
907 sg_free_table(sgt);
908 }
909}
910
8caab75f 911static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 912{
99adef31
MB		 913 struct device *tx_dev, *rx_dev;
914 struct spi_transfer *xfer;
6ad45a27 915 int ret;
3a2eba9b 916
8caab75f 917 if (!ctlr->can_dma)
99adef31
MB		 918 return 0;
919
8caab75f
GU		 920 if (ctlr->dma_tx)
921 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 922 else
8caab75f 923 tx_dev = ctlr->dev.parent;
c37f45b5 924
8caab75f
GU		 925 if (ctlr->dma_rx)
926 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 927 else
8caab75f 928 rx_dev = ctlr->dev.parent;
99adef31
MB		 929
930 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 931 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 932 continue;
933
934 if (xfer->tx_buf != NULL) {
8caab75f 935 ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB		 936 (void *)xfer->tx_buf, xfer->len,
937 DMA_TO_DEVICE);
938 if (ret != 0)
939 return ret;
99adef31
MB		 940 }
941
942 if (xfer->rx_buf != NULL) {
8caab75f 943 ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg,
6ad45a27
MB		 944 xfer->rx_buf, xfer->len,
945 DMA_FROM_DEVICE);
946 if (ret != 0) {
8caab75f 947 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg,
6ad45a27
MB		 948 DMA_TO_DEVICE);
949 return ret;
99adef31
MB		 950 }
951 }
952 }
953
8caab75f 954 ctlr->cur_msg_mapped = true;
99adef31
MB		 955
956 return 0;
957}
958
8caab75f 959static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31
MB		 960{
961 struct spi_transfer *xfer;
962 struct device *tx_dev, *rx_dev;
963
8caab75f 964 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB		 965 return 0;
966
8caab75f
GU		 967 if (ctlr->dma_tx)
968 tx_dev = ctlr->dma_tx->device->dev;
c37f45b5 969 else
8caab75f 970 tx_dev = ctlr->dev.parent;
c37f45b5 971
8caab75f
GU		 972 if (ctlr->dma_rx)
973 rx_dev = ctlr->dma_rx->device->dev;
c37f45b5 974 else
8caab75f 975 rx_dev = ctlr->dev.parent;
99adef31
MB		 976
977 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 978 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 979 continue;
980
8caab75f
GU		 981 spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
982 spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
99adef31
MB		 983 }
984
985 return 0;
986}
2de440f5 987#else /* !CONFIG_HAS_DMA */
8caab75f 988static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU		 989 struct spi_message *msg)
990{
991 return 0;
992}
993
8caab75f 994static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 995 struct spi_message *msg)
2de440f5
GU		 996{
997 return 0;
998}
999#endif /* !CONFIG_HAS_DMA */
1000
8caab75f 1001static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS		 1002 struct spi_message *msg)
1003{
1004 struct spi_transfer *xfer;
1005
1006 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1007 /*
1008 * Restore the original value of tx_buf or rx_buf if they are
1009 * NULL.
1010 */
8caab75f 1011 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1012 xfer->tx_buf = NULL;
8caab75f 1013 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS		 1014 xfer->rx_buf = NULL;
1015 }
1016
8caab75f 1017 return __spi_unmap_msg(ctlr, msg);
4b786458
MS		 1018}
1019
8caab75f 1020static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU		 1021{
1022 struct spi_transfer *xfer;
1023 void *tmp;
1024 unsigned int max_tx, max_rx;
1025
8caab75f 1026 if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) {
2de440f5
GU		 1027 max_tx = 0;
1028 max_rx = 0;
1029
1030 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1031 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU		 1032 !xfer->tx_buf)
1033 max_tx = max(xfer->len, max_tx);
8caab75f 1034 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU		 1035 !xfer->rx_buf)
1036 max_rx = max(xfer->len, max_rx);
1037 }
1038
1039 if (max_tx) {
8caab75f 1040 tmp = krealloc(ctlr->dummy_tx, max_tx,
2de440f5
GU		 1041 GFP_KERNEL | GFP_DMA);
1042 if (!tmp)
1043 return -ENOMEM;
8caab75f 1044 ctlr->dummy_tx = tmp;
2de440f5
GU		 1045 memset(tmp, 0, max_tx);
1046 }
1047
1048 if (max_rx) {
8caab75f 1049 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU		 1050 GFP_KERNEL | GFP_DMA);
1051 if (!tmp)
1052 return -ENOMEM;
8caab75f 1053 ctlr->dummy_rx = tmp;
2de440f5
GU		 1054 }
1055
1056 if (max_tx || max_rx) {
1057 list_for_each_entry(xfer, &msg->transfers,
1058 transfer_list) {
5442dcaa
CL		 1059 if (!xfer->len)
1060 continue;
2de440f5 1061 if (!xfer->tx_buf)
8caab75f 1062 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1063 if (!xfer->rx_buf)
8caab75f 1064 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU		 1065 }
1066 }
1067 }
1068
8caab75f 1069 return __spi_map_msg(ctlr, msg);
2de440f5 1070}
99adef31 1071
810923f3
LR		 1072static int spi_transfer_wait(struct spi_controller *ctlr,
1073 struct spi_message *msg,
1074 struct spi_transfer *xfer)
1075{
1076 struct spi_statistics *statm = &ctlr->statistics;
1077 struct spi_statistics *stats = &msg->spi->statistics;
1078 unsigned long long ms = 1;
1079
1080 if (spi_controller_is_slave(ctlr)) {
1081 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1082 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1083 return -EINTR;
1084 }
1085 } else {
1086 ms = 8LL * 1000LL * xfer->len;
1087 do_div(ms, xfer->speed_hz);
1088 ms += ms + 200; /* some tolerance */
1089
1090 if (ms > UINT_MAX)
1091 ms = UINT_MAX;
1092
1093 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1094 msecs_to_jiffies(ms));
1095
1096 if (ms == 0) {
1097 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1098 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1099 dev_err(&msg->spi->dev,
1100 "SPI transfer timed out\n");
1101 return -ETIMEDOUT;
1102 }
1103 }
1104
1105 return 0;
1106}
1107
0ff2de8b
MS		 1108static void _spi_transfer_delay_ns(u32 ns)
1109{
1110 if (!ns)
1111 return;
1112 if (ns <= 1000) {
1113 ndelay(ns);
1114 } else {
1115 u32 us = DIV_ROUND_UP(ns, 1000);
1116
1117 if (us <= 10)
1118 udelay(us);
1119 else
1120 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1121 }
1122}
1123
3984d39b 1124int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1125{
b2c98153
AA		 1126 u32 delay = _delay->value;
1127 u32 unit = _delay->unit;
d5864e5b 1128 u32 hz;
0ff2de8b 1129
b2c98153
AA		 1130 if (!delay)
1131 return 0;
0ff2de8b
MS		 1132
1133 switch (unit) {
1134 case SPI_DELAY_UNIT_USECS:
b2c98153 1135 delay *= 1000;
0ff2de8b
MS		 1136 break;
1137 case SPI_DELAY_UNIT_NSECS: /* nothing to do here */
1138 break;
d5864e5b 1139 case SPI_DELAY_UNIT_SCK:
b2c98153
AA		 1140 /* clock cycles need to be obtained from spi_transfer */
1141 if (!xfer)
1142 return -EINVAL;
d5864e5b
MS		 1143 /* if there is no effective speed know, then approximate
1144 * by underestimating with half the requested hz
1145 */
1146 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA		 1147 if (!hz)
1148 return -EINVAL;
d5864e5b
MS		 1149 delay *= DIV_ROUND_UP(1000000000, hz);
1150 break;
0ff2de8b 1151 default:
b2c98153
AA		 1152 return -EINVAL;
1153 }
1154
1155 return delay;
1156}
3984d39b 1157EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA		 1158
1159int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1160{
1161 int delay;
1162
1163 if (!_delay)
1164 return -EINVAL;
1165
3984d39b 1166 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA		 1167 if (delay < 0)
1168 return delay;
1169
1170 _spi_transfer_delay_ns(delay);
1171
1172 return 0;
1173}
1174EXPORT_SYMBOL_GPL(spi_delay_exec);
1175
0ff2de8b
MS		 1176static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1177 struct spi_transfer *xfer)
1178{
329f0dac
AA		 1179 u32 delay = xfer->cs_change_delay.value;
1180 u32 unit = xfer->cs_change_delay.unit;
1181 int ret;
0ff2de8b
MS		 1182
1183 /* return early on "fast" mode - for everything but USECS */
6b3f236a
AA		 1184 if (!delay) {
1185 if (unit == SPI_DELAY_UNIT_USECS)
1186 _spi_transfer_delay_ns(10000);
0ff2de8b 1187 return;
6b3f236a 1188 }
0ff2de8b 1189
329f0dac
AA		 1190 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1191 if (ret) {
0ff2de8b
MS		 1192 dev_err_once(&msg->spi->dev,
1193 "Use of unsupported delay unit %i, using default of 10us\n",
329f0dac
AA		 1194 unit);
1195 _spi_transfer_delay_ns(10000);
0ff2de8b 1196 }
0ff2de8b
MS		 1197}
1198
b158935f
MB		 1199/*
1200 * spi_transfer_one_message - Default implementation of transfer_one_message()
1201 *
1202 * This is a standard implementation of transfer_one_message() for
8ba811a7 1203 * drivers which implement a transfer_one() operation. It provides
b158935f
MB		 1204 * standard handling of delays and chip select management.
1205 */
8caab75f 1206static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB		 1207 struct spi_message *msg)
1208{
1209 struct spi_transfer *xfer;
b158935f
MB		 1210 bool keep_cs = false;
1211 int ret = 0;
8caab75f 1212 struct spi_statistics *statm = &ctlr->statistics;
eca2ebc7 1213 struct spi_statistics *stats = &msg->spi->statistics;
b158935f
MB		 1214
1215 spi_set_cs(msg->spi, true);
1216
eca2ebc7
MS		 1217 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1218 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1219
b158935f
MB		 1220 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1221 trace_spi_transfer_start(msg, xfer);
1222
8caab75f
GU		 1223 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1224 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1225
b42faeee
VO		 1226 if (!ctlr->ptp_sts_supported) {
1227 xfer->ptp_sts_word_pre = 0;
1228 ptp_read_system_prets(xfer->ptp_sts);
1229 }
1230
38ec10f6 1231 if (xfer->tx_buf || xfer->rx_buf) {
8caab75f 1232 reinit_completion(&ctlr->xfer_completion);
b158935f 1233
8caab75f 1234 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1235 if (ret < 0) {
eca2ebc7
MS		 1236 SPI_STATISTICS_INCREMENT_FIELD(statm,
1237 errors);
1238 SPI_STATISTICS_INCREMENT_FIELD(stats,
1239 errors);
38ec10f6
MB		 1240 dev_err(&msg->spi->dev,
1241 "SPI transfer failed: %d\n", ret);
1242 goto out;
1243 }
b158935f 1244
d57e7960
MB		 1245 if (ret > 0) {
1246 ret = spi_transfer_wait(ctlr, msg, xfer);
1247 if (ret < 0)
1248 msg->status = ret;
1249 }
38ec10f6
MB		 1250 } else {
1251 if (xfer->len)
1252 dev_err(&msg->spi->dev,
1253 "Bufferless transfer has length %u\n",
1254 xfer->len);
13a42798 1255 }
b158935f 1256
b42faeee
VO		 1257 if (!ctlr->ptp_sts_supported) {
1258 ptp_read_system_postts(xfer->ptp_sts);
1259 xfer->ptp_sts_word_post = xfer->len;
1260 }
1261
b158935f
MB		 1262 trace_spi_transfer_stop(msg, xfer);
1263
1264 if (msg->status != -EINPROGRESS)
1265 goto out;
1266
bebcfd27 1267 spi_transfer_delay_exec(xfer);
b158935f
MB		 1268
1269 if (xfer->cs_change) {
1270 if (list_is_last(&xfer->transfer_list,
1271 &msg->transfers)) {
1272 keep_cs = true;
1273 } else {
0b73aa63 1274 spi_set_cs(msg->spi, false);
0ff2de8b 1275 _spi_transfer_cs_change_delay(msg, xfer);
0b73aa63 1276 spi_set_cs(msg->spi, true);
b158935f
MB		 1277 }
1278 }
1279
1280 msg->actual_length += xfer->len;
1281 }
1282
1283out:
1284 if (ret != 0 || !keep_cs)
1285 spi_set_cs(msg->spi, false);
1286
1287 if (msg->status == -EINPROGRESS)
1288 msg->status = ret;
1289
8caab75f
GU		 1290 if (msg->status && ctlr->handle_err)
1291 ctlr->handle_err(ctlr, msg);
b716c4ff 1292
c9ba7a16
NT		 1293 spi_res_release(ctlr, msg);
1294
0ed56252
MB		 1295 spi_finalize_current_message(ctlr);
1296
b158935f
MB		 1297 return ret;
1298}
1299
1300/**
1301 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1302 * @ctlr: the controller reporting completion
b158935f
MB		 1303 *
1304 * Called by SPI drivers using the core transfer_one_message()
1305 * implementation to notify it that the current interrupt driven
9e8f4882 1306 * transfer has finished and the next one may be scheduled.
b158935f 1307 */
8caab75f 1308void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1309{
8caab75f 1310 complete(&ctlr->xfer_completion);
b158935f
MB		 1311}
1312EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1313
ffbbdd21 1314/**
fc9e0f71 1315 * __spi_pump_messages - function which processes spi message queue
8caab75f 1316 * @ctlr: controller to process queue for
fc9e0f71 1317 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21
LW		 1318 *
1319 * This function checks if there is any spi message in the queue that
1320 * needs processing and if so call out to the driver to initialize hardware
1321 * and transfer each message.
1322 *
0461a414
MB		 1323 * Note that it is called both from the kthread itself and also from
1324 * inside spi_sync(); the queue extraction handling at the top of the
1325 * function should deal with this safely.
ffbbdd21 1326 */
8caab75f 1327static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1328{
b42faeee 1329 struct spi_transfer *xfer;
d1c44c93 1330 struct spi_message *msg;
ffbbdd21 1331 bool was_busy = false;
d1c44c93 1332 unsigned long flags;
ffbbdd21
LW		 1333 int ret;
1334
983aee5d 1335 /* Lock queue */
8caab75f 1336 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB		 1337
1338 /* Make sure we are not already running a message */
8caab75f
GU		 1339 if (ctlr->cur_msg) {
1340 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
983aee5d
MB		 1341 return;
1342 }
1343
f0125f1a 1344 /* If another context is idling the device then defer */
8caab75f
GU		 1345 if (ctlr->idling) {
1346 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
1347 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
0461a414
MB		 1348 return;
1349 }
1350
983aee5d 1351 /* Check if the queue is idle */
8caab75f
GU		 1352 if (list_empty(&ctlr->queue) || !ctlr->running) {
1353 if (!ctlr->busy) {
1354 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
b0b36b86 1355 return;
ffbbdd21 1356 }
fc9e0f71 1357
f0125f1a
MB		 1358 /* Only do teardown in the thread */
1359 if (!in_kthread) {
1360 kthread_queue_work(&ctlr->kworker,
1361 &ctlr->pump_messages);
1362 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1363 return;
1364 }
1365
1366 ctlr->busy = false;
1367 ctlr->idling = true;
1368 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1369
1370 kfree(ctlr->dummy_rx);
1371 ctlr->dummy_rx = NULL;
1372 kfree(ctlr->dummy_tx);
1373 ctlr->dummy_tx = NULL;
1374 if (ctlr->unprepare_transfer_hardware &&
1375 ctlr->unprepare_transfer_hardware(ctlr))
1376 dev_err(&ctlr->dev,
1377 "failed to unprepare transfer hardware\n");
1378 if (ctlr->auto_runtime_pm) {
1379 pm_runtime_mark_last_busy(ctlr->dev.parent);
1380 pm_runtime_put_autosuspend(ctlr->dev.parent);
1381 }
1382 trace_spi_controller_idle(ctlr);
1383
1384 spin_lock_irqsave(&ctlr->queue_lock, flags);
1385 ctlr->idling = false;
8caab75f 1386 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1387 return;
1388 }
ffbbdd21 1389
ffbbdd21 1390 /* Extract head of queue */
d1c44c93
VO		 1391 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1392 ctlr->cur_msg = msg;
ffbbdd21 1393
d1c44c93 1394 list_del_init(&msg->queue);
8caab75f 1395 if (ctlr->busy)
ffbbdd21
LW		 1396 was_busy = true;
1397 else
8caab75f
GU		 1398 ctlr->busy = true;
1399 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1400
8caab75f 1401 mutex_lock(&ctlr->io_mutex);
ef4d96ec 1402
8caab75f
GU		 1403 if (!was_busy && ctlr->auto_runtime_pm) {
1404 ret = pm_runtime_get_sync(ctlr->dev.parent);
49834de2 1405 if (ret < 0) {
7e48e23a 1406 pm_runtime_put_noidle(ctlr->dev.parent);
8caab75f 1407 dev_err(&ctlr->dev, "Failed to power device: %d\n",
49834de2 1408 ret);
8caab75f 1409 mutex_unlock(&ctlr->io_mutex);
49834de2
MB		 1410 return;
1411 }
1412 }
1413
56ec1978 1414 if (!was_busy)
8caab75f 1415 trace_spi_controller_busy(ctlr);
56ec1978 1416
8caab75f
GU		 1417 if (!was_busy && ctlr->prepare_transfer_hardware) {
1418 ret = ctlr->prepare_transfer_hardware(ctlr);
ffbbdd21 1419 if (ret) {
8caab75f 1420 dev_err(&ctlr->dev,
f3440d9a
SL		 1421 "failed to prepare transfer hardware: %d\n",
1422 ret);
49834de2 1423
8caab75f
GU		 1424 if (ctlr->auto_runtime_pm)
1425 pm_runtime_put(ctlr->dev.parent);
f3440d9a 1426
d1c44c93 1427 msg->status = ret;
f3440d9a
SL		 1428 spi_finalize_current_message(ctlr);
1429
8caab75f 1430 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW		 1431 return;
1432 }
1433 }
1434
d1c44c93 1435 trace_spi_message_start(msg);
56ec1978 1436
8caab75f 1437 if (ctlr->prepare_message) {
d1c44c93 1438 ret = ctlr->prepare_message(ctlr, msg);
2841a5fc 1439 if (ret) {
8caab75f
GU		 1440 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1441 ret);
d1c44c93 1442 msg->status = ret;
8caab75f 1443 spi_finalize_current_message(ctlr);
49023d2e 1444 goto out;
2841a5fc 1445 }
8caab75f 1446 ctlr->cur_msg_prepared = true;
2841a5fc
MB		 1447 }
1448
d1c44c93 1449 ret = spi_map_msg(ctlr, msg);
99adef31 1450 if (ret) {
d1c44c93 1451 msg->status = ret;
8caab75f 1452 spi_finalize_current_message(ctlr);
49023d2e 1453 goto out;
99adef31
MB		 1454 }
1455
b42faeee
VO		 1456 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1457 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1458 xfer->ptp_sts_word_pre = 0;
1459 ptp_read_system_prets(xfer->ptp_sts);
1460 }
1461 }
1462
d1c44c93 1463 ret = ctlr->transfer_one_message(ctlr, msg);
ffbbdd21 1464 if (ret) {
8caab75f 1465 dev_err(&ctlr->dev,
1f802f82 1466 "failed to transfer one message from queue\n");
49023d2e 1467 goto out;
ffbbdd21 1468 }
49023d2e
JH		 1469
1470out:
8caab75f 1471 mutex_unlock(&ctlr->io_mutex);
62826970
MB		 1472
1473 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH		 1474 if (!ret)
1475 cond_resched();
ffbbdd21
LW		 1476}
1477
fc9e0f71
MB		 1478/**
1479 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1480 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB		 1481 */
1482static void spi_pump_messages(struct kthread_work *work)
1483{
8caab75f
GU		 1484 struct spi_controller *ctlr =
1485 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1486
8caab75f 1487 __spi_pump_messages(ctlr, true);
fc9e0f71
MB		 1488}
1489
b42faeee
VO		 1490/**
1491 * spi_take_timestamp_pre - helper for drivers to collect the beginning of the
1492 * TX timestamp for the requested byte from the SPI
1493 * transfer. The frequency with which this function
1494 * must be called (once per word, once for the whole
1495 * transfer, once per batch of words etc) is arbitrary
1496 * as long as the @tx buffer offset is greater than or
1497 * equal to the requested byte at the time of the
1498 * call. The timestamp is only taken once, at the
1499 * first such call. It is assumed that the driver
1500 * advances its @tx buffer pointer monotonically.
1501 * @ctlr: Pointer to the spi_controller structure of the driver
1502 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1503 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO		 1504 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1505 * transfer, for less jitter in time measurement. Only compatible
1506 * with PIO drivers. If true, must follow up with
1507 * spi_take_timestamp_post or otherwise system will crash.
1508 * WARNING: for fully predictable results, the CPU frequency must
1509 * also be under control (governor).
1510 */
1511void spi_take_timestamp_pre(struct spi_controller *ctlr,
1512 struct spi_transfer *xfer,
862dd2a9 1513 size_t progress, bool irqs_off)
b42faeee 1514{
b42faeee
VO		 1515 if (!xfer->ptp_sts)
1516 return;
1517
6a726824 1518 if (xfer->timestamped)
b42faeee
VO		 1519 return;
1520
6a726824 1521 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO		 1522 return;
1523
1524 /* Capture the resolution of the timestamp */
862dd2a9 1525 xfer->ptp_sts_word_pre = progress;
b42faeee 1526
b42faeee
VO		 1527 if (irqs_off) {
1528 local_irq_save(ctlr->irq_flags);
1529 preempt_disable();
1530 }
1531
1532 ptp_read_system_prets(xfer->ptp_sts);
1533}
1534EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1535
1536/**
1537 * spi_take_timestamp_post - helper for drivers to collect the end of the
1538 * TX timestamp for the requested byte from the SPI
1539 * transfer. Can be called with an arbitrary
1540 * frequency: only the first call where @tx exceeds
1541 * or is equal to the requested word will be
1542 * timestamped.
1543 * @ctlr: Pointer to the spi_controller structure of the driver
1544 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1545 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO		 1546 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
1547 */
1548void spi_take_timestamp_post(struct spi_controller *ctlr,
1549 struct spi_transfer *xfer,
862dd2a9 1550 size_t progress, bool irqs_off)
b42faeee 1551{
b42faeee
VO		 1552 if (!xfer->ptp_sts)
1553 return;
1554
6a726824 1555 if (xfer->timestamped)
b42faeee
VO		 1556 return;
1557
862dd2a9 1558 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO		 1559 return;
1560
1561 ptp_read_system_postts(xfer->ptp_sts);
1562
1563 if (irqs_off) {
1564 local_irq_restore(ctlr->irq_flags);
1565 preempt_enable();
1566 }
1567
1568 /* Capture the resolution of the timestamp */
862dd2a9 1569 xfer->ptp_sts_word_post = progress;
b42faeee 1570
6a726824 1571 xfer->timestamped = true;
b42faeee
VO		 1572}
1573EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
1574
924b5867
DA		 1575/**
1576 * spi_set_thread_rt - set the controller to pump at realtime priority
1577 * @ctlr: controller to boost priority of
1578 *
1579 * This can be called because the controller requested realtime priority
1580 * (by setting the ->rt value before calling spi_register_controller()) or
1581 * because a device on the bus said that its transfers needed realtime
1582 * priority.
1583 *
1584 * NOTE: at the moment if any device on a bus says it needs realtime then
1585 * the thread will be at realtime priority for all transfers on that
1586 * controller. If this eventually becomes a problem we may see if we can
1587 * find a way to boost the priority only temporarily during relevant
1588 * transfers.
1589 */
1590static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 1591{
4ff13d00 1592 struct sched_param param = { .sched_priority = MAX_RT_PRIO / 2 };
ffbbdd21 1593
924b5867
DA		 1594 dev_info(&ctlr->dev,
1595 "will run message pump with realtime priority\n");
1596 sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, &param);
1597}
1598
1599static int spi_init_queue(struct spi_controller *ctlr)
1600{
8caab75f
GU		 1601 ctlr->running = false;
1602 ctlr->busy = false;
ffbbdd21 1603
8caab75f
GU		 1604 kthread_init_worker(&ctlr->kworker);
1605 ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker,
1606 "%s", dev_name(&ctlr->dev));
1607 if (IS_ERR(ctlr->kworker_task)) {
1608 dev_err(&ctlr->dev, "failed to create message pump task\n");
1609 return PTR_ERR(ctlr->kworker_task);
ffbbdd21 1610 }
8caab75f 1611 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 1612
ffbbdd21 1613 /*
8caab75f 1614 * Controller config will indicate if this controller should run the
ffbbdd21
LW		 1615 * message pump with high (realtime) priority to reduce the transfer
1616 * latency on the bus by minimising the delay between a transfer
1617 * request and the scheduling of the message pump thread. Without this
1618 * setting the message pump thread will remain at default priority.
1619 */
924b5867
DA		 1620 if (ctlr->rt)
1621 spi_set_thread_rt(ctlr);
ffbbdd21
LW		 1622
1623 return 0;
1624}
1625
1626/**
1627 * spi_get_next_queued_message() - called by driver to check for queued
1628 * messages
8caab75f 1629 * @ctlr: the controller to check for queued messages
ffbbdd21
LW		 1630 *
1631 * If there are more messages in the queue, the next message is returned from
1632 * this call.
97d56dc6
JMC		 1633 *
1634 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 1635 */
8caab75f 1636struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW		 1637{
1638 struct spi_message *next;
1639 unsigned long flags;
1640
1641 /* get a pointer to the next message, if any */
8caab75f
GU		 1642 spin_lock_irqsave(&ctlr->queue_lock, flags);
1643 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 1644 queue);
8caab75f 1645 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1646
1647 return next;
1648}
1649EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
1650
1651/**
1652 * spi_finalize_current_message() - the current message is complete
8caab75f 1653 * @ctlr: the controller to return the message to
ffbbdd21
LW		 1654 *
1655 * Called by the driver to notify the core that the message in the front of the
1656 * queue is complete and can be removed from the queue.
1657 */
8caab75f 1658void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 1659{
b42faeee 1660 struct spi_transfer *xfer;
ffbbdd21
LW		 1661 struct spi_message *mesg;
1662 unsigned long flags;
2841a5fc 1663 int ret;
ffbbdd21 1664
8caab75f
GU		 1665 spin_lock_irqsave(&ctlr->queue_lock, flags);
1666 mesg = ctlr->cur_msg;
1667 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1668
b42faeee
VO		 1669 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1670 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
1671 ptp_read_system_postts(xfer->ptp_sts);
1672 xfer->ptp_sts_word_post = xfer->len;
1673 }
1674 }
1675
6a726824
VO		 1676 if (unlikely(ctlr->ptp_sts_supported))
1677 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
1678 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 1679
8caab75f 1680 spi_unmap_msg(ctlr, mesg);
99adef31 1681
8caab75f
GU		 1682 if (ctlr->cur_msg_prepared && ctlr->unprepare_message) {
1683 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 1684 if (ret) {
8caab75f
GU		 1685 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
1686 ret);
2841a5fc
MB		 1687 }
1688 }
391949b6 1689
8caab75f
GU		 1690 spin_lock_irqsave(&ctlr->queue_lock, flags);
1691 ctlr->cur_msg = NULL;
1692 ctlr->cur_msg_prepared = false;
f0125f1a 1693 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
8caab75f 1694 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
8e76ef88
MS		 1695
1696 trace_spi_message_done(mesg);
2841a5fc 1697
ffbbdd21
LW		 1698 mesg->state = NULL;
1699 if (mesg->complete)
1700 mesg->complete(mesg->context);
1701}
1702EXPORT_SYMBOL_GPL(spi_finalize_current_message);
1703
8caab75f 1704static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1705{
1706 unsigned long flags;
1707
8caab75f 1708 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1709
8caab75f
GU		 1710 if (ctlr->running || ctlr->busy) {
1711 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1712 return -EBUSY;
1713 }
1714
8caab75f
GU		 1715 ctlr->running = true;
1716 ctlr->cur_msg = NULL;
1717 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1718
8caab75f 1719 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW		 1720
1721 return 0;
1722}
1723
8caab75f 1724static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1725{
1726 unsigned long flags;
1727 unsigned limit = 500;
1728 int ret = 0;
1729
8caab75f 1730 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1731
1732 /*
1733 * This is a bit lame, but is optimized for the common execution path.
8caab75f 1734 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW		 1735 * execution path (pump_messages) would be required to call wake_up or
1736 * friends on every SPI message. Do this instead.
1737 */
8caab75f
GU		 1738 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
1739 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 1740 usleep_range(10000, 11000);
8caab75f 1741 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1742 }
1743
8caab75f 1744 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW		 1745 ret = -EBUSY;
1746 else
8caab75f 1747 ctlr->running = false;
ffbbdd21 1748
8caab75f 1749 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1750
1751 if (ret) {
8caab75f 1752 dev_warn(&ctlr->dev, "could not stop message queue\n");
ffbbdd21
LW		 1753 return ret;
1754 }
1755 return ret;
1756}
1757
8caab75f 1758static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1759{
1760 int ret;
1761
8caab75f 1762 ret = spi_stop_queue(ctlr);
ffbbdd21
LW		 1763
1764 /*
3989144f 1765 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW		 1766 * If the reason that stop_queue timed out is that the work will never
1767 * finish, then it does no good to call flush/stop thread, so
1768 * return anyway.
1769 */
1770 if (ret) {
8caab75f 1771 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW		 1772 return ret;
1773 }
1774
8caab75f
GU		 1775 kthread_flush_worker(&ctlr->kworker);
1776 kthread_stop(ctlr->kworker_task);
ffbbdd21
LW		 1777
1778 return 0;
1779}
1780
0461a414
MB		 1781static int __spi_queued_transfer(struct spi_device *spi,
1782 struct spi_message *msg,
1783 bool need_pump)
ffbbdd21 1784{
8caab75f 1785 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW		 1786 unsigned long flags;
1787
8caab75f 1788 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 1789
8caab75f
GU		 1790 if (!ctlr->running) {
1791 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1792 return -ESHUTDOWN;
1793 }
1794 msg->actual_length = 0;
1795 msg->status = -EINPROGRESS;
1796
8caab75f 1797 list_add_tail(&msg->queue, &ctlr->queue);
f0125f1a 1798 if (!ctlr->busy && need_pump)
8caab75f 1799 kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 1800
8caab75f 1801 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 1802 return 0;
1803}
1804
0461a414
MB		 1805/**
1806 * spi_queued_transfer - transfer function for queued transfers
1807 * @spi: spi device which is requesting transfer
1808 * @msg: spi message which is to handled is queued to driver queue
97d56dc6
JMC		 1809 *
1810 * Return: zero on success, else a negative error code.
0461a414
MB		 1811 */
1812static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
1813{
1814 return __spi_queued_transfer(spi, msg, true);
1815}
1816
8caab75f 1817static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 1818{
1819 int ret;
1820
8caab75f
GU		 1821 ctlr->transfer = spi_queued_transfer;
1822 if (!ctlr->transfer_one_message)
1823 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW		 1824
1825 /* Initialize and start queue */
8caab75f 1826 ret = spi_init_queue(ctlr);
ffbbdd21 1827 if (ret) {
8caab75f 1828 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW		 1829 goto err_init_queue;
1830 }
8caab75f
GU		 1831 ctlr->queued = true;
1832 ret = spi_start_queue(ctlr);
ffbbdd21 1833 if (ret) {
8caab75f 1834 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW		 1835 goto err_start_queue;
1836 }
1837
1838 return 0;
1839
1840err_start_queue:
8caab75f 1841 spi_destroy_queue(ctlr);
c3676d5c 1842err_init_queue:
ffbbdd21
LW		 1843 return ret;
1844}
1845
988f259b
BB		 1846/**
1847 * spi_flush_queue - Send all pending messages in the queue from the callers'
1848 * context
1849 * @ctlr: controller to process queue for
1850 *
1851 * This should be used when one wants to ensure all pending messages have been
1852 * sent before doing something. Is used by the spi-mem code to make sure SPI
1853 * memory operations do not preempt regular SPI transfers that have been queued
1854 * before the spi-mem operation.
1855 */
1856void spi_flush_queue(struct spi_controller *ctlr)
1857{
1858 if (ctlr->transfer == spi_queued_transfer)
1859 __spi_pump_messages(ctlr, false);
1860}
1861
ffbbdd21
LW		 1862/*-------------------------------------------------------------------------*/
1863
7cb94361 1864#if defined(CONFIG_OF)
8caab75f 1865static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 1866 struct device_node *nc)
aff5e3f8 1867{
aff5e3f8 1868 u32 value;
c2e51ac3 1869 int rc;
aff5e3f8 1870
aff5e3f8 1871 /* Mode (clock phase/polarity/etc.) */
e0bcb680 1872 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 1873 spi->mode |= SPI_CPHA;
e0bcb680 1874 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 1875 spi->mode |= SPI_CPOL;
e0bcb680 1876 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 1877 spi->mode |= SPI_3WIRE;
e0bcb680 1878 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 1879 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 1880 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW		 1881 spi->mode |= SPI_CS_HIGH;
1882
aff5e3f8
PA		 1883 /* Device DUAL/QUAD mode */
1884 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
1885 switch (value) {
1886 case 1:
1887 break;
1888 case 2:
1889 spi->mode |= SPI_TX_DUAL;
1890 break;
1891 case 4:
1892 spi->mode |= SPI_TX_QUAD;
1893 break;
6b03061f
YNG		 1894 case 8:
1895 spi->mode |= SPI_TX_OCTAL;
1896 break;
aff5e3f8 1897 default:
8caab75f 1898 dev_warn(&ctlr->dev,
aff5e3f8
PA		 1899 "spi-tx-bus-width %d not supported\n",
1900 value);
1901 break;
1902 }
1903 }
1904
1905 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
1906 switch (value) {
1907 case 1:
1908 break;
1909 case 2:
1910 spi->mode |= SPI_RX_DUAL;
1911 break;
1912 case 4:
1913 spi->mode |= SPI_RX_QUAD;
1914 break;
6b03061f
YNG		 1915 case 8:
1916 spi->mode |= SPI_RX_OCTAL;
1917 break;
aff5e3f8 1918 default:
8caab75f 1919 dev_warn(&ctlr->dev,
aff5e3f8
PA		 1920 "spi-rx-bus-width %d not supported\n",
1921 value);
1922 break;
1923 }
1924 }
1925
8caab75f 1926 if (spi_controller_is_slave(ctlr)) {
194276b0 1927 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH		 1928 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
1929 nc);
6c364062
GU		 1930 return -EINVAL;
1931 }
1932 return 0;
1933 }
1934
1935 /* Device address */
1936 rc = of_property_read_u32(nc, "reg", &value);
1937 if (rc) {
25c56c88
RH		 1938 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
1939 nc, rc);
6c364062
GU		 1940 return rc;
1941 }
1942 spi->chip_select = value;
1943
3e5ec1db
GC		 1944 /*
1945 * For descriptors associated with the device, polarity inversion is
1946 * handled in the gpiolib, so all gpio chip selects are "active high"
1947 * in the logical sense, the gpiolib will invert the line if need be.
1948 */
15f794bd
GC		 1949 if ((ctlr->use_gpio_descriptors) && ctlr->cs_gpiods &&
1950 ctlr->cs_gpiods[spi->chip_select])
3e5ec1db
GC		 1951 spi->mode |= SPI_CS_HIGH;
1952
aff5e3f8 1953 /* Device speed */
671c3bf5
CG		 1954 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
1955 spi->max_speed_hz = value;
aff5e3f8 1956
c2e51ac3
GU		 1957 return 0;
1958}
1959
1960static struct spi_device *
8caab75f 1961of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU		 1962{
1963 struct spi_device *spi;
1964 int rc;
1965
1966 /* Alloc an spi_device */
8caab75f 1967 spi = spi_alloc_device(ctlr);
c2e51ac3 1968 if (!spi) {
25c56c88 1969 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU		 1970 rc = -ENOMEM;
1971 goto err_out;
1972 }
1973
1974 /* Select device driver */
1975 rc = of_modalias_node(nc, spi->modalias,
1976 sizeof(spi->modalias));
1977 if (rc < 0) {
25c56c88 1978 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU		 1979 goto err_out;
1980 }
1981
8caab75f 1982 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU		 1983 if (rc)
1984 goto err_out;
1985
aff5e3f8
PA		 1986 /* Store a pointer to the node in the device structure */
1987 of_node_get(nc);
1988 spi->dev.of_node = nc;
1989
1990 /* Register the new device */
aff5e3f8
PA		 1991 rc = spi_add_device(spi);
1992 if (rc) {
25c56c88 1993 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 1994 goto err_of_node_put;
aff5e3f8
PA		 1995 }
1996
1997 return spi;
1998
8324147f
JH		 1999err_of_node_put:
2000 of_node_put(nc);
aff5e3f8
PA		 2001err_out:
2002 spi_dev_put(spi);
2003 return ERR_PTR(rc);
2004}
2005
d57a4282
GL		 2006/**
2007 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2008 * @ctlr: Pointer to spi_controller device
d57a4282 2009 *
6c364062
GU		 2010 * Registers an spi_device for each child node of controller node which
2011 * represents a valid SPI slave.
d57a4282 2012 */
8caab75f 2013static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL		 2014{
2015 struct spi_device *spi;
2016 struct device_node *nc;
d57a4282 2017
8caab75f 2018 if (!ctlr->dev.of_node)
d57a4282
GL		 2019 return;
2020
8caab75f 2021 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU		 2022 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2023 continue;
8caab75f 2024 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2025 if (IS_ERR(spi)) {
8caab75f 2026 dev_warn(&ctlr->dev,
25c56c88 2027 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR		 2028 of_node_clear_flag(nc, OF_POPULATED);
2029 }
d57a4282
GL		 2030 }
2031}
2032#else
8caab75f 2033static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL		 2034#endif
2035
64bee4d2 2036#ifdef CONFIG_ACPI
4c3c5954
AB		 2037struct acpi_spi_lookup {
2038 struct spi_controller *ctlr;
2039 u32 max_speed_hz;
2040 u32 mode;
2041 int irq;
2042 u8 bits_per_word;
2043 u8 chip_select;
2044};
2045
2046static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2047 struct acpi_spi_lookup *lookup)
8a2e487e 2048{
8a2e487e
LW		 2049 const union acpi_object *obj;
2050
2051 if (!x86_apple_machine)
2052 return;
2053
2054 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2055 && obj->buffer.length >= 4)
4c3c5954 2056 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW		 2057
2058 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2059 && obj->buffer.length == 8)
4c3c5954 2060 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW		 2061
2062 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2063 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2064 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW		 2065
2066 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2067 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2068 lookup->mode |= SPI_CPOL;
8a2e487e
LW		 2069
2070 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2071 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2072 lookup->mode |= SPI_CPHA;
8a2e487e
LW		 2073}
2074
64bee4d2
MW		 2075static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2076{
4c3c5954
AB		 2077 struct acpi_spi_lookup *lookup = data;
2078 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW		 2079
2080 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2081 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB		 2082 acpi_handle parent_handle;
2083 acpi_status status;
64bee4d2
MW		 2084
2085 sb = &ares->data.spi_serial_bus;
2086 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954
AB		 2087
2088 status = acpi_get_handle(NULL,
2089 sb->resource_source.string_ptr,
2090 &parent_handle);
2091
b5e3cf41 2092 if (ACPI_FAILURE(status) ||
4c3c5954
AB		 2093 ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2094 return -ENODEV;
2095
a0a90718
MW		 2096 /*
2097 * ACPI DeviceSelection numbering is handled by the
2098 * host controller driver in Windows and can vary
2099 * from driver to driver. In Linux we always expect
2100 * 0 .. max - 1 so we need to ask the driver to
2101 * translate between the two schemes.
2102 */
8caab75f
GU		 2103 if (ctlr->fw_translate_cs) {
2104 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW		 2105 sb->device_selection);
2106 if (cs < 0)
2107 return cs;
4c3c5954 2108 lookup->chip_select = cs;
a0a90718 2109 } else {
4c3c5954 2110 lookup->chip_select = sb->device_selection;
a0a90718
MW		 2111 }
2112
4c3c5954 2113 lookup->max_speed_hz = sb->connection_speed;
64bee4d2
MW		 2114
2115 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2116 lookup->mode |= SPI_CPHA;
64bee4d2 2117 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2118 lookup->mode |= SPI_CPOL;
64bee4d2 2119 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2120 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2121 }
4c3c5954 2122 } else if (lookup->irq < 0) {
64bee4d2
MW		 2123 struct resource r;
2124
2125 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2126 lookup->irq = r.start;
64bee4d2
MW		 2127 }
2128
2129 /* Always tell the ACPI core to skip this resource */
2130 return 1;
2131}
2132
8caab75f 2133static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
7f24467f 2134 struct acpi_device *adev)
64bee4d2 2135{
4c3c5954 2136 acpi_handle parent_handle = NULL;
64bee4d2 2137 struct list_head resource_list;
b28944c6 2138 struct acpi_spi_lookup lookup = {};
64bee4d2
MW		 2139 struct spi_device *spi;
2140 int ret;
2141
7f24467f
OP		 2142 if (acpi_bus_get_status(adev) || !adev->status.present ||
2143 acpi_device_enumerated(adev))
64bee4d2
MW		 2144 return AE_OK;
2145
4c3c5954 2146 lookup.ctlr = ctlr;
4c3c5954 2147 lookup.irq = -1;
64bee4d2
MW		 2148
2149 INIT_LIST_HEAD(&resource_list);
2150 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2151 acpi_spi_add_resource, &lookup);
64bee4d2
MW		 2152 acpi_dev_free_resource_list(&resource_list);
2153
4c3c5954
AB		 2154 if (ret < 0)
2155 /* found SPI in _CRS but it points to another controller */
2156 return AE_OK;
8a2e487e 2157
4c3c5954
AB		 2158 if (!lookup.max_speed_hz &&
2159 !ACPI_FAILURE(acpi_get_parent(adev->handle, &parent_handle)) &&
2160 ACPI_HANDLE(ctlr->dev.parent) == parent_handle) {
2161 /* Apple does not use _CRS but nested devices for SPI slaves */
2162 acpi_spi_parse_apple_properties(adev, &lookup);
2163 }
2164
2165 if (!lookup.max_speed_hz)
64bee4d2 2166 return AE_OK;
4c3c5954
AB		 2167
2168 spi = spi_alloc_device(ctlr);
2169 if (!spi) {
2170 dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n",
2171 dev_name(&adev->dev));
2172 return AE_NO_MEMORY;
64bee4d2
MW		 2173 }
2174
ea235786 2175
4c3c5954
AB		 2176 ACPI_COMPANION_SET(&spi->dev, adev);
2177 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2178 spi->mode |= lookup.mode;
4c3c5954
AB		 2179 spi->irq = lookup.irq;
2180 spi->bits_per_word = lookup.bits_per_word;
2181 spi->chip_select = lookup.chip_select;
2182
0c6543f6
DD		 2183 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2184 sizeof(spi->modalias));
2185
33ada67d
CR		 2186 if (spi->irq < 0)
2187 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2188
7f24467f
OP		 2189 acpi_device_set_enumerated(adev);
2190
33cf00e5 2191 adev->power.flags.ignore_parent = true;
64bee4d2 2192 if (spi_add_device(spi)) {
33cf00e5 2193 adev->power.flags.ignore_parent = false;
8caab75f 2194 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW		 2195 dev_name(&adev->dev));
2196 spi_dev_put(spi);
2197 }
2198
2199 return AE_OK;
2200}
2201
7f24467f
OP		 2202static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2203 void *data, void **return_value)
2204{
8caab75f 2205 struct spi_controller *ctlr = data;
7f24467f
OP		 2206 struct acpi_device *adev;
2207
2208 if (acpi_bus_get_device(handle, &adev))
2209 return AE_OK;
2210
8caab75f 2211 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP		 2212}
2213
4c3c5954
AB		 2214#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2215
8caab75f 2216static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW		 2217{
2218 acpi_status status;
2219 acpi_handle handle;
2220
8caab75f 2221 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW		 2222 if (!handle)
2223 return;
2224
4c3c5954
AB		 2225 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2226 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2227 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2228 if (ACPI_FAILURE(status))
8caab75f 2229 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW		 2230}
2231#else
8caab75f 2232static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW		 2233#endif /* CONFIG_ACPI */
2234
8caab75f 2235static void spi_controller_release(struct device *dev)
8ae12a0d 2236{
8caab75f 2237 struct spi_controller *ctlr;
8ae12a0d 2238
8caab75f
GU		 2239 ctlr = container_of(dev, struct spi_controller, dev);
2240 kfree(ctlr);
8ae12a0d
DB		 2241}
2242
2243static struct class spi_master_class = {
2244 .name = "spi_master",
2245 .owner = THIS_MODULE,
8caab75f 2246 .dev_release = spi_controller_release,
eca2ebc7 2247 .dev_groups = spi_master_groups,
8ae12a0d
DB		 2248};
2249
6c364062
GU		 2250#ifdef CONFIG_SPI_SLAVE
2251/**
2252 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2253 * controller
2254 * @spi: device used for the current transfer
2255 */
2256int spi_slave_abort(struct spi_device *spi)
2257{
8caab75f 2258 struct spi_controller *ctlr = spi->controller;
6c364062 2259
8caab75f
GU		 2260 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2261 return ctlr->slave_abort(ctlr);
6c364062
GU		 2262
2263 return -ENOTSUPP;
2264}
2265EXPORT_SYMBOL_GPL(spi_slave_abort);
2266
2267static int match_true(struct device *dev, void *data)
2268{
2269 return 1;
2270}
2271
cc8b4659
GU		 2272static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2273 char *buf)
6c364062 2274{
8caab75f
GU		 2275 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2276 dev);
6c364062
GU		 2277 struct device *child;
2278
2279 child = device_find_child(&ctlr->dev, NULL, match_true);
2280 return sprintf(buf, "%s\n",
2281 child ? to_spi_device(child)->modalias : NULL);
2282}
2283
cc8b4659
GU		 2284static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2285 const char *buf, size_t count)
6c364062 2286{
8caab75f
GU		 2287 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2288 dev);
6c364062
GU		 2289 struct spi_device *spi;
2290 struct device *child;
2291 char name[32];
2292 int rc;
2293
2294 rc = sscanf(buf, "%31s", name);
2295 if (rc != 1 || !name[0])
2296 return -EINVAL;
2297
2298 child = device_find_child(&ctlr->dev, NULL, match_true);
2299 if (child) {
2300 /* Remove registered slave */
2301 device_unregister(child);
2302 put_device(child);
2303 }
2304
2305 if (strcmp(name, "(null)")) {
2306 /* Register new slave */
2307 spi = spi_alloc_device(ctlr);
2308 if (!spi)
2309 return -ENOMEM;
2310
2311 strlcpy(spi->modalias, name, sizeof(spi->modalias));
2312
2313 rc = spi_add_device(spi);
2314 if (rc) {
2315 spi_dev_put(spi);
2316 return rc;
2317 }
2318 }
2319
2320 return count;
2321}
2322
cc8b4659 2323static DEVICE_ATTR_RW(slave);
6c364062
GU		 2324
2325static struct attribute *spi_slave_attrs[] = {
2326 &dev_attr_slave.attr,
2327 NULL,
2328};
2329
2330static const struct attribute_group spi_slave_group = {
2331 .attrs = spi_slave_attrs,
2332};
2333
2334static const struct attribute_group *spi_slave_groups[] = {
8caab75f 2335 &spi_controller_statistics_group,
6c364062
GU		 2336 &spi_slave_group,
2337 NULL,
2338};
2339
2340static struct class spi_slave_class = {
2341 .name = "spi_slave",
2342 .owner = THIS_MODULE,
8caab75f 2343 .dev_release = spi_controller_release,
6c364062
GU		 2344 .dev_groups = spi_slave_groups,
2345};
2346#else
2347extern struct class spi_slave_class; /* dummy */
2348#endif
8ae12a0d
DB		 2349
2350/**
6c364062 2351 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 2352 * @dev: the controller, possibly using the platform_bus
33e34dc6 2353 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW		 2354 * memory is in the driver_data field of the returned device, accessible
2355 * with spi_controller_get_devdata(); the memory is cacheline aligned;
2356 * drivers granting DMA access to portions of their private data need to
2357 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU		 2358 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
2359 * slave (true) controller
33e34dc6 2360 * Context: can sleep
8ae12a0d 2361 *
6c364062 2362 * This call is used only by SPI controller drivers, which are the
8ae12a0d 2363 * only ones directly touching chip registers. It's how they allocate
8caab75f 2364 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 2365 *
97d56dc6 2366 * This must be called from context that can sleep.
8ae12a0d 2367 *
6c364062 2368 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU		 2369 * controller's methods before calling spi_register_controller(); and (after
2370 * errors adding the device) calling spi_controller_put() to prevent a memory
2371 * leak.
97d56dc6 2372 *
6c364062 2373 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 2374 */
8caab75f
GU		 2375struct spi_controller *__spi_alloc_controller(struct device *dev,
2376 unsigned int size, bool slave)
8ae12a0d 2377{
8caab75f 2378 struct spi_controller *ctlr;
229e6af1 2379 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 2380
0c868461
DB		 2381 if (!dev)
2382 return NULL;
2383
229e6af1 2384 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 2385 if (!ctlr)
8ae12a0d
DB		 2386 return NULL;
2387
8caab75f
GU		 2388 device_initialize(&ctlr->dev);
2389 ctlr->bus_num = -1;
2390 ctlr->num_chipselect = 1;
2391 ctlr->slave = slave;
6c364062 2392 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 2393 ctlr->dev.class = &spi_slave_class;
6c364062 2394 else
8caab75f
GU		 2395 ctlr->dev.class = &spi_master_class;
2396 ctlr->dev.parent = dev;
2397 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 2398 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 2399
8caab75f 2400 return ctlr;
8ae12a0d 2401}
6c364062 2402EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 2403
74317984 2404#ifdef CONFIG_OF
43004f31 2405static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984 2406{
e80beb27 2407 int nb, i, *cs;
8caab75f 2408 struct device_node *np = ctlr->dev.of_node;
74317984
JCPV		 2409
2410 if (!np)
2411 return 0;
2412
2413 nb = of_gpio_named_count(np, "cs-gpios");
8caab75f 2414 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
74317984 2415
8ec5d84e
AL		 2416 /* Return error only for an incorrectly formed cs-gpios property */
2417 if (nb == 0 || nb == -ENOENT)
74317984 2418 return 0;
8ec5d84e
AL		 2419 else if (nb < 0)
2420 return nb;
74317984 2421
a86854d0 2422 cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int),
74317984 2423 GFP_KERNEL);
8caab75f 2424 ctlr->cs_gpios = cs;
74317984 2425
8caab75f 2426 if (!ctlr->cs_gpios)
74317984
JCPV		 2427 return -ENOMEM;
2428
8caab75f 2429 for (i = 0; i < ctlr->num_chipselect; i++)
446411e1 2430 cs[i] = -ENOENT;
74317984
JCPV		 2431
2432 for (i = 0; i < nb; i++)
2433 cs[i] = of_get_named_gpio(np, "cs-gpios", i);
2434
2435 return 0;
2436}
2437#else
43004f31 2438static int of_spi_get_gpio_numbers(struct spi_controller *ctlr)
74317984
JCPV		 2439{
2440 return 0;
2441}
2442#endif
2443
f3186dd8
LW		 2444/**
2445 * spi_get_gpio_descs() - grab chip select GPIOs for the master
2446 * @ctlr: The SPI master to grab GPIO descriptors for
2447 */
2448static int spi_get_gpio_descs(struct spi_controller *ctlr)
2449{
2450 int nb, i;
2451 struct gpio_desc **cs;
2452 struct device *dev = &ctlr->dev;
7d93aecd
GU		 2453 unsigned long native_cs_mask = 0;
2454 unsigned int num_cs_gpios = 0;
f3186dd8
LW		 2455
2456 nb = gpiod_count(dev, "cs");
2457 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
2458
2459 /* No GPIOs at all is fine, else return the error */
2460 if (nb == 0 || nb == -ENOENT)
2461 return 0;
2462 else if (nb < 0)
2463 return nb;
2464
2465 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
2466 GFP_KERNEL);
2467 if (!cs)
2468 return -ENOMEM;
2469 ctlr->cs_gpiods = cs;
2470
2471 for (i = 0; i < nb; i++) {
2472 /*
2473 * Most chipselects are active low, the inverted
2474 * semantics are handled by special quirks in gpiolib,
2475 * so initializing them GPIOD_OUT_LOW here means
2476 * "unasserted", in most cases this will drive the physical
2477 * line high.
2478 */
2479 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
2480 GPIOD_OUT_LOW);
1723fdec
GU		 2481 if (IS_ERR(cs[i]))
2482 return PTR_ERR(cs[i]);
f3186dd8
LW		 2483
2484 if (cs[i]) {
2485 /*
2486 * If we find a CS GPIO, name it after the device and
2487 * chip select line.
2488 */
2489 char *gpioname;
2490
2491 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
2492 dev_name(dev), i);
2493 if (!gpioname)
2494 return -ENOMEM;
2495 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU		 2496 num_cs_gpios++;
2497 continue;
f3186dd8 2498 }
7d93aecd
GU		 2499
2500 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
2501 dev_err(dev, "Invalid native chip select %d\n", i);
2502 return -EINVAL;
f3186dd8 2503 }
7d93aecd
GU		 2504 native_cs_mask |= BIT(i);
2505 }
2506
2507 ctlr->unused_native_cs = ffz(native_cs_mask);
2508 if (num_cs_gpios && ctlr->max_native_cs &&
2509 ctlr->unused_native_cs >= ctlr->max_native_cs) {
2510 dev_err(dev, "No unused native chip select available\n");
2511 return -EINVAL;
f3186dd8
LW		 2512 }
2513
2514 return 0;
2515}
2516
bdf3a3b5
BB		 2517static int spi_controller_check_ops(struct spi_controller *ctlr)
2518{
2519 /*
b5932f5c
BB		 2520 * The controller may implement only the high-level SPI-memory like
2521 * operations if it does not support regular SPI transfers, and this is
2522 * valid use case.
2523 * If ->mem_ops is NULL, we request that at least one of the
2524 * ->transfer_xxx() method be implemented.
bdf3a3b5 2525 */
b5932f5c
BB		 2526 if (ctlr->mem_ops) {
2527 if (!ctlr->mem_ops->exec_op)
2528 return -EINVAL;
2529 } else if (!ctlr->transfer && !ctlr->transfer_one &&
2530 !ctlr->transfer_one_message) {
bdf3a3b5 2531 return -EINVAL;
b5932f5c 2532 }
bdf3a3b5
BB		 2533
2534 return 0;
2535}
2536
8ae12a0d 2537/**
8caab75f
GU		 2538 * spi_register_controller - register SPI master or slave controller
2539 * @ctlr: initialized master, originally from spi_alloc_master() or
2540 * spi_alloc_slave()
33e34dc6 2541 * Context: can sleep
8ae12a0d 2542 *
8caab75f 2543 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 2544 * such as the platform bus. The final stage of probe() in that code
8caab75f 2545 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB		 2546 *
2547 * SPI controllers use board specific (often SOC specific) bus numbers,
2548 * and board-specific addressing for SPI devices combines those numbers
2549 * with chip select numbers. Since SPI does not directly support dynamic
2550 * device identification, boards need configuration tables telling which
2551 * chip is at which address.
2552 *
2553 * This must be called from context that can sleep. It returns zero on
8caab75f 2554 * success, else a negative error code (dropping the controller's refcount).
0c868461 2555 * After a successful return, the caller is responsible for calling
8caab75f 2556 * spi_unregister_controller().
97d56dc6
JMC		 2557 *
2558 * Return: zero on success, else a negative error code.
8ae12a0d 2559 */
8caab75f 2560int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 2561{
8caab75f 2562 struct device *dev = ctlr->dev.parent;
2b9603a0 2563 struct boardinfo *bi;
b93318a2 2564 int status;
42bdd706 2565 int id, first_dynamic;
8ae12a0d 2566
0c868461
DB		 2567 if (!dev)
2568 return -ENODEV;
2569
bdf3a3b5
BB		 2570 /*
2571 * Make sure all necessary hooks are implemented before registering
2572 * the SPI controller.
2573 */
2574 status = spi_controller_check_ops(ctlr);
2575 if (status)
2576 return status;
2577
04b2d03a
GU		 2578 if (ctlr->bus_num >= 0) {
2579 /* devices with a fixed bus num must check-in with the num */
2580 mutex_lock(&board_lock);
2581 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2582 ctlr->bus_num + 1, GFP_KERNEL);
2583 mutex_unlock(&board_lock);
2584 if (WARN(id < 0, "couldn't get idr"))
2585 return id == -ENOSPC ? -EBUSY : id;
2586 ctlr->bus_num = id;
2587 } else if (ctlr->dev.of_node) {
2588 /* allocate dynamic bus number using Linux idr */
9b61e302
SM		 2589 id = of_alias_get_id(ctlr->dev.of_node, "spi");
2590 if (id >= 0) {
2591 ctlr->bus_num = id;
2592 mutex_lock(&board_lock);
2593 id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
2594 ctlr->bus_num + 1, GFP_KERNEL);
2595 mutex_unlock(&board_lock);
2596 if (WARN(id < 0, "couldn't get idr"))
2597 return id == -ENOSPC ? -EBUSY : id;
2598 }
2599 }
8caab75f 2600 if (ctlr->bus_num < 0) {
42bdd706
LS		 2601 first_dynamic = of_alias_get_highest_id("spi");
2602 if (first_dynamic < 0)
2603 first_dynamic = 0;
2604 else
2605 first_dynamic++;
2606
9a9a047a 2607 mutex_lock(&board_lock);
42bdd706
LS		 2608 id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
2609 0, GFP_KERNEL);
9a9a047a
SM		 2610 mutex_unlock(&board_lock);
2611 if (WARN(id < 0, "couldn't get idr"))
2612 return id;
2613 ctlr->bus_num = id;
8ae12a0d 2614 }
8caab75f
GU		 2615 INIT_LIST_HEAD(&ctlr->queue);
2616 spin_lock_init(&ctlr->queue_lock);
2617 spin_lock_init(&ctlr->bus_lock_spinlock);
2618 mutex_init(&ctlr->bus_lock_mutex);
2619 mutex_init(&ctlr->io_mutex);
2620 ctlr->bus_lock_flag = 0;
2621 init_completion(&ctlr->xfer_completion);
2622 if (!ctlr->max_dma_len)
2623 ctlr->max_dma_len = INT_MAX;
cf32b71e 2624
8ae12a0d
DB		 2625 /* register the device, then userspace will see it.
2626 * registration fails if the bus ID is in use.
2627 */
8caab75f 2628 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4
AS		 2629
2630 if (!spi_controller_is_slave(ctlr)) {
2631 if (ctlr->use_gpio_descriptors) {
2632 status = spi_get_gpio_descs(ctlr);
2633 if (status)
2634 return status;
2635 /*
2636 * A controller using GPIO descriptors always
2637 * supports SPI_CS_HIGH if need be.
2638 */
2639 ctlr->mode_bits |= SPI_CS_HIGH;
2640 } else {
2641 /* Legacy code path for GPIOs from DT */
43004f31 2642 status = of_spi_get_gpio_numbers(ctlr);
0a919ae4
AS		 2643 if (status)
2644 return status;
2645 }
2646 }
2647
f9481b08
TA		 2648 /*
2649 * Even if it's just one always-selected device, there must
2650 * be at least one chipselect.
2651 */
2652 if (!ctlr->num_chipselect)
2653 return -EINVAL;
2654
8caab75f 2655 status = device_add(&ctlr->dev);
9b61e302
SM		 2656 if (status < 0) {
2657 /* free bus id */
2658 mutex_lock(&board_lock);
2659 idr_remove(&spi_master_idr, ctlr->bus_num);
2660 mutex_unlock(&board_lock);
8ae12a0d 2661 goto done;
9b61e302
SM		 2662 }
2663 dev_dbg(dev, "registered %s %s\n",
8caab75f 2664 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 2665 dev_name(&ctlr->dev));
8ae12a0d 2666
b5932f5c
BB		 2667 /*
2668 * If we're using a queued driver, start the queue. Note that we don't
2669 * need the queueing logic if the driver is only supporting high-level
2670 * memory operations.
2671 */
2672 if (ctlr->transfer) {
8caab75f 2673 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 2674 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 2675 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 2676 if (status) {
8caab75f 2677 device_del(&ctlr->dev);
9b61e302
SM		 2678 /* free bus id */
2679 mutex_lock(&board_lock);
2680 idr_remove(&spi_master_idr, ctlr->bus_num);
2681 mutex_unlock(&board_lock);
ffbbdd21
LW		 2682 goto done;
2683 }
2684 }
eca2ebc7 2685 /* add statistics */
8caab75f 2686 spin_lock_init(&ctlr->statistics.lock);
ffbbdd21 2687
2b9603a0 2688 mutex_lock(&board_lock);
8caab75f 2689 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 2690 list_for_each_entry(bi, &board_list, list)
8caab75f 2691 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT		 2692 mutex_unlock(&board_lock);
2693
64bee4d2 2694 /* Register devices from the device tree and ACPI */
8caab75f
GU		 2695 of_register_spi_devices(ctlr);
2696 acpi_register_spi_devices(ctlr);
8ae12a0d
DB		 2697done:
2698 return status;
2699}
8caab75f 2700EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 2701
666d5b4c
MB		 2702static void devm_spi_unregister(struct device *dev, void *res)
2703{
8caab75f 2704 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB		 2705}
2706
2707/**
8caab75f
GU		 2708 * devm_spi_register_controller - register managed SPI master or slave
2709 * controller
2710 * @dev: device managing SPI controller
2711 * @ctlr: initialized controller, originally from spi_alloc_master() or
2712 * spi_alloc_slave()
666d5b4c
MB		 2713 * Context: can sleep
2714 *
8caab75f 2715 * Register a SPI device as with spi_register_controller() which will
68b892f1 2716 * automatically be unregistered and freed.
97d56dc6
JMC		 2717 *
2718 * Return: zero on success, else a negative error code.
666d5b4c 2719 */
8caab75f
GU		 2720int devm_spi_register_controller(struct device *dev,
2721 struct spi_controller *ctlr)
666d5b4c 2722{
8caab75f 2723 struct spi_controller **ptr;
666d5b4c
MB		 2724 int ret;
2725
2726 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
2727 if (!ptr)
2728 return -ENOMEM;
2729
8caab75f 2730 ret = spi_register_controller(ctlr);
4b92894e 2731 if (!ret) {
8caab75f 2732 *ptr = ctlr;
666d5b4c
MB		 2733 devres_add(dev, ptr);
2734 } else {
2735 devres_free(ptr);
2736 }
2737
2738 return ret;
2739}
8caab75f 2740EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 2741
34860089 2742static int __unregister(struct device *dev, void *null)
8ae12a0d 2743{
34860089 2744 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB		 2745 return 0;
2746}
2747
2748/**
8caab75f
GU		 2749 * spi_unregister_controller - unregister SPI master or slave controller
2750 * @ctlr: the controller being unregistered
33e34dc6 2751 * Context: can sleep
8ae12a0d 2752 *
8caab75f 2753 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB		 2754 * only ones directly touching chip registers.
2755 *
2756 * This must be called from context that can sleep.
68b892f1
JH		 2757 *
2758 * Note that this function also drops a reference to the controller.
8ae12a0d 2759 */
8caab75f 2760void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 2761{
9b61e302 2762 struct spi_controller *found;
67f7b278 2763 int id = ctlr->bus_num;
89fc9a1a 2764
9b61e302
SM		 2765 /* First make sure that this controller was ever added */
2766 mutex_lock(&board_lock);
67f7b278 2767 found = idr_find(&spi_master_idr, id);
9b61e302 2768 mutex_unlock(&board_lock);
8caab75f
GU		 2769 if (ctlr->queued) {
2770 if (spi_destroy_queue(ctlr))
2771 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 2772 }
2b9603a0 2773 mutex_lock(&board_lock);
8caab75f 2774 list_del(&ctlr->list);
2b9603a0
FT		 2775 mutex_unlock(&board_lock);
2776
ebc37af5 2777 device_for_each_child(&ctlr->dev, NULL, __unregister);
8caab75f 2778 device_unregister(&ctlr->dev);
9b61e302
SM		 2779 /* free bus id */
2780 mutex_lock(&board_lock);
613bd1ea
JN		 2781 if (found == ctlr)
2782 idr_remove(&spi_master_idr, id);
9b61e302 2783 mutex_unlock(&board_lock);
8ae12a0d 2784}
8caab75f 2785EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 2786
8caab75f 2787int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21
LW		 2788{
2789 int ret;
2790
8caab75f
GU		 2791 /* Basically no-ops for non-queued controllers */
2792 if (!ctlr->queued)
ffbbdd21
LW		 2793 return 0;
2794
8caab75f 2795 ret = spi_stop_queue(ctlr);
ffbbdd21 2796 if (ret)
8caab75f 2797 dev_err(&ctlr->dev, "queue stop failed\n");
ffbbdd21
LW		 2798
2799 return ret;
2800}
8caab75f 2801EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 2802
8caab75f 2803int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21
LW		 2804{
2805 int ret;
2806
8caab75f 2807 if (!ctlr->queued)
ffbbdd21
LW		 2808 return 0;
2809
8caab75f 2810 ret = spi_start_queue(ctlr);
ffbbdd21 2811 if (ret)
8caab75f 2812 dev_err(&ctlr->dev, "queue restart failed\n");
ffbbdd21
LW		 2813
2814 return ret;
2815}
8caab75f 2816EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 2817
8caab75f 2818static int __spi_controller_match(struct device *dev, const void *data)
5ed2c832 2819{
8caab75f 2820 struct spi_controller *ctlr;
9f3b795a 2821 const u16 *bus_num = data;
5ed2c832 2822
8caab75f
GU		 2823 ctlr = container_of(dev, struct spi_controller, dev);
2824 return ctlr->bus_num == *bus_num;
5ed2c832
DY		 2825}
2826
8ae12a0d
DB		 2827/**
2828 * spi_busnum_to_master - look up master associated with bus_num
2829 * @bus_num: the master's bus number
33e34dc6 2830 * Context: can sleep
8ae12a0d
DB		 2831 *
2832 * This call may be used with devices that are registered after
2833 * arch init time. It returns a refcounted pointer to the relevant
8caab75f 2834 * spi_controller (which the caller must release), or NULL if there is
8ae12a0d 2835 * no such master registered.
97d56dc6
JMC		 2836 *
2837 * Return: the SPI master structure on success, else NULL.
8ae12a0d 2838 */
8caab75f 2839struct spi_controller *spi_busnum_to_master(u16 bus_num)
8ae12a0d 2840{
49dce689 2841 struct device *dev;
8caab75f 2842 struct spi_controller *ctlr = NULL;
5ed2c832 2843
695794ae 2844 dev = class_find_device(&spi_master_class, NULL, &bus_num,
8caab75f 2845 __spi_controller_match);
5ed2c832 2846 if (dev)
8caab75f 2847 ctlr = container_of(dev, struct spi_controller, dev);
5ed2c832 2848 /* reference got in class_find_device */
8caab75f 2849 return ctlr;
8ae12a0d
DB		 2850}
2851EXPORT_SYMBOL_GPL(spi_busnum_to_master);
2852
d780c371
MS		 2853/*-------------------------------------------------------------------------*/
2854
2855/* Core methods for SPI resource management */
2856
2857/**
2858 * spi_res_alloc - allocate a spi resource that is life-cycle managed
2859 * during the processing of a spi_message while using
2860 * spi_transfer_one
2861 * @spi: the spi device for which we allocate memory
2862 * @release: the release code to execute for this resource
2863 * @size: size to alloc and return
2864 * @gfp: GFP allocation flags
2865 *
2866 * Return: the pointer to the allocated data
2867 *
2868 * This may get enhanced in the future to allocate from a memory pool
8caab75f 2869 * of the @spi_device or @spi_controller to avoid repeated allocations.
d780c371
MS		 2870 */
2871void *spi_res_alloc(struct spi_device *spi,
2872 spi_res_release_t release,
2873 size_t size, gfp_t gfp)
2874{
2875 struct spi_res *sres;
2876
2877 sres = kzalloc(sizeof(*sres) + size, gfp);
2878 if (!sres)
2879 return NULL;
2880
2881 INIT_LIST_HEAD(&sres->entry);
2882 sres->release = release;
2883
2884 return sres->data;
2885}
2886EXPORT_SYMBOL_GPL(spi_res_alloc);
2887
2888/**
2889 * spi_res_free - free an spi resource
2890 * @res: pointer to the custom data of a resource
2891 *
2892 */
2893void spi_res_free(void *res)
2894{
2895 struct spi_res *sres = container_of(res, struct spi_res, data);
2896
2897 if (!res)
2898 return;
2899
2900 WARN_ON(!list_empty(&sres->entry));
2901 kfree(sres);
2902}
2903EXPORT_SYMBOL_GPL(spi_res_free);
2904
2905/**
2906 * spi_res_add - add a spi_res to the spi_message
2907 * @message: the spi message
2908 * @res: the spi_resource
2909 */
2910void spi_res_add(struct spi_message *message, void *res)
2911{
2912 struct spi_res *sres = container_of(res, struct spi_res, data);
2913
2914 WARN_ON(!list_empty(&sres->entry));
2915 list_add_tail(&sres->entry, &message->resources);
2916}
2917EXPORT_SYMBOL_GPL(spi_res_add);
2918
2919/**
2920 * spi_res_release - release all spi resources for this message
8caab75f 2921 * @ctlr: the @spi_controller
d780c371
MS		 2922 * @message: the @spi_message
2923 */
8caab75f 2924void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
d780c371 2925{
f5694369 2926 struct spi_res *res, *tmp;
d780c371 2927
f5694369 2928 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
d780c371 2929 if (res->release)
8caab75f 2930 res->release(ctlr, message, res->data);
d780c371
MS		 2931
2932 list_del(&res->entry);
2933
2934 kfree(res);
2935 }
2936}
2937EXPORT_SYMBOL_GPL(spi_res_release);
8ae12a0d
DB		 2938
2939/*-------------------------------------------------------------------------*/
2940
523baf5a
MS		 2941/* Core methods for spi_message alterations */
2942
8caab75f 2943static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS		 2944 struct spi_message *msg,
2945 void *res)
2946{
2947 struct spi_replaced_transfers *rxfer = res;
2948 size_t i;
2949
2950 /* call extra callback if requested */
2951 if (rxfer->release)
8caab75f 2952 rxfer->release(ctlr, msg, res);
523baf5a
MS		 2953
2954 /* insert replaced transfers back into the message */
2955 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
2956
2957 /* remove the formerly inserted entries */
2958 for (i = 0; i < rxfer->inserted; i++)
2959 list_del(&rxfer->inserted_transfers[i].transfer_list);
2960}
2961
2962/**
2963 * spi_replace_transfers - replace transfers with several transfers
2964 * and register change with spi_message.resources
2965 * @msg: the spi_message we work upon
2966 * @xfer_first: the first spi_transfer we want to replace
2967 * @remove: number of transfers to remove
2968 * @insert: the number of transfers we want to insert instead
2969 * @release: extra release code necessary in some circumstances
2970 * @extradatasize: extra data to allocate (with alignment guarantees
2971 * of struct @spi_transfer)
05885397 2972 * @gfp: gfp flags
523baf5a
MS		 2973 *
2974 * Returns: pointer to @spi_replaced_transfers,
2975 * PTR_ERR(...) in case of errors.
2976 */
2977struct spi_replaced_transfers *spi_replace_transfers(
2978 struct spi_message *msg,
2979 struct spi_transfer *xfer_first,
2980 size_t remove,
2981 size_t insert,
2982 spi_replaced_release_t release,
2983 size_t extradatasize,
2984 gfp_t gfp)
2985{
2986 struct spi_replaced_transfers *rxfer;
2987 struct spi_transfer *xfer;
2988 size_t i;
2989
2990 /* allocate the structure using spi_res */
2991 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 2992 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS		 2993 + extradatasize,
2994 gfp);
2995 if (!rxfer)
2996 return ERR_PTR(-ENOMEM);
2997
2998 /* the release code to invoke before running the generic release */
2999 rxfer->release = release;
3000
3001 /* assign extradata */
3002 if (extradatasize)
3003 rxfer->extradata =
3004 &rxfer->inserted_transfers[insert];
3005
3006 /* init the replaced_transfers list */
3007 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3008
3009 /* assign the list_entry after which we should reinsert
3010 * the @replaced_transfers - it may be spi_message.messages!
3011 */
3012 rxfer->replaced_after = xfer_first->transfer_list.prev;
3013
3014 /* remove the requested number of transfers */
3015 for (i = 0; i < remove; i++) {
3016 /* if the entry after replaced_after it is msg->transfers
3017 * then we have been requested to remove more transfers
3018 * than are in the list
3019 */
3020 if (rxfer->replaced_after->next == &msg->transfers) {
3021 dev_err(&msg->spi->dev,
3022 "requested to remove more spi_transfers than are available\n");
3023 /* insert replaced transfers back into the message */
3024 list_splice(&rxfer->replaced_transfers,
3025 rxfer->replaced_after);
3026
3027 /* free the spi_replace_transfer structure */
3028 spi_res_free(rxfer);
3029
3030 /* and return with an error */
3031 return ERR_PTR(-EINVAL);
3032 }
3033
3034 /* remove the entry after replaced_after from list of
3035 * transfers and add it to list of replaced_transfers
3036 */
3037 list_move_tail(rxfer->replaced_after->next,
3038 &rxfer->replaced_transfers);
3039 }
3040
3041 /* create copy of the given xfer with identical settings
3042 * based on the first transfer to get removed
3043 */
3044 for (i = 0; i < insert; i++) {
3045 /* we need to run in reverse order */
3046 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3047
3048 /* copy all spi_transfer data */
3049 memcpy(xfer, xfer_first, sizeof(*xfer));
3050
3051 /* add to list */
3052 list_add(&xfer->transfer_list, rxfer->replaced_after);
3053
bebcfd27 3054 /* clear cs_change and delay for all but the last */
523baf5a
MS		 3055 if (i) {
3056 xfer->cs_change = false;
3057 xfer->delay_usecs = 0;
bebcfd27 3058 xfer->delay.value = 0;
523baf5a
MS		 3059 }
3060 }
3061
3062 /* set up inserted */
3063 rxfer->inserted = insert;
3064
3065 /* and register it with spi_res/spi_message */
3066 spi_res_add(msg, rxfer);
3067
3068 return rxfer;
3069}
3070EXPORT_SYMBOL_GPL(spi_replace_transfers);
3071
8caab75f 3072static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE		 3073 struct spi_message *msg,
3074 struct spi_transfer **xferp,
3075 size_t maxsize,
3076 gfp_t gfp)
d9f12122
MS		 3077{
3078 struct spi_transfer *xfer = *xferp, *xfers;
3079 struct spi_replaced_transfers *srt;
3080 size_t offset;
3081 size_t count, i;
3082
d9f12122
MS		 3083 /* calculate how many we have to replace */
3084 count = DIV_ROUND_UP(xfer->len, maxsize);
3085
3086 /* create replacement */
3087 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC		 3088 if (IS_ERR(srt))
3089 return PTR_ERR(srt);
d9f12122
MS		 3090 xfers = srt->inserted_transfers;
3091
3092 /* now handle each of those newly inserted spi_transfers
3093 * note that the replacements spi_transfers all are preset
3094 * to the same values as *xferp, so tx_buf, rx_buf and len
3095 * are all identical (as well as most others)
3096 * so we just have to fix up len and the pointers.
3097 *
3098 * this also includes support for the depreciated
3099 * spi_message.is_dma_mapped interface
3100 */
3101
3102 /* the first transfer just needs the length modified, so we
3103 * run it outside the loop
3104 */
c8dab77a 3105 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122
MS		 3106
3107 /* all the others need rx_buf/tx_buf also set */
3108 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
3109 /* update rx_buf, tx_buf and dma */
3110 if (xfers[i].rx_buf)
3111 xfers[i].rx_buf += offset;
3112 if (xfers[i].rx_dma)
3113 xfers[i].rx_dma += offset;
3114 if (xfers[i].tx_buf)
3115 xfers[i].tx_buf += offset;
3116 if (xfers[i].tx_dma)
3117 xfers[i].tx_dma += offset;
3118
3119 /* update length */
3120 xfers[i].len = min(maxsize, xfers[i].len - offset);
3121 }
3122
3123 /* we set up xferp to the last entry we have inserted,
3124 * so that we skip those already split transfers
3125 */
3126 *xferp = &xfers[count - 1];
3127
3128 /* increment statistics counters */
8caab75f 3129 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
d9f12122
MS		 3130 transfers_split_maxsize);
3131 SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics,
3132 transfers_split_maxsize);
3133
3134 return 0;
3135}
3136
3137/**
3138 * spi_split_tranfers_maxsize - split spi transfers into multiple transfers
3139 * when an individual transfer exceeds a
3140 * certain size
8caab75f 3141 * @ctlr: the @spi_controller for this transfer
3700ce95
MI		 3142 * @msg: the @spi_message to transform
3143 * @maxsize: the maximum when to apply this
10f11a22 3144 * @gfp: GFP allocation flags
d9f12122
MS		 3145 *
3146 * Return: status of transformation
3147 */
8caab75f 3148int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS		 3149 struct spi_message *msg,
3150 size_t maxsize,
3151 gfp_t gfp)
3152{
3153 struct spi_transfer *xfer;
3154 int ret;
3155
3156 /* iterate over the transfer_list,
3157 * but note that xfer is advanced to the last transfer inserted
3158 * to avoid checking sizes again unnecessarily (also xfer does
3159 * potentiall belong to a different list by the time the
3160 * replacement has happened
3161 */
3162 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3163 if (xfer->len > maxsize) {
8caab75f
GU		 3164 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3165 maxsize, gfp);
d9f12122
MS		 3166 if (ret)
3167 return ret;
3168 }
3169 }
3170
3171 return 0;
3172}
3173EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d
DB		 3174
3175/*-------------------------------------------------------------------------*/
3176
8caab75f 3177/* Core methods for SPI controller protocol drivers. Some of the
7d077197
DB		 3178 * other core methods are currently defined as inline functions.
3179 */
3180
8caab75f
GU		 3181static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3182 u8 bits_per_word)
63ab645f 3183{
8caab75f 3184 if (ctlr->bits_per_word_mask) {
63ab645f
SB		 3185 /* Only 32 bits fit in the mask */
3186 if (bits_per_word > 32)
3187 return -EINVAL;
8caab75f 3188 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB		 3189 return -EINVAL;
3190 }
3191
3192 return 0;
3193}
3194
7d077197
DB		 3195/**
3196 * spi_setup - setup SPI mode and clock rate
3197 * @spi: the device whose settings are being modified
3198 * Context: can sleep, and no requests are queued to the device
3199 *
3200 * SPI protocol drivers may need to update the transfer mode if the
3201 * device doesn't work with its default. They may likewise need
3202 * to update clock rates or word sizes from initial values. This function
3203 * changes those settings, and must be called from a context that can sleep.
3204 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3205 * effect the next time the device is selected and data is transferred to
3206 * or from it. When this function returns, the spi device is deselected.
3207 *
3208 * Note that this call will fail if the protocol driver specifies an option
3209 * that the underlying controller or its driver does not support. For
3210 * example, not all hardware supports wire transfers using nine bit words,
3211 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC		 3212 *
3213 * Return: zero on success, else a negative error code.
7d077197
DB		 3214 */
3215int spi_setup(struct spi_device *spi)
3216{
83596fbe 3217 unsigned bad_bits, ugly_bits;
5ab8d262 3218 int status;
7d077197 3219
f477b7fb 3220 /* check mode to prevent that DUAL and QUAD set at the same time
3221 */
3222 if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) ||
3223 ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) {
3224 dev_err(&spi->dev,
3225 "setup: can not select dual and quad at the same time\n");
3226 return -EINVAL;
3227 }
3228 /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden
3229 */
3230 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG		 3231 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3232 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3233 return -EINVAL;
e7db06b5 3234 /* help drivers fail *cleanly* when they need options
8caab75f 3235 * that aren't supported with their current controller
cbaa62e0
DL		 3236 * SPI_CS_WORD has a fallback software implementation,
3237 * so it is ignored here.
e7db06b5 3238 */
cbaa62e0 3239 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD);
d61ad23c
SS		 3240 /* nothing prevents from working with active-high CS in case if it
3241 * is driven by GPIO.
3242 */
3243 if (gpio_is_valid(spi->cs_gpio))
3244 bad_bits &= ~SPI_CS_HIGH;
83596fbe 3245 ugly_bits = bad_bits &
6b03061f
YNG		 3246 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3247 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU		 3248 if (ugly_bits) {
3249 dev_warn(&spi->dev,
3250 "setup: ignoring unsupported mode bits %x\n",
3251 ugly_bits);
3252 spi->mode &= ~ugly_bits;
3253 bad_bits &= ~ugly_bits;
3254 }
e7db06b5 3255 if (bad_bits) {
eb288a1f 3256 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB		 3257 bad_bits);
3258 return -EINVAL;
3259 }
3260
7d077197
DB		 3261 if (!spi->bits_per_word)
3262 spi->bits_per_word = 8;
3263
8caab75f
GU		 3264 status = __spi_validate_bits_per_word(spi->controller,
3265 spi->bits_per_word);
5ab8d262
AS		 3266 if (status)
3267 return status;
63ab645f 3268
052eb2d4 3269 if (!spi->max_speed_hz)
8caab75f 3270 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3271
8caab75f
GU		 3272 if (spi->controller->setup)
3273 status = spi->controller->setup(spi);
7d077197 3274
d948e6ca
LX		 3275 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
3276 status = pm_runtime_get_sync(spi->controller->dev.parent);
3277 if (status < 0) {
3278 pm_runtime_put_noidle(spi->controller->dev.parent);
3279 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3280 status);
3281 return status;
3282 }
57a94607
TL		 3283
3284 /*
3285 * We do not want to return positive value from pm_runtime_get,
3286 * there are many instances of devices calling spi_setup() and
3287 * checking for a non-zero return value instead of a negative
3288 * return value.
3289 */
3290 status = 0;
3291
d948e6ca
LX		 3292 spi_set_cs(spi, false);
3293 pm_runtime_mark_last_busy(spi->controller->dev.parent);
3294 pm_runtime_put_autosuspend(spi->controller->dev.parent);
3295 } else {
3296 spi_set_cs(spi, false);
3297 }
abeedb01 3298
924b5867
DA		 3299 if (spi->rt && !spi->controller->rt) {
3300 spi->controller->rt = true;
3301 spi_set_thread_rt(spi->controller);
3302 }
3303
5fe5f05e 3304 dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
7d077197
DB		 3305 (int) (spi->mode & (SPI_CPOL | SPI_CPHA)),
3306 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
3307 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
3308 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
3309 (spi->mode & SPI_LOOP) ? "loopback, " : "",
3310 spi->bits_per_word, spi->max_speed_hz,
3311 status);
3312
3313 return status;
3314}
3315EXPORT_SYMBOL_GPL(spi_setup);
3316
f1ca9992
SK		 3317/**
3318 * spi_set_cs_timing - configure CS setup, hold, and inactive delays
3319 * @spi: the device that requires specific CS timing configuration
81059366
AA		 3320 * @setup: CS setup time specified via @spi_delay
3321 * @hold: CS hold time specified via @spi_delay
3322 * @inactive: CS inactive delay between transfers specified via @spi_delay
3323 *
3324 * Return: zero on success, else a negative error code.
f1ca9992 3325 */
81059366
AA		 3326int spi_set_cs_timing(struct spi_device *spi, struct spi_delay *setup,
3327 struct spi_delay *hold, struct spi_delay *inactive)
f1ca9992 3328{
25093bde
AA		 3329 size_t len;
3330
f1ca9992 3331 if (spi->controller->set_cs_timing)
81059366
AA		 3332 return spi->controller->set_cs_timing(spi, setup, hold,
3333 inactive);
25093bde
AA		 3334
3335 if ((setup && setup->unit == SPI_DELAY_UNIT_SCK) ||
3336 (hold && hold->unit == SPI_DELAY_UNIT_SCK) ||
3337 (inactive && inactive->unit == SPI_DELAY_UNIT_SCK)) {
3338 dev_err(&spi->dev,
3339 "Clock-cycle delays for CS not supported in SW mode\n");
3340 return -ENOTSUPP;
3341 }
3342
3343 len = sizeof(struct spi_delay);
3344
3345 /* copy delays to controller */
3346 if (setup)
3347 memcpy(&spi->controller->cs_setup, setup, len);
3348 else
3349 memset(&spi->controller->cs_setup, 0, len);
3350
3351 if (hold)
3352 memcpy(&spi->controller->cs_hold, hold, len);
3353 else
3354 memset(&spi->controller->cs_hold, 0, len);
3355
3356 if (inactive)
3357 memcpy(&spi->controller->cs_inactive, inactive, len);
3358 else
3359 memset(&spi->controller->cs_inactive, 0, len);
3360
3361 return 0;
f1ca9992
SK		 3362}
3363EXPORT_SYMBOL_GPL(spi_set_cs_timing);
3364
6c613f68
AA		 3365static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
3366 struct spi_device *spi)
3367{
3368 int delay1, delay2;
3369
3984d39b 3370 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA		 3371 if (delay1 < 0)
3372 return delay1;
3373
3984d39b 3374 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA		 3375 if (delay2 < 0)
3376 return delay2;
3377
3378 if (delay1 < delay2)
3379 memcpy(&xfer->word_delay, &spi->word_delay,
3380 sizeof(xfer->word_delay));
3381
3382 return 0;
3383}
3384
90808738 3385static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 3386{
8caab75f 3387 struct spi_controller *ctlr = spi->controller;
e6811d1d 3388 struct spi_transfer *xfer;
6ea31293 3389 int w_size;
cf32b71e 3390
24a0013a
MB		 3391 if (list_empty(&message->transfers))
3392 return -EINVAL;
24a0013a 3393
cbaa62e0 3394 /* If an SPI controller does not support toggling the CS line on each
71388b21
DL		 3395 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
3396 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL		 3397 * splitting transfers into one-word transfers and ensuring that
3398 * cs_change is set for each transfer.
3399 */
71388b21 3400 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
f3186dd8 3401 spi->cs_gpiod ||
71388b21 3402 gpio_is_valid(spi->cs_gpio))) {
cbaa62e0
DL		 3403 size_t maxsize;
3404 int ret;
3405
3406 maxsize = (spi->bits_per_word + 7) / 8;
3407
3408 /* spi_split_transfers_maxsize() requires message->spi */
3409 message->spi = spi;
3410
3411 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
3412 GFP_KERNEL);
3413 if (ret)
3414 return ret;
3415
3416 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3417 /* don't change cs_change on the last entry in the list */
3418 if (list_is_last(&xfer->transfer_list, &message->transfers))
3419 break;
3420 xfer->cs_change = 1;
3421 }
3422 }
3423
cf32b71e
ES		 3424 /* Half-duplex links include original MicroWire, and ones with
3425 * only one data pin like SPI_3WIRE (switches direction) or where
3426 * either MOSI or MISO is missing. They can also be caused by
3427 * software limitations.
3428 */
8caab75f
GU		 3429 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
3430 (spi->mode & SPI_3WIRE)) {
3431 unsigned flags = ctlr->flags;
cf32b71e
ES		 3432
3433 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3434 if (xfer->rx_buf && xfer->tx_buf)
3435 return -EINVAL;
8caab75f 3436 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 3437 return -EINVAL;
8caab75f 3438 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES		 3439 return -EINVAL;
3440 }
3441 }
3442
e6811d1d 3443 /**
059b8ffe
LD		 3444 * Set transfer bits_per_word and max speed as spi device default if
3445 * it is not set for this transfer.
f477b7fb 3446 * Set transfer tx_nbits and rx_nbits as single transfer default
3447 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB		 3448 * Ensure transfer word_delay is at least as long as that required by
3449 * device itself.
e6811d1d 3450 */
77e80588 3451 message->frame_length = 0;
e6811d1d 3452 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 3453 xfer->effective_speed_hz = 0;
078726ce 3454 message->frame_length += xfer->len;
e6811d1d
LD		 3455 if (!xfer->bits_per_word)
3456 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL		 3457
3458 if (!xfer->speed_hz)
059b8ffe 3459 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 3460
8caab75f
GU		 3461 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
3462 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 3463
8caab75f 3464 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 3465 return -EINVAL;
a2fd4f9f 3466
4d94bd21
II		 3467 /*
3468 * SPI transfer length should be multiple of SPI word size
3469 * where SPI word size should be power-of-two multiple
3470 */
3471 if (xfer->bits_per_word <= 8)
3472 w_size = 1;
3473 else if (xfer->bits_per_word <= 16)
3474 w_size = 2;
3475 else
3476 w_size = 4;
3477
4d94bd21 3478 /* No partial transfers accepted */
6ea31293 3479 if (xfer->len % w_size)
4d94bd21
II		 3480 return -EINVAL;
3481
8caab75f
GU		 3482 if (xfer->speed_hz && ctlr->min_speed_hz &&
3483 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 3484 return -EINVAL;
f477b7fb 3485
3486 if (xfer->tx_buf && !xfer->tx_nbits)
3487 xfer->tx_nbits = SPI_NBITS_SINGLE;
3488 if (xfer->rx_buf && !xfer->rx_nbits)
3489 xfer->rx_nbits = SPI_NBITS_SINGLE;
3490 /* check transfer tx/rx_nbits:
1afd9989
GU		 3491 * 1. check the value matches one of single, dual and quad
3492 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 3493 */
db90a441
SP		 3494 if (xfer->tx_buf) {
3495 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
3496 xfer->tx_nbits != SPI_NBITS_DUAL &&
3497 xfer->tx_nbits != SPI_NBITS_QUAD)
3498 return -EINVAL;
3499 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
3500 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
3501 return -EINVAL;
3502 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
3503 !(spi->mode & SPI_TX_QUAD))
3504 return -EINVAL;
db90a441 3505 }
f477b7fb 3506 /* check transfer rx_nbits */
db90a441
SP		 3507 if (xfer->rx_buf) {
3508 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
3509 xfer->rx_nbits != SPI_NBITS_DUAL &&
3510 xfer->rx_nbits != SPI_NBITS_QUAD)
3511 return -EINVAL;
3512 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
3513 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
3514 return -EINVAL;
3515 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
3516 !(spi->mode & SPI_RX_QUAD))
3517 return -EINVAL;
db90a441 3518 }
b7bb367a 3519
6c613f68
AA		 3520 if (_spi_xfer_word_delay_update(xfer, spi))
3521 return -EINVAL;
e6811d1d
LD		 3522 }
3523
cf32b71e 3524 message->status = -EINPROGRESS;
90808738
MB		 3525
3526 return 0;
3527}
3528
3529static int __spi_async(struct spi_device *spi, struct spi_message *message)
3530{
8caab75f 3531 struct spi_controller *ctlr = spi->controller;
b42faeee 3532 struct spi_transfer *xfer;
90808738 3533
b5932f5c
BB		 3534 /*
3535 * Some controllers do not support doing regular SPI transfers. Return
3536 * ENOTSUPP when this is the case.
3537 */
3538 if (!ctlr->transfer)
3539 return -ENOTSUPP;
3540
90808738
MB		 3541 message->spi = spi;
3542
8caab75f 3543 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async);
eca2ebc7
MS		 3544 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async);
3545
90808738
MB		 3546 trace_spi_message_submit(message);
3547
b42faeee
VO		 3548 if (!ctlr->ptp_sts_supported) {
3549 list_for_each_entry(xfer, &message->transfers, transfer_list) {
3550 xfer->ptp_sts_word_pre = 0;
3551 ptp_read_system_prets(xfer->ptp_sts);
3552 }
3553 }
3554
8caab75f 3555 return ctlr->transfer(spi, message);
cf32b71e
ES		 3556}
3557
568d0697
DB		 3558/**
3559 * spi_async - asynchronous SPI transfer
3560 * @spi: device with which data will be exchanged
3561 * @message: describes the data transfers, including completion callback
3562 * Context: any (irqs may be blocked, etc)
3563 *
3564 * This call may be used in_irq and other contexts which can't sleep,
3565 * as well as from task contexts which can sleep.
3566 *
3567 * The completion callback is invoked in a context which can't sleep.
3568 * Before that invocation, the value of message->status is undefined.
3569 * When the callback is issued, message->status holds either zero (to
3570 * indicate complete success) or a negative error code. After that
3571 * callback returns, the driver which issued the transfer request may
3572 * deallocate the associated memory; it's no longer in use by any SPI
3573 * core or controller driver code.
3574 *
3575 * Note that although all messages to a spi_device are handled in
3576 * FIFO order, messages may go to different devices in other orders.
3577 * Some device might be higher priority, or have various "hard" access
3578 * time requirements, for example.
3579 *
3580 * On detection of any fault during the transfer, processing of
3581 * the entire message is aborted, and the device is deselected.
3582 * Until returning from the associated message completion callback,
3583 * no other spi_message queued to that device will be processed.
3584 * (This rule applies equally to all the synchronous transfer calls,
3585 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 3586 *
3587 * Return: zero on success, else a negative error code.
568d0697
DB		 3588 */
3589int spi_async(struct spi_device *spi, struct spi_message *message)
3590{
8caab75f 3591 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 3592 int ret;
3593 unsigned long flags;
568d0697 3594
90808738
MB		 3595 ret = __spi_validate(spi, message);
3596 if (ret != 0)
3597 return ret;
3598
8caab75f 3599 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 3600
8caab75f 3601 if (ctlr->bus_lock_flag)
cf32b71e
ES		 3602 ret = -EBUSY;
3603 else
3604 ret = __spi_async(spi, message);
568d0697 3605
8caab75f 3606 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3607
3608 return ret;
568d0697
DB		 3609}
3610EXPORT_SYMBOL_GPL(spi_async);
3611
cf32b71e
ES		 3612/**
3613 * spi_async_locked - version of spi_async with exclusive bus usage
3614 * @spi: device with which data will be exchanged
3615 * @message: describes the data transfers, including completion callback
3616 * Context: any (irqs may be blocked, etc)
3617 *
3618 * This call may be used in_irq and other contexts which can't sleep,
3619 * as well as from task contexts which can sleep.
3620 *
3621 * The completion callback is invoked in a context which can't sleep.
3622 * Before that invocation, the value of message->status is undefined.
3623 * When the callback is issued, message->status holds either zero (to
3624 * indicate complete success) or a negative error code. After that
3625 * callback returns, the driver which issued the transfer request may
3626 * deallocate the associated memory; it's no longer in use by any SPI
3627 * core or controller driver code.
3628 *
3629 * Note that although all messages to a spi_device are handled in
3630 * FIFO order, messages may go to different devices in other orders.
3631 * Some device might be higher priority, or have various "hard" access
3632 * time requirements, for example.
3633 *
3634 * On detection of any fault during the transfer, processing of
3635 * the entire message is aborted, and the device is deselected.
3636 * Until returning from the associated message completion callback,
3637 * no other spi_message queued to that device will be processed.
3638 * (This rule applies equally to all the synchronous transfer calls,
3639 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 3640 *
3641 * Return: zero on success, else a negative error code.
cf32b71e
ES		 3642 */
3643int spi_async_locked(struct spi_device *spi, struct spi_message *message)
3644{
8caab75f 3645 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 3646 int ret;
3647 unsigned long flags;
3648
90808738
MB		 3649 ret = __spi_validate(spi, message);
3650 if (ret != 0)
3651 return ret;
3652
8caab75f 3653 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3654
3655 ret = __spi_async(spi, message);
3656
8caab75f 3657 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3658
3659 return ret;
3660
3661}
3662EXPORT_SYMBOL_GPL(spi_async_locked);
3663
7d077197
DB		 3664/*-------------------------------------------------------------------------*/
3665
8caab75f 3666/* Utility methods for SPI protocol drivers, layered on
7d077197
DB		 3667 * top of the core. Some other utility methods are defined as
3668 * inline functions.
3669 */
3670
5d870c8e
AM		 3671static void spi_complete(void *arg)
3672{
3673 complete(arg);
3674}
3675
ef4d96ec 3676static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES		 3677{
3678 DECLARE_COMPLETION_ONSTACK(done);
3679 int status;
8caab75f 3680 struct spi_controller *ctlr = spi->controller;
0461a414
MB		 3681 unsigned long flags;
3682
3683 status = __spi_validate(spi, message);
3684 if (status != 0)
3685 return status;
cf32b71e
ES		 3686
3687 message->complete = spi_complete;
3688 message->context = &done;
0461a414 3689 message->spi = spi;
cf32b71e 3690
8caab75f 3691 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync);
eca2ebc7
MS		 3692 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync);
3693
0461a414
MB		 3694 /* If we're not using the legacy transfer method then we will
3695 * try to transfer in the calling context so special case.
3696 * This code would be less tricky if we could remove the
3697 * support for driver implemented message queues.
3698 */
8caab75f
GU		 3699 if (ctlr->transfer == spi_queued_transfer) {
3700 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
0461a414
MB		 3701
3702 trace_spi_message_submit(message);
3703
3704 status = __spi_queued_transfer(spi, message, false);
3705
8caab75f 3706 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
0461a414
MB		 3707 } else {
3708 status = spi_async_locked(spi, message);
3709 }
cf32b71e 3710
cf32b71e 3711 if (status == 0) {
0461a414
MB		 3712 /* Push out the messages in the calling context if we
3713 * can.
3714 */
8caab75f
GU		 3715 if (ctlr->transfer == spi_queued_transfer) {
3716 SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics,
eca2ebc7
MS		 3717 spi_sync_immediate);
3718 SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics,
3719 spi_sync_immediate);
8caab75f 3720 __spi_pump_messages(ctlr, false);
eca2ebc7 3721 }
0461a414 3722
cf32b71e
ES		 3723 wait_for_completion(&done);
3724 status = message->status;
3725 }
3726 message->context = NULL;
3727 return status;
3728}
3729
8ae12a0d
DB		 3730/**
3731 * spi_sync - blocking/synchronous SPI data transfers
3732 * @spi: device with which data will be exchanged
3733 * @message: describes the data transfers
33e34dc6 3734 * Context: can sleep
8ae12a0d
DB		 3735 *
3736 * This call may only be used from a context that may sleep. The sleep
3737 * is non-interruptible, and has no timeout. Low-overhead controller
3738 * drivers may DMA directly into and out of the message buffers.
3739 *
3740 * Note that the SPI device's chip select is active during the message,
3741 * and then is normally disabled between messages. Drivers for some
3742 * frequently-used devices may want to minimize costs of selecting a chip,
3743 * by leaving it selected in anticipation that the next message will go
3744 * to the same chip. (That may increase power usage.)
3745 *
0c868461
DB		 3746 * Also, the caller is guaranteeing that the memory associated with the
3747 * message will not be freed before this call returns.
3748 *
97d56dc6 3749 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 3750 */
3751int spi_sync(struct spi_device *spi, struct spi_message *message)
3752{
ef4d96ec
MB		 3753 int ret;
3754
8caab75f 3755 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 3756 ret = __spi_sync(spi, message);
8caab75f 3757 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB		 3758
3759 return ret;
8ae12a0d
DB		 3760}
3761EXPORT_SYMBOL_GPL(spi_sync);
3762
cf32b71e
ES		 3763/**
3764 * spi_sync_locked - version of spi_sync with exclusive bus usage
3765 * @spi: device with which data will be exchanged
3766 * @message: describes the data transfers
3767 * Context: can sleep
3768 *
3769 * This call may only be used from a context that may sleep. The sleep
3770 * is non-interruptible, and has no timeout. Low-overhead controller
3771 * drivers may DMA directly into and out of the message buffers.
3772 *
3773 * This call should be used by drivers that require exclusive access to the
25985edc 3774 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES		 3775 * be released by a spi_bus_unlock call when the exclusive access is over.
3776 *
97d56dc6 3777 * Return: zero on success, else a negative error code.
cf32b71e
ES		 3778 */
3779int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
3780{
ef4d96ec 3781 return __spi_sync(spi, message);
cf32b71e
ES		 3782}
3783EXPORT_SYMBOL_GPL(spi_sync_locked);
3784
3785/**
3786 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 3787 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES		 3788 * Context: can sleep
3789 *
3790 * This call may only be used from a context that may sleep. The sleep
3791 * is non-interruptible, and has no timeout.
3792 *
3793 * This call should be used by drivers that require exclusive access to the
3794 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
3795 * exclusive access is over. Data transfer must be done by spi_sync_locked
3796 * and spi_async_locked calls when the SPI bus lock is held.
3797 *
97d56dc6 3798 * Return: always zero.
cf32b71e 3799 */
8caab75f 3800int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES		 3801{
3802 unsigned long flags;
3803
8caab75f 3804 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 3805
8caab75f
GU		 3806 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
3807 ctlr->bus_lock_flag = 1;
3808 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 3809
3810 /* mutex remains locked until spi_bus_unlock is called */
3811
3812 return 0;
3813}
3814EXPORT_SYMBOL_GPL(spi_bus_lock);
3815
3816/**
3817 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 3818 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES		 3819 * Context: can sleep
3820 *
3821 * This call may only be used from a context that may sleep. The sleep
3822 * is non-interruptible, and has no timeout.
3823 *
3824 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
3825 * call.
3826 *
97d56dc6 3827 * Return: always zero.
cf32b71e 3828 */
8caab75f 3829int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 3830{
8caab75f 3831 ctlr->bus_lock_flag = 0;
cf32b71e 3832
8caab75f 3833 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES		 3834
3835 return 0;
3836}
3837EXPORT_SYMBOL_GPL(spi_bus_unlock);
3838
a9948b61 3839/* portable code must never pass more than 32 bytes */
5fe5f05e 3840#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB		 3841
3842static u8 *buf;
3843
3844/**
3845 * spi_write_then_read - SPI synchronous write followed by read
3846 * @spi: device with which data will be exchanged
3847 * @txbuf: data to be written (need not be dma-safe)
3848 * @n_tx: size of txbuf, in bytes
27570497
JP		 3849 * @rxbuf: buffer into which data will be read (need not be dma-safe)
3850 * @n_rx: size of rxbuf, in bytes
33e34dc6 3851 * Context: can sleep
8ae12a0d
DB		 3852 *
3853 * This performs a half duplex MicroWire style transaction with the
3854 * device, sending txbuf and then reading rxbuf. The return value
3855 * is zero for success, else a negative errno status code.
b885244e 3856 * This call may only be used from a context that may sleep.
8ae12a0d 3857 *
0c868461 3858 * Parameters to this routine are always copied using a small buffer;
33e34dc6
DB		 3859 * portable code should never use this for more than 32 bytes.
3860 * Performance-sensitive or bulk transfer code should instead use
0c868461 3861 * spi_{async,sync}() calls with dma-safe buffers.
97d56dc6
JMC		 3862 *
3863 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 3864 */
3865int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB		 3866 const void *txbuf, unsigned n_tx,
3867 void *rxbuf, unsigned n_rx)
8ae12a0d 3868{
068f4070 3869 static DEFINE_MUTEX(lock);
8ae12a0d
DB		 3870
3871 int status;
3872 struct spi_message message;
bdff549e 3873 struct spi_transfer x[2];
8ae12a0d
DB		 3874 u8 *local_buf;
3875
b3a223ee
MB		 3876 /* Use preallocated DMA-safe buffer if we can. We can't avoid
3877 * copying here, (as a pure convenience thing), but we can
3878 * keep heap costs out of the hot path unless someone else is
3879 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 3880 */
b3a223ee 3881 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB		 3882 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
3883 GFP_KERNEL | GFP_DMA);
b3a223ee
MB		 3884 if (!local_buf)
3885 return -ENOMEM;
3886 } else {
3887 local_buf = buf;
3888 }
8ae12a0d 3889
8275c642 3890 spi_message_init(&message);
5fe5f05e 3891 memset(x, 0, sizeof(x));
bdff549e
DB		 3892 if (n_tx) {
3893 x[0].len = n_tx;
3894 spi_message_add_tail(&x[0], &message);
3895 }
3896 if (n_rx) {
3897 x[1].len = n_rx;
3898 spi_message_add_tail(&x[1], &message);
3899 }
8275c642 3900
8ae12a0d 3901 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB		 3902 x[0].tx_buf = local_buf;
3903 x[1].rx_buf = local_buf + n_tx;
8ae12a0d
DB		 3904
3905 /* do the i/o */
8ae12a0d 3906 status = spi_sync(spi, &message);
9b938b74 3907 if (status == 0)
bdff549e 3908 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 3909
bdff549e 3910 if (x[0].tx_buf == buf)
068f4070 3911 mutex_unlock(&lock);
8ae12a0d
DB		 3912 else
3913 kfree(local_buf);
3914
3915 return status;
3916}
3917EXPORT_SYMBOL_GPL(spi_write_then_read);
3918
3919/*-------------------------------------------------------------------------*/
3920
5f143af7 3921#if IS_ENABLED(CONFIG_OF)
ce79d54a 3922/* must call put_device() when done with returned spi_device device */
5f143af7 3923struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 3924{
cfba5de9
SP		 3925 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
3926
ce79d54a
PA		 3927 return dev ? to_spi_device(dev) : NULL;
3928}
5f143af7
MF		 3929EXPORT_SYMBOL_GPL(of_find_spi_device_by_node);
3930#endif /* IS_ENABLED(CONFIG_OF) */
ce79d54a 3931
5f143af7 3932#if IS_ENABLED(CONFIG_OF_DYNAMIC)
8caab75f
GU		 3933/* the spi controllers are not using spi_bus, so we find it with another way */
3934static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA		 3935{
3936 struct device *dev;
3937
cfba5de9 3938 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 3939 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 3940 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA		 3941 if (!dev)
3942 return NULL;
3943
3944 /* reference got in class_find_device */
8caab75f 3945 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA		 3946}
3947
3948static int of_spi_notify(struct notifier_block *nb, unsigned long action,
3949 void *arg)
3950{
3951 struct of_reconfig_data *rd = arg;
8caab75f 3952 struct spi_controller *ctlr;
ce79d54a
PA		 3953 struct spi_device *spi;
3954
3955 switch (of_reconfig_get_state_change(action, arg)) {
3956 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU		 3957 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
3958 if (ctlr == NULL)
ce79d54a
PA		 3959 return NOTIFY_OK; /* not for us */
3960
bd6c1644 3961 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 3962 put_device(&ctlr->dev);
bd6c1644
GU		 3963 return NOTIFY_OK;
3964 }
3965
8caab75f
GU		 3966 spi = of_register_spi_device(ctlr, rd->dn);
3967 put_device(&ctlr->dev);
ce79d54a
PA		 3968
3969 if (IS_ERR(spi)) {
25c56c88
RH		 3970 pr_err("%s: failed to create for '%pOF'\n",
3971 __func__, rd->dn);
e0af98a7 3972 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA		 3973 return notifier_from_errno(PTR_ERR(spi));
3974 }
3975 break;
3976
3977 case OF_RECONFIG_CHANGE_REMOVE:
bd6c1644
GU		 3978 /* already depopulated? */
3979 if (!of_node_check_flag(rd->dn, OF_POPULATED))
3980 return NOTIFY_OK;
3981
ce79d54a
PA		 3982 /* find our device by node */
3983 spi = of_find_spi_device_by_node(rd->dn);
3984 if (spi == NULL)
3985 return NOTIFY_OK; /* no? not meant for us */
3986
3987 /* unregister takes one ref away */
3988 spi_unregister_device(spi);
3989
3990 /* and put the reference of the find */
3991 put_device(&spi->dev);
3992 break;
3993 }
3994
3995 return NOTIFY_OK;
3996}
3997
3998static struct notifier_block spi_of_notifier = {
3999 .notifier_call = of_spi_notify,
4000};
4001#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4002extern struct notifier_block spi_of_notifier;
4003#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4004
7f24467f 4005#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4006static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP		 4007{
4008 return ACPI_COMPANION(dev->parent) == data;
4009}
4010
8caab75f 4011static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP		 4012{
4013 struct device *dev;
4014
4015 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4016 spi_acpi_controller_match);
6c364062
GU		 4017 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4018 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4019 spi_acpi_controller_match);
7f24467f
OP		 4020 if (!dev)
4021 return NULL;
4022
8caab75f 4023 return container_of(dev, struct spi_controller, dev);
7f24467f
OP		 4024}
4025
4026static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4027{
4028 struct device *dev;
4029
00500147 4030 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
7f24467f
OP		 4031 return dev ? to_spi_device(dev) : NULL;
4032}
4033
4034static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4035 void *arg)
4036{
4037 struct acpi_device *adev = arg;
8caab75f 4038 struct spi_controller *ctlr;
7f24467f
OP		 4039 struct spi_device *spi;
4040
4041 switch (value) {
4042 case ACPI_RECONFIG_DEVICE_ADD:
8caab75f
GU		 4043 ctlr = acpi_spi_find_controller_by_adev(adev->parent);
4044 if (!ctlr)
7f24467f
OP		 4045 break;
4046
8caab75f
GU		 4047 acpi_register_spi_device(ctlr, adev);
4048 put_device(&ctlr->dev);
7f24467f
OP		 4049 break;
4050 case ACPI_RECONFIG_DEVICE_REMOVE:
4051 if (!acpi_device_enumerated(adev))
4052 break;
4053
4054 spi = acpi_spi_find_device_by_adev(adev);
4055 if (!spi)
4056 break;
4057
4058 spi_unregister_device(spi);
4059 put_device(&spi->dev);
4060 break;
4061 }
4062
4063 return NOTIFY_OK;
4064}
4065
4066static struct notifier_block spi_acpi_notifier = {
4067 .notifier_call = acpi_spi_notify,
4068};
4069#else
4070extern struct notifier_block spi_acpi_notifier;
4071#endif
4072
8ae12a0d
DB		 4073static int __init spi_init(void)
4074{
b885244e
DB		 4075 int status;
4076
e94b1766 4077 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB		 4078 if (!buf) {
4079 status = -ENOMEM;
4080 goto err0;
4081 }
4082
4083 status = bus_register(&spi_bus_type);
4084 if (status < 0)
4085 goto err1;
8ae12a0d 4086
b885244e
DB		 4087 status = class_register(&spi_master_class);
4088 if (status < 0)
4089 goto err2;
ce79d54a 4090
6c364062
GU		 4091 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4092 status = class_register(&spi_slave_class);
4093 if (status < 0)
4094 goto err3;
4095 }
4096
5267720e 4097 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4098 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP		 4099 if (IS_ENABLED(CONFIG_ACPI))
4100 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4101
8ae12a0d 4102 return 0;
b885244e 4103
6c364062
GU		 4104err3:
4105 class_unregister(&spi_master_class);
b885244e
DB		 4106err2:
4107 bus_unregister(&spi_bus_type);
4108err1:
4109 kfree(buf);
4110 buf = NULL;
4111err0:
4112 return status;
8ae12a0d 4113}
b885244e 4114
8ae12a0d
DB		 4115/* board_info is normally registered in arch_initcall(),
4116 * but even essential drivers wait till later
b885244e
DB		 4117 *
4118 * REVISIT only boardinfo really needs static linking. the rest (device and
4119 * driver registration) _could_ be dynamically linked (modular) ... costs
4120 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4121 */
673c0c00 4122postcore_initcall(spi_init);
Linux 6.x block layer and io_uring tree(s)