Commit | Line | Data |
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8ae12a0d | 1 | /* |
ca632f55 | 2 | * SPI init/core code |
8ae12a0d DB |
3 | * |
4 | * Copyright (C) 2005 David Brownell | |
d57a4282 | 5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. |
8ae12a0d DB |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
8ae12a0d DB |
16 | */ |
17 | ||
8ae12a0d DB |
18 | #include <linux/kernel.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/cache.h> | |
99adef31 MB |
22 | #include <linux/dma-mapping.h> |
23 | #include <linux/dmaengine.h> | |
94040828 | 24 | #include <linux/mutex.h> |
2b7a32f7 | 25 | #include <linux/of_device.h> |
d57a4282 | 26 | #include <linux/of_irq.h> |
86be408b | 27 | #include <linux/clk/clk-conf.h> |
5a0e3ad6 | 28 | #include <linux/slab.h> |
e0626e38 | 29 | #include <linux/mod_devicetable.h> |
8ae12a0d | 30 | #include <linux/spi/spi.h> |
b5932f5c | 31 | #include <linux/spi/spi-mem.h> |
74317984 | 32 | #include <linux/of_gpio.h> |
3ae22e8c | 33 | #include <linux/pm_runtime.h> |
f48c767c | 34 | #include <linux/pm_domain.h> |
826cf175 | 35 | #include <linux/property.h> |
025ed130 | 36 | #include <linux/export.h> |
8bd75c77 | 37 | #include <linux/sched/rt.h> |
ae7e81c0 | 38 | #include <uapi/linux/sched/types.h> |
ffbbdd21 LW |
39 | #include <linux/delay.h> |
40 | #include <linux/kthread.h> | |
64bee4d2 MW |
41 | #include <linux/ioport.h> |
42 | #include <linux/acpi.h> | |
b1b8153c | 43 | #include <linux/highmem.h> |
9b61e302 | 44 | #include <linux/idr.h> |
8a2e487e | 45 | #include <linux/platform_data/x86/apple.h> |
8ae12a0d | 46 | |
56ec1978 MB |
47 | #define CREATE_TRACE_POINTS |
48 | #include <trace/events/spi.h> | |
9b61e302 | 49 | |
46336966 BB |
50 | #include "internals.h" |
51 | ||
9b61e302 | 52 | static DEFINE_IDR(spi_master_idr); |
56ec1978 | 53 | |
8ae12a0d DB |
54 | static void spidev_release(struct device *dev) |
55 | { | |
0ffa0285 | 56 | struct spi_device *spi = to_spi_device(dev); |
8ae12a0d | 57 | |
8caab75f GU |
58 | /* spi controllers may cleanup for released devices */ |
59 | if (spi->controller->cleanup) | |
60 | spi->controller->cleanup(spi); | |
8ae12a0d | 61 | |
8caab75f | 62 | spi_controller_put(spi->controller); |
07a389fe | 63 | kfree(spi); |
8ae12a0d DB |
64 | } |
65 | ||
66 | static ssize_t | |
67 | modalias_show(struct device *dev, struct device_attribute *a, char *buf) | |
68 | { | |
69 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
70 | int len; |
71 | ||
72 | len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); | |
73 | if (len != -ENODEV) | |
74 | return len; | |
8ae12a0d | 75 | |
d8e328b3 | 76 | return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d | 77 | } |
aa7da564 | 78 | static DEVICE_ATTR_RO(modalias); |
8ae12a0d | 79 | |
eca2ebc7 | 80 | #define SPI_STATISTICS_ATTRS(field, file) \ |
8caab75f GU |
81 | static ssize_t spi_controller_##field##_show(struct device *dev, \ |
82 | struct device_attribute *attr, \ | |
83 | char *buf) \ | |
eca2ebc7 | 84 | { \ |
8caab75f GU |
85 | struct spi_controller *ctlr = container_of(dev, \ |
86 | struct spi_controller, dev); \ | |
87 | return spi_statistics_##field##_show(&ctlr->statistics, buf); \ | |
eca2ebc7 | 88 | } \ |
8caab75f | 89 | static struct device_attribute dev_attr_spi_controller_##field = { \ |
ad25c92e | 90 | .attr = { .name = file, .mode = 0444 }, \ |
8caab75f | 91 | .show = spi_controller_##field##_show, \ |
eca2ebc7 MS |
92 | }; \ |
93 | static ssize_t spi_device_##field##_show(struct device *dev, \ | |
94 | struct device_attribute *attr, \ | |
95 | char *buf) \ | |
96 | { \ | |
d1eba93b | 97 | struct spi_device *spi = to_spi_device(dev); \ |
eca2ebc7 MS |
98 | return spi_statistics_##field##_show(&spi->statistics, buf); \ |
99 | } \ | |
100 | static struct device_attribute dev_attr_spi_device_##field = { \ | |
ad25c92e | 101 | .attr = { .name = file, .mode = 0444 }, \ |
eca2ebc7 MS |
102 | .show = spi_device_##field##_show, \ |
103 | } | |
104 | ||
105 | #define SPI_STATISTICS_SHOW_NAME(name, file, field, format_string) \ | |
106 | static ssize_t spi_statistics_##name##_show(struct spi_statistics *stat, \ | |
107 | char *buf) \ | |
108 | { \ | |
109 | unsigned long flags; \ | |
110 | ssize_t len; \ | |
111 | spin_lock_irqsave(&stat->lock, flags); \ | |
112 | len = sprintf(buf, format_string, stat->field); \ | |
113 | spin_unlock_irqrestore(&stat->lock, flags); \ | |
114 | return len; \ | |
115 | } \ | |
116 | SPI_STATISTICS_ATTRS(name, file) | |
117 | ||
118 | #define SPI_STATISTICS_SHOW(field, format_string) \ | |
119 | SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \ | |
120 | field, format_string) | |
121 | ||
122 | SPI_STATISTICS_SHOW(messages, "%lu"); | |
123 | SPI_STATISTICS_SHOW(transfers, "%lu"); | |
124 | SPI_STATISTICS_SHOW(errors, "%lu"); | |
125 | SPI_STATISTICS_SHOW(timedout, "%lu"); | |
126 | ||
127 | SPI_STATISTICS_SHOW(spi_sync, "%lu"); | |
128 | SPI_STATISTICS_SHOW(spi_sync_immediate, "%lu"); | |
129 | SPI_STATISTICS_SHOW(spi_async, "%lu"); | |
130 | ||
131 | SPI_STATISTICS_SHOW(bytes, "%llu"); | |
132 | SPI_STATISTICS_SHOW(bytes_rx, "%llu"); | |
133 | SPI_STATISTICS_SHOW(bytes_tx, "%llu"); | |
134 | ||
6b7bc061 MS |
135 | #define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \ |
136 | SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \ | |
137 | "transfer_bytes_histo_" number, \ | |
138 | transfer_bytes_histo[index], "%lu") | |
139 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1"); | |
140 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3"); | |
141 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7"); | |
142 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15"); | |
143 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31"); | |
144 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63"); | |
145 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127"); | |
146 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255"); | |
147 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511"); | |
148 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023"); | |
149 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047"); | |
150 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095"); | |
151 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191"); | |
152 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383"); | |
153 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767"); | |
154 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535"); | |
155 | SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+"); | |
156 | ||
d9f12122 MS |
157 | SPI_STATISTICS_SHOW(transfers_split_maxsize, "%lu"); |
158 | ||
aa7da564 GKH |
159 | static struct attribute *spi_dev_attrs[] = { |
160 | &dev_attr_modalias.attr, | |
161 | NULL, | |
8ae12a0d | 162 | }; |
eca2ebc7 MS |
163 | |
164 | static const struct attribute_group spi_dev_group = { | |
165 | .attrs = spi_dev_attrs, | |
166 | }; | |
167 | ||
168 | static struct attribute *spi_device_statistics_attrs[] = { | |
169 | &dev_attr_spi_device_messages.attr, | |
170 | &dev_attr_spi_device_transfers.attr, | |
171 | &dev_attr_spi_device_errors.attr, | |
172 | &dev_attr_spi_device_timedout.attr, | |
173 | &dev_attr_spi_device_spi_sync.attr, | |
174 | &dev_attr_spi_device_spi_sync_immediate.attr, | |
175 | &dev_attr_spi_device_spi_async.attr, | |
176 | &dev_attr_spi_device_bytes.attr, | |
177 | &dev_attr_spi_device_bytes_rx.attr, | |
178 | &dev_attr_spi_device_bytes_tx.attr, | |
6b7bc061 MS |
179 | &dev_attr_spi_device_transfer_bytes_histo0.attr, |
180 | &dev_attr_spi_device_transfer_bytes_histo1.attr, | |
181 | &dev_attr_spi_device_transfer_bytes_histo2.attr, | |
182 | &dev_attr_spi_device_transfer_bytes_histo3.attr, | |
183 | &dev_attr_spi_device_transfer_bytes_histo4.attr, | |
184 | &dev_attr_spi_device_transfer_bytes_histo5.attr, | |
185 | &dev_attr_spi_device_transfer_bytes_histo6.attr, | |
186 | &dev_attr_spi_device_transfer_bytes_histo7.attr, | |
187 | &dev_attr_spi_device_transfer_bytes_histo8.attr, | |
188 | &dev_attr_spi_device_transfer_bytes_histo9.attr, | |
189 | &dev_attr_spi_device_transfer_bytes_histo10.attr, | |
190 | &dev_attr_spi_device_transfer_bytes_histo11.attr, | |
191 | &dev_attr_spi_device_transfer_bytes_histo12.attr, | |
192 | &dev_attr_spi_device_transfer_bytes_histo13.attr, | |
193 | &dev_attr_spi_device_transfer_bytes_histo14.attr, | |
194 | &dev_attr_spi_device_transfer_bytes_histo15.attr, | |
195 | &dev_attr_spi_device_transfer_bytes_histo16.attr, | |
d9f12122 | 196 | &dev_attr_spi_device_transfers_split_maxsize.attr, |
eca2ebc7 MS |
197 | NULL, |
198 | }; | |
199 | ||
200 | static const struct attribute_group spi_device_statistics_group = { | |
201 | .name = "statistics", | |
202 | .attrs = spi_device_statistics_attrs, | |
203 | }; | |
204 | ||
205 | static const struct attribute_group *spi_dev_groups[] = { | |
206 | &spi_dev_group, | |
207 | &spi_device_statistics_group, | |
208 | NULL, | |
209 | }; | |
210 | ||
8caab75f GU |
211 | static struct attribute *spi_controller_statistics_attrs[] = { |
212 | &dev_attr_spi_controller_messages.attr, | |
213 | &dev_attr_spi_controller_transfers.attr, | |
214 | &dev_attr_spi_controller_errors.attr, | |
215 | &dev_attr_spi_controller_timedout.attr, | |
216 | &dev_attr_spi_controller_spi_sync.attr, | |
217 | &dev_attr_spi_controller_spi_sync_immediate.attr, | |
218 | &dev_attr_spi_controller_spi_async.attr, | |
219 | &dev_attr_spi_controller_bytes.attr, | |
220 | &dev_attr_spi_controller_bytes_rx.attr, | |
221 | &dev_attr_spi_controller_bytes_tx.attr, | |
222 | &dev_attr_spi_controller_transfer_bytes_histo0.attr, | |
223 | &dev_attr_spi_controller_transfer_bytes_histo1.attr, | |
224 | &dev_attr_spi_controller_transfer_bytes_histo2.attr, | |
225 | &dev_attr_spi_controller_transfer_bytes_histo3.attr, | |
226 | &dev_attr_spi_controller_transfer_bytes_histo4.attr, | |
227 | &dev_attr_spi_controller_transfer_bytes_histo5.attr, | |
228 | &dev_attr_spi_controller_transfer_bytes_histo6.attr, | |
229 | &dev_attr_spi_controller_transfer_bytes_histo7.attr, | |
230 | &dev_attr_spi_controller_transfer_bytes_histo8.attr, | |
231 | &dev_attr_spi_controller_transfer_bytes_histo9.attr, | |
232 | &dev_attr_spi_controller_transfer_bytes_histo10.attr, | |
233 | &dev_attr_spi_controller_transfer_bytes_histo11.attr, | |
234 | &dev_attr_spi_controller_transfer_bytes_histo12.attr, | |
235 | &dev_attr_spi_controller_transfer_bytes_histo13.attr, | |
236 | &dev_attr_spi_controller_transfer_bytes_histo14.attr, | |
237 | &dev_attr_spi_controller_transfer_bytes_histo15.attr, | |
238 | &dev_attr_spi_controller_transfer_bytes_histo16.attr, | |
239 | &dev_attr_spi_controller_transfers_split_maxsize.attr, | |
eca2ebc7 MS |
240 | NULL, |
241 | }; | |
242 | ||
8caab75f | 243 | static const struct attribute_group spi_controller_statistics_group = { |
eca2ebc7 | 244 | .name = "statistics", |
8caab75f | 245 | .attrs = spi_controller_statistics_attrs, |
eca2ebc7 MS |
246 | }; |
247 | ||
248 | static const struct attribute_group *spi_master_groups[] = { | |
8caab75f | 249 | &spi_controller_statistics_group, |
eca2ebc7 MS |
250 | NULL, |
251 | }; | |
252 | ||
253 | void spi_statistics_add_transfer_stats(struct spi_statistics *stats, | |
254 | struct spi_transfer *xfer, | |
8caab75f | 255 | struct spi_controller *ctlr) |
eca2ebc7 MS |
256 | { |
257 | unsigned long flags; | |
6b7bc061 MS |
258 | int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1; |
259 | ||
260 | if (l2len < 0) | |
261 | l2len = 0; | |
eca2ebc7 MS |
262 | |
263 | spin_lock_irqsave(&stats->lock, flags); | |
264 | ||
265 | stats->transfers++; | |
6b7bc061 | 266 | stats->transfer_bytes_histo[l2len]++; |
eca2ebc7 MS |
267 | |
268 | stats->bytes += xfer->len; | |
269 | if ((xfer->tx_buf) && | |
8caab75f | 270 | (xfer->tx_buf != ctlr->dummy_tx)) |
eca2ebc7 MS |
271 | stats->bytes_tx += xfer->len; |
272 | if ((xfer->rx_buf) && | |
8caab75f | 273 | (xfer->rx_buf != ctlr->dummy_rx)) |
eca2ebc7 MS |
274 | stats->bytes_rx += xfer->len; |
275 | ||
276 | spin_unlock_irqrestore(&stats->lock, flags); | |
277 | } | |
278 | EXPORT_SYMBOL_GPL(spi_statistics_add_transfer_stats); | |
8ae12a0d DB |
279 | |
280 | /* modalias support makes "modprobe $MODALIAS" new-style hotplug work, | |
281 | * and the sysfs version makes coldplug work too. | |
282 | */ | |
283 | ||
75368bf6 AV |
284 | static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, |
285 | const struct spi_device *sdev) | |
286 | { | |
287 | while (id->name[0]) { | |
288 | if (!strcmp(sdev->modalias, id->name)) | |
289 | return id; | |
290 | id++; | |
291 | } | |
292 | return NULL; | |
293 | } | |
294 | ||
295 | const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev) | |
296 | { | |
297 | const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver); | |
298 | ||
299 | return spi_match_id(sdrv->id_table, sdev); | |
300 | } | |
301 | EXPORT_SYMBOL_GPL(spi_get_device_id); | |
302 | ||
8ae12a0d DB |
303 | static int spi_match_device(struct device *dev, struct device_driver *drv) |
304 | { | |
305 | const struct spi_device *spi = to_spi_device(dev); | |
75368bf6 AV |
306 | const struct spi_driver *sdrv = to_spi_driver(drv); |
307 | ||
2b7a32f7 SA |
308 | /* Attempt an OF style match */ |
309 | if (of_driver_match_device(dev, drv)) | |
310 | return 1; | |
311 | ||
64bee4d2 MW |
312 | /* Then try ACPI */ |
313 | if (acpi_driver_match_device(dev, drv)) | |
314 | return 1; | |
315 | ||
75368bf6 AV |
316 | if (sdrv->id_table) |
317 | return !!spi_match_id(sdrv->id_table, spi); | |
8ae12a0d | 318 | |
35f74fca | 319 | return strcmp(spi->modalias, drv->name) == 0; |
8ae12a0d DB |
320 | } |
321 | ||
7eff2e7a | 322 | static int spi_uevent(struct device *dev, struct kobj_uevent_env *env) |
8ae12a0d DB |
323 | { |
324 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
325 | int rc; |
326 | ||
327 | rc = acpi_device_uevent_modalias(dev, env); | |
328 | if (rc != -ENODEV) | |
329 | return rc; | |
8ae12a0d | 330 | |
2856670f | 331 | return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d DB |
332 | } |
333 | ||
8ae12a0d DB |
334 | struct bus_type spi_bus_type = { |
335 | .name = "spi", | |
aa7da564 | 336 | .dev_groups = spi_dev_groups, |
8ae12a0d DB |
337 | .match = spi_match_device, |
338 | .uevent = spi_uevent, | |
8ae12a0d DB |
339 | }; |
340 | EXPORT_SYMBOL_GPL(spi_bus_type); | |
341 | ||
b885244e DB |
342 | |
343 | static int spi_drv_probe(struct device *dev) | |
344 | { | |
345 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
44af7927 | 346 | struct spi_device *spi = to_spi_device(dev); |
33cf00e5 MW |
347 | int ret; |
348 | ||
86be408b SN |
349 | ret = of_clk_set_defaults(dev->of_node, false); |
350 | if (ret) | |
351 | return ret; | |
352 | ||
44af7927 JH |
353 | if (dev->of_node) { |
354 | spi->irq = of_irq_get(dev->of_node, 0); | |
355 | if (spi->irq == -EPROBE_DEFER) | |
356 | return -EPROBE_DEFER; | |
357 | if (spi->irq < 0) | |
358 | spi->irq = 0; | |
359 | } | |
360 | ||
676e7c25 | 361 | ret = dev_pm_domain_attach(dev, true); |
71f277a7 UH |
362 | if (ret) |
363 | return ret; | |
364 | ||
365 | ret = sdrv->probe(spi); | |
366 | if (ret) | |
367 | dev_pm_domain_detach(dev, true); | |
b885244e | 368 | |
33cf00e5 | 369 | return ret; |
b885244e DB |
370 | } |
371 | ||
372 | static int spi_drv_remove(struct device *dev) | |
373 | { | |
374 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
33cf00e5 MW |
375 | int ret; |
376 | ||
aec35f4e | 377 | ret = sdrv->remove(to_spi_device(dev)); |
676e7c25 | 378 | dev_pm_domain_detach(dev, true); |
b885244e | 379 | |
33cf00e5 | 380 | return ret; |
b885244e DB |
381 | } |
382 | ||
383 | static void spi_drv_shutdown(struct device *dev) | |
384 | { | |
385 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
386 | ||
387 | sdrv->shutdown(to_spi_device(dev)); | |
388 | } | |
389 | ||
33e34dc6 | 390 | /** |
ca5d2485 | 391 | * __spi_register_driver - register a SPI driver |
88c9321d | 392 | * @owner: owner module of the driver to register |
33e34dc6 DB |
393 | * @sdrv: the driver to register |
394 | * Context: can sleep | |
97d56dc6 JMC |
395 | * |
396 | * Return: zero on success, else a negative error code. | |
33e34dc6 | 397 | */ |
ca5d2485 | 398 | int __spi_register_driver(struct module *owner, struct spi_driver *sdrv) |
b885244e | 399 | { |
ca5d2485 | 400 | sdrv->driver.owner = owner; |
b885244e DB |
401 | sdrv->driver.bus = &spi_bus_type; |
402 | if (sdrv->probe) | |
403 | sdrv->driver.probe = spi_drv_probe; | |
404 | if (sdrv->remove) | |
405 | sdrv->driver.remove = spi_drv_remove; | |
406 | if (sdrv->shutdown) | |
407 | sdrv->driver.shutdown = spi_drv_shutdown; | |
408 | return driver_register(&sdrv->driver); | |
409 | } | |
ca5d2485 | 410 | EXPORT_SYMBOL_GPL(__spi_register_driver); |
b885244e | 411 | |
8ae12a0d DB |
412 | /*-------------------------------------------------------------------------*/ |
413 | ||
414 | /* SPI devices should normally not be created by SPI device drivers; that | |
8caab75f | 415 | * would make them board-specific. Similarly with SPI controller drivers. |
8ae12a0d DB |
416 | * Device registration normally goes into like arch/.../mach.../board-YYY.c |
417 | * with other readonly (flashable) information about mainboard devices. | |
418 | */ | |
419 | ||
420 | struct boardinfo { | |
421 | struct list_head list; | |
2b9603a0 | 422 | struct spi_board_info board_info; |
8ae12a0d DB |
423 | }; |
424 | ||
425 | static LIST_HEAD(board_list); | |
8caab75f | 426 | static LIST_HEAD(spi_controller_list); |
2b9603a0 FT |
427 | |
428 | /* | |
429 | * Used to protect add/del opertion for board_info list and | |
8caab75f | 430 | * spi_controller list, and their matching process |
9a9a047a | 431 | * also used to protect object of type struct idr |
2b9603a0 | 432 | */ |
94040828 | 433 | static DEFINE_MUTEX(board_lock); |
8ae12a0d | 434 | |
dc87c98e GL |
435 | /** |
436 | * spi_alloc_device - Allocate a new SPI device | |
8caab75f | 437 | * @ctlr: Controller to which device is connected |
dc87c98e GL |
438 | * Context: can sleep |
439 | * | |
440 | * Allows a driver to allocate and initialize a spi_device without | |
441 | * registering it immediately. This allows a driver to directly | |
442 | * fill the spi_device with device parameters before calling | |
443 | * spi_add_device() on it. | |
444 | * | |
445 | * Caller is responsible to call spi_add_device() on the returned | |
8caab75f | 446 | * spi_device structure to add it to the SPI controller. If the caller |
dc87c98e GL |
447 | * needs to discard the spi_device without adding it, then it should |
448 | * call spi_dev_put() on it. | |
449 | * | |
97d56dc6 | 450 | * Return: a pointer to the new device, or NULL. |
dc87c98e | 451 | */ |
8caab75f | 452 | struct spi_device *spi_alloc_device(struct spi_controller *ctlr) |
dc87c98e GL |
453 | { |
454 | struct spi_device *spi; | |
dc87c98e | 455 | |
8caab75f | 456 | if (!spi_controller_get(ctlr)) |
dc87c98e GL |
457 | return NULL; |
458 | ||
5fe5f05e | 459 | spi = kzalloc(sizeof(*spi), GFP_KERNEL); |
dc87c98e | 460 | if (!spi) { |
8caab75f | 461 | spi_controller_put(ctlr); |
dc87c98e GL |
462 | return NULL; |
463 | } | |
464 | ||
8caab75f GU |
465 | spi->master = spi->controller = ctlr; |
466 | spi->dev.parent = &ctlr->dev; | |
dc87c98e GL |
467 | spi->dev.bus = &spi_bus_type; |
468 | spi->dev.release = spidev_release; | |
446411e1 | 469 | spi->cs_gpio = -ENOENT; |
eca2ebc7 MS |
470 | |
471 | spin_lock_init(&spi->statistics.lock); | |
472 | ||
dc87c98e GL |
473 | device_initialize(&spi->dev); |
474 | return spi; | |
475 | } | |
476 | EXPORT_SYMBOL_GPL(spi_alloc_device); | |
477 | ||
e13ac47b JN |
478 | static void spi_dev_set_name(struct spi_device *spi) |
479 | { | |
480 | struct acpi_device *adev = ACPI_COMPANION(&spi->dev); | |
481 | ||
482 | if (adev) { | |
483 | dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev)); | |
484 | return; | |
485 | } | |
486 | ||
8caab75f | 487 | dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev), |
e13ac47b JN |
488 | spi->chip_select); |
489 | } | |
490 | ||
b6fb8d3a MW |
491 | static int spi_dev_check(struct device *dev, void *data) |
492 | { | |
493 | struct spi_device *spi = to_spi_device(dev); | |
494 | struct spi_device *new_spi = data; | |
495 | ||
8caab75f | 496 | if (spi->controller == new_spi->controller && |
b6fb8d3a MW |
497 | spi->chip_select == new_spi->chip_select) |
498 | return -EBUSY; | |
499 | return 0; | |
500 | } | |
501 | ||
dc87c98e GL |
502 | /** |
503 | * spi_add_device - Add spi_device allocated with spi_alloc_device | |
504 | * @spi: spi_device to register | |
505 | * | |
506 | * Companion function to spi_alloc_device. Devices allocated with | |
507 | * spi_alloc_device can be added onto the spi bus with this function. | |
508 | * | |
97d56dc6 | 509 | * Return: 0 on success; negative errno on failure |
dc87c98e GL |
510 | */ |
511 | int spi_add_device(struct spi_device *spi) | |
512 | { | |
e48880e0 | 513 | static DEFINE_MUTEX(spi_add_lock); |
8caab75f GU |
514 | struct spi_controller *ctlr = spi->controller; |
515 | struct device *dev = ctlr->dev.parent; | |
dc87c98e GL |
516 | int status; |
517 | ||
518 | /* Chipselects are numbered 0..max; validate. */ | |
8caab75f GU |
519 | if (spi->chip_select >= ctlr->num_chipselect) { |
520 | dev_err(dev, "cs%d >= max %d\n", spi->chip_select, | |
521 | ctlr->num_chipselect); | |
dc87c98e GL |
522 | return -EINVAL; |
523 | } | |
524 | ||
525 | /* Set the bus ID string */ | |
e13ac47b | 526 | spi_dev_set_name(spi); |
e48880e0 DB |
527 | |
528 | /* We need to make sure there's no other device with this | |
529 | * chipselect **BEFORE** we call setup(), else we'll trash | |
530 | * its configuration. Lock against concurrent add() calls. | |
531 | */ | |
532 | mutex_lock(&spi_add_lock); | |
533 | ||
b6fb8d3a MW |
534 | status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); |
535 | if (status) { | |
e48880e0 DB |
536 | dev_err(dev, "chipselect %d already in use\n", |
537 | spi->chip_select); | |
e48880e0 DB |
538 | goto done; |
539 | } | |
540 | ||
8caab75f GU |
541 | if (ctlr->cs_gpios) |
542 | spi->cs_gpio = ctlr->cs_gpios[spi->chip_select]; | |
74317984 | 543 | |
e48880e0 DB |
544 | /* Drivers may modify this initial i/o setup, but will |
545 | * normally rely on the device being setup. Devices | |
546 | * using SPI_CS_HIGH can't coexist well otherwise... | |
547 | */ | |
7d077197 | 548 | status = spi_setup(spi); |
dc87c98e | 549 | if (status < 0) { |
eb288a1f LW |
550 | dev_err(dev, "can't setup %s, status %d\n", |
551 | dev_name(&spi->dev), status); | |
e48880e0 | 552 | goto done; |
dc87c98e GL |
553 | } |
554 | ||
e48880e0 | 555 | /* Device may be bound to an active driver when this returns */ |
dc87c98e | 556 | status = device_add(&spi->dev); |
e48880e0 | 557 | if (status < 0) |
eb288a1f LW |
558 | dev_err(dev, "can't add %s, status %d\n", |
559 | dev_name(&spi->dev), status); | |
e48880e0 | 560 | else |
35f74fca | 561 | dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev)); |
dc87c98e | 562 | |
e48880e0 DB |
563 | done: |
564 | mutex_unlock(&spi_add_lock); | |
565 | return status; | |
dc87c98e GL |
566 | } |
567 | EXPORT_SYMBOL_GPL(spi_add_device); | |
8ae12a0d | 568 | |
33e34dc6 DB |
569 | /** |
570 | * spi_new_device - instantiate one new SPI device | |
8caab75f | 571 | * @ctlr: Controller to which device is connected |
33e34dc6 DB |
572 | * @chip: Describes the SPI device |
573 | * Context: can sleep | |
574 | * | |
575 | * On typical mainboards, this is purely internal; and it's not needed | |
8ae12a0d DB |
576 | * after board init creates the hard-wired devices. Some development |
577 | * platforms may not be able to use spi_register_board_info though, and | |
578 | * this is exported so that for example a USB or parport based adapter | |
579 | * driver could add devices (which it would learn about out-of-band). | |
082c8cb4 | 580 | * |
97d56dc6 | 581 | * Return: the new device, or NULL. |
8ae12a0d | 582 | */ |
8caab75f | 583 | struct spi_device *spi_new_device(struct spi_controller *ctlr, |
e9d5a461 | 584 | struct spi_board_info *chip) |
8ae12a0d DB |
585 | { |
586 | struct spi_device *proxy; | |
8ae12a0d DB |
587 | int status; |
588 | ||
082c8cb4 DB |
589 | /* NOTE: caller did any chip->bus_num checks necessary. |
590 | * | |
591 | * Also, unless we change the return value convention to use | |
592 | * error-or-pointer (not NULL-or-pointer), troubleshootability | |
593 | * suggests syslogged diagnostics are best here (ugh). | |
594 | */ | |
595 | ||
8caab75f | 596 | proxy = spi_alloc_device(ctlr); |
dc87c98e | 597 | if (!proxy) |
8ae12a0d DB |
598 | return NULL; |
599 | ||
102eb975 GL |
600 | WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); |
601 | ||
8ae12a0d DB |
602 | proxy->chip_select = chip->chip_select; |
603 | proxy->max_speed_hz = chip->max_speed_hz; | |
980a01c9 | 604 | proxy->mode = chip->mode; |
8ae12a0d | 605 | proxy->irq = chip->irq; |
102eb975 | 606 | strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); |
8ae12a0d DB |
607 | proxy->dev.platform_data = (void *) chip->platform_data; |
608 | proxy->controller_data = chip->controller_data; | |
609 | proxy->controller_state = NULL; | |
8ae12a0d | 610 | |
826cf175 DT |
611 | if (chip->properties) { |
612 | status = device_add_properties(&proxy->dev, chip->properties); | |
613 | if (status) { | |
8caab75f | 614 | dev_err(&ctlr->dev, |
826cf175 DT |
615 | "failed to add properties to '%s': %d\n", |
616 | chip->modalias, status); | |
617 | goto err_dev_put; | |
618 | } | |
8ae12a0d DB |
619 | } |
620 | ||
826cf175 DT |
621 | status = spi_add_device(proxy); |
622 | if (status < 0) | |
623 | goto err_remove_props; | |
624 | ||
8ae12a0d | 625 | return proxy; |
826cf175 DT |
626 | |
627 | err_remove_props: | |
628 | if (chip->properties) | |
629 | device_remove_properties(&proxy->dev); | |
630 | err_dev_put: | |
631 | spi_dev_put(proxy); | |
632 | return NULL; | |
8ae12a0d DB |
633 | } |
634 | EXPORT_SYMBOL_GPL(spi_new_device); | |
635 | ||
3b1884c2 GU |
636 | /** |
637 | * spi_unregister_device - unregister a single SPI device | |
638 | * @spi: spi_device to unregister | |
639 | * | |
640 | * Start making the passed SPI device vanish. Normally this would be handled | |
8caab75f | 641 | * by spi_unregister_controller(). |
3b1884c2 GU |
642 | */ |
643 | void spi_unregister_device(struct spi_device *spi) | |
644 | { | |
bd6c1644 GU |
645 | if (!spi) |
646 | return; | |
647 | ||
8324147f | 648 | if (spi->dev.of_node) { |
bd6c1644 | 649 | of_node_clear_flag(spi->dev.of_node, OF_POPULATED); |
8324147f JH |
650 | of_node_put(spi->dev.of_node); |
651 | } | |
7f24467f OP |
652 | if (ACPI_COMPANION(&spi->dev)) |
653 | acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev)); | |
bd6c1644 | 654 | device_unregister(&spi->dev); |
3b1884c2 GU |
655 | } |
656 | EXPORT_SYMBOL_GPL(spi_unregister_device); | |
657 | ||
8caab75f GU |
658 | static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr, |
659 | struct spi_board_info *bi) | |
2b9603a0 FT |
660 | { |
661 | struct spi_device *dev; | |
662 | ||
8caab75f | 663 | if (ctlr->bus_num != bi->bus_num) |
2b9603a0 FT |
664 | return; |
665 | ||
8caab75f | 666 | dev = spi_new_device(ctlr, bi); |
2b9603a0 | 667 | if (!dev) |
8caab75f | 668 | dev_err(ctlr->dev.parent, "can't create new device for %s\n", |
2b9603a0 FT |
669 | bi->modalias); |
670 | } | |
671 | ||
33e34dc6 DB |
672 | /** |
673 | * spi_register_board_info - register SPI devices for a given board | |
674 | * @info: array of chip descriptors | |
675 | * @n: how many descriptors are provided | |
676 | * Context: can sleep | |
677 | * | |
8ae12a0d DB |
678 | * Board-specific early init code calls this (probably during arch_initcall) |
679 | * with segments of the SPI device table. Any device nodes are created later, | |
680 | * after the relevant parent SPI controller (bus_num) is defined. We keep | |
681 | * this table of devices forever, so that reloading a controller driver will | |
682 | * not make Linux forget about these hard-wired devices. | |
683 | * | |
684 | * Other code can also call this, e.g. a particular add-on board might provide | |
685 | * SPI devices through its expansion connector, so code initializing that board | |
686 | * would naturally declare its SPI devices. | |
687 | * | |
688 | * The board info passed can safely be __initdata ... but be careful of | |
689 | * any embedded pointers (platform_data, etc), they're copied as-is. | |
826cf175 | 690 | * Device properties are deep-copied though. |
97d56dc6 JMC |
691 | * |
692 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 693 | */ |
fd4a319b | 694 | int spi_register_board_info(struct spi_board_info const *info, unsigned n) |
8ae12a0d | 695 | { |
2b9603a0 FT |
696 | struct boardinfo *bi; |
697 | int i; | |
8ae12a0d | 698 | |
c7908a37 | 699 | if (!n) |
f974cf57 | 700 | return 0; |
c7908a37 | 701 | |
f9bdb7fd | 702 | bi = kcalloc(n, sizeof(*bi), GFP_KERNEL); |
8ae12a0d DB |
703 | if (!bi) |
704 | return -ENOMEM; | |
8ae12a0d | 705 | |
2b9603a0 | 706 | for (i = 0; i < n; i++, bi++, info++) { |
8caab75f | 707 | struct spi_controller *ctlr; |
8ae12a0d | 708 | |
2b9603a0 | 709 | memcpy(&bi->board_info, info, sizeof(*info)); |
826cf175 DT |
710 | if (info->properties) { |
711 | bi->board_info.properties = | |
712 | property_entries_dup(info->properties); | |
713 | if (IS_ERR(bi->board_info.properties)) | |
714 | return PTR_ERR(bi->board_info.properties); | |
715 | } | |
716 | ||
2b9603a0 FT |
717 | mutex_lock(&board_lock); |
718 | list_add_tail(&bi->list, &board_list); | |
8caab75f GU |
719 | list_for_each_entry(ctlr, &spi_controller_list, list) |
720 | spi_match_controller_to_boardinfo(ctlr, | |
721 | &bi->board_info); | |
2b9603a0 | 722 | mutex_unlock(&board_lock); |
8ae12a0d | 723 | } |
2b9603a0 FT |
724 | |
725 | return 0; | |
8ae12a0d DB |
726 | } |
727 | ||
728 | /*-------------------------------------------------------------------------*/ | |
729 | ||
b158935f MB |
730 | static void spi_set_cs(struct spi_device *spi, bool enable) |
731 | { | |
732 | if (spi->mode & SPI_CS_HIGH) | |
733 | enable = !enable; | |
734 | ||
8eee6b9d | 735 | if (gpio_is_valid(spi->cs_gpio)) { |
b158935f | 736 | gpio_set_value(spi->cs_gpio, !enable); |
8eee6b9d | 737 | /* Some SPI masters need both GPIO CS & slave_select */ |
8caab75f GU |
738 | if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && |
739 | spi->controller->set_cs) | |
740 | spi->controller->set_cs(spi, !enable); | |
741 | } else if (spi->controller->set_cs) { | |
742 | spi->controller->set_cs(spi, !enable); | |
8eee6b9d | 743 | } |
b158935f MB |
744 | } |
745 | ||
2de440f5 | 746 | #ifdef CONFIG_HAS_DMA |
46336966 BB |
747 | int spi_map_buf(struct spi_controller *ctlr, struct device *dev, |
748 | struct sg_table *sgt, void *buf, size_t len, | |
749 | enum dma_data_direction dir) | |
6ad45a27 MB |
750 | { |
751 | const bool vmalloced_buf = is_vmalloc_addr(buf); | |
df88e91b | 752 | unsigned int max_seg_size = dma_get_max_seg_size(dev); |
b1b8153c V |
753 | #ifdef CONFIG_HIGHMEM |
754 | const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE && | |
755 | (unsigned long)buf < (PKMAP_BASE + | |
756 | (LAST_PKMAP * PAGE_SIZE))); | |
757 | #else | |
758 | const bool kmap_buf = false; | |
759 | #endif | |
65598c13 AG |
760 | int desc_len; |
761 | int sgs; | |
6ad45a27 | 762 | struct page *vm_page; |
8dd4a016 | 763 | struct scatterlist *sg; |
6ad45a27 MB |
764 | void *sg_buf; |
765 | size_t min; | |
766 | int i, ret; | |
767 | ||
b1b8153c | 768 | if (vmalloced_buf || kmap_buf) { |
df88e91b | 769 | desc_len = min_t(int, max_seg_size, PAGE_SIZE); |
65598c13 | 770 | sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len); |
0569a88f | 771 | } else if (virt_addr_valid(buf)) { |
8caab75f | 772 | desc_len = min_t(int, max_seg_size, ctlr->max_dma_len); |
65598c13 | 773 | sgs = DIV_ROUND_UP(len, desc_len); |
0569a88f V |
774 | } else { |
775 | return -EINVAL; | |
65598c13 AG |
776 | } |
777 | ||
6ad45a27 MB |
778 | ret = sg_alloc_table(sgt, sgs, GFP_KERNEL); |
779 | if (ret != 0) | |
780 | return ret; | |
781 | ||
8dd4a016 | 782 | sg = &sgt->sgl[0]; |
6ad45a27 | 783 | for (i = 0; i < sgs; i++) { |
6ad45a27 | 784 | |
b1b8153c | 785 | if (vmalloced_buf || kmap_buf) { |
ce99319a MC |
786 | /* |
787 | * Next scatterlist entry size is the minimum between | |
788 | * the desc_len and the remaining buffer length that | |
789 | * fits in a page. | |
790 | */ | |
791 | min = min_t(size_t, desc_len, | |
792 | min_t(size_t, len, | |
793 | PAGE_SIZE - offset_in_page(buf))); | |
b1b8153c V |
794 | if (vmalloced_buf) |
795 | vm_page = vmalloc_to_page(buf); | |
796 | else | |
797 | vm_page = kmap_to_page(buf); | |
6ad45a27 MB |
798 | if (!vm_page) { |
799 | sg_free_table(sgt); | |
800 | return -ENOMEM; | |
801 | } | |
8dd4a016 | 802 | sg_set_page(sg, vm_page, |
c1aefbdd | 803 | min, offset_in_page(buf)); |
6ad45a27 | 804 | } else { |
65598c13 | 805 | min = min_t(size_t, len, desc_len); |
6ad45a27 | 806 | sg_buf = buf; |
8dd4a016 | 807 | sg_set_buf(sg, sg_buf, min); |
6ad45a27 MB |
808 | } |
809 | ||
6ad45a27 MB |
810 | buf += min; |
811 | len -= min; | |
8dd4a016 | 812 | sg = sg_next(sg); |
6ad45a27 MB |
813 | } |
814 | ||
815 | ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | |
89e4b66a GU |
816 | if (!ret) |
817 | ret = -ENOMEM; | |
6ad45a27 MB |
818 | if (ret < 0) { |
819 | sg_free_table(sgt); | |
820 | return ret; | |
821 | } | |
822 | ||
823 | sgt->nents = ret; | |
824 | ||
825 | return 0; | |
826 | } | |
827 | ||
46336966 BB |
828 | void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev, |
829 | struct sg_table *sgt, enum dma_data_direction dir) | |
6ad45a27 MB |
830 | { |
831 | if (sgt->orig_nents) { | |
832 | dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir); | |
833 | sg_free_table(sgt); | |
834 | } | |
835 | } | |
836 | ||
8caab75f | 837 | static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 | 838 | { |
99adef31 MB |
839 | struct device *tx_dev, *rx_dev; |
840 | struct spi_transfer *xfer; | |
6ad45a27 | 841 | int ret; |
3a2eba9b | 842 | |
8caab75f | 843 | if (!ctlr->can_dma) |
99adef31 MB |
844 | return 0; |
845 | ||
8caab75f GU |
846 | if (ctlr->dma_tx) |
847 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 848 | else |
8caab75f | 849 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 850 | |
8caab75f GU |
851 | if (ctlr->dma_rx) |
852 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 853 | else |
8caab75f | 854 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
855 | |
856 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 857 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
858 | continue; |
859 | ||
860 | if (xfer->tx_buf != NULL) { | |
8caab75f | 861 | ret = spi_map_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
862 | (void *)xfer->tx_buf, xfer->len, |
863 | DMA_TO_DEVICE); | |
864 | if (ret != 0) | |
865 | return ret; | |
99adef31 MB |
866 | } |
867 | ||
868 | if (xfer->rx_buf != NULL) { | |
8caab75f | 869 | ret = spi_map_buf(ctlr, rx_dev, &xfer->rx_sg, |
6ad45a27 MB |
870 | xfer->rx_buf, xfer->len, |
871 | DMA_FROM_DEVICE); | |
872 | if (ret != 0) { | |
8caab75f | 873 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, |
6ad45a27 MB |
874 | DMA_TO_DEVICE); |
875 | return ret; | |
99adef31 MB |
876 | } |
877 | } | |
878 | } | |
879 | ||
8caab75f | 880 | ctlr->cur_msg_mapped = true; |
99adef31 MB |
881 | |
882 | return 0; | |
883 | } | |
884 | ||
8caab75f | 885 | static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg) |
99adef31 MB |
886 | { |
887 | struct spi_transfer *xfer; | |
888 | struct device *tx_dev, *rx_dev; | |
889 | ||
8caab75f | 890 | if (!ctlr->cur_msg_mapped || !ctlr->can_dma) |
99adef31 MB |
891 | return 0; |
892 | ||
8caab75f GU |
893 | if (ctlr->dma_tx) |
894 | tx_dev = ctlr->dma_tx->device->dev; | |
c37f45b5 | 895 | else |
8caab75f | 896 | tx_dev = ctlr->dev.parent; |
c37f45b5 | 897 | |
8caab75f GU |
898 | if (ctlr->dma_rx) |
899 | rx_dev = ctlr->dma_rx->device->dev; | |
c37f45b5 | 900 | else |
8caab75f | 901 | rx_dev = ctlr->dev.parent; |
99adef31 MB |
902 | |
903 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 904 | if (!ctlr->can_dma(ctlr, msg->spi, xfer)) |
99adef31 MB |
905 | continue; |
906 | ||
8caab75f GU |
907 | spi_unmap_buf(ctlr, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE); |
908 | spi_unmap_buf(ctlr, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE); | |
99adef31 MB |
909 | } |
910 | ||
911 | return 0; | |
912 | } | |
2de440f5 | 913 | #else /* !CONFIG_HAS_DMA */ |
8caab75f | 914 | static inline int __spi_map_msg(struct spi_controller *ctlr, |
2de440f5 GU |
915 | struct spi_message *msg) |
916 | { | |
917 | return 0; | |
918 | } | |
919 | ||
8caab75f | 920 | static inline int __spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 | 921 | struct spi_message *msg) |
2de440f5 GU |
922 | { |
923 | return 0; | |
924 | } | |
925 | #endif /* !CONFIG_HAS_DMA */ | |
926 | ||
8caab75f | 927 | static inline int spi_unmap_msg(struct spi_controller *ctlr, |
4b786458 MS |
928 | struct spi_message *msg) |
929 | { | |
930 | struct spi_transfer *xfer; | |
931 | ||
932 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
933 | /* | |
934 | * Restore the original value of tx_buf or rx_buf if they are | |
935 | * NULL. | |
936 | */ | |
8caab75f | 937 | if (xfer->tx_buf == ctlr->dummy_tx) |
4b786458 | 938 | xfer->tx_buf = NULL; |
8caab75f | 939 | if (xfer->rx_buf == ctlr->dummy_rx) |
4b786458 MS |
940 | xfer->rx_buf = NULL; |
941 | } | |
942 | ||
8caab75f | 943 | return __spi_unmap_msg(ctlr, msg); |
4b786458 MS |
944 | } |
945 | ||
8caab75f | 946 | static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg) |
2de440f5 GU |
947 | { |
948 | struct spi_transfer *xfer; | |
949 | void *tmp; | |
950 | unsigned int max_tx, max_rx; | |
951 | ||
8caab75f | 952 | if (ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX)) { |
2de440f5 GU |
953 | max_tx = 0; |
954 | max_rx = 0; | |
955 | ||
956 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
8caab75f | 957 | if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) && |
2de440f5 GU |
958 | !xfer->tx_buf) |
959 | max_tx = max(xfer->len, max_tx); | |
8caab75f | 960 | if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) && |
2de440f5 GU |
961 | !xfer->rx_buf) |
962 | max_rx = max(xfer->len, max_rx); | |
963 | } | |
964 | ||
965 | if (max_tx) { | |
8caab75f | 966 | tmp = krealloc(ctlr->dummy_tx, max_tx, |
2de440f5 GU |
967 | GFP_KERNEL | GFP_DMA); |
968 | if (!tmp) | |
969 | return -ENOMEM; | |
8caab75f | 970 | ctlr->dummy_tx = tmp; |
2de440f5 GU |
971 | memset(tmp, 0, max_tx); |
972 | } | |
973 | ||
974 | if (max_rx) { | |
8caab75f | 975 | tmp = krealloc(ctlr->dummy_rx, max_rx, |
2de440f5 GU |
976 | GFP_KERNEL | GFP_DMA); |
977 | if (!tmp) | |
978 | return -ENOMEM; | |
8caab75f | 979 | ctlr->dummy_rx = tmp; |
2de440f5 GU |
980 | } |
981 | ||
982 | if (max_tx || max_rx) { | |
983 | list_for_each_entry(xfer, &msg->transfers, | |
984 | transfer_list) { | |
985 | if (!xfer->tx_buf) | |
8caab75f | 986 | xfer->tx_buf = ctlr->dummy_tx; |
2de440f5 | 987 | if (!xfer->rx_buf) |
8caab75f | 988 | xfer->rx_buf = ctlr->dummy_rx; |
2de440f5 GU |
989 | } |
990 | } | |
991 | } | |
992 | ||
8caab75f | 993 | return __spi_map_msg(ctlr, msg); |
2de440f5 | 994 | } |
99adef31 | 995 | |
b158935f MB |
996 | /* |
997 | * spi_transfer_one_message - Default implementation of transfer_one_message() | |
998 | * | |
999 | * This is a standard implementation of transfer_one_message() for | |
8ba811a7 | 1000 | * drivers which implement a transfer_one() operation. It provides |
b158935f MB |
1001 | * standard handling of delays and chip select management. |
1002 | */ | |
8caab75f | 1003 | static int spi_transfer_one_message(struct spi_controller *ctlr, |
b158935f MB |
1004 | struct spi_message *msg) |
1005 | { | |
1006 | struct spi_transfer *xfer; | |
b158935f MB |
1007 | bool keep_cs = false; |
1008 | int ret = 0; | |
d0716dde | 1009 | unsigned long long ms = 1; |
8caab75f | 1010 | struct spi_statistics *statm = &ctlr->statistics; |
eca2ebc7 | 1011 | struct spi_statistics *stats = &msg->spi->statistics; |
b158935f MB |
1012 | |
1013 | spi_set_cs(msg->spi, true); | |
1014 | ||
eca2ebc7 MS |
1015 | SPI_STATISTICS_INCREMENT_FIELD(statm, messages); |
1016 | SPI_STATISTICS_INCREMENT_FIELD(stats, messages); | |
1017 | ||
b158935f MB |
1018 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { |
1019 | trace_spi_transfer_start(msg, xfer); | |
1020 | ||
8caab75f GU |
1021 | spi_statistics_add_transfer_stats(statm, xfer, ctlr); |
1022 | spi_statistics_add_transfer_stats(stats, xfer, ctlr); | |
eca2ebc7 | 1023 | |
38ec10f6 | 1024 | if (xfer->tx_buf || xfer->rx_buf) { |
8caab75f | 1025 | reinit_completion(&ctlr->xfer_completion); |
b158935f | 1026 | |
8caab75f | 1027 | ret = ctlr->transfer_one(ctlr, msg->spi, xfer); |
38ec10f6 | 1028 | if (ret < 0) { |
eca2ebc7 MS |
1029 | SPI_STATISTICS_INCREMENT_FIELD(statm, |
1030 | errors); | |
1031 | SPI_STATISTICS_INCREMENT_FIELD(stats, | |
1032 | errors); | |
38ec10f6 MB |
1033 | dev_err(&msg->spi->dev, |
1034 | "SPI transfer failed: %d\n", ret); | |
1035 | goto out; | |
1036 | } | |
b158935f | 1037 | |
38ec10f6 MB |
1038 | if (ret > 0) { |
1039 | ret = 0; | |
d0716dde SW |
1040 | ms = 8LL * 1000LL * xfer->len; |
1041 | do_div(ms, xfer->speed_hz); | |
833bfade | 1042 | ms += ms + 200; /* some tolerance */ |
16a0ce4e | 1043 | |
d0716dde SW |
1044 | if (ms > UINT_MAX) |
1045 | ms = UINT_MAX; | |
1046 | ||
8caab75f | 1047 | ms = wait_for_completion_timeout(&ctlr->xfer_completion, |
38ec10f6 MB |
1048 | msecs_to_jiffies(ms)); |
1049 | } | |
16a0ce4e | 1050 | |
38ec10f6 | 1051 | if (ms == 0) { |
eca2ebc7 MS |
1052 | SPI_STATISTICS_INCREMENT_FIELD(statm, |
1053 | timedout); | |
1054 | SPI_STATISTICS_INCREMENT_FIELD(stats, | |
1055 | timedout); | |
38ec10f6 MB |
1056 | dev_err(&msg->spi->dev, |
1057 | "SPI transfer timed out\n"); | |
1058 | msg->status = -ETIMEDOUT; | |
1059 | } | |
1060 | } else { | |
1061 | if (xfer->len) | |
1062 | dev_err(&msg->spi->dev, | |
1063 | "Bufferless transfer has length %u\n", | |
1064 | xfer->len); | |
13a42798 | 1065 | } |
b158935f MB |
1066 | |
1067 | trace_spi_transfer_stop(msg, xfer); | |
1068 | ||
1069 | if (msg->status != -EINPROGRESS) | |
1070 | goto out; | |
1071 | ||
8244bd3a DK |
1072 | if (xfer->delay_usecs) { |
1073 | u16 us = xfer->delay_usecs; | |
1074 | ||
1075 | if (us <= 10) | |
1076 | udelay(us); | |
1077 | else | |
1078 | usleep_range(us, us + DIV_ROUND_UP(us, 10)); | |
1079 | } | |
b158935f MB |
1080 | |
1081 | if (xfer->cs_change) { | |
1082 | if (list_is_last(&xfer->transfer_list, | |
1083 | &msg->transfers)) { | |
1084 | keep_cs = true; | |
1085 | } else { | |
0b73aa63 MB |
1086 | spi_set_cs(msg->spi, false); |
1087 | udelay(10); | |
1088 | spi_set_cs(msg->spi, true); | |
b158935f MB |
1089 | } |
1090 | } | |
1091 | ||
1092 | msg->actual_length += xfer->len; | |
1093 | } | |
1094 | ||
1095 | out: | |
1096 | if (ret != 0 || !keep_cs) | |
1097 | spi_set_cs(msg->spi, false); | |
1098 | ||
1099 | if (msg->status == -EINPROGRESS) | |
1100 | msg->status = ret; | |
1101 | ||
8caab75f GU |
1102 | if (msg->status && ctlr->handle_err) |
1103 | ctlr->handle_err(ctlr, msg); | |
b716c4ff | 1104 | |
8caab75f | 1105 | spi_res_release(ctlr, msg); |
d780c371 | 1106 | |
8caab75f | 1107 | spi_finalize_current_message(ctlr); |
b158935f MB |
1108 | |
1109 | return ret; | |
1110 | } | |
1111 | ||
1112 | /** | |
1113 | * spi_finalize_current_transfer - report completion of a transfer | |
8caab75f | 1114 | * @ctlr: the controller reporting completion |
b158935f MB |
1115 | * |
1116 | * Called by SPI drivers using the core transfer_one_message() | |
1117 | * implementation to notify it that the current interrupt driven | |
9e8f4882 | 1118 | * transfer has finished and the next one may be scheduled. |
b158935f | 1119 | */ |
8caab75f | 1120 | void spi_finalize_current_transfer(struct spi_controller *ctlr) |
b158935f | 1121 | { |
8caab75f | 1122 | complete(&ctlr->xfer_completion); |
b158935f MB |
1123 | } |
1124 | EXPORT_SYMBOL_GPL(spi_finalize_current_transfer); | |
1125 | ||
ffbbdd21 | 1126 | /** |
fc9e0f71 | 1127 | * __spi_pump_messages - function which processes spi message queue |
8caab75f | 1128 | * @ctlr: controller to process queue for |
fc9e0f71 | 1129 | * @in_kthread: true if we are in the context of the message pump thread |
ffbbdd21 LW |
1130 | * |
1131 | * This function checks if there is any spi message in the queue that | |
1132 | * needs processing and if so call out to the driver to initialize hardware | |
1133 | * and transfer each message. | |
1134 | * | |
0461a414 MB |
1135 | * Note that it is called both from the kthread itself and also from |
1136 | * inside spi_sync(); the queue extraction handling at the top of the | |
1137 | * function should deal with this safely. | |
ffbbdd21 | 1138 | */ |
8caab75f | 1139 | static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread) |
ffbbdd21 | 1140 | { |
ffbbdd21 LW |
1141 | unsigned long flags; |
1142 | bool was_busy = false; | |
1143 | int ret; | |
1144 | ||
983aee5d | 1145 | /* Lock queue */ |
8caab75f | 1146 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
983aee5d MB |
1147 | |
1148 | /* Make sure we are not already running a message */ | |
8caab75f GU |
1149 | if (ctlr->cur_msg) { |
1150 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
983aee5d MB |
1151 | return; |
1152 | } | |
1153 | ||
0461a414 | 1154 | /* If another context is idling the device then defer */ |
8caab75f GU |
1155 | if (ctlr->idling) { |
1156 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
1157 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
0461a414 MB |
1158 | return; |
1159 | } | |
1160 | ||
983aee5d | 1161 | /* Check if the queue is idle */ |
8caab75f GU |
1162 | if (list_empty(&ctlr->queue) || !ctlr->running) { |
1163 | if (!ctlr->busy) { | |
1164 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
b0b36b86 | 1165 | return; |
ffbbdd21 | 1166 | } |
fc9e0f71 MB |
1167 | |
1168 | /* Only do teardown in the thread */ | |
1169 | if (!in_kthread) { | |
8caab75f GU |
1170 | kthread_queue_work(&ctlr->kworker, |
1171 | &ctlr->pump_messages); | |
1172 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
fc9e0f71 MB |
1173 | return; |
1174 | } | |
1175 | ||
8caab75f GU |
1176 | ctlr->busy = false; |
1177 | ctlr->idling = true; | |
1178 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
1179 | ||
1180 | kfree(ctlr->dummy_rx); | |
1181 | ctlr->dummy_rx = NULL; | |
1182 | kfree(ctlr->dummy_tx); | |
1183 | ctlr->dummy_tx = NULL; | |
1184 | if (ctlr->unprepare_transfer_hardware && | |
1185 | ctlr->unprepare_transfer_hardware(ctlr)) | |
1186 | dev_err(&ctlr->dev, | |
b0b36b86 | 1187 | "failed to unprepare transfer hardware\n"); |
8caab75f GU |
1188 | if (ctlr->auto_runtime_pm) { |
1189 | pm_runtime_mark_last_busy(ctlr->dev.parent); | |
1190 | pm_runtime_put_autosuspend(ctlr->dev.parent); | |
49834de2 | 1191 | } |
8caab75f | 1192 | trace_spi_controller_idle(ctlr); |
ffbbdd21 | 1193 | |
8caab75f GU |
1194 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1195 | ctlr->idling = false; | |
1196 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1197 | return; |
1198 | } | |
ffbbdd21 | 1199 | |
ffbbdd21 | 1200 | /* Extract head of queue */ |
8caab75f GU |
1201 | ctlr->cur_msg = |
1202 | list_first_entry(&ctlr->queue, struct spi_message, queue); | |
ffbbdd21 | 1203 | |
8caab75f GU |
1204 | list_del_init(&ctlr->cur_msg->queue); |
1205 | if (ctlr->busy) | |
ffbbdd21 LW |
1206 | was_busy = true; |
1207 | else | |
8caab75f GU |
1208 | ctlr->busy = true; |
1209 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1210 | |
8caab75f | 1211 | mutex_lock(&ctlr->io_mutex); |
ef4d96ec | 1212 | |
8caab75f GU |
1213 | if (!was_busy && ctlr->auto_runtime_pm) { |
1214 | ret = pm_runtime_get_sync(ctlr->dev.parent); | |
49834de2 | 1215 | if (ret < 0) { |
7e48e23a | 1216 | pm_runtime_put_noidle(ctlr->dev.parent); |
8caab75f | 1217 | dev_err(&ctlr->dev, "Failed to power device: %d\n", |
49834de2 | 1218 | ret); |
8caab75f | 1219 | mutex_unlock(&ctlr->io_mutex); |
49834de2 MB |
1220 | return; |
1221 | } | |
1222 | } | |
1223 | ||
56ec1978 | 1224 | if (!was_busy) |
8caab75f | 1225 | trace_spi_controller_busy(ctlr); |
56ec1978 | 1226 | |
8caab75f GU |
1227 | if (!was_busy && ctlr->prepare_transfer_hardware) { |
1228 | ret = ctlr->prepare_transfer_hardware(ctlr); | |
ffbbdd21 | 1229 | if (ret) { |
8caab75f | 1230 | dev_err(&ctlr->dev, |
ffbbdd21 | 1231 | "failed to prepare transfer hardware\n"); |
49834de2 | 1232 | |
8caab75f GU |
1233 | if (ctlr->auto_runtime_pm) |
1234 | pm_runtime_put(ctlr->dev.parent); | |
1235 | mutex_unlock(&ctlr->io_mutex); | |
ffbbdd21 LW |
1236 | return; |
1237 | } | |
1238 | } | |
1239 | ||
8caab75f | 1240 | trace_spi_message_start(ctlr->cur_msg); |
56ec1978 | 1241 | |
8caab75f GU |
1242 | if (ctlr->prepare_message) { |
1243 | ret = ctlr->prepare_message(ctlr, ctlr->cur_msg); | |
2841a5fc | 1244 | if (ret) { |
8caab75f GU |
1245 | dev_err(&ctlr->dev, "failed to prepare message: %d\n", |
1246 | ret); | |
1247 | ctlr->cur_msg->status = ret; | |
1248 | spi_finalize_current_message(ctlr); | |
49023d2e | 1249 | goto out; |
2841a5fc | 1250 | } |
8caab75f | 1251 | ctlr->cur_msg_prepared = true; |
2841a5fc MB |
1252 | } |
1253 | ||
8caab75f | 1254 | ret = spi_map_msg(ctlr, ctlr->cur_msg); |
99adef31 | 1255 | if (ret) { |
8caab75f GU |
1256 | ctlr->cur_msg->status = ret; |
1257 | spi_finalize_current_message(ctlr); | |
49023d2e | 1258 | goto out; |
99adef31 MB |
1259 | } |
1260 | ||
8caab75f | 1261 | ret = ctlr->transfer_one_message(ctlr, ctlr->cur_msg); |
ffbbdd21 | 1262 | if (ret) { |
8caab75f | 1263 | dev_err(&ctlr->dev, |
1f802f82 | 1264 | "failed to transfer one message from queue\n"); |
49023d2e | 1265 | goto out; |
ffbbdd21 | 1266 | } |
49023d2e JH |
1267 | |
1268 | out: | |
8caab75f | 1269 | mutex_unlock(&ctlr->io_mutex); |
62826970 MB |
1270 | |
1271 | /* Prod the scheduler in case transfer_one() was busy waiting */ | |
49023d2e JH |
1272 | if (!ret) |
1273 | cond_resched(); | |
ffbbdd21 LW |
1274 | } |
1275 | ||
fc9e0f71 MB |
1276 | /** |
1277 | * spi_pump_messages - kthread work function which processes spi message queue | |
8caab75f | 1278 | * @work: pointer to kthread work struct contained in the controller struct |
fc9e0f71 MB |
1279 | */ |
1280 | static void spi_pump_messages(struct kthread_work *work) | |
1281 | { | |
8caab75f GU |
1282 | struct spi_controller *ctlr = |
1283 | container_of(work, struct spi_controller, pump_messages); | |
fc9e0f71 | 1284 | |
8caab75f | 1285 | __spi_pump_messages(ctlr, true); |
fc9e0f71 MB |
1286 | } |
1287 | ||
8caab75f | 1288 | static int spi_init_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1289 | { |
1290 | struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; | |
1291 | ||
8caab75f GU |
1292 | ctlr->running = false; |
1293 | ctlr->busy = false; | |
ffbbdd21 | 1294 | |
8caab75f GU |
1295 | kthread_init_worker(&ctlr->kworker); |
1296 | ctlr->kworker_task = kthread_run(kthread_worker_fn, &ctlr->kworker, | |
1297 | "%s", dev_name(&ctlr->dev)); | |
1298 | if (IS_ERR(ctlr->kworker_task)) { | |
1299 | dev_err(&ctlr->dev, "failed to create message pump task\n"); | |
1300 | return PTR_ERR(ctlr->kworker_task); | |
ffbbdd21 | 1301 | } |
8caab75f | 1302 | kthread_init_work(&ctlr->pump_messages, spi_pump_messages); |
ffbbdd21 LW |
1303 | |
1304 | /* | |
8caab75f | 1305 | * Controller config will indicate if this controller should run the |
ffbbdd21 LW |
1306 | * message pump with high (realtime) priority to reduce the transfer |
1307 | * latency on the bus by minimising the delay between a transfer | |
1308 | * request and the scheduling of the message pump thread. Without this | |
1309 | * setting the message pump thread will remain at default priority. | |
1310 | */ | |
8caab75f GU |
1311 | if (ctlr->rt) { |
1312 | dev_info(&ctlr->dev, | |
ffbbdd21 | 1313 | "will run message pump with realtime priority\n"); |
8caab75f | 1314 | sched_setscheduler(ctlr->kworker_task, SCHED_FIFO, ¶m); |
ffbbdd21 LW |
1315 | } |
1316 | ||
1317 | return 0; | |
1318 | } | |
1319 | ||
1320 | /** | |
1321 | * spi_get_next_queued_message() - called by driver to check for queued | |
1322 | * messages | |
8caab75f | 1323 | * @ctlr: the controller to check for queued messages |
ffbbdd21 LW |
1324 | * |
1325 | * If there are more messages in the queue, the next message is returned from | |
1326 | * this call. | |
97d56dc6 JMC |
1327 | * |
1328 | * Return: the next message in the queue, else NULL if the queue is empty. | |
ffbbdd21 | 1329 | */ |
8caab75f | 1330 | struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1331 | { |
1332 | struct spi_message *next; | |
1333 | unsigned long flags; | |
1334 | ||
1335 | /* get a pointer to the next message, if any */ | |
8caab75f GU |
1336 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1337 | next = list_first_entry_or_null(&ctlr->queue, struct spi_message, | |
1cfd97f9 | 1338 | queue); |
8caab75f | 1339 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1340 | |
1341 | return next; | |
1342 | } | |
1343 | EXPORT_SYMBOL_GPL(spi_get_next_queued_message); | |
1344 | ||
1345 | /** | |
1346 | * spi_finalize_current_message() - the current message is complete | |
8caab75f | 1347 | * @ctlr: the controller to return the message to |
ffbbdd21 LW |
1348 | * |
1349 | * Called by the driver to notify the core that the message in the front of the | |
1350 | * queue is complete and can be removed from the queue. | |
1351 | */ | |
8caab75f | 1352 | void spi_finalize_current_message(struct spi_controller *ctlr) |
ffbbdd21 LW |
1353 | { |
1354 | struct spi_message *mesg; | |
1355 | unsigned long flags; | |
2841a5fc | 1356 | int ret; |
ffbbdd21 | 1357 | |
8caab75f GU |
1358 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1359 | mesg = ctlr->cur_msg; | |
1360 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1361 | |
8caab75f | 1362 | spi_unmap_msg(ctlr, mesg); |
99adef31 | 1363 | |
8caab75f GU |
1364 | if (ctlr->cur_msg_prepared && ctlr->unprepare_message) { |
1365 | ret = ctlr->unprepare_message(ctlr, mesg); | |
2841a5fc | 1366 | if (ret) { |
8caab75f GU |
1367 | dev_err(&ctlr->dev, "failed to unprepare message: %d\n", |
1368 | ret); | |
2841a5fc MB |
1369 | } |
1370 | } | |
391949b6 | 1371 | |
8caab75f GU |
1372 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
1373 | ctlr->cur_msg = NULL; | |
1374 | ctlr->cur_msg_prepared = false; | |
1375 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
1376 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
8e76ef88 MS |
1377 | |
1378 | trace_spi_message_done(mesg); | |
2841a5fc | 1379 | |
ffbbdd21 LW |
1380 | mesg->state = NULL; |
1381 | if (mesg->complete) | |
1382 | mesg->complete(mesg->context); | |
1383 | } | |
1384 | EXPORT_SYMBOL_GPL(spi_finalize_current_message); | |
1385 | ||
8caab75f | 1386 | static int spi_start_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1387 | { |
1388 | unsigned long flags; | |
1389 | ||
8caab75f | 1390 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1391 | |
8caab75f GU |
1392 | if (ctlr->running || ctlr->busy) { |
1393 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1394 | return -EBUSY; |
1395 | } | |
1396 | ||
8caab75f GU |
1397 | ctlr->running = true; |
1398 | ctlr->cur_msg = NULL; | |
1399 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 | 1400 | |
8caab75f | 1401 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); |
ffbbdd21 LW |
1402 | |
1403 | return 0; | |
1404 | } | |
1405 | ||
8caab75f | 1406 | static int spi_stop_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1407 | { |
1408 | unsigned long flags; | |
1409 | unsigned limit = 500; | |
1410 | int ret = 0; | |
1411 | ||
8caab75f | 1412 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1413 | |
1414 | /* | |
1415 | * This is a bit lame, but is optimized for the common execution path. | |
8caab75f | 1416 | * A wait_queue on the ctlr->busy could be used, but then the common |
ffbbdd21 LW |
1417 | * execution path (pump_messages) would be required to call wake_up or |
1418 | * friends on every SPI message. Do this instead. | |
1419 | */ | |
8caab75f GU |
1420 | while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) { |
1421 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
f97b26b0 | 1422 | usleep_range(10000, 11000); |
8caab75f | 1423 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1424 | } |
1425 | ||
8caab75f | 1426 | if (!list_empty(&ctlr->queue) || ctlr->busy) |
ffbbdd21 LW |
1427 | ret = -EBUSY; |
1428 | else | |
8caab75f | 1429 | ctlr->running = false; |
ffbbdd21 | 1430 | |
8caab75f | 1431 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1432 | |
1433 | if (ret) { | |
8caab75f | 1434 | dev_warn(&ctlr->dev, "could not stop message queue\n"); |
ffbbdd21 LW |
1435 | return ret; |
1436 | } | |
1437 | return ret; | |
1438 | } | |
1439 | ||
8caab75f | 1440 | static int spi_destroy_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1441 | { |
1442 | int ret; | |
1443 | ||
8caab75f | 1444 | ret = spi_stop_queue(ctlr); |
ffbbdd21 LW |
1445 | |
1446 | /* | |
3989144f | 1447 | * kthread_flush_worker will block until all work is done. |
ffbbdd21 LW |
1448 | * If the reason that stop_queue timed out is that the work will never |
1449 | * finish, then it does no good to call flush/stop thread, so | |
1450 | * return anyway. | |
1451 | */ | |
1452 | if (ret) { | |
8caab75f | 1453 | dev_err(&ctlr->dev, "problem destroying queue\n"); |
ffbbdd21 LW |
1454 | return ret; |
1455 | } | |
1456 | ||
8caab75f GU |
1457 | kthread_flush_worker(&ctlr->kworker); |
1458 | kthread_stop(ctlr->kworker_task); | |
ffbbdd21 LW |
1459 | |
1460 | return 0; | |
1461 | } | |
1462 | ||
0461a414 MB |
1463 | static int __spi_queued_transfer(struct spi_device *spi, |
1464 | struct spi_message *msg, | |
1465 | bool need_pump) | |
ffbbdd21 | 1466 | { |
8caab75f | 1467 | struct spi_controller *ctlr = spi->controller; |
ffbbdd21 LW |
1468 | unsigned long flags; |
1469 | ||
8caab75f | 1470 | spin_lock_irqsave(&ctlr->queue_lock, flags); |
ffbbdd21 | 1471 | |
8caab75f GU |
1472 | if (!ctlr->running) { |
1473 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); | |
ffbbdd21 LW |
1474 | return -ESHUTDOWN; |
1475 | } | |
1476 | msg->actual_length = 0; | |
1477 | msg->status = -EINPROGRESS; | |
1478 | ||
8caab75f GU |
1479 | list_add_tail(&msg->queue, &ctlr->queue); |
1480 | if (!ctlr->busy && need_pump) | |
1481 | kthread_queue_work(&ctlr->kworker, &ctlr->pump_messages); | |
ffbbdd21 | 1482 | |
8caab75f | 1483 | spin_unlock_irqrestore(&ctlr->queue_lock, flags); |
ffbbdd21 LW |
1484 | return 0; |
1485 | } | |
1486 | ||
0461a414 MB |
1487 | /** |
1488 | * spi_queued_transfer - transfer function for queued transfers | |
1489 | * @spi: spi device which is requesting transfer | |
1490 | * @msg: spi message which is to handled is queued to driver queue | |
97d56dc6 JMC |
1491 | * |
1492 | * Return: zero on success, else a negative error code. | |
0461a414 MB |
1493 | */ |
1494 | static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg) | |
1495 | { | |
1496 | return __spi_queued_transfer(spi, msg, true); | |
1497 | } | |
1498 | ||
8caab75f | 1499 | static int spi_controller_initialize_queue(struct spi_controller *ctlr) |
ffbbdd21 LW |
1500 | { |
1501 | int ret; | |
1502 | ||
8caab75f GU |
1503 | ctlr->transfer = spi_queued_transfer; |
1504 | if (!ctlr->transfer_one_message) | |
1505 | ctlr->transfer_one_message = spi_transfer_one_message; | |
ffbbdd21 LW |
1506 | |
1507 | /* Initialize and start queue */ | |
8caab75f | 1508 | ret = spi_init_queue(ctlr); |
ffbbdd21 | 1509 | if (ret) { |
8caab75f | 1510 | dev_err(&ctlr->dev, "problem initializing queue\n"); |
ffbbdd21 LW |
1511 | goto err_init_queue; |
1512 | } | |
8caab75f GU |
1513 | ctlr->queued = true; |
1514 | ret = spi_start_queue(ctlr); | |
ffbbdd21 | 1515 | if (ret) { |
8caab75f | 1516 | dev_err(&ctlr->dev, "problem starting queue\n"); |
ffbbdd21 LW |
1517 | goto err_start_queue; |
1518 | } | |
1519 | ||
1520 | return 0; | |
1521 | ||
1522 | err_start_queue: | |
8caab75f | 1523 | spi_destroy_queue(ctlr); |
c3676d5c | 1524 | err_init_queue: |
ffbbdd21 LW |
1525 | return ret; |
1526 | } | |
1527 | ||
988f259b BB |
1528 | /** |
1529 | * spi_flush_queue - Send all pending messages in the queue from the callers' | |
1530 | * context | |
1531 | * @ctlr: controller to process queue for | |
1532 | * | |
1533 | * This should be used when one wants to ensure all pending messages have been | |
1534 | * sent before doing something. Is used by the spi-mem code to make sure SPI | |
1535 | * memory operations do not preempt regular SPI transfers that have been queued | |
1536 | * before the spi-mem operation. | |
1537 | */ | |
1538 | void spi_flush_queue(struct spi_controller *ctlr) | |
1539 | { | |
1540 | if (ctlr->transfer == spi_queued_transfer) | |
1541 | __spi_pump_messages(ctlr, false); | |
1542 | } | |
1543 | ||
ffbbdd21 LW |
1544 | /*-------------------------------------------------------------------------*/ |
1545 | ||
7cb94361 | 1546 | #if defined(CONFIG_OF) |
8caab75f | 1547 | static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, |
c2e51ac3 | 1548 | struct device_node *nc) |
aff5e3f8 | 1549 | { |
aff5e3f8 | 1550 | u32 value; |
c2e51ac3 | 1551 | int rc; |
aff5e3f8 | 1552 | |
aff5e3f8 | 1553 | /* Mode (clock phase/polarity/etc.) */ |
e0bcb680 | 1554 | if (of_property_read_bool(nc, "spi-cpha")) |
aff5e3f8 | 1555 | spi->mode |= SPI_CPHA; |
e0bcb680 | 1556 | if (of_property_read_bool(nc, "spi-cpol")) |
aff5e3f8 | 1557 | spi->mode |= SPI_CPOL; |
e0bcb680 | 1558 | if (of_property_read_bool(nc, "spi-cs-high")) |
aff5e3f8 | 1559 | spi->mode |= SPI_CS_HIGH; |
e0bcb680 | 1560 | if (of_property_read_bool(nc, "spi-3wire")) |
aff5e3f8 | 1561 | spi->mode |= SPI_3WIRE; |
e0bcb680 | 1562 | if (of_property_read_bool(nc, "spi-lsb-first")) |
aff5e3f8 PA |
1563 | spi->mode |= SPI_LSB_FIRST; |
1564 | ||
1565 | /* Device DUAL/QUAD mode */ | |
1566 | if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { | |
1567 | switch (value) { | |
1568 | case 1: | |
1569 | break; | |
1570 | case 2: | |
1571 | spi->mode |= SPI_TX_DUAL; | |
1572 | break; | |
1573 | case 4: | |
1574 | spi->mode |= SPI_TX_QUAD; | |
1575 | break; | |
1576 | default: | |
8caab75f | 1577 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1578 | "spi-tx-bus-width %d not supported\n", |
1579 | value); | |
1580 | break; | |
1581 | } | |
1582 | } | |
1583 | ||
1584 | if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) { | |
1585 | switch (value) { | |
1586 | case 1: | |
1587 | break; | |
1588 | case 2: | |
1589 | spi->mode |= SPI_RX_DUAL; | |
1590 | break; | |
1591 | case 4: | |
1592 | spi->mode |= SPI_RX_QUAD; | |
1593 | break; | |
1594 | default: | |
8caab75f | 1595 | dev_warn(&ctlr->dev, |
aff5e3f8 PA |
1596 | "spi-rx-bus-width %d not supported\n", |
1597 | value); | |
1598 | break; | |
1599 | } | |
1600 | } | |
1601 | ||
8caab75f | 1602 | if (spi_controller_is_slave(ctlr)) { |
6c364062 | 1603 | if (strcmp(nc->name, "slave")) { |
25c56c88 RH |
1604 | dev_err(&ctlr->dev, "%pOF is not called 'slave'\n", |
1605 | nc); | |
6c364062 GU |
1606 | return -EINVAL; |
1607 | } | |
1608 | return 0; | |
1609 | } | |
1610 | ||
1611 | /* Device address */ | |
1612 | rc = of_property_read_u32(nc, "reg", &value); | |
1613 | if (rc) { | |
25c56c88 RH |
1614 | dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n", |
1615 | nc, rc); | |
6c364062 GU |
1616 | return rc; |
1617 | } | |
1618 | spi->chip_select = value; | |
1619 | ||
aff5e3f8 PA |
1620 | /* Device speed */ |
1621 | rc = of_property_read_u32(nc, "spi-max-frequency", &value); | |
1622 | if (rc) { | |
8caab75f | 1623 | dev_err(&ctlr->dev, |
25c56c88 | 1624 | "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc); |
c2e51ac3 | 1625 | return rc; |
aff5e3f8 PA |
1626 | } |
1627 | spi->max_speed_hz = value; | |
1628 | ||
c2e51ac3 GU |
1629 | return 0; |
1630 | } | |
1631 | ||
1632 | static struct spi_device * | |
8caab75f | 1633 | of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc) |
c2e51ac3 GU |
1634 | { |
1635 | struct spi_device *spi; | |
1636 | int rc; | |
1637 | ||
1638 | /* Alloc an spi_device */ | |
8caab75f | 1639 | spi = spi_alloc_device(ctlr); |
c2e51ac3 | 1640 | if (!spi) { |
25c56c88 | 1641 | dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc); |
c2e51ac3 GU |
1642 | rc = -ENOMEM; |
1643 | goto err_out; | |
1644 | } | |
1645 | ||
1646 | /* Select device driver */ | |
1647 | rc = of_modalias_node(nc, spi->modalias, | |
1648 | sizeof(spi->modalias)); | |
1649 | if (rc < 0) { | |
25c56c88 | 1650 | dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc); |
c2e51ac3 GU |
1651 | goto err_out; |
1652 | } | |
1653 | ||
8caab75f | 1654 | rc = of_spi_parse_dt(ctlr, spi, nc); |
c2e51ac3 GU |
1655 | if (rc) |
1656 | goto err_out; | |
1657 | ||
aff5e3f8 PA |
1658 | /* Store a pointer to the node in the device structure */ |
1659 | of_node_get(nc); | |
1660 | spi->dev.of_node = nc; | |
1661 | ||
1662 | /* Register the new device */ | |
aff5e3f8 PA |
1663 | rc = spi_add_device(spi); |
1664 | if (rc) { | |
25c56c88 | 1665 | dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc); |
8324147f | 1666 | goto err_of_node_put; |
aff5e3f8 PA |
1667 | } |
1668 | ||
1669 | return spi; | |
1670 | ||
8324147f JH |
1671 | err_of_node_put: |
1672 | of_node_put(nc); | |
aff5e3f8 PA |
1673 | err_out: |
1674 | spi_dev_put(spi); | |
1675 | return ERR_PTR(rc); | |
1676 | } | |
1677 | ||
d57a4282 GL |
1678 | /** |
1679 | * of_register_spi_devices() - Register child devices onto the SPI bus | |
8caab75f | 1680 | * @ctlr: Pointer to spi_controller device |
d57a4282 | 1681 | * |
6c364062 GU |
1682 | * Registers an spi_device for each child node of controller node which |
1683 | * represents a valid SPI slave. | |
d57a4282 | 1684 | */ |
8caab75f | 1685 | static void of_register_spi_devices(struct spi_controller *ctlr) |
d57a4282 GL |
1686 | { |
1687 | struct spi_device *spi; | |
1688 | struct device_node *nc; | |
d57a4282 | 1689 | |
8caab75f | 1690 | if (!ctlr->dev.of_node) |
d57a4282 GL |
1691 | return; |
1692 | ||
8caab75f | 1693 | for_each_available_child_of_node(ctlr->dev.of_node, nc) { |
bd6c1644 GU |
1694 | if (of_node_test_and_set_flag(nc, OF_POPULATED)) |
1695 | continue; | |
8caab75f | 1696 | spi = of_register_spi_device(ctlr, nc); |
e0af98a7 | 1697 | if (IS_ERR(spi)) { |
8caab75f | 1698 | dev_warn(&ctlr->dev, |
25c56c88 | 1699 | "Failed to create SPI device for %pOF\n", nc); |
e0af98a7 RR |
1700 | of_node_clear_flag(nc, OF_POPULATED); |
1701 | } | |
d57a4282 GL |
1702 | } |
1703 | } | |
1704 | #else | |
8caab75f | 1705 | static void of_register_spi_devices(struct spi_controller *ctlr) { } |
d57a4282 GL |
1706 | #endif |
1707 | ||
64bee4d2 | 1708 | #ifdef CONFIG_ACPI |
8a2e487e LW |
1709 | static void acpi_spi_parse_apple_properties(struct spi_device *spi) |
1710 | { | |
1711 | struct acpi_device *dev = ACPI_COMPANION(&spi->dev); | |
1712 | const union acpi_object *obj; | |
1713 | ||
1714 | if (!x86_apple_machine) | |
1715 | return; | |
1716 | ||
1717 | if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj) | |
1718 | && obj->buffer.length >= 4) | |
1719 | spi->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer; | |
1720 | ||
1721 | if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj) | |
1722 | && obj->buffer.length == 8) | |
1723 | spi->bits_per_word = *(u64 *)obj->buffer.pointer; | |
1724 | ||
1725 | if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj) | |
1726 | && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer) | |
1727 | spi->mode |= SPI_LSB_FIRST; | |
1728 | ||
1729 | if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj) | |
1730 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
1731 | spi->mode |= SPI_CPOL; | |
1732 | ||
1733 | if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj) | |
1734 | && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer) | |
1735 | spi->mode |= SPI_CPHA; | |
1736 | } | |
1737 | ||
64bee4d2 MW |
1738 | static int acpi_spi_add_resource(struct acpi_resource *ares, void *data) |
1739 | { | |
1740 | struct spi_device *spi = data; | |
8caab75f | 1741 | struct spi_controller *ctlr = spi->controller; |
64bee4d2 MW |
1742 | |
1743 | if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) { | |
1744 | struct acpi_resource_spi_serialbus *sb; | |
1745 | ||
1746 | sb = &ares->data.spi_serial_bus; | |
1747 | if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) { | |
a0a90718 MW |
1748 | /* |
1749 | * ACPI DeviceSelection numbering is handled by the | |
1750 | * host controller driver in Windows and can vary | |
1751 | * from driver to driver. In Linux we always expect | |
1752 | * 0 .. max - 1 so we need to ask the driver to | |
1753 | * translate between the two schemes. | |
1754 | */ | |
8caab75f GU |
1755 | if (ctlr->fw_translate_cs) { |
1756 | int cs = ctlr->fw_translate_cs(ctlr, | |
a0a90718 MW |
1757 | sb->device_selection); |
1758 | if (cs < 0) | |
1759 | return cs; | |
1760 | spi->chip_select = cs; | |
1761 | } else { | |
1762 | spi->chip_select = sb->device_selection; | |
1763 | } | |
1764 | ||
64bee4d2 MW |
1765 | spi->max_speed_hz = sb->connection_speed; |
1766 | ||
1767 | if (sb->clock_phase == ACPI_SPI_SECOND_PHASE) | |
1768 | spi->mode |= SPI_CPHA; | |
1769 | if (sb->clock_polarity == ACPI_SPI_START_HIGH) | |
1770 | spi->mode |= SPI_CPOL; | |
1771 | if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH) | |
1772 | spi->mode |= SPI_CS_HIGH; | |
1773 | } | |
1774 | } else if (spi->irq < 0) { | |
1775 | struct resource r; | |
1776 | ||
1777 | if (acpi_dev_resource_interrupt(ares, 0, &r)) | |
1778 | spi->irq = r.start; | |
1779 | } | |
1780 | ||
1781 | /* Always tell the ACPI core to skip this resource */ | |
1782 | return 1; | |
1783 | } | |
1784 | ||
8caab75f | 1785 | static acpi_status acpi_register_spi_device(struct spi_controller *ctlr, |
7f24467f | 1786 | struct acpi_device *adev) |
64bee4d2 | 1787 | { |
64bee4d2 | 1788 | struct list_head resource_list; |
64bee4d2 MW |
1789 | struct spi_device *spi; |
1790 | int ret; | |
1791 | ||
7f24467f OP |
1792 | if (acpi_bus_get_status(adev) || !adev->status.present || |
1793 | acpi_device_enumerated(adev)) | |
64bee4d2 MW |
1794 | return AE_OK; |
1795 | ||
8caab75f | 1796 | spi = spi_alloc_device(ctlr); |
64bee4d2 | 1797 | if (!spi) { |
8caab75f | 1798 | dev_err(&ctlr->dev, "failed to allocate SPI device for %s\n", |
64bee4d2 MW |
1799 | dev_name(&adev->dev)); |
1800 | return AE_NO_MEMORY; | |
1801 | } | |
1802 | ||
7b199811 | 1803 | ACPI_COMPANION_SET(&spi->dev, adev); |
64bee4d2 MW |
1804 | spi->irq = -1; |
1805 | ||
1806 | INIT_LIST_HEAD(&resource_list); | |
1807 | ret = acpi_dev_get_resources(adev, &resource_list, | |
1808 | acpi_spi_add_resource, spi); | |
1809 | acpi_dev_free_resource_list(&resource_list); | |
1810 | ||
8a2e487e LW |
1811 | acpi_spi_parse_apple_properties(spi); |
1812 | ||
64bee4d2 MW |
1813 | if (ret < 0 || !spi->max_speed_hz) { |
1814 | spi_dev_put(spi); | |
1815 | return AE_OK; | |
1816 | } | |
1817 | ||
0c6543f6 DD |
1818 | acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias, |
1819 | sizeof(spi->modalias)); | |
1820 | ||
33ada67d CR |
1821 | if (spi->irq < 0) |
1822 | spi->irq = acpi_dev_gpio_irq_get(adev, 0); | |
1823 | ||
7f24467f OP |
1824 | acpi_device_set_enumerated(adev); |
1825 | ||
33cf00e5 | 1826 | adev->power.flags.ignore_parent = true; |
64bee4d2 | 1827 | if (spi_add_device(spi)) { |
33cf00e5 | 1828 | adev->power.flags.ignore_parent = false; |
8caab75f | 1829 | dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n", |
64bee4d2 MW |
1830 | dev_name(&adev->dev)); |
1831 | spi_dev_put(spi); | |
1832 | } | |
1833 | ||
1834 | return AE_OK; | |
1835 | } | |
1836 | ||
7f24467f OP |
1837 | static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level, |
1838 | void *data, void **return_value) | |
1839 | { | |
8caab75f | 1840 | struct spi_controller *ctlr = data; |
7f24467f OP |
1841 | struct acpi_device *adev; |
1842 | ||
1843 | if (acpi_bus_get_device(handle, &adev)) | |
1844 | return AE_OK; | |
1845 | ||
8caab75f | 1846 | return acpi_register_spi_device(ctlr, adev); |
7f24467f OP |
1847 | } |
1848 | ||
8caab75f | 1849 | static void acpi_register_spi_devices(struct spi_controller *ctlr) |
64bee4d2 MW |
1850 | { |
1851 | acpi_status status; | |
1852 | acpi_handle handle; | |
1853 | ||
8caab75f | 1854 | handle = ACPI_HANDLE(ctlr->dev.parent); |
64bee4d2 MW |
1855 | if (!handle) |
1856 | return; | |
1857 | ||
1858 | status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, | |
8caab75f | 1859 | acpi_spi_add_device, NULL, ctlr, NULL); |
64bee4d2 | 1860 | if (ACPI_FAILURE(status)) |
8caab75f | 1861 | dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n"); |
64bee4d2 MW |
1862 | } |
1863 | #else | |
8caab75f | 1864 | static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {} |
64bee4d2 MW |
1865 | #endif /* CONFIG_ACPI */ |
1866 | ||
8caab75f | 1867 | static void spi_controller_release(struct device *dev) |
8ae12a0d | 1868 | { |
8caab75f | 1869 | struct spi_controller *ctlr; |
8ae12a0d | 1870 | |
8caab75f GU |
1871 | ctlr = container_of(dev, struct spi_controller, dev); |
1872 | kfree(ctlr); | |
8ae12a0d DB |
1873 | } |
1874 | ||
1875 | static struct class spi_master_class = { | |
1876 | .name = "spi_master", | |
1877 | .owner = THIS_MODULE, | |
8caab75f | 1878 | .dev_release = spi_controller_release, |
eca2ebc7 | 1879 | .dev_groups = spi_master_groups, |
8ae12a0d DB |
1880 | }; |
1881 | ||
6c364062 GU |
1882 | #ifdef CONFIG_SPI_SLAVE |
1883 | /** | |
1884 | * spi_slave_abort - abort the ongoing transfer request on an SPI slave | |
1885 | * controller | |
1886 | * @spi: device used for the current transfer | |
1887 | */ | |
1888 | int spi_slave_abort(struct spi_device *spi) | |
1889 | { | |
8caab75f | 1890 | struct spi_controller *ctlr = spi->controller; |
6c364062 | 1891 | |
8caab75f GU |
1892 | if (spi_controller_is_slave(ctlr) && ctlr->slave_abort) |
1893 | return ctlr->slave_abort(ctlr); | |
6c364062 GU |
1894 | |
1895 | return -ENOTSUPP; | |
1896 | } | |
1897 | EXPORT_SYMBOL_GPL(spi_slave_abort); | |
1898 | ||
1899 | static int match_true(struct device *dev, void *data) | |
1900 | { | |
1901 | return 1; | |
1902 | } | |
1903 | ||
1904 | static ssize_t spi_slave_show(struct device *dev, | |
1905 | struct device_attribute *attr, char *buf) | |
1906 | { | |
8caab75f GU |
1907 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
1908 | dev); | |
6c364062 GU |
1909 | struct device *child; |
1910 | ||
1911 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
1912 | return sprintf(buf, "%s\n", | |
1913 | child ? to_spi_device(child)->modalias : NULL); | |
1914 | } | |
1915 | ||
1916 | static ssize_t spi_slave_store(struct device *dev, | |
1917 | struct device_attribute *attr, const char *buf, | |
1918 | size_t count) | |
1919 | { | |
8caab75f GU |
1920 | struct spi_controller *ctlr = container_of(dev, struct spi_controller, |
1921 | dev); | |
6c364062 GU |
1922 | struct spi_device *spi; |
1923 | struct device *child; | |
1924 | char name[32]; | |
1925 | int rc; | |
1926 | ||
1927 | rc = sscanf(buf, "%31s", name); | |
1928 | if (rc != 1 || !name[0]) | |
1929 | return -EINVAL; | |
1930 | ||
1931 | child = device_find_child(&ctlr->dev, NULL, match_true); | |
1932 | if (child) { | |
1933 | /* Remove registered slave */ | |
1934 | device_unregister(child); | |
1935 | put_device(child); | |
1936 | } | |
1937 | ||
1938 | if (strcmp(name, "(null)")) { | |
1939 | /* Register new slave */ | |
1940 | spi = spi_alloc_device(ctlr); | |
1941 | if (!spi) | |
1942 | return -ENOMEM; | |
1943 | ||
1944 | strlcpy(spi->modalias, name, sizeof(spi->modalias)); | |
1945 | ||
1946 | rc = spi_add_device(spi); | |
1947 | if (rc) { | |
1948 | spi_dev_put(spi); | |
1949 | return rc; | |
1950 | } | |
1951 | } | |
1952 | ||
1953 | return count; | |
1954 | } | |
1955 | ||
1956 | static DEVICE_ATTR(slave, 0644, spi_slave_show, spi_slave_store); | |
1957 | ||
1958 | static struct attribute *spi_slave_attrs[] = { | |
1959 | &dev_attr_slave.attr, | |
1960 | NULL, | |
1961 | }; | |
1962 | ||
1963 | static const struct attribute_group spi_slave_group = { | |
1964 | .attrs = spi_slave_attrs, | |
1965 | }; | |
1966 | ||
1967 | static const struct attribute_group *spi_slave_groups[] = { | |
8caab75f | 1968 | &spi_controller_statistics_group, |
6c364062 GU |
1969 | &spi_slave_group, |
1970 | NULL, | |
1971 | }; | |
1972 | ||
1973 | static struct class spi_slave_class = { | |
1974 | .name = "spi_slave", | |
1975 | .owner = THIS_MODULE, | |
8caab75f | 1976 | .dev_release = spi_controller_release, |
6c364062 GU |
1977 | .dev_groups = spi_slave_groups, |
1978 | }; | |
1979 | #else | |
1980 | extern struct class spi_slave_class; /* dummy */ | |
1981 | #endif | |
8ae12a0d DB |
1982 | |
1983 | /** | |
6c364062 | 1984 | * __spi_alloc_controller - allocate an SPI master or slave controller |
8ae12a0d | 1985 | * @dev: the controller, possibly using the platform_bus |
33e34dc6 | 1986 | * @size: how much zeroed driver-private data to allocate; the pointer to this |
49dce689 | 1987 | * memory is in the driver_data field of the returned device, |
8caab75f | 1988 | * accessible with spi_controller_get_devdata(). |
6c364062 GU |
1989 | * @slave: flag indicating whether to allocate an SPI master (false) or SPI |
1990 | * slave (true) controller | |
33e34dc6 | 1991 | * Context: can sleep |
8ae12a0d | 1992 | * |
6c364062 | 1993 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d | 1994 | * only ones directly touching chip registers. It's how they allocate |
8caab75f | 1995 | * an spi_controller structure, prior to calling spi_register_controller(). |
8ae12a0d | 1996 | * |
97d56dc6 | 1997 | * This must be called from context that can sleep. |
8ae12a0d | 1998 | * |
6c364062 | 1999 | * The caller is responsible for assigning the bus number and initializing the |
8caab75f GU |
2000 | * controller's methods before calling spi_register_controller(); and (after |
2001 | * errors adding the device) calling spi_controller_put() to prevent a memory | |
2002 | * leak. | |
97d56dc6 | 2003 | * |
6c364062 | 2004 | * Return: the SPI controller structure on success, else NULL. |
8ae12a0d | 2005 | */ |
8caab75f GU |
2006 | struct spi_controller *__spi_alloc_controller(struct device *dev, |
2007 | unsigned int size, bool slave) | |
8ae12a0d | 2008 | { |
8caab75f | 2009 | struct spi_controller *ctlr; |
8ae12a0d | 2010 | |
0c868461 DB |
2011 | if (!dev) |
2012 | return NULL; | |
2013 | ||
8caab75f GU |
2014 | ctlr = kzalloc(size + sizeof(*ctlr), GFP_KERNEL); |
2015 | if (!ctlr) | |
8ae12a0d DB |
2016 | return NULL; |
2017 | ||
8caab75f GU |
2018 | device_initialize(&ctlr->dev); |
2019 | ctlr->bus_num = -1; | |
2020 | ctlr->num_chipselect = 1; | |
2021 | ctlr->slave = slave; | |
6c364062 | 2022 | if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave) |
8caab75f | 2023 | ctlr->dev.class = &spi_slave_class; |
6c364062 | 2024 | else |
8caab75f GU |
2025 | ctlr->dev.class = &spi_master_class; |
2026 | ctlr->dev.parent = dev; | |
2027 | pm_suspend_ignore_children(&ctlr->dev, true); | |
2028 | spi_controller_set_devdata(ctlr, &ctlr[1]); | |
8ae12a0d | 2029 | |
8caab75f | 2030 | return ctlr; |
8ae12a0d | 2031 | } |
6c364062 | 2032 | EXPORT_SYMBOL_GPL(__spi_alloc_controller); |
8ae12a0d | 2033 | |
74317984 | 2034 | #ifdef CONFIG_OF |
8caab75f | 2035 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 | 2036 | { |
e80beb27 | 2037 | int nb, i, *cs; |
8caab75f | 2038 | struct device_node *np = ctlr->dev.of_node; |
74317984 JCPV |
2039 | |
2040 | if (!np) | |
2041 | return 0; | |
2042 | ||
2043 | nb = of_gpio_named_count(np, "cs-gpios"); | |
8caab75f | 2044 | ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect); |
74317984 | 2045 | |
8ec5d84e AL |
2046 | /* Return error only for an incorrectly formed cs-gpios property */ |
2047 | if (nb == 0 || nb == -ENOENT) | |
74317984 | 2048 | return 0; |
8ec5d84e AL |
2049 | else if (nb < 0) |
2050 | return nb; | |
74317984 | 2051 | |
a86854d0 | 2052 | cs = devm_kcalloc(&ctlr->dev, ctlr->num_chipselect, sizeof(int), |
74317984 | 2053 | GFP_KERNEL); |
8caab75f | 2054 | ctlr->cs_gpios = cs; |
74317984 | 2055 | |
8caab75f | 2056 | if (!ctlr->cs_gpios) |
74317984 JCPV |
2057 | return -ENOMEM; |
2058 | ||
8caab75f | 2059 | for (i = 0; i < ctlr->num_chipselect; i++) |
446411e1 | 2060 | cs[i] = -ENOENT; |
74317984 JCPV |
2061 | |
2062 | for (i = 0; i < nb; i++) | |
2063 | cs[i] = of_get_named_gpio(np, "cs-gpios", i); | |
2064 | ||
2065 | return 0; | |
2066 | } | |
2067 | #else | |
8caab75f | 2068 | static int of_spi_register_master(struct spi_controller *ctlr) |
74317984 JCPV |
2069 | { |
2070 | return 0; | |
2071 | } | |
2072 | #endif | |
2073 | ||
bdf3a3b5 BB |
2074 | static int spi_controller_check_ops(struct spi_controller *ctlr) |
2075 | { | |
2076 | /* | |
b5932f5c BB |
2077 | * The controller may implement only the high-level SPI-memory like |
2078 | * operations if it does not support regular SPI transfers, and this is | |
2079 | * valid use case. | |
2080 | * If ->mem_ops is NULL, we request that at least one of the | |
2081 | * ->transfer_xxx() method be implemented. | |
bdf3a3b5 | 2082 | */ |
b5932f5c BB |
2083 | if (ctlr->mem_ops) { |
2084 | if (!ctlr->mem_ops->exec_op) | |
2085 | return -EINVAL; | |
2086 | } else if (!ctlr->transfer && !ctlr->transfer_one && | |
2087 | !ctlr->transfer_one_message) { | |
bdf3a3b5 | 2088 | return -EINVAL; |
b5932f5c | 2089 | } |
bdf3a3b5 BB |
2090 | |
2091 | return 0; | |
2092 | } | |
2093 | ||
8ae12a0d | 2094 | /** |
8caab75f GU |
2095 | * spi_register_controller - register SPI master or slave controller |
2096 | * @ctlr: initialized master, originally from spi_alloc_master() or | |
2097 | * spi_alloc_slave() | |
33e34dc6 | 2098 | * Context: can sleep |
8ae12a0d | 2099 | * |
8caab75f | 2100 | * SPI controllers connect to their drivers using some non-SPI bus, |
8ae12a0d | 2101 | * such as the platform bus. The final stage of probe() in that code |
8caab75f | 2102 | * includes calling spi_register_controller() to hook up to this SPI bus glue. |
8ae12a0d DB |
2103 | * |
2104 | * SPI controllers use board specific (often SOC specific) bus numbers, | |
2105 | * and board-specific addressing for SPI devices combines those numbers | |
2106 | * with chip select numbers. Since SPI does not directly support dynamic | |
2107 | * device identification, boards need configuration tables telling which | |
2108 | * chip is at which address. | |
2109 | * | |
2110 | * This must be called from context that can sleep. It returns zero on | |
8caab75f | 2111 | * success, else a negative error code (dropping the controller's refcount). |
0c868461 | 2112 | * After a successful return, the caller is responsible for calling |
8caab75f | 2113 | * spi_unregister_controller(). |
97d56dc6 JMC |
2114 | * |
2115 | * Return: zero on success, else a negative error code. | |
8ae12a0d | 2116 | */ |
8caab75f | 2117 | int spi_register_controller(struct spi_controller *ctlr) |
8ae12a0d | 2118 | { |
8caab75f | 2119 | struct device *dev = ctlr->dev.parent; |
2b9603a0 | 2120 | struct boardinfo *bi; |
8ae12a0d | 2121 | int status = -ENODEV; |
42bdd706 | 2122 | int id, first_dynamic; |
8ae12a0d | 2123 | |
0c868461 DB |
2124 | if (!dev) |
2125 | return -ENODEV; | |
2126 | ||
bdf3a3b5 BB |
2127 | /* |
2128 | * Make sure all necessary hooks are implemented before registering | |
2129 | * the SPI controller. | |
2130 | */ | |
2131 | status = spi_controller_check_ops(ctlr); | |
2132 | if (status) | |
2133 | return status; | |
2134 | ||
8caab75f GU |
2135 | if (!spi_controller_is_slave(ctlr)) { |
2136 | status = of_spi_register_master(ctlr); | |
6c364062 GU |
2137 | if (status) |
2138 | return status; | |
2139 | } | |
74317984 | 2140 | |
082c8cb4 DB |
2141 | /* even if it's just one always-selected device, there must |
2142 | * be at least one chipselect | |
2143 | */ | |
8caab75f | 2144 | if (ctlr->num_chipselect == 0) |
082c8cb4 | 2145 | return -EINVAL; |
9b61e302 SM |
2146 | /* allocate dynamic bus number using Linux idr */ |
2147 | if ((ctlr->bus_num < 0) && ctlr->dev.of_node) { | |
2148 | id = of_alias_get_id(ctlr->dev.of_node, "spi"); | |
2149 | if (id >= 0) { | |
2150 | ctlr->bus_num = id; | |
2151 | mutex_lock(&board_lock); | |
2152 | id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num, | |
2153 | ctlr->bus_num + 1, GFP_KERNEL); | |
2154 | mutex_unlock(&board_lock); | |
2155 | if (WARN(id < 0, "couldn't get idr")) | |
2156 | return id == -ENOSPC ? -EBUSY : id; | |
2157 | } | |
2158 | } | |
8caab75f | 2159 | if (ctlr->bus_num < 0) { |
42bdd706 LS |
2160 | first_dynamic = of_alias_get_highest_id("spi"); |
2161 | if (first_dynamic < 0) | |
2162 | first_dynamic = 0; | |
2163 | else | |
2164 | first_dynamic++; | |
2165 | ||
9a9a047a | 2166 | mutex_lock(&board_lock); |
42bdd706 LS |
2167 | id = idr_alloc(&spi_master_idr, ctlr, first_dynamic, |
2168 | 0, GFP_KERNEL); | |
9a9a047a SM |
2169 | mutex_unlock(&board_lock); |
2170 | if (WARN(id < 0, "couldn't get idr")) | |
2171 | return id; | |
2172 | ctlr->bus_num = id; | |
8ae12a0d | 2173 | } |
8caab75f GU |
2174 | INIT_LIST_HEAD(&ctlr->queue); |
2175 | spin_lock_init(&ctlr->queue_lock); | |
2176 | spin_lock_init(&ctlr->bus_lock_spinlock); | |
2177 | mutex_init(&ctlr->bus_lock_mutex); | |
2178 | mutex_init(&ctlr->io_mutex); | |
2179 | ctlr->bus_lock_flag = 0; | |
2180 | init_completion(&ctlr->xfer_completion); | |
2181 | if (!ctlr->max_dma_len) | |
2182 | ctlr->max_dma_len = INT_MAX; | |
cf32b71e | 2183 | |
8ae12a0d DB |
2184 | /* register the device, then userspace will see it. |
2185 | * registration fails if the bus ID is in use. | |
2186 | */ | |
8caab75f GU |
2187 | dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num); |
2188 | status = device_add(&ctlr->dev); | |
9b61e302 SM |
2189 | if (status < 0) { |
2190 | /* free bus id */ | |
2191 | mutex_lock(&board_lock); | |
2192 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2193 | mutex_unlock(&board_lock); | |
8ae12a0d | 2194 | goto done; |
9b61e302 SM |
2195 | } |
2196 | dev_dbg(dev, "registered %s %s\n", | |
8caab75f | 2197 | spi_controller_is_slave(ctlr) ? "slave" : "master", |
9b61e302 | 2198 | dev_name(&ctlr->dev)); |
8ae12a0d | 2199 | |
b5932f5c BB |
2200 | /* |
2201 | * If we're using a queued driver, start the queue. Note that we don't | |
2202 | * need the queueing logic if the driver is only supporting high-level | |
2203 | * memory operations. | |
2204 | */ | |
2205 | if (ctlr->transfer) { | |
8caab75f | 2206 | dev_info(dev, "controller is unqueued, this is deprecated\n"); |
b5932f5c | 2207 | } else if (ctlr->transfer_one || ctlr->transfer_one_message) { |
8caab75f | 2208 | status = spi_controller_initialize_queue(ctlr); |
ffbbdd21 | 2209 | if (status) { |
8caab75f | 2210 | device_del(&ctlr->dev); |
9b61e302 SM |
2211 | /* free bus id */ |
2212 | mutex_lock(&board_lock); | |
2213 | idr_remove(&spi_master_idr, ctlr->bus_num); | |
2214 | mutex_unlock(&board_lock); | |
ffbbdd21 LW |
2215 | goto done; |
2216 | } | |
2217 | } | |
eca2ebc7 | 2218 | /* add statistics */ |
8caab75f | 2219 | spin_lock_init(&ctlr->statistics.lock); |
ffbbdd21 | 2220 | |
2b9603a0 | 2221 | mutex_lock(&board_lock); |
8caab75f | 2222 | list_add_tail(&ctlr->list, &spi_controller_list); |
2b9603a0 | 2223 | list_for_each_entry(bi, &board_list, list) |
8caab75f | 2224 | spi_match_controller_to_boardinfo(ctlr, &bi->board_info); |
2b9603a0 FT |
2225 | mutex_unlock(&board_lock); |
2226 | ||
64bee4d2 | 2227 | /* Register devices from the device tree and ACPI */ |
8caab75f GU |
2228 | of_register_spi_devices(ctlr); |
2229 | acpi_register_spi_devices(ctlr); | |
8ae12a0d DB |
2230 | done: |
2231 | return status; | |
2232 | } | |
8caab75f | 2233 | EXPORT_SYMBOL_GPL(spi_register_controller); |
8ae12a0d | 2234 | |
666d5b4c MB |
2235 | static void devm_spi_unregister(struct device *dev, void *res) |
2236 | { | |
8caab75f | 2237 | spi_unregister_controller(*(struct spi_controller **)res); |
666d5b4c MB |
2238 | } |
2239 | ||
2240 | /** | |
8caab75f GU |
2241 | * devm_spi_register_controller - register managed SPI master or slave |
2242 | * controller | |
2243 | * @dev: device managing SPI controller | |
2244 | * @ctlr: initialized controller, originally from spi_alloc_master() or | |
2245 | * spi_alloc_slave() | |
666d5b4c MB |
2246 | * Context: can sleep |
2247 | * | |
8caab75f | 2248 | * Register a SPI device as with spi_register_controller() which will |
68b892f1 | 2249 | * automatically be unregistered and freed. |
97d56dc6 JMC |
2250 | * |
2251 | * Return: zero on success, else a negative error code. | |
666d5b4c | 2252 | */ |
8caab75f GU |
2253 | int devm_spi_register_controller(struct device *dev, |
2254 | struct spi_controller *ctlr) | |
666d5b4c | 2255 | { |
8caab75f | 2256 | struct spi_controller **ptr; |
666d5b4c MB |
2257 | int ret; |
2258 | ||
2259 | ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL); | |
2260 | if (!ptr) | |
2261 | return -ENOMEM; | |
2262 | ||
8caab75f | 2263 | ret = spi_register_controller(ctlr); |
4b92894e | 2264 | if (!ret) { |
8caab75f | 2265 | *ptr = ctlr; |
666d5b4c MB |
2266 | devres_add(dev, ptr); |
2267 | } else { | |
2268 | devres_free(ptr); | |
2269 | } | |
2270 | ||
2271 | return ret; | |
2272 | } | |
8caab75f | 2273 | EXPORT_SYMBOL_GPL(devm_spi_register_controller); |
666d5b4c | 2274 | |
34860089 | 2275 | static int __unregister(struct device *dev, void *null) |
8ae12a0d | 2276 | { |
34860089 | 2277 | spi_unregister_device(to_spi_device(dev)); |
8ae12a0d DB |
2278 | return 0; |
2279 | } | |
2280 | ||
2281 | /** | |
8caab75f GU |
2282 | * spi_unregister_controller - unregister SPI master or slave controller |
2283 | * @ctlr: the controller being unregistered | |
33e34dc6 | 2284 | * Context: can sleep |
8ae12a0d | 2285 | * |
8caab75f | 2286 | * This call is used only by SPI controller drivers, which are the |
8ae12a0d DB |
2287 | * only ones directly touching chip registers. |
2288 | * | |
2289 | * This must be called from context that can sleep. | |
68b892f1 JH |
2290 | * |
2291 | * Note that this function also drops a reference to the controller. | |
8ae12a0d | 2292 | */ |
8caab75f | 2293 | void spi_unregister_controller(struct spi_controller *ctlr) |
8ae12a0d | 2294 | { |
9b61e302 | 2295 | struct spi_controller *found; |
67f7b278 | 2296 | int id = ctlr->bus_num; |
89fc9a1a JG |
2297 | int dummy; |
2298 | ||
9b61e302 SM |
2299 | /* First make sure that this controller was ever added */ |
2300 | mutex_lock(&board_lock); | |
67f7b278 | 2301 | found = idr_find(&spi_master_idr, id); |
9b61e302 | 2302 | mutex_unlock(&board_lock); |
8caab75f GU |
2303 | if (ctlr->queued) { |
2304 | if (spi_destroy_queue(ctlr)) | |
2305 | dev_err(&ctlr->dev, "queue remove failed\n"); | |
ffbbdd21 | 2306 | } |
2b9603a0 | 2307 | mutex_lock(&board_lock); |
8caab75f | 2308 | list_del(&ctlr->list); |
2b9603a0 FT |
2309 | mutex_unlock(&board_lock); |
2310 | ||
8caab75f GU |
2311 | dummy = device_for_each_child(&ctlr->dev, NULL, __unregister); |
2312 | device_unregister(&ctlr->dev); | |
9b61e302 SM |
2313 | /* free bus id */ |
2314 | mutex_lock(&board_lock); | |
613bd1ea JN |
2315 | if (found == ctlr) |
2316 | idr_remove(&spi_master_idr, id); | |
9b61e302 | 2317 | mutex_unlock(&board_lock); |
8ae12a0d | 2318 | } |
8caab75f | 2319 | EXPORT_SYMBOL_GPL(spi_unregister_controller); |
8ae12a0d | 2320 | |
8caab75f | 2321 | int spi_controller_suspend(struct spi_controller *ctlr) |
ffbbdd21 LW |
2322 | { |
2323 | int ret; | |
2324 | ||
8caab75f GU |
2325 | /* Basically no-ops for non-queued controllers */ |
2326 | if (!ctlr->queued) | |
ffbbdd21 LW |
2327 | return 0; |
2328 | ||
8caab75f | 2329 | ret = spi_stop_queue(ctlr); |
ffbbdd21 | 2330 | if (ret) |
8caab75f | 2331 | dev_err(&ctlr->dev, "queue stop failed\n"); |
ffbbdd21 LW |
2332 | |
2333 | return ret; | |
2334 | } | |
8caab75f | 2335 | EXPORT_SYMBOL_GPL(spi_controller_suspend); |
ffbbdd21 | 2336 | |
8caab75f | 2337 | int spi_controller_resume(struct spi_controller *ctlr) |
ffbbdd21 LW |
2338 | { |
2339 | int ret; | |
2340 | ||
8caab75f | 2341 | if (!ctlr->queued) |
ffbbdd21 LW |
2342 | return 0; |
2343 | ||
8caab75f | 2344 | ret = spi_start_queue(ctlr); |
ffbbdd21 | 2345 | if (ret) |
8caab75f | 2346 | dev_err(&ctlr->dev, "queue restart failed\n"); |
ffbbdd21 LW |
2347 | |
2348 | return ret; | |
2349 | } | |
8caab75f | 2350 | EXPORT_SYMBOL_GPL(spi_controller_resume); |
ffbbdd21 | 2351 | |
8caab75f | 2352 | static int __spi_controller_match(struct device *dev, const void *data) |
5ed2c832 | 2353 | { |
8caab75f | 2354 | struct spi_controller *ctlr; |
9f3b795a | 2355 | const u16 *bus_num = data; |
5ed2c832 | 2356 | |
8caab75f GU |
2357 | ctlr = container_of(dev, struct spi_controller, dev); |
2358 | return ctlr->bus_num == *bus_num; | |
5ed2c832 DY |
2359 | } |
2360 | ||
8ae12a0d DB |
2361 | /** |
2362 | * spi_busnum_to_master - look up master associated with bus_num | |
2363 | * @bus_num: the master's bus number | |
33e34dc6 | 2364 | * Context: can sleep |
8ae12a0d DB |
2365 | * |
2366 | * This call may be used with devices that are registered after | |
2367 | * arch init time. It returns a refcounted pointer to the relevant | |
8caab75f | 2368 | * spi_controller (which the caller must release), or NULL if there is |
8ae12a0d | 2369 | * no such master registered. |
97d56dc6 JMC |
2370 | * |
2371 | * Return: the SPI master structure on success, else NULL. | |
8ae12a0d | 2372 | */ |
8caab75f | 2373 | struct spi_controller *spi_busnum_to_master(u16 bus_num) |
8ae12a0d | 2374 | { |
49dce689 | 2375 | struct device *dev; |
8caab75f | 2376 | struct spi_controller *ctlr = NULL; |
5ed2c832 | 2377 | |
695794ae | 2378 | dev = class_find_device(&spi_master_class, NULL, &bus_num, |
8caab75f | 2379 | __spi_controller_match); |
5ed2c832 | 2380 | if (dev) |
8caab75f | 2381 | ctlr = container_of(dev, struct spi_controller, dev); |
5ed2c832 | 2382 | /* reference got in class_find_device */ |
8caab75f | 2383 | return ctlr; |
8ae12a0d DB |
2384 | } |
2385 | EXPORT_SYMBOL_GPL(spi_busnum_to_master); | |
2386 | ||
d780c371 MS |
2387 | /*-------------------------------------------------------------------------*/ |
2388 | ||
2389 | /* Core methods for SPI resource management */ | |
2390 | ||
2391 | /** | |
2392 | * spi_res_alloc - allocate a spi resource that is life-cycle managed | |
2393 | * during the processing of a spi_message while using | |
2394 | * spi_transfer_one | |
2395 | * @spi: the spi device for which we allocate memory | |
2396 | * @release: the release code to execute for this resource | |
2397 | * @size: size to alloc and return | |
2398 | * @gfp: GFP allocation flags | |
2399 | * | |
2400 | * Return: the pointer to the allocated data | |
2401 | * | |
2402 | * This may get enhanced in the future to allocate from a memory pool | |
8caab75f | 2403 | * of the @spi_device or @spi_controller to avoid repeated allocations. |
d780c371 MS |
2404 | */ |
2405 | void *spi_res_alloc(struct spi_device *spi, | |
2406 | spi_res_release_t release, | |
2407 | size_t size, gfp_t gfp) | |
2408 | { | |
2409 | struct spi_res *sres; | |
2410 | ||
2411 | sres = kzalloc(sizeof(*sres) + size, gfp); | |
2412 | if (!sres) | |
2413 | return NULL; | |
2414 | ||
2415 | INIT_LIST_HEAD(&sres->entry); | |
2416 | sres->release = release; | |
2417 | ||
2418 | return sres->data; | |
2419 | } | |
2420 | EXPORT_SYMBOL_GPL(spi_res_alloc); | |
2421 | ||
2422 | /** | |
2423 | * spi_res_free - free an spi resource | |
2424 | * @res: pointer to the custom data of a resource | |
2425 | * | |
2426 | */ | |
2427 | void spi_res_free(void *res) | |
2428 | { | |
2429 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2430 | ||
2431 | if (!res) | |
2432 | return; | |
2433 | ||
2434 | WARN_ON(!list_empty(&sres->entry)); | |
2435 | kfree(sres); | |
2436 | } | |
2437 | EXPORT_SYMBOL_GPL(spi_res_free); | |
2438 | ||
2439 | /** | |
2440 | * spi_res_add - add a spi_res to the spi_message | |
2441 | * @message: the spi message | |
2442 | * @res: the spi_resource | |
2443 | */ | |
2444 | void spi_res_add(struct spi_message *message, void *res) | |
2445 | { | |
2446 | struct spi_res *sres = container_of(res, struct spi_res, data); | |
2447 | ||
2448 | WARN_ON(!list_empty(&sres->entry)); | |
2449 | list_add_tail(&sres->entry, &message->resources); | |
2450 | } | |
2451 | EXPORT_SYMBOL_GPL(spi_res_add); | |
2452 | ||
2453 | /** | |
2454 | * spi_res_release - release all spi resources for this message | |
8caab75f | 2455 | * @ctlr: the @spi_controller |
d780c371 MS |
2456 | * @message: the @spi_message |
2457 | */ | |
8caab75f | 2458 | void spi_res_release(struct spi_controller *ctlr, struct spi_message *message) |
d780c371 MS |
2459 | { |
2460 | struct spi_res *res; | |
2461 | ||
2462 | while (!list_empty(&message->resources)) { | |
2463 | res = list_last_entry(&message->resources, | |
2464 | struct spi_res, entry); | |
2465 | ||
2466 | if (res->release) | |
8caab75f | 2467 | res->release(ctlr, message, res->data); |
d780c371 MS |
2468 | |
2469 | list_del(&res->entry); | |
2470 | ||
2471 | kfree(res); | |
2472 | } | |
2473 | } | |
2474 | EXPORT_SYMBOL_GPL(spi_res_release); | |
8ae12a0d DB |
2475 | |
2476 | /*-------------------------------------------------------------------------*/ | |
2477 | ||
523baf5a MS |
2478 | /* Core methods for spi_message alterations */ |
2479 | ||
8caab75f | 2480 | static void __spi_replace_transfers_release(struct spi_controller *ctlr, |
523baf5a MS |
2481 | struct spi_message *msg, |
2482 | void *res) | |
2483 | { | |
2484 | struct spi_replaced_transfers *rxfer = res; | |
2485 | size_t i; | |
2486 | ||
2487 | /* call extra callback if requested */ | |
2488 | if (rxfer->release) | |
8caab75f | 2489 | rxfer->release(ctlr, msg, res); |
523baf5a MS |
2490 | |
2491 | /* insert replaced transfers back into the message */ | |
2492 | list_splice(&rxfer->replaced_transfers, rxfer->replaced_after); | |
2493 | ||
2494 | /* remove the formerly inserted entries */ | |
2495 | for (i = 0; i < rxfer->inserted; i++) | |
2496 | list_del(&rxfer->inserted_transfers[i].transfer_list); | |
2497 | } | |
2498 | ||
2499 | /** | |
2500 | * spi_replace_transfers - replace transfers with several transfers | |
2501 | * and register change with spi_message.resources | |
2502 | * @msg: the spi_message we work upon | |
2503 | * @xfer_first: the first spi_transfer we want to replace | |
2504 | * @remove: number of transfers to remove | |
2505 | * @insert: the number of transfers we want to insert instead | |
2506 | * @release: extra release code necessary in some circumstances | |
2507 | * @extradatasize: extra data to allocate (with alignment guarantees | |
2508 | * of struct @spi_transfer) | |
05885397 | 2509 | * @gfp: gfp flags |
523baf5a MS |
2510 | * |
2511 | * Returns: pointer to @spi_replaced_transfers, | |
2512 | * PTR_ERR(...) in case of errors. | |
2513 | */ | |
2514 | struct spi_replaced_transfers *spi_replace_transfers( | |
2515 | struct spi_message *msg, | |
2516 | struct spi_transfer *xfer_first, | |
2517 | size_t remove, | |
2518 | size_t insert, | |
2519 | spi_replaced_release_t release, | |
2520 | size_t extradatasize, | |
2521 | gfp_t gfp) | |
2522 | { | |
2523 | struct spi_replaced_transfers *rxfer; | |
2524 | struct spi_transfer *xfer; | |
2525 | size_t i; | |
2526 | ||
2527 | /* allocate the structure using spi_res */ | |
2528 | rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release, | |
2529 | insert * sizeof(struct spi_transfer) | |
2530 | + sizeof(struct spi_replaced_transfers) | |
2531 | + extradatasize, | |
2532 | gfp); | |
2533 | if (!rxfer) | |
2534 | return ERR_PTR(-ENOMEM); | |
2535 | ||
2536 | /* the release code to invoke before running the generic release */ | |
2537 | rxfer->release = release; | |
2538 | ||
2539 | /* assign extradata */ | |
2540 | if (extradatasize) | |
2541 | rxfer->extradata = | |
2542 | &rxfer->inserted_transfers[insert]; | |
2543 | ||
2544 | /* init the replaced_transfers list */ | |
2545 | INIT_LIST_HEAD(&rxfer->replaced_transfers); | |
2546 | ||
2547 | /* assign the list_entry after which we should reinsert | |
2548 | * the @replaced_transfers - it may be spi_message.messages! | |
2549 | */ | |
2550 | rxfer->replaced_after = xfer_first->transfer_list.prev; | |
2551 | ||
2552 | /* remove the requested number of transfers */ | |
2553 | for (i = 0; i < remove; i++) { | |
2554 | /* if the entry after replaced_after it is msg->transfers | |
2555 | * then we have been requested to remove more transfers | |
2556 | * than are in the list | |
2557 | */ | |
2558 | if (rxfer->replaced_after->next == &msg->transfers) { | |
2559 | dev_err(&msg->spi->dev, | |
2560 | "requested to remove more spi_transfers than are available\n"); | |
2561 | /* insert replaced transfers back into the message */ | |
2562 | list_splice(&rxfer->replaced_transfers, | |
2563 | rxfer->replaced_after); | |
2564 | ||
2565 | /* free the spi_replace_transfer structure */ | |
2566 | spi_res_free(rxfer); | |
2567 | ||
2568 | /* and return with an error */ | |
2569 | return ERR_PTR(-EINVAL); | |
2570 | } | |
2571 | ||
2572 | /* remove the entry after replaced_after from list of | |
2573 | * transfers and add it to list of replaced_transfers | |
2574 | */ | |
2575 | list_move_tail(rxfer->replaced_after->next, | |
2576 | &rxfer->replaced_transfers); | |
2577 | } | |
2578 | ||
2579 | /* create copy of the given xfer with identical settings | |
2580 | * based on the first transfer to get removed | |
2581 | */ | |
2582 | for (i = 0; i < insert; i++) { | |
2583 | /* we need to run in reverse order */ | |
2584 | xfer = &rxfer->inserted_transfers[insert - 1 - i]; | |
2585 | ||
2586 | /* copy all spi_transfer data */ | |
2587 | memcpy(xfer, xfer_first, sizeof(*xfer)); | |
2588 | ||
2589 | /* add to list */ | |
2590 | list_add(&xfer->transfer_list, rxfer->replaced_after); | |
2591 | ||
2592 | /* clear cs_change and delay_usecs for all but the last */ | |
2593 | if (i) { | |
2594 | xfer->cs_change = false; | |
2595 | xfer->delay_usecs = 0; | |
2596 | } | |
2597 | } | |
2598 | ||
2599 | /* set up inserted */ | |
2600 | rxfer->inserted = insert; | |
2601 | ||
2602 | /* and register it with spi_res/spi_message */ | |
2603 | spi_res_add(msg, rxfer); | |
2604 | ||
2605 | return rxfer; | |
2606 | } | |
2607 | EXPORT_SYMBOL_GPL(spi_replace_transfers); | |
2608 | ||
8caab75f | 2609 | static int __spi_split_transfer_maxsize(struct spi_controller *ctlr, |
08933418 FE |
2610 | struct spi_message *msg, |
2611 | struct spi_transfer **xferp, | |
2612 | size_t maxsize, | |
2613 | gfp_t gfp) | |
d9f12122 MS |
2614 | { |
2615 | struct spi_transfer *xfer = *xferp, *xfers; | |
2616 | struct spi_replaced_transfers *srt; | |
2617 | size_t offset; | |
2618 | size_t count, i; | |
2619 | ||
2620 | /* warn once about this fact that we are splitting a transfer */ | |
2621 | dev_warn_once(&msg->spi->dev, | |
7d62f51e | 2622 | "spi_transfer of length %i exceed max length of %zu - needed to split transfers\n", |
d9f12122 MS |
2623 | xfer->len, maxsize); |
2624 | ||
2625 | /* calculate how many we have to replace */ | |
2626 | count = DIV_ROUND_UP(xfer->len, maxsize); | |
2627 | ||
2628 | /* create replacement */ | |
2629 | srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp); | |
657d32ef DC |
2630 | if (IS_ERR(srt)) |
2631 | return PTR_ERR(srt); | |
d9f12122 MS |
2632 | xfers = srt->inserted_transfers; |
2633 | ||
2634 | /* now handle each of those newly inserted spi_transfers | |
2635 | * note that the replacements spi_transfers all are preset | |
2636 | * to the same values as *xferp, so tx_buf, rx_buf and len | |
2637 | * are all identical (as well as most others) | |
2638 | * so we just have to fix up len and the pointers. | |
2639 | * | |
2640 | * this also includes support for the depreciated | |
2641 | * spi_message.is_dma_mapped interface | |
2642 | */ | |
2643 | ||
2644 | /* the first transfer just needs the length modified, so we | |
2645 | * run it outside the loop | |
2646 | */ | |
c8dab77a | 2647 | xfers[0].len = min_t(size_t, maxsize, xfer[0].len); |
d9f12122 MS |
2648 | |
2649 | /* all the others need rx_buf/tx_buf also set */ | |
2650 | for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) { | |
2651 | /* update rx_buf, tx_buf and dma */ | |
2652 | if (xfers[i].rx_buf) | |
2653 | xfers[i].rx_buf += offset; | |
2654 | if (xfers[i].rx_dma) | |
2655 | xfers[i].rx_dma += offset; | |
2656 | if (xfers[i].tx_buf) | |
2657 | xfers[i].tx_buf += offset; | |
2658 | if (xfers[i].tx_dma) | |
2659 | xfers[i].tx_dma += offset; | |
2660 | ||
2661 | /* update length */ | |
2662 | xfers[i].len = min(maxsize, xfers[i].len - offset); | |
2663 | } | |
2664 | ||
2665 | /* we set up xferp to the last entry we have inserted, | |
2666 | * so that we skip those already split transfers | |
2667 | */ | |
2668 | *xferp = &xfers[count - 1]; | |
2669 | ||
2670 | /* increment statistics counters */ | |
8caab75f | 2671 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, |
d9f12122 MS |
2672 | transfers_split_maxsize); |
2673 | SPI_STATISTICS_INCREMENT_FIELD(&msg->spi->statistics, | |
2674 | transfers_split_maxsize); | |
2675 | ||
2676 | return 0; | |
2677 | } | |
2678 | ||
2679 | /** | |
2680 | * spi_split_tranfers_maxsize - split spi transfers into multiple transfers | |
2681 | * when an individual transfer exceeds a | |
2682 | * certain size | |
8caab75f | 2683 | * @ctlr: the @spi_controller for this transfer |
3700ce95 MI |
2684 | * @msg: the @spi_message to transform |
2685 | * @maxsize: the maximum when to apply this | |
10f11a22 | 2686 | * @gfp: GFP allocation flags |
d9f12122 MS |
2687 | * |
2688 | * Return: status of transformation | |
2689 | */ | |
8caab75f | 2690 | int spi_split_transfers_maxsize(struct spi_controller *ctlr, |
d9f12122 MS |
2691 | struct spi_message *msg, |
2692 | size_t maxsize, | |
2693 | gfp_t gfp) | |
2694 | { | |
2695 | struct spi_transfer *xfer; | |
2696 | int ret; | |
2697 | ||
2698 | /* iterate over the transfer_list, | |
2699 | * but note that xfer is advanced to the last transfer inserted | |
2700 | * to avoid checking sizes again unnecessarily (also xfer does | |
2701 | * potentiall belong to a different list by the time the | |
2702 | * replacement has happened | |
2703 | */ | |
2704 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
2705 | if (xfer->len > maxsize) { | |
8caab75f GU |
2706 | ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer, |
2707 | maxsize, gfp); | |
d9f12122 MS |
2708 | if (ret) |
2709 | return ret; | |
2710 | } | |
2711 | } | |
2712 | ||
2713 | return 0; | |
2714 | } | |
2715 | EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize); | |
8ae12a0d DB |
2716 | |
2717 | /*-------------------------------------------------------------------------*/ | |
2718 | ||
8caab75f | 2719 | /* Core methods for SPI controller protocol drivers. Some of the |
7d077197 DB |
2720 | * other core methods are currently defined as inline functions. |
2721 | */ | |
2722 | ||
8caab75f GU |
2723 | static int __spi_validate_bits_per_word(struct spi_controller *ctlr, |
2724 | u8 bits_per_word) | |
63ab645f | 2725 | { |
8caab75f | 2726 | if (ctlr->bits_per_word_mask) { |
63ab645f SB |
2727 | /* Only 32 bits fit in the mask */ |
2728 | if (bits_per_word > 32) | |
2729 | return -EINVAL; | |
8caab75f | 2730 | if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word))) |
63ab645f SB |
2731 | return -EINVAL; |
2732 | } | |
2733 | ||
2734 | return 0; | |
2735 | } | |
2736 | ||
7d077197 DB |
2737 | /** |
2738 | * spi_setup - setup SPI mode and clock rate | |
2739 | * @spi: the device whose settings are being modified | |
2740 | * Context: can sleep, and no requests are queued to the device | |
2741 | * | |
2742 | * SPI protocol drivers may need to update the transfer mode if the | |
2743 | * device doesn't work with its default. They may likewise need | |
2744 | * to update clock rates or word sizes from initial values. This function | |
2745 | * changes those settings, and must be called from a context that can sleep. | |
2746 | * Except for SPI_CS_HIGH, which takes effect immediately, the changes take | |
2747 | * effect the next time the device is selected and data is transferred to | |
2748 | * or from it. When this function returns, the spi device is deselected. | |
2749 | * | |
2750 | * Note that this call will fail if the protocol driver specifies an option | |
2751 | * that the underlying controller or its driver does not support. For | |
2752 | * example, not all hardware supports wire transfers using nine bit words, | |
2753 | * LSB-first wire encoding, or active-high chipselects. | |
97d56dc6 JMC |
2754 | * |
2755 | * Return: zero on success, else a negative error code. | |
7d077197 DB |
2756 | */ |
2757 | int spi_setup(struct spi_device *spi) | |
2758 | { | |
83596fbe | 2759 | unsigned bad_bits, ugly_bits; |
5ab8d262 | 2760 | int status; |
7d077197 | 2761 | |
f477b7fb | 2762 | /* check mode to prevent that DUAL and QUAD set at the same time |
2763 | */ | |
2764 | if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) || | |
2765 | ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) { | |
2766 | dev_err(&spi->dev, | |
2767 | "setup: can not select dual and quad at the same time\n"); | |
2768 | return -EINVAL; | |
2769 | } | |
2770 | /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden | |
2771 | */ | |
2772 | if ((spi->mode & SPI_3WIRE) && (spi->mode & | |
2773 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD))) | |
2774 | return -EINVAL; | |
e7db06b5 | 2775 | /* help drivers fail *cleanly* when they need options |
8caab75f | 2776 | * that aren't supported with their current controller |
cbaa62e0 DL |
2777 | * SPI_CS_WORD has a fallback software implementation, |
2778 | * so it is ignored here. | |
e7db06b5 | 2779 | */ |
cbaa62e0 | 2780 | bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD); |
83596fbe GU |
2781 | ugly_bits = bad_bits & |
2782 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD); | |
2783 | if (ugly_bits) { | |
2784 | dev_warn(&spi->dev, | |
2785 | "setup: ignoring unsupported mode bits %x\n", | |
2786 | ugly_bits); | |
2787 | spi->mode &= ~ugly_bits; | |
2788 | bad_bits &= ~ugly_bits; | |
2789 | } | |
e7db06b5 | 2790 | if (bad_bits) { |
eb288a1f | 2791 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", |
e7db06b5 DB |
2792 | bad_bits); |
2793 | return -EINVAL; | |
2794 | } | |
2795 | ||
7d077197 DB |
2796 | if (!spi->bits_per_word) |
2797 | spi->bits_per_word = 8; | |
2798 | ||
8caab75f GU |
2799 | status = __spi_validate_bits_per_word(spi->controller, |
2800 | spi->bits_per_word); | |
5ab8d262 AS |
2801 | if (status) |
2802 | return status; | |
63ab645f | 2803 | |
052eb2d4 | 2804 | if (!spi->max_speed_hz) |
8caab75f | 2805 | spi->max_speed_hz = spi->controller->max_speed_hz; |
052eb2d4 | 2806 | |
8caab75f GU |
2807 | if (spi->controller->setup) |
2808 | status = spi->controller->setup(spi); | |
7d077197 | 2809 | |
abeedb01 FCJ |
2810 | spi_set_cs(spi, false); |
2811 | ||
5fe5f05e | 2812 | dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n", |
7d077197 DB |
2813 | (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), |
2814 | (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", | |
2815 | (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", | |
2816 | (spi->mode & SPI_3WIRE) ? "3wire, " : "", | |
2817 | (spi->mode & SPI_LOOP) ? "loopback, " : "", | |
2818 | spi->bits_per_word, spi->max_speed_hz, | |
2819 | status); | |
2820 | ||
2821 | return status; | |
2822 | } | |
2823 | EXPORT_SYMBOL_GPL(spi_setup); | |
2824 | ||
90808738 | 2825 | static int __spi_validate(struct spi_device *spi, struct spi_message *message) |
cf32b71e | 2826 | { |
8caab75f | 2827 | struct spi_controller *ctlr = spi->controller; |
e6811d1d | 2828 | struct spi_transfer *xfer; |
6ea31293 | 2829 | int w_size; |
cf32b71e | 2830 | |
24a0013a MB |
2831 | if (list_empty(&message->transfers)) |
2832 | return -EINVAL; | |
24a0013a | 2833 | |
cbaa62e0 DL |
2834 | /* If an SPI controller does not support toggling the CS line on each |
2835 | * transfer (indicated by the SPI_CS_WORD flag), we can emulate it by | |
2836 | * splitting transfers into one-word transfers and ensuring that | |
2837 | * cs_change is set for each transfer. | |
2838 | */ | |
2839 | if ((spi->mode & SPI_CS_WORD) && !(ctlr->mode_bits & SPI_CS_WORD)) { | |
2840 | size_t maxsize; | |
2841 | int ret; | |
2842 | ||
2843 | maxsize = (spi->bits_per_word + 7) / 8; | |
2844 | ||
2845 | /* spi_split_transfers_maxsize() requires message->spi */ | |
2846 | message->spi = spi; | |
2847 | ||
2848 | ret = spi_split_transfers_maxsize(ctlr, message, maxsize, | |
2849 | GFP_KERNEL); | |
2850 | if (ret) | |
2851 | return ret; | |
2852 | ||
2853 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
2854 | /* don't change cs_change on the last entry in the list */ | |
2855 | if (list_is_last(&xfer->transfer_list, &message->transfers)) | |
2856 | break; | |
2857 | xfer->cs_change = 1; | |
2858 | } | |
2859 | } | |
2860 | ||
cf32b71e ES |
2861 | /* Half-duplex links include original MicroWire, and ones with |
2862 | * only one data pin like SPI_3WIRE (switches direction) or where | |
2863 | * either MOSI or MISO is missing. They can also be caused by | |
2864 | * software limitations. | |
2865 | */ | |
8caab75f GU |
2866 | if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) || |
2867 | (spi->mode & SPI_3WIRE)) { | |
2868 | unsigned flags = ctlr->flags; | |
cf32b71e ES |
2869 | |
2870 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
2871 | if (xfer->rx_buf && xfer->tx_buf) | |
2872 | return -EINVAL; | |
8caab75f | 2873 | if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf) |
cf32b71e | 2874 | return -EINVAL; |
8caab75f | 2875 | if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf) |
cf32b71e ES |
2876 | return -EINVAL; |
2877 | } | |
2878 | } | |
2879 | ||
e6811d1d | 2880 | /** |
059b8ffe LD |
2881 | * Set transfer bits_per_word and max speed as spi device default if |
2882 | * it is not set for this transfer. | |
f477b7fb | 2883 | * Set transfer tx_nbits and rx_nbits as single transfer default |
2884 | * (SPI_NBITS_SINGLE) if it is not set for this transfer. | |
e6811d1d | 2885 | */ |
77e80588 | 2886 | message->frame_length = 0; |
e6811d1d | 2887 | list_for_each_entry(xfer, &message->transfers, transfer_list) { |
078726ce | 2888 | message->frame_length += xfer->len; |
e6811d1d LD |
2889 | if (!xfer->bits_per_word) |
2890 | xfer->bits_per_word = spi->bits_per_word; | |
a6f87fad AL |
2891 | |
2892 | if (!xfer->speed_hz) | |
059b8ffe | 2893 | xfer->speed_hz = spi->max_speed_hz; |
7dc9fbc3 | 2894 | if (!xfer->speed_hz) |
8caab75f | 2895 | xfer->speed_hz = ctlr->max_speed_hz; |
a6f87fad | 2896 | |
8caab75f GU |
2897 | if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz) |
2898 | xfer->speed_hz = ctlr->max_speed_hz; | |
56ede94a | 2899 | |
8caab75f | 2900 | if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word)) |
63ab645f | 2901 | return -EINVAL; |
a2fd4f9f | 2902 | |
4d94bd21 II |
2903 | /* |
2904 | * SPI transfer length should be multiple of SPI word size | |
2905 | * where SPI word size should be power-of-two multiple | |
2906 | */ | |
2907 | if (xfer->bits_per_word <= 8) | |
2908 | w_size = 1; | |
2909 | else if (xfer->bits_per_word <= 16) | |
2910 | w_size = 2; | |
2911 | else | |
2912 | w_size = 4; | |
2913 | ||
4d94bd21 | 2914 | /* No partial transfers accepted */ |
6ea31293 | 2915 | if (xfer->len % w_size) |
4d94bd21 II |
2916 | return -EINVAL; |
2917 | ||
8caab75f GU |
2918 | if (xfer->speed_hz && ctlr->min_speed_hz && |
2919 | xfer->speed_hz < ctlr->min_speed_hz) | |
a2fd4f9f | 2920 | return -EINVAL; |
f477b7fb | 2921 | |
2922 | if (xfer->tx_buf && !xfer->tx_nbits) | |
2923 | xfer->tx_nbits = SPI_NBITS_SINGLE; | |
2924 | if (xfer->rx_buf && !xfer->rx_nbits) | |
2925 | xfer->rx_nbits = SPI_NBITS_SINGLE; | |
2926 | /* check transfer tx/rx_nbits: | |
1afd9989 GU |
2927 | * 1. check the value matches one of single, dual and quad |
2928 | * 2. check tx/rx_nbits match the mode in spi_device | |
f477b7fb | 2929 | */ |
db90a441 SP |
2930 | if (xfer->tx_buf) { |
2931 | if (xfer->tx_nbits != SPI_NBITS_SINGLE && | |
2932 | xfer->tx_nbits != SPI_NBITS_DUAL && | |
2933 | xfer->tx_nbits != SPI_NBITS_QUAD) | |
2934 | return -EINVAL; | |
2935 | if ((xfer->tx_nbits == SPI_NBITS_DUAL) && | |
2936 | !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) | |
2937 | return -EINVAL; | |
2938 | if ((xfer->tx_nbits == SPI_NBITS_QUAD) && | |
2939 | !(spi->mode & SPI_TX_QUAD)) | |
2940 | return -EINVAL; | |
db90a441 | 2941 | } |
f477b7fb | 2942 | /* check transfer rx_nbits */ |
db90a441 SP |
2943 | if (xfer->rx_buf) { |
2944 | if (xfer->rx_nbits != SPI_NBITS_SINGLE && | |
2945 | xfer->rx_nbits != SPI_NBITS_DUAL && | |
2946 | xfer->rx_nbits != SPI_NBITS_QUAD) | |
2947 | return -EINVAL; | |
2948 | if ((xfer->rx_nbits == SPI_NBITS_DUAL) && | |
2949 | !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD))) | |
2950 | return -EINVAL; | |
2951 | if ((xfer->rx_nbits == SPI_NBITS_QUAD) && | |
2952 | !(spi->mode & SPI_RX_QUAD)) | |
2953 | return -EINVAL; | |
db90a441 | 2954 | } |
e6811d1d LD |
2955 | } |
2956 | ||
cf32b71e | 2957 | message->status = -EINPROGRESS; |
90808738 MB |
2958 | |
2959 | return 0; | |
2960 | } | |
2961 | ||
2962 | static int __spi_async(struct spi_device *spi, struct spi_message *message) | |
2963 | { | |
8caab75f | 2964 | struct spi_controller *ctlr = spi->controller; |
90808738 | 2965 | |
b5932f5c BB |
2966 | /* |
2967 | * Some controllers do not support doing regular SPI transfers. Return | |
2968 | * ENOTSUPP when this is the case. | |
2969 | */ | |
2970 | if (!ctlr->transfer) | |
2971 | return -ENOTSUPP; | |
2972 | ||
90808738 MB |
2973 | message->spi = spi; |
2974 | ||
8caab75f | 2975 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_async); |
eca2ebc7 MS |
2976 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_async); |
2977 | ||
90808738 MB |
2978 | trace_spi_message_submit(message); |
2979 | ||
8caab75f | 2980 | return ctlr->transfer(spi, message); |
cf32b71e ES |
2981 | } |
2982 | ||
568d0697 DB |
2983 | /** |
2984 | * spi_async - asynchronous SPI transfer | |
2985 | * @spi: device with which data will be exchanged | |
2986 | * @message: describes the data transfers, including completion callback | |
2987 | * Context: any (irqs may be blocked, etc) | |
2988 | * | |
2989 | * This call may be used in_irq and other contexts which can't sleep, | |
2990 | * as well as from task contexts which can sleep. | |
2991 | * | |
2992 | * The completion callback is invoked in a context which can't sleep. | |
2993 | * Before that invocation, the value of message->status is undefined. | |
2994 | * When the callback is issued, message->status holds either zero (to | |
2995 | * indicate complete success) or a negative error code. After that | |
2996 | * callback returns, the driver which issued the transfer request may | |
2997 | * deallocate the associated memory; it's no longer in use by any SPI | |
2998 | * core or controller driver code. | |
2999 | * | |
3000 | * Note that although all messages to a spi_device are handled in | |
3001 | * FIFO order, messages may go to different devices in other orders. | |
3002 | * Some device might be higher priority, or have various "hard" access | |
3003 | * time requirements, for example. | |
3004 | * | |
3005 | * On detection of any fault during the transfer, processing of | |
3006 | * the entire message is aborted, and the device is deselected. | |
3007 | * Until returning from the associated message completion callback, | |
3008 | * no other spi_message queued to that device will be processed. | |
3009 | * (This rule applies equally to all the synchronous transfer calls, | |
3010 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
3011 | * |
3012 | * Return: zero on success, else a negative error code. | |
568d0697 DB |
3013 | */ |
3014 | int spi_async(struct spi_device *spi, struct spi_message *message) | |
3015 | { | |
8caab75f | 3016 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
3017 | int ret; |
3018 | unsigned long flags; | |
568d0697 | 3019 | |
90808738 MB |
3020 | ret = __spi_validate(spi, message); |
3021 | if (ret != 0) | |
3022 | return ret; | |
3023 | ||
8caab75f | 3024 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
568d0697 | 3025 | |
8caab75f | 3026 | if (ctlr->bus_lock_flag) |
cf32b71e ES |
3027 | ret = -EBUSY; |
3028 | else | |
3029 | ret = __spi_async(spi, message); | |
568d0697 | 3030 | |
8caab75f | 3031 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3032 | |
3033 | return ret; | |
568d0697 DB |
3034 | } |
3035 | EXPORT_SYMBOL_GPL(spi_async); | |
3036 | ||
cf32b71e ES |
3037 | /** |
3038 | * spi_async_locked - version of spi_async with exclusive bus usage | |
3039 | * @spi: device with which data will be exchanged | |
3040 | * @message: describes the data transfers, including completion callback | |
3041 | * Context: any (irqs may be blocked, etc) | |
3042 | * | |
3043 | * This call may be used in_irq and other contexts which can't sleep, | |
3044 | * as well as from task contexts which can sleep. | |
3045 | * | |
3046 | * The completion callback is invoked in a context which can't sleep. | |
3047 | * Before that invocation, the value of message->status is undefined. | |
3048 | * When the callback is issued, message->status holds either zero (to | |
3049 | * indicate complete success) or a negative error code. After that | |
3050 | * callback returns, the driver which issued the transfer request may | |
3051 | * deallocate the associated memory; it's no longer in use by any SPI | |
3052 | * core or controller driver code. | |
3053 | * | |
3054 | * Note that although all messages to a spi_device are handled in | |
3055 | * FIFO order, messages may go to different devices in other orders. | |
3056 | * Some device might be higher priority, or have various "hard" access | |
3057 | * time requirements, for example. | |
3058 | * | |
3059 | * On detection of any fault during the transfer, processing of | |
3060 | * the entire message is aborted, and the device is deselected. | |
3061 | * Until returning from the associated message completion callback, | |
3062 | * no other spi_message queued to that device will be processed. | |
3063 | * (This rule applies equally to all the synchronous transfer calls, | |
3064 | * which are wrappers around this core asynchronous primitive.) | |
97d56dc6 JMC |
3065 | * |
3066 | * Return: zero on success, else a negative error code. | |
cf32b71e ES |
3067 | */ |
3068 | int spi_async_locked(struct spi_device *spi, struct spi_message *message) | |
3069 | { | |
8caab75f | 3070 | struct spi_controller *ctlr = spi->controller; |
cf32b71e ES |
3071 | int ret; |
3072 | unsigned long flags; | |
3073 | ||
90808738 MB |
3074 | ret = __spi_validate(spi, message); |
3075 | if (ret != 0) | |
3076 | return ret; | |
3077 | ||
8caab75f | 3078 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3079 | |
3080 | ret = __spi_async(spi, message); | |
3081 | ||
8caab75f | 3082 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
cf32b71e ES |
3083 | |
3084 | return ret; | |
3085 | ||
3086 | } | |
3087 | EXPORT_SYMBOL_GPL(spi_async_locked); | |
3088 | ||
7d077197 DB |
3089 | /*-------------------------------------------------------------------------*/ |
3090 | ||
8caab75f | 3091 | /* Utility methods for SPI protocol drivers, layered on |
7d077197 DB |
3092 | * top of the core. Some other utility methods are defined as |
3093 | * inline functions. | |
3094 | */ | |
3095 | ||
5d870c8e AM |
3096 | static void spi_complete(void *arg) |
3097 | { | |
3098 | complete(arg); | |
3099 | } | |
3100 | ||
ef4d96ec | 3101 | static int __spi_sync(struct spi_device *spi, struct spi_message *message) |
cf32b71e ES |
3102 | { |
3103 | DECLARE_COMPLETION_ONSTACK(done); | |
3104 | int status; | |
8caab75f | 3105 | struct spi_controller *ctlr = spi->controller; |
0461a414 MB |
3106 | unsigned long flags; |
3107 | ||
3108 | status = __spi_validate(spi, message); | |
3109 | if (status != 0) | |
3110 | return status; | |
cf32b71e ES |
3111 | |
3112 | message->complete = spi_complete; | |
3113 | message->context = &done; | |
0461a414 | 3114 | message->spi = spi; |
cf32b71e | 3115 | |
8caab75f | 3116 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, spi_sync); |
eca2ebc7 MS |
3117 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, spi_sync); |
3118 | ||
0461a414 MB |
3119 | /* If we're not using the legacy transfer method then we will |
3120 | * try to transfer in the calling context so special case. | |
3121 | * This code would be less tricky if we could remove the | |
3122 | * support for driver implemented message queues. | |
3123 | */ | |
8caab75f GU |
3124 | if (ctlr->transfer == spi_queued_transfer) { |
3125 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); | |
0461a414 MB |
3126 | |
3127 | trace_spi_message_submit(message); | |
3128 | ||
3129 | status = __spi_queued_transfer(spi, message, false); | |
3130 | ||
8caab75f | 3131 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); |
0461a414 MB |
3132 | } else { |
3133 | status = spi_async_locked(spi, message); | |
3134 | } | |
cf32b71e | 3135 | |
cf32b71e | 3136 | if (status == 0) { |
0461a414 MB |
3137 | /* Push out the messages in the calling context if we |
3138 | * can. | |
3139 | */ | |
8caab75f GU |
3140 | if (ctlr->transfer == spi_queued_transfer) { |
3141 | SPI_STATISTICS_INCREMENT_FIELD(&ctlr->statistics, | |
eca2ebc7 MS |
3142 | spi_sync_immediate); |
3143 | SPI_STATISTICS_INCREMENT_FIELD(&spi->statistics, | |
3144 | spi_sync_immediate); | |
8caab75f | 3145 | __spi_pump_messages(ctlr, false); |
eca2ebc7 | 3146 | } |
0461a414 | 3147 | |
cf32b71e ES |
3148 | wait_for_completion(&done); |
3149 | status = message->status; | |
3150 | } | |
3151 | message->context = NULL; | |
3152 | return status; | |
3153 | } | |
3154 | ||
8ae12a0d DB |
3155 | /** |
3156 | * spi_sync - blocking/synchronous SPI data transfers | |
3157 | * @spi: device with which data will be exchanged | |
3158 | * @message: describes the data transfers | |
33e34dc6 | 3159 | * Context: can sleep |
8ae12a0d DB |
3160 | * |
3161 | * This call may only be used from a context that may sleep. The sleep | |
3162 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3163 | * drivers may DMA directly into and out of the message buffers. | |
3164 | * | |
3165 | * Note that the SPI device's chip select is active during the message, | |
3166 | * and then is normally disabled between messages. Drivers for some | |
3167 | * frequently-used devices may want to minimize costs of selecting a chip, | |
3168 | * by leaving it selected in anticipation that the next message will go | |
3169 | * to the same chip. (That may increase power usage.) | |
3170 | * | |
0c868461 DB |
3171 | * Also, the caller is guaranteeing that the memory associated with the |
3172 | * message will not be freed before this call returns. | |
3173 | * | |
97d56dc6 | 3174 | * Return: zero on success, else a negative error code. |
8ae12a0d DB |
3175 | */ |
3176 | int spi_sync(struct spi_device *spi, struct spi_message *message) | |
3177 | { | |
ef4d96ec MB |
3178 | int ret; |
3179 | ||
8caab75f | 3180 | mutex_lock(&spi->controller->bus_lock_mutex); |
ef4d96ec | 3181 | ret = __spi_sync(spi, message); |
8caab75f | 3182 | mutex_unlock(&spi->controller->bus_lock_mutex); |
ef4d96ec MB |
3183 | |
3184 | return ret; | |
8ae12a0d DB |
3185 | } |
3186 | EXPORT_SYMBOL_GPL(spi_sync); | |
3187 | ||
cf32b71e ES |
3188 | /** |
3189 | * spi_sync_locked - version of spi_sync with exclusive bus usage | |
3190 | * @spi: device with which data will be exchanged | |
3191 | * @message: describes the data transfers | |
3192 | * Context: can sleep | |
3193 | * | |
3194 | * This call may only be used from a context that may sleep. The sleep | |
3195 | * is non-interruptible, and has no timeout. Low-overhead controller | |
3196 | * drivers may DMA directly into and out of the message buffers. | |
3197 | * | |
3198 | * This call should be used by drivers that require exclusive access to the | |
25985edc | 3199 | * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must |
cf32b71e ES |
3200 | * be released by a spi_bus_unlock call when the exclusive access is over. |
3201 | * | |
97d56dc6 | 3202 | * Return: zero on success, else a negative error code. |
cf32b71e ES |
3203 | */ |
3204 | int spi_sync_locked(struct spi_device *spi, struct spi_message *message) | |
3205 | { | |
ef4d96ec | 3206 | return __spi_sync(spi, message); |
cf32b71e ES |
3207 | } |
3208 | EXPORT_SYMBOL_GPL(spi_sync_locked); | |
3209 | ||
3210 | /** | |
3211 | * spi_bus_lock - obtain a lock for exclusive SPI bus usage | |
8caab75f | 3212 | * @ctlr: SPI bus master that should be locked for exclusive bus access |
cf32b71e ES |
3213 | * Context: can sleep |
3214 | * | |
3215 | * This call may only be used from a context that may sleep. The sleep | |
3216 | * is non-interruptible, and has no timeout. | |
3217 | * | |
3218 | * This call should be used by drivers that require exclusive access to the | |
3219 | * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the | |
3220 | * exclusive access is over. Data transfer must be done by spi_sync_locked | |
3221 | * and spi_async_locked calls when the SPI bus lock is held. | |
3222 | * | |
97d56dc6 | 3223 | * Return: always zero. |
cf32b71e | 3224 | */ |
8caab75f | 3225 | int spi_bus_lock(struct spi_controller *ctlr) |
cf32b71e ES |
3226 | { |
3227 | unsigned long flags; | |
3228 | ||
8caab75f | 3229 | mutex_lock(&ctlr->bus_lock_mutex); |
cf32b71e | 3230 | |
8caab75f GU |
3231 | spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags); |
3232 | ctlr->bus_lock_flag = 1; | |
3233 | spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags); | |
cf32b71e ES |
3234 | |
3235 | /* mutex remains locked until spi_bus_unlock is called */ | |
3236 | ||
3237 | return 0; | |
3238 | } | |
3239 | EXPORT_SYMBOL_GPL(spi_bus_lock); | |
3240 | ||
3241 | /** | |
3242 | * spi_bus_unlock - release the lock for exclusive SPI bus usage | |
8caab75f | 3243 | * @ctlr: SPI bus master that was locked for exclusive bus access |
cf32b71e ES |
3244 | * Context: can sleep |
3245 | * | |
3246 | * This call may only be used from a context that may sleep. The sleep | |
3247 | * is non-interruptible, and has no timeout. | |
3248 | * | |
3249 | * This call releases an SPI bus lock previously obtained by an spi_bus_lock | |
3250 | * call. | |
3251 | * | |
97d56dc6 | 3252 | * Return: always zero. |
cf32b71e | 3253 | */ |
8caab75f | 3254 | int spi_bus_unlock(struct spi_controller *ctlr) |
cf32b71e | 3255 | { |
8caab75f | 3256 | ctlr->bus_lock_flag = 0; |
cf32b71e | 3257 | |
8caab75f | 3258 | mutex_unlock(&ctlr->bus_lock_mutex); |
cf32b71e ES |
3259 | |
3260 | return 0; | |
3261 | } | |
3262 | EXPORT_SYMBOL_GPL(spi_bus_unlock); | |
3263 | ||
a9948b61 | 3264 | /* portable code must never pass more than 32 bytes */ |
5fe5f05e | 3265 | #define SPI_BUFSIZ max(32, SMP_CACHE_BYTES) |
8ae12a0d DB |
3266 | |
3267 | static u8 *buf; | |
3268 | ||
3269 | /** | |
3270 | * spi_write_then_read - SPI synchronous write followed by read | |
3271 | * @spi: device with which data will be exchanged | |
3272 | * @txbuf: data to be written (need not be dma-safe) | |
3273 | * @n_tx: size of txbuf, in bytes | |
27570497 JP |
3274 | * @rxbuf: buffer into which data will be read (need not be dma-safe) |
3275 | * @n_rx: size of rxbuf, in bytes | |
33e34dc6 | 3276 | * Context: can sleep |
8ae12a0d DB |
3277 | * |
3278 | * This performs a half duplex MicroWire style transaction with the | |
3279 | * device, sending txbuf and then reading rxbuf. The return value | |
3280 | * is zero for success, else a negative errno status code. | |
b885244e | 3281 | * This call may only be used from a context that may sleep. |
8ae12a0d | 3282 | * |
0c868461 | 3283 | * Parameters to this routine are always copied using a small buffer; |
33e34dc6 DB |
3284 | * portable code should never use this for more than 32 bytes. |
3285 | * Performance-sensitive or bulk transfer code should instead use | |
0c868461 | 3286 | * spi_{async,sync}() calls with dma-safe buffers. |
97d56dc6 JMC |
3287 | * |
3288 | * Return: zero on success, else a negative error code. | |
8ae12a0d DB |
3289 | */ |
3290 | int spi_write_then_read(struct spi_device *spi, | |
0c4a1590 MB |
3291 | const void *txbuf, unsigned n_tx, |
3292 | void *rxbuf, unsigned n_rx) | |
8ae12a0d | 3293 | { |
068f4070 | 3294 | static DEFINE_MUTEX(lock); |
8ae12a0d DB |
3295 | |
3296 | int status; | |
3297 | struct spi_message message; | |
bdff549e | 3298 | struct spi_transfer x[2]; |
8ae12a0d DB |
3299 | u8 *local_buf; |
3300 | ||
b3a223ee MB |
3301 | /* Use preallocated DMA-safe buffer if we can. We can't avoid |
3302 | * copying here, (as a pure convenience thing), but we can | |
3303 | * keep heap costs out of the hot path unless someone else is | |
3304 | * using the pre-allocated buffer or the transfer is too large. | |
8ae12a0d | 3305 | */ |
b3a223ee | 3306 | if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) { |
2cd94c8a MB |
3307 | local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx), |
3308 | GFP_KERNEL | GFP_DMA); | |
b3a223ee MB |
3309 | if (!local_buf) |
3310 | return -ENOMEM; | |
3311 | } else { | |
3312 | local_buf = buf; | |
3313 | } | |
8ae12a0d | 3314 | |
8275c642 | 3315 | spi_message_init(&message); |
5fe5f05e | 3316 | memset(x, 0, sizeof(x)); |
bdff549e DB |
3317 | if (n_tx) { |
3318 | x[0].len = n_tx; | |
3319 | spi_message_add_tail(&x[0], &message); | |
3320 | } | |
3321 | if (n_rx) { | |
3322 | x[1].len = n_rx; | |
3323 | spi_message_add_tail(&x[1], &message); | |
3324 | } | |
8275c642 | 3325 | |
8ae12a0d | 3326 | memcpy(local_buf, txbuf, n_tx); |
bdff549e DB |
3327 | x[0].tx_buf = local_buf; |
3328 | x[1].rx_buf = local_buf + n_tx; | |
8ae12a0d DB |
3329 | |
3330 | /* do the i/o */ | |
8ae12a0d | 3331 | status = spi_sync(spi, &message); |
9b938b74 | 3332 | if (status == 0) |
bdff549e | 3333 | memcpy(rxbuf, x[1].rx_buf, n_rx); |
8ae12a0d | 3334 | |
bdff549e | 3335 | if (x[0].tx_buf == buf) |
068f4070 | 3336 | mutex_unlock(&lock); |
8ae12a0d DB |
3337 | else |
3338 | kfree(local_buf); | |
3339 | ||
3340 | return status; | |
3341 | } | |
3342 | EXPORT_SYMBOL_GPL(spi_write_then_read); | |
3343 | ||
3344 | /*-------------------------------------------------------------------------*/ | |
3345 | ||
ce79d54a PA |
3346 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) |
3347 | static int __spi_of_device_match(struct device *dev, void *data) | |
3348 | { | |
3349 | return dev->of_node == data; | |
3350 | } | |
3351 | ||
3352 | /* must call put_device() when done with returned spi_device device */ | |
3353 | static struct spi_device *of_find_spi_device_by_node(struct device_node *node) | |
3354 | { | |
3355 | struct device *dev = bus_find_device(&spi_bus_type, NULL, node, | |
3356 | __spi_of_device_match); | |
3357 | return dev ? to_spi_device(dev) : NULL; | |
3358 | } | |
3359 | ||
8caab75f | 3360 | static int __spi_of_controller_match(struct device *dev, const void *data) |
ce79d54a PA |
3361 | { |
3362 | return dev->of_node == data; | |
3363 | } | |
3364 | ||
8caab75f GU |
3365 | /* the spi controllers are not using spi_bus, so we find it with another way */ |
3366 | static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node) | |
ce79d54a PA |
3367 | { |
3368 | struct device *dev; | |
3369 | ||
3370 | dev = class_find_device(&spi_master_class, NULL, node, | |
8caab75f | 3371 | __spi_of_controller_match); |
6c364062 GU |
3372 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3373 | dev = class_find_device(&spi_slave_class, NULL, node, | |
8caab75f | 3374 | __spi_of_controller_match); |
ce79d54a PA |
3375 | if (!dev) |
3376 | return NULL; | |
3377 | ||
3378 | /* reference got in class_find_device */ | |
8caab75f | 3379 | return container_of(dev, struct spi_controller, dev); |
ce79d54a PA |
3380 | } |
3381 | ||
3382 | static int of_spi_notify(struct notifier_block *nb, unsigned long action, | |
3383 | void *arg) | |
3384 | { | |
3385 | struct of_reconfig_data *rd = arg; | |
8caab75f | 3386 | struct spi_controller *ctlr; |
ce79d54a PA |
3387 | struct spi_device *spi; |
3388 | ||
3389 | switch (of_reconfig_get_state_change(action, arg)) { | |
3390 | case OF_RECONFIG_CHANGE_ADD: | |
8caab75f GU |
3391 | ctlr = of_find_spi_controller_by_node(rd->dn->parent); |
3392 | if (ctlr == NULL) | |
ce79d54a PA |
3393 | return NOTIFY_OK; /* not for us */ |
3394 | ||
bd6c1644 | 3395 | if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) { |
8caab75f | 3396 | put_device(&ctlr->dev); |
bd6c1644 GU |
3397 | return NOTIFY_OK; |
3398 | } | |
3399 | ||
8caab75f GU |
3400 | spi = of_register_spi_device(ctlr, rd->dn); |
3401 | put_device(&ctlr->dev); | |
ce79d54a PA |
3402 | |
3403 | if (IS_ERR(spi)) { | |
25c56c88 RH |
3404 | pr_err("%s: failed to create for '%pOF'\n", |
3405 | __func__, rd->dn); | |
e0af98a7 | 3406 | of_node_clear_flag(rd->dn, OF_POPULATED); |
ce79d54a PA |
3407 | return notifier_from_errno(PTR_ERR(spi)); |
3408 | } | |
3409 | break; | |
3410 | ||
3411 | case OF_RECONFIG_CHANGE_REMOVE: | |
bd6c1644 GU |
3412 | /* already depopulated? */ |
3413 | if (!of_node_check_flag(rd->dn, OF_POPULATED)) | |
3414 | return NOTIFY_OK; | |
3415 | ||
ce79d54a PA |
3416 | /* find our device by node */ |
3417 | spi = of_find_spi_device_by_node(rd->dn); | |
3418 | if (spi == NULL) | |
3419 | return NOTIFY_OK; /* no? not meant for us */ | |
3420 | ||
3421 | /* unregister takes one ref away */ | |
3422 | spi_unregister_device(spi); | |
3423 | ||
3424 | /* and put the reference of the find */ | |
3425 | put_device(&spi->dev); | |
3426 | break; | |
3427 | } | |
3428 | ||
3429 | return NOTIFY_OK; | |
3430 | } | |
3431 | ||
3432 | static struct notifier_block spi_of_notifier = { | |
3433 | .notifier_call = of_spi_notify, | |
3434 | }; | |
3435 | #else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3436 | extern struct notifier_block spi_of_notifier; | |
3437 | #endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */ | |
3438 | ||
7f24467f | 3439 | #if IS_ENABLED(CONFIG_ACPI) |
8caab75f | 3440 | static int spi_acpi_controller_match(struct device *dev, const void *data) |
7f24467f OP |
3441 | { |
3442 | return ACPI_COMPANION(dev->parent) == data; | |
3443 | } | |
3444 | ||
3445 | static int spi_acpi_device_match(struct device *dev, void *data) | |
3446 | { | |
3447 | return ACPI_COMPANION(dev) == data; | |
3448 | } | |
3449 | ||
8caab75f | 3450 | static struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev) |
7f24467f OP |
3451 | { |
3452 | struct device *dev; | |
3453 | ||
3454 | dev = class_find_device(&spi_master_class, NULL, adev, | |
8caab75f | 3455 | spi_acpi_controller_match); |
6c364062 GU |
3456 | if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE)) |
3457 | dev = class_find_device(&spi_slave_class, NULL, adev, | |
8caab75f | 3458 | spi_acpi_controller_match); |
7f24467f OP |
3459 | if (!dev) |
3460 | return NULL; | |
3461 | ||
8caab75f | 3462 | return container_of(dev, struct spi_controller, dev); |
7f24467f OP |
3463 | } |
3464 | ||
3465 | static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev) | |
3466 | { | |
3467 | struct device *dev; | |
3468 | ||
3469 | dev = bus_find_device(&spi_bus_type, NULL, adev, spi_acpi_device_match); | |
3470 | ||
3471 | return dev ? to_spi_device(dev) : NULL; | |
3472 | } | |
3473 | ||
3474 | static int acpi_spi_notify(struct notifier_block *nb, unsigned long value, | |
3475 | void *arg) | |
3476 | { | |
3477 | struct acpi_device *adev = arg; | |
8caab75f | 3478 | struct spi_controller *ctlr; |
7f24467f OP |
3479 | struct spi_device *spi; |
3480 | ||
3481 | switch (value) { | |
3482 | case ACPI_RECONFIG_DEVICE_ADD: | |
8caab75f GU |
3483 | ctlr = acpi_spi_find_controller_by_adev(adev->parent); |
3484 | if (!ctlr) | |
7f24467f OP |
3485 | break; |
3486 | ||
8caab75f GU |
3487 | acpi_register_spi_device(ctlr, adev); |
3488 | put_device(&ctlr->dev); | |
7f24467f OP |
3489 | break; |
3490 | case ACPI_RECONFIG_DEVICE_REMOVE: | |
3491 | if (!acpi_device_enumerated(adev)) | |
3492 | break; | |
3493 | ||
3494 | spi = acpi_spi_find_device_by_adev(adev); | |
3495 | if (!spi) | |
3496 | break; | |
3497 | ||
3498 | spi_unregister_device(spi); | |
3499 | put_device(&spi->dev); | |
3500 | break; | |
3501 | } | |
3502 | ||
3503 | return NOTIFY_OK; | |
3504 | } | |
3505 | ||
3506 | static struct notifier_block spi_acpi_notifier = { | |
3507 | .notifier_call = acpi_spi_notify, | |
3508 | }; | |
3509 | #else | |
3510 | extern struct notifier_block spi_acpi_notifier; | |
3511 | #endif | |
3512 | ||
8ae12a0d DB |
3513 | static int __init spi_init(void) |
3514 | { | |
b885244e DB |
3515 | int status; |
3516 | ||
e94b1766 | 3517 | buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); |
b885244e DB |
3518 | if (!buf) { |
3519 | status = -ENOMEM; | |
3520 | goto err0; | |
3521 | } | |
3522 | ||
3523 | status = bus_register(&spi_bus_type); | |
3524 | if (status < 0) | |
3525 | goto err1; | |
8ae12a0d | 3526 | |
b885244e DB |
3527 | status = class_register(&spi_master_class); |
3528 | if (status < 0) | |
3529 | goto err2; | |
ce79d54a | 3530 | |
6c364062 GU |
3531 | if (IS_ENABLED(CONFIG_SPI_SLAVE)) { |
3532 | status = class_register(&spi_slave_class); | |
3533 | if (status < 0) | |
3534 | goto err3; | |
3535 | } | |
3536 | ||
5267720e | 3537 | if (IS_ENABLED(CONFIG_OF_DYNAMIC)) |
ce79d54a | 3538 | WARN_ON(of_reconfig_notifier_register(&spi_of_notifier)); |
7f24467f OP |
3539 | if (IS_ENABLED(CONFIG_ACPI)) |
3540 | WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier)); | |
ce79d54a | 3541 | |
8ae12a0d | 3542 | return 0; |
b885244e | 3543 | |
6c364062 GU |
3544 | err3: |
3545 | class_unregister(&spi_master_class); | |
b885244e DB |
3546 | err2: |
3547 | bus_unregister(&spi_bus_type); | |
3548 | err1: | |
3549 | kfree(buf); | |
3550 | buf = NULL; | |
3551 | err0: | |
3552 | return status; | |
8ae12a0d | 3553 | } |
b885244e | 3554 | |
8ae12a0d DB |
3555 | /* board_info is normally registered in arch_initcall(), |
3556 | * but even essential drivers wait till later | |
b885244e DB |
3557 | * |
3558 | * REVISIT only boardinfo really needs static linking. the rest (device and | |
3559 | * driver registration) _could_ be dynamically linked (modular) ... costs | |
3560 | * include needing to have boardinfo data structures be much more public. | |
8ae12a0d | 3561 | */ |
673c0c00 | 3562 | postcore_initcall(spi_init); |
8ae12a0d | 3563 |