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Merge tag 'sound-fix-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[linux-2.6-block.git] / drivers / spi / spi.c
CommitLineData
b445bfcb 1// SPDX-License-Identifier: GPL-2.0-or-later
787f4889
MB		 2// SPI init/core code
3//
4// Copyright (C) 2005 David Brownell
5// Copyright (C) 2008 Secret Lab Technologies Ltd.
8ae12a0d 6
edf6a864 7#include <linux/acpi.h>
8ae12a0d 8#include <linux/cache.h>
edf6a864
AS		 9#include <linux/clk/clk-conf.h>
10#include <linux/delay.h>
11#include <linux/device.h>
99adef31 12#include <linux/dmaengine.h>
edf6a864
AS		 13#include <linux/dma-mapping.h>
14#include <linux/export.h>
15#include <linux/gpio/consumer.h>
16#include <linux/highmem.h>
17#include <linux/idr.h>
18#include <linux/init.h>
19#include <linux/ioport.h>
20#include <linux/kernel.h>
21#include <linux/kthread.h>
22#include <linux/mod_devicetable.h>
94040828 23#include <linux/mutex.h>
2b7a32f7 24#include <linux/of_device.h>
d57a4282 25#include <linux/of_irq.h>
edf6a864
AS		 26#include <linux/percpu.h>
27#include <linux/platform_data/x86/apple.h>
f48c767c 28#include <linux/pm_domain.h>
edf6a864 29#include <linux/pm_runtime.h>
826cf175 30#include <linux/property.h>
edf6a864 31#include <linux/ptp_clock_kernel.h>
8bd75c77 32#include <linux/sched/rt.h>
edf6a864
AS		 33#include <linux/slab.h>
34#include <linux/spi/spi.h>
35#include <linux/spi/spi-mem.h>
ae7e81c0 36#include <uapi/linux/sched/types.h>
8ae12a0d 37
56ec1978
MB		 38#define CREATE_TRACE_POINTS
39#include <trace/events/spi.h>
ca1438dc
AB		 40EXPORT_TRACEPOINT_SYMBOL(spi_transfer_start);
41EXPORT_TRACEPOINT_SYMBOL(spi_transfer_stop);
9b61e302 42
46336966
BB		 43#include "internals.h"
44
9b61e302 45static DEFINE_IDR(spi_master_idr);
56ec1978 46
8ae12a0d
DB		 47static void spidev_release(struct device *dev)
48{
0ffa0285 49 struct spi_device *spi = to_spi_device(dev);
8ae12a0d 50
8caab75f 51 spi_controller_put(spi->controller);
5039563e 52 kfree(spi->driver_override);
6598b91b 53 free_percpu(spi->pcpu_statistics);
07a389fe 54 kfree(spi);
8ae12a0d
DB		 55}
56
57static ssize_t
58modalias_show(struct device *dev, struct device_attribute *a, char *buf)
59{
60 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 61 int len;
62
63 len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1);
64 if (len != -ENODEV)
65 return len;
8ae12a0d 66
f2daa466 67 return sysfs_emit(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d 68}
aa7da564 69static DEVICE_ATTR_RO(modalias);
8ae12a0d 70
5039563e
TP		 71static ssize_t driver_override_store(struct device *dev,
72 struct device_attribute *a,
73 const char *buf, size_t count)
74{
75 struct spi_device *spi = to_spi_device(dev);
19368f0f 76 int ret;
5039563e 77
19368f0f
KK		 78 ret = driver_set_override(dev, &spi->driver_override, buf, count);
79 if (ret)
80 return ret;
5039563e
TP		 81
82 return count;
83}
84
85static ssize_t driver_override_show(struct device *dev,
86 struct device_attribute *a, char *buf)
87{
88 const struct spi_device *spi = to_spi_device(dev);
89 ssize_t len;
90
91 device_lock(dev);
f2daa466 92 len = sysfs_emit(buf, "%s\n", spi->driver_override ? : "");
5039563e
TP		 93 device_unlock(dev);
94 return len;
95}
96static DEVICE_ATTR_RW(driver_override);
97
d501cc4c 98static struct spi_statistics __percpu *spi_alloc_pcpu_stats(struct device *dev)
6598b91b
DJ		 99{
100 struct spi_statistics __percpu *pcpu_stats;
101
102 if (dev)
103 pcpu_stats = devm_alloc_percpu(dev, struct spi_statistics);
104 else
105 pcpu_stats = alloc_percpu_gfp(struct spi_statistics, GFP_KERNEL);
106
107 if (pcpu_stats) {
108 int cpu;
109
110 for_each_possible_cpu(cpu) {
111 struct spi_statistics *stat;
112
113 stat = per_cpu_ptr(pcpu_stats, cpu);
114 u64_stats_init(&stat->syncp);
115 }
116 }
117 return pcpu_stats;
118}
119
fc12d4bb
GU		 120static ssize_t spi_emit_pcpu_stats(struct spi_statistics __percpu *stat,
121 char *buf, size_t offset)
122{
123 u64 val = 0;
124 int i;
125
126 for_each_possible_cpu(i) {
127 const struct spi_statistics *pcpu_stats;
128 u64_stats_t *field;
129 unsigned int start;
130 u64 inc;
131
132 pcpu_stats = per_cpu_ptr(stat, i);
133 field = (void *)pcpu_stats + offset;
134 do {
135 start = u64_stats_fetch_begin(&pcpu_stats->syncp);
136 inc = u64_stats_read(field);
137 } while (u64_stats_fetch_retry(&pcpu_stats->syncp, start));
138 val += inc;
139 }
140 return sysfs_emit(buf, "%llu\n", val);
141}
6598b91b 142
eca2ebc7 143#define SPI_STATISTICS_ATTRS(field, file) \
8caab75f
GU		 144static ssize_t spi_controller_##field##_show(struct device *dev, \
145 struct device_attribute *attr, \
146 char *buf) \
eca2ebc7 147{ \
8caab75f
GU		 148 struct spi_controller *ctlr = container_of(dev, \
149 struct spi_controller, dev); \
6598b91b 150 return spi_statistics_##field##_show(ctlr->pcpu_statistics, buf); \
eca2ebc7 151} \
8caab75f 152static struct device_attribute dev_attr_spi_controller_##field = { \
ad25c92e 153 .attr = { .name = file, .mode = 0444 }, \
8caab75f 154 .show = spi_controller_##field##_show, \
eca2ebc7
MS		 155}; \
156static ssize_t spi_device_##field##_show(struct device *dev, \
157 struct device_attribute *attr, \
158 char *buf) \
159{ \
d1eba93b 160 struct spi_device *spi = to_spi_device(dev); \
6598b91b 161 return spi_statistics_##field##_show(spi->pcpu_statistics, buf); \
eca2ebc7
MS		 162} \
163static struct device_attribute dev_attr_spi_device_##field = { \
ad25c92e 164 .attr = { .name = file, .mode = 0444 }, \
eca2ebc7
MS		 165 .show = spi_device_##field##_show, \
166}
167
6598b91b 168#define SPI_STATISTICS_SHOW_NAME(name, file, field) \
d501cc4c 169static ssize_t spi_statistics_##name##_show(struct spi_statistics __percpu *stat, \
eca2ebc7
MS		 170 char *buf) \
171{ \
fc12d4bb
GU		 172 return spi_emit_pcpu_stats(stat, buf, \
173 offsetof(struct spi_statistics, field)); \
eca2ebc7
MS		 174} \
175SPI_STATISTICS_ATTRS(name, file)
176
6598b91b 177#define SPI_STATISTICS_SHOW(field) \
eca2ebc7 178 SPI_STATISTICS_SHOW_NAME(field, __stringify(field), \
6598b91b 179 field)
eca2ebc7 180
6598b91b
DJ		 181SPI_STATISTICS_SHOW(messages);
182SPI_STATISTICS_SHOW(transfers);
183SPI_STATISTICS_SHOW(errors);
184SPI_STATISTICS_SHOW(timedout);
eca2ebc7 185
6598b91b
DJ		 186SPI_STATISTICS_SHOW(spi_sync);
187SPI_STATISTICS_SHOW(spi_sync_immediate);
188SPI_STATISTICS_SHOW(spi_async);
eca2ebc7 189
6598b91b
DJ		 190SPI_STATISTICS_SHOW(bytes);
191SPI_STATISTICS_SHOW(bytes_rx);
192SPI_STATISTICS_SHOW(bytes_tx);
eca2ebc7 193
6b7bc061
MS		 194#define SPI_STATISTICS_TRANSFER_BYTES_HISTO(index, number) \
195 SPI_STATISTICS_SHOW_NAME(transfer_bytes_histo##index, \
196 "transfer_bytes_histo_" number, \
6598b91b 197 transfer_bytes_histo[index])
6b7bc061
MS		 198SPI_STATISTICS_TRANSFER_BYTES_HISTO(0, "0-1");
199SPI_STATISTICS_TRANSFER_BYTES_HISTO(1, "2-3");
200SPI_STATISTICS_TRANSFER_BYTES_HISTO(2, "4-7");
201SPI_STATISTICS_TRANSFER_BYTES_HISTO(3, "8-15");
202SPI_STATISTICS_TRANSFER_BYTES_HISTO(4, "16-31");
203SPI_STATISTICS_TRANSFER_BYTES_HISTO(5, "32-63");
204SPI_STATISTICS_TRANSFER_BYTES_HISTO(6, "64-127");
205SPI_STATISTICS_TRANSFER_BYTES_HISTO(7, "128-255");
206SPI_STATISTICS_TRANSFER_BYTES_HISTO(8, "256-511");
207SPI_STATISTICS_TRANSFER_BYTES_HISTO(9, "512-1023");
208SPI_STATISTICS_TRANSFER_BYTES_HISTO(10, "1024-2047");
209SPI_STATISTICS_TRANSFER_BYTES_HISTO(11, "2048-4095");
210SPI_STATISTICS_TRANSFER_BYTES_HISTO(12, "4096-8191");
211SPI_STATISTICS_TRANSFER_BYTES_HISTO(13, "8192-16383");
212SPI_STATISTICS_TRANSFER_BYTES_HISTO(14, "16384-32767");
213SPI_STATISTICS_TRANSFER_BYTES_HISTO(15, "32768-65535");
214SPI_STATISTICS_TRANSFER_BYTES_HISTO(16, "65536+");
215
6598b91b 216SPI_STATISTICS_SHOW(transfers_split_maxsize);
d9f12122 217
aa7da564
GKH		 218static struct attribute *spi_dev_attrs[] = {
219 &dev_attr_modalias.attr,
5039563e 220 &dev_attr_driver_override.attr,
aa7da564 221 NULL,
8ae12a0d 222};
eca2ebc7
MS		 223
224static const struct attribute_group spi_dev_group = {
225 .attrs = spi_dev_attrs,
226};
227
228static struct attribute *spi_device_statistics_attrs[] = {
229 &dev_attr_spi_device_messages.attr,
230 &dev_attr_spi_device_transfers.attr,
231 &dev_attr_spi_device_errors.attr,
232 &dev_attr_spi_device_timedout.attr,
233 &dev_attr_spi_device_spi_sync.attr,
234 &dev_attr_spi_device_spi_sync_immediate.attr,
235 &dev_attr_spi_device_spi_async.attr,
236 &dev_attr_spi_device_bytes.attr,
237 &dev_attr_spi_device_bytes_rx.attr,
238 &dev_attr_spi_device_bytes_tx.attr,
6b7bc061
MS		 239 &dev_attr_spi_device_transfer_bytes_histo0.attr,
240 &dev_attr_spi_device_transfer_bytes_histo1.attr,
241 &dev_attr_spi_device_transfer_bytes_histo2.attr,
242 &dev_attr_spi_device_transfer_bytes_histo3.attr,
243 &dev_attr_spi_device_transfer_bytes_histo4.attr,
244 &dev_attr_spi_device_transfer_bytes_histo5.attr,
245 &dev_attr_spi_device_transfer_bytes_histo6.attr,
246 &dev_attr_spi_device_transfer_bytes_histo7.attr,
247 &dev_attr_spi_device_transfer_bytes_histo8.attr,
248 &dev_attr_spi_device_transfer_bytes_histo9.attr,
249 &dev_attr_spi_device_transfer_bytes_histo10.attr,
250 &dev_attr_spi_device_transfer_bytes_histo11.attr,
251 &dev_attr_spi_device_transfer_bytes_histo12.attr,
252 &dev_attr_spi_device_transfer_bytes_histo13.attr,
253 &dev_attr_spi_device_transfer_bytes_histo14.attr,
254 &dev_attr_spi_device_transfer_bytes_histo15.attr,
255 &dev_attr_spi_device_transfer_bytes_histo16.attr,
d9f12122 256 &dev_attr_spi_device_transfers_split_maxsize.attr,
eca2ebc7
MS		 257 NULL,
258};
259
260static const struct attribute_group spi_device_statistics_group = {
261 .name = "statistics",
262 .attrs = spi_device_statistics_attrs,
263};
264
265static const struct attribute_group *spi_dev_groups[] = {
266 &spi_dev_group,
267 &spi_device_statistics_group,
268 NULL,
269};
270
8caab75f
GU		 271static struct attribute *spi_controller_statistics_attrs[] = {
272 &dev_attr_spi_controller_messages.attr,
273 &dev_attr_spi_controller_transfers.attr,
274 &dev_attr_spi_controller_errors.attr,
275 &dev_attr_spi_controller_timedout.attr,
276 &dev_attr_spi_controller_spi_sync.attr,
277 &dev_attr_spi_controller_spi_sync_immediate.attr,
278 &dev_attr_spi_controller_spi_async.attr,
279 &dev_attr_spi_controller_bytes.attr,
280 &dev_attr_spi_controller_bytes_rx.attr,
281 &dev_attr_spi_controller_bytes_tx.attr,
282 &dev_attr_spi_controller_transfer_bytes_histo0.attr,
283 &dev_attr_spi_controller_transfer_bytes_histo1.attr,
284 &dev_attr_spi_controller_transfer_bytes_histo2.attr,
285 &dev_attr_spi_controller_transfer_bytes_histo3.attr,
286 &dev_attr_spi_controller_transfer_bytes_histo4.attr,
287 &dev_attr_spi_controller_transfer_bytes_histo5.attr,
288 &dev_attr_spi_controller_transfer_bytes_histo6.attr,
289 &dev_attr_spi_controller_transfer_bytes_histo7.attr,
290 &dev_attr_spi_controller_transfer_bytes_histo8.attr,
291 &dev_attr_spi_controller_transfer_bytes_histo9.attr,
292 &dev_attr_spi_controller_transfer_bytes_histo10.attr,
293 &dev_attr_spi_controller_transfer_bytes_histo11.attr,
294 &dev_attr_spi_controller_transfer_bytes_histo12.attr,
295 &dev_attr_spi_controller_transfer_bytes_histo13.attr,
296 &dev_attr_spi_controller_transfer_bytes_histo14.attr,
297 &dev_attr_spi_controller_transfer_bytes_histo15.attr,
298 &dev_attr_spi_controller_transfer_bytes_histo16.attr,
299 &dev_attr_spi_controller_transfers_split_maxsize.attr,
eca2ebc7
MS		 300 NULL,
301};
302
8caab75f 303static const struct attribute_group spi_controller_statistics_group = {
eca2ebc7 304 .name = "statistics",
8caab75f 305 .attrs = spi_controller_statistics_attrs,
eca2ebc7
MS		 306};
307
308static const struct attribute_group *spi_master_groups[] = {
8caab75f 309 &spi_controller_statistics_group,
eca2ebc7
MS		 310 NULL,
311};
312
d501cc4c 313static void spi_statistics_add_transfer_stats(struct spi_statistics __percpu *pcpu_stats,
da21fde0
UKK		 314 struct spi_transfer *xfer,
315 struct spi_controller *ctlr)
eca2ebc7 316{
6b7bc061 317 int l2len = min(fls(xfer->len), SPI_STATISTICS_HISTO_SIZE) - 1;
67b9d641 318 struct spi_statistics *stats;
6b7bc061
MS		 319
320 if (l2len < 0)
321 l2len = 0;
eca2ebc7 322
67b9d641
DJ		 323 get_cpu();
324 stats = this_cpu_ptr(pcpu_stats);
6598b91b 325 u64_stats_update_begin(&stats->syncp);
eca2ebc7 326
6598b91b
DJ		 327 u64_stats_inc(&stats->transfers);
328 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
eca2ebc7 329
6598b91b 330 u64_stats_add(&stats->bytes, xfer->len);
eca2ebc7 331 if ((xfer->tx_buf) &&
8caab75f 332 (xfer->tx_buf != ctlr->dummy_tx))
6598b91b 333 u64_stats_add(&stats->bytes_tx, xfer->len);
eca2ebc7 334 if ((xfer->rx_buf) &&
8caab75f 335 (xfer->rx_buf != ctlr->dummy_rx))
6598b91b 336 u64_stats_add(&stats->bytes_rx, xfer->len);
eca2ebc7 337
6598b91b 338 u64_stats_update_end(&stats->syncp);
67b9d641 339 put_cpu();
eca2ebc7 340}
8ae12a0d 341
350de7ce
AS		 342/*
343 * modalias support makes "modprobe $MODALIAS" new-style hotplug work,
8ae12a0d
DB		 344 * and the sysfs version makes coldplug work too.
345 */
3f076575 346static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, const char *name)
75368bf6
AV		 347{
348 while (id->name[0]) {
3f076575 349 if (!strcmp(name, id->name))
75368bf6
AV		 350 return id;
351 id++;
352 }
353 return NULL;
354}
355
356const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev)
357{
358 const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver);
359
3f076575 360 return spi_match_id(sdrv->id_table, sdev->modalias);
75368bf6
AV		 361}
362EXPORT_SYMBOL_GPL(spi_get_device_id);
363
aea672d0
AS		 364const void *spi_get_device_match_data(const struct spi_device *sdev)
365{
366 const void *match;
367
368 match = device_get_match_data(&sdev->dev);
369 if (match)
370 return match;
371
372 return (const void *)spi_get_device_id(sdev)->driver_data;
373}
374EXPORT_SYMBOL_GPL(spi_get_device_match_data);
375
8ae12a0d
DB		 376static int spi_match_device(struct device *dev, struct device_driver *drv)
377{
378 const struct spi_device *spi = to_spi_device(dev);
75368bf6
AV		 379 const struct spi_driver *sdrv = to_spi_driver(drv);
380
5039563e
TP		 381 /* Check override first, and if set, only use the named driver */
382 if (spi->driver_override)
383 return strcmp(spi->driver_override, drv->name) == 0;
384
2b7a32f7
SA		 385 /* Attempt an OF style match */
386 if (of_driver_match_device(dev, drv))
387 return 1;
388
64bee4d2
MW		 389 /* Then try ACPI */
390 if (acpi_driver_match_device(dev, drv))
391 return 1;
392
75368bf6 393 if (sdrv->id_table)
3f076575 394 return !!spi_match_id(sdrv->id_table, spi->modalias);
8ae12a0d 395
35f74fca 396 return strcmp(spi->modalias, drv->name) == 0;
8ae12a0d
DB		 397}
398
2a81ada3 399static int spi_uevent(const struct device *dev, struct kobj_uevent_env *env)
8ae12a0d
DB		 400{
401 const struct spi_device *spi = to_spi_device(dev);
8c4ff6d0
ZR		 402 int rc;
403
404 rc = acpi_device_uevent_modalias(dev, env);
405 if (rc != -ENODEV)
406 return rc;
8ae12a0d 407
2856670f 408 return add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias);
8ae12a0d
DB		 409}
410
9db34ee6 411static int spi_probe(struct device *dev)
b885244e
DB		 412{
413 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
44af7927 414 struct spi_device *spi = to_spi_device(dev);
33cf00e5
MW		 415 int ret;
416
86be408b
SN		 417 ret = of_clk_set_defaults(dev->of_node, false);
418 if (ret)
419 return ret;
420
44af7927
JH		 421 if (dev->of_node) {
422 spi->irq = of_irq_get(dev->of_node, 0);
423 if (spi->irq == -EPROBE_DEFER)
424 return -EPROBE_DEFER;
425 if (spi->irq < 0)
426 spi->irq = 0;
427 }
428
676e7c25 429 ret = dev_pm_domain_attach(dev, true);
71f277a7
UH		 430 if (ret)
431 return ret;
432
440408db
UKK		 433 if (sdrv->probe) {
434 ret = sdrv->probe(spi);
435 if (ret)
436 dev_pm_domain_detach(dev, true);
437 }
b885244e 438
33cf00e5 439 return ret;
b885244e
DB		 440}
441
fc7a6209 442static void spi_remove(struct device *dev)
b885244e
DB		 443{
444 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
33cf00e5 445
a0386bba
UKK		 446 if (sdrv->remove)
447 sdrv->remove(to_spi_device(dev));
7795d475 448
676e7c25 449 dev_pm_domain_detach(dev, true);
b885244e
DB		 450}
451
9db34ee6 452static void spi_shutdown(struct device *dev)
b885244e 453{
a6f483b2
MS		 454 if (dev->driver) {
455 const struct spi_driver *sdrv = to_spi_driver(dev->driver);
b885244e 456
a6f483b2
MS		 457 if (sdrv->shutdown)
458 sdrv->shutdown(to_spi_device(dev));
459 }
b885244e
DB		 460}
461
9db34ee6
UKK		 462struct bus_type spi_bus_type = {
463 .name = "spi",
464 .dev_groups = spi_dev_groups,
465 .match = spi_match_device,
466 .uevent = spi_uevent,
467 .probe = spi_probe,
468 .remove = spi_remove,
469 .shutdown = spi_shutdown,
470};
471EXPORT_SYMBOL_GPL(spi_bus_type);
472
33e34dc6 473/**
ca5d2485 474 * __spi_register_driver - register a SPI driver
88c9321d 475 * @owner: owner module of the driver to register
33e34dc6
DB		 476 * @sdrv: the driver to register
477 * Context: can sleep
97d56dc6
JMC		 478 *
479 * Return: zero on success, else a negative error code.
33e34dc6 480 */
ca5d2485 481int __spi_register_driver(struct module *owner, struct spi_driver *sdrv)
b885244e 482{
ca5d2485 483 sdrv->driver.owner = owner;
b885244e 484 sdrv->driver.bus = &spi_bus_type;
5fa6863b
MB		 485
486 /*
487 * For Really Good Reasons we use spi: modaliases not of:
488 * modaliases for DT so module autoloading won't work if we
489 * don't have a spi_device_id as well as a compatible string.
490 */
491 if (sdrv->driver.of_match_table) {
492 const struct of_device_id *of_id;
493
494 for (of_id = sdrv->driver.of_match_table; of_id->compatible[0];
495 of_id++) {
496 const char *of_name;
497
498 /* Strip off any vendor prefix */
499 of_name = strnchr(of_id->compatible,
500 sizeof(of_id->compatible), ',');
501 if (of_name)
502 of_name++;
503 else
504 of_name = of_id->compatible;
505
506 if (sdrv->id_table) {
507 const struct spi_device_id *spi_id;
508
3f076575 509 spi_id = spi_match_id(sdrv->id_table, of_name);
b79332ef 510 if (spi_id)
5fa6863b
MB		 511 continue;
512 } else {
513 if (strcmp(sdrv->driver.name, of_name) == 0)
514 continue;
515 }
516
517 pr_warn("SPI driver %s has no spi_device_id for %s\n",
518 sdrv->driver.name, of_id->compatible);
519 }
520 }
521
b885244e
DB		 522 return driver_register(&sdrv->driver);
523}
ca5d2485 524EXPORT_SYMBOL_GPL(__spi_register_driver);
b885244e 525
8ae12a0d
DB		 526/*-------------------------------------------------------------------------*/
527
350de7ce
AS		 528/*
529 * SPI devices should normally not be created by SPI device drivers; that
8caab75f 530 * would make them board-specific. Similarly with SPI controller drivers.
8ae12a0d
DB		 531 * Device registration normally goes into like arch/.../mach.../board-YYY.c
532 * with other readonly (flashable) information about mainboard devices.
533 */
534
535struct boardinfo {
536 struct list_head list;
2b9603a0 537 struct spi_board_info board_info;
8ae12a0d
DB		 538};
539
540static LIST_HEAD(board_list);
8caab75f 541static LIST_HEAD(spi_controller_list);
2b9603a0
FT		 542
543/*
be73e323 544 * Used to protect add/del operation for board_info list and
350de7ce
AS		 545 * spi_controller list, and their matching process also used
546 * to protect object of type struct idr.
2b9603a0 547 */
94040828 548static DEFINE_MUTEX(board_lock);
8ae12a0d 549
dc87c98e
GL		 550/**
551 * spi_alloc_device - Allocate a new SPI device
8caab75f 552 * @ctlr: Controller to which device is connected
dc87c98e
GL		 553 * Context: can sleep
554 *
555 * Allows a driver to allocate and initialize a spi_device without
556 * registering it immediately. This allows a driver to directly
557 * fill the spi_device with device parameters before calling
558 * spi_add_device() on it.
559 *
560 * Caller is responsible to call spi_add_device() on the returned
8caab75f 561 * spi_device structure to add it to the SPI controller. If the caller
dc87c98e
GL		 562 * needs to discard the spi_device without adding it, then it should
563 * call spi_dev_put() on it.
564 *
97d56dc6 565 * Return: a pointer to the new device, or NULL.
dc87c98e 566 */
e3dc1399 567struct spi_device *spi_alloc_device(struct spi_controller *ctlr)
dc87c98e
GL		 568{
569 struct spi_device *spi;
dc87c98e 570
8caab75f 571 if (!spi_controller_get(ctlr))
dc87c98e
GL		 572 return NULL;
573
5fe5f05e 574 spi = kzalloc(sizeof(*spi), GFP_KERNEL);
dc87c98e 575 if (!spi) {
8caab75f 576 spi_controller_put(ctlr);
dc87c98e
GL		 577 return NULL;
578 }
579
6598b91b
DJ		 580 spi->pcpu_statistics = spi_alloc_pcpu_stats(NULL);
581 if (!spi->pcpu_statistics) {
582 kfree(spi);
583 spi_controller_put(ctlr);
584 return NULL;
585 }
586
8caab75f
GU		 587 spi->master = spi->controller = ctlr;
588 spi->dev.parent = &ctlr->dev;
dc87c98e
GL		 589 spi->dev.bus = &spi_bus_type;
590 spi->dev.release = spidev_release;
ea235786 591 spi->mode = ctlr->buswidth_override_bits;
eca2ebc7 592
dc87c98e
GL		 593 device_initialize(&spi->dev);
594 return spi;
595}
e3dc1399 596EXPORT_SYMBOL_GPL(spi_alloc_device);
dc87c98e 597
e13ac47b
JN		 598static void spi_dev_set_name(struct spi_device *spi)
599{
600 struct acpi_device *adev = ACPI_COMPANION(&spi->dev);
601
602 if (adev) {
603 dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev));
604 return;
605 }
606
8caab75f 607 dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->controller->dev),
303feb3c 608 spi_get_chipselect(spi, 0));
e13ac47b
JN		 609}
610
b6fb8d3a
MW		 611static int spi_dev_check(struct device *dev, void *data)
612{
613 struct spi_device *spi = to_spi_device(dev);
614 struct spi_device *new_spi = data;
4d8ff6b0
AKM		 615 int idx, nw_idx;
616 u8 cs, cs_nw;
617
618 if (spi->controller == new_spi->controller) {
619 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
620 cs = spi_get_chipselect(spi, idx);
621 for (nw_idx = 0; nw_idx < SPI_CS_CNT_MAX; nw_idx++) {
622 cs_nw = spi_get_chipselect(new_spi, nw_idx);
623 if (cs != 0xFF && cs_nw != 0xFF && cs == cs_nw) {
624 dev_err(dev, "chipselect %d already in use\n", cs_nw);
625 return -EBUSY;
626 }
627 }
628 }
629 }
b6fb8d3a
MW		 630 return 0;
631}
632
c7299fea
SK		 633static void spi_cleanup(struct spi_device *spi)
634{
635 if (spi->controller->cleanup)
636 spi->controller->cleanup(spi);
637}
638
0c79378c 639static int __spi_add_device(struct spi_device *spi)
dc87c98e 640{
8caab75f
GU		 641 struct spi_controller *ctlr = spi->controller;
642 struct device *dev = ctlr->dev.parent;
4d8ff6b0
AKM		 643 int status, idx, nw_idx;
644 u8 cs, nw_cs;
645
646 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
647 /* Chipselects are numbered 0..max; validate. */
648 cs = spi_get_chipselect(spi, idx);
649 if (cs != 0xFF && cs >= ctlr->num_chipselect) {
650 dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, idx),
651 ctlr->num_chipselect);
652 return -EINVAL;
653 }
654 }
dc87c98e 655
4d8ff6b0
AKM		 656 /*
657 * Make sure that multiple logical CS doesn't map to the same physical CS.
658 * For example, spi->chip_select[0] != spi->chip_select[1] and so on.
659 */
660 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
661 cs = spi_get_chipselect(spi, idx);
662 for (nw_idx = idx + 1; nw_idx < SPI_CS_CNT_MAX; nw_idx++) {
663 nw_cs = spi_get_chipselect(spi, nw_idx);
664 if (cs != 0xFF && nw_cs != 0xFF && cs == nw_cs) {
665 dev_err(dev, "chipselect %d already in use\n", nw_cs);
666 return -EBUSY;
667 }
668 }
36124dea
AS		 669 }
670
671 /* Set the bus ID string */
672 spi_dev_set_name(spi);
673
6bfb15f3
UKK		 674 /*
675 * We need to make sure there's no other device with this
676 * chipselect **BEFORE** we call setup(), else we'll trash
677 * its configuration.
678 */
b6fb8d3a 679 status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
4d8ff6b0 680 if (status)
0c79378c 681 return status;
e48880e0 682
ddf75be4
LW		 683 /* Controller may unregister concurrently */
684 if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
685 !device_is_registered(&ctlr->dev)) {
0c79378c 686 return -ENODEV;
ddf75be4
LW		 687 }
688
4d8ff6b0
AKM		 689 if (ctlr->cs_gpiods) {
690 u8 cs;
691
692 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
693 cs = spi_get_chipselect(spi, idx);
694 if (cs != 0xFF)
695 spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]);
696 }
697 }
74317984 698
350de7ce
AS		 699 /*
700 * Drivers may modify this initial i/o setup, but will
e48880e0
DB		 701 * normally rely on the device being setup. Devices
702 * using SPI_CS_HIGH can't coexist well otherwise...
703 */
7d077197 704 status = spi_setup(spi);
dc87c98e 705 if (status < 0) {
eb288a1f
LW		 706 dev_err(dev, "can't setup %s, status %d\n",
707 dev_name(&spi->dev), status);
0c79378c 708 return status;
dc87c98e
GL		 709 }
710
e48880e0 711 /* Device may be bound to an active driver when this returns */
dc87c98e 712 status = device_add(&spi->dev);
c7299fea 713 if (status < 0) {
eb288a1f
LW		 714 dev_err(dev, "can't add %s, status %d\n",
715 dev_name(&spi->dev), status);
c7299fea
SK		 716 spi_cleanup(spi);
717 } else {
35f74fca 718 dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev));
c7299fea 719 }
dc87c98e 720
0c79378c
SR		 721 return status;
722}
723
724/**
725 * spi_add_device - Add spi_device allocated with spi_alloc_device
726 * @spi: spi_device to register
727 *
728 * Companion function to spi_alloc_device. Devices allocated with
702ca026 729 * spi_alloc_device can be added onto the SPI bus with this function.
0c79378c
SR		 730 *
731 * Return: 0 on success; negative errno on failure
732 */
e3dc1399 733int spi_add_device(struct spi_device *spi)
0c79378c
SR		 734{
735 struct spi_controller *ctlr = spi->controller;
0c79378c
SR		 736 int status;
737
4d8ff6b0
AKM		 738 /* Set the bus ID string */
739 spi_dev_set_name(spi);
740
6098475d 741 mutex_lock(&ctlr->add_lock);
0c79378c 742 status = __spi_add_device(spi);
6098475d 743 mutex_unlock(&ctlr->add_lock);
e48880e0 744 return status;
dc87c98e 745}
e3dc1399 746EXPORT_SYMBOL_GPL(spi_add_device);
8ae12a0d 747
33e34dc6
DB		 748/**
749 * spi_new_device - instantiate one new SPI device
8caab75f 750 * @ctlr: Controller to which device is connected
33e34dc6
DB		 751 * @chip: Describes the SPI device
752 * Context: can sleep
753 *
754 * On typical mainboards, this is purely internal; and it's not needed
8ae12a0d
DB		 755 * after board init creates the hard-wired devices. Some development
756 * platforms may not be able to use spi_register_board_info though, and
757 * this is exported so that for example a USB or parport based adapter
758 * driver could add devices (which it would learn about out-of-band).
082c8cb4 759 *
97d56dc6 760 * Return: the new device, or NULL.
8ae12a0d 761 */
8caab75f 762struct spi_device *spi_new_device(struct spi_controller *ctlr,
e9d5a461 763 struct spi_board_info *chip)
8ae12a0d
DB		 764{
765 struct spi_device *proxy;
8ae12a0d 766 int status;
4d8ff6b0 767 u8 idx;
8ae12a0d 768
350de7ce
AS		 769 /*
770 * NOTE: caller did any chip->bus_num checks necessary.
082c8cb4
DB		 771 *
772 * Also, unless we change the return value convention to use
773 * error-or-pointer (not NULL-or-pointer), troubleshootability
774 * suggests syslogged diagnostics are best here (ugh).
775 */
776
8caab75f 777 proxy = spi_alloc_device(ctlr);
dc87c98e 778 if (!proxy)
8ae12a0d
DB		 779 return NULL;
780
102eb975
GL		 781 WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
782
4d8ff6b0
AKM		 783 /*
784 * Zero(0) is a valid physical CS value and can be located at any
785 * logical CS in the spi->chip_select[]. If all the physical CS
786 * are initialized to 0 then It would be difficult to differentiate
787 * between a valid physical CS 0 & an unused logical CS whose physical
788 * CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
789 * Now all the unused logical CS will have 0xFF physical CS value & can be
790 * ignore while performing physical CS validity checks.
791 */
792 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
793 spi_set_chipselect(proxy, idx, 0xFF);
794
303feb3c 795 spi_set_chipselect(proxy, 0, chip->chip_select);
8ae12a0d 796 proxy->max_speed_hz = chip->max_speed_hz;
980a01c9 797 proxy->mode = chip->mode;
8ae12a0d 798 proxy->irq = chip->irq;
51e99de5 799 strscpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias));
8ae12a0d
DB		 800 proxy->dev.platform_data = (void *) chip->platform_data;
801 proxy->controller_data = chip->controller_data;
802 proxy->controller_state = NULL;
4d8ff6b0
AKM		 803 /*
804 * spi->chip_select[i] gives the corresponding physical CS for logical CS i
805 * logical CS number is represented by setting the ith bit in spi->cs_index_mask
806 * So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
807 * spi->chip_select[0] will give the physical CS.
808 * By default spi->chip_select[0] will hold the physical CS number so, set
809 * spi->cs_index_mask as 0x01.
810 */
811 proxy->cs_index_mask = 0x01;
8ae12a0d 812
47afc77b
HK		 813 if (chip->swnode) {
814 status = device_add_software_node(&proxy->dev, chip->swnode);
826cf175 815 if (status) {
9d902c2a 816 dev_err(&ctlr->dev, "failed to add software node to '%s': %d\n",
826cf175
DT		 817 chip->modalias, status);
818 goto err_dev_put;
819 }
8ae12a0d
DB		 820 }
821
826cf175
DT		 822 status = spi_add_device(proxy);
823 if (status < 0)
df41a5da 824 goto err_dev_put;
826cf175 825
8ae12a0d 826 return proxy;
826cf175 827
826cf175 828err_dev_put:
df41a5da 829 device_remove_software_node(&proxy->dev);
826cf175
DT		 830 spi_dev_put(proxy);
831 return NULL;
8ae12a0d
DB		 832}
833EXPORT_SYMBOL_GPL(spi_new_device);
834
3b1884c2
GU		 835/**
836 * spi_unregister_device - unregister a single SPI device
837 * @spi: spi_device to unregister
838 *
839 * Start making the passed SPI device vanish. Normally this would be handled
8caab75f 840 * by spi_unregister_controller().
3b1884c2
GU		 841 */
842void spi_unregister_device(struct spi_device *spi)
843{
bd6c1644
GU		 844 if (!spi)
845 return;
846
8324147f 847 if (spi->dev.of_node) {
bd6c1644 848 of_node_clear_flag(spi->dev.of_node, OF_POPULATED);
8324147f
JH		 849 of_node_put(spi->dev.of_node);
850 }
7f24467f
OP		 851 if (ACPI_COMPANION(&spi->dev))
852 acpi_device_clear_enumerated(ACPI_COMPANION(&spi->dev));
47afc77b 853 device_remove_software_node(&spi->dev);
27e7db56
SK		 854 device_del(&spi->dev);
855 spi_cleanup(spi);
856 put_device(&spi->dev);
3b1884c2
GU		 857}
858EXPORT_SYMBOL_GPL(spi_unregister_device);
859
8caab75f
GU		 860static void spi_match_controller_to_boardinfo(struct spi_controller *ctlr,
861 struct spi_board_info *bi)
2b9603a0
FT		 862{
863 struct spi_device *dev;
864
8caab75f 865 if (ctlr->bus_num != bi->bus_num)
2b9603a0
FT		 866 return;
867
8caab75f 868 dev = spi_new_device(ctlr, bi);
2b9603a0 869 if (!dev)
8caab75f 870 dev_err(ctlr->dev.parent, "can't create new device for %s\n",
2b9603a0
FT		 871 bi->modalias);
872}
873
33e34dc6
DB		 874/**
875 * spi_register_board_info - register SPI devices for a given board
876 * @info: array of chip descriptors
877 * @n: how many descriptors are provided
878 * Context: can sleep
879 *
8ae12a0d
DB		 880 * Board-specific early init code calls this (probably during arch_initcall)
881 * with segments of the SPI device table. Any device nodes are created later,
882 * after the relevant parent SPI controller (bus_num) is defined. We keep
883 * this table of devices forever, so that reloading a controller driver will
884 * not make Linux forget about these hard-wired devices.
885 *
886 * Other code can also call this, e.g. a particular add-on board might provide
887 * SPI devices through its expansion connector, so code initializing that board
888 * would naturally declare its SPI devices.
889 *
890 * The board info passed can safely be __initdata ... but be careful of
891 * any embedded pointers (platform_data, etc), they're copied as-is.
97d56dc6
JMC		 892 *
893 * Return: zero on success, else a negative error code.
8ae12a0d 894 */
fd4a319b 895int spi_register_board_info(struct spi_board_info const *info, unsigned n)
8ae12a0d 896{
2b9603a0
FT		 897 struct boardinfo *bi;
898 int i;
8ae12a0d 899
c7908a37 900 if (!n)
f974cf57 901 return 0;
c7908a37 902
f9bdb7fd 903 bi = kcalloc(n, sizeof(*bi), GFP_KERNEL);
8ae12a0d
DB		 904 if (!bi)
905 return -ENOMEM;
8ae12a0d 906
2b9603a0 907 for (i = 0; i < n; i++, bi++, info++) {
8caab75f 908 struct spi_controller *ctlr;
8ae12a0d 909
2b9603a0 910 memcpy(&bi->board_info, info, sizeof(*info));
826cf175 911
2b9603a0
FT		 912 mutex_lock(&board_lock);
913 list_add_tail(&bi->list, &board_list);
8caab75f
GU		 914 list_for_each_entry(ctlr, &spi_controller_list, list)
915 spi_match_controller_to_boardinfo(ctlr,
916 &bi->board_info);
2b9603a0 917 mutex_unlock(&board_lock);
8ae12a0d 918 }
2b9603a0
FT		 919
920 return 0;
8ae12a0d
DB		 921}
922
923/*-------------------------------------------------------------------------*/
924
fb51601b
UKK		 925/* Core methods for SPI resource management */
926
927/**
928 * spi_res_alloc - allocate a spi resource that is life-cycle managed
929 * during the processing of a spi_message while using
930 * spi_transfer_one
702ca026 931 * @spi: the SPI device for which we allocate memory
fb51601b
UKK		 932 * @release: the release code to execute for this resource
933 * @size: size to alloc and return
934 * @gfp: GFP allocation flags
935 *
936 * Return: the pointer to the allocated data
937 *
938 * This may get enhanced in the future to allocate from a memory pool
939 * of the @spi_device or @spi_controller to avoid repeated allocations.
940 */
da21fde0
UKK		 941static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
942 size_t size, gfp_t gfp)
fb51601b
UKK		 943{
944 struct spi_res *sres;
945
946 sres = kzalloc(sizeof(*sres) + size, gfp);
947 if (!sres)
948 return NULL;
949
950 INIT_LIST_HEAD(&sres->entry);
951 sres->release = release;
952
953 return sres->data;
954}
fb51601b
UKK		 955
956/**
702ca026 957 * spi_res_free - free an SPI resource
fb51601b 958 * @res: pointer to the custom data of a resource
fb51601b 959 */
da21fde0 960static void spi_res_free(void *res)
fb51601b
UKK		 961{
962 struct spi_res *sres = container_of(res, struct spi_res, data);
963
964 if (!res)
965 return;
966
967 WARN_ON(!list_empty(&sres->entry));
968 kfree(sres);
969}
fb51601b
UKK		 970
971/**
972 * spi_res_add - add a spi_res to the spi_message
702ca026 973 * @message: the SPI message
fb51601b
UKK		 974 * @res: the spi_resource
975 */
da21fde0 976static void spi_res_add(struct spi_message *message, void *res)
fb51601b
UKK		 977{
978 struct spi_res *sres = container_of(res, struct spi_res, data);
979
980 WARN_ON(!list_empty(&sres->entry));
981 list_add_tail(&sres->entry, &message->resources);
982}
fb51601b
UKK		 983
984/**
702ca026 985 * spi_res_release - release all SPI resources for this message
fb51601b
UKK		 986 * @ctlr: the @spi_controller
987 * @message: the @spi_message
988 */
da21fde0 989static void spi_res_release(struct spi_controller *ctlr, struct spi_message *message)
fb51601b
UKK		 990{
991 struct spi_res *res, *tmp;
992
993 list_for_each_entry_safe_reverse(res, tmp, &message->resources, entry) {
994 if (res->release)
995 res->release(ctlr, message, res->data);
996
997 list_del(&res->entry);
998
999 kfree(res);
1000 }
1001}
fb51601b
UKK		 1002
1003/*-------------------------------------------------------------------------*/
4d8ff6b0
AKM		 1004static inline bool spi_is_last_cs(struct spi_device *spi)
1005{
1006 u8 idx;
1007 bool last = false;
1008
1009 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
1010 if ((spi->cs_index_mask >> idx) & 0x01) {
1011 if (spi->controller->last_cs[idx] == spi_get_chipselect(spi, idx))
1012 last = true;
1013 }
1014 }
1015 return last;
1016}
1017
fb51601b 1018
d347b4aa 1019static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
b158935f 1020{
86527bcb 1021 bool activate = enable;
4d8ff6b0 1022 u8 idx;
25093bde 1023
d40f0b6f
DA		 1024 /*
1025 * Avoid calling into the driver (or doing delays) if the chip select
1026 * isn't actually changing from the last time this was called.
1027 */
4d8ff6b0
AKM		 1028 if (!force && ((enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
1029 spi_is_last_cs(spi)) ||
1030 (!enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
1031 !spi_is_last_cs(spi))) &&
d40f0b6f
DA		 1032 (spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
1033 return;
1034
5cb4e1f3
AS		 1035 trace_spi_set_cs(spi, activate);
1036
4d8ff6b0
AKM		 1037 spi->controller->last_cs_index_mask = spi->cs_index_mask;
1038 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
1039 spi->controller->last_cs[idx] = enable ? spi_get_chipselect(spi, 0) : -1;
d40f0b6f
DA		 1040 spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
1041
b158935f
MB		 1042 if (spi->mode & SPI_CS_HIGH)
1043 enable = !enable;
1044
4d8ff6b0
AKM		 1045 if (spi_is_csgpiod(spi)) {
1046 if (!spi->controller->set_cs_timing && !activate)
1047 spi_delay_exec(&spi->cs_hold, NULL);
1048
f3186dd8 1049 if (!(spi->mode & SPI_NO_CS)) {
f48dc6b9
LW		 1050 /*
1051 * Historically ACPI has no means of the GPIO polarity and
1052 * thus the SPISerialBus() resource defines it on the per-chip
1053 * basis. In order to avoid a chain of negations, the GPIO
1054 * polarity is considered being Active High. Even for the cases
1055 * when _DSD() is involved (in the updated versions of ACPI)
1056 * the GPIO CS polarity must be defined Active High to avoid
1057 * ambiguity. That's why we use enable, that takes SPI_CS_HIGH
1058 * into account.
1059 */
4d8ff6b0
AKM		 1060 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
1061 if (((spi->cs_index_mask >> idx) & 0x01) &&
1062 spi_get_csgpiod(spi, idx)) {
1063 if (has_acpi_companion(&spi->dev))
1064 gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
1065 !enable);
1066 else
1067 /* Polarity handled by GPIO library */
1068 gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
1069 activate);
1070
1071 if (activate)
1072 spi_delay_exec(&spi->cs_setup, NULL);
1073 else
1074 spi_delay_exec(&spi->cs_inactive, NULL);
1075 }
1076 }
f3186dd8 1077 }
8eee6b9d 1078 /* Some SPI masters need both GPIO CS & slave_select */
82238d2c 1079 if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
8caab75f
GU		 1080 spi->controller->set_cs)
1081 spi->controller->set_cs(spi, !enable);
4d8ff6b0
AKM		 1082
1083 if (!spi->controller->set_cs_timing) {
1084 if (activate)
1085 spi_delay_exec(&spi->cs_setup, NULL);
1086 else
1087 spi_delay_exec(&spi->cs_inactive, NULL);
1088 }
8caab75f
GU		 1089 } else if (spi->controller->set_cs) {
1090 spi->controller->set_cs(spi, !enable);
8eee6b9d 1091 }
b158935f
MB		 1092}
1093
2de440f5 1094#ifdef CONFIG_HAS_DMA
0c17ba73
VW		 1095static int spi_map_buf_attrs(struct spi_controller *ctlr, struct device *dev,
1096 struct sg_table *sgt, void *buf, size_t len,
1097 enum dma_data_direction dir, unsigned long attrs)
6ad45a27
MB		 1098{
1099 const bool vmalloced_buf = is_vmalloc_addr(buf);
df88e91b 1100 unsigned int max_seg_size = dma_get_max_seg_size(dev);
b1b8153c
V		 1101#ifdef CONFIG_HIGHMEM
1102 const bool kmap_buf = ((unsigned long)buf >= PKMAP_BASE &&
1103 (unsigned long)buf < (PKMAP_BASE +
1104 (LAST_PKMAP * PAGE_SIZE)));
1105#else
1106 const bool kmap_buf = false;
1107#endif
65598c13
AG		 1108 int desc_len;
1109 int sgs;
6ad45a27 1110 struct page *vm_page;
8dd4a016 1111 struct scatterlist *sg;
6ad45a27
MB		 1112 void *sg_buf;
1113 size_t min;
1114 int i, ret;
1115
b1b8153c 1116 if (vmalloced_buf || kmap_buf) {
ebc4cb43 1117 desc_len = min_t(unsigned long, max_seg_size, PAGE_SIZE);
65598c13 1118 sgs = DIV_ROUND_UP(len + offset_in_page(buf), desc_len);
0569a88f 1119 } else if (virt_addr_valid(buf)) {
ebc4cb43 1120 desc_len = min_t(size_t, max_seg_size, ctlr->max_dma_len);
65598c13 1121 sgs = DIV_ROUND_UP(len, desc_len);
0569a88f
V		 1122 } else {
1123 return -EINVAL;
65598c13
AG		 1124 }
1125
6ad45a27
MB		 1126 ret = sg_alloc_table(sgt, sgs, GFP_KERNEL);
1127 if (ret != 0)
1128 return ret;
1129
8dd4a016 1130 sg = &sgt->sgl[0];
6ad45a27 1131 for (i = 0; i < sgs; i++) {
6ad45a27 1132
b1b8153c 1133 if (vmalloced_buf || kmap_buf) {
ce99319a
MC		 1134 /*
1135 * Next scatterlist entry size is the minimum between
1136 * the desc_len and the remaining buffer length that
1137 * fits in a page.
1138 */
1139 min = min_t(size_t, desc_len,
1140 min_t(size_t, len,
1141 PAGE_SIZE - offset_in_page(buf)));
b1b8153c
V		 1142 if (vmalloced_buf)
1143 vm_page = vmalloc_to_page(buf);
1144 else
1145 vm_page = kmap_to_page(buf);
6ad45a27
MB		 1146 if (!vm_page) {
1147 sg_free_table(sgt);
1148 return -ENOMEM;
1149 }
8dd4a016 1150 sg_set_page(sg, vm_page,
c1aefbdd 1151 min, offset_in_page(buf));
6ad45a27 1152 } else {
65598c13 1153 min = min_t(size_t, len, desc_len);
6ad45a27 1154 sg_buf = buf;
8dd4a016 1155 sg_set_buf(sg, sg_buf, min);
6ad45a27
MB		 1156 }
1157
6ad45a27
MB		 1158 buf += min;
1159 len -= min;
8dd4a016 1160 sg = sg_next(sg);
6ad45a27
MB		 1161 }
1162
0c17ba73 1163 ret = dma_map_sgtable(dev, sgt, dir, attrs);
6ad45a27
MB		 1164 if (ret < 0) {
1165 sg_free_table(sgt);
1166 return ret;
1167 }
1168
6ad45a27
MB		 1169 return 0;
1170}
1171
0c17ba73
VW		 1172int spi_map_buf(struct spi_controller *ctlr, struct device *dev,
1173 struct sg_table *sgt, void *buf, size_t len,
1174 enum dma_data_direction dir)
1175{
1176 return spi_map_buf_attrs(ctlr, dev, sgt, buf, len, dir, 0);
1177}
1178
1179static void spi_unmap_buf_attrs(struct spi_controller *ctlr,
1180 struct device *dev, struct sg_table *sgt,
1181 enum dma_data_direction dir,
1182 unsigned long attrs)
6ad45a27
MB		 1183{
1184 if (sgt->orig_nents) {
0c17ba73 1185 dma_unmap_sgtable(dev, sgt, dir, attrs);
6ad45a27 1186 sg_free_table(sgt);
8e9204cd
MS		 1187 sgt->orig_nents = 0;
1188 sgt->nents = 0;
6ad45a27
MB		 1189 }
1190}
1191
0c17ba73
VW		 1192void spi_unmap_buf(struct spi_controller *ctlr, struct device *dev,
1193 struct sg_table *sgt, enum dma_data_direction dir)
1194{
1195 spi_unmap_buf_attrs(ctlr, dev, sgt, dir, 0);
1196}
1197
8caab75f 1198static int __spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1199{
99adef31
MB		 1200 struct device *tx_dev, *rx_dev;
1201 struct spi_transfer *xfer;
6ad45a27 1202 int ret;
3a2eba9b 1203
8caab75f 1204 if (!ctlr->can_dma)
99adef31
MB		 1205 return 0;
1206
8caab75f
GU		 1207 if (ctlr->dma_tx)
1208 tx_dev = ctlr->dma_tx->device->dev;
b470e10e
VK		 1209 else if (ctlr->dma_map_dev)
1210 tx_dev = ctlr->dma_map_dev;
c37f45b5 1211 else
8caab75f 1212 tx_dev = ctlr->dev.parent;
c37f45b5 1213
8caab75f
GU		 1214 if (ctlr->dma_rx)
1215 rx_dev = ctlr->dma_rx->device->dev;
b470e10e
VK		 1216 else if (ctlr->dma_map_dev)
1217 rx_dev = ctlr->dma_map_dev;
c37f45b5 1218 else
8caab75f 1219 rx_dev = ctlr->dev.parent;
99adef31
MB		 1220
1221 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
0c17ba73
VW		 1222 /* The sync is done before each transfer. */
1223 unsigned long attrs = DMA_ATTR_SKIP_CPU_SYNC;
1224
8caab75f 1225 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 1226 continue;
1227
1228 if (xfer->tx_buf != NULL) {
0c17ba73
VW		 1229 ret = spi_map_buf_attrs(ctlr, tx_dev, &xfer->tx_sg,
1230 (void *)xfer->tx_buf,
1231 xfer->len, DMA_TO_DEVICE,
1232 attrs);
6ad45a27
MB		 1233 if (ret != 0)
1234 return ret;
99adef31
MB		 1235 }
1236
1237 if (xfer->rx_buf != NULL) {
0c17ba73
VW		 1238 ret = spi_map_buf_attrs(ctlr, rx_dev, &xfer->rx_sg,
1239 xfer->rx_buf, xfer->len,
1240 DMA_FROM_DEVICE, attrs);
6ad45a27 1241 if (ret != 0) {
0c17ba73
VW		 1242 spi_unmap_buf_attrs(ctlr, tx_dev,
1243 &xfer->tx_sg, DMA_TO_DEVICE,
1244 attrs);
1245
6ad45a27 1246 return ret;
99adef31
MB		 1247 }
1248 }
1249 }
1250
f25723dc
VW		 1251 ctlr->cur_rx_dma_dev = rx_dev;
1252 ctlr->cur_tx_dma_dev = tx_dev;
8caab75f 1253 ctlr->cur_msg_mapped = true;
99adef31
MB		 1254
1255 return 0;
1256}
1257
8caab75f 1258static int __spi_unmap_msg(struct spi_controller *ctlr, struct spi_message *msg)
99adef31 1259{
f25723dc
VW		 1260 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1261 struct device *tx_dev = ctlr->cur_tx_dma_dev;
99adef31 1262 struct spi_transfer *xfer;
99adef31 1263
8caab75f 1264 if (!ctlr->cur_msg_mapped || !ctlr->can_dma)
99adef31
MB		 1265 return 0;
1266
99adef31 1267 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
0c17ba73
VW		 1268 /* The sync has already been done after each transfer. */
1269 unsigned long attrs = DMA_ATTR_SKIP_CPU_SYNC;
1270
8caab75f 1271 if (!ctlr->can_dma(ctlr, msg->spi, xfer))
99adef31
MB		 1272 continue;
1273
0c17ba73
VW		 1274 spi_unmap_buf_attrs(ctlr, rx_dev, &xfer->rx_sg,
1275 DMA_FROM_DEVICE, attrs);
1276 spi_unmap_buf_attrs(ctlr, tx_dev, &xfer->tx_sg,
1277 DMA_TO_DEVICE, attrs);
99adef31
MB		 1278 }
1279
809b1b04
RG		 1280 ctlr->cur_msg_mapped = false;
1281
99adef31
MB		 1282 return 0;
1283}
0c17ba73
VW		 1284
1285static void spi_dma_sync_for_device(struct spi_controller *ctlr,
1286 struct spi_transfer *xfer)
1287{
1288 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1289 struct device *tx_dev = ctlr->cur_tx_dma_dev;
1290
1291 if (!ctlr->cur_msg_mapped)
1292 return;
1293
1294 if (xfer->tx_sg.orig_nents)
1295 dma_sync_sgtable_for_device(tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
1296 if (xfer->rx_sg.orig_nents)
1297 dma_sync_sgtable_for_device(rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1298}
1299
1300static void spi_dma_sync_for_cpu(struct spi_controller *ctlr,
1301 struct spi_transfer *xfer)
1302{
1303 struct device *rx_dev = ctlr->cur_rx_dma_dev;
1304 struct device *tx_dev = ctlr->cur_tx_dma_dev;
1305
1306 if (!ctlr->cur_msg_mapped)
1307 return;
1308
1309 if (xfer->rx_sg.orig_nents)
1310 dma_sync_sgtable_for_cpu(rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE);
1311 if (xfer->tx_sg.orig_nents)
1312 dma_sync_sgtable_for_cpu(tx_dev, &xfer->tx_sg, DMA_TO_DEVICE);
1313}
2de440f5 1314#else /* !CONFIG_HAS_DMA */
8caab75f 1315static inline int __spi_map_msg(struct spi_controller *ctlr,
2de440f5
GU		 1316 struct spi_message *msg)
1317{
1318 return 0;
1319}
1320
8caab75f 1321static inline int __spi_unmap_msg(struct spi_controller *ctlr,
4b786458 1322 struct spi_message *msg)
2de440f5
GU		 1323{
1324 return 0;
1325}
0c17ba73
VW		 1326
1327static void spi_dma_sync_for_device(struct spi_controller *ctrl,
1328 struct spi_transfer *xfer)
1329{
1330}
1331
1332static void spi_dma_sync_for_cpu(struct spi_controller *ctrl,
1333 struct spi_transfer *xfer)
1334{
1335}
2de440f5
GU		 1336#endif /* !CONFIG_HAS_DMA */
1337
8caab75f 1338static inline int spi_unmap_msg(struct spi_controller *ctlr,
4b786458
MS		 1339 struct spi_message *msg)
1340{
1341 struct spi_transfer *xfer;
1342
1343 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1344 /*
1345 * Restore the original value of tx_buf or rx_buf if they are
1346 * NULL.
1347 */
8caab75f 1348 if (xfer->tx_buf == ctlr->dummy_tx)
4b786458 1349 xfer->tx_buf = NULL;
8caab75f 1350 if (xfer->rx_buf == ctlr->dummy_rx)
4b786458
MS		 1351 xfer->rx_buf = NULL;
1352 }
1353
8caab75f 1354 return __spi_unmap_msg(ctlr, msg);
4b786458
MS		 1355}
1356
8caab75f 1357static int spi_map_msg(struct spi_controller *ctlr, struct spi_message *msg)
2de440f5
GU		 1358{
1359 struct spi_transfer *xfer;
1360 void *tmp;
1361 unsigned int max_tx, max_rx;
1362
aee67fe8 1363 if ((ctlr->flags & (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX))
1364 && !(msg->spi->mode & SPI_3WIRE)) {
2de440f5
GU		 1365 max_tx = 0;
1366 max_rx = 0;
1367
1368 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
8caab75f 1369 if ((ctlr->flags & SPI_CONTROLLER_MUST_TX) &&
2de440f5
GU		 1370 !xfer->tx_buf)
1371 max_tx = max(xfer->len, max_tx);
8caab75f 1372 if ((ctlr->flags & SPI_CONTROLLER_MUST_RX) &&
2de440f5
GU		 1373 !xfer->rx_buf)
1374 max_rx = max(xfer->len, max_rx);
1375 }
1376
1377 if (max_tx) {
8caab75f 1378 tmp = krealloc(ctlr->dummy_tx, max_tx,
b00bab9d 1379 GFP_KERNEL | GFP_DMA | __GFP_ZERO);
2de440f5
GU		 1380 if (!tmp)
1381 return -ENOMEM;
8caab75f 1382 ctlr->dummy_tx = tmp;
2de440f5
GU		 1383 }
1384
1385 if (max_rx) {
8caab75f 1386 tmp = krealloc(ctlr->dummy_rx, max_rx,
2de440f5
GU		 1387 GFP_KERNEL | GFP_DMA);
1388 if (!tmp)
1389 return -ENOMEM;
8caab75f 1390 ctlr->dummy_rx = tmp;
2de440f5
GU		 1391 }
1392
1393 if (max_tx || max_rx) {
1394 list_for_each_entry(xfer, &msg->transfers,
1395 transfer_list) {
5442dcaa
CL		 1396 if (!xfer->len)
1397 continue;
2de440f5 1398 if (!xfer->tx_buf)
8caab75f 1399 xfer->tx_buf = ctlr->dummy_tx;
2de440f5 1400 if (!xfer->rx_buf)
8caab75f 1401 xfer->rx_buf = ctlr->dummy_rx;
2de440f5
GU		 1402 }
1403 }
1404 }
1405
8caab75f 1406 return __spi_map_msg(ctlr, msg);
2de440f5 1407}
99adef31 1408
810923f3
LR		 1409static int spi_transfer_wait(struct spi_controller *ctlr,
1410 struct spi_message *msg,
1411 struct spi_transfer *xfer)
1412{
d501cc4c
DJ		 1413 struct spi_statistics __percpu *statm = ctlr->pcpu_statistics;
1414 struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics;
6170d077 1415 u32 speed_hz = xfer->speed_hz;
49686df5 1416 unsigned long long ms;
810923f3
LR		 1417
1418 if (spi_controller_is_slave(ctlr)) {
1419 if (wait_for_completion_interruptible(&ctlr->xfer_completion)) {
1420 dev_dbg(&msg->spi->dev, "SPI transfer interrupted\n");
1421 return -EINTR;
1422 }
1423 } else {
6170d077
XY		 1424 if (!speed_hz)
1425 speed_hz = 100000;
1426
86b8bff7
AS		 1427 /*
1428 * For each byte we wait for 8 cycles of the SPI clock.
1429 * Since speed is defined in Hz and we want milliseconds,
1430 * use respective multiplier, but before the division,
1431 * otherwise we may get 0 for short transfers.
1432 */
1433 ms = 8LL * MSEC_PER_SEC * xfer->len;
6170d077 1434 do_div(ms, speed_hz);
810923f3 1435
86b8bff7
AS		 1436 /*
1437 * Increase it twice and add 200 ms tolerance, use
1438 * predefined maximum in case of overflow.
1439 */
1440 ms += ms + 200;
810923f3
LR		 1441 if (ms > UINT_MAX)
1442 ms = UINT_MAX;
1443
1444 ms = wait_for_completion_timeout(&ctlr->xfer_completion,
1445 msecs_to_jiffies(ms));
1446
1447 if (ms == 0) {
1448 SPI_STATISTICS_INCREMENT_FIELD(statm, timedout);
1449 SPI_STATISTICS_INCREMENT_FIELD(stats, timedout);
1450 dev_err(&msg->spi->dev,
1451 "SPI transfer timed out\n");
1452 return -ETIMEDOUT;
1453 }
39cefd85
NC		 1454
1455 if (xfer->error & SPI_TRANS_FAIL_IO)
1456 return -EIO;
810923f3
LR		 1457 }
1458
1459 return 0;
1460}
1461
0ff2de8b
MS		 1462static void _spi_transfer_delay_ns(u32 ns)
1463{
1464 if (!ns)
1465 return;
86b8bff7 1466 if (ns <= NSEC_PER_USEC) {
0ff2de8b
MS		 1467 ndelay(ns);
1468 } else {
86b8bff7 1469 u32 us = DIV_ROUND_UP(ns, NSEC_PER_USEC);
0ff2de8b
MS		 1470
1471 if (us <= 10)
1472 udelay(us);
1473 else
1474 usleep_range(us, us + DIV_ROUND_UP(us, 10));
1475 }
1476}
1477
3984d39b 1478int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
0ff2de8b 1479{
b2c98153
AA		 1480 u32 delay = _delay->value;
1481 u32 unit = _delay->unit;
d5864e5b 1482 u32 hz;
0ff2de8b 1483
b2c98153
AA		 1484 if (!delay)
1485 return 0;
0ff2de8b
MS		 1486
1487 switch (unit) {
1488 case SPI_DELAY_UNIT_USECS:
86b8bff7 1489 delay *= NSEC_PER_USEC;
0ff2de8b 1490 break;
86b8bff7
AS		 1491 case SPI_DELAY_UNIT_NSECS:
1492 /* Nothing to do here */
0ff2de8b 1493 break;
d5864e5b 1494 case SPI_DELAY_UNIT_SCK:
95c8222f 1495 /* Clock cycles need to be obtained from spi_transfer */
b2c98153
AA		 1496 if (!xfer)
1497 return -EINVAL;
86b8bff7
AS		 1498 /*
1499 * If there is unknown effective speed, approximate it
702ca026 1500 * by underestimating with half of the requested Hz.
d5864e5b
MS		 1501 */
1502 hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
b2c98153
AA		 1503 if (!hz)
1504 return -EINVAL;
86b8bff7
AS		 1505
1506 /* Convert delay to nanoseconds */
1507 delay *= DIV_ROUND_UP(NSEC_PER_SEC, hz);
d5864e5b 1508 break;
0ff2de8b 1509 default:
b2c98153
AA		 1510 return -EINVAL;
1511 }
1512
1513 return delay;
1514}
3984d39b 1515EXPORT_SYMBOL_GPL(spi_delay_to_ns);
b2c98153
AA		 1516
1517int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer)
1518{
1519 int delay;
1520
8fede89f
MB		 1521 might_sleep();
1522
b2c98153
AA		 1523 if (!_delay)
1524 return -EINVAL;
1525
3984d39b 1526 delay = spi_delay_to_ns(_delay, xfer);
b2c98153
AA		 1527 if (delay < 0)
1528 return delay;
1529
1530 _spi_transfer_delay_ns(delay);
1531
1532 return 0;
1533}
1534EXPORT_SYMBOL_GPL(spi_delay_exec);
1535
0ff2de8b
MS		 1536static void _spi_transfer_cs_change_delay(struct spi_message *msg,
1537 struct spi_transfer *xfer)
1538{
86b8bff7 1539 u32 default_delay_ns = 10 * NSEC_PER_USEC;
329f0dac
AA		 1540 u32 delay = xfer->cs_change_delay.value;
1541 u32 unit = xfer->cs_change_delay.unit;
1542 int ret;
0ff2de8b 1543
95c8222f 1544 /* Return early on "fast" mode - for everything but USECS */
6b3f236a
AA		 1545 if (!delay) {
1546 if (unit == SPI_DELAY_UNIT_USECS)
86b8bff7 1547 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1548 return;
6b3f236a 1549 }
0ff2de8b 1550
329f0dac
AA		 1551 ret = spi_delay_exec(&xfer->cs_change_delay, xfer);
1552 if (ret) {
0ff2de8b 1553 dev_err_once(&msg->spi->dev,
86b8bff7
AS		 1554 "Use of unsupported delay unit %i, using default of %luus\n",
1555 unit, default_delay_ns / NSEC_PER_USEC);
1556 _spi_transfer_delay_ns(default_delay_ns);
0ff2de8b 1557 }
0ff2de8b
MS		 1558}
1559
6e80133a
WZ		 1560void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
1561 struct spi_transfer *xfer)
1562{
1563 _spi_transfer_cs_change_delay(msg, xfer);
1564}
1565EXPORT_SYMBOL_GPL(spi_transfer_cs_change_delay_exec);
1566
b158935f
MB		 1567/*
1568 * spi_transfer_one_message - Default implementation of transfer_one_message()
1569 *
1570 * This is a standard implementation of transfer_one_message() for
8ba811a7 1571 * drivers which implement a transfer_one() operation. It provides
b158935f
MB		 1572 * standard handling of delays and chip select management.
1573 */
8caab75f 1574static int spi_transfer_one_message(struct spi_controller *ctlr,
b158935f
MB		 1575 struct spi_message *msg)
1576{
1577 struct spi_transfer *xfer;
b158935f
MB		 1578 bool keep_cs = false;
1579 int ret = 0;
d501cc4c
DJ		 1580 struct spi_statistics __percpu *statm = ctlr->pcpu_statistics;
1581 struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics;
b158935f 1582
5e0531f6
CL		 1583 xfer = list_first_entry(&msg->transfers, struct spi_transfer, transfer_list);
1584 spi_set_cs(msg->spi, !xfer->cs_off, false);
b158935f 1585
eca2ebc7
MS		 1586 SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
1587 SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
1588
b158935f
MB		 1589 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1590 trace_spi_transfer_start(msg, xfer);
1591
8caab75f
GU		 1592 spi_statistics_add_transfer_stats(statm, xfer, ctlr);
1593 spi_statistics_add_transfer_stats(stats, xfer, ctlr);
eca2ebc7 1594
b42faeee
VO		 1595 if (!ctlr->ptp_sts_supported) {
1596 xfer->ptp_sts_word_pre = 0;
1597 ptp_read_system_prets(xfer->ptp_sts);
1598 }
1599
b3063203 1600 if ((xfer->tx_buf || xfer->rx_buf) && xfer->len) {
8caab75f 1601 reinit_completion(&ctlr->xfer_completion);
b158935f 1602
809b1b04 1603fallback_pio:
0c17ba73 1604 spi_dma_sync_for_device(ctlr, xfer);
8caab75f 1605 ret = ctlr->transfer_one(ctlr, msg->spi, xfer);
38ec10f6 1606 if (ret < 0) {
0c17ba73
VW		 1607 spi_dma_sync_for_cpu(ctlr, xfer);
1608
809b1b04
RG		 1609 if (ctlr->cur_msg_mapped &&
1610 (xfer->error & SPI_TRANS_FAIL_NO_START)) {
1611 __spi_unmap_msg(ctlr, msg);
1612 ctlr->fallback = true;
1613 xfer->error &= ~SPI_TRANS_FAIL_NO_START;
1614 goto fallback_pio;
1615 }
1616
eca2ebc7
MS		 1617 SPI_STATISTICS_INCREMENT_FIELD(statm,
1618 errors);
1619 SPI_STATISTICS_INCREMENT_FIELD(stats,
1620 errors);
38ec10f6
MB		 1621 dev_err(&msg->spi->dev,
1622 "SPI transfer failed: %d\n", ret);
1623 goto out;
1624 }
b158935f 1625
d57e7960
MB		 1626 if (ret > 0) {
1627 ret = spi_transfer_wait(ctlr, msg, xfer);
1628 if (ret < 0)
1629 msg->status = ret;
1630 }
0c17ba73
VW		 1631
1632 spi_dma_sync_for_cpu(ctlr, xfer);
38ec10f6
MB		 1633 } else {
1634 if (xfer->len)
1635 dev_err(&msg->spi->dev,
1636 "Bufferless transfer has length %u\n",
1637 xfer->len);
13a42798 1638 }
b158935f 1639
b42faeee
VO		 1640 if (!ctlr->ptp_sts_supported) {
1641 ptp_read_system_postts(xfer->ptp_sts);
1642 xfer->ptp_sts_word_post = xfer->len;
1643 }
1644
b158935f
MB		 1645 trace_spi_transfer_stop(msg, xfer);
1646
1647 if (msg->status != -EINPROGRESS)
1648 goto out;
1649
bebcfd27 1650 spi_transfer_delay_exec(xfer);
b158935f
MB		 1651
1652 if (xfer->cs_change) {
1653 if (list_is_last(&xfer->transfer_list,
1654 &msg->transfers)) {
1655 keep_cs = true;
1656 } else {
5e0531f6
CL		 1657 if (!xfer->cs_off)
1658 spi_set_cs(msg->spi, false, false);
0ff2de8b 1659 _spi_transfer_cs_change_delay(msg, xfer);
5e0531f6
CL		 1660 if (!list_next_entry(xfer, transfer_list)->cs_off)
1661 spi_set_cs(msg->spi, true, false);
b158935f 1662 }
5e0531f6
CL		 1663 } else if (!list_is_last(&xfer->transfer_list, &msg->transfers) &&
1664 xfer->cs_off != list_next_entry(xfer, transfer_list)->cs_off) {
1665 spi_set_cs(msg->spi, xfer->cs_off, false);
b158935f
MB		 1666 }
1667
1668 msg->actual_length += xfer->len;
1669 }
1670
1671out:
1672 if (ret != 0 || !keep_cs)
d347b4aa 1673 spi_set_cs(msg->spi, false, false);
b158935f
MB		 1674
1675 if (msg->status == -EINPROGRESS)
1676 msg->status = ret;
1677
8caab75f
GU		 1678 if (msg->status && ctlr->handle_err)
1679 ctlr->handle_err(ctlr, msg);
b716c4ff 1680
0ed56252
MB		 1681 spi_finalize_current_message(ctlr);
1682
b158935f
MB		 1683 return ret;
1684}
1685
1686/**
1687 * spi_finalize_current_transfer - report completion of a transfer
8caab75f 1688 * @ctlr: the controller reporting completion
b158935f
MB		 1689 *
1690 * Called by SPI drivers using the core transfer_one_message()
1691 * implementation to notify it that the current interrupt driven
9e8f4882 1692 * transfer has finished and the next one may be scheduled.
b158935f 1693 */
8caab75f 1694void spi_finalize_current_transfer(struct spi_controller *ctlr)
b158935f 1695{
8caab75f 1696 complete(&ctlr->xfer_completion);
b158935f
MB		 1697}
1698EXPORT_SYMBOL_GPL(spi_finalize_current_transfer);
1699
e1268597
MB		 1700static void spi_idle_runtime_pm(struct spi_controller *ctlr)
1701{
1702 if (ctlr->auto_runtime_pm) {
1703 pm_runtime_mark_last_busy(ctlr->dev.parent);
1704 pm_runtime_put_autosuspend(ctlr->dev.parent);
1705 }
1706}
1707
ae7d2346
DJ		 1708static int __spi_pump_transfer_message(struct spi_controller *ctlr,
1709 struct spi_message *msg, bool was_busy)
1710{
1711 struct spi_transfer *xfer;
1712 int ret;
1713
1714 if (!was_busy && ctlr->auto_runtime_pm) {
1715 ret = pm_runtime_get_sync(ctlr->dev.parent);
1716 if (ret < 0) {
1717 pm_runtime_put_noidle(ctlr->dev.parent);
1718 dev_err(&ctlr->dev, "Failed to power device: %d\n",
1719 ret);
1720 return ret;
1721 }
1722 }
1723
1724 if (!was_busy)
1725 trace_spi_controller_busy(ctlr);
1726
1727 if (!was_busy && ctlr->prepare_transfer_hardware) {
1728 ret = ctlr->prepare_transfer_hardware(ctlr);
1729 if (ret) {
1730 dev_err(&ctlr->dev,
1731 "failed to prepare transfer hardware: %d\n",
1732 ret);
1733
1734 if (ctlr->auto_runtime_pm)
1735 pm_runtime_put(ctlr->dev.parent);
1736
1737 msg->status = ret;
1738 spi_finalize_current_message(ctlr);
1739
1740 return ret;
1741 }
1742 }
1743
1744 trace_spi_message_start(msg);
1745
8d699ff9
VW		 1746 ret = spi_split_transfers_maxsize(ctlr, msg,
1747 spi_max_transfer_size(msg->spi),
1748 GFP_KERNEL | GFP_DMA);
1749 if (ret) {
1750 msg->status = ret;
1751 spi_finalize_current_message(ctlr);
1752 return ret;
1753 }
1754
ae7d2346
DJ		 1755 if (ctlr->prepare_message) {
1756 ret = ctlr->prepare_message(ctlr, msg);
1757 if (ret) {
1758 dev_err(&ctlr->dev, "failed to prepare message: %d\n",
1759 ret);
1760 msg->status = ret;
1761 spi_finalize_current_message(ctlr);
1762 return ret;
1763 }
1764 msg->prepared = true;
1765 }
1766
1767 ret = spi_map_msg(ctlr, msg);
1768 if (ret) {
1769 msg->status = ret;
1770 spi_finalize_current_message(ctlr);
1771 return ret;
1772 }
1773
1774 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
1775 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
1776 xfer->ptp_sts_word_pre = 0;
1777 ptp_read_system_prets(xfer->ptp_sts);
1778 }
1779 }
1780
dc302905
DJ		 1781 /*
1782 * Drivers implementation of transfer_one_message() must arrange for
1783 * spi_finalize_current_message() to get called. Most drivers will do
1784 * this in the calling context, but some don't. For those cases, a
1785 * completion is used to guarantee that this function does not return
1786 * until spi_finalize_current_message() is done accessing
1787 * ctlr->cur_msg.
1788 * Use of the following two flags enable to opportunistically skip the
1789 * use of the completion since its use involves expensive spin locks.
1790 * In case of a race with the context that calls
1791 * spi_finalize_current_message() the completion will always be used,
1792 * due to strict ordering of these flags using barriers.
1793 */
1794 WRITE_ONCE(ctlr->cur_msg_incomplete, true);
1795 WRITE_ONCE(ctlr->cur_msg_need_completion, false);
69fa9590 1796 reinit_completion(&ctlr->cur_msg_completion);
95c8222f 1797 smp_wmb(); /* Make these available to spi_finalize_current_message() */
dc302905 1798
ae7d2346
DJ		 1799 ret = ctlr->transfer_one_message(ctlr, msg);
1800 if (ret) {
1801 dev_err(&ctlr->dev,
1802 "failed to transfer one message from queue\n");
1803 return ret;
1804 }
1805
31d4c1bd
DJ		 1806 WRITE_ONCE(ctlr->cur_msg_need_completion, true);
1807 smp_mb(); /* See spi_finalize_current_message()... */
1808 if (READ_ONCE(ctlr->cur_msg_incomplete))
1809 wait_for_completion(&ctlr->cur_msg_completion);
1810
ae7d2346
DJ		 1811 return 0;
1812}
1813
ffbbdd21 1814/**
702ca026 1815 * __spi_pump_messages - function which processes SPI message queue
8caab75f 1816 * @ctlr: controller to process queue for
fc9e0f71 1817 * @in_kthread: true if we are in the context of the message pump thread
ffbbdd21 1818 *
702ca026 1819 * This function checks if there is any SPI message in the queue that
ffbbdd21
LW		 1820 * needs processing and if so call out to the driver to initialize hardware
1821 * and transfer each message.
1822 *
0461a414
MB		 1823 * Note that it is called both from the kthread itself and also from
1824 * inside spi_sync(); the queue extraction handling at the top of the
1825 * function should deal with this safely.
ffbbdd21 1826 */
8caab75f 1827static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
ffbbdd21 1828{
d1c44c93 1829 struct spi_message *msg;
ffbbdd21 1830 bool was_busy = false;
d1c44c93 1831 unsigned long flags;
ffbbdd21
LW		 1832 int ret;
1833
702ca026 1834 /* Take the I/O mutex */
c1038165
DJ		 1835 mutex_lock(&ctlr->io_mutex);
1836
983aee5d 1837 /* Lock queue */
8caab75f 1838 spin_lock_irqsave(&ctlr->queue_lock, flags);
983aee5d
MB		 1839
1840 /* Make sure we are not already running a message */
8711a2ab 1841 if (ctlr->cur_msg)
c1038165 1842 goto out_unlock;
983aee5d
MB		 1843
1844 /* Check if the queue is idle */
8caab75f 1845 if (list_empty(&ctlr->queue) || !ctlr->running) {
8711a2ab 1846 if (!ctlr->busy)
c1038165 1847 goto out_unlock;
fc9e0f71 1848
e1268597 1849 /* Defer any non-atomic teardown to the thread */
f0125f1a 1850 if (!in_kthread) {
e1268597
MB		 1851 if (!ctlr->dummy_rx && !ctlr->dummy_tx &&
1852 !ctlr->unprepare_transfer_hardware) {
1853 spi_idle_runtime_pm(ctlr);
1854 ctlr->busy = false;
ae7d2346 1855 ctlr->queue_empty = true;
e1268597
MB		 1856 trace_spi_controller_idle(ctlr);
1857 } else {
1858 kthread_queue_work(ctlr->kworker,
1859 &ctlr->pump_messages);
1860 }
c1038165 1861 goto out_unlock;
f0125f1a
MB		 1862 }
1863
1864 ctlr->busy = false;
f0125f1a
MB		 1865 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
1866
1867 kfree(ctlr->dummy_rx);
1868 ctlr->dummy_rx = NULL;
1869 kfree(ctlr->dummy_tx);
1870 ctlr->dummy_tx = NULL;
1871 if (ctlr->unprepare_transfer_hardware &&
1872 ctlr->unprepare_transfer_hardware(ctlr))
1873 dev_err(&ctlr->dev,
1874 "failed to unprepare transfer hardware\n");
e1268597 1875 spi_idle_runtime_pm(ctlr);
f0125f1a
MB		 1876 trace_spi_controller_idle(ctlr);
1877
1878 spin_lock_irqsave(&ctlr->queue_lock, flags);
ae7d2346 1879 ctlr->queue_empty = true;
c1038165 1880 goto out_unlock;
ffbbdd21 1881 }
ffbbdd21 1882
ffbbdd21 1883 /* Extract head of queue */
d1c44c93
VO		 1884 msg = list_first_entry(&ctlr->queue, struct spi_message, queue);
1885 ctlr->cur_msg = msg;
ffbbdd21 1886
d1c44c93 1887 list_del_init(&msg->queue);
8caab75f 1888 if (ctlr->busy)
ffbbdd21
LW		 1889 was_busy = true;
1890 else
8caab75f
GU		 1891 ctlr->busy = true;
1892 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 1893
ae7d2346 1894 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
9c9c9da7 1895 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
c191543e 1896
69fa9590
DJ		 1897 ctlr->cur_msg = NULL;
1898 ctlr->fallback = false;
1899
8caab75f 1900 mutex_unlock(&ctlr->io_mutex);
62826970
MB		 1901
1902 /* Prod the scheduler in case transfer_one() was busy waiting */
49023d2e
JH		 1903 if (!ret)
1904 cond_resched();
c1038165
DJ		 1905 return;
1906
1907out_unlock:
8711a2ab 1908 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
c1038165 1909 mutex_unlock(&ctlr->io_mutex);
ffbbdd21
LW		 1910}
1911
fc9e0f71
MB		 1912/**
1913 * spi_pump_messages - kthread work function which processes spi message queue
8caab75f 1914 * @work: pointer to kthread work struct contained in the controller struct
fc9e0f71
MB		 1915 */
1916static void spi_pump_messages(struct kthread_work *work)
1917{
8caab75f
GU		 1918 struct spi_controller *ctlr =
1919 container_of(work, struct spi_controller, pump_messages);
fc9e0f71 1920
8caab75f 1921 __spi_pump_messages(ctlr, true);
fc9e0f71
MB		 1922}
1923
b42faeee 1924/**
350de7ce 1925 * spi_take_timestamp_pre - helper to collect the beginning of the TX timestamp
b42faeee
VO		 1926 * @ctlr: Pointer to the spi_controller structure of the driver
1927 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1928 * @progress: How many words (not bytes) have been transferred so far
b42faeee
VO		 1929 * @irqs_off: If true, will disable IRQs and preemption for the duration of the
1930 * transfer, for less jitter in time measurement. Only compatible
1931 * with PIO drivers. If true, must follow up with
1932 * spi_take_timestamp_post or otherwise system will crash.
1933 * WARNING: for fully predictable results, the CPU frequency must
1934 * also be under control (governor).
350de7ce
AS		 1935 *
1936 * This is a helper for drivers to collect the beginning of the TX timestamp
1937 * for the requested byte from the SPI transfer. The frequency with which this
1938 * function must be called (once per word, once for the whole transfer, once
1939 * per batch of words etc) is arbitrary as long as the @tx buffer offset is
1940 * greater than or equal to the requested byte at the time of the call. The
1941 * timestamp is only taken once, at the first such call. It is assumed that
1942 * the driver advances its @tx buffer pointer monotonically.
b42faeee
VO		 1943 */
1944void spi_take_timestamp_pre(struct spi_controller *ctlr,
1945 struct spi_transfer *xfer,
862dd2a9 1946 size_t progress, bool irqs_off)
b42faeee 1947{
b42faeee
VO		 1948 if (!xfer->ptp_sts)
1949 return;
1950
6a726824 1951 if (xfer->timestamped)
b42faeee
VO		 1952 return;
1953
6a726824 1954 if (progress > xfer->ptp_sts_word_pre)
b42faeee
VO		 1955 return;
1956
1957 /* Capture the resolution of the timestamp */
862dd2a9 1958 xfer->ptp_sts_word_pre = progress;
b42faeee 1959
b42faeee
VO		 1960 if (irqs_off) {
1961 local_irq_save(ctlr->irq_flags);
1962 preempt_disable();
1963 }
1964
1965 ptp_read_system_prets(xfer->ptp_sts);
1966}
1967EXPORT_SYMBOL_GPL(spi_take_timestamp_pre);
1968
1969/**
350de7ce 1970 * spi_take_timestamp_post - helper to collect the end of the TX timestamp
b42faeee
VO		 1971 * @ctlr: Pointer to the spi_controller structure of the driver
1972 * @xfer: Pointer to the transfer being timestamped
862dd2a9 1973 * @progress: How many words (not bytes) have been transferred so far
b42faeee 1974 * @irqs_off: If true, will re-enable IRQs and preemption for the local CPU.
350de7ce
AS		 1975 *
1976 * This is a helper for drivers to collect the end of the TX timestamp for
1977 * the requested byte from the SPI transfer. Can be called with an arbitrary
1978 * frequency: only the first call where @tx exceeds or is equal to the
1979 * requested word will be timestamped.
b42faeee
VO		 1980 */
1981void spi_take_timestamp_post(struct spi_controller *ctlr,
1982 struct spi_transfer *xfer,
862dd2a9 1983 size_t progress, bool irqs_off)
b42faeee 1984{
b42faeee
VO		 1985 if (!xfer->ptp_sts)
1986 return;
1987
6a726824 1988 if (xfer->timestamped)
b42faeee
VO		 1989 return;
1990
862dd2a9 1991 if (progress < xfer->ptp_sts_word_post)
b42faeee
VO		 1992 return;
1993
1994 ptp_read_system_postts(xfer->ptp_sts);
1995
1996 if (irqs_off) {
1997 local_irq_restore(ctlr->irq_flags);
1998 preempt_enable();
1999 }
2000
2001 /* Capture the resolution of the timestamp */
862dd2a9 2002 xfer->ptp_sts_word_post = progress;
b42faeee 2003
9d77522b 2004 xfer->timestamped = 1;
b42faeee
VO		 2005}
2006EXPORT_SYMBOL_GPL(spi_take_timestamp_post);
2007
924b5867
DA		 2008/**
2009 * spi_set_thread_rt - set the controller to pump at realtime priority
2010 * @ctlr: controller to boost priority of
2011 *
2012 * This can be called because the controller requested realtime priority
2013 * (by setting the ->rt value before calling spi_register_controller()) or
2014 * because a device on the bus said that its transfers needed realtime
2015 * priority.
2016 *
2017 * NOTE: at the moment if any device on a bus says it needs realtime then
2018 * the thread will be at realtime priority for all transfers on that
2019 * controller. If this eventually becomes a problem we may see if we can
2020 * find a way to boost the priority only temporarily during relevant
2021 * transfers.
2022 */
2023static void spi_set_thread_rt(struct spi_controller *ctlr)
ffbbdd21 2024{
924b5867
DA		 2025 dev_info(&ctlr->dev,
2026 "will run message pump with realtime priority\n");
6d2b84a4 2027 sched_set_fifo(ctlr->kworker->task);
924b5867
DA		 2028}
2029
2030static int spi_init_queue(struct spi_controller *ctlr)
2031{
8caab75f
GU		 2032 ctlr->running = false;
2033 ctlr->busy = false;
ae7d2346 2034 ctlr->queue_empty = true;
ffbbdd21 2035
60a883d1
MS		 2036 ctlr->kworker = kthread_create_worker(0, dev_name(&ctlr->dev));
2037 if (IS_ERR(ctlr->kworker)) {
2038 dev_err(&ctlr->dev, "failed to create message pump kworker\n");
2039 return PTR_ERR(ctlr->kworker);
ffbbdd21 2040 }
60a883d1 2041
8caab75f 2042 kthread_init_work(&ctlr->pump_messages, spi_pump_messages);
f0125f1a 2043
ffbbdd21 2044 /*
8caab75f 2045 * Controller config will indicate if this controller should run the
ffbbdd21
LW		 2046 * message pump with high (realtime) priority to reduce the transfer
2047 * latency on the bus by minimising the delay between a transfer
2048 * request and the scheduling of the message pump thread. Without this
2049 * setting the message pump thread will remain at default priority.
2050 */
924b5867
DA		 2051 if (ctlr->rt)
2052 spi_set_thread_rt(ctlr);
ffbbdd21
LW		 2053
2054 return 0;
2055}
2056
2057/**
2058 * spi_get_next_queued_message() - called by driver to check for queued
2059 * messages
8caab75f 2060 * @ctlr: the controller to check for queued messages
ffbbdd21
LW		 2061 *
2062 * If there are more messages in the queue, the next message is returned from
2063 * this call.
97d56dc6
JMC		 2064 *
2065 * Return: the next message in the queue, else NULL if the queue is empty.
ffbbdd21 2066 */
8caab75f 2067struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr)
ffbbdd21
LW		 2068{
2069 struct spi_message *next;
2070 unsigned long flags;
2071
95c8222f 2072 /* Get a pointer to the next message, if any */
8caab75f
GU		 2073 spin_lock_irqsave(&ctlr->queue_lock, flags);
2074 next = list_first_entry_or_null(&ctlr->queue, struct spi_message,
1cfd97f9 2075 queue);
8caab75f 2076 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2077
2078 return next;
2079}
2080EXPORT_SYMBOL_GPL(spi_get_next_queued_message);
2081
2082/**
2083 * spi_finalize_current_message() - the current message is complete
8caab75f 2084 * @ctlr: the controller to return the message to
ffbbdd21
LW		 2085 *
2086 * Called by the driver to notify the core that the message in the front of the
2087 * queue is complete and can be removed from the queue.
2088 */
8caab75f 2089void spi_finalize_current_message(struct spi_controller *ctlr)
ffbbdd21 2090{
b42faeee 2091 struct spi_transfer *xfer;
ffbbdd21 2092 struct spi_message *mesg;
2841a5fc 2093 int ret;
ffbbdd21 2094
8caab75f 2095 mesg = ctlr->cur_msg;
ffbbdd21 2096
b42faeee
VO		 2097 if (!ctlr->ptp_sts_supported && !ctlr->transfer_one) {
2098 list_for_each_entry(xfer, &mesg->transfers, transfer_list) {
2099 ptp_read_system_postts(xfer->ptp_sts);
2100 xfer->ptp_sts_word_post = xfer->len;
2101 }
2102 }
2103
6a726824
VO		 2104 if (unlikely(ctlr->ptp_sts_supported))
2105 list_for_each_entry(xfer, &mesg->transfers, transfer_list)
2106 WARN_ON_ONCE(xfer->ptp_sts && !xfer->timestamped);
f971a207 2107
8caab75f 2108 spi_unmap_msg(ctlr, mesg);
99adef31 2109
350de7ce
AS		 2110 /*
2111 * In the prepare_messages callback the SPI bus has the opportunity
2112 * to split a transfer to smaller chunks.
2113 *
2114 * Release the split transfers here since spi_map_msg() is done on
2115 * the split transfers.
b59a7ca1
GW		 2116 */
2117 spi_res_release(ctlr, mesg);
2118
1714582a 2119 if (mesg->prepared && ctlr->unprepare_message) {
8caab75f 2120 ret = ctlr->unprepare_message(ctlr, mesg);
2841a5fc 2121 if (ret) {
8caab75f
GU		 2122 dev_err(&ctlr->dev, "failed to unprepare message: %d\n",
2123 ret);
2841a5fc
MB		 2124 }
2125 }
391949b6 2126
1714582a
DJ		 2127 mesg->prepared = false;
2128
dc302905
DJ		 2129 WRITE_ONCE(ctlr->cur_msg_incomplete, false);
2130 smp_mb(); /* See __spi_pump_transfer_message()... */
2131 if (READ_ONCE(ctlr->cur_msg_need_completion))
2132 complete(&ctlr->cur_msg_completion);
8e76ef88
MS		 2133
2134 trace_spi_message_done(mesg);
2841a5fc 2135
ffbbdd21
LW		 2136 mesg->state = NULL;
2137 if (mesg->complete)
2138 mesg->complete(mesg->context);
2139}
2140EXPORT_SYMBOL_GPL(spi_finalize_current_message);
2141
8caab75f 2142static int spi_start_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 2143{
2144 unsigned long flags;
2145
8caab75f 2146 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2147
8caab75f
GU		 2148 if (ctlr->running || ctlr->busy) {
2149 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2150 return -EBUSY;
2151 }
2152
8caab75f
GU		 2153 ctlr->running = true;
2154 ctlr->cur_msg = NULL;
2155 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 2156
60a883d1 2157 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21
LW		 2158
2159 return 0;
2160}
2161
8caab75f 2162static int spi_stop_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 2163{
2164 unsigned long flags;
2165 unsigned limit = 500;
2166 int ret = 0;
2167
8caab75f 2168 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2169
2170 /*
2171 * This is a bit lame, but is optimized for the common execution path.
8caab75f 2172 * A wait_queue on the ctlr->busy could be used, but then the common
ffbbdd21
LW		 2173 * execution path (pump_messages) would be required to call wake_up or
2174 * friends on every SPI message. Do this instead.
2175 */
8caab75f
GU		 2176 while ((!list_empty(&ctlr->queue) || ctlr->busy) && limit--) {
2177 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
f97b26b0 2178 usleep_range(10000, 11000);
8caab75f 2179 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2180 }
2181
8caab75f 2182 if (!list_empty(&ctlr->queue) || ctlr->busy)
ffbbdd21
LW		 2183 ret = -EBUSY;
2184 else
8caab75f 2185 ctlr->running = false;
ffbbdd21 2186
8caab75f 2187 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21 2188
ffbbdd21
LW		 2189 return ret;
2190}
2191
8caab75f 2192static int spi_destroy_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 2193{
2194 int ret;
2195
8caab75f 2196 ret = spi_stop_queue(ctlr);
ffbbdd21
LW		 2197
2198 /*
3989144f 2199 * kthread_flush_worker will block until all work is done.
ffbbdd21
LW		 2200 * If the reason that stop_queue timed out is that the work will never
2201 * finish, then it does no good to call flush/stop thread, so
2202 * return anyway.
2203 */
2204 if (ret) {
8caab75f 2205 dev_err(&ctlr->dev, "problem destroying queue\n");
ffbbdd21
LW		 2206 return ret;
2207 }
2208
60a883d1 2209 kthread_destroy_worker(ctlr->kworker);
ffbbdd21
LW		 2210
2211 return 0;
2212}
2213
0461a414
MB		 2214static int __spi_queued_transfer(struct spi_device *spi,
2215 struct spi_message *msg,
2216 bool need_pump)
ffbbdd21 2217{
8caab75f 2218 struct spi_controller *ctlr = spi->controller;
ffbbdd21
LW		 2219 unsigned long flags;
2220
8caab75f 2221 spin_lock_irqsave(&ctlr->queue_lock, flags);
ffbbdd21 2222
8caab75f
GU		 2223 if (!ctlr->running) {
2224 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2225 return -ESHUTDOWN;
2226 }
2227 msg->actual_length = 0;
2228 msg->status = -EINPROGRESS;
2229
8caab75f 2230 list_add_tail(&msg->queue, &ctlr->queue);
ae7d2346 2231 ctlr->queue_empty = false;
f0125f1a 2232 if (!ctlr->busy && need_pump)
60a883d1 2233 kthread_queue_work(ctlr->kworker, &ctlr->pump_messages);
ffbbdd21 2234
8caab75f 2235 spin_unlock_irqrestore(&ctlr->queue_lock, flags);
ffbbdd21
LW		 2236 return 0;
2237}
2238
0461a414
MB		 2239/**
2240 * spi_queued_transfer - transfer function for queued transfers
702ca026
AS		 2241 * @spi: SPI device which is requesting transfer
2242 * @msg: SPI message which is to handled is queued to driver queue
97d56dc6
JMC		 2243 *
2244 * Return: zero on success, else a negative error code.
0461a414
MB		 2245 */
2246static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg)
2247{
2248 return __spi_queued_transfer(spi, msg, true);
2249}
2250
8caab75f 2251static int spi_controller_initialize_queue(struct spi_controller *ctlr)
ffbbdd21
LW		 2252{
2253 int ret;
2254
8caab75f
GU		 2255 ctlr->transfer = spi_queued_transfer;
2256 if (!ctlr->transfer_one_message)
2257 ctlr->transfer_one_message = spi_transfer_one_message;
ffbbdd21
LW		 2258
2259 /* Initialize and start queue */
8caab75f 2260 ret = spi_init_queue(ctlr);
ffbbdd21 2261 if (ret) {
8caab75f 2262 dev_err(&ctlr->dev, "problem initializing queue\n");
ffbbdd21
LW		 2263 goto err_init_queue;
2264 }
8caab75f
GU		 2265 ctlr->queued = true;
2266 ret = spi_start_queue(ctlr);
ffbbdd21 2267 if (ret) {
8caab75f 2268 dev_err(&ctlr->dev, "problem starting queue\n");
ffbbdd21
LW		 2269 goto err_start_queue;
2270 }
2271
2272 return 0;
2273
2274err_start_queue:
8caab75f 2275 spi_destroy_queue(ctlr);
c3676d5c 2276err_init_queue:
ffbbdd21
LW		 2277 return ret;
2278}
2279
988f259b
BB		 2280/**
2281 * spi_flush_queue - Send all pending messages in the queue from the callers'
2282 * context
2283 * @ctlr: controller to process queue for
2284 *
2285 * This should be used when one wants to ensure all pending messages have been
2286 * sent before doing something. Is used by the spi-mem code to make sure SPI
2287 * memory operations do not preempt regular SPI transfers that have been queued
2288 * before the spi-mem operation.
2289 */
2290void spi_flush_queue(struct spi_controller *ctlr)
2291{
2292 if (ctlr->transfer == spi_queued_transfer)
2293 __spi_pump_messages(ctlr, false);
2294}
2295
ffbbdd21
LW		 2296/*-------------------------------------------------------------------------*/
2297
7cb94361 2298#if defined(CONFIG_OF)
f276aacf
JG		 2299static void of_spi_parse_dt_cs_delay(struct device_node *nc,
2300 struct spi_delay *delay, const char *prop)
2301{
2302 u32 value;
2303
2304 if (!of_property_read_u32(nc, prop, &value)) {
2305 if (value > U16_MAX) {
2306 delay->value = DIV_ROUND_UP(value, 1000);
2307 delay->unit = SPI_DELAY_UNIT_USECS;
2308 } else {
2309 delay->value = value;
2310 delay->unit = SPI_DELAY_UNIT_NSECS;
2311 }
2312 }
2313}
2314
8caab75f 2315static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
c2e51ac3 2316 struct device_node *nc)
aff5e3f8 2317{
4d8ff6b0
AKM		 2318 u32 value, cs[SPI_CS_CNT_MAX];
2319 int rc, idx;
aff5e3f8 2320
aff5e3f8 2321 /* Mode (clock phase/polarity/etc.) */
e0bcb680 2322 if (of_property_read_bool(nc, "spi-cpha"))
aff5e3f8 2323 spi->mode |= SPI_CPHA;
e0bcb680 2324 if (of_property_read_bool(nc, "spi-cpol"))
aff5e3f8 2325 spi->mode |= SPI_CPOL;
e0bcb680 2326 if (of_property_read_bool(nc, "spi-3wire"))
aff5e3f8 2327 spi->mode |= SPI_3WIRE;
e0bcb680 2328 if (of_property_read_bool(nc, "spi-lsb-first"))
aff5e3f8 2329 spi->mode |= SPI_LSB_FIRST;
3e5ec1db 2330 if (of_property_read_bool(nc, "spi-cs-high"))
f3186dd8
LW		 2331 spi->mode |= SPI_CS_HIGH;
2332
aff5e3f8
PA		 2333 /* Device DUAL/QUAD mode */
2334 if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) {
2335 switch (value) {
d962608c
DB		 2336 case 0:
2337 spi->mode |= SPI_NO_TX;
2338 break;
aff5e3f8
PA		 2339 case 1:
2340 break;
2341 case 2:
2342 spi->mode |= SPI_TX_DUAL;
2343 break;
2344 case 4:
2345 spi->mode |= SPI_TX_QUAD;
2346 break;
6b03061f
YNG		 2347 case 8:
2348 spi->mode |= SPI_TX_OCTAL;
2349 break;
aff5e3f8 2350 default:
8caab75f 2351 dev_warn(&ctlr->dev,
aff5e3f8
PA		 2352 "spi-tx-bus-width %d not supported\n",
2353 value);
2354 break;
2355 }
2356 }
2357
2358 if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) {
2359 switch (value) {
d962608c
DB		 2360 case 0:
2361 spi->mode |= SPI_NO_RX;
2362 break;
aff5e3f8
PA		 2363 case 1:
2364 break;
2365 case 2:
2366 spi->mode |= SPI_RX_DUAL;
2367 break;
2368 case 4:
2369 spi->mode |= SPI_RX_QUAD;
2370 break;
6b03061f
YNG		 2371 case 8:
2372 spi->mode |= SPI_RX_OCTAL;
2373 break;
aff5e3f8 2374 default:
8caab75f 2375 dev_warn(&ctlr->dev,
aff5e3f8
PA		 2376 "spi-rx-bus-width %d not supported\n",
2377 value);
2378 break;
2379 }
2380 }
2381
8caab75f 2382 if (spi_controller_is_slave(ctlr)) {
194276b0 2383 if (!of_node_name_eq(nc, "slave")) {
25c56c88
RH		 2384 dev_err(&ctlr->dev, "%pOF is not called 'slave'\n",
2385 nc);
6c364062
GU		 2386 return -EINVAL;
2387 }
2388 return 0;
2389 }
2390
4d8ff6b0
AKM		 2391 if (ctlr->num_chipselect > SPI_CS_CNT_MAX) {
2392 dev_err(&ctlr->dev, "No. of CS is more than max. no. of supported CS\n");
2393 return -EINVAL;
2394 }
2395
2396 /*
2397 * Zero(0) is a valid physical CS value and can be located at any
2398 * logical CS in the spi->chip_select[]. If all the physical CS
2399 * are initialized to 0 then It would be difficult to differentiate
2400 * between a valid physical CS 0 & an unused logical CS whose physical
2401 * CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
2402 * Now all the unused logical CS will have 0xFF physical CS value & can be
2403 * ignore while performing physical CS validity checks.
2404 */
2405 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
2406 spi_set_chipselect(spi, idx, 0xFF);
2407
6c364062 2408 /* Device address */
4d8ff6b0
AKM		 2409 rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1,
2410 SPI_CS_CNT_MAX);
2411 if (rc < 0) {
25c56c88
RH		 2412 dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
2413 nc, rc);
6c364062
GU		 2414 return rc;
2415 }
4d8ff6b0
AKM		 2416 if (rc > ctlr->num_chipselect) {
2417 dev_err(&ctlr->dev, "%pOF has number of CS > ctlr->num_chipselect (%d)\n",
2418 nc, rc);
2419 return rc;
2420 }
2421 if ((of_property_read_bool(nc, "parallel-memories")) &&
2422 (!(ctlr->flags & SPI_CONTROLLER_MULTI_CS))) {
2423 dev_err(&ctlr->dev, "SPI controller doesn't support multi CS\n");
2424 return -EINVAL;
2425 }
2426 for (idx = 0; idx < rc; idx++)
2427 spi_set_chipselect(spi, idx, cs[idx]);
2428
2429 /*
2430 * spi->chip_select[i] gives the corresponding physical CS for logical CS i
2431 * logical CS number is represented by setting the ith bit in spi->cs_index_mask
2432 * So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
2433 * spi->chip_select[0] will give the physical CS.
2434 * By default spi->chip_select[0] will hold the physical CS number so, set
2435 * spi->cs_index_mask as 0x01.
2436 */
2437 spi->cs_index_mask = 0x01;
6c364062 2438
aff5e3f8 2439 /* Device speed */
671c3bf5
CG		 2440 if (!of_property_read_u32(nc, "spi-max-frequency", &value))
2441 spi->max_speed_hz = value;
aff5e3f8 2442
f276aacf
JG		 2443 /* Device CS delays */
2444 of_spi_parse_dt_cs_delay(nc, &spi->cs_setup, "spi-cs-setup-delay-ns");
5827b31d
JG		 2445 of_spi_parse_dt_cs_delay(nc, &spi->cs_hold, "spi-cs-hold-delay-ns");
2446 of_spi_parse_dt_cs_delay(nc, &spi->cs_inactive, "spi-cs-inactive-delay-ns");
33a2fde5 2447
c2e51ac3
GU		 2448 return 0;
2449}
2450
2451static struct spi_device *
8caab75f 2452of_register_spi_device(struct spi_controller *ctlr, struct device_node *nc)
c2e51ac3
GU		 2453{
2454 struct spi_device *spi;
2455 int rc;
2456
2457 /* Alloc an spi_device */
8caab75f 2458 spi = spi_alloc_device(ctlr);
c2e51ac3 2459 if (!spi) {
25c56c88 2460 dev_err(&ctlr->dev, "spi_device alloc error for %pOF\n", nc);
c2e51ac3
GU		 2461 rc = -ENOMEM;
2462 goto err_out;
2463 }
2464
2465 /* Select device driver */
673aa1ed
MR		 2466 rc = of_alias_from_compatible(nc, spi->modalias,
2467 sizeof(spi->modalias));
c2e51ac3 2468 if (rc < 0) {
25c56c88 2469 dev_err(&ctlr->dev, "cannot find modalias for %pOF\n", nc);
c2e51ac3
GU		 2470 goto err_out;
2471 }
2472
8caab75f 2473 rc = of_spi_parse_dt(ctlr, spi, nc);
c2e51ac3
GU		 2474 if (rc)
2475 goto err_out;
2476
aff5e3f8
PA		 2477 /* Store a pointer to the node in the device structure */
2478 of_node_get(nc);
c7cc588b
AS		 2479
2480 device_set_node(&spi->dev, of_fwnode_handle(nc));
aff5e3f8
PA		 2481
2482 /* Register the new device */
aff5e3f8
PA		 2483 rc = spi_add_device(spi);
2484 if (rc) {
25c56c88 2485 dev_err(&ctlr->dev, "spi_device register error %pOF\n", nc);
8324147f 2486 goto err_of_node_put;
aff5e3f8
PA		 2487 }
2488
2489 return spi;
2490
8324147f
JH		 2491err_of_node_put:
2492 of_node_put(nc);
aff5e3f8
PA		 2493err_out:
2494 spi_dev_put(spi);
2495 return ERR_PTR(rc);
2496}
2497
d57a4282
GL		 2498/**
2499 * of_register_spi_devices() - Register child devices onto the SPI bus
8caab75f 2500 * @ctlr: Pointer to spi_controller device
d57a4282 2501 *
6c364062
GU		 2502 * Registers an spi_device for each child node of controller node which
2503 * represents a valid SPI slave.
d57a4282 2504 */
8caab75f 2505static void of_register_spi_devices(struct spi_controller *ctlr)
d57a4282
GL		 2506{
2507 struct spi_device *spi;
2508 struct device_node *nc;
d57a4282 2509
8caab75f 2510 for_each_available_child_of_node(ctlr->dev.of_node, nc) {
bd6c1644
GU		 2511 if (of_node_test_and_set_flag(nc, OF_POPULATED))
2512 continue;
8caab75f 2513 spi = of_register_spi_device(ctlr, nc);
e0af98a7 2514 if (IS_ERR(spi)) {
8caab75f 2515 dev_warn(&ctlr->dev,
25c56c88 2516 "Failed to create SPI device for %pOF\n", nc);
e0af98a7
RR		 2517 of_node_clear_flag(nc, OF_POPULATED);
2518 }
d57a4282
GL		 2519 }
2520}
2521#else
8caab75f 2522static void of_register_spi_devices(struct spi_controller *ctlr) { }
d57a4282
GL		 2523#endif
2524
0c79378c
SR		 2525/**
2526 * spi_new_ancillary_device() - Register ancillary SPI device
2527 * @spi: Pointer to the main SPI device registering the ancillary device
2528 * @chip_select: Chip Select of the ancillary device
2529 *
2530 * Register an ancillary SPI device; for example some chips have a chip-select
2531 * for normal device usage and another one for setup/firmware upload.
2532 *
2533 * This may only be called from main SPI device's probe routine.
2534 *
2535 * Return: 0 on success; negative errno on failure
2536 */
2537struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
2538 u8 chip_select)
2539{
7b5c6a54 2540 struct spi_controller *ctlr = spi->controller;
0c79378c
SR		 2541 struct spi_device *ancillary;
2542 int rc = 0;
4d8ff6b0 2543 u8 idx;
0c79378c
SR		 2544
2545 /* Alloc an spi_device */
7b5c6a54 2546 ancillary = spi_alloc_device(ctlr);
0c79378c
SR		 2547 if (!ancillary) {
2548 rc = -ENOMEM;
2549 goto err_out;
2550 }
2551
51e99de5 2552 strscpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
0c79378c 2553
4d8ff6b0
AKM		 2554 /*
2555 * Zero(0) is a valid physical CS value and can be located at any
2556 * logical CS in the spi->chip_select[]. If all the physical CS
2557 * are initialized to 0 then It would be difficult to differentiate
2558 * between a valid physical CS 0 & an unused logical CS whose physical
2559 * CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
2560 * Now all the unused logical CS will have 0xFF physical CS value & can be
2561 * ignore while performing physical CS validity checks.
2562 */
2563 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
2564 spi_set_chipselect(ancillary, idx, 0xFF);
2565
0c79378c 2566 /* Use provided chip-select for ancillary device */
303feb3c 2567 spi_set_chipselect(ancillary, 0, chip_select);
0c79378c
SR		 2568
2569 /* Take over SPI mode/speed from SPI main device */
2570 ancillary->max_speed_hz = spi->max_speed_hz;
b01d5506 2571 ancillary->mode = spi->mode;
4d8ff6b0
AKM		 2572 /*
2573 * spi->chip_select[i] gives the corresponding physical CS for logical CS i
2574 * logical CS number is represented by setting the ith bit in spi->cs_index_mask
2575 * So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
2576 * spi->chip_select[0] will give the physical CS.
2577 * By default spi->chip_select[0] will hold the physical CS number so, set
2578 * spi->cs_index_mask as 0x01.
2579 */
2580 ancillary->cs_index_mask = 0x01;
0c79378c 2581
7b5c6a54
AS		 2582 WARN_ON(!mutex_is_locked(&ctlr->add_lock));
2583
0c79378c 2584 /* Register the new device */
7b5c6a54 2585 rc = __spi_add_device(ancillary);
0c79378c
SR		 2586 if (rc) {
2587 dev_err(&spi->dev, "failed to register ancillary device\n");
2588 goto err_out;
2589 }
2590
2591 return ancillary;
2592
2593err_out:
2594 spi_dev_put(ancillary);
2595 return ERR_PTR(rc);
2596}
2597EXPORT_SYMBOL_GPL(spi_new_ancillary_device);
2598
64bee4d2 2599#ifdef CONFIG_ACPI
4c3c5954
AB		 2600struct acpi_spi_lookup {
2601 struct spi_controller *ctlr;
2602 u32 max_speed_hz;
2603 u32 mode;
2604 int irq;
2605 u8 bits_per_word;
2606 u8 chip_select;
87e59b36
SB		 2607 int n;
2608 int index;
4c3c5954
AB		 2609};
2610
e612af7a
SB		 2611static int acpi_spi_count(struct acpi_resource *ares, void *data)
2612{
2613 struct acpi_resource_spi_serialbus *sb;
2614 int *count = data;
2615
2616 if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
2617 return 1;
2618
2619 sb = &ares->data.spi_serial_bus;
2620 if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_SPI)
2621 return 1;
2622
2623 *count = *count + 1;
2624
2625 return 1;
2626}
2627
2628/**
2629 * acpi_spi_count_resources - Count the number of SpiSerialBus resources
2630 * @adev: ACPI device
2631 *
702ca026 2632 * Return: the number of SpiSerialBus resources in the ACPI-device's
e612af7a
SB		 2633 * resource-list; or a negative error code.
2634 */
2635int acpi_spi_count_resources(struct acpi_device *adev)
2636{
2637 LIST_HEAD(r);
2638 int count = 0;
2639 int ret;
2640
2641 ret = acpi_dev_get_resources(adev, &r, acpi_spi_count, &count);
2642 if (ret < 0)
2643 return ret;
2644
2645 acpi_dev_free_resource_list(&r);
2646
2647 return count;
2648}
2649EXPORT_SYMBOL_GPL(acpi_spi_count_resources);
2650
4c3c5954
AB		 2651static void acpi_spi_parse_apple_properties(struct acpi_device *dev,
2652 struct acpi_spi_lookup *lookup)
8a2e487e 2653{
8a2e487e
LW		 2654 const union acpi_object *obj;
2655
2656 if (!x86_apple_machine)
2657 return;
2658
2659 if (!acpi_dev_get_property(dev, "spiSclkPeriod", ACPI_TYPE_BUFFER, &obj)
2660 && obj->buffer.length >= 4)
4c3c5954 2661 lookup->max_speed_hz = NSEC_PER_SEC / *(u32 *)obj->buffer.pointer;
8a2e487e
LW		 2662
2663 if (!acpi_dev_get_property(dev, "spiWordSize", ACPI_TYPE_BUFFER, &obj)
2664 && obj->buffer.length == 8)
4c3c5954 2665 lookup->bits_per_word = *(u64 *)obj->buffer.pointer;
8a2e487e
LW		 2666
2667 if (!acpi_dev_get_property(dev, "spiBitOrder", ACPI_TYPE_BUFFER, &obj)
2668 && obj->buffer.length == 8 && !*(u64 *)obj->buffer.pointer)
4c3c5954 2669 lookup->mode |= SPI_LSB_FIRST;
8a2e487e
LW		 2670
2671 if (!acpi_dev_get_property(dev, "spiSPO", ACPI_TYPE_BUFFER, &obj)
2672 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2673 lookup->mode |= SPI_CPOL;
8a2e487e
LW		 2674
2675 if (!acpi_dev_get_property(dev, "spiSPH", ACPI_TYPE_BUFFER, &obj)
2676 && obj->buffer.length == 8 && *(u64 *)obj->buffer.pointer)
4c3c5954 2677 lookup->mode |= SPI_CPHA;
8a2e487e
LW		 2678}
2679
64bee4d2
MW		 2680static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
2681{
4c3c5954
AB		 2682 struct acpi_spi_lookup *lookup = data;
2683 struct spi_controller *ctlr = lookup->ctlr;
64bee4d2
MW		 2684
2685 if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
2686 struct acpi_resource_spi_serialbus *sb;
4c3c5954
AB		 2687 acpi_handle parent_handle;
2688 acpi_status status;
64bee4d2
MW		 2689
2690 sb = &ares->data.spi_serial_bus;
2691 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) {
4c3c5954 2692
87e59b36
SB		 2693 if (lookup->index != -1 && lookup->n++ != lookup->index)
2694 return 1;
2695
4c3c5954
AB		 2696 status = acpi_get_handle(NULL,
2697 sb->resource_source.string_ptr,
2698 &parent_handle);
2699
87e59b36 2700 if (ACPI_FAILURE(status))
4c3c5954
AB		 2701 return -ENODEV;
2702
87e59b36
SB		 2703 if (ctlr) {
2704 if (ACPI_HANDLE(ctlr->dev.parent) != parent_handle)
2705 return -ENODEV;
2706 } else {
2707 struct acpi_device *adev;
2708
ac2a3fee
RW		 2709 adev = acpi_fetch_acpi_dev(parent_handle);
2710 if (!adev)
87e59b36
SB		 2711 return -ENODEV;
2712
2713 ctlr = acpi_spi_find_controller_by_adev(adev);
2714 if (!ctlr)
9c22ec4a 2715 return -EPROBE_DEFER;
87e59b36
SB		 2716
2717 lookup->ctlr = ctlr;
2718 }
2719
a0a90718
MW		 2720 /*
2721 * ACPI DeviceSelection numbering is handled by the
2722 * host controller driver in Windows and can vary
2723 * from driver to driver. In Linux we always expect
2724 * 0 .. max - 1 so we need to ask the driver to
2725 * translate between the two schemes.
2726 */
8caab75f
GU		 2727 if (ctlr->fw_translate_cs) {
2728 int cs = ctlr->fw_translate_cs(ctlr,
a0a90718
MW		 2729 sb->device_selection);
2730 if (cs < 0)
2731 return cs;
4c3c5954 2732 lookup->chip_select = cs;
a0a90718 2733 } else {
4c3c5954 2734 lookup->chip_select = sb->device_selection;
a0a90718
MW		 2735 }
2736
4c3c5954 2737 lookup->max_speed_hz = sb->connection_speed;
0dadde34 2738 lookup->bits_per_word = sb->data_bit_length;
64bee4d2
MW		 2739
2740 if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
4c3c5954 2741 lookup->mode |= SPI_CPHA;
64bee4d2 2742 if (sb->clock_polarity == ACPI_SPI_START_HIGH)
4c3c5954 2743 lookup->mode |= SPI_CPOL;
64bee4d2 2744 if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH)
4c3c5954 2745 lookup->mode |= SPI_CS_HIGH;
64bee4d2 2746 }
4c3c5954 2747 } else if (lookup->irq < 0) {
64bee4d2
MW		 2748 struct resource r;
2749
2750 if (acpi_dev_resource_interrupt(ares, 0, &r))
4c3c5954 2751 lookup->irq = r.start;
64bee4d2
MW		 2752 }
2753
2754 /* Always tell the ACPI core to skip this resource */
2755 return 1;
2756}
2757
000bee0e
SB		 2758/**
2759 * acpi_spi_device_alloc - Allocate a spi device, and fill it in with ACPI information
2760 * @ctlr: controller to which the spi device belongs
2761 * @adev: ACPI Device for the spi device
87e59b36 2762 * @index: Index of the spi resource inside the ACPI Node
000bee0e 2763 *
702ca026
AS		 2764 * This should be used to allocate a new SPI device from and ACPI Device node.
2765 * The caller is responsible for calling spi_add_device to register the SPI device.
000bee0e 2766 *
702ca026 2767 * If ctlr is set to NULL, the Controller for the SPI device will be looked up
87e59b36
SB		 2768 * using the resource.
2769 * If index is set to -1, index is not used.
2770 * Note: If index is -1, ctlr must be set.
2771 *
000bee0e
SB		 2772 * Return: a pointer to the new device, or ERR_PTR on error.
2773 */
2774struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
87e59b36
SB		 2775 struct acpi_device *adev,
2776 int index)
64bee4d2 2777{
4c3c5954 2778 acpi_handle parent_handle = NULL;
64bee4d2 2779 struct list_head resource_list;
b28944c6 2780 struct acpi_spi_lookup lookup = {};
64bee4d2
MW		 2781 struct spi_device *spi;
2782 int ret;
4d8ff6b0 2783 u8 idx;
64bee4d2 2784
87e59b36
SB		 2785 if (!ctlr && index == -1)
2786 return ERR_PTR(-EINVAL);
2787
4c3c5954 2788 lookup.ctlr = ctlr;
4c3c5954 2789 lookup.irq = -1;
87e59b36
SB		 2790 lookup.index = index;
2791 lookup.n = 0;
64bee4d2
MW		 2792
2793 INIT_LIST_HEAD(&resource_list);
2794 ret = acpi_dev_get_resources(adev, &resource_list,
4c3c5954 2795 acpi_spi_add_resource, &lookup);
64bee4d2
MW		 2796 acpi_dev_free_resource_list(&resource_list);
2797
4c3c5954 2798 if (ret < 0)
95c8222f 2799 /* Found SPI in _CRS but it points to another controller */
b6747f4f 2800 return ERR_PTR(ret);
8a2e487e 2801
4c3c5954 2802 if (!lookup.max_speed_hz &&
10e92724 2803 ACPI_SUCCESS(acpi_get_parent(adev->handle, &parent_handle)) &&
87e59b36 2804 ACPI_HANDLE(lookup.ctlr->dev.parent) == parent_handle) {
4c3c5954
AB		 2805 /* Apple does not use _CRS but nested devices for SPI slaves */
2806 acpi_spi_parse_apple_properties(adev, &lookup);
2807 }
2808
2809 if (!lookup.max_speed_hz)
000bee0e 2810 return ERR_PTR(-ENODEV);
4c3c5954 2811
87e59b36 2812 spi = spi_alloc_device(lookup.ctlr);
4c3c5954 2813 if (!spi) {
87e59b36 2814 dev_err(&lookup.ctlr->dev, "failed to allocate SPI device for %s\n",
4c3c5954 2815 dev_name(&adev->dev));
000bee0e 2816 return ERR_PTR(-ENOMEM);
64bee4d2
MW		 2817 }
2818
4d8ff6b0
AKM		 2819 /*
2820 * Zero(0) is a valid physical CS value and can be located at any
2821 * logical CS in the spi->chip_select[]. If all the physical CS
2822 * are initialized to 0 then It would be difficult to differentiate
2823 * between a valid physical CS 0 & an unused logical CS whose physical
2824 * CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
2825 * Now all the unused logical CS will have 0xFF physical CS value & can be
2826 * ignore while performing physical CS validity checks.
2827 */
2828 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
2829 spi_set_chipselect(spi, idx, 0xFF);
2830
4c3c5954
AB		 2831 ACPI_COMPANION_SET(&spi->dev, adev);
2832 spi->max_speed_hz = lookup.max_speed_hz;
ea235786 2833 spi->mode |= lookup.mode;
4c3c5954
AB		 2834 spi->irq = lookup.irq;
2835 spi->bits_per_word = lookup.bits_per_word;
303feb3c 2836 spi_set_chipselect(spi, 0, lookup.chip_select);
4d8ff6b0
AKM		 2837 /*
2838 * spi->chip_select[i] gives the corresponding physical CS for logical CS i
2839 * logical CS number is represented by setting the ith bit in spi->cs_index_mask
2840 * So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
2841 * spi->chip_select[0] will give the physical CS.
2842 * By default spi->chip_select[0] will hold the physical CS number so, set
2843 * spi->cs_index_mask as 0x01.
2844 */
2845 spi->cs_index_mask = 0x01;
4c3c5954 2846
000bee0e
SB		 2847 return spi;
2848}
2849EXPORT_SYMBOL_GPL(acpi_spi_device_alloc);
2850
2851static acpi_status acpi_register_spi_device(struct spi_controller *ctlr,
2852 struct acpi_device *adev)
2853{
2854 struct spi_device *spi;
2855
2856 if (acpi_bus_get_status(adev) || !adev->status.present ||
2857 acpi_device_enumerated(adev))
2858 return AE_OK;
2859
87e59b36 2860 spi = acpi_spi_device_alloc(ctlr, adev, -1);
000bee0e
SB		 2861 if (IS_ERR(spi)) {
2862 if (PTR_ERR(spi) == -ENOMEM)
2863 return AE_NO_MEMORY;
2864 else
2865 return AE_OK;
2866 }
2867
0c6543f6
DD		 2868 acpi_set_modalias(adev, acpi_device_hid(adev), spi->modalias,
2869 sizeof(spi->modalias));
2870
33ada67d
CR		 2871 if (spi->irq < 0)
2872 spi->irq = acpi_dev_gpio_irq_get(adev, 0);
2873
7f24467f
OP		 2874 acpi_device_set_enumerated(adev);
2875
33cf00e5 2876 adev->power.flags.ignore_parent = true;
64bee4d2 2877 if (spi_add_device(spi)) {
33cf00e5 2878 adev->power.flags.ignore_parent = false;
8caab75f 2879 dev_err(&ctlr->dev, "failed to add SPI device %s from ACPI\n",
64bee4d2
MW		 2880 dev_name(&adev->dev));
2881 spi_dev_put(spi);
2882 }
2883
2884 return AE_OK;
2885}
2886
7f24467f
OP		 2887static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level,
2888 void *data, void **return_value)
2889{
7030c428 2890 struct acpi_device *adev = acpi_fetch_acpi_dev(handle);
8caab75f 2891 struct spi_controller *ctlr = data;
7f24467f 2892
7030c428 2893 if (!adev)
7f24467f
OP		 2894 return AE_OK;
2895
8caab75f 2896 return acpi_register_spi_device(ctlr, adev);
7f24467f
OP		 2897}
2898
4c3c5954
AB		 2899#define SPI_ACPI_ENUMERATE_MAX_DEPTH 32
2900
8caab75f 2901static void acpi_register_spi_devices(struct spi_controller *ctlr)
64bee4d2
MW		 2902{
2903 acpi_status status;
2904 acpi_handle handle;
2905
8caab75f 2906 handle = ACPI_HANDLE(ctlr->dev.parent);
64bee4d2
MW		 2907 if (!handle)
2908 return;
2909
4c3c5954
AB		 2910 status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
2911 SPI_ACPI_ENUMERATE_MAX_DEPTH,
8caab75f 2912 acpi_spi_add_device, NULL, ctlr, NULL);
64bee4d2 2913 if (ACPI_FAILURE(status))
8caab75f 2914 dev_warn(&ctlr->dev, "failed to enumerate SPI slaves\n");
64bee4d2
MW		 2915}
2916#else
8caab75f 2917static inline void acpi_register_spi_devices(struct spi_controller *ctlr) {}
64bee4d2
MW		 2918#endif /* CONFIG_ACPI */
2919
8caab75f 2920static void spi_controller_release(struct device *dev)
8ae12a0d 2921{
8caab75f 2922 struct spi_controller *ctlr;
8ae12a0d 2923
8caab75f
GU		 2924 ctlr = container_of(dev, struct spi_controller, dev);
2925 kfree(ctlr);
8ae12a0d
DB		 2926}
2927
2928static struct class spi_master_class = {
2929 .name = "spi_master",
8caab75f 2930 .dev_release = spi_controller_release,
eca2ebc7 2931 .dev_groups = spi_master_groups,
8ae12a0d
DB		 2932};
2933
6c364062
GU		 2934#ifdef CONFIG_SPI_SLAVE
2935/**
2936 * spi_slave_abort - abort the ongoing transfer request on an SPI slave
2937 * controller
2938 * @spi: device used for the current transfer
2939 */
2940int spi_slave_abort(struct spi_device *spi)
2941{
8caab75f 2942 struct spi_controller *ctlr = spi->controller;
6c364062 2943
8caab75f
GU		 2944 if (spi_controller_is_slave(ctlr) && ctlr->slave_abort)
2945 return ctlr->slave_abort(ctlr);
6c364062
GU		 2946
2947 return -ENOTSUPP;
2948}
2949EXPORT_SYMBOL_GPL(spi_slave_abort);
2950
b8d3b056
YY		 2951int spi_target_abort(struct spi_device *spi)
2952{
2953 struct spi_controller *ctlr = spi->controller;
2954
2955 if (spi_controller_is_target(ctlr) && ctlr->target_abort)
2956 return ctlr->target_abort(ctlr);
2957
2958 return -ENOTSUPP;
2959}
2960EXPORT_SYMBOL_GPL(spi_target_abort);
2961
cc8b4659
GU		 2962static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
2963 char *buf)
6c364062 2964{
8caab75f
GU		 2965 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2966 dev);
6c364062
GU		 2967 struct device *child;
2968
c21b0837 2969 child = device_find_any_child(&ctlr->dev);
f2daa466 2970 return sysfs_emit(buf, "%s\n", child ? to_spi_device(child)->modalias : NULL);
6c364062
GU		 2971}
2972
cc8b4659
GU		 2973static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
2974 const char *buf, size_t count)
6c364062 2975{
8caab75f
GU		 2976 struct spi_controller *ctlr = container_of(dev, struct spi_controller,
2977 dev);
6c364062
GU		 2978 struct spi_device *spi;
2979 struct device *child;
2980 char name[32];
2981 int rc;
2982
2983 rc = sscanf(buf, "%31s", name);
2984 if (rc != 1 || !name[0])
2985 return -EINVAL;
2986
c21b0837 2987 child = device_find_any_child(&ctlr->dev);
6c364062
GU		 2988 if (child) {
2989 /* Remove registered slave */
2990 device_unregister(child);
2991 put_device(child);
2992 }
2993
2994 if (strcmp(name, "(null)")) {
2995 /* Register new slave */
2996 spi = spi_alloc_device(ctlr);
2997 if (!spi)
2998 return -ENOMEM;
2999
51e99de5 3000 strscpy(spi->modalias, name, sizeof(spi->modalias));
6c364062
GU		 3001
3002 rc = spi_add_device(spi);
3003 if (rc) {
3004 spi_dev_put(spi);
3005 return rc;
3006 }
3007 }
3008
3009 return count;
3010}
3011
cc8b4659 3012static DEVICE_ATTR_RW(slave);
6c364062
GU		 3013
3014static struct attribute *spi_slave_attrs[] = {
3015 &dev_attr_slave.attr,
3016 NULL,
3017};
3018
3019static const struct attribute_group spi_slave_group = {
3020 .attrs = spi_slave_attrs,
3021};
3022
3023static const struct attribute_group *spi_slave_groups[] = {
8caab75f 3024 &spi_controller_statistics_group,
6c364062
GU		 3025 &spi_slave_group,
3026 NULL,
3027};
3028
3029static struct class spi_slave_class = {
3030 .name = "spi_slave",
8caab75f 3031 .dev_release = spi_controller_release,
6c364062
GU		 3032 .dev_groups = spi_slave_groups,
3033};
3034#else
3035extern struct class spi_slave_class; /* dummy */
3036#endif
8ae12a0d
DB		 3037
3038/**
6c364062 3039 * __spi_alloc_controller - allocate an SPI master or slave controller
8ae12a0d 3040 * @dev: the controller, possibly using the platform_bus
33e34dc6 3041 * @size: how much zeroed driver-private data to allocate; the pointer to this
229e6af1
LW		 3042 * memory is in the driver_data field of the returned device, accessible
3043 * with spi_controller_get_devdata(); the memory is cacheline aligned;
3044 * drivers granting DMA access to portions of their private data need to
3045 * round up @size using ALIGN(size, dma_get_cache_alignment()).
6c364062
GU		 3046 * @slave: flag indicating whether to allocate an SPI master (false) or SPI
3047 * slave (true) controller
33e34dc6 3048 * Context: can sleep
8ae12a0d 3049 *
6c364062 3050 * This call is used only by SPI controller drivers, which are the
8ae12a0d 3051 * only ones directly touching chip registers. It's how they allocate
8caab75f 3052 * an spi_controller structure, prior to calling spi_register_controller().
8ae12a0d 3053 *
97d56dc6 3054 * This must be called from context that can sleep.
8ae12a0d 3055 *
6c364062 3056 * The caller is responsible for assigning the bus number and initializing the
8caab75f
GU		 3057 * controller's methods before calling spi_register_controller(); and (after
3058 * errors adding the device) calling spi_controller_put() to prevent a memory
3059 * leak.
97d56dc6 3060 *
6c364062 3061 * Return: the SPI controller structure on success, else NULL.
8ae12a0d 3062 */
8caab75f
GU		 3063struct spi_controller *__spi_alloc_controller(struct device *dev,
3064 unsigned int size, bool slave)
8ae12a0d 3065{
8caab75f 3066 struct spi_controller *ctlr;
229e6af1 3067 size_t ctlr_size = ALIGN(sizeof(*ctlr), dma_get_cache_alignment());
8ae12a0d 3068
0c868461
DB		 3069 if (!dev)
3070 return NULL;
3071
229e6af1 3072 ctlr = kzalloc(size + ctlr_size, GFP_KERNEL);
8caab75f 3073 if (!ctlr)
8ae12a0d
DB		 3074 return NULL;
3075
8caab75f 3076 device_initialize(&ctlr->dev);
16a8e2fb
UKK		 3077 INIT_LIST_HEAD(&ctlr->queue);
3078 spin_lock_init(&ctlr->queue_lock);
3079 spin_lock_init(&ctlr->bus_lock_spinlock);
3080 mutex_init(&ctlr->bus_lock_mutex);
3081 mutex_init(&ctlr->io_mutex);
3082 mutex_init(&ctlr->add_lock);
8caab75f
GU		 3083 ctlr->bus_num = -1;
3084 ctlr->num_chipselect = 1;
3085 ctlr->slave = slave;
6c364062 3086 if (IS_ENABLED(CONFIG_SPI_SLAVE) && slave)
8caab75f 3087 ctlr->dev.class = &spi_slave_class;
6c364062 3088 else
8caab75f
GU		 3089 ctlr->dev.class = &spi_master_class;
3090 ctlr->dev.parent = dev;
3091 pm_suspend_ignore_children(&ctlr->dev, true);
229e6af1 3092 spi_controller_set_devdata(ctlr, (void *)ctlr + ctlr_size);
8ae12a0d 3093
8caab75f 3094 return ctlr;
8ae12a0d 3095}
6c364062 3096EXPORT_SYMBOL_GPL(__spi_alloc_controller);
8ae12a0d 3097
5e844cc3
LW		 3098static void devm_spi_release_controller(struct device *dev, void *ctlr)
3099{
3100 spi_controller_put(*(struct spi_controller **)ctlr);
3101}
3102
3103/**
3104 * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller()
3105 * @dev: physical device of SPI controller
3106 * @size: how much zeroed driver-private data to allocate
3107 * @slave: whether to allocate an SPI master (false) or SPI slave (true)
3108 * Context: can sleep
3109 *
3110 * Allocate an SPI controller and automatically release a reference on it
3111 * when @dev is unbound from its driver. Drivers are thus relieved from
3112 * having to call spi_controller_put().
3113 *
3114 * The arguments to this function are identical to __spi_alloc_controller().
3115 *
3116 * Return: the SPI controller structure on success, else NULL.
3117 */
3118struct spi_controller *__devm_spi_alloc_controller(struct device *dev,
3119 unsigned int size,
3120 bool slave)
3121{
3122 struct spi_controller **ptr, *ctlr;
3123
3124 ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr),
3125 GFP_KERNEL);
3126 if (!ptr)
3127 return NULL;
3128
3129 ctlr = __spi_alloc_controller(dev, size, slave);
3130 if (ctlr) {
794aaf01 3131 ctlr->devm_allocated = true;
5e844cc3
LW		 3132 *ptr = ctlr;
3133 devres_add(dev, ptr);
3134 } else {
3135 devres_free(ptr);
3136 }
3137
3138 return ctlr;
3139}
3140EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller);
3141
f3186dd8
LW		 3142/**
3143 * spi_get_gpio_descs() - grab chip select GPIOs for the master
3144 * @ctlr: The SPI master to grab GPIO descriptors for
3145 */
3146static int spi_get_gpio_descs(struct spi_controller *ctlr)
3147{
3148 int nb, i;
3149 struct gpio_desc **cs;
3150 struct device *dev = &ctlr->dev;
7d93aecd
GU		 3151 unsigned long native_cs_mask = 0;
3152 unsigned int num_cs_gpios = 0;
f3186dd8
LW		 3153
3154 nb = gpiod_count(dev, "cs");
31ed8ebc
AS		 3155 if (nb < 0) {
3156 /* No GPIOs at all is fine, else return the error */
3157 if (nb == -ENOENT)
3158 return 0;
f3186dd8 3159 return nb;
31ed8ebc
AS		 3160 }
3161
3162 ctlr->num_chipselect = max_t(int, nb, ctlr->num_chipselect);
f3186dd8
LW		 3163
3164 cs = devm_kcalloc(dev, ctlr->num_chipselect, sizeof(*cs),
3165 GFP_KERNEL);
3166 if (!cs)
3167 return -ENOMEM;
3168 ctlr->cs_gpiods = cs;
3169
3170 for (i = 0; i < nb; i++) {
3171 /*
3172 * Most chipselects are active low, the inverted
3173 * semantics are handled by special quirks in gpiolib,
3174 * so initializing them GPIOD_OUT_LOW here means
3175 * "unasserted", in most cases this will drive the physical
3176 * line high.
3177 */
3178 cs[i] = devm_gpiod_get_index_optional(dev, "cs", i,
3179 GPIOD_OUT_LOW);
1723fdec
GU		 3180 if (IS_ERR(cs[i]))
3181 return PTR_ERR(cs[i]);
f3186dd8
LW		 3182
3183 if (cs[i]) {
3184 /*
3185 * If we find a CS GPIO, name it after the device and
3186 * chip select line.
3187 */
3188 char *gpioname;
3189
3190 gpioname = devm_kasprintf(dev, GFP_KERNEL, "%s CS%d",
3191 dev_name(dev), i);
3192 if (!gpioname)
3193 return -ENOMEM;
3194 gpiod_set_consumer_name(cs[i], gpioname);
7d93aecd
GU		 3195 num_cs_gpios++;
3196 continue;
f3186dd8 3197 }
7d93aecd
GU		 3198
3199 if (ctlr->max_native_cs && i >= ctlr->max_native_cs) {
3200 dev_err(dev, "Invalid native chip select %d\n", i);
3201 return -EINVAL;
f3186dd8 3202 }
7d93aecd
GU		 3203 native_cs_mask |= BIT(i);
3204 }
3205
f60d7270 3206 ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
dbaca8e5 3207
82238d2c 3208 if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
dbaca8e5 3209 ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
7d93aecd
GU		 3210 dev_err(dev, "No unused native chip select available\n");
3211 return -EINVAL;
f3186dd8
LW		 3212 }
3213
3214 return 0;
3215}
3216
bdf3a3b5
BB		 3217static int spi_controller_check_ops(struct spi_controller *ctlr)
3218{
3219 /*
b5932f5c
BB		 3220 * The controller may implement only the high-level SPI-memory like
3221 * operations if it does not support regular SPI transfers, and this is
3222 * valid use case.
76a85704
WZ		 3223 * If ->mem_ops or ->mem_ops->exec_op is NULL, we request that at least
3224 * one of the ->transfer_xxx() method be implemented.
bdf3a3b5 3225 */
20064c47 3226 if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
76a85704 3227 if (!ctlr->transfer && !ctlr->transfer_one &&
b5932f5c 3228 !ctlr->transfer_one_message) {
76a85704
WZ		 3229 return -EINVAL;
3230 }
b5932f5c 3231 }
bdf3a3b5
BB		 3232
3233 return 0;
3234}
3235
440c4733
AS		 3236/* Allocate dynamic bus number using Linux idr */
3237static int spi_controller_id_alloc(struct spi_controller *ctlr, int start, int end)
3238{
3239 int id;
3240
3241 mutex_lock(&board_lock);
3242 id = idr_alloc(&spi_master_idr, ctlr, start, end, GFP_KERNEL);
3243 mutex_unlock(&board_lock);
3244 if (WARN(id < 0, "couldn't get idr"))
3245 return id == -ENOSPC ? -EBUSY : id;
3246 ctlr->bus_num = id;
3247 return 0;
3248}
3249
8ae12a0d 3250/**
8caab75f
GU		 3251 * spi_register_controller - register SPI master or slave controller
3252 * @ctlr: initialized master, originally from spi_alloc_master() or
3253 * spi_alloc_slave()
33e34dc6 3254 * Context: can sleep
8ae12a0d 3255 *
8caab75f 3256 * SPI controllers connect to their drivers using some non-SPI bus,
8ae12a0d 3257 * such as the platform bus. The final stage of probe() in that code
8caab75f 3258 * includes calling spi_register_controller() to hook up to this SPI bus glue.
8ae12a0d
DB		 3259 *
3260 * SPI controllers use board specific (often SOC specific) bus numbers,
3261 * and board-specific addressing for SPI devices combines those numbers
3262 * with chip select numbers. Since SPI does not directly support dynamic
3263 * device identification, boards need configuration tables telling which
3264 * chip is at which address.
3265 *
3266 * This must be called from context that can sleep. It returns zero on
8caab75f 3267 * success, else a negative error code (dropping the controller's refcount).
0c868461 3268 * After a successful return, the caller is responsible for calling
8caab75f 3269 * spi_unregister_controller().
97d56dc6
JMC		 3270 *
3271 * Return: zero on success, else a negative error code.
8ae12a0d 3272 */
8caab75f 3273int spi_register_controller(struct spi_controller *ctlr)
8ae12a0d 3274{
8caab75f 3275 struct device *dev = ctlr->dev.parent;
2b9603a0 3276 struct boardinfo *bi;
440c4733 3277 int first_dynamic;
b93318a2 3278 int status;
4d8ff6b0 3279 int idx;
8ae12a0d 3280
0c868461
DB		 3281 if (!dev)
3282 return -ENODEV;
3283
bdf3a3b5
BB		 3284 /*
3285 * Make sure all necessary hooks are implemented before registering
3286 * the SPI controller.
3287 */
3288 status = spi_controller_check_ops(ctlr);
3289 if (status)
3290 return status;
3291
440c4733
AS		 3292 if (ctlr->bus_num < 0)
3293 ctlr->bus_num = of_alias_get_id(ctlr->dev.of_node, "spi");
04b2d03a 3294 if (ctlr->bus_num >= 0) {
95c8222f 3295 /* Devices with a fixed bus num must check-in with the num */
440c4733
AS		 3296 status = spi_controller_id_alloc(ctlr, ctlr->bus_num, ctlr->bus_num + 1);
3297 if (status)
3298 return status;
9b61e302 3299 }
8caab75f 3300 if (ctlr->bus_num < 0) {
42bdd706
LS		 3301 first_dynamic = of_alias_get_highest_id("spi");
3302 if (first_dynamic < 0)
3303 first_dynamic = 0;
3304 else
3305 first_dynamic++;
3306
440c4733
AS		 3307 status = spi_controller_id_alloc(ctlr, first_dynamic, 0);
3308 if (status)
3309 return status;
8ae12a0d 3310 }
8caab75f
GU		 3311 ctlr->bus_lock_flag = 0;
3312 init_completion(&ctlr->xfer_completion);
69fa9590 3313 init_completion(&ctlr->cur_msg_completion);
8caab75f
GU		 3314 if (!ctlr->max_dma_len)
3315 ctlr->max_dma_len = INT_MAX;
cf32b71e 3316
350de7ce
AS		 3317 /*
3318 * Register the device, then userspace will see it.
3319 * Registration fails if the bus ID is in use.
8ae12a0d 3320 */
8caab75f 3321 dev_set_name(&ctlr->dev, "spi%u", ctlr->bus_num);
0a919ae4 3322
f48dc6b9
LW		 3323 if (!spi_controller_is_slave(ctlr) && ctlr->use_gpio_descriptors) {
3324 status = spi_get_gpio_descs(ctlr);
3325 if (status)
3326 goto free_bus_id;
3327 /*
3328 * A controller using GPIO descriptors always
3329 * supports SPI_CS_HIGH if need be.
3330 */
3331 ctlr->mode_bits |= SPI_CS_HIGH;
0a919ae4
AS		 3332 }
3333
f9481b08
TA		 3334 /*
3335 * Even if it's just one always-selected device, there must
3336 * be at least one chipselect.
3337 */
f9981d4f
AK		 3338 if (!ctlr->num_chipselect) {
3339 status = -EINVAL;
3340 goto free_bus_id;
3341 }
f9481b08 3342
95c8222f 3343 /* Setting last_cs to -1 means no chip selected */
4d8ff6b0
AKM		 3344 for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
3345 ctlr->last_cs[idx] = -1;
6bb477df 3346
8caab75f 3347 status = device_add(&ctlr->dev);
f9981d4f
AK		 3348 if (status < 0)
3349 goto free_bus_id;
9b61e302 3350 dev_dbg(dev, "registered %s %s\n",
8caab75f 3351 spi_controller_is_slave(ctlr) ? "slave" : "master",
9b61e302 3352 dev_name(&ctlr->dev));
8ae12a0d 3353
b5932f5c
BB		 3354 /*
3355 * If we're using a queued driver, start the queue. Note that we don't
3356 * need the queueing logic if the driver is only supporting high-level
3357 * memory operations.
3358 */
3359 if (ctlr->transfer) {
8caab75f 3360 dev_info(dev, "controller is unqueued, this is deprecated\n");
b5932f5c 3361 } else if (ctlr->transfer_one || ctlr->transfer_one_message) {
8caab75f 3362 status = spi_controller_initialize_queue(ctlr);
ffbbdd21 3363 if (status) {
8caab75f 3364 device_del(&ctlr->dev);
f9981d4f 3365 goto free_bus_id;
ffbbdd21
LW		 3366 }
3367 }
95c8222f 3368 /* Add statistics */
6598b91b
DJ		 3369 ctlr->pcpu_statistics = spi_alloc_pcpu_stats(dev);
3370 if (!ctlr->pcpu_statistics) {
3371 dev_err(dev, "Error allocating per-cpu statistics\n");
d52b095b 3372 status = -ENOMEM;
6598b91b
DJ		 3373 goto destroy_queue;
3374 }
ffbbdd21 3375
2b9603a0 3376 mutex_lock(&board_lock);
8caab75f 3377 list_add_tail(&ctlr->list, &spi_controller_list);
2b9603a0 3378 list_for_each_entry(bi, &board_list, list)
8caab75f 3379 spi_match_controller_to_boardinfo(ctlr, &bi->board_info);
2b9603a0
FT		 3380 mutex_unlock(&board_lock);
3381
64bee4d2 3382 /* Register devices from the device tree and ACPI */
8caab75f
GU		 3383 of_register_spi_devices(ctlr);
3384 acpi_register_spi_devices(ctlr);
f9981d4f
AK		 3385 return status;
3386
6598b91b
DJ		 3387destroy_queue:
3388 spi_destroy_queue(ctlr);
f9981d4f
AK		 3389free_bus_id:
3390 mutex_lock(&board_lock);
3391 idr_remove(&spi_master_idr, ctlr->bus_num);
3392 mutex_unlock(&board_lock);
8ae12a0d
DB		 3393 return status;
3394}
8caab75f 3395EXPORT_SYMBOL_GPL(spi_register_controller);
8ae12a0d 3396
43cc5a0a 3397static void devm_spi_unregister(struct device *dev, void *res)
666d5b4c 3398{
43cc5a0a 3399 spi_unregister_controller(*(struct spi_controller **)res);
666d5b4c
MB		 3400}
3401
3402/**
8caab75f
GU		 3403 * devm_spi_register_controller - register managed SPI master or slave
3404 * controller
3405 * @dev: device managing SPI controller
3406 * @ctlr: initialized controller, originally from spi_alloc_master() or
3407 * spi_alloc_slave()
666d5b4c
MB		 3408 * Context: can sleep
3409 *
8caab75f 3410 * Register a SPI device as with spi_register_controller() which will
68b892f1 3411 * automatically be unregistered and freed.
97d56dc6
JMC		 3412 *
3413 * Return: zero on success, else a negative error code.
666d5b4c 3414 */
8caab75f
GU		 3415int devm_spi_register_controller(struct device *dev,
3416 struct spi_controller *ctlr)
666d5b4c 3417{
43cc5a0a 3418 struct spi_controller **ptr;
666d5b4c
MB		 3419 int ret;
3420
43cc5a0a
YY		 3421 ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL);
3422 if (!ptr)
3423 return -ENOMEM;
3424
8caab75f 3425 ret = spi_register_controller(ctlr);
43cc5a0a
YY		 3426 if (!ret) {
3427 *ptr = ctlr;
3428 devres_add(dev, ptr);
3429 } else {
3430 devres_free(ptr);
3431 }
666d5b4c 3432
43cc5a0a 3433 return ret;
666d5b4c 3434}
8caab75f 3435EXPORT_SYMBOL_GPL(devm_spi_register_controller);
666d5b4c 3436
34860089 3437static int __unregister(struct device *dev, void *null)
8ae12a0d 3438{
34860089 3439 spi_unregister_device(to_spi_device(dev));
8ae12a0d
DB		 3440 return 0;
3441}
3442
3443/**
8caab75f
GU		 3444 * spi_unregister_controller - unregister SPI master or slave controller
3445 * @ctlr: the controller being unregistered
33e34dc6 3446 * Context: can sleep
8ae12a0d 3447 *
8caab75f 3448 * This call is used only by SPI controller drivers, which are the
8ae12a0d
DB		 3449 * only ones directly touching chip registers.
3450 *
3451 * This must be called from context that can sleep.
68b892f1
JH		 3452 *
3453 * Note that this function also drops a reference to the controller.
8ae12a0d 3454 */
8caab75f 3455void spi_unregister_controller(struct spi_controller *ctlr)
8ae12a0d 3456{
9b61e302 3457 struct spi_controller *found;
67f7b278 3458 int id = ctlr->bus_num;
89fc9a1a 3459
ddf75be4
LW		 3460 /* Prevent addition of new devices, unregister existing ones */
3461 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3462 mutex_lock(&ctlr->add_lock);
ddf75be4 3463
84855678
LW		 3464 device_for_each_child(&ctlr->dev, NULL, __unregister);
3465
9b61e302
SM		 3466 /* First make sure that this controller was ever added */
3467 mutex_lock(&board_lock);
67f7b278 3468 found = idr_find(&spi_master_idr, id);
9b61e302 3469 mutex_unlock(&board_lock);
8caab75f
GU		 3470 if (ctlr->queued) {
3471 if (spi_destroy_queue(ctlr))
3472 dev_err(&ctlr->dev, "queue remove failed\n");
ffbbdd21 3473 }
2b9603a0 3474 mutex_lock(&board_lock);
8caab75f 3475 list_del(&ctlr->list);
2b9603a0
FT		 3476 mutex_unlock(&board_lock);
3477
5e844cc3
LW		 3478 device_del(&ctlr->dev);
3479
95c8222f 3480 /* Free bus id */
9b61e302 3481 mutex_lock(&board_lock);
613bd1ea
JN		 3482 if (found == ctlr)
3483 idr_remove(&spi_master_idr, id);
9b61e302 3484 mutex_unlock(&board_lock);
ddf75be4
LW		 3485
3486 if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
6098475d 3487 mutex_unlock(&ctlr->add_lock);
6c53b45c 3488
702ca026
AS		 3489 /*
3490 * Release the last reference on the controller if its driver
6c53b45c
MW		 3491 * has not yet been converted to devm_spi_alloc_master/slave().
3492 */
3493 if (!ctlr->devm_allocated)
3494 put_device(&ctlr->dev);
8ae12a0d 3495}
8caab75f 3496EXPORT_SYMBOL_GPL(spi_unregister_controller);
8ae12a0d 3497
bef4a48f
MH		 3498static inline int __spi_check_suspended(const struct spi_controller *ctlr)
3499{
3500 return ctlr->flags & SPI_CONTROLLER_SUSPENDED ? -ESHUTDOWN : 0;
3501}
3502
3503static inline void __spi_mark_suspended(struct spi_controller *ctlr)
3504{
3505 mutex_lock(&ctlr->bus_lock_mutex);
3506 ctlr->flags |= SPI_CONTROLLER_SUSPENDED;
3507 mutex_unlock(&ctlr->bus_lock_mutex);
3508}
3509
3510static inline void __spi_mark_resumed(struct spi_controller *ctlr)
3511{
3512 mutex_lock(&ctlr->bus_lock_mutex);
3513 ctlr->flags &= ~SPI_CONTROLLER_SUSPENDED;
3514 mutex_unlock(&ctlr->bus_lock_mutex);
3515}
3516
8caab75f 3517int spi_controller_suspend(struct spi_controller *ctlr)
ffbbdd21 3518{
bef4a48f 3519 int ret = 0;
ffbbdd21 3520
8caab75f 3521 /* Basically no-ops for non-queued controllers */
bef4a48f
MH		 3522 if (ctlr->queued) {
3523 ret = spi_stop_queue(ctlr);
3524 if (ret)
3525 dev_err(&ctlr->dev, "queue stop failed\n");
3526 }
ffbbdd21 3527
bef4a48f 3528 __spi_mark_suspended(ctlr);
ffbbdd21
LW		 3529 return ret;
3530}
8caab75f 3531EXPORT_SYMBOL_GPL(spi_controller_suspend);
ffbbdd21 3532
8caab75f 3533int spi_controller_resume(struct spi_controller *ctlr)
ffbbdd21 3534{
bef4a48f 3535 int ret = 0;
ffbbdd21 3536
bef4a48f 3537 __spi_mark_resumed(ctlr);
ffbbdd21 3538
bef4a48f
MH		 3539 if (ctlr->queued) {
3540 ret = spi_start_queue(ctlr);
3541 if (ret)
3542 dev_err(&ctlr->dev, "queue restart failed\n");
3543 }
ffbbdd21
LW		 3544 return ret;
3545}
8caab75f 3546EXPORT_SYMBOL_GPL(spi_controller_resume);
ffbbdd21 3547
8ae12a0d
DB		 3548/*-------------------------------------------------------------------------*/
3549
523baf5a
MS		 3550/* Core methods for spi_message alterations */
3551
8caab75f 3552static void __spi_replace_transfers_release(struct spi_controller *ctlr,
523baf5a
MS		 3553 struct spi_message *msg,
3554 void *res)
3555{
3556 struct spi_replaced_transfers *rxfer = res;
3557 size_t i;
3558
95c8222f 3559 /* Call extra callback if requested */
523baf5a 3560 if (rxfer->release)
8caab75f 3561 rxfer->release(ctlr, msg, res);
523baf5a 3562
95c8222f 3563 /* Insert replaced transfers back into the message */
523baf5a
MS		 3564 list_splice(&rxfer->replaced_transfers, rxfer->replaced_after);
3565
95c8222f 3566 /* Remove the formerly inserted entries */
523baf5a
MS		 3567 for (i = 0; i < rxfer->inserted; i++)
3568 list_del(&rxfer->inserted_transfers[i].transfer_list);
3569}
3570
3571/**
3572 * spi_replace_transfers - replace transfers with several transfers
3573 * and register change with spi_message.resources
3574 * @msg: the spi_message we work upon
3575 * @xfer_first: the first spi_transfer we want to replace
3576 * @remove: number of transfers to remove
3577 * @insert: the number of transfers we want to insert instead
3578 * @release: extra release code necessary in some circumstances
3579 * @extradatasize: extra data to allocate (with alignment guarantees
3580 * of struct @spi_transfer)
05885397 3581 * @gfp: gfp flags
523baf5a
MS		 3582 *
3583 * Returns: pointer to @spi_replaced_transfers,
3584 * PTR_ERR(...) in case of errors.
3585 */
da21fde0 3586static struct spi_replaced_transfers *spi_replace_transfers(
523baf5a
MS		 3587 struct spi_message *msg,
3588 struct spi_transfer *xfer_first,
3589 size_t remove,
3590 size_t insert,
3591 spi_replaced_release_t release,
3592 size_t extradatasize,
3593 gfp_t gfp)
3594{
3595 struct spi_replaced_transfers *rxfer;
3596 struct spi_transfer *xfer;
3597 size_t i;
3598
95c8222f 3599 /* Allocate the structure using spi_res */
523baf5a 3600 rxfer = spi_res_alloc(msg->spi, __spi_replace_transfers_release,
aef97522 3601 struct_size(rxfer, inserted_transfers, insert)
523baf5a
MS		 3602 + extradatasize,
3603 gfp);
3604 if (!rxfer)
3605 return ERR_PTR(-ENOMEM);
3606
95c8222f 3607 /* The release code to invoke before running the generic release */
523baf5a
MS		 3608 rxfer->release = release;
3609
95c8222f 3610 /* Assign extradata */
523baf5a
MS		 3611 if (extradatasize)
3612 rxfer->extradata =
3613 &rxfer->inserted_transfers[insert];
3614
95c8222f 3615 /* Init the replaced_transfers list */
523baf5a
MS		 3616 INIT_LIST_HEAD(&rxfer->replaced_transfers);
3617
350de7ce
AS		 3618 /*
3619 * Assign the list_entry after which we should reinsert
523baf5a
MS		 3620 * the @replaced_transfers - it may be spi_message.messages!
3621 */
3622 rxfer->replaced_after = xfer_first->transfer_list.prev;
3623
95c8222f 3624 /* Remove the requested number of transfers */
523baf5a 3625 for (i = 0; i < remove; i++) {
350de7ce
AS		 3626 /*
3627 * If the entry after replaced_after it is msg->transfers
523baf5a 3628 * then we have been requested to remove more transfers
350de7ce 3629 * than are in the list.
523baf5a
MS		 3630 */
3631 if (rxfer->replaced_after->next == &msg->transfers) {
3632 dev_err(&msg->spi->dev,
3633 "requested to remove more spi_transfers than are available\n");
95c8222f 3634 /* Insert replaced transfers back into the message */
523baf5a
MS		 3635 list_splice(&rxfer->replaced_transfers,
3636 rxfer->replaced_after);
3637
95c8222f 3638 /* Free the spi_replace_transfer structure... */
523baf5a
MS		 3639 spi_res_free(rxfer);
3640
95c8222f 3641 /* ...and return with an error */
523baf5a
MS		 3642 return ERR_PTR(-EINVAL);
3643 }
3644
350de7ce
AS		 3645 /*
3646 * Remove the entry after replaced_after from list of
3647 * transfers and add it to list of replaced_transfers.
523baf5a
MS		 3648 */
3649 list_move_tail(rxfer->replaced_after->next,
3650 &rxfer->replaced_transfers);
3651 }
3652
350de7ce
AS		 3653 /*
3654 * Create copy of the given xfer with identical settings
3655 * based on the first transfer to get removed.
523baf5a
MS		 3656 */
3657 for (i = 0; i < insert; i++) {
95c8222f 3658 /* We need to run in reverse order */
523baf5a
MS		 3659 xfer = &rxfer->inserted_transfers[insert - 1 - i];
3660
95c8222f 3661 /* Copy all spi_transfer data */
523baf5a
MS		 3662 memcpy(xfer, xfer_first, sizeof(*xfer));
3663
95c8222f 3664 /* Add to list */
523baf5a
MS		 3665 list_add(&xfer->transfer_list, rxfer->replaced_after);
3666
95c8222f 3667 /* Clear cs_change and delay for all but the last */
523baf5a
MS		 3668 if (i) {
3669 xfer->cs_change = false;
bebcfd27 3670 xfer->delay.value = 0;
523baf5a
MS		 3671 }
3672 }
3673
95c8222f 3674 /* Set up inserted... */
523baf5a
MS		 3675 rxfer->inserted = insert;
3676
95c8222f 3677 /* ...and register it with spi_res/spi_message */
523baf5a
MS		 3678 spi_res_add(msg, rxfer);
3679
3680 return rxfer;
3681}
523baf5a 3682
8caab75f 3683static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
08933418
FE		 3684 struct spi_message *msg,
3685 struct spi_transfer **xferp,
3686 size_t maxsize,
3687 gfp_t gfp)
d9f12122
MS		 3688{
3689 struct spi_transfer *xfer = *xferp, *xfers;
3690 struct spi_replaced_transfers *srt;
3691 size_t offset;
3692 size_t count, i;
3693
95c8222f 3694 /* Calculate how many we have to replace */
d9f12122
MS		 3695 count = DIV_ROUND_UP(xfer->len, maxsize);
3696
95c8222f 3697 /* Create replacement */
d9f12122 3698 srt = spi_replace_transfers(msg, xfer, 1, count, NULL, 0, gfp);
657d32ef
DC		 3699 if (IS_ERR(srt))
3700 return PTR_ERR(srt);
d9f12122
MS		 3701 xfers = srt->inserted_transfers;
3702
350de7ce
AS		 3703 /*
3704 * Now handle each of those newly inserted spi_transfers.
3705 * Note that the replacements spi_transfers all are preset
d9f12122
MS		 3706 * to the same values as *xferp, so tx_buf, rx_buf and len
3707 * are all identical (as well as most others)
3708 * so we just have to fix up len and the pointers.
3709 *
350de7ce
AS		 3710 * This also includes support for the depreciated
3711 * spi_message.is_dma_mapped interface.
d9f12122
MS		 3712 */
3713
350de7ce
AS		 3714 /*
3715 * The first transfer just needs the length modified, so we
3716 * run it outside the loop.
d9f12122 3717 */
c8dab77a 3718 xfers[0].len = min_t(size_t, maxsize, xfer[0].len);
d9f12122 3719
95c8222f 3720 /* All the others need rx_buf/tx_buf also set */
d9f12122 3721 for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
702ca026 3722 /* Update rx_buf, tx_buf and DMA */
d9f12122
MS		 3723 if (xfers[i].rx_buf)
3724 xfers[i].rx_buf += offset;
3725 if (xfers[i].rx_dma)
3726 xfers[i].rx_dma += offset;
3727 if (xfers[i].tx_buf)
3728 xfers[i].tx_buf += offset;
3729 if (xfers[i].tx_dma)
3730 xfers[i].tx_dma += offset;
3731
95c8222f 3732 /* Update length */
d9f12122
MS		 3733 xfers[i].len = min(maxsize, xfers[i].len - offset);
3734 }
3735
350de7ce
AS		 3736 /*
3737 * We set up xferp to the last entry we have inserted,
3738 * so that we skip those already split transfers.
d9f12122
MS		 3739 */
3740 *xferp = &xfers[count - 1];
3741
95c8222f 3742 /* Increment statistics counters */
6598b91b 3743 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics,
d9f12122 3744 transfers_split_maxsize);
6598b91b 3745 SPI_STATISTICS_INCREMENT_FIELD(msg->spi->pcpu_statistics,
d9f12122
MS		 3746 transfers_split_maxsize);
3747
3748 return 0;
3749}
3750
3751/**
ce2424d7
MCC		 3752 * spi_split_transfers_maxsize - split spi transfers into multiple transfers
3753 * when an individual transfer exceeds a
3754 * certain size
8caab75f 3755 * @ctlr: the @spi_controller for this transfer
3700ce95
MI		 3756 * @msg: the @spi_message to transform
3757 * @maxsize: the maximum when to apply this
10f11a22 3758 * @gfp: GFP allocation flags
d9f12122
MS		 3759 *
3760 * Return: status of transformation
3761 */
8caab75f 3762int spi_split_transfers_maxsize(struct spi_controller *ctlr,
d9f12122
MS		 3763 struct spi_message *msg,
3764 size_t maxsize,
3765 gfp_t gfp)
3766{
3767 struct spi_transfer *xfer;
3768 int ret;
3769
350de7ce
AS		 3770 /*
3771 * Iterate over the transfer_list,
d9f12122
MS		 3772 * but note that xfer is advanced to the last transfer inserted
3773 * to avoid checking sizes again unnecessarily (also xfer does
350de7ce
AS		 3774 * potentially belong to a different list by the time the
3775 * replacement has happened).
d9f12122
MS		 3776 */
3777 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3778 if (xfer->len > maxsize) {
8caab75f
GU		 3779 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3780 maxsize, gfp);
d9f12122
MS		 3781 if (ret)
3782 return ret;
3783 }
3784 }
3785
3786 return 0;
3787}
3788EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
8ae12a0d 3789
027781f3
LG		 3790
3791/**
702ca026 3792 * spi_split_transfers_maxwords - split SPI transfers into multiple transfers
027781f3
LG		 3793 * when an individual transfer exceeds a
3794 * certain number of SPI words
3795 * @ctlr: the @spi_controller for this transfer
3796 * @msg: the @spi_message to transform
3797 * @maxwords: the number of words to limit each transfer to
3798 * @gfp: GFP allocation flags
3799 *
3800 * Return: status of transformation
3801 */
3802int spi_split_transfers_maxwords(struct spi_controller *ctlr,
3803 struct spi_message *msg,
3804 size_t maxwords,
3805 gfp_t gfp)
3806{
3807 struct spi_transfer *xfer;
3808
3809 /*
3810 * Iterate over the transfer_list,
3811 * but note that xfer is advanced to the last transfer inserted
3812 * to avoid checking sizes again unnecessarily (also xfer does
3813 * potentially belong to a different list by the time the
3814 * replacement has happened).
3815 */
3816 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
3817 size_t maxsize;
3818 int ret;
3819
2b308e71 3820 maxsize = maxwords * roundup_pow_of_two(BITS_TO_BYTES(xfer->bits_per_word));
027781f3
LG		 3821 if (xfer->len > maxsize) {
3822 ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
3823 maxsize, gfp);
3824 if (ret)
3825 return ret;
3826 }
3827 }
3828
3829 return 0;
3830}
3831EXPORT_SYMBOL_GPL(spi_split_transfers_maxwords);
3832
8ae12a0d
DB		 3833/*-------------------------------------------------------------------------*/
3834
702ca026
AS		 3835/*
3836 * Core methods for SPI controller protocol drivers. Some of the
7d077197
DB		 3837 * other core methods are currently defined as inline functions.
3838 */
3839
8caab75f
GU		 3840static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
3841 u8 bits_per_word)
63ab645f 3842{
8caab75f 3843 if (ctlr->bits_per_word_mask) {
63ab645f
SB		 3844 /* Only 32 bits fit in the mask */
3845 if (bits_per_word > 32)
3846 return -EINVAL;
8caab75f 3847 if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
63ab645f
SB		 3848 return -EINVAL;
3849 }
3850
3851 return 0;
3852}
3853
684a4784
TA		 3854/**
3855 * spi_set_cs_timing - configure CS setup, hold, and inactive delays
3856 * @spi: the device that requires specific CS timing configuration
3857 *
3858 * Return: zero on success, else a negative error code.
3859 */
3860static int spi_set_cs_timing(struct spi_device *spi)
3861{
3862 struct device *parent = spi->controller->dev.parent;
3863 int status = 0;
3864
303feb3c 3865 if (spi->controller->set_cs_timing && !spi_get_csgpiod(spi, 0)) {
684a4784
TA		 3866 if (spi->controller->auto_runtime_pm) {
3867 status = pm_runtime_get_sync(parent);
3868 if (status < 0) {
3869 pm_runtime_put_noidle(parent);
3870 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3871 status);
3872 return status;
3873 }
3874
3875 status = spi->controller->set_cs_timing(spi);
3876 pm_runtime_mark_last_busy(parent);
3877 pm_runtime_put_autosuspend(parent);
3878 } else {
3879 status = spi->controller->set_cs_timing(spi);
3880 }
3881 }
3882 return status;
3883}
3884
7d077197
DB		 3885/**
3886 * spi_setup - setup SPI mode and clock rate
3887 * @spi: the device whose settings are being modified
3888 * Context: can sleep, and no requests are queued to the device
3889 *
3890 * SPI protocol drivers may need to update the transfer mode if the
3891 * device doesn't work with its default. They may likewise need
3892 * to update clock rates or word sizes from initial values. This function
3893 * changes those settings, and must be called from a context that can sleep.
3894 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
3895 * effect the next time the device is selected and data is transferred to
702ca026 3896 * or from it. When this function returns, the SPI device is deselected.
7d077197
DB		 3897 *
3898 * Note that this call will fail if the protocol driver specifies an option
3899 * that the underlying controller or its driver does not support. For
3900 * example, not all hardware supports wire transfers using nine bit words,
3901 * LSB-first wire encoding, or active-high chipselects.
97d56dc6
JMC		 3902 *
3903 * Return: zero on success, else a negative error code.
7d077197
DB		 3904 */
3905int spi_setup(struct spi_device *spi)
3906{
83596fbe 3907 unsigned bad_bits, ugly_bits;
73f93db5 3908 int status = 0;
7d077197 3909
d962608c 3910 /*
350de7ce
AS		 3911 * Check mode to prevent that any two of DUAL, QUAD and NO_MOSI/MISO
3912 * are set at the same time.
f477b7fb 3913 */
d962608c
DB		 3914 if ((hweight_long(spi->mode &
3915 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_NO_TX)) > 1) ||
3916 (hweight_long(spi->mode &
3917 (SPI_RX_DUAL | SPI_RX_QUAD | SPI_NO_RX)) > 1)) {
f477b7fb 3918 dev_err(&spi->dev,
d962608c 3919 "setup: can not select any two of dual, quad and no-rx/tx at the same time\n");
f477b7fb 3920 return -EINVAL;
3921 }
350de7ce 3922 /* If it is SPI_3WIRE mode, DUAL and QUAD should be forbidden */
f477b7fb 3923 if ((spi->mode & SPI_3WIRE) && (spi->mode &
6b03061f
YNG		 3924 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3925 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))
f477b7fb 3926 return -EINVAL;
350de7ce
AS		 3927 /*
3928 * Help drivers fail *cleanly* when they need options
3929 * that aren't supported with their current controller.
cbaa62e0
DL		 3930 * SPI_CS_WORD has a fallback software implementation,
3931 * so it is ignored here.
e7db06b5 3932 */
d962608c
DB		 3933 bad_bits = spi->mode & ~(spi->controller->mode_bits | SPI_CS_WORD |
3934 SPI_NO_TX | SPI_NO_RX);
83596fbe 3935 ugly_bits = bad_bits &
6b03061f
YNG		 3936 (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL |
3937 SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL);
83596fbe
GU		 3938 if (ugly_bits) {
3939 dev_warn(&spi->dev,
3940 "setup: ignoring unsupported mode bits %x\n",
3941 ugly_bits);
3942 spi->mode &= ~ugly_bits;
3943 bad_bits &= ~ugly_bits;
3944 }
e7db06b5 3945 if (bad_bits) {
eb288a1f 3946 dev_err(&spi->dev, "setup: unsupported mode bits %x\n",
e7db06b5
DB		 3947 bad_bits);
3948 return -EINVAL;
3949 }
3950
b3fe2e51 3951 if (!spi->bits_per_word) {
7d077197 3952 spi->bits_per_word = 8;
b3fe2e51
PK		 3953 } else {
3954 /*
3955 * Some controllers may not support the default 8 bits-per-word
3956 * so only perform the check when this is explicitly provided.
3957 */
3958 status = __spi_validate_bits_per_word(spi->controller,
3959 spi->bits_per_word);
3960 if (status)
3961 return status;
3962 }
63ab645f 3963
6820e812
TA		 3964 if (spi->controller->max_speed_hz &&
3965 (!spi->max_speed_hz ||
3966 spi->max_speed_hz > spi->controller->max_speed_hz))
8caab75f 3967 spi->max_speed_hz = spi->controller->max_speed_hz;
052eb2d4 3968
4fae3a58
SS		 3969 mutex_lock(&spi->controller->io_mutex);
3970
c914dbf8 3971 if (spi->controller->setup) {
8caab75f 3972 status = spi->controller->setup(spi);
c914dbf8
JB		 3973 if (status) {
3974 mutex_unlock(&spi->controller->io_mutex);
3975 dev_err(&spi->controller->dev, "Failed to setup device: %d\n",
3976 status);
3977 return status;
3978 }
3979 }
7d077197 3980
684a4784
TA		 3981 status = spi_set_cs_timing(spi);
3982 if (status) {
3983 mutex_unlock(&spi->controller->io_mutex);
3984 return status;
3985 }
3986
d948e6ca 3987 if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
dd769f15 3988 status = pm_runtime_resume_and_get(spi->controller->dev.parent);
d948e6ca 3989 if (status < 0) {
4fae3a58 3990 mutex_unlock(&spi->controller->io_mutex);
d948e6ca
LX		 3991 dev_err(&spi->controller->dev, "Failed to power device: %d\n",
3992 status);
3993 return status;
3994 }
57a94607
TL		 3995
3996 /*
3997 * We do not want to return positive value from pm_runtime_get,
3998 * there are many instances of devices calling spi_setup() and
3999 * checking for a non-zero return value instead of a negative
4000 * return value.
4001 */
4002 status = 0;
4003
d347b4aa 4004 spi_set_cs(spi, false, true);
d948e6ca
LX		 4005 pm_runtime_mark_last_busy(spi->controller->dev.parent);
4006 pm_runtime_put_autosuspend(spi->controller->dev.parent);
4007 } else {
d347b4aa 4008 spi_set_cs(spi, false, true);
d948e6ca 4009 }
abeedb01 4010
4fae3a58
SS		 4011 mutex_unlock(&spi->controller->io_mutex);
4012
924b5867
DA		 4013 if (spi->rt && !spi->controller->rt) {
4014 spi->controller->rt = true;
4015 spi_set_thread_rt(spi->controller);
4016 }
4017
5cb4e1f3
AS		 4018 trace_spi_setup(spi, status);
4019
40b82c2d
AS		 4020 dev_dbg(&spi->dev, "setup mode %lu, %s%s%s%s%u bits/w, %u Hz max --> %d\n",
4021 spi->mode & SPI_MODE_X_MASK,
7d077197
DB		 4022 (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "",
4023 (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "",
4024 (spi->mode & SPI_3WIRE) ? "3wire, " : "",
4025 (spi->mode & SPI_LOOP) ? "loopback, " : "",
4026 spi->bits_per_word, spi->max_speed_hz,
4027 status);
4028
4029 return status;
4030}
4031EXPORT_SYMBOL_GPL(spi_setup);
4032
6c613f68
AA		 4033static int _spi_xfer_word_delay_update(struct spi_transfer *xfer,
4034 struct spi_device *spi)
4035{
4036 int delay1, delay2;
4037
3984d39b 4038 delay1 = spi_delay_to_ns(&xfer->word_delay, xfer);
6c613f68
AA		 4039 if (delay1 < 0)
4040 return delay1;
4041
3984d39b 4042 delay2 = spi_delay_to_ns(&spi->word_delay, xfer);
6c613f68
AA		 4043 if (delay2 < 0)
4044 return delay2;
4045
4046 if (delay1 < delay2)
4047 memcpy(&xfer->word_delay, &spi->word_delay,
4048 sizeof(xfer->word_delay));
4049
4050 return 0;
4051}
4052
90808738 4053static int __spi_validate(struct spi_device *spi, struct spi_message *message)
cf32b71e 4054{
8caab75f 4055 struct spi_controller *ctlr = spi->controller;
e6811d1d 4056 struct spi_transfer *xfer;
6ea31293 4057 int w_size;
cf32b71e 4058
24a0013a
MB		 4059 if (list_empty(&message->transfers))
4060 return -EINVAL;
24a0013a 4061
350de7ce
AS		 4062 /*
4063 * If an SPI controller does not support toggling the CS line on each
71388b21
DL		 4064 * transfer (indicated by the SPI_CS_WORD flag) or we are using a GPIO
4065 * for the CS line, we can emulate the CS-per-word hardware function by
cbaa62e0
DL		 4066 * splitting transfers into one-word transfers and ensuring that
4067 * cs_change is set for each transfer.
4068 */
71388b21 4069 if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
4d8ff6b0 4070 spi_is_csgpiod(spi))) {
169f5312 4071 size_t maxsize = BITS_TO_BYTES(spi->bits_per_word);
cbaa62e0
DL		 4072 int ret;
4073
cbaa62e0
DL		 4074 /* spi_split_transfers_maxsize() requires message->spi */
4075 message->spi = spi;
4076
4077 ret = spi_split_transfers_maxsize(ctlr, message, maxsize,
4078 GFP_KERNEL);
4079 if (ret)
4080 return ret;
4081
4082 list_for_each_entry(xfer, &message->transfers, transfer_list) {
95c8222f 4083 /* Don't change cs_change on the last entry in the list */
cbaa62e0
DL		 4084 if (list_is_last(&xfer->transfer_list, &message->transfers))
4085 break;
4086 xfer->cs_change = 1;
4087 }
4088 }
4089
350de7ce
AS		 4090 /*
4091 * Half-duplex links include original MicroWire, and ones with
cf32b71e
ES		 4092 * only one data pin like SPI_3WIRE (switches direction) or where
4093 * either MOSI or MISO is missing. They can also be caused by
4094 * software limitations.
4095 */
8caab75f
GU		 4096 if ((ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) ||
4097 (spi->mode & SPI_3WIRE)) {
4098 unsigned flags = ctlr->flags;
cf32b71e
ES		 4099
4100 list_for_each_entry(xfer, &message->transfers, transfer_list) {
4101 if (xfer->rx_buf && xfer->tx_buf)
4102 return -EINVAL;
8caab75f 4103 if ((flags & SPI_CONTROLLER_NO_TX) && xfer->tx_buf)
cf32b71e 4104 return -EINVAL;
8caab75f 4105 if ((flags & SPI_CONTROLLER_NO_RX) && xfer->rx_buf)
cf32b71e
ES		 4106 return -EINVAL;
4107 }
4108 }
4109
350de7ce 4110 /*
059b8ffe
LD		 4111 * Set transfer bits_per_word and max speed as spi device default if
4112 * it is not set for this transfer.
f477b7fb 4113 * Set transfer tx_nbits and rx_nbits as single transfer default
4114 * (SPI_NBITS_SINGLE) if it is not set for this transfer.
b7bb367a
JB		 4115 * Ensure transfer word_delay is at least as long as that required by
4116 * device itself.
e6811d1d 4117 */
77e80588 4118 message->frame_length = 0;
e6811d1d 4119 list_for_each_entry(xfer, &message->transfers, transfer_list) {
5d7e2b5e 4120 xfer->effective_speed_hz = 0;
078726ce 4121 message->frame_length += xfer->len;
e6811d1d
LD		 4122 if (!xfer->bits_per_word)
4123 xfer->bits_per_word = spi->bits_per_word;
a6f87fad
AL		 4124
4125 if (!xfer->speed_hz)
059b8ffe 4126 xfer->speed_hz = spi->max_speed_hz;
a6f87fad 4127
8caab75f
GU		 4128 if (ctlr->max_speed_hz && xfer->speed_hz > ctlr->max_speed_hz)
4129 xfer->speed_hz = ctlr->max_speed_hz;
56ede94a 4130
8caab75f 4131 if (__spi_validate_bits_per_word(ctlr, xfer->bits_per_word))
63ab645f 4132 return -EINVAL;
a2fd4f9f 4133
4d94bd21
II		 4134 /*
4135 * SPI transfer length should be multiple of SPI word size
350de7ce 4136 * where SPI word size should be power-of-two multiple.
4d94bd21
II		 4137 */
4138 if (xfer->bits_per_word <= 8)
4139 w_size = 1;
4140 else if (xfer->bits_per_word <= 16)
4141 w_size = 2;
4142 else
4143 w_size = 4;
4144
4d94bd21 4145 /* No partial transfers accepted */
6ea31293 4146 if (xfer->len % w_size)
4d94bd21
II		 4147 return -EINVAL;
4148
8caab75f
GU		 4149 if (xfer->speed_hz && ctlr->min_speed_hz &&
4150 xfer->speed_hz < ctlr->min_speed_hz)
a2fd4f9f 4151 return -EINVAL;
f477b7fb 4152
4153 if (xfer->tx_buf && !xfer->tx_nbits)
4154 xfer->tx_nbits = SPI_NBITS_SINGLE;
4155 if (xfer->rx_buf && !xfer->rx_nbits)
4156 xfer->rx_nbits = SPI_NBITS_SINGLE;
350de7ce
AS		 4157 /*
4158 * Check transfer tx/rx_nbits:
1afd9989
GU		 4159 * 1. check the value matches one of single, dual and quad
4160 * 2. check tx/rx_nbits match the mode in spi_device
f477b7fb 4161 */
db90a441 4162 if (xfer->tx_buf) {
d962608c
DB		 4163 if (spi->mode & SPI_NO_TX)
4164 return -EINVAL;
db90a441
SP		 4165 if (xfer->tx_nbits != SPI_NBITS_SINGLE &&
4166 xfer->tx_nbits != SPI_NBITS_DUAL &&
4167 xfer->tx_nbits != SPI_NBITS_QUAD)
4168 return -EINVAL;
4169 if ((xfer->tx_nbits == SPI_NBITS_DUAL) &&
4170 !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD)))
4171 return -EINVAL;
4172 if ((xfer->tx_nbits == SPI_NBITS_QUAD) &&
4173 !(spi->mode & SPI_TX_QUAD))
4174 return -EINVAL;
db90a441 4175 }
95c8222f 4176 /* Check transfer rx_nbits */
db90a441 4177 if (xfer->rx_buf) {
d962608c
DB		 4178 if (spi->mode & SPI_NO_RX)
4179 return -EINVAL;
db90a441
SP		 4180 if (xfer->rx_nbits != SPI_NBITS_SINGLE &&
4181 xfer->rx_nbits != SPI_NBITS_DUAL &&
4182 xfer->rx_nbits != SPI_NBITS_QUAD)
4183 return -EINVAL;
4184 if ((xfer->rx_nbits == SPI_NBITS_DUAL) &&
4185 !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD)))
4186 return -EINVAL;
4187 if ((xfer->rx_nbits == SPI_NBITS_QUAD) &&
4188 !(spi->mode & SPI_RX_QUAD))
4189 return -EINVAL;
db90a441 4190 }
b7bb367a 4191
6c613f68
AA		 4192 if (_spi_xfer_word_delay_update(xfer, spi))
4193 return -EINVAL;
e6811d1d
LD		 4194 }
4195
cf32b71e 4196 message->status = -EINPROGRESS;
90808738
MB		 4197
4198 return 0;
4199}
4200
4201static int __spi_async(struct spi_device *spi, struct spi_message *message)
4202{
8caab75f 4203 struct spi_controller *ctlr = spi->controller;
b42faeee 4204 struct spi_transfer *xfer;
90808738 4205
b5932f5c
BB		 4206 /*
4207 * Some controllers do not support doing regular SPI transfers. Return
4208 * ENOTSUPP when this is the case.
4209 */
4210 if (!ctlr->transfer)
4211 return -ENOTSUPP;
4212
90808738
MB		 4213 message->spi = spi;
4214
6598b91b
DJ		 4215 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_async);
4216 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_async);
eca2ebc7 4217
90808738
MB		 4218 trace_spi_message_submit(message);
4219
b42faeee
VO		 4220 if (!ctlr->ptp_sts_supported) {
4221 list_for_each_entry(xfer, &message->transfers, transfer_list) {
4222 xfer->ptp_sts_word_pre = 0;
4223 ptp_read_system_prets(xfer->ptp_sts);
4224 }
4225 }
4226
8caab75f 4227 return ctlr->transfer(spi, message);
cf32b71e
ES		 4228}
4229
568d0697
DB		 4230/**
4231 * spi_async - asynchronous SPI transfer
4232 * @spi: device with which data will be exchanged
4233 * @message: describes the data transfers, including completion callback
702ca026 4234 * Context: any (IRQs may be blocked, etc)
568d0697
DB		 4235 *
4236 * This call may be used in_irq and other contexts which can't sleep,
4237 * as well as from task contexts which can sleep.
4238 *
4239 * The completion callback is invoked in a context which can't sleep.
4240 * Before that invocation, the value of message->status is undefined.
4241 * When the callback is issued, message->status holds either zero (to
4242 * indicate complete success) or a negative error code. After that
4243 * callback returns, the driver which issued the transfer request may
4244 * deallocate the associated memory; it's no longer in use by any SPI
4245 * core or controller driver code.
4246 *
4247 * Note that although all messages to a spi_device are handled in
4248 * FIFO order, messages may go to different devices in other orders.
4249 * Some device might be higher priority, or have various "hard" access
4250 * time requirements, for example.
4251 *
4252 * On detection of any fault during the transfer, processing of
4253 * the entire message is aborted, and the device is deselected.
4254 * Until returning from the associated message completion callback,
4255 * no other spi_message queued to that device will be processed.
4256 * (This rule applies equally to all the synchronous transfer calls,
4257 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 4258 *
4259 * Return: zero on success, else a negative error code.
568d0697
DB		 4260 */
4261int spi_async(struct spi_device *spi, struct spi_message *message)
4262{
8caab75f 4263 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 4264 int ret;
4265 unsigned long flags;
568d0697 4266
90808738
MB		 4267 ret = __spi_validate(spi, message);
4268 if (ret != 0)
4269 return ret;
4270
8caab75f 4271 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
568d0697 4272
8caab75f 4273 if (ctlr->bus_lock_flag)
cf32b71e
ES		 4274 ret = -EBUSY;
4275 else
4276 ret = __spi_async(spi, message);
568d0697 4277
8caab75f 4278 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 4279
4280 return ret;
568d0697
DB		 4281}
4282EXPORT_SYMBOL_GPL(spi_async);
4283
cf32b71e
ES		 4284/**
4285 * spi_async_locked - version of spi_async with exclusive bus usage
4286 * @spi: device with which data will be exchanged
4287 * @message: describes the data transfers, including completion callback
702ca026 4288 * Context: any (IRQs may be blocked, etc)
cf32b71e
ES		 4289 *
4290 * This call may be used in_irq and other contexts which can't sleep,
4291 * as well as from task contexts which can sleep.
4292 *
4293 * The completion callback is invoked in a context which can't sleep.
4294 * Before that invocation, the value of message->status is undefined.
4295 * When the callback is issued, message->status holds either zero (to
4296 * indicate complete success) or a negative error code. After that
4297 * callback returns, the driver which issued the transfer request may
4298 * deallocate the associated memory; it's no longer in use by any SPI
4299 * core or controller driver code.
4300 *
4301 * Note that although all messages to a spi_device are handled in
4302 * FIFO order, messages may go to different devices in other orders.
4303 * Some device might be higher priority, or have various "hard" access
4304 * time requirements, for example.
4305 *
4306 * On detection of any fault during the transfer, processing of
4307 * the entire message is aborted, and the device is deselected.
4308 * Until returning from the associated message completion callback,
4309 * no other spi_message queued to that device will be processed.
4310 * (This rule applies equally to all the synchronous transfer calls,
4311 * which are wrappers around this core asynchronous primitive.)
97d56dc6
JMC		 4312 *
4313 * Return: zero on success, else a negative error code.
cf32b71e 4314 */
da21fde0 4315static int spi_async_locked(struct spi_device *spi, struct spi_message *message)
cf32b71e 4316{
8caab75f 4317 struct spi_controller *ctlr = spi->controller;
cf32b71e
ES		 4318 int ret;
4319 unsigned long flags;
4320
90808738
MB		 4321 ret = __spi_validate(spi, message);
4322 if (ret != 0)
4323 return ret;
4324
8caab75f 4325 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 4326
4327 ret = __spi_async(spi, message);
4328
8caab75f 4329 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e
ES		 4330
4331 return ret;
4332
4333}
cf32b71e 4334
ae7d2346
DJ		 4335static void __spi_transfer_message_noqueue(struct spi_controller *ctlr, struct spi_message *msg)
4336{
4337 bool was_busy;
4338 int ret;
4339
4340 mutex_lock(&ctlr->io_mutex);
4341
1a9cafcb 4342 was_busy = ctlr->busy;
ae7d2346 4343
72c5c59b 4344 ctlr->cur_msg = msg;
ae7d2346
DJ		 4345 ret = __spi_pump_transfer_message(ctlr, msg, was_busy);
4346 if (ret)
bef4a48f 4347 dev_err(&ctlr->dev, "noqueue transfer failed\n");
69fa9590
DJ		 4348 ctlr->cur_msg = NULL;
4349 ctlr->fallback = false;
4350
ae7d2346
DJ		 4351 if (!was_busy) {
4352 kfree(ctlr->dummy_rx);
4353 ctlr->dummy_rx = NULL;
4354 kfree(ctlr->dummy_tx);
4355 ctlr->dummy_tx = NULL;
4356 if (ctlr->unprepare_transfer_hardware &&
4357 ctlr->unprepare_transfer_hardware(ctlr))
4358 dev_err(&ctlr->dev,
4359 "failed to unprepare transfer hardware\n");
4360 spi_idle_runtime_pm(ctlr);
4361 }
4362
ae7d2346
DJ		 4363 mutex_unlock(&ctlr->io_mutex);
4364}
4365
7d077197
DB		 4366/*-------------------------------------------------------------------------*/
4367
350de7ce
AS		 4368/*
4369 * Utility methods for SPI protocol drivers, layered on
7d077197
DB		 4370 * top of the core. Some other utility methods are defined as
4371 * inline functions.
4372 */
4373
5d870c8e
AM		 4374static void spi_complete(void *arg)
4375{
4376 complete(arg);
4377}
4378
ef4d96ec 4379static int __spi_sync(struct spi_device *spi, struct spi_message *message)
cf32b71e
ES		 4380{
4381 DECLARE_COMPLETION_ONSTACK(done);
4382 int status;
8caab75f 4383 struct spi_controller *ctlr = spi->controller;
0461a414 4384
bef4a48f
MH		 4385 if (__spi_check_suspended(ctlr)) {
4386 dev_warn_once(&spi->dev, "Attempted to sync while suspend\n");
4387 return -ESHUTDOWN;
4388 }
4389
0461a414
MB		 4390 status = __spi_validate(spi, message);
4391 if (status != 0)
4392 return status;
cf32b71e 4393
0461a414 4394 message->spi = spi;
cf32b71e 4395
6598b91b
DJ		 4396 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync);
4397 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync);
eca2ebc7 4398
350de7ce 4399 /*
ae7d2346
DJ		 4400 * Checking queue_empty here only guarantees async/sync message
4401 * ordering when coming from the same context. It does not need to
4402 * guard against reentrancy from a different context. The io_mutex
4403 * will catch those cases.
0461a414 4404 */
b30f7c8e 4405 if (READ_ONCE(ctlr->queue_empty) && !ctlr->must_async) {
ae7d2346
DJ		 4406 message->actual_length = 0;
4407 message->status = -EINPROGRESS;
0461a414
MB		 4408
4409 trace_spi_message_submit(message);
4410
ae7d2346
DJ		 4411 SPI_STATISTICS_INCREMENT_FIELD(ctlr->pcpu_statistics, spi_sync_immediate);
4412 SPI_STATISTICS_INCREMENT_FIELD(spi->pcpu_statistics, spi_sync_immediate);
0461a414 4413
ae7d2346
DJ		 4414 __spi_transfer_message_noqueue(ctlr, message);
4415
4416 return message->status;
0461a414 4417 }
cf32b71e 4418
ae7d2346
DJ		 4419 /*
4420 * There are messages in the async queue that could have originated
4421 * from the same context, so we need to preserve ordering.
4422 * Therefor we send the message to the async queue and wait until they
4423 * are completed.
4424 */
4425 message->complete = spi_complete;
4426 message->context = &done;
4427 status = spi_async_locked(spi, message);
cf32b71e
ES		 4428 if (status == 0) {
4429 wait_for_completion(&done);
4430 status = message->status;
4431 }
4432 message->context = NULL;
ae7d2346 4433
cf32b71e
ES		 4434 return status;
4435}
4436
8ae12a0d
DB		 4437/**
4438 * spi_sync - blocking/synchronous SPI data transfers
4439 * @spi: device with which data will be exchanged
4440 * @message: describes the data transfers
33e34dc6 4441 * Context: can sleep
8ae12a0d
DB		 4442 *
4443 * This call may only be used from a context that may sleep. The sleep
4444 * is non-interruptible, and has no timeout. Low-overhead controller
4445 * drivers may DMA directly into and out of the message buffers.
4446 *
4447 * Note that the SPI device's chip select is active during the message,
4448 * and then is normally disabled between messages. Drivers for some
4449 * frequently-used devices may want to minimize costs of selecting a chip,
4450 * by leaving it selected in anticipation that the next message will go
4451 * to the same chip. (That may increase power usage.)
4452 *
0c868461
DB		 4453 * Also, the caller is guaranteeing that the memory associated with the
4454 * message will not be freed before this call returns.
4455 *
97d56dc6 4456 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 4457 */
4458int spi_sync(struct spi_device *spi, struct spi_message *message)
4459{
ef4d96ec
MB		 4460 int ret;
4461
8caab75f 4462 mutex_lock(&spi->controller->bus_lock_mutex);
ef4d96ec 4463 ret = __spi_sync(spi, message);
8caab75f 4464 mutex_unlock(&spi->controller->bus_lock_mutex);
ef4d96ec
MB		 4465
4466 return ret;
8ae12a0d
DB		 4467}
4468EXPORT_SYMBOL_GPL(spi_sync);
4469
cf32b71e
ES		 4470/**
4471 * spi_sync_locked - version of spi_sync with exclusive bus usage
4472 * @spi: device with which data will be exchanged
4473 * @message: describes the data transfers
4474 * Context: can sleep
4475 *
4476 * This call may only be used from a context that may sleep. The sleep
4477 * is non-interruptible, and has no timeout. Low-overhead controller
4478 * drivers may DMA directly into and out of the message buffers.
4479 *
4480 * This call should be used by drivers that require exclusive access to the
25985edc 4481 * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must
cf32b71e
ES		 4482 * be released by a spi_bus_unlock call when the exclusive access is over.
4483 *
97d56dc6 4484 * Return: zero on success, else a negative error code.
cf32b71e
ES		 4485 */
4486int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
4487{
ef4d96ec 4488 return __spi_sync(spi, message);
cf32b71e
ES		 4489}
4490EXPORT_SYMBOL_GPL(spi_sync_locked);
4491
4492/**
4493 * spi_bus_lock - obtain a lock for exclusive SPI bus usage
8caab75f 4494 * @ctlr: SPI bus master that should be locked for exclusive bus access
cf32b71e
ES		 4495 * Context: can sleep
4496 *
4497 * This call may only be used from a context that may sleep. The sleep
4498 * is non-interruptible, and has no timeout.
4499 *
4500 * This call should be used by drivers that require exclusive access to the
4501 * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
4502 * exclusive access is over. Data transfer must be done by spi_sync_locked
4503 * and spi_async_locked calls when the SPI bus lock is held.
4504 *
97d56dc6 4505 * Return: always zero.
cf32b71e 4506 */
8caab75f 4507int spi_bus_lock(struct spi_controller *ctlr)
cf32b71e
ES		 4508{
4509 unsigned long flags;
4510
8caab75f 4511 mutex_lock(&ctlr->bus_lock_mutex);
cf32b71e 4512
8caab75f
GU		 4513 spin_lock_irqsave(&ctlr->bus_lock_spinlock, flags);
4514 ctlr->bus_lock_flag = 1;
4515 spin_unlock_irqrestore(&ctlr->bus_lock_spinlock, flags);
cf32b71e 4516
95c8222f 4517 /* Mutex remains locked until spi_bus_unlock() is called */
cf32b71e
ES		 4518
4519 return 0;
4520}
4521EXPORT_SYMBOL_GPL(spi_bus_lock);
4522
4523/**
4524 * spi_bus_unlock - release the lock for exclusive SPI bus usage
8caab75f 4525 * @ctlr: SPI bus master that was locked for exclusive bus access
cf32b71e
ES		 4526 * Context: can sleep
4527 *
4528 * This call may only be used from a context that may sleep. The sleep
4529 * is non-interruptible, and has no timeout.
4530 *
4531 * This call releases an SPI bus lock previously obtained by an spi_bus_lock
4532 * call.
4533 *
97d56dc6 4534 * Return: always zero.
cf32b71e 4535 */
8caab75f 4536int spi_bus_unlock(struct spi_controller *ctlr)
cf32b71e 4537{
8caab75f 4538 ctlr->bus_lock_flag = 0;
cf32b71e 4539
8caab75f 4540 mutex_unlock(&ctlr->bus_lock_mutex);
cf32b71e
ES		 4541
4542 return 0;
4543}
4544EXPORT_SYMBOL_GPL(spi_bus_unlock);
4545
95c8222f 4546/* Portable code must never pass more than 32 bytes */
5fe5f05e 4547#define SPI_BUFSIZ max(32, SMP_CACHE_BYTES)
8ae12a0d
DB		 4548
4549static u8 *buf;
4550
4551/**
4552 * spi_write_then_read - SPI synchronous write followed by read
4553 * @spi: device with which data will be exchanged
702ca026 4554 * @txbuf: data to be written (need not be DMA-safe)
8ae12a0d 4555 * @n_tx: size of txbuf, in bytes
702ca026 4556 * @rxbuf: buffer into which data will be read (need not be DMA-safe)
27570497 4557 * @n_rx: size of rxbuf, in bytes
33e34dc6 4558 * Context: can sleep
8ae12a0d
DB		 4559 *
4560 * This performs a half duplex MicroWire style transaction with the
4561 * device, sending txbuf and then reading rxbuf. The return value
4562 * is zero for success, else a negative errno status code.
b885244e 4563 * This call may only be used from a context that may sleep.
8ae12a0d 4564 *
c373643b 4565 * Parameters to this routine are always copied using a small buffer.
33e34dc6 4566 * Performance-sensitive or bulk transfer code should instead use
702ca026 4567 * spi_{async,sync}() calls with DMA-safe buffers.
97d56dc6
JMC		 4568 *
4569 * Return: zero on success, else a negative error code.
8ae12a0d
DB		 4570 */
4571int spi_write_then_read(struct spi_device *spi,
0c4a1590
MB		 4572 const void *txbuf, unsigned n_tx,
4573 void *rxbuf, unsigned n_rx)
8ae12a0d 4574{
068f4070 4575 static DEFINE_MUTEX(lock);
8ae12a0d
DB		 4576
4577 int status;
4578 struct spi_message message;
bdff549e 4579 struct spi_transfer x[2];
8ae12a0d
DB		 4580 u8 *local_buf;
4581
350de7ce
AS		 4582 /*
4583 * Use preallocated DMA-safe buffer if we can. We can't avoid
b3a223ee
MB		 4584 * copying here, (as a pure convenience thing), but we can
4585 * keep heap costs out of the hot path unless someone else is
4586 * using the pre-allocated buffer or the transfer is too large.
8ae12a0d 4587 */
b3a223ee 4588 if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) {
2cd94c8a
MB		 4589 local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
4590 GFP_KERNEL | GFP_DMA);
b3a223ee
MB		 4591 if (!local_buf)
4592 return -ENOMEM;
4593 } else {
4594 local_buf = buf;
4595 }
8ae12a0d 4596
8275c642 4597 spi_message_init(&message);
5fe5f05e 4598 memset(x, 0, sizeof(x));
bdff549e
DB		 4599 if (n_tx) {
4600 x[0].len = n_tx;
4601 spi_message_add_tail(&x[0], &message);
4602 }
4603 if (n_rx) {
4604 x[1].len = n_rx;
4605 spi_message_add_tail(&x[1], &message);
4606 }
8275c642 4607
8ae12a0d 4608 memcpy(local_buf, txbuf, n_tx);
bdff549e
DB		 4609 x[0].tx_buf = local_buf;
4610 x[1].rx_buf = local_buf + n_tx;
8ae12a0d 4611
702ca026 4612 /* Do the I/O */
8ae12a0d 4613 status = spi_sync(spi, &message);
9b938b74 4614 if (status == 0)
bdff549e 4615 memcpy(rxbuf, x[1].rx_buf, n_rx);
8ae12a0d 4616
bdff549e 4617 if (x[0].tx_buf == buf)
068f4070 4618 mutex_unlock(&lock);
8ae12a0d
DB		 4619 else
4620 kfree(local_buf);
4621
4622 return status;
4623}
4624EXPORT_SYMBOL_GPL(spi_write_then_read);
4625
4626/*-------------------------------------------------------------------------*/
4627
da21fde0 4628#if IS_ENABLED(CONFIG_OF_DYNAMIC)
95c8222f 4629/* Must call put_device() when done with returned spi_device device */
da21fde0 4630static struct spi_device *of_find_spi_device_by_node(struct device_node *node)
ce79d54a 4631{
cfba5de9
SP		 4632 struct device *dev = bus_find_device_by_of_node(&spi_bus_type, node);
4633
ce79d54a
PA		 4634 return dev ? to_spi_device(dev) : NULL;
4635}
4636
95c8222f 4637/* The spi controllers are not using spi_bus, so we find it with another way */
8caab75f 4638static struct spi_controller *of_find_spi_controller_by_node(struct device_node *node)
ce79d54a
PA		 4639{
4640 struct device *dev;
4641
cfba5de9 4642 dev = class_find_device_by_of_node(&spi_master_class, node);
6c364062 4643 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
cfba5de9 4644 dev = class_find_device_by_of_node(&spi_slave_class, node);
ce79d54a
PA		 4645 if (!dev)
4646 return NULL;
4647
95c8222f 4648 /* Reference got in class_find_device */
8caab75f 4649 return container_of(dev, struct spi_controller, dev);
ce79d54a
PA		 4650}
4651
4652static int of_spi_notify(struct notifier_block *nb, unsigned long action,
4653 void *arg)
4654{
4655 struct of_reconfig_data *rd = arg;
8caab75f 4656 struct spi_controller *ctlr;
ce79d54a
PA		 4657 struct spi_device *spi;
4658
4659 switch (of_reconfig_get_state_change(action, arg)) {
4660 case OF_RECONFIG_CHANGE_ADD:
8caab75f
GU		 4661 ctlr = of_find_spi_controller_by_node(rd->dn->parent);
4662 if (ctlr == NULL)
95c8222f 4663 return NOTIFY_OK; /* Not for us */
ce79d54a 4664
bd6c1644 4665 if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) {
8caab75f 4666 put_device(&ctlr->dev);
bd6c1644
GU		 4667 return NOTIFY_OK;
4668 }
4669
1a50d940
GU		 4670 /*
4671 * Clear the flag before adding the device so that fw_devlink
4672 * doesn't skip adding consumers to this device.
4673 */
4674 rd->dn->fwnode.flags &= ~FWNODE_FLAG_NOT_DEVICE;
8caab75f
GU		 4675 spi = of_register_spi_device(ctlr, rd->dn);
4676 put_device(&ctlr->dev);
ce79d54a
PA		 4677
4678 if (IS_ERR(spi)) {
25c56c88
RH		 4679 pr_err("%s: failed to create for '%pOF'\n",
4680 __func__, rd->dn);
e0af98a7 4681 of_node_clear_flag(rd->dn, OF_POPULATED);
ce79d54a
PA		 4682 return notifier_from_errno(PTR_ERR(spi));
4683 }
4684 break;
4685
4686 case OF_RECONFIG_CHANGE_REMOVE:
95c8222f 4687 /* Already depopulated? */
bd6c1644
GU		 4688 if (!of_node_check_flag(rd->dn, OF_POPULATED))
4689 return NOTIFY_OK;
4690
95c8222f 4691 /* Find our device by node */
ce79d54a
PA		 4692 spi = of_find_spi_device_by_node(rd->dn);
4693 if (spi == NULL)
95c8222f 4694 return NOTIFY_OK; /* No? not meant for us */
ce79d54a 4695
95c8222f 4696 /* Unregister takes one ref away */
ce79d54a
PA		 4697 spi_unregister_device(spi);
4698
95c8222f 4699 /* And put the reference of the find */
ce79d54a
PA		 4700 put_device(&spi->dev);
4701 break;
4702 }
4703
4704 return NOTIFY_OK;
4705}
4706
4707static struct notifier_block spi_of_notifier = {
4708 .notifier_call = of_spi_notify,
4709};
4710#else /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4711extern struct notifier_block spi_of_notifier;
4712#endif /* IS_ENABLED(CONFIG_OF_DYNAMIC) */
4713
7f24467f 4714#if IS_ENABLED(CONFIG_ACPI)
8caab75f 4715static int spi_acpi_controller_match(struct device *dev, const void *data)
7f24467f
OP		 4716{
4717 return ACPI_COMPANION(dev->parent) == data;
4718}
4719
a8ecbc54 4720struct spi_controller *acpi_spi_find_controller_by_adev(struct acpi_device *adev)
7f24467f
OP		 4721{
4722 struct device *dev;
4723
4724 dev = class_find_device(&spi_master_class, NULL, adev,
8caab75f 4725 spi_acpi_controller_match);
6c364062
GU		 4726 if (!dev && IS_ENABLED(CONFIG_SPI_SLAVE))
4727 dev = class_find_device(&spi_slave_class, NULL, adev,
8caab75f 4728 spi_acpi_controller_match);
7f24467f
OP		 4729 if (!dev)
4730 return NULL;
4731
8caab75f 4732 return container_of(dev, struct spi_controller, dev);
7f24467f 4733}
a8ecbc54 4734EXPORT_SYMBOL_GPL(acpi_spi_find_controller_by_adev);
7f24467f
OP		 4735
4736static struct spi_device *acpi_spi_find_device_by_adev(struct acpi_device *adev)
4737{
4738 struct device *dev;
4739
00500147 4740 dev = bus_find_device_by_acpi_dev(&spi_bus_type, adev);
5b16668e 4741 return to_spi_device(dev);
7f24467f
OP		 4742}
4743
4744static int acpi_spi_notify(struct notifier_block *nb, unsigned long value,
4745 void *arg)
4746{
4747 struct acpi_device *adev = arg;
8caab75f 4748 struct spi_controller *ctlr;
7f24467f
OP		 4749 struct spi_device *spi;
4750
4751 switch (value) {
4752 case ACPI_RECONFIG_DEVICE_ADD:
62fcb99b 4753 ctlr = acpi_spi_find_controller_by_adev(acpi_dev_parent(adev));
8caab75f 4754 if (!ctlr)
7f24467f
OP		 4755 break;
4756
8caab75f
GU		 4757 acpi_register_spi_device(ctlr, adev);
4758 put_device(&ctlr->dev);
7f24467f
OP		 4759 break;
4760 case ACPI_RECONFIG_DEVICE_REMOVE:
4761 if (!acpi_device_enumerated(adev))
4762 break;
4763
4764 spi = acpi_spi_find_device_by_adev(adev);
4765 if (!spi)
4766 break;
4767
4768 spi_unregister_device(spi);
4769 put_device(&spi->dev);
4770 break;
4771 }
4772
4773 return NOTIFY_OK;
4774}
4775
4776static struct notifier_block spi_acpi_notifier = {
4777 .notifier_call = acpi_spi_notify,
4778};
4779#else
4780extern struct notifier_block spi_acpi_notifier;
4781#endif
4782
8ae12a0d
DB		 4783static int __init spi_init(void)
4784{
b885244e
DB		 4785 int status;
4786
e94b1766 4787 buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL);
b885244e
DB		 4788 if (!buf) {
4789 status = -ENOMEM;
4790 goto err0;
4791 }
4792
4793 status = bus_register(&spi_bus_type);
4794 if (status < 0)
4795 goto err1;
8ae12a0d 4796
b885244e
DB		 4797 status = class_register(&spi_master_class);
4798 if (status < 0)
4799 goto err2;
ce79d54a 4800
6c364062
GU		 4801 if (IS_ENABLED(CONFIG_SPI_SLAVE)) {
4802 status = class_register(&spi_slave_class);
4803 if (status < 0)
4804 goto err3;
4805 }
4806
5267720e 4807 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
ce79d54a 4808 WARN_ON(of_reconfig_notifier_register(&spi_of_notifier));
7f24467f
OP		 4809 if (IS_ENABLED(CONFIG_ACPI))
4810 WARN_ON(acpi_reconfig_notifier_register(&spi_acpi_notifier));
ce79d54a 4811
8ae12a0d 4812 return 0;
b885244e 4813
6c364062
GU		 4814err3:
4815 class_unregister(&spi_master_class);
b885244e
DB		 4816err2:
4817 bus_unregister(&spi_bus_type);
4818err1:
4819 kfree(buf);
4820 buf = NULL;
4821err0:
4822 return status;
8ae12a0d 4823}
b885244e 4824
350de7ce
AS		 4825/*
4826 * A board_info is normally registered in arch_initcall(),
4827 * but even essential drivers wait till later.
b885244e 4828 *
350de7ce
AS		 4829 * REVISIT only boardinfo really needs static linking. The rest (device and
4830 * driver registration) _could_ be dynamically linked (modular) ... Costs
b885244e 4831 * include needing to have boardinfo data structures be much more public.
8ae12a0d 4832 */
673c0c00 4833postcore_initcall(spi_init);
Linux 6.x block layer and io_uring tree(s)