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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
6840cc29 MF |
2 | /* |
3 | * Xtensa xtfpga SPI controller driver | |
4 | * | |
5 | * Copyright (c) 2014 Cadence Design Systems Inc. | |
6840cc29 MF |
6 | */ |
7 | ||
8 | #include <linux/delay.h> | |
9 | #include <linux/io.h> | |
10 | #include <linux/module.h> | |
11 | #include <linux/of.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/spi/spi.h> | |
14 | #include <linux/spi/spi_bitbang.h> | |
15 | ||
16 | #define XTFPGA_SPI_NAME "xtfpga_spi" | |
17 | ||
18 | #define XTFPGA_SPI_START 0x0 | |
19 | #define XTFPGA_SPI_BUSY 0x4 | |
20 | #define XTFPGA_SPI_DATA 0x8 | |
21 | ||
22 | #define BUSY_WAIT_US 100 | |
23 | ||
24 | struct xtfpga_spi { | |
25 | struct spi_bitbang bitbang; | |
26 | void __iomem *regs; | |
27 | u32 data; | |
28 | unsigned data_sz; | |
29 | }; | |
30 | ||
31 | static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi, | |
32 | unsigned addr, u32 val) | |
33 | { | |
b0b48550 | 34 | __raw_writel(val, spi->regs + addr); |
6840cc29 MF |
35 | } |
36 | ||
37 | static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi, | |
38 | unsigned addr) | |
39 | { | |
b0b48550 | 40 | return __raw_readl(spi->regs + addr); |
6840cc29 MF |
41 | } |
42 | ||
43 | static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi) | |
44 | { | |
45 | unsigned i; | |
cdc67fa9 | 46 | |
6840cc29 MF |
47 | for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) && |
48 | i < BUSY_WAIT_US; ++i) | |
49 | udelay(1); | |
50 | WARN_ON_ONCE(i == BUSY_WAIT_US); | |
51 | } | |
52 | ||
53 | static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs, | |
304d3436 | 54 | u32 v, u8 bits, unsigned flags) |
6840cc29 MF |
55 | { |
56 | struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master); | |
57 | ||
58 | xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0)); | |
59 | xspi->data_sz += bits; | |
60 | if (xspi->data_sz >= 16) { | |
61 | xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA, | |
62 | xspi->data >> (xspi->data_sz - 16)); | |
63 | xspi->data_sz -= 16; | |
64 | xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1); | |
65 | xtfpga_spi_wait_busy(xspi); | |
66 | xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0); | |
67 | } | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
72 | static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on) | |
73 | { | |
74 | struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master); | |
75 | ||
76 | WARN_ON(xspi->data_sz != 0); | |
77 | xspi->data_sz = 0; | |
78 | } | |
79 | ||
80 | static int xtfpga_spi_probe(struct platform_device *pdev) | |
81 | { | |
82 | struct xtfpga_spi *xspi; | |
6840cc29 MF |
83 | int ret; |
84 | struct spi_master *master; | |
85 | ||
478cc2fc | 86 | master = devm_spi_alloc_master(&pdev->dev, sizeof(struct xtfpga_spi)); |
6840cc29 MF |
87 | if (!master) |
88 | return -ENOMEM; | |
89 | ||
c397f09e | 90 | master->flags = SPI_CONTROLLER_NO_RX; |
6840cc29 MF |
91 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16); |
92 | master->bus_num = pdev->dev.id; | |
93 | master->dev.of_node = pdev->dev.of_node; | |
94 | ||
95 | xspi = spi_master_get_devdata(master); | |
96 | xspi->bitbang.master = master; | |
97 | xspi->bitbang.chipselect = xtfpga_spi_chipselect; | |
98 | xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word; | |
3f049e7d | 99 | xspi->regs = devm_platform_ioremap_resource(pdev, 0); |
478cc2fc YY |
100 | if (IS_ERR(xspi->regs)) |
101 | return PTR_ERR(xspi->regs); | |
6840cc29 MF |
102 | |
103 | xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0); | |
104 | usleep_range(1000, 2000); | |
105 | if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) { | |
106 | dev_err(&pdev->dev, "Device stuck in busy state\n"); | |
478cc2fc | 107 | return -EBUSY; |
6840cc29 MF |
108 | } |
109 | ||
110 | ret = spi_bitbang_start(&xspi->bitbang); | |
111 | if (ret < 0) { | |
112 | dev_err(&pdev->dev, "spi_bitbang_start failed\n"); | |
478cc2fc | 113 | return ret; |
6840cc29 MF |
114 | } |
115 | ||
116 | platform_set_drvdata(pdev, master); | |
117 | return 0; | |
6840cc29 MF |
118 | } |
119 | ||
795b3ac7 | 120 | static void xtfpga_spi_remove(struct platform_device *pdev) |
6840cc29 MF |
121 | { |
122 | struct spi_master *master = platform_get_drvdata(pdev); | |
123 | struct xtfpga_spi *xspi = spi_master_get_devdata(master); | |
124 | ||
125 | spi_bitbang_stop(&xspi->bitbang); | |
126 | spi_master_put(master); | |
6840cc29 MF |
127 | } |
128 | ||
129 | MODULE_ALIAS("platform:" XTFPGA_SPI_NAME); | |
130 | ||
131 | #ifdef CONFIG_OF | |
132 | static const struct of_device_id xtfpga_spi_of_match[] = { | |
133 | { .compatible = "cdns,xtfpga-spi", }, | |
134 | {} | |
135 | }; | |
136 | MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match); | |
137 | #endif | |
138 | ||
139 | static struct platform_driver xtfpga_spi_driver = { | |
140 | .probe = xtfpga_spi_probe, | |
795b3ac7 | 141 | .remove_new = xtfpga_spi_remove, |
6840cc29 MF |
142 | .driver = { |
143 | .name = XTFPGA_SPI_NAME, | |
6840cc29 MF |
144 | .of_match_table = of_match_ptr(xtfpga_spi_of_match), |
145 | }, | |
146 | }; | |
147 | module_platform_driver(xtfpga_spi_driver); | |
148 | ||
149 | MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>"); | |
150 | MODULE_DESCRIPTION("xtensa xtfpga SPI driver"); | |
151 | MODULE_LICENSE("GPL"); |