[linux-block.git] / drivers / spi / spi-rpc-if.c

// SPDX-License-Identifier: GPL-2.0
//
// RPC-IF SPI/QSPI/Octa driver
//
// Copyright (C) 2018 ~ 2019 Renesas Solutions Corp.
// Copyright (C) 2019 Macronix International Co., Ltd.
// Copyright (C) 2019 - 2020 Cogent Embedded, Inc.
//

#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>

#include <memory/renesas-rpc-if.h>

#include <linux/unaligned.h>

static void rpcif_spi_mem_prepare(struct spi_device *spi_dev,
				  const struct spi_mem_op *spi_op,
				  u64 *offs, size_t *len)
{
	struct rpcif *rpc = spi_controller_get_devdata(spi_dev->controller);
	struct rpcif_op rpc_op = { };

	rpc_op.cmd.opcode = spi_op->cmd.opcode;
	rpc_op.cmd.buswidth = spi_op->cmd.buswidth;

	if (spi_op->addr.nbytes) {
		rpc_op.addr.buswidth = spi_op->addr.buswidth;
		rpc_op.addr.nbytes = spi_op->addr.nbytes;
		rpc_op.addr.val = spi_op->addr.val;
	}

	if (spi_op->dummy.nbytes) {
		rpc_op.dummy.buswidth = spi_op->dummy.buswidth;
		rpc_op.dummy.ncycles  = spi_op->dummy.nbytes * 8 /
					spi_op->dummy.buswidth;
	}

	if (spi_op->data.nbytes || (offs && len)) {
		rpc_op.data.buswidth = spi_op->data.buswidth;
		rpc_op.data.nbytes = spi_op->data.nbytes;
		switch (spi_op->data.dir) {
		case SPI_MEM_DATA_IN:
			rpc_op.data.dir = RPCIF_DATA_IN;
			rpc_op.data.buf.in = spi_op->data.buf.in;
			break;
		case SPI_MEM_DATA_OUT:
			rpc_op.data.dir = RPCIF_DATA_OUT;
			rpc_op.data.buf.out = spi_op->data.buf.out;
			break;
		case SPI_MEM_NO_DATA:
			rpc_op.data.dir = RPCIF_NO_DATA;
			break;
		}
	} else	{
		rpc_op.data.dir = RPCIF_NO_DATA;
	}

	rpcif_prepare(rpc->dev, &rpc_op, offs, len);
}

static bool rpcif_spi_mem_supports_op(struct spi_mem *mem,
				      const struct spi_mem_op *op)
{
	if (!spi_mem_default_supports_op(mem, op))
		return false;

	if (op->data.buswidth > 4 || op->addr.buswidth > 4 ||
	    op->dummy.buswidth > 4 || op->cmd.buswidth > 4 ||
	    op->addr.nbytes > 4)
		return false;

	return true;
}

static ssize_t xspi_spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
					 u64 offs, size_t len, const void *buf)
{
	struct rpcif *rpc = spi_controller_get_devdata(desc->mem->spi->controller);

	if (offs + desc->info.offset + len > U32_MAX)
		return -EINVAL;

	rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len);

	return xspi_dirmap_write(rpc->dev, offs, len, buf);
}

static ssize_t rpcif_spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
					 u64 offs, size_t len, void *buf)
{
	struct rpcif *rpc =
		spi_controller_get_devdata(desc->mem->spi->controller);

	if (offs + desc->info.offset + len > U32_MAX)
		return -EINVAL;

	rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len);

	return rpcif_dirmap_read(rpc->dev, offs, len, buf);
}

static int rpcif_spi_mem_dirmap_create(struct spi_mem_dirmap_desc *desc)
{
	struct rpcif *rpc =
		spi_controller_get_devdata(desc->mem->spi->controller);

	if (desc->info.offset + desc->info.length > U32_MAX)
		return -EINVAL;

	if (!rpcif_spi_mem_supports_op(desc->mem, &desc->info.op_tmpl))
		return -EOPNOTSUPP;

	if (!rpc->dirmap)
		return -EOPNOTSUPP;

	if (!rpc->xspi && desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
		return -EOPNOTSUPP;

	return 0;
}

static int rpcif_spi_mem_exec_op(struct spi_mem *mem,
				 const struct spi_mem_op *op)
{
	struct rpcif *rpc =
		spi_controller_get_devdata(mem->spi->controller);

	rpcif_spi_mem_prepare(mem->spi, op, NULL, NULL);

	return rpcif_manual_xfer(rpc->dev);
}

static const struct spi_controller_mem_ops rpcif_spi_mem_ops = {
	.supports_op	= rpcif_spi_mem_supports_op,
	.exec_op	= rpcif_spi_mem_exec_op,
	.dirmap_create	= rpcif_spi_mem_dirmap_create,
	.dirmap_read	= rpcif_spi_mem_dirmap_read,
	.dirmap_write	= xspi_spi_mem_dirmap_write,
};

static int rpcif_spi_probe(struct platform_device *pdev)
{
	struct device *parent = pdev->dev.parent;
	struct spi_controller *ctlr;
	struct rpcif *rpc;
	int error;

	ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*rpc));
	if (!ctlr)
		return -ENOMEM;

	rpc = spi_controller_get_devdata(ctlr);
	error = rpcif_sw_init(rpc, parent);
	if (error)
		return error;

	platform_set_drvdata(pdev, ctlr);

	ctlr->dev.of_node = parent->of_node;

	pm_runtime_enable(rpc->dev);

	ctlr->num_chipselect = 1;
	ctlr->mem_ops = &rpcif_spi_mem_ops;

	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
	ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_TX_QUAD | SPI_RX_QUAD;
	ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX;

	error = rpcif_hw_init(rpc->dev, false);
	if (error)
		goto out_disable_rpm;

	error = spi_register_controller(ctlr);
	if (error) {
		dev_err(&pdev->dev, "spi_register_controller failed\n");
		goto out_disable_rpm;
	}

	return 0;

out_disable_rpm:
	pm_runtime_disable(rpc->dev);
	return error;
}

static void rpcif_spi_remove(struct platform_device *pdev)
{
	struct spi_controller *ctlr = platform_get_drvdata(pdev);
	struct rpcif *rpc = spi_controller_get_devdata(ctlr);

	spi_unregister_controller(ctlr);
	pm_runtime_disable(rpc->dev);
}

static int __maybe_unused rpcif_spi_suspend(struct device *dev)
{
	struct spi_controller *ctlr = dev_get_drvdata(dev);

	return spi_controller_suspend(ctlr);
}

static int __maybe_unused rpcif_spi_resume(struct device *dev)
{
	struct spi_controller *ctlr = dev_get_drvdata(dev);

	return spi_controller_resume(ctlr);
}

static SIMPLE_DEV_PM_OPS(rpcif_spi_pm_ops, rpcif_spi_suspend, rpcif_spi_resume);

static const struct platform_device_id rpc_if_spi_id_table[] = {
	{ .name = "rpc-if-spi" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, rpc_if_spi_id_table);

static struct platform_driver rpcif_spi_driver = {
	.probe	= rpcif_spi_probe,
	.remove = rpcif_spi_remove,
	.id_table = rpc_if_spi_id_table,
	.driver = {
		.name	= "rpc-if-spi",
#ifdef CONFIG_PM_SLEEP
		.pm	= &rpcif_spi_pm_ops,
#endif
	},
};
module_platform_driver(rpcif_spi_driver);

MODULE_DESCRIPTION("Renesas RPC-IF SPI driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
eb8d6d46 SS	1	// SPDX-License-Identifier: GPL-2.0
	2	//
	3	// RPC-IF SPI/QSPI/Octa driver
	4	//
	5	// Copyright (C) 2018 ~ 2019 Renesas Solutions Corp.
	6	// Copyright (C) 2019 Macronix International Co., Ltd.
	7	// Copyright (C) 2019 - 2020 Cogent Embedded, Inc.
	8	//
	9
	10	#include <linux/module.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/spi/spi.h>
	13	#include <linux/spi/spi-mem.h>
	14
	15	#include <memory/renesas-rpc-if.h>
	16
5f60d5f6	17	#include <linux/unaligned.h>
eb8d6d46 SS	18
	19	static void rpcif_spi_mem_prepare(struct spi_device *spi_dev,
	20	const struct spi_mem_op *spi_op,
	21	u64 offs, size_t len)
	22	{
	23	struct rpcif *rpc = spi_controller_get_devdata(spi_dev->controller);
	24	struct rpcif_op rpc_op = { };
	25
	26	rpc_op.cmd.opcode = spi_op->cmd.opcode;
	27	rpc_op.cmd.buswidth = spi_op->cmd.buswidth;
	28
	29	if (spi_op->addr.nbytes) {
	30	rpc_op.addr.buswidth = spi_op->addr.buswidth;
	31	rpc_op.addr.nbytes = spi_op->addr.nbytes;
	32	rpc_op.addr.val = spi_op->addr.val;
	33	}
	34
	35	if (spi_op->dummy.nbytes) {
	36	rpc_op.dummy.buswidth = spi_op->dummy.buswidth;
	37	rpc_op.dummy.ncycles = spi_op->dummy.nbytes * 8 /
	38	spi_op->dummy.buswidth;
	39	}
	40
	41	if (spi_op->data.nbytes \|\| (offs && len)) {
	42	rpc_op.data.buswidth = spi_op->data.buswidth;
	43	rpc_op.data.nbytes = spi_op->data.nbytes;
	44	switch (spi_op->data.dir) {
	45	case SPI_MEM_DATA_IN:
	46	rpc_op.data.dir = RPCIF_DATA_IN;
	47	rpc_op.data.buf.in = spi_op->data.buf.in;
	48	break;
	49	case SPI_MEM_DATA_OUT:
	50	rpc_op.data.dir = RPCIF_DATA_OUT;
	51	rpc_op.data.buf.out = spi_op->data.buf.out;
	52	break;
	53	case SPI_MEM_NO_DATA:
	54	rpc_op.data.dir = RPCIF_NO_DATA;
	55	break;
	56	}
	57	} else {
	58	rpc_op.data.dir = RPCIF_NO_DATA;
	59	}
	60
a198fcd1	61	rpcif_prepare(rpc->dev, &rpc_op, offs, len);
eb8d6d46 SS	62	}
	63
	64	static bool rpcif_spi_mem_supports_op(struct spi_mem *mem,
	65	const struct spi_mem_op *op)
	66	{
	67	if (!spi_mem_default_supports_op(mem, op))
	68	return false;
	69
	70	if (op->data.buswidth > 4 \|\| op->addr.buswidth > 4 \|\|
	71	op->dummy.buswidth > 4 \|\| op->cmd.buswidth > 4 \|\|
	72	op->addr.nbytes > 4)
	73	return false;
	74
	75	return true;
	76	}
	77
b0b8d3ae BD	78	static ssize_t xspi_spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
	79	u64 offs, size_t len, const void *buf)
	80	{
	81	struct rpcif *rpc = spi_controller_get_devdata(desc->mem->spi->controller);
	82
	83	if (offs + desc->info.offset + len > U32_MAX)
	84	return -EINVAL;
	85
	86	rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len);
	87
	88	return xspi_dirmap_write(rpc->dev, offs, len, buf);
	89	}
	90
eb8d6d46 SS	91	static ssize_t rpcif_spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
	92	u64 offs, size_t len, void *buf)
	93	{
	94	struct rpcif *rpc =
	95	spi_controller_get_devdata(desc->mem->spi->controller);
	96
	97	if (offs + desc->info.offset + len > U32_MAX)
	98	return -EINVAL;
	99
	100	rpcif_spi_mem_prepare(desc->mem->spi, &desc->info.op_tmpl, &offs, &len);
	101
a198fcd1	102	return rpcif_dirmap_read(rpc->dev, offs, len, buf);
eb8d6d46 SS	103	}
	104
	105	static int rpcif_spi_mem_dirmap_create(struct spi_mem_dirmap_desc *desc)
	106	{
	107	struct rpcif *rpc =
	108	spi_controller_get_devdata(desc->mem->spi->controller);
	109
	110	if (desc->info.offset + desc->info.length > U32_MAX)
615725a9	111	return -EINVAL;
eb8d6d46 SS	112
eb8d6d46 SS	113	if (!rpcif_spi_mem_supports_op(desc->mem, &desc->info.op_tmpl))
615725a9	114	return -EOPNOTSUPP;
eb8d6d46	115
615725a9 MR	116	if (!rpc->dirmap)
615725a9 MR	117	return -EOPNOTSUPP;
eb8d6d46	118
b0b8d3ae	119	if (!rpc->xspi && desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
615725a9	120	return -EOPNOTSUPP;
eb8d6d46 SS	121
	122	return 0;
	123	}
	124
	125	static int rpcif_spi_mem_exec_op(struct spi_mem *mem,
	126	const struct spi_mem_op *op)
	127	{
	128	struct rpcif *rpc =
	129	spi_controller_get_devdata(mem->spi->controller);
	130
	131	rpcif_spi_mem_prepare(mem->spi, op, NULL, NULL);
	132
a198fcd1	133	return rpcif_manual_xfer(rpc->dev);
eb8d6d46 SS	134	}
	135
	136	static const struct spi_controller_mem_ops rpcif_spi_mem_ops = {
	137	.supports_op = rpcif_spi_mem_supports_op,
	138	.exec_op = rpcif_spi_mem_exec_op,
	139	.dirmap_create = rpcif_spi_mem_dirmap_create,
	140	.dirmap_read = rpcif_spi_mem_dirmap_read,
b0b8d3ae	141	.dirmap_write = xspi_spi_mem_dirmap_write,
eb8d6d46 SS	142	};
	143
	144	static int rpcif_spi_probe(struct platform_device *pdev)
	145	{
	146	struct device *parent = pdev->dev.parent;
	147	struct spi_controller *ctlr;
	148	struct rpcif *rpc;
	149	int error;
	150
46f53bde	151	ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*rpc));
eb8d6d46 SS	152	if (!ctlr)
	153	return -ENOMEM;
	154
	155	rpc = spi_controller_get_devdata(ctlr);
0b0a281e LP	156	error = rpcif_sw_init(rpc, parent);
	157	if (error)
	158	return error;
eb8d6d46 SS	159
	160	platform_set_drvdata(pdev, ctlr);
	161
	162	ctlr->dev.of_node = parent->of_node;
	163
27e5f98c	164	pm_runtime_enable(rpc->dev);
eb8d6d46 SS	165
	166	ctlr->num_chipselect = 1;
	167	ctlr->mem_ops = &rpcif_spi_mem_ops;
	168
	169	ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
	170	ctlr->mode_bits = SPI_CPOL \| SPI_CPHA \| SPI_TX_QUAD \| SPI_RX_QUAD;
	171	ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX;
	172
a198fcd1	173	error = rpcif_hw_init(rpc->dev, false);
b04cc0d9	174	if (error)
2f8cf5f6	175	goto out_disable_rpm;
eb8d6d46 SS	176
	177	error = spi_register_controller(ctlr);
	178	if (error) {
	179	dev_err(&pdev->dev, "spi_register_controller failed\n");
2f8cf5f6	180	goto out_disable_rpm;
eb8d6d46	181	}
eb8d6d46	182
2f8cf5f6 GU	183	return 0;
	184
	185	out_disable_rpm:
27e5f98c	186	pm_runtime_disable(rpc->dev);
eb8d6d46 SS	187	return error;
	188	}
	189
c42ee93a	190	static void rpcif_spi_remove(struct platform_device *pdev)
eb8d6d46 SS	191	{
	192	struct spi_controller *ctlr = platform_get_drvdata(pdev);
	193	struct rpcif *rpc = spi_controller_get_devdata(ctlr);
	194
	195	spi_unregister_controller(ctlr);
27e5f98c	196	pm_runtime_disable(rpc->dev);
eb8d6d46 SS	197	}
eb8d6d46 SS	198
9584fc95	199	static int __maybe_unused rpcif_spi_suspend(struct device *dev)
eb8d6d46 SS	200	{
	201	struct spi_controller *ctlr = dev_get_drvdata(dev);
	202
	203	return spi_controller_suspend(ctlr);
	204	}
	205
9584fc95	206	static int __maybe_unused rpcif_spi_resume(struct device *dev)
eb8d6d46 SS	207	{
	208	struct spi_controller *ctlr = dev_get_drvdata(dev);
	209
	210	return spi_controller_resume(ctlr);
	211	}
	212
	213	static SIMPLE_DEV_PM_OPS(rpcif_spi_pm_ops, rpcif_spi_suspend, rpcif_spi_resume);
eb8d6d46	214
0880f669 BD	215	static const struct platform_device_id rpc_if_spi_id_table[] = {
	216	{ .name = "rpc-if-spi" },
	217	{ /* sentinel */ }
	218	};
	219	MODULE_DEVICE_TABLE(platform, rpc_if_spi_id_table);
	220
eb8d6d46 SS	221	static struct platform_driver rpcif_spi_driver = {
eb8d6d46 SS	222	.probe = rpcif_spi_probe,
494c3dc4	223	.remove = rpcif_spi_remove,
0880f669	224	.id_table = rpc_if_spi_id_table,
eb8d6d46 SS	225	.driver = {
eb8d6d46 SS	226	.name = "rpc-if-spi",
bfeccc6a	227	#ifdef CONFIG_PM_SLEEP
9584fc95	228	.pm = &rpcif_spi_pm_ops,
bfeccc6a	229	#endif
eb8d6d46 SS	230	},
	231	};
	232	module_platform_driver(rpcif_spi_driver);
	233
	234	MODULE_DESCRIPTION("Renesas RPC-IF SPI driver");
	235	MODULE_LICENSE("GPL v2");