Commit | Line | Data |
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09c434b8 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
d6ea3df0 SAS |
2 | /* |
3 | * CE4100's SPI device is more or less the same one as found on PXA | |
4 | * | |
e379d2cd | 5 | * Copyright (C) 2016, Intel Corporation |
d6ea3df0 | 6 | */ |
e379d2cd AS |
7 | #include <linux/clk-provider.h> |
8 | #include <linux/module.h> | |
d6ea3df0 SAS |
9 | #include <linux/pci.h> |
10 | #include <linux/platform_device.h> | |
d6ea3df0 SAS |
11 | #include <linux/spi/pxa2xx_spi.h> |
12 | ||
b729bf34 MW |
13 | #include <linux/dmaengine.h> |
14 | #include <linux/platform_data/dma-dw.h> | |
15 | ||
d6ba32d5 | 16 | enum { |
e379d2cd | 17 | PORT_QUARK_X1000, |
d6ba32d5 | 18 | PORT_BYT, |
4f470910 | 19 | PORT_MRFLD, |
39d36536 MW |
20 | PORT_BSW0, |
21 | PORT_BSW1, | |
22 | PORT_BSW2, | |
e379d2cd | 23 | PORT_CE4100, |
caba248d | 24 | PORT_LPT, |
d6ba32d5 CCE |
25 | }; |
26 | ||
27 | struct pxa_spi_info { | |
28 | enum pxa_ssp_type type; | |
29 | int port_id; | |
30 | int num_chipselect; | |
afa93c90 | 31 | unsigned long max_clk_rate; |
b729bf34 MW |
32 | |
33 | /* DMA channel request parameters */ | |
743485ea | 34 | bool (*dma_filter)(struct dma_chan *chan, void *param); |
b729bf34 MW |
35 | void *tx_param; |
36 | void *rx_param; | |
743485ea | 37 | |
37821a82 AS |
38 | int dma_burst_size; |
39 | ||
743485ea | 40 | int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c); |
d6ba32d5 CCE |
41 | }; |
42 | ||
b729bf34 MW |
43 | static struct dw_dma_slave byt_tx_param = { .dst_id = 0 }; |
44 | static struct dw_dma_slave byt_rx_param = { .src_id = 1 }; | |
45 | ||
25014521 AS |
46 | static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 }; |
47 | static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 }; | |
48 | static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 }; | |
49 | static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 }; | |
50 | static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 }; | |
51 | static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 }; | |
52 | ||
39d36536 MW |
53 | static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 }; |
54 | static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 }; | |
55 | static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 }; | |
56 | static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 }; | |
57 | static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 }; | |
58 | static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 }; | |
59 | ||
caba248d LL |
60 | static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 }; |
61 | static struct dw_dma_slave lpt_rx_param = { .src_id = 1 }; | |
62 | ||
b729bf34 MW |
63 | static bool lpss_dma_filter(struct dma_chan *chan, void *param) |
64 | { | |
65 | struct dw_dma_slave *dws = param; | |
66 | ||
67 | if (dws->dma_dev != chan->device->dev) | |
68 | return false; | |
69 | ||
70 | chan->private = dws; | |
71 | return true; | |
72 | } | |
73 | ||
743485ea AS |
74 | static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c) |
75 | { | |
76 | struct pci_dev *dma_dev; | |
77 | ||
78 | c->num_chipselect = 1; | |
79 | c->max_clk_rate = 50000000; | |
80 | ||
81 | dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); | |
82 | ||
83 | if (c->tx_param) { | |
84 | struct dw_dma_slave *slave = c->tx_param; | |
85 | ||
86 | slave->dma_dev = &dma_dev->dev; | |
87 | slave->m_master = 0; | |
88 | slave->p_master = 1; | |
89 | } | |
90 | ||
91 | if (c->rx_param) { | |
92 | struct dw_dma_slave *slave = c->rx_param; | |
93 | ||
94 | slave->dma_dev = &dma_dev->dev; | |
95 | slave->m_master = 0; | |
96 | slave->p_master = 1; | |
97 | } | |
98 | ||
99 | c->dma_filter = lpss_dma_filter; | |
100 | return 0; | |
101 | } | |
102 | ||
4f470910 AS |
103 | static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c) |
104 | { | |
25014521 AS |
105 | struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0)); |
106 | struct dw_dma_slave *tx, *rx; | |
107 | ||
4f470910 AS |
108 | switch (PCI_FUNC(dev->devfn)) { |
109 | case 0: | |
110 | c->port_id = 3; | |
111 | c->num_chipselect = 1; | |
25014521 AS |
112 | c->tx_param = &mrfld3_tx_param; |
113 | c->rx_param = &mrfld3_rx_param; | |
4f470910 AS |
114 | break; |
115 | case 1: | |
116 | c->port_id = 5; | |
117 | c->num_chipselect = 4; | |
25014521 AS |
118 | c->tx_param = &mrfld5_tx_param; |
119 | c->rx_param = &mrfld5_rx_param; | |
4f470910 AS |
120 | break; |
121 | case 2: | |
122 | c->port_id = 6; | |
123 | c->num_chipselect = 1; | |
25014521 AS |
124 | c->tx_param = &mrfld6_tx_param; |
125 | c->rx_param = &mrfld6_rx_param; | |
4f470910 AS |
126 | break; |
127 | default: | |
128 | return -ENODEV; | |
129 | } | |
25014521 AS |
130 | |
131 | tx = c->tx_param; | |
132 | tx->dma_dev = &dma_dev->dev; | |
133 | ||
134 | rx = c->rx_param; | |
135 | rx->dma_dev = &dma_dev->dev; | |
136 | ||
137 | c->dma_filter = lpss_dma_filter; | |
37821a82 | 138 | c->dma_burst_size = 8; |
4f470910 AS |
139 | return 0; |
140 | } | |
141 | ||
d6ba32d5 CCE |
142 | static struct pxa_spi_info spi_info_configs[] = { |
143 | [PORT_CE4100] = { | |
144 | .type = PXA25x_SSP, | |
145 | .port_id = -1, | |
146 | .num_chipselect = -1, | |
afa93c90 | 147 | .max_clk_rate = 3686400, |
d6ba32d5 CCE |
148 | }, |
149 | [PORT_BYT] = { | |
03fbf488 | 150 | .type = LPSS_BYT_SSP, |
d6ba32d5 | 151 | .port_id = 0, |
743485ea | 152 | .setup = lpss_spi_setup, |
b729bf34 MW |
153 | .tx_param = &byt_tx_param, |
154 | .rx_param = &byt_rx_param, | |
d6ba32d5 | 155 | }, |
39d36536 | 156 | [PORT_BSW0] = { |
ca80ef71 | 157 | .type = LPSS_BSW_SSP, |
39d36536 | 158 | .port_id = 0, |
743485ea | 159 | .setup = lpss_spi_setup, |
39d36536 MW |
160 | .tx_param = &bsw0_tx_param, |
161 | .rx_param = &bsw0_rx_param, | |
162 | }, | |
163 | [PORT_BSW1] = { | |
ca80ef71 | 164 | .type = LPSS_BSW_SSP, |
39d36536 | 165 | .port_id = 1, |
743485ea | 166 | .setup = lpss_spi_setup, |
39d36536 MW |
167 | .tx_param = &bsw1_tx_param, |
168 | .rx_param = &bsw1_rx_param, | |
169 | }, | |
170 | [PORT_BSW2] = { | |
ca80ef71 | 171 | .type = LPSS_BSW_SSP, |
39d36536 | 172 | .port_id = 2, |
743485ea | 173 | .setup = lpss_spi_setup, |
39d36536 MW |
174 | .tx_param = &bsw2_tx_param, |
175 | .rx_param = &bsw2_rx_param, | |
d6ba32d5 | 176 | }, |
4f470910 AS |
177 | [PORT_MRFLD] = { |
178 | .type = PXA27x_SSP, | |
179 | .max_clk_rate = 25000000, | |
180 | .setup = mrfld_spi_setup, | |
181 | }, | |
e5262d05 WC |
182 | [PORT_QUARK_X1000] = { |
183 | .type = QUARK_X1000_SSP, | |
184 | .port_id = -1, | |
185 | .num_chipselect = 1, | |
186 | .max_clk_rate = 50000000, | |
187 | }, | |
caba248d LL |
188 | [PORT_LPT] = { |
189 | .type = LPSS_LPT_SSP, | |
190 | .port_id = 0, | |
743485ea | 191 | .setup = lpss_spi_setup, |
caba248d LL |
192 | .tx_param = &lpt_tx_param, |
193 | .rx_param = &lpt_rx_param, | |
194 | }, | |
d6ba32d5 CCE |
195 | }; |
196 | ||
197 | static int pxa2xx_spi_pci_probe(struct pci_dev *dev, | |
d6ea3df0 SAS |
198 | const struct pci_device_id *ent) |
199 | { | |
0202775b | 200 | struct platform_device_info pi; |
d6ea3df0 | 201 | int ret; |
d6ea3df0 | 202 | struct platform_device *pdev; |
51eea52d | 203 | struct pxa2xx_spi_controller spi_pdata; |
d6ea3df0 | 204 | struct ssp_device *ssp; |
d6ba32d5 | 205 | struct pxa_spi_info *c; |
afa93c90 | 206 | char buf[40]; |
d6ea3df0 | 207 | |
0202775b | 208 | ret = pcim_enable_device(dev); |
d6ea3df0 SAS |
209 | if (ret) |
210 | return ret; | |
211 | ||
0202775b | 212 | ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI"); |
c1346340 | 213 | if (ret) |
d6ea3df0 | 214 | return ret; |
d6ea3df0 | 215 | |
d6ba32d5 | 216 | c = &spi_info_configs[ent->driver_data]; |
743485ea AS |
217 | if (c->setup) { |
218 | ret = c->setup(dev, c); | |
219 | if (ret) | |
220 | return ret; | |
b729bf34 MW |
221 | } |
222 | ||
743485ea AS |
223 | memset(&spi_pdata, 0, sizeof(spi_pdata)); |
224 | spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn; | |
225 | spi_pdata.dma_filter = c->dma_filter; | |
b729bf34 MW |
226 | spi_pdata.tx_param = c->tx_param; |
227 | spi_pdata.rx_param = c->rx_param; | |
228 | spi_pdata.enable_dma = c->rx_param && c->tx_param; | |
37821a82 | 229 | spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1; |
d6ea3df0 | 230 | |
851bacf5 | 231 | ssp = &spi_pdata.ssp; |
d6ea3df0 | 232 | ssp->phys_base = pci_resource_start(dev, 0); |
0202775b | 233 | ssp->mmio_base = pcim_iomap_table(dev)[0]; |
d6ba32d5 CCE |
234 | ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn; |
235 | ssp->type = c->type; | |
d6ea3df0 | 236 | |
64e02cb0 JK |
237 | pci_set_master(dev); |
238 | ||
239 | ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES); | |
240 | if (ret < 0) | |
241 | return ret; | |
242 | ssp->irq = pci_irq_vector(dev, 0); | |
243 | ||
afa93c90 | 244 | snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id); |
280af2b8 SB |
245 | ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0, |
246 | c->max_clk_rate); | |
afa93c90 CCE |
247 | if (IS_ERR(ssp->clk)) |
248 | return PTR_ERR(ssp->clk); | |
249 | ||
0202775b | 250 | memset(&pi, 0, sizeof(pi)); |
b70cd2de | 251 | pi.fwnode = dev->dev.fwnode; |
0202775b MW |
252 | pi.parent = &dev->dev; |
253 | pi.name = "pxa2xx-spi"; | |
254 | pi.id = ssp->port_id; | |
255 | pi.data = &spi_pdata; | |
256 | pi.size_data = sizeof(spi_pdata); | |
d6ea3df0 | 257 | |
0202775b | 258 | pdev = platform_device_register_full(&pi); |
afa93c90 CCE |
259 | if (IS_ERR(pdev)) { |
260 | clk_unregister(ssp->clk); | |
d77b5382 | 261 | return PTR_ERR(pdev); |
afa93c90 | 262 | } |
d6ea3df0 | 263 | |
851bacf5 | 264 | pci_set_drvdata(dev, pdev); |
d6ea3df0 | 265 | |
0202775b | 266 | return 0; |
d6ea3df0 SAS |
267 | } |
268 | ||
d6ba32d5 | 269 | static void pxa2xx_spi_pci_remove(struct pci_dev *dev) |
d6ea3df0 | 270 | { |
851bacf5 | 271 | struct platform_device *pdev = pci_get_drvdata(dev); |
51eea52d | 272 | struct pxa2xx_spi_controller *spi_pdata; |
afa93c90 CCE |
273 | |
274 | spi_pdata = dev_get_platdata(&pdev->dev); | |
d6ea3df0 | 275 | |
851bacf5 | 276 | platform_device_unregister(pdev); |
afa93c90 | 277 | clk_unregister(spi_pdata->ssp.clk); |
d6ea3df0 SAS |
278 | } |
279 | ||
d6ba32d5 | 280 | static const struct pci_device_id pxa2xx_spi_pci_devices[] = { |
e5262d05 | 281 | { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 }, |
d6ba32d5 | 282 | { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT }, |
4f470910 | 283 | { PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD }, |
39d36536 MW |
284 | { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 }, |
285 | { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 }, | |
286 | { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 }, | |
e379d2cd | 287 | { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 }, |
caba248d | 288 | { PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT }, |
d6ea3df0 SAS |
289 | { }, |
290 | }; | |
d6ba32d5 | 291 | MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices); |
d6ea3df0 | 292 | |
d6ba32d5 CCE |
293 | static struct pci_driver pxa2xx_spi_pci_driver = { |
294 | .name = "pxa2xx_spi_pci", | |
295 | .id_table = pxa2xx_spi_pci_devices, | |
296 | .probe = pxa2xx_spi_pci_probe, | |
297 | .remove = pxa2xx_spi_pci_remove, | |
d6ea3df0 SAS |
298 | }; |
299 | ||
d6ba32d5 | 300 | module_pci_driver(pxa2xx_spi_pci_driver); |
d6ea3df0 | 301 | |
d6ba32d5 | 302 | MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver"); |
d6ea3df0 SAS |
303 | MODULE_LICENSE("GPL v2"); |
304 | MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>"); |