[linux-2.6-block.git] / drivers / spi / spi-gpio.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * SPI host driver using generic bitbanged GPIO
 *
 * Copyright (C) 2006,2008 David Brownell
 * Copyright (C) 2017 Linus Walleij
 */
#include <linux/gpio/consumer.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/property.h>

#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/spi/spi_gpio.h>

/*
 * This bitbanging SPI host driver should help make systems usable
 * when a native hardware SPI engine is not available, perhaps because
 * its driver isn't yet working or because the I/O pins it requires
 * are used for other purposes.
 *
 * platform_device->driver_data ... points to spi_gpio
 *
 * spi->controller_state ... reserved for bitbang framework code
 *
 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
 */

struct spi_gpio {
	struct spi_bitbang		bitbang;
	struct gpio_desc		*sck;
	struct gpio_desc		*miso;
	struct gpio_desc		*mosi;
	struct gpio_desc		**cs_gpios;
};

/*----------------------------------------------------------------------*/

#define DRIVER_NAME	"spi_gpio"

/*----------------------------------------------------------------------*/

static inline struct spi_gpio *__pure
spi_to_spi_gpio(const struct spi_device *spi)
{
	struct spi_bitbang		*bang;
	struct spi_gpio			*spi_gpio;

	bang = spi_controller_get_devdata(spi->controller);
	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
	return spi_gpio;
}

/* These helpers are in turn called by the bitbang inlines */
static inline void setsck(const struct spi_device *spi, int is_on)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);

	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
}

static inline void setmosi(const struct spi_device *spi, int is_on)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);

	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
}

static inline int getmiso(const struct spi_device *spi)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);

	if (spi->mode & SPI_3WIRE)
		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
	else
		return !!gpiod_get_value_cansleep(spi_gpio->miso);
}

/*
 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
 * requested device clock.  Software overhead means we usually have trouble
 * reaching even one Mbit/sec (except when we can inline bitops), so for now
 * we'll just assume we never need additional per-bit slowdowns.
 */
#define spidelay(nsecs)	do {} while (0)

#include "spi-bitbang-txrx.h"

/*
 * These functions can leverage inline expansion of GPIO calls to shrink
 * costs for a txrx bit, often by factors of around ten (by instruction
 * count).  That is particularly visible for larger word sizes, but helps
 * even with default 8-bit words.
 *
 * REVISIT overheads calling these functions for each word also have
 * significant performance costs.  Having txrx_bufs() calls that inline
 * the txrx_word() logic would help performance, e.g. on larger blocks
 * used with flash storage or MMC/SD.  There should also be ways to make
 * GCC be less stupid about reloading registers inside the I/O loops,
 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
 */

static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
	else
		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
}

static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
	else
		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
}

static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
	else
		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
}

static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
	else
		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
}

/*
 * These functions do not call setmosi or getmiso if respective flag
 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
 * call when such pin is not present or defined in the controller.
 * A separate set of callbacks is defined to get highest possible
 * speed in the generic case (when both MISO and MOSI lines are
 * available), as optimiser will remove the checks when argument is
 * constant.
 */

static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	flags = spi->controller->flags;
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
	else
		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
}

static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	flags = spi->controller->flags;
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
	else
		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
}

static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	flags = spi->controller->flags;
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
	else
		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
}

static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
		unsigned nsecs, u32 word, u8 bits, unsigned flags)
{
	flags = spi->controller->flags;
	if (unlikely(spi->mode & SPI_LSB_FIRST))
		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
	else
		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
}

/*----------------------------------------------------------------------*/

static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);

	/* set initial clock line level */
	if (is_active)
		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);

	/* Drive chip select line, if we have one */
	if (spi_gpio->cs_gpios) {
		struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];

		/* SPI chip selects are normally active-low */
		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
	}
}

static void spi_gpio_set_mosi_idle(struct spi_device *spi)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);

	gpiod_set_value_cansleep(spi_gpio->mosi,
				 !!(spi->mode & SPI_MOSI_IDLE_HIGH));
}

static int spi_gpio_setup(struct spi_device *spi)
{
	struct gpio_desc	*cs;
	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
	int ret;

	/*
	 * The CS GPIOs have already been
	 * initialized from the descriptor lookup.
	 */
	if (spi_gpio->cs_gpios) {
		cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
		if (!spi->controller_state && cs) {
			ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
			if (ret)
				return ret;
		}
	}

	return spi_bitbang_setup(spi);
}

static int spi_gpio_set_direction(struct spi_device *spi, bool output)
{
	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
	int ret;

	if (output)
		return gpiod_direction_output(spi_gpio->mosi, 1);

	/*
	 * Only change MOSI to an input if using 3WIRE mode.
	 * Otherwise, MOSI could be left floating if there is
	 * no pull resistor connected to the I/O pin, or could
	 * be left logic high if there is a pull-up. Transmitting
	 * logic high when only clocking MISO data in can put some
	 * SPI devices in to a bad state.
	 */
	if (spi->mode & SPI_3WIRE) {
		ret = gpiod_direction_input(spi_gpio->mosi);
		if (ret)
			return ret;
	}
	/*
	 * Send a turnaround high impedance cycle when switching
	 * from output to input. Theoretically there should be
	 * a clock delay here, but as has been noted above, the
	 * nsec delay function for bit-banged GPIO is simply
	 * {} because bit-banging just doesn't get fast enough
	 * anyway.
	 */
	if (spi->mode & SPI_3WIRE_HIZ) {
		gpiod_set_value_cansleep(spi_gpio->sck,
					 !(spi->mode & SPI_CPOL));
		gpiod_set_value_cansleep(spi_gpio->sck,
					 !!(spi->mode & SPI_CPOL));
	}
	return 0;
}

static void spi_gpio_cleanup(struct spi_device *spi)
{
	spi_bitbang_cleanup(spi);
}

/*
 * It can be convenient to use this driver with pins that have alternate
 * functions associated with a "native" SPI controller if a driver for that
 * controller is not available, or is missing important functionality.
 *
 * On platforms which can do so, configure MISO with a weak pullup unless
 * there's an external pullup on that signal.  That saves power by avoiding
 * floating signals.  (A weak pulldown would save power too, but many
 * drivers expect to see all-ones data as the no target "response".)
 */
static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
{
	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
	if (IS_ERR(spi_gpio->mosi))
		return PTR_ERR(spi_gpio->mosi);

	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
	if (IS_ERR(spi_gpio->miso))
		return PTR_ERR(spi_gpio->miso);

	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
	return PTR_ERR_OR_ZERO(spi_gpio->sck);
}

static int spi_gpio_probe_pdata(struct platform_device *pdev,
				struct spi_controller *host)
{
	struct device *dev = &pdev->dev;
	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
	struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
	int i;

	if (!pdata)
		return -ENODEV;

	/* It's just one always-selected device, fine to continue */
	if (!pdata->num_chipselect)
		return 0;

	host->num_chipselect = pdata->num_chipselect;
	spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
					  sizeof(*spi_gpio->cs_gpios),
					  GFP_KERNEL);
	if (!spi_gpio->cs_gpios)
		return -ENOMEM;

	for (i = 0; i < host->num_chipselect; i++) {
		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
							     GPIOD_OUT_HIGH);
		if (IS_ERR(spi_gpio->cs_gpios[i]))
			return PTR_ERR(spi_gpio->cs_gpios[i]);
	}

	return 0;
}

static int spi_gpio_probe(struct platform_device *pdev)
{
	int				status;
	struct spi_controller		*host;
	struct spi_gpio			*spi_gpio;
	struct device			*dev = &pdev->dev;
	struct fwnode_handle		*fwnode = dev_fwnode(dev);
	struct spi_bitbang		*bb;

	host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
	if (!host)
		return -ENOMEM;

	if (fwnode) {
		device_set_node(&host->dev, fwnode);
		host->use_gpio_descriptors = true;
	} else {
		status = spi_gpio_probe_pdata(pdev, host);
		if (status)
			return status;
	}

	spi_gpio = spi_controller_get_devdata(host);

	status = spi_gpio_request(dev, spi_gpio);
	if (status)
		return status;

	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
	host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
			  SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
			  SPI_MOSI_IDLE_HIGH;
	if (!spi_gpio->mosi) {
		/* HW configuration without MOSI pin
		 *
		 * No setting SPI_CONTROLLER_NO_RX here - if there is only
		 * a MOSI pin connected the host can still do RX by
		 * changing the direction of the line.
		 */
		host->flags = SPI_CONTROLLER_NO_TX;
	}

	host->bus_num = pdev->id;
	host->setup = spi_gpio_setup;
	host->cleanup = spi_gpio_cleanup;

	bb = &spi_gpio->bitbang;
	bb->ctlr = host;
	/*
	 * There is some additional business, apart from driving the CS GPIO
	 * line, that we need to do on selection. This makes the local
	 * callback for chipselect always get called.
	 */
	host->flags |= SPI_CONTROLLER_GPIO_SS;
	bb->chipselect = spi_gpio_chipselect;
	bb->set_line_direction = spi_gpio_set_direction;
	bb->set_mosi_idle = spi_gpio_set_mosi_idle;

	if (host->flags & SPI_CONTROLLER_NO_TX) {
		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
	} else {
		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
	}
	bb->setup_transfer = spi_bitbang_setup_transfer;

	status = spi_bitbang_init(&spi_gpio->bitbang);
	if (status)
		return status;

	return devm_spi_register_controller(&pdev->dev, host);
}

static const struct of_device_id spi_gpio_dt_ids[] = {
	{ .compatible = "spi-gpio" },
	{}
};
MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);

static struct platform_driver spi_gpio_driver = {
	.driver = {
		.name	= DRIVER_NAME,
		.of_match_table = spi_gpio_dt_ids,
	},
	.probe		= spi_gpio_probe,
};
module_platform_driver(spi_gpio_driver);

MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRIVER_NAME);
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
d29389de	2	/*
20becf43	3	* SPI host driver using generic bitbanged GPIO
d29389de DB	4	*
d29389de DB	5	* Copyright (C) 2006,2008 David Brownell
9b00bc7b	6	* Copyright (C) 2017 Linus Walleij
d29389de	7	*/
04518cd8	8	#include <linux/gpio/consumer.h>
d29389de	9	#include <linux/kernel.h>
04518cd8	10	#include <linux/mod_devicetable.h>
d7614de4	11	#include <linux/module.h>
d29389de	12	#include <linux/platform_device.h>
04518cd8	13	#include <linux/property.h>
d29389de DB	14
	15	#include <linux/spi/spi.h>
	16	#include <linux/spi/spi_bitbang.h>
	17	#include <linux/spi/spi_gpio.h>
	18
d29389de	19	/*
20becf43	20	* This bitbanging SPI host driver should help make systems usable
d29389de DB	21	* when a native hardware SPI engine is not available, perhaps because
	22	* its driver isn't yet working or because the I/O pins it requires
	23	* are used for other purposes.
	24	*
	25	* platform_device->driver_data ... points to spi_gpio
	26	*
	27	* spi->controller_state ... reserved for bitbang framework code
d29389de	28	*
20becf43	29	* spi->controller->dev.driver_data ... points to spi_gpio->bitbang
d29389de DB	30	*/
	31
	32	struct spi_gpio {
	33	struct spi_bitbang bitbang;
9b00bc7b LW	34	struct gpio_desc *sck;
	35	struct gpio_desc *miso;
	36	struct gpio_desc *mosi;
	37	struct gpio_desc **cs_gpios;
d29389de DB	38	};
	39
	40	/----------------------------------------------------------------------/
	41
d29389de DB	42	#define DRIVER_NAME "spi_gpio"
d29389de DB	43
d29389de DB	44	/----------------------------------------------------------------------/
d29389de DB	45
650705cf	46	static inline struct spi_gpio *__pure
161c2dd3	47	spi_to_spi_gpio(const struct spi_device *spi)
d29389de	48	{
2712a7d3	49	struct spi_bitbang *bang;
161c2dd3	50	struct spi_gpio *spi_gpio;
d29389de	51
20becf43	52	bang = spi_controller_get_devdata(spi->controller);
d29389de	53	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
161c2dd3 DM	54	return spi_gpio;
	55	}
	56
9b00bc7b	57	/* These helpers are in turn called by the bitbang inlines */
d29389de DB	58	static inline void setsck(const struct spi_device *spi, int is_on)
d29389de DB	59	{
9b00bc7b LW	60	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
	61
	62	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
d29389de DB	63	}
	64
	65	static inline void setmosi(const struct spi_device *spi, int is_on)
	66	{
9b00bc7b LW	67	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
	68
	69	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
d29389de DB	70	}
	71
	72	static inline int getmiso(const struct spi_device *spi)
	73	{
9b00bc7b	74	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de	75
4b859db2 LB	76	if (spi->mode & SPI_3WIRE)
	77	return !!gpiod_get_value_cansleep(spi_gpio->mosi);
	78	else
	79	return !!gpiod_get_value_cansleep(spi_gpio->miso);
9b00bc7b	80	}
d29389de DB	81
	82	/*
	83	* NOTE: this clocks "as fast as we can". It "should" be a function of the
	84	* requested device clock. Software overhead means we usually have trouble
	85	* reaching even one Mbit/sec (except when we can inline bitops), so for now
	86	* we'll just assume we never need additional per-bit slowdowns.
	87	*/
	88	#define spidelay(nsecs) do {} while (0)
	89
ca632f55	90	#include "spi-bitbang-txrx.h"
d29389de DB	91
	92	/*
	93	* These functions can leverage inline expansion of GPIO calls to shrink
	94	* costs for a txrx bit, often by factors of around ten (by instruction
	95	* count). That is particularly visible for larger word sizes, but helps
	96	* even with default 8-bit words.
	97	*
	98	* REVISIT overheads calling these functions for each word also have
	99	* significant performance costs. Having txrx_bufs() calls that inline
	100	* the txrx_word() logic would help performance, e.g. on larger blocks
	101	* used with flash storage or MMC/SD. There should also be ways to make
	102	* GCC be less stupid about reloading registers inside the I/O loops,
	103	* even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
	104	*/
	105
	106	static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
304d3436	107	unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de	108	{
1847e304 AF	109	if (unlikely(spi->mode & SPI_LSB_FIRST))
	110	return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
	111	else
	112	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
d29389de DB	113	}
	114
	115	static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
304d3436	116	unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de	117	{
1847e304 AF	118	if (unlikely(spi->mode & SPI_LSB_FIRST))
	119	return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
	120	else
	121	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
d29389de DB	122	}
	123
	124	static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
304d3436	125	unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de	126	{
1847e304 AF	127	if (unlikely(spi->mode & SPI_LSB_FIRST))
	128	return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
	129	else
	130	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
d29389de DB	131	}
	132
	133	static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
304d3436	134	unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de	135	{
1847e304 AF	136	if (unlikely(spi->mode & SPI_LSB_FIRST))
	137	return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
	138	else
	139	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
d29389de DB	140	}
d29389de DB	141
3c8e1a84 MS	142	/*
3c8e1a84 MS	143	* These functions do not call setmosi or getmiso if respective flag
c397f09e	144	* (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
3c8e1a84 MS	145	* call when such pin is not present or defined in the controller.
	146	* A separate set of callbacks is defined to get highest possible
	147	* speed in the generic case (when both MISO and MOSI lines are
	148	* available), as optimiser will remove the checks when argument is
	149	* constant.
	150	*/
	151
	152	static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
304d3436	153	unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84	154	{
20becf43	155	flags = spi->controller->flags;
1847e304 AF	156	if (unlikely(spi->mode & SPI_LSB_FIRST))
	157	return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
	158	else
	159	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
3c8e1a84 MS	160	}
	161
	162	static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
304d3436	163	unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84	164	{
20becf43	165	flags = spi->controller->flags;
1847e304 AF	166	if (unlikely(spi->mode & SPI_LSB_FIRST))
	167	return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
	168	else
	169	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
3c8e1a84 MS	170	}
	171
	172	static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
304d3436	173	unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84	174	{
20becf43	175	flags = spi->controller->flags;
1847e304 AF	176	if (unlikely(spi->mode & SPI_LSB_FIRST))
	177	return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
	178	else
	179	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
3c8e1a84 MS	180	}
	181
	182	static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
304d3436	183	unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84	184	{
20becf43	185	flags = spi->controller->flags;
1847e304 AF	186	if (unlikely(spi->mode & SPI_LSB_FIRST))
	187	return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
	188	else
	189	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
3c8e1a84 MS	190	}
3c8e1a84 MS	191
d29389de DB	192	/----------------------------------------------------------------------/
	193
	194	static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
	195	{
161c2dd3	196	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de	197
9b00bc7b	198	/* set initial clock line level */
d29389de	199	if (is_active)
9b00bc7b LW	200	gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
	201
	202	/* Drive chip select line, if we have one */
249e2632	203	if (spi_gpio->cs_gpios) {
9e264f3f	204	struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
d29389de	205
9b00bc7b LW	206	/* SPI chip selects are normally active-low */
9b00bc7b LW	207	gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
bfb9bcdb	208	}
d29389de DB	209	}
d29389de DB	210
927d382c MS	211	static void spi_gpio_set_mosi_idle(struct spi_device *spi)
	212	{
	213	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
	214
	215	gpiod_set_value_cansleep(spi_gpio->mosi,
	216	!!(spi->mode & SPI_MOSI_IDLE_HIGH));
	217	}
	218
d29389de DB	219	static int spi_gpio_setup(struct spi_device *spi)
d29389de DB	220	{
9b00bc7b	221	struct gpio_desc *cs;
161c2dd3	222	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
196bf3e7	223	int ret;
38ab18ca	224
9b00bc7b LW	225	/*
	226	* The CS GPIOs have already been
	227	* initialized from the descriptor lookup.
	228	*/
249e2632	229	if (spi_gpio->cs_gpios) {
9e264f3f	230	cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
196bf3e7 AS	231	if (!spi->controller_state && cs) {
	232	ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
	233	if (ret)
	234	return ret;
	235	}
249e2632	236	}
9b00bc7b	237
196bf3e7	238	return spi_bitbang_setup(spi);
d29389de DB	239	}
d29389de DB	240
4b859db2 LB	241	static int spi_gpio_set_direction(struct spi_device *spi, bool output)
	242	{
	243	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
5132b3d2	244	int ret;
4b859db2 LB	245
	246	if (output)
	247	return gpiod_direction_output(spi_gpio->mosi, 1);
5132b3d2	248
3a6f994f KB	249	/*
	250	* Only change MOSI to an input if using 3WIRE mode.
	251	* Otherwise, MOSI could be left floating if there is
	252	* no pull resistor connected to the I/O pin, or could
	253	* be left logic high if there is a pull-up. Transmitting
	254	* logic high when only clocking MISO data in can put some
	255	* SPI devices in to a bad state.
	256	*/
	257	if (spi->mode & SPI_3WIRE) {
	258	ret = gpiod_direction_input(spi_gpio->mosi);
	259	if (ret)
	260	return ret;
	261	}
5132b3d2 LW	262	/*
	263	* Send a turnaround high impedance cycle when switching
	264	* from output to input. Theoretically there should be
	265	* a clock delay here, but as has been noted above, the
	266	* nsec delay function for bit-banged GPIO is simply
	267	* {} because bit-banging just doesn't get fast enough
	268	* anyway.
	269	*/
	270	if (spi->mode & SPI_3WIRE_HIZ) {
	271	gpiod_set_value_cansleep(spi_gpio->sck,
	272	!(spi->mode & SPI_CPOL));
	273	gpiod_set_value_cansleep(spi_gpio->sck,
	274	!!(spi->mode & SPI_CPOL));
	275	}
	276	return 0;
4b859db2 LB	277	}
4b859db2 LB	278
d29389de DB	279	static void spi_gpio_cleanup(struct spi_device *spi)
d29389de DB	280	{
d29389de DB	281	spi_bitbang_cleanup(spi);
	282	}
	283
9b00bc7b LW	284	/*
	285	* It can be convenient to use this driver with pins that have alternate
	286	* functions associated with a "native" SPI controller if a driver for that
	287	* controller is not available, or is missing important functionality.
	288	*
	289	* On platforms which can do so, configure MISO with a weak pullup unless
	290	* there's an external pullup on that signal. That saves power by avoiding
	291	* floating signals. (A weak pulldown would save power too, but many
20becf43	292	* drivers expect to see all-ones data as the no target "response".)
9b00bc7b	293	*/
5c8283c1	294	static int spi_gpio_request(struct device dev, struct spi_gpio spi_gpio)
d29389de	295	{
9b00bc7b LW	296	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
	297	if (IS_ERR(spi_gpio->mosi))
	298	return PTR_ERR(spi_gpio->mosi);
d29389de	299
9b00bc7b LW	300	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
	301	if (IS_ERR(spi_gpio->miso))
	302	return PTR_ERR(spi_gpio->miso);
d29389de	303
9b00bc7b	304	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
8995673e	305	return PTR_ERR_OR_ZERO(spi_gpio->sck);
d29389de DB	306	}
d29389de DB	307
249e2632	308	static int spi_gpio_probe_pdata(struct platform_device *pdev,
20becf43	309	struct spi_controller *host)
249e2632 AS	310	{
	311	struct device *dev = &pdev->dev;
	312	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
20becf43	313	struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
249e2632	314	int i;
38ab18ca	315
25fac20e	316	if (!pdata)
249e2632	317	return -ENODEV;
c108905a	318
25fac20e AS	319	/* It's just one always-selected device, fine to continue */
	320	if (!pdata->num_chipselect)
	321	return 0;
38ab18ca	322
25fac20e	323	host->num_chipselect = pdata->num_chipselect;
20becf43	324	spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
249e2632 AS	325	sizeof(*spi_gpio->cs_gpios),
	326	GFP_KERNEL);
	327	if (!spi_gpio->cs_gpios)
	328	return -ENOMEM;
38ab18ca	329
20becf43	330	for (i = 0; i < host->num_chipselect; i++) {
249e2632 AS	331	spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
	332	GPIOD_OUT_HIGH);
	333	if (IS_ERR(spi_gpio->cs_gpios[i]))
	334	return PTR_ERR(spi_gpio->cs_gpios[i]);
	335	}
38ab18ca	336
38ab18ca DM	337	return 0;
38ab18ca DM	338	}
38ab18ca	339
fd4a319b	340	static int spi_gpio_probe(struct platform_device *pdev)
d29389de DB	341	{
d29389de DB	342	int status;
20becf43	343	struct spi_controller *host;
d29389de	344	struct spi_gpio *spi_gpio;
96cad6d7	345	struct device *dev = &pdev->dev;
04518cd8	346	struct fwnode_handle *fwnode = dev_fwnode(dev);
15dd0e9e	347	struct spi_bitbang *bb;
d29389de	348
20becf43 YY	349	host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
20becf43 YY	350	if (!host)
9b00bc7b	351	return -ENOMEM;
d29389de	352
04518cd8 AS	353	if (fwnode) {
	354	device_set_node(&host->dev, fwnode);
	355	host->use_gpio_descriptors = true;
	356	} else {
20becf43	357	status = spi_gpio_probe_pdata(pdev, host);
04518cd8 AS	358	if (status)
	359	return status;
	360	}
9b00bc7b	361
20becf43	362	spi_gpio = spi_controller_get_devdata(host);
d29389de	363
5c8283c1	364	status = spi_gpio_request(dev, spi_gpio);
9b00bc7b LW	365	if (status)
	366	return status;
	367
20becf43 YY	368	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
20becf43 YY	369	host->mode_bits = SPI_3WIRE \| SPI_3WIRE_HIZ \| SPI_CPHA \| SPI_CPOL \|
927d382c MS	370	SPI_CS_HIGH \| SPI_LSB_FIRST \| SPI_MOSI_IDLE_LOW \|
927d382c MS	371	SPI_MOSI_IDLE_HIGH;
5c8283c1 AS	372	if (!spi_gpio->mosi) {
	373	/* HW configuration without MOSI pin
	374	*
c397f09e	375	* No setting SPI_CONTROLLER_NO_RX here - if there is only
5c8283c1 AS	376	* a MOSI pin connected the host can still do RX by
	377	* changing the direction of the line.
	378	*/
20becf43	379	host->flags = SPI_CONTROLLER_NO_TX;
5c8283c1 AS	380	}
5c8283c1 AS	381
20becf43 YY	382	host->bus_num = pdev->id;
	383	host->setup = spi_gpio_setup;
	384	host->cleanup = spi_gpio_cleanup;
249e2632	385
15dd0e9e	386	bb = &spi_gpio->bitbang;
22592331	387	bb->ctlr = host;
2922d1cc LW	388	/*
	389	* There is some additional business, apart from driving the CS GPIO
	390	* line, that we need to do on selection. This makes the local
	391	* callback for chipselect always get called.
	392	*/
20becf43	393	host->flags \|= SPI_CONTROLLER_GPIO_SS;
15dd0e9e AS	394	bb->chipselect = spi_gpio_chipselect;
15dd0e9e AS	395	bb->set_line_direction = spi_gpio_set_direction;
927d382c	396	bb->set_mosi_idle = spi_gpio_set_mosi_idle;
3c8e1a84	397
20becf43	398	if (host->flags & SPI_CONTROLLER_NO_TX) {
15dd0e9e AS	399	bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
	400	bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
	401	bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
	402	bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
68cd9dc2 AS	403	} else {
	404	bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
	405	bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
	406	bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
	407	bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
3c8e1a84	408	}
15dd0e9e	409	bb->setup_transfer = spi_bitbang_setup_transfer;
d29389de	410
79567c1a AS	411	status = spi_bitbang_init(&spi_gpio->bitbang);
	412	if (status)
	413	return status;
d29389de	414
20becf43	415	return devm_spi_register_controller(&pdev->dev, host);
d29389de DB	416	}
d29389de DB	417
04518cd8 AS	418	static const struct of_device_id spi_gpio_dt_ids[] = {
	419	{ .compatible = "spi-gpio" },
	420	{}
	421	};
	422	MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
	423
d29389de	424	static struct platform_driver spi_gpio_driver = {
38ab18ca DM	425	.driver = {
38ab18ca DM	426	.name = DRIVER_NAME,
04518cd8	427	.of_match_table = spi_gpio_dt_ids,
38ab18ca	428	},
940ab889	429	.probe = spi_gpio_probe,
d29389de	430	};
940ab889	431	module_platform_driver(spi_gpio_driver);
d29389de	432
20becf43	433	MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
d29389de DB	434	MODULE_AUTHOR("David Brownell");
d29389de DB	435	MODULE_LICENSE("GPL");
c108905a	436	MODULE_ALIAS("platform:" DRIVER_NAME);