Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d29389de | 2 | /* |
ca632f55 | 3 | * SPI master driver using generic bitbanged GPIO |
d29389de DB |
4 | * |
5 | * Copyright (C) 2006,2008 David Brownell | |
9b00bc7b | 6 | * Copyright (C) 2017 Linus Walleij |
d29389de DB |
7 | */ |
8 | #include <linux/kernel.h> | |
d7614de4 | 9 | #include <linux/module.h> |
d29389de | 10 | #include <linux/platform_device.h> |
9b00bc7b | 11 | #include <linux/gpio/consumer.h> |
ecc77773 | 12 | #include <linux/of.h> |
38ab18ca | 13 | #include <linux/of_device.h> |
d29389de DB |
14 | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/spi/spi_bitbang.h> | |
17 | #include <linux/spi/spi_gpio.h> | |
18 | ||
19 | ||
20 | /* | |
21 | * This bitbanging SPI master driver should help make systems usable | |
22 | * when a native hardware SPI engine is not available, perhaps because | |
23 | * its driver isn't yet working or because the I/O pins it requires | |
24 | * are used for other purposes. | |
25 | * | |
26 | * platform_device->driver_data ... points to spi_gpio | |
27 | * | |
28 | * spi->controller_state ... reserved for bitbang framework code | |
d29389de DB |
29 | * |
30 | * spi->master->dev.driver_data ... points to spi_gpio->bitbang | |
31 | */ | |
32 | ||
33 | struct spi_gpio { | |
34 | struct spi_bitbang bitbang; | |
9b00bc7b LW |
35 | struct gpio_desc *sck; |
36 | struct gpio_desc *miso; | |
37 | struct gpio_desc *mosi; | |
38 | struct gpio_desc **cs_gpios; | |
d29389de DB |
39 | }; |
40 | ||
41 | /*----------------------------------------------------------------------*/ | |
42 | ||
43 | /* | |
44 | * Because the overhead of going through four GPIO procedure calls | |
45 | * per transferred bit can make performance a problem, this code | |
46 | * is set up so that you can use it in either of two ways: | |
47 | * | |
48 | * - The slow generic way: set up platform_data to hold the GPIO | |
49 | * numbers used for MISO/MOSI/SCK, and issue procedure calls for | |
50 | * each of them. This driver can handle several such busses. | |
51 | * | |
52 | * - The quicker inlined way: only helps with platform GPIO code | |
53 | * that inlines operations for constant GPIOs. This can give | |
54 | * you tight (fast!) inner loops, but each such bus needs a | |
55 | * new driver. You'll define a new C file, with Makefile and | |
56 | * Kconfig support; the C code can be a total of six lines: | |
57 | * | |
58 | * #define DRIVER_NAME "myboard_spi2" | |
59 | * #define SPI_MISO_GPIO 119 | |
60 | * #define SPI_MOSI_GPIO 120 | |
61 | * #define SPI_SCK_GPIO 121 | |
62 | * #define SPI_N_CHIPSEL 4 | |
ca632f55 | 63 | * #include "spi-gpio.c" |
d29389de DB |
64 | */ |
65 | ||
66 | #ifndef DRIVER_NAME | |
67 | #define DRIVER_NAME "spi_gpio" | |
68 | ||
69 | #define GENERIC_BITBANG /* vs tight inlines */ | |
70 | ||
d29389de DB |
71 | #endif |
72 | ||
73 | /*----------------------------------------------------------------------*/ | |
74 | ||
650705cf | 75 | static inline struct spi_gpio *__pure |
161c2dd3 | 76 | spi_to_spi_gpio(const struct spi_device *spi) |
d29389de DB |
77 | { |
78 | const struct spi_bitbang *bang; | |
161c2dd3 | 79 | struct spi_gpio *spi_gpio; |
d29389de DB |
80 | |
81 | bang = spi_master_get_devdata(spi->master); | |
82 | spi_gpio = container_of(bang, struct spi_gpio, bitbang); | |
161c2dd3 DM |
83 | return spi_gpio; |
84 | } | |
85 | ||
9b00bc7b | 86 | /* These helpers are in turn called by the bitbang inlines */ |
d29389de DB |
87 | static inline void setsck(const struct spi_device *spi, int is_on) |
88 | { | |
9b00bc7b LW |
89 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
90 | ||
91 | gpiod_set_value_cansleep(spi_gpio->sck, is_on); | |
d29389de DB |
92 | } |
93 | ||
94 | static inline void setmosi(const struct spi_device *spi, int is_on) | |
95 | { | |
9b00bc7b LW |
96 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
97 | ||
98 | gpiod_set_value_cansleep(spi_gpio->mosi, is_on); | |
d29389de DB |
99 | } |
100 | ||
101 | static inline int getmiso(const struct spi_device *spi) | |
102 | { | |
9b00bc7b | 103 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 104 | |
4b859db2 LB |
105 | if (spi->mode & SPI_3WIRE) |
106 | return !!gpiod_get_value_cansleep(spi_gpio->mosi); | |
107 | else | |
108 | return !!gpiod_get_value_cansleep(spi_gpio->miso); | |
9b00bc7b | 109 | } |
d29389de DB |
110 | |
111 | /* | |
112 | * NOTE: this clocks "as fast as we can". It "should" be a function of the | |
113 | * requested device clock. Software overhead means we usually have trouble | |
114 | * reaching even one Mbit/sec (except when we can inline bitops), so for now | |
115 | * we'll just assume we never need additional per-bit slowdowns. | |
116 | */ | |
117 | #define spidelay(nsecs) do {} while (0) | |
118 | ||
ca632f55 | 119 | #include "spi-bitbang-txrx.h" |
d29389de DB |
120 | |
121 | /* | |
122 | * These functions can leverage inline expansion of GPIO calls to shrink | |
123 | * costs for a txrx bit, often by factors of around ten (by instruction | |
124 | * count). That is particularly visible for larger word sizes, but helps | |
125 | * even with default 8-bit words. | |
126 | * | |
127 | * REVISIT overheads calling these functions for each word also have | |
128 | * significant performance costs. Having txrx_bufs() calls that inline | |
129 | * the txrx_word() logic would help performance, e.g. on larger blocks | |
130 | * used with flash storage or MMC/SD. There should also be ways to make | |
131 | * GCC be less stupid about reloading registers inside the I/O loops, | |
132 | * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? | |
133 | */ | |
134 | ||
135 | static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 136 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 137 | { |
1847e304 AF |
138 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
139 | return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); | |
140 | else | |
141 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); | |
d29389de DB |
142 | } |
143 | ||
144 | static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 145 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 146 | { |
1847e304 AF |
147 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
148 | return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); | |
149 | else | |
150 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); | |
d29389de DB |
151 | } |
152 | ||
153 | static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 154 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 155 | { |
1847e304 AF |
156 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
157 | return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); | |
158 | else | |
159 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); | |
d29389de DB |
160 | } |
161 | ||
162 | static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 163 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 164 | { |
1847e304 AF |
165 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
166 | return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); | |
167 | else | |
168 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); | |
d29389de DB |
169 | } |
170 | ||
3c8e1a84 MS |
171 | /* |
172 | * These functions do not call setmosi or getmiso if respective flag | |
173 | * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to | |
174 | * call when such pin is not present or defined in the controller. | |
175 | * A separate set of callbacks is defined to get highest possible | |
176 | * speed in the generic case (when both MISO and MOSI lines are | |
177 | * available), as optimiser will remove the checks when argument is | |
178 | * constant. | |
179 | */ | |
180 | ||
181 | static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 182 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 183 | { |
304d3436 | 184 | flags = spi->master->flags; |
1847e304 AF |
185 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
186 | return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); | |
187 | else | |
188 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); | |
3c8e1a84 MS |
189 | } |
190 | ||
191 | static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 192 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 193 | { |
304d3436 | 194 | flags = spi->master->flags; |
1847e304 AF |
195 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
196 | return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); | |
197 | else | |
198 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); | |
3c8e1a84 MS |
199 | } |
200 | ||
201 | static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 202 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 203 | { |
304d3436 | 204 | flags = spi->master->flags; |
1847e304 AF |
205 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
206 | return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); | |
207 | else | |
208 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); | |
3c8e1a84 MS |
209 | } |
210 | ||
211 | static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 212 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 213 | { |
304d3436 | 214 | flags = spi->master->flags; |
1847e304 AF |
215 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
216 | return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); | |
217 | else | |
218 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); | |
3c8e1a84 MS |
219 | } |
220 | ||
d29389de DB |
221 | /*----------------------------------------------------------------------*/ |
222 | ||
223 | static void spi_gpio_chipselect(struct spi_device *spi, int is_active) | |
224 | { | |
161c2dd3 | 225 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 226 | |
9b00bc7b | 227 | /* set initial clock line level */ |
d29389de | 228 | if (is_active) |
9b00bc7b LW |
229 | gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); |
230 | ||
231 | /* Drive chip select line, if we have one */ | |
249e2632 | 232 | if (spi_gpio->cs_gpios) { |
9b00bc7b | 233 | struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select]; |
d29389de | 234 | |
9b00bc7b LW |
235 | /* SPI chip selects are normally active-low */ |
236 | gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); | |
bfb9bcdb | 237 | } |
d29389de DB |
238 | } |
239 | ||
240 | static int spi_gpio_setup(struct spi_device *spi) | |
241 | { | |
9b00bc7b | 242 | struct gpio_desc *cs; |
161c2dd3 DM |
243 | int status = 0; |
244 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
38ab18ca | 245 | |
9b00bc7b LW |
246 | /* |
247 | * The CS GPIOs have already been | |
248 | * initialized from the descriptor lookup. | |
249 | */ | |
249e2632 AS |
250 | if (spi_gpio->cs_gpios) { |
251 | cs = spi_gpio->cs_gpios[spi->chip_select]; | |
252 | if (!spi->controller_state && cs) | |
253 | status = gpiod_direction_output(cs, | |
254 | !(spi->mode & SPI_CS_HIGH)); | |
255 | } | |
9b00bc7b LW |
256 | |
257 | if (!status) | |
6b8cc330 | 258 | status = spi_bitbang_setup(spi); |
161c2dd3 | 259 | |
d29389de DB |
260 | return status; |
261 | } | |
262 | ||
4b859db2 LB |
263 | static int spi_gpio_set_direction(struct spi_device *spi, bool output) |
264 | { | |
265 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
5132b3d2 | 266 | int ret; |
4b859db2 LB |
267 | |
268 | if (output) | |
269 | return gpiod_direction_output(spi_gpio->mosi, 1); | |
5132b3d2 | 270 | |
3a6f994f KB |
271 | /* |
272 | * Only change MOSI to an input if using 3WIRE mode. | |
273 | * Otherwise, MOSI could be left floating if there is | |
274 | * no pull resistor connected to the I/O pin, or could | |
275 | * be left logic high if there is a pull-up. Transmitting | |
276 | * logic high when only clocking MISO data in can put some | |
277 | * SPI devices in to a bad state. | |
278 | */ | |
279 | if (spi->mode & SPI_3WIRE) { | |
280 | ret = gpiod_direction_input(spi_gpio->mosi); | |
281 | if (ret) | |
282 | return ret; | |
283 | } | |
5132b3d2 LW |
284 | /* |
285 | * Send a turnaround high impedance cycle when switching | |
286 | * from output to input. Theoretically there should be | |
287 | * a clock delay here, but as has been noted above, the | |
288 | * nsec delay function for bit-banged GPIO is simply | |
289 | * {} because bit-banging just doesn't get fast enough | |
290 | * anyway. | |
291 | */ | |
292 | if (spi->mode & SPI_3WIRE_HIZ) { | |
293 | gpiod_set_value_cansleep(spi_gpio->sck, | |
294 | !(spi->mode & SPI_CPOL)); | |
295 | gpiod_set_value_cansleep(spi_gpio->sck, | |
296 | !!(spi->mode & SPI_CPOL)); | |
297 | } | |
298 | return 0; | |
4b859db2 LB |
299 | } |
300 | ||
d29389de DB |
301 | static void spi_gpio_cleanup(struct spi_device *spi) |
302 | { | |
d29389de DB |
303 | spi_bitbang_cleanup(spi); |
304 | } | |
305 | ||
9b00bc7b LW |
306 | /* |
307 | * It can be convenient to use this driver with pins that have alternate | |
308 | * functions associated with a "native" SPI controller if a driver for that | |
309 | * controller is not available, or is missing important functionality. | |
310 | * | |
311 | * On platforms which can do so, configure MISO with a weak pullup unless | |
312 | * there's an external pullup on that signal. That saves power by avoiding | |
313 | * floating signals. (A weak pulldown would save power too, but many | |
314 | * drivers expect to see all-ones data as the no slave "response".) | |
315 | */ | |
5c8283c1 | 316 | static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) |
d29389de | 317 | { |
9b00bc7b LW |
318 | spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); |
319 | if (IS_ERR(spi_gpio->mosi)) | |
320 | return PTR_ERR(spi_gpio->mosi); | |
d29389de | 321 | |
9b00bc7b LW |
322 | spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); |
323 | if (IS_ERR(spi_gpio->miso)) | |
324 | return PTR_ERR(spi_gpio->miso); | |
d29389de | 325 | |
9b00bc7b | 326 | spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); |
8995673e | 327 | return PTR_ERR_OR_ZERO(spi_gpio->sck); |
d29389de DB |
328 | } |
329 | ||
38ab18ca | 330 | #ifdef CONFIG_OF |
d9e15281 | 331 | static const struct of_device_id spi_gpio_dt_ids[] = { |
38ab18ca DM |
332 | { .compatible = "spi-gpio" }, |
333 | {} | |
334 | }; | |
335 | MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); | |
336 | ||
249e2632 AS |
337 | static int spi_gpio_probe_dt(struct platform_device *pdev, |
338 | struct spi_master *master) | |
38ab18ca | 339 | { |
249e2632 AS |
340 | master->dev.of_node = pdev->dev.of_node; |
341 | master->use_gpio_descriptors = true; | |
38ab18ca | 342 | |
249e2632 AS |
343 | return 0; |
344 | } | |
345 | #else | |
346 | static inline int spi_gpio_probe_dt(struct platform_device *pdev, | |
347 | struct spi_master *master) | |
348 | { | |
349 | return 0; | |
350 | } | |
351 | #endif | |
38ab18ca | 352 | |
249e2632 AS |
353 | static int spi_gpio_probe_pdata(struct platform_device *pdev, |
354 | struct spi_master *master) | |
355 | { | |
356 | struct device *dev = &pdev->dev; | |
357 | struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); | |
358 | struct spi_gpio *spi_gpio = spi_master_get_devdata(master); | |
359 | int i; | |
38ab18ca | 360 | |
249e2632 AS |
361 | #ifdef GENERIC_BITBANG |
362 | if (!pdata || !pdata->num_chipselect) | |
363 | return -ENODEV; | |
364 | #endif | |
365 | /* | |
366 | * The master needs to think there is a chipselect even if not | |
367 | * connected | |
368 | */ | |
369 | master->num_chipselect = pdata->num_chipselect ?: 1; | |
38ab18ca | 370 | |
249e2632 AS |
371 | spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect, |
372 | sizeof(*spi_gpio->cs_gpios), | |
373 | GFP_KERNEL); | |
374 | if (!spi_gpio->cs_gpios) | |
375 | return -ENOMEM; | |
38ab18ca | 376 | |
249e2632 AS |
377 | for (i = 0; i < master->num_chipselect; i++) { |
378 | spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, | |
379 | GPIOD_OUT_HIGH); | |
380 | if (IS_ERR(spi_gpio->cs_gpios[i])) | |
381 | return PTR_ERR(spi_gpio->cs_gpios[i]); | |
382 | } | |
38ab18ca | 383 | |
38ab18ca DM |
384 | return 0; |
385 | } | |
38ab18ca | 386 | |
fd4a319b | 387 | static int spi_gpio_probe(struct platform_device *pdev) |
d29389de DB |
388 | { |
389 | int status; | |
390 | struct spi_master *master; | |
391 | struct spi_gpio *spi_gpio; | |
96cad6d7 | 392 | struct device *dev = &pdev->dev; |
15dd0e9e | 393 | struct spi_bitbang *bb; |
d29389de | 394 | |
7174dc65 | 395 | master = devm_spi_alloc_master(dev, sizeof(*spi_gpio)); |
9b00bc7b LW |
396 | if (!master) |
397 | return -ENOMEM; | |
d29389de | 398 | |
62217f8b | 399 | if (pdev->dev.of_node) |
249e2632 AS |
400 | status = spi_gpio_probe_dt(pdev, master); |
401 | else | |
402 | status = spi_gpio_probe_pdata(pdev, master); | |
9b00bc7b | 403 | |
249e2632 AS |
404 | if (status) |
405 | return status; | |
9b00bc7b | 406 | |
249e2632 | 407 | spi_gpio = spi_master_get_devdata(master); |
d29389de | 408 | |
5c8283c1 | 409 | status = spi_gpio_request(dev, spi_gpio); |
9b00bc7b LW |
410 | if (status) |
411 | return status; | |
412 | ||
24778be2 | 413 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); |
b89fefda | 414 | master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | |
1847e304 | 415 | SPI_CS_HIGH | SPI_LSB_FIRST; |
5c8283c1 AS |
416 | if (!spi_gpio->mosi) { |
417 | /* HW configuration without MOSI pin | |
418 | * | |
419 | * No setting SPI_MASTER_NO_RX here - if there is only | |
420 | * a MOSI pin connected the host can still do RX by | |
421 | * changing the direction of the line. | |
422 | */ | |
423 | master->flags = SPI_MASTER_NO_TX; | |
424 | } | |
425 | ||
d29389de | 426 | master->bus_num = pdev->id; |
d29389de DB |
427 | master->setup = spi_gpio_setup; |
428 | master->cleanup = spi_gpio_cleanup; | |
249e2632 | 429 | |
15dd0e9e AS |
430 | bb = &spi_gpio->bitbang; |
431 | bb->master = master; | |
2922d1cc LW |
432 | /* |
433 | * There is some additional business, apart from driving the CS GPIO | |
434 | * line, that we need to do on selection. This makes the local | |
435 | * callback for chipselect always get called. | |
436 | */ | |
437 | master->flags |= SPI_MASTER_GPIO_SS; | |
15dd0e9e AS |
438 | bb->chipselect = spi_gpio_chipselect; |
439 | bb->set_line_direction = spi_gpio_set_direction; | |
3c8e1a84 | 440 | |
5c8283c1 | 441 | if (master->flags & SPI_MASTER_NO_TX) { |
15dd0e9e AS |
442 | bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; |
443 | bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; | |
444 | bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; | |
445 | bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; | |
68cd9dc2 AS |
446 | } else { |
447 | bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; | |
448 | bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; | |
449 | bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; | |
450 | bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; | |
3c8e1a84 | 451 | } |
15dd0e9e | 452 | bb->setup_transfer = spi_bitbang_setup_transfer; |
d29389de | 453 | |
79567c1a AS |
454 | status = spi_bitbang_init(&spi_gpio->bitbang); |
455 | if (status) | |
456 | return status; | |
d29389de | 457 | |
7174dc65 | 458 | return devm_spi_register_master(&pdev->dev, master); |
d29389de DB |
459 | } |
460 | ||
461 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
462 | ||
463 | static struct platform_driver spi_gpio_driver = { | |
38ab18ca DM |
464 | .driver = { |
465 | .name = DRIVER_NAME, | |
38ab18ca DM |
466 | .of_match_table = of_match_ptr(spi_gpio_dt_ids), |
467 | }, | |
940ab889 | 468 | .probe = spi_gpio_probe, |
d29389de | 469 | }; |
940ab889 | 470 | module_platform_driver(spi_gpio_driver); |
d29389de DB |
471 | |
472 | MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); | |
473 | MODULE_AUTHOR("David Brownell"); | |
474 | MODULE_LICENSE("GPL"); |