Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d29389de | 2 | /* |
20becf43 | 3 | * SPI host driver using generic bitbanged GPIO |
d29389de DB |
4 | * |
5 | * Copyright (C) 2006,2008 David Brownell | |
9b00bc7b | 6 | * Copyright (C) 2017 Linus Walleij |
d29389de DB |
7 | */ |
8 | #include <linux/kernel.h> | |
d7614de4 | 9 | #include <linux/module.h> |
d29389de | 10 | #include <linux/platform_device.h> |
9b00bc7b | 11 | #include <linux/gpio/consumer.h> |
ecc77773 | 12 | #include <linux/of.h> |
d29389de DB |
13 | |
14 | #include <linux/spi/spi.h> | |
15 | #include <linux/spi/spi_bitbang.h> | |
16 | #include <linux/spi/spi_gpio.h> | |
17 | ||
18 | ||
19 | /* | |
20becf43 | 20 | * This bitbanging SPI host driver should help make systems usable |
d29389de DB |
21 | * when a native hardware SPI engine is not available, perhaps because |
22 | * its driver isn't yet working or because the I/O pins it requires | |
23 | * are used for other purposes. | |
24 | * | |
25 | * platform_device->driver_data ... points to spi_gpio | |
26 | * | |
27 | * spi->controller_state ... reserved for bitbang framework code | |
d29389de | 28 | * |
20becf43 | 29 | * spi->controller->dev.driver_data ... points to spi_gpio->bitbang |
d29389de DB |
30 | */ |
31 | ||
32 | struct spi_gpio { | |
33 | struct spi_bitbang bitbang; | |
9b00bc7b LW |
34 | struct gpio_desc *sck; |
35 | struct gpio_desc *miso; | |
36 | struct gpio_desc *mosi; | |
37 | struct gpio_desc **cs_gpios; | |
d29389de DB |
38 | }; |
39 | ||
40 | /*----------------------------------------------------------------------*/ | |
41 | ||
42 | /* | |
43 | * Because the overhead of going through four GPIO procedure calls | |
44 | * per transferred bit can make performance a problem, this code | |
45 | * is set up so that you can use it in either of two ways: | |
46 | * | |
47 | * - The slow generic way: set up platform_data to hold the GPIO | |
48 | * numbers used for MISO/MOSI/SCK, and issue procedure calls for | |
49 | * each of them. This driver can handle several such busses. | |
50 | * | |
51 | * - The quicker inlined way: only helps with platform GPIO code | |
52 | * that inlines operations for constant GPIOs. This can give | |
53 | * you tight (fast!) inner loops, but each such bus needs a | |
54 | * new driver. You'll define a new C file, with Makefile and | |
55 | * Kconfig support; the C code can be a total of six lines: | |
56 | * | |
57 | * #define DRIVER_NAME "myboard_spi2" | |
58 | * #define SPI_MISO_GPIO 119 | |
59 | * #define SPI_MOSI_GPIO 120 | |
60 | * #define SPI_SCK_GPIO 121 | |
61 | * #define SPI_N_CHIPSEL 4 | |
ca632f55 | 62 | * #include "spi-gpio.c" |
d29389de DB |
63 | */ |
64 | ||
65 | #ifndef DRIVER_NAME | |
66 | #define DRIVER_NAME "spi_gpio" | |
67 | ||
68 | #define GENERIC_BITBANG /* vs tight inlines */ | |
69 | ||
d29389de DB |
70 | #endif |
71 | ||
72 | /*----------------------------------------------------------------------*/ | |
73 | ||
650705cf | 74 | static inline struct spi_gpio *__pure |
161c2dd3 | 75 | spi_to_spi_gpio(const struct spi_device *spi) |
d29389de DB |
76 | { |
77 | const struct spi_bitbang *bang; | |
161c2dd3 | 78 | struct spi_gpio *spi_gpio; |
d29389de | 79 | |
20becf43 | 80 | bang = spi_controller_get_devdata(spi->controller); |
d29389de | 81 | spi_gpio = container_of(bang, struct spi_gpio, bitbang); |
161c2dd3 DM |
82 | return spi_gpio; |
83 | } | |
84 | ||
9b00bc7b | 85 | /* These helpers are in turn called by the bitbang inlines */ |
d29389de DB |
86 | static inline void setsck(const struct spi_device *spi, int is_on) |
87 | { | |
9b00bc7b LW |
88 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
89 | ||
90 | gpiod_set_value_cansleep(spi_gpio->sck, is_on); | |
d29389de DB |
91 | } |
92 | ||
93 | static inline void setmosi(const struct spi_device *spi, int is_on) | |
94 | { | |
9b00bc7b LW |
95 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
96 | ||
97 | gpiod_set_value_cansleep(spi_gpio->mosi, is_on); | |
d29389de DB |
98 | } |
99 | ||
100 | static inline int getmiso(const struct spi_device *spi) | |
101 | { | |
9b00bc7b | 102 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 103 | |
4b859db2 LB |
104 | if (spi->mode & SPI_3WIRE) |
105 | return !!gpiod_get_value_cansleep(spi_gpio->mosi); | |
106 | else | |
107 | return !!gpiod_get_value_cansleep(spi_gpio->miso); | |
9b00bc7b | 108 | } |
d29389de DB |
109 | |
110 | /* | |
111 | * NOTE: this clocks "as fast as we can". It "should" be a function of the | |
112 | * requested device clock. Software overhead means we usually have trouble | |
113 | * reaching even one Mbit/sec (except when we can inline bitops), so for now | |
114 | * we'll just assume we never need additional per-bit slowdowns. | |
115 | */ | |
116 | #define spidelay(nsecs) do {} while (0) | |
117 | ||
ca632f55 | 118 | #include "spi-bitbang-txrx.h" |
d29389de DB |
119 | |
120 | /* | |
121 | * These functions can leverage inline expansion of GPIO calls to shrink | |
122 | * costs for a txrx bit, often by factors of around ten (by instruction | |
123 | * count). That is particularly visible for larger word sizes, but helps | |
124 | * even with default 8-bit words. | |
125 | * | |
126 | * REVISIT overheads calling these functions for each word also have | |
127 | * significant performance costs. Having txrx_bufs() calls that inline | |
128 | * the txrx_word() logic would help performance, e.g. on larger blocks | |
129 | * used with flash storage or MMC/SD. There should also be ways to make | |
130 | * GCC be less stupid about reloading registers inside the I/O loops, | |
131 | * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? | |
132 | */ | |
133 | ||
134 | static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 135 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 136 | { |
1847e304 AF |
137 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
138 | return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); | |
139 | else | |
140 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); | |
d29389de DB |
141 | } |
142 | ||
143 | static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 144 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 145 | { |
1847e304 AF |
146 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
147 | return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); | |
148 | else | |
149 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); | |
d29389de DB |
150 | } |
151 | ||
152 | static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 153 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 154 | { |
1847e304 AF |
155 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
156 | return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); | |
157 | else | |
158 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); | |
d29389de DB |
159 | } |
160 | ||
161 | static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 162 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 163 | { |
1847e304 AF |
164 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
165 | return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); | |
166 | else | |
167 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); | |
d29389de DB |
168 | } |
169 | ||
3c8e1a84 MS |
170 | /* |
171 | * These functions do not call setmosi or getmiso if respective flag | |
c397f09e | 172 | * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to |
3c8e1a84 MS |
173 | * call when such pin is not present or defined in the controller. |
174 | * A separate set of callbacks is defined to get highest possible | |
175 | * speed in the generic case (when both MISO and MOSI lines are | |
176 | * available), as optimiser will remove the checks when argument is | |
177 | * constant. | |
178 | */ | |
179 | ||
180 | static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 181 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 182 | { |
20becf43 | 183 | flags = spi->controller->flags; |
1847e304 AF |
184 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
185 | return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); | |
186 | else | |
187 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); | |
3c8e1a84 MS |
188 | } |
189 | ||
190 | static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 191 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 192 | { |
20becf43 | 193 | flags = spi->controller->flags; |
1847e304 AF |
194 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
195 | return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); | |
196 | else | |
197 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); | |
3c8e1a84 MS |
198 | } |
199 | ||
200 | static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 201 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 202 | { |
20becf43 | 203 | flags = spi->controller->flags; |
1847e304 AF |
204 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
205 | return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); | |
206 | else | |
207 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); | |
3c8e1a84 MS |
208 | } |
209 | ||
210 | static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 211 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 212 | { |
20becf43 | 213 | flags = spi->controller->flags; |
1847e304 AF |
214 | if (unlikely(spi->mode & SPI_LSB_FIRST)) |
215 | return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); | |
216 | else | |
217 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); | |
3c8e1a84 MS |
218 | } |
219 | ||
d29389de DB |
220 | /*----------------------------------------------------------------------*/ |
221 | ||
222 | static void spi_gpio_chipselect(struct spi_device *spi, int is_active) | |
223 | { | |
161c2dd3 | 224 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 225 | |
9b00bc7b | 226 | /* set initial clock line level */ |
d29389de | 227 | if (is_active) |
9b00bc7b LW |
228 | gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); |
229 | ||
230 | /* Drive chip select line, if we have one */ | |
249e2632 | 231 | if (spi_gpio->cs_gpios) { |
9e264f3f | 232 | struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; |
d29389de | 233 | |
9b00bc7b LW |
234 | /* SPI chip selects are normally active-low */ |
235 | gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); | |
bfb9bcdb | 236 | } |
d29389de DB |
237 | } |
238 | ||
239 | static int spi_gpio_setup(struct spi_device *spi) | |
240 | { | |
9b00bc7b | 241 | struct gpio_desc *cs; |
161c2dd3 DM |
242 | int status = 0; |
243 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
38ab18ca | 244 | |
9b00bc7b LW |
245 | /* |
246 | * The CS GPIOs have already been | |
247 | * initialized from the descriptor lookup. | |
248 | */ | |
249e2632 | 249 | if (spi_gpio->cs_gpios) { |
9e264f3f | 250 | cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; |
249e2632 AS |
251 | if (!spi->controller_state && cs) |
252 | status = gpiod_direction_output(cs, | |
253 | !(spi->mode & SPI_CS_HIGH)); | |
254 | } | |
9b00bc7b LW |
255 | |
256 | if (!status) | |
6b8cc330 | 257 | status = spi_bitbang_setup(spi); |
161c2dd3 | 258 | |
d29389de DB |
259 | return status; |
260 | } | |
261 | ||
4b859db2 LB |
262 | static int spi_gpio_set_direction(struct spi_device *spi, bool output) |
263 | { | |
264 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
5132b3d2 | 265 | int ret; |
4b859db2 LB |
266 | |
267 | if (output) | |
268 | return gpiod_direction_output(spi_gpio->mosi, 1); | |
5132b3d2 | 269 | |
3a6f994f KB |
270 | /* |
271 | * Only change MOSI to an input if using 3WIRE mode. | |
272 | * Otherwise, MOSI could be left floating if there is | |
273 | * no pull resistor connected to the I/O pin, or could | |
274 | * be left logic high if there is a pull-up. Transmitting | |
275 | * logic high when only clocking MISO data in can put some | |
276 | * SPI devices in to a bad state. | |
277 | */ | |
278 | if (spi->mode & SPI_3WIRE) { | |
279 | ret = gpiod_direction_input(spi_gpio->mosi); | |
280 | if (ret) | |
281 | return ret; | |
282 | } | |
5132b3d2 LW |
283 | /* |
284 | * Send a turnaround high impedance cycle when switching | |
285 | * from output to input. Theoretically there should be | |
286 | * a clock delay here, but as has been noted above, the | |
287 | * nsec delay function for bit-banged GPIO is simply | |
288 | * {} because bit-banging just doesn't get fast enough | |
289 | * anyway. | |
290 | */ | |
291 | if (spi->mode & SPI_3WIRE_HIZ) { | |
292 | gpiod_set_value_cansleep(spi_gpio->sck, | |
293 | !(spi->mode & SPI_CPOL)); | |
294 | gpiod_set_value_cansleep(spi_gpio->sck, | |
295 | !!(spi->mode & SPI_CPOL)); | |
296 | } | |
297 | return 0; | |
4b859db2 LB |
298 | } |
299 | ||
d29389de DB |
300 | static void spi_gpio_cleanup(struct spi_device *spi) |
301 | { | |
d29389de DB |
302 | spi_bitbang_cleanup(spi); |
303 | } | |
304 | ||
9b00bc7b LW |
305 | /* |
306 | * It can be convenient to use this driver with pins that have alternate | |
307 | * functions associated with a "native" SPI controller if a driver for that | |
308 | * controller is not available, or is missing important functionality. | |
309 | * | |
310 | * On platforms which can do so, configure MISO with a weak pullup unless | |
311 | * there's an external pullup on that signal. That saves power by avoiding | |
312 | * floating signals. (A weak pulldown would save power too, but many | |
20becf43 | 313 | * drivers expect to see all-ones data as the no target "response".) |
9b00bc7b | 314 | */ |
5c8283c1 | 315 | static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) |
d29389de | 316 | { |
9b00bc7b LW |
317 | spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); |
318 | if (IS_ERR(spi_gpio->mosi)) | |
319 | return PTR_ERR(spi_gpio->mosi); | |
d29389de | 320 | |
9b00bc7b LW |
321 | spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); |
322 | if (IS_ERR(spi_gpio->miso)) | |
323 | return PTR_ERR(spi_gpio->miso); | |
d29389de | 324 | |
9b00bc7b | 325 | spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); |
8995673e | 326 | return PTR_ERR_OR_ZERO(spi_gpio->sck); |
d29389de DB |
327 | } |
328 | ||
38ab18ca | 329 | #ifdef CONFIG_OF |
d9e15281 | 330 | static const struct of_device_id spi_gpio_dt_ids[] = { |
38ab18ca DM |
331 | { .compatible = "spi-gpio" }, |
332 | {} | |
333 | }; | |
334 | MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); | |
335 | ||
249e2632 | 336 | static int spi_gpio_probe_dt(struct platform_device *pdev, |
20becf43 | 337 | struct spi_controller *host) |
38ab18ca | 338 | { |
20becf43 YY |
339 | host->dev.of_node = pdev->dev.of_node; |
340 | host->use_gpio_descriptors = true; | |
38ab18ca | 341 | |
249e2632 AS |
342 | return 0; |
343 | } | |
344 | #else | |
345 | static inline int spi_gpio_probe_dt(struct platform_device *pdev, | |
20becf43 | 346 | struct spi_controller *host) |
249e2632 AS |
347 | { |
348 | return 0; | |
349 | } | |
350 | #endif | |
38ab18ca | 351 | |
249e2632 | 352 | static int spi_gpio_probe_pdata(struct platform_device *pdev, |
20becf43 | 353 | struct spi_controller *host) |
249e2632 AS |
354 | { |
355 | struct device *dev = &pdev->dev; | |
356 | struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); | |
20becf43 | 357 | struct spi_gpio *spi_gpio = spi_controller_get_devdata(host); |
249e2632 | 358 | int i; |
38ab18ca | 359 | |
249e2632 AS |
360 | #ifdef GENERIC_BITBANG |
361 | if (!pdata || !pdata->num_chipselect) | |
362 | return -ENODEV; | |
363 | #endif | |
364 | /* | |
20becf43 | 365 | * The host needs to think there is a chipselect even if not |
249e2632 AS |
366 | * connected |
367 | */ | |
20becf43 | 368 | host->num_chipselect = pdata->num_chipselect ?: 1; |
38ab18ca | 369 | |
20becf43 | 370 | spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect, |
249e2632 AS |
371 | sizeof(*spi_gpio->cs_gpios), |
372 | GFP_KERNEL); | |
373 | if (!spi_gpio->cs_gpios) | |
374 | return -ENOMEM; | |
38ab18ca | 375 | |
20becf43 | 376 | for (i = 0; i < host->num_chipselect; i++) { |
249e2632 AS |
377 | spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, |
378 | GPIOD_OUT_HIGH); | |
379 | if (IS_ERR(spi_gpio->cs_gpios[i])) | |
380 | return PTR_ERR(spi_gpio->cs_gpios[i]); | |
381 | } | |
38ab18ca | 382 | |
38ab18ca DM |
383 | return 0; |
384 | } | |
38ab18ca | 385 | |
fd4a319b | 386 | static int spi_gpio_probe(struct platform_device *pdev) |
d29389de DB |
387 | { |
388 | int status; | |
20becf43 | 389 | struct spi_controller *host; |
d29389de | 390 | struct spi_gpio *spi_gpio; |
96cad6d7 | 391 | struct device *dev = &pdev->dev; |
15dd0e9e | 392 | struct spi_bitbang *bb; |
d29389de | 393 | |
20becf43 YY |
394 | host = devm_spi_alloc_host(dev, sizeof(*spi_gpio)); |
395 | if (!host) | |
9b00bc7b | 396 | return -ENOMEM; |
d29389de | 397 | |
62217f8b | 398 | if (pdev->dev.of_node) |
20becf43 | 399 | status = spi_gpio_probe_dt(pdev, host); |
249e2632 | 400 | else |
20becf43 | 401 | status = spi_gpio_probe_pdata(pdev, host); |
9b00bc7b | 402 | |
249e2632 AS |
403 | if (status) |
404 | return status; | |
9b00bc7b | 405 | |
20becf43 | 406 | spi_gpio = spi_controller_get_devdata(host); |
d29389de | 407 | |
5c8283c1 | 408 | status = spi_gpio_request(dev, spi_gpio); |
9b00bc7b LW |
409 | if (status) |
410 | return status; | |
411 | ||
20becf43 YY |
412 | host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); |
413 | host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | | |
1847e304 | 414 | SPI_CS_HIGH | SPI_LSB_FIRST; |
5c8283c1 AS |
415 | if (!spi_gpio->mosi) { |
416 | /* HW configuration without MOSI pin | |
417 | * | |
c397f09e | 418 | * No setting SPI_CONTROLLER_NO_RX here - if there is only |
5c8283c1 AS |
419 | * a MOSI pin connected the host can still do RX by |
420 | * changing the direction of the line. | |
421 | */ | |
20becf43 | 422 | host->flags = SPI_CONTROLLER_NO_TX; |
5c8283c1 AS |
423 | } |
424 | ||
20becf43 YY |
425 | host->bus_num = pdev->id; |
426 | host->setup = spi_gpio_setup; | |
427 | host->cleanup = spi_gpio_cleanup; | |
249e2632 | 428 | |
15dd0e9e | 429 | bb = &spi_gpio->bitbang; |
20becf43 | 430 | bb->master = host; |
2922d1cc LW |
431 | /* |
432 | * There is some additional business, apart from driving the CS GPIO | |
433 | * line, that we need to do on selection. This makes the local | |
434 | * callback for chipselect always get called. | |
435 | */ | |
20becf43 | 436 | host->flags |= SPI_CONTROLLER_GPIO_SS; |
15dd0e9e AS |
437 | bb->chipselect = spi_gpio_chipselect; |
438 | bb->set_line_direction = spi_gpio_set_direction; | |
3c8e1a84 | 439 | |
20becf43 | 440 | if (host->flags & SPI_CONTROLLER_NO_TX) { |
15dd0e9e AS |
441 | bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; |
442 | bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; | |
443 | bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; | |
444 | bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; | |
68cd9dc2 AS |
445 | } else { |
446 | bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; | |
447 | bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; | |
448 | bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; | |
449 | bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; | |
3c8e1a84 | 450 | } |
15dd0e9e | 451 | bb->setup_transfer = spi_bitbang_setup_transfer; |
d29389de | 452 | |
79567c1a AS |
453 | status = spi_bitbang_init(&spi_gpio->bitbang); |
454 | if (status) | |
455 | return status; | |
d29389de | 456 | |
20becf43 | 457 | return devm_spi_register_controller(&pdev->dev, host); |
d29389de DB |
458 | } |
459 | ||
460 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
461 | ||
462 | static struct platform_driver spi_gpio_driver = { | |
38ab18ca DM |
463 | .driver = { |
464 | .name = DRIVER_NAME, | |
38ab18ca DM |
465 | .of_match_table = of_match_ptr(spi_gpio_dt_ids), |
466 | }, | |
940ab889 | 467 | .probe = spi_gpio_probe, |
d29389de | 468 | }; |
940ab889 | 469 | module_platform_driver(spi_gpio_driver); |
d29389de | 470 | |
20becf43 | 471 | MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO "); |
d29389de DB |
472 | MODULE_AUTHOR("David Brownell"); |
473 | MODULE_LICENSE("GPL"); |