mlx5: Adjust events to use unsigned long param instead of void *
[linux-2.6-block.git] / drivers / spi / spi-gpio.c
CommitLineData
d29389de 1/*
ca632f55 2 * SPI master driver using generic bitbanged GPIO
d29389de
DB
3 *
4 * Copyright (C) 2006,2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include <linux/kernel.h>
d7614de4 21#include <linux/module.h>
d29389de
DB
22#include <linux/platform_device.h>
23#include <linux/gpio.h>
ecc77773 24#include <linux/of.h>
38ab18ca
DM
25#include <linux/of_device.h>
26#include <linux/of_gpio.h>
d29389de
DB
27
28#include <linux/spi/spi.h>
29#include <linux/spi/spi_bitbang.h>
30#include <linux/spi/spi_gpio.h>
31
32
33/*
34 * This bitbanging SPI master driver should help make systems usable
35 * when a native hardware SPI engine is not available, perhaps because
36 * its driver isn't yet working or because the I/O pins it requires
37 * are used for other purposes.
38 *
39 * platform_device->driver_data ... points to spi_gpio
40 *
41 * spi->controller_state ... reserved for bitbang framework code
42 * spi->controller_data ... holds chipselect GPIO
43 *
44 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
45 */
46
47struct spi_gpio {
48 struct spi_bitbang bitbang;
49 struct spi_gpio_platform_data pdata;
50 struct platform_device *pdev;
161c2dd3 51 int cs_gpios[0];
d29389de
DB
52};
53
54/*----------------------------------------------------------------------*/
55
56/*
57 * Because the overhead of going through four GPIO procedure calls
58 * per transferred bit can make performance a problem, this code
59 * is set up so that you can use it in either of two ways:
60 *
61 * - The slow generic way: set up platform_data to hold the GPIO
62 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
63 * each of them. This driver can handle several such busses.
64 *
65 * - The quicker inlined way: only helps with platform GPIO code
66 * that inlines operations for constant GPIOs. This can give
67 * you tight (fast!) inner loops, but each such bus needs a
68 * new driver. You'll define a new C file, with Makefile and
69 * Kconfig support; the C code can be a total of six lines:
70 *
71 * #define DRIVER_NAME "myboard_spi2"
72 * #define SPI_MISO_GPIO 119
73 * #define SPI_MOSI_GPIO 120
74 * #define SPI_SCK_GPIO 121
75 * #define SPI_N_CHIPSEL 4
ca632f55 76 * #include "spi-gpio.c"
d29389de
DB
77 */
78
79#ifndef DRIVER_NAME
80#define DRIVER_NAME "spi_gpio"
81
82#define GENERIC_BITBANG /* vs tight inlines */
83
84/* all functions referencing these symbols must define pdata */
85#define SPI_MISO_GPIO ((pdata)->miso)
86#define SPI_MOSI_GPIO ((pdata)->mosi)
87#define SPI_SCK_GPIO ((pdata)->sck)
88
89#define SPI_N_CHIPSEL ((pdata)->num_chipselect)
90
91#endif
92
93/*----------------------------------------------------------------------*/
94
161c2dd3
DM
95static inline struct spi_gpio * __pure
96spi_to_spi_gpio(const struct spi_device *spi)
d29389de
DB
97{
98 const struct spi_bitbang *bang;
161c2dd3 99 struct spi_gpio *spi_gpio;
d29389de
DB
100
101 bang = spi_master_get_devdata(spi->master);
102 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
161c2dd3
DM
103 return spi_gpio;
104}
105
106static inline struct spi_gpio_platform_data * __pure
107spi_to_pdata(const struct spi_device *spi)
108{
109 return &spi_to_spi_gpio(spi)->pdata;
d29389de
DB
110}
111
112/* this is #defined to avoid unused-variable warnings when inlining */
113#define pdata spi_to_pdata(spi)
114
115static inline void setsck(const struct spi_device *spi, int is_on)
116{
d9dda5a1 117 gpio_set_value_cansleep(SPI_SCK_GPIO, is_on);
d29389de
DB
118}
119
120static inline void setmosi(const struct spi_device *spi, int is_on)
121{
d9dda5a1 122 gpio_set_value_cansleep(SPI_MOSI_GPIO, is_on);
d29389de
DB
123}
124
125static inline int getmiso(const struct spi_device *spi)
126{
d9dda5a1 127 return !!gpio_get_value_cansleep(SPI_MISO_GPIO);
d29389de
DB
128}
129
130#undef pdata
131
132/*
133 * NOTE: this clocks "as fast as we can". It "should" be a function of the
134 * requested device clock. Software overhead means we usually have trouble
135 * reaching even one Mbit/sec (except when we can inline bitops), so for now
136 * we'll just assume we never need additional per-bit slowdowns.
137 */
138#define spidelay(nsecs) do {} while (0)
139
ca632f55 140#include "spi-bitbang-txrx.h"
d29389de
DB
141
142/*
143 * These functions can leverage inline expansion of GPIO calls to shrink
144 * costs for a txrx bit, often by factors of around ten (by instruction
145 * count). That is particularly visible for larger word sizes, but helps
146 * even with default 8-bit words.
147 *
148 * REVISIT overheads calling these functions for each word also have
149 * significant performance costs. Having txrx_bufs() calls that inline
150 * the txrx_word() logic would help performance, e.g. on larger blocks
151 * used with flash storage or MMC/SD. There should also be ways to make
152 * GCC be less stupid about reloading registers inside the I/O loops,
153 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
154 */
155
156static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
157 unsigned nsecs, u32 word, u8 bits)
158{
04bb2a03 159 return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
d29389de
DB
160}
161
162static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
163 unsigned nsecs, u32 word, u8 bits)
164{
04bb2a03 165 return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
d29389de
DB
166}
167
168static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
169 unsigned nsecs, u32 word, u8 bits)
170{
04bb2a03 171 return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
d29389de
DB
172}
173
174static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
175 unsigned nsecs, u32 word, u8 bits)
176{
04bb2a03 177 return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
d29389de
DB
178}
179
3c8e1a84
MS
180/*
181 * These functions do not call setmosi or getmiso if respective flag
182 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
183 * call when such pin is not present or defined in the controller.
184 * A separate set of callbacks is defined to get highest possible
185 * speed in the generic case (when both MISO and MOSI lines are
186 * available), as optimiser will remove the checks when argument is
187 * constant.
188 */
189
190static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
191 unsigned nsecs, u32 word, u8 bits)
192{
193 unsigned flags = spi->master->flags;
194 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
195}
196
197static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
198 unsigned nsecs, u32 word, u8 bits)
199{
200 unsigned flags = spi->master->flags;
201 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
202}
203
204static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
205 unsigned nsecs, u32 word, u8 bits)
206{
207 unsigned flags = spi->master->flags;
208 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
209}
210
211static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
212 unsigned nsecs, u32 word, u8 bits)
213{
214 unsigned flags = spi->master->flags;
215 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
216}
217
d29389de
DB
218/*----------------------------------------------------------------------*/
219
220static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
221{
161c2dd3
DM
222 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
223 unsigned int cs = spi_gpio->cs_gpios[spi->chip_select];
d29389de
DB
224
225 /* set initial clock polarity */
226 if (is_active)
227 setsck(spi, spi->mode & SPI_CPOL);
228
bfb9bcdb
MB
229 if (cs != SPI_GPIO_NO_CHIPSELECT) {
230 /* SPI is normally active-low */
d9dda5a1 231 gpio_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
bfb9bcdb 232 }
d29389de
DB
233}
234
235static int spi_gpio_setup(struct spi_device *spi)
236{
38ab18ca 237 unsigned int cs;
161c2dd3
DM
238 int status = 0;
239 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
38ab18ca 240 struct device_node *np = spi->master->dev.of_node;
d29389de 241
38ab18ca
DM
242 if (np) {
243 /*
244 * In DT environments, the CS GPIOs have already been
245 * initialized from the "cs-gpios" property of the node.
246 */
247 cs = spi_gpio->cs_gpios[spi->chip_select];
248 } else {
249 /*
250 * ... otherwise, take it from spi->controller_data
251 */
e1bde3b1 252 cs = (unsigned int)(uintptr_t) spi->controller_data;
38ab18ca
DM
253 }
254
d29389de 255 if (!spi->controller_state) {
bfb9bcdb
MB
256 if (cs != SPI_GPIO_NO_CHIPSELECT) {
257 status = gpio_request(cs, dev_name(&spi->dev));
258 if (status)
259 return status;
05644147
UKK
260 status = gpio_direction_output(cs,
261 !(spi->mode & SPI_CS_HIGH));
bfb9bcdb 262 }
d29389de 263 }
161c2dd3 264 if (!status) {
38ab18ca 265 /* in case it was initialized from static board data */
161c2dd3 266 spi_gpio->cs_gpios[spi->chip_select] = cs;
6b8cc330 267 status = spi_bitbang_setup(spi);
161c2dd3
DM
268 }
269
d29389de 270 if (status) {
bfb9bcdb 271 if (!spi->controller_state && cs != SPI_GPIO_NO_CHIPSELECT)
d29389de
DB
272 gpio_free(cs);
273 }
274 return status;
275}
276
277static void spi_gpio_cleanup(struct spi_device *spi)
278{
161c2dd3
DM
279 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
280 unsigned int cs = spi_gpio->cs_gpios[spi->chip_select];
d29389de 281
bfb9bcdb
MB
282 if (cs != SPI_GPIO_NO_CHIPSELECT)
283 gpio_free(cs);
d29389de
DB
284 spi_bitbang_cleanup(spi);
285}
286
fd4a319b 287static int spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
d29389de
DB
288{
289 int value;
290
291 value = gpio_request(pin, label);
292 if (value == 0) {
293 if (is_in)
294 value = gpio_direction_input(pin);
295 else
296 value = gpio_direction_output(pin, 0);
297 }
298 return value;
299}
300
fd4a319b
GL
301static int spi_gpio_request(struct spi_gpio_platform_data *pdata,
302 const char *label, u16 *res_flags)
d29389de
DB
303{
304 int value;
305
306 /* NOTE: SPI_*_GPIO symbols may reference "pdata" */
307
3c8e1a84
MS
308 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) {
309 value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
310 if (value)
311 goto done;
312 } else {
313 /* HW configuration without MOSI pin */
314 *res_flags |= SPI_MASTER_NO_TX;
315 }
d29389de 316
3c8e1a84
MS
317 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) {
318 value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
319 if (value)
320 goto free_mosi;
321 } else {
322 /* HW configuration without MISO pin */
323 *res_flags |= SPI_MASTER_NO_RX;
324 }
d29389de
DB
325
326 value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
327 if (value)
328 goto free_miso;
329
330 goto done;
331
332free_miso:
3c8e1a84
MS
333 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
334 gpio_free(SPI_MISO_GPIO);
d29389de 335free_mosi:
3c8e1a84
MS
336 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
337 gpio_free(SPI_MOSI_GPIO);
d29389de
DB
338done:
339 return value;
340}
341
38ab18ca 342#ifdef CONFIG_OF
d9e15281 343static const struct of_device_id spi_gpio_dt_ids[] = {
38ab18ca
DM
344 { .compatible = "spi-gpio" },
345 {}
346};
347MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
348
349static int spi_gpio_probe_dt(struct platform_device *pdev)
350{
351 int ret;
352 u32 tmp;
353 struct spi_gpio_platform_data *pdata;
354 struct device_node *np = pdev->dev.of_node;
355 const struct of_device_id *of_id =
356 of_match_device(spi_gpio_dt_ids, &pdev->dev);
357
358 if (!of_id)
359 return 0;
360
361 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
362 if (!pdata)
363 return -ENOMEM;
364
0202a32d
MR
365 ret = of_get_named_gpio(np, "gpio-sck", 0);
366 if (ret < 0) {
367 dev_err(&pdev->dev, "gpio-sck property not found\n");
368 goto error_free;
369 }
370 pdata->sck = ret;
371
372 ret = of_get_named_gpio(np, "gpio-miso", 0);
373 if (ret < 0) {
374 dev_info(&pdev->dev, "gpio-miso property not found, switching to no-rx mode\n");
375 pdata->miso = SPI_GPIO_NO_MISO;
376 } else
377 pdata->miso = ret;
378
379 ret = of_get_named_gpio(np, "gpio-mosi", 0);
380 if (ret < 0) {
381 dev_info(&pdev->dev, "gpio-mosi property not found, switching to no-tx mode\n");
382 pdata->mosi = SPI_GPIO_NO_MOSI;
383 } else
384 pdata->mosi = ret;
38ab18ca
DM
385
386 ret = of_property_read_u32(np, "num-chipselects", &tmp);
387 if (ret < 0) {
388 dev_err(&pdev->dev, "num-chipselects property not found\n");
389 goto error_free;
390 }
391
392 pdata->num_chipselect = tmp;
393 pdev->dev.platform_data = pdata;
394
395 return 1;
396
397error_free:
398 devm_kfree(&pdev->dev, pdata);
399 return ret;
400}
401#else
ac2cb30b 402static inline int spi_gpio_probe_dt(struct platform_device *pdev)
38ab18ca
DM
403{
404 return 0;
405}
406#endif
407
fd4a319b 408static int spi_gpio_probe(struct platform_device *pdev)
d29389de
DB
409{
410 int status;
411 struct spi_master *master;
412 struct spi_gpio *spi_gpio;
413 struct spi_gpio_platform_data *pdata;
3c8e1a84 414 u16 master_flags = 0;
38ab18ca
DM
415 bool use_of = 0;
416
417 status = spi_gpio_probe_dt(pdev);
418 if (status < 0)
419 return status;
420 if (status > 0)
421 use_of = 1;
d29389de 422
8074cf06 423 pdata = dev_get_platdata(&pdev->dev);
d29389de
DB
424#ifdef GENERIC_BITBANG
425 if (!pdata || !pdata->num_chipselect)
426 return -ENODEV;
427#endif
428
3c8e1a84 429 status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
d29389de
DB
430 if (status < 0)
431 return status;
432
161c2dd3
DM
433 master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio) +
434 (sizeof(int) * SPI_N_CHIPSEL));
d29389de
DB
435 if (!master) {
436 status = -ENOMEM;
437 goto gpio_free;
438 }
439 spi_gpio = spi_master_get_devdata(master);
440 platform_set_drvdata(pdev, spi_gpio);
441
442 spi_gpio->pdev = pdev;
443 if (pdata)
444 spi_gpio->pdata = *pdata;
445
24778be2 446 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
3c8e1a84 447 master->flags = master_flags;
d29389de
DB
448 master->bus_num = pdev->id;
449 master->num_chipselect = SPI_N_CHIPSEL;
450 master->setup = spi_gpio_setup;
451 master->cleanup = spi_gpio_cleanup;
38ab18ca
DM
452#ifdef CONFIG_OF
453 master->dev.of_node = pdev->dev.of_node;
454
455 if (use_of) {
456 int i;
457 struct device_node *np = pdev->dev.of_node;
458
459 /*
460 * In DT environments, take the CS GPIO from the "cs-gpios"
461 * property of the node.
462 */
463
464 for (i = 0; i < SPI_N_CHIPSEL; i++)
465 spi_gpio->cs_gpios[i] =
466 of_get_named_gpio(np, "cs-gpios", i);
467 }
468#endif
d29389de 469
94c69f76 470 spi_gpio->bitbang.master = master;
d29389de 471 spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
3c8e1a84 472
23699f98 473 if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
3c8e1a84
MS
474 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
475 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
476 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
477 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
478 } else {
479 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
480 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
481 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
482 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
483 }
d29389de
DB
484 spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
485 spi_gpio->bitbang.flags = SPI_CS_HIGH;
486
487 status = spi_bitbang_start(&spi_gpio->bitbang);
488 if (status < 0) {
d29389de 489gpio_free:
3c8e1a84
MS
490 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
491 gpio_free(SPI_MISO_GPIO);
492 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
493 gpio_free(SPI_MOSI_GPIO);
d29389de
DB
494 gpio_free(SPI_SCK_GPIO);
495 spi_master_put(master);
496 }
497
498 return status;
499}
500
fd4a319b 501static int spi_gpio_remove(struct platform_device *pdev)
d29389de
DB
502{
503 struct spi_gpio *spi_gpio;
504 struct spi_gpio_platform_data *pdata;
d29389de
DB
505
506 spi_gpio = platform_get_drvdata(pdev);
8074cf06 507 pdata = dev_get_platdata(&pdev->dev);
d29389de
DB
508
509 /* stop() unregisters child devices too */
d9721ae1 510 spi_bitbang_stop(&spi_gpio->bitbang);
d29389de 511
3c8e1a84
MS
512 if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
513 gpio_free(SPI_MISO_GPIO);
514 if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
515 gpio_free(SPI_MOSI_GPIO);
d29389de 516 gpio_free(SPI_SCK_GPIO);
94c69f76 517 spi_master_put(spi_gpio->bitbang.master);
d29389de 518
d9721ae1 519 return 0;
d29389de
DB
520}
521
522MODULE_ALIAS("platform:" DRIVER_NAME);
523
524static struct platform_driver spi_gpio_driver = {
38ab18ca
DM
525 .driver = {
526 .name = DRIVER_NAME,
527 .owner = THIS_MODULE,
528 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
529 },
940ab889 530 .probe = spi_gpio_probe,
fd4a319b 531 .remove = spi_gpio_remove,
d29389de 532};
940ab889 533module_platform_driver(spi_gpio_driver);
d29389de
DB
534
535MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
536MODULE_AUTHOR("David Brownell");
537MODULE_LICENSE("GPL");