powerpc/mm: Drop the unnecessary region check
[linux-2.6-block.git] / drivers / spi / spi-gpio.c
CommitLineData
d29389de 1/*
ca632f55 2 * SPI master driver using generic bitbanged GPIO
d29389de
DB
3 *
4 * Copyright (C) 2006,2008 David Brownell
9b00bc7b 5 * Copyright (C) 2017 Linus Walleij
d29389de
DB
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
d29389de
DB
16 */
17#include <linux/kernel.h>
d7614de4 18#include <linux/module.h>
d29389de 19#include <linux/platform_device.h>
9b00bc7b 20#include <linux/gpio/consumer.h>
ecc77773 21#include <linux/of.h>
38ab18ca 22#include <linux/of_device.h>
d29389de
DB
23
24#include <linux/spi/spi.h>
25#include <linux/spi/spi_bitbang.h>
26#include <linux/spi/spi_gpio.h>
27
28
29/*
30 * This bitbanging SPI master driver should help make systems usable
31 * when a native hardware SPI engine is not available, perhaps because
32 * its driver isn't yet working or because the I/O pins it requires
33 * are used for other purposes.
34 *
35 * platform_device->driver_data ... points to spi_gpio
36 *
37 * spi->controller_state ... reserved for bitbang framework code
38 * spi->controller_data ... holds chipselect GPIO
39 *
40 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
41 */
42
43struct spi_gpio {
44 struct spi_bitbang bitbang;
45 struct spi_gpio_platform_data pdata;
46 struct platform_device *pdev;
9b00bc7b
LW
47 struct gpio_desc *sck;
48 struct gpio_desc *miso;
49 struct gpio_desc *mosi;
50 struct gpio_desc **cs_gpios;
51 bool has_cs;
d29389de
DB
52};
53
54/*----------------------------------------------------------------------*/
55
56/*
57 * Because the overhead of going through four GPIO procedure calls
58 * per transferred bit can make performance a problem, this code
59 * is set up so that you can use it in either of two ways:
60 *
61 * - The slow generic way: set up platform_data to hold the GPIO
62 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
63 * each of them. This driver can handle several such busses.
64 *
65 * - The quicker inlined way: only helps with platform GPIO code
66 * that inlines operations for constant GPIOs. This can give
67 * you tight (fast!) inner loops, but each such bus needs a
68 * new driver. You'll define a new C file, with Makefile and
69 * Kconfig support; the C code can be a total of six lines:
70 *
71 * #define DRIVER_NAME "myboard_spi2"
72 * #define SPI_MISO_GPIO 119
73 * #define SPI_MOSI_GPIO 120
74 * #define SPI_SCK_GPIO 121
75 * #define SPI_N_CHIPSEL 4
ca632f55 76 * #include "spi-gpio.c"
d29389de
DB
77 */
78
79#ifndef DRIVER_NAME
80#define DRIVER_NAME "spi_gpio"
81
82#define GENERIC_BITBANG /* vs tight inlines */
83
d29389de
DB
84#endif
85
86/*----------------------------------------------------------------------*/
87
650705cf 88static inline struct spi_gpio *__pure
161c2dd3 89spi_to_spi_gpio(const struct spi_device *spi)
d29389de
DB
90{
91 const struct spi_bitbang *bang;
161c2dd3 92 struct spi_gpio *spi_gpio;
d29389de
DB
93
94 bang = spi_master_get_devdata(spi->master);
95 spi_gpio = container_of(bang, struct spi_gpio, bitbang);
161c2dd3
DM
96 return spi_gpio;
97}
98
650705cf 99static inline struct spi_gpio_platform_data *__pure
161c2dd3
DM
100spi_to_pdata(const struct spi_device *spi)
101{
102 return &spi_to_spi_gpio(spi)->pdata;
d29389de
DB
103}
104
9b00bc7b 105/* These helpers are in turn called by the bitbang inlines */
d29389de
DB
106static inline void setsck(const struct spi_device *spi, int is_on)
107{
9b00bc7b
LW
108 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
109
110 gpiod_set_value_cansleep(spi_gpio->sck, is_on);
d29389de
DB
111}
112
113static inline void setmosi(const struct spi_device *spi, int is_on)
114{
9b00bc7b
LW
115 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
116
117 gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
d29389de
DB
118}
119
120static inline int getmiso(const struct spi_device *spi)
121{
9b00bc7b 122 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de 123
4b859db2
LB
124 if (spi->mode & SPI_3WIRE)
125 return !!gpiod_get_value_cansleep(spi_gpio->mosi);
126 else
127 return !!gpiod_get_value_cansleep(spi_gpio->miso);
9b00bc7b 128}
d29389de
DB
129
130/*
131 * NOTE: this clocks "as fast as we can". It "should" be a function of the
132 * requested device clock. Software overhead means we usually have trouble
133 * reaching even one Mbit/sec (except when we can inline bitops), so for now
134 * we'll just assume we never need additional per-bit slowdowns.
135 */
136#define spidelay(nsecs) do {} while (0)
137
ca632f55 138#include "spi-bitbang-txrx.h"
d29389de
DB
139
140/*
141 * These functions can leverage inline expansion of GPIO calls to shrink
142 * costs for a txrx bit, often by factors of around ten (by instruction
143 * count). That is particularly visible for larger word sizes, but helps
144 * even with default 8-bit words.
145 *
146 * REVISIT overheads calling these functions for each word also have
147 * significant performance costs. Having txrx_bufs() calls that inline
148 * the txrx_word() logic would help performance, e.g. on larger blocks
149 * used with flash storage or MMC/SD. There should also be ways to make
150 * GCC be less stupid about reloading registers inside the I/O loops,
151 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
152 */
153
154static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
304d3436 155 unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de 156{
304d3436 157 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
d29389de
DB
158}
159
160static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
304d3436 161 unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de 162{
304d3436 163 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
d29389de
DB
164}
165
166static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
304d3436 167 unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de 168{
304d3436 169 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
d29389de
DB
170}
171
172static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
304d3436 173 unsigned nsecs, u32 word, u8 bits, unsigned flags)
d29389de 174{
304d3436 175 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
d29389de
DB
176}
177
3c8e1a84
MS
178/*
179 * These functions do not call setmosi or getmiso if respective flag
180 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
181 * call when such pin is not present or defined in the controller.
182 * A separate set of callbacks is defined to get highest possible
183 * speed in the generic case (when both MISO and MOSI lines are
184 * available), as optimiser will remove the checks when argument is
185 * constant.
186 */
187
188static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
304d3436 189 unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84 190{
304d3436 191 flags = spi->master->flags;
3c8e1a84
MS
192 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
193}
194
195static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
304d3436 196 unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84 197{
304d3436 198 flags = spi->master->flags;
3c8e1a84
MS
199 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
200}
201
202static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
304d3436 203 unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84 204{
304d3436 205 flags = spi->master->flags;
3c8e1a84
MS
206 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
207}
208
209static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
304d3436 210 unsigned nsecs, u32 word, u8 bits, unsigned flags)
3c8e1a84 211{
304d3436 212 flags = spi->master->flags;
3c8e1a84
MS
213 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
214}
215
d29389de
DB
216/*----------------------------------------------------------------------*/
217
218static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
219{
161c2dd3 220 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
d29389de 221
9b00bc7b 222 /* set initial clock line level */
d29389de 223 if (is_active)
9b00bc7b
LW
224 gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
225
226 /* Drive chip select line, if we have one */
227 if (spi_gpio->has_cs) {
228 struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
d29389de 229
9b00bc7b
LW
230 /* SPI chip selects are normally active-low */
231 gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
bfb9bcdb 232 }
d29389de
DB
233}
234
235static int spi_gpio_setup(struct spi_device *spi)
236{
9b00bc7b 237 struct gpio_desc *cs;
161c2dd3
DM
238 int status = 0;
239 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
38ab18ca 240
9b00bc7b
LW
241 /*
242 * The CS GPIOs have already been
243 * initialized from the descriptor lookup.
244 */
245 cs = spi_gpio->cs_gpios[spi->chip_select];
246 if (!spi->controller_state && cs)
247 status = gpiod_direction_output(cs,
248 !(spi->mode & SPI_CS_HIGH));
249
250 if (!status)
6b8cc330 251 status = spi_bitbang_setup(spi);
161c2dd3 252
d29389de
DB
253 return status;
254}
255
4b859db2
LB
256static int spi_gpio_set_direction(struct spi_device *spi, bool output)
257{
258 struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
5132b3d2 259 int ret;
4b859db2
LB
260
261 if (output)
262 return gpiod_direction_output(spi_gpio->mosi, 1);
5132b3d2
LW
263
264 ret = gpiod_direction_input(spi_gpio->mosi);
265 if (ret)
266 return ret;
267 /*
268 * Send a turnaround high impedance cycle when switching
269 * from output to input. Theoretically there should be
270 * a clock delay here, but as has been noted above, the
271 * nsec delay function for bit-banged GPIO is simply
272 * {} because bit-banging just doesn't get fast enough
273 * anyway.
274 */
275 if (spi->mode & SPI_3WIRE_HIZ) {
276 gpiod_set_value_cansleep(spi_gpio->sck,
277 !(spi->mode & SPI_CPOL));
278 gpiod_set_value_cansleep(spi_gpio->sck,
279 !!(spi->mode & SPI_CPOL));
280 }
281 return 0;
4b859db2
LB
282}
283
d29389de
DB
284static void spi_gpio_cleanup(struct spi_device *spi)
285{
d29389de
DB
286 spi_bitbang_cleanup(spi);
287}
288
9b00bc7b
LW
289/*
290 * It can be convenient to use this driver with pins that have alternate
291 * functions associated with a "native" SPI controller if a driver for that
292 * controller is not available, or is missing important functionality.
293 *
294 * On platforms which can do so, configure MISO with a weak pullup unless
295 * there's an external pullup on that signal. That saves power by avoiding
296 * floating signals. (A weak pulldown would save power too, but many
297 * drivers expect to see all-ones data as the no slave "response".)
298 */
299static int spi_gpio_request(struct device *dev,
300 struct spi_gpio *spi_gpio,
301 unsigned int num_chipselects,
302 u16 *mflags)
d29389de 303{
9b00bc7b 304 int i;
d29389de 305
9b00bc7b
LW
306 spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
307 if (IS_ERR(spi_gpio->mosi))
308 return PTR_ERR(spi_gpio->mosi);
309 if (!spi_gpio->mosi)
3c8e1a84 310 /* HW configuration without MOSI pin */
9b00bc7b 311 *mflags |= SPI_MASTER_NO_TX;
d29389de 312
9b00bc7b
LW
313 spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
314 if (IS_ERR(spi_gpio->miso))
315 return PTR_ERR(spi_gpio->miso);
abf5feef
LW
316 /*
317 * No setting SPI_MASTER_NO_RX here - if there is only a MOSI
318 * pin connected the host can still do RX by changing the
319 * direction of the line.
320 */
d29389de 321
9b00bc7b 322 spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
1723c315
LW
323 if (IS_ERR(spi_gpio->sck))
324 return PTR_ERR(spi_gpio->sck);
d29389de 325
9b00bc7b
LW
326 for (i = 0; i < num_chipselects; i++) {
327 spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
328 i, GPIOD_OUT_HIGH);
329 if (IS_ERR(spi_gpio->cs_gpios[i]))
330 return PTR_ERR(spi_gpio->cs_gpios[i]);
331 }
d29389de 332
9b00bc7b 333 return 0;
d29389de
DB
334}
335
38ab18ca 336#ifdef CONFIG_OF
d9e15281 337static const struct of_device_id spi_gpio_dt_ids[] = {
38ab18ca
DM
338 { .compatible = "spi-gpio" },
339 {}
340};
341MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
342
343static int spi_gpio_probe_dt(struct platform_device *pdev)
344{
345 int ret;
346 u32 tmp;
347 struct spi_gpio_platform_data *pdata;
348 struct device_node *np = pdev->dev.of_node;
349 const struct of_device_id *of_id =
350 of_match_device(spi_gpio_dt_ids, &pdev->dev);
351
352 if (!of_id)
353 return 0;
354
355 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
356 if (!pdata)
357 return -ENOMEM;
358
38ab18ca
DM
359
360 ret = of_property_read_u32(np, "num-chipselects", &tmp);
361 if (ret < 0) {
362 dev_err(&pdev->dev, "num-chipselects property not found\n");
363 goto error_free;
364 }
365
366 pdata->num_chipselect = tmp;
367 pdev->dev.platform_data = pdata;
368
369 return 1;
370
371error_free:
372 devm_kfree(&pdev->dev, pdata);
373 return ret;
374}
375#else
ac2cb30b 376static inline int spi_gpio_probe_dt(struct platform_device *pdev)
38ab18ca
DM
377{
378 return 0;
379}
380#endif
381
fd4a319b 382static int spi_gpio_probe(struct platform_device *pdev)
d29389de
DB
383{
384 int status;
385 struct spi_master *master;
386 struct spi_gpio *spi_gpio;
387 struct spi_gpio_platform_data *pdata;
3c8e1a84 388 u16 master_flags = 0;
38ab18ca
DM
389 bool use_of = 0;
390
391 status = spi_gpio_probe_dt(pdev);
392 if (status < 0)
393 return status;
394 if (status > 0)
395 use_of = 1;
d29389de 396
8074cf06 397 pdata = dev_get_platdata(&pdev->dev);
d29389de 398#ifdef GENERIC_BITBANG
d1d81802 399 if (!pdata || (!use_of && !pdata->num_chipselect))
d29389de
DB
400 return -ENODEV;
401#endif
402
9b00bc7b
LW
403 master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio));
404 if (!master)
405 return -ENOMEM;
d29389de 406
d29389de 407 spi_gpio = spi_master_get_devdata(master);
9b00bc7b 408
a86854d0
KC
409 spi_gpio->cs_gpios = devm_kcalloc(&pdev->dev,
410 pdata->num_chipselect,
411 sizeof(*spi_gpio->cs_gpios),
9b00bc7b
LW
412 GFP_KERNEL);
413 if (!spi_gpio->cs_gpios)
414 return -ENOMEM;
415
d29389de
DB
416 platform_set_drvdata(pdev, spi_gpio);
417
9b00bc7b
LW
418 /* Determine if we have chip selects connected */
419 spi_gpio->has_cs = !!pdata->num_chipselect;
420
d29389de
DB
421 spi_gpio->pdev = pdev;
422 if (pdata)
423 spi_gpio->pdata = *pdata;
424
9b00bc7b
LW
425 status = spi_gpio_request(&pdev->dev, spi_gpio,
426 pdata->num_chipselect, &master_flags);
427 if (status)
428 return status;
429
24778be2 430 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
b89fefda
RK
431 master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
432 SPI_CS_HIGH;
3c8e1a84 433 master->flags = master_flags;
d29389de 434 master->bus_num = pdev->id;
9b00bc7b
LW
435 /* The master needs to think there is a chipselect even if not connected */
436 master->num_chipselect = spi_gpio->has_cs ? pdata->num_chipselect : 1;
d29389de
DB
437 master->setup = spi_gpio_setup;
438 master->cleanup = spi_gpio_cleanup;
38ab18ca
DM
439#ifdef CONFIG_OF
440 master->dev.of_node = pdev->dev.of_node;
38ab18ca 441#endif
d29389de 442
94c69f76 443 spi_gpio->bitbang.master = master;
d29389de 444 spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
4b859db2 445 spi_gpio->bitbang.set_line_direction = spi_gpio_set_direction;
3c8e1a84 446
abf5feef 447 if ((master_flags & SPI_MASTER_NO_TX) == 0) {
3c8e1a84
MS
448 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
449 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
450 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
451 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
452 } else {
453 spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
454 spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
455 spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
456 spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
457 }
d29389de 458 spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
d29389de
DB
459
460 status = spi_bitbang_start(&spi_gpio->bitbang);
9b00bc7b 461 if (status)
d29389de 462 spi_master_put(master);
d29389de
DB
463
464 return status;
465}
466
fd4a319b 467static int spi_gpio_remove(struct platform_device *pdev)
d29389de
DB
468{
469 struct spi_gpio *spi_gpio;
d29389de
DB
470
471 spi_gpio = platform_get_drvdata(pdev);
d29389de
DB
472
473 /* stop() unregisters child devices too */
d9721ae1 474 spi_bitbang_stop(&spi_gpio->bitbang);
d29389de 475
94c69f76 476 spi_master_put(spi_gpio->bitbang.master);
d29389de 477
d9721ae1 478 return 0;
d29389de
DB
479}
480
481MODULE_ALIAS("platform:" DRIVER_NAME);
482
483static struct platform_driver spi_gpio_driver = {
38ab18ca
DM
484 .driver = {
485 .name = DRIVER_NAME,
38ab18ca
DM
486 .of_match_table = of_match_ptr(spi_gpio_dt_ids),
487 },
940ab889 488 .probe = spi_gpio_probe,
fd4a319b 489 .remove = spi_gpio_remove,
d29389de 490};
940ab889 491module_platform_driver(spi_gpio_driver);
d29389de
DB
492
493MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
494MODULE_AUTHOR("David Brownell");
495MODULE_LICENSE("GPL");