Commit | Line | Data |
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d29389de | 1 | /* |
ca632f55 | 2 | * SPI master driver using generic bitbanged GPIO |
d29389de DB |
3 | * |
4 | * Copyright (C) 2006,2008 David Brownell | |
9b00bc7b | 5 | * Copyright (C) 2017 Linus Walleij |
d29389de DB |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
d29389de DB |
16 | */ |
17 | #include <linux/kernel.h> | |
d7614de4 | 18 | #include <linux/module.h> |
d29389de | 19 | #include <linux/platform_device.h> |
9b00bc7b | 20 | #include <linux/gpio/consumer.h> |
ecc77773 | 21 | #include <linux/of.h> |
38ab18ca | 22 | #include <linux/of_device.h> |
d29389de DB |
23 | |
24 | #include <linux/spi/spi.h> | |
25 | #include <linux/spi/spi_bitbang.h> | |
26 | #include <linux/spi/spi_gpio.h> | |
27 | ||
28 | ||
29 | /* | |
30 | * This bitbanging SPI master driver should help make systems usable | |
31 | * when a native hardware SPI engine is not available, perhaps because | |
32 | * its driver isn't yet working or because the I/O pins it requires | |
33 | * are used for other purposes. | |
34 | * | |
35 | * platform_device->driver_data ... points to spi_gpio | |
36 | * | |
37 | * spi->controller_state ... reserved for bitbang framework code | |
d29389de DB |
38 | * |
39 | * spi->master->dev.driver_data ... points to spi_gpio->bitbang | |
40 | */ | |
41 | ||
42 | struct spi_gpio { | |
43 | struct spi_bitbang bitbang; | |
9b00bc7b LW |
44 | struct gpio_desc *sck; |
45 | struct gpio_desc *miso; | |
46 | struct gpio_desc *mosi; | |
47 | struct gpio_desc **cs_gpios; | |
d29389de DB |
48 | }; |
49 | ||
50 | /*----------------------------------------------------------------------*/ | |
51 | ||
52 | /* | |
53 | * Because the overhead of going through four GPIO procedure calls | |
54 | * per transferred bit can make performance a problem, this code | |
55 | * is set up so that you can use it in either of two ways: | |
56 | * | |
57 | * - The slow generic way: set up platform_data to hold the GPIO | |
58 | * numbers used for MISO/MOSI/SCK, and issue procedure calls for | |
59 | * each of them. This driver can handle several such busses. | |
60 | * | |
61 | * - The quicker inlined way: only helps with platform GPIO code | |
62 | * that inlines operations for constant GPIOs. This can give | |
63 | * you tight (fast!) inner loops, but each such bus needs a | |
64 | * new driver. You'll define a new C file, with Makefile and | |
65 | * Kconfig support; the C code can be a total of six lines: | |
66 | * | |
67 | * #define DRIVER_NAME "myboard_spi2" | |
68 | * #define SPI_MISO_GPIO 119 | |
69 | * #define SPI_MOSI_GPIO 120 | |
70 | * #define SPI_SCK_GPIO 121 | |
71 | * #define SPI_N_CHIPSEL 4 | |
ca632f55 | 72 | * #include "spi-gpio.c" |
d29389de DB |
73 | */ |
74 | ||
75 | #ifndef DRIVER_NAME | |
76 | #define DRIVER_NAME "spi_gpio" | |
77 | ||
78 | #define GENERIC_BITBANG /* vs tight inlines */ | |
79 | ||
d29389de DB |
80 | #endif |
81 | ||
82 | /*----------------------------------------------------------------------*/ | |
83 | ||
650705cf | 84 | static inline struct spi_gpio *__pure |
161c2dd3 | 85 | spi_to_spi_gpio(const struct spi_device *spi) |
d29389de DB |
86 | { |
87 | const struct spi_bitbang *bang; | |
161c2dd3 | 88 | struct spi_gpio *spi_gpio; |
d29389de DB |
89 | |
90 | bang = spi_master_get_devdata(spi->master); | |
91 | spi_gpio = container_of(bang, struct spi_gpio, bitbang); | |
161c2dd3 DM |
92 | return spi_gpio; |
93 | } | |
94 | ||
9b00bc7b | 95 | /* These helpers are in turn called by the bitbang inlines */ |
d29389de DB |
96 | static inline void setsck(const struct spi_device *spi, int is_on) |
97 | { | |
9b00bc7b LW |
98 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
99 | ||
100 | gpiod_set_value_cansleep(spi_gpio->sck, is_on); | |
d29389de DB |
101 | } |
102 | ||
103 | static inline void setmosi(const struct spi_device *spi, int is_on) | |
104 | { | |
9b00bc7b LW |
105 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
106 | ||
107 | gpiod_set_value_cansleep(spi_gpio->mosi, is_on); | |
d29389de DB |
108 | } |
109 | ||
110 | static inline int getmiso(const struct spi_device *spi) | |
111 | { | |
9b00bc7b | 112 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 113 | |
4b859db2 LB |
114 | if (spi->mode & SPI_3WIRE) |
115 | return !!gpiod_get_value_cansleep(spi_gpio->mosi); | |
116 | else | |
117 | return !!gpiod_get_value_cansleep(spi_gpio->miso); | |
9b00bc7b | 118 | } |
d29389de DB |
119 | |
120 | /* | |
121 | * NOTE: this clocks "as fast as we can". It "should" be a function of the | |
122 | * requested device clock. Software overhead means we usually have trouble | |
123 | * reaching even one Mbit/sec (except when we can inline bitops), so for now | |
124 | * we'll just assume we never need additional per-bit slowdowns. | |
125 | */ | |
126 | #define spidelay(nsecs) do {} while (0) | |
127 | ||
ca632f55 | 128 | #include "spi-bitbang-txrx.h" |
d29389de DB |
129 | |
130 | /* | |
131 | * These functions can leverage inline expansion of GPIO calls to shrink | |
132 | * costs for a txrx bit, often by factors of around ten (by instruction | |
133 | * count). That is particularly visible for larger word sizes, but helps | |
134 | * even with default 8-bit words. | |
135 | * | |
136 | * REVISIT overheads calling these functions for each word also have | |
137 | * significant performance costs. Having txrx_bufs() calls that inline | |
138 | * the txrx_word() logic would help performance, e.g. on larger blocks | |
139 | * used with flash storage or MMC/SD. There should also be ways to make | |
140 | * GCC be less stupid about reloading registers inside the I/O loops, | |
141 | * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? | |
142 | */ | |
143 | ||
144 | static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 145 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 146 | { |
304d3436 | 147 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); |
d29389de DB |
148 | } |
149 | ||
150 | static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 151 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 152 | { |
304d3436 | 153 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); |
d29389de DB |
154 | } |
155 | ||
156 | static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 157 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 158 | { |
304d3436 | 159 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); |
d29389de DB |
160 | } |
161 | ||
162 | static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 163 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
d29389de | 164 | { |
304d3436 | 165 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); |
d29389de DB |
166 | } |
167 | ||
3c8e1a84 MS |
168 | /* |
169 | * These functions do not call setmosi or getmiso if respective flag | |
170 | * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to | |
171 | * call when such pin is not present or defined in the controller. | |
172 | * A separate set of callbacks is defined to get highest possible | |
173 | * speed in the generic case (when both MISO and MOSI lines are | |
174 | * available), as optimiser will remove the checks when argument is | |
175 | * constant. | |
176 | */ | |
177 | ||
178 | static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, | |
304d3436 | 179 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 180 | { |
304d3436 | 181 | flags = spi->master->flags; |
3c8e1a84 MS |
182 | return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); |
183 | } | |
184 | ||
185 | static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, | |
304d3436 | 186 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 187 | { |
304d3436 | 188 | flags = spi->master->flags; |
3c8e1a84 MS |
189 | return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); |
190 | } | |
191 | ||
192 | static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, | |
304d3436 | 193 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 194 | { |
304d3436 | 195 | flags = spi->master->flags; |
3c8e1a84 MS |
196 | return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); |
197 | } | |
198 | ||
199 | static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, | |
304d3436 | 200 | unsigned nsecs, u32 word, u8 bits, unsigned flags) |
3c8e1a84 | 201 | { |
304d3436 | 202 | flags = spi->master->flags; |
3c8e1a84 MS |
203 | return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); |
204 | } | |
205 | ||
d29389de DB |
206 | /*----------------------------------------------------------------------*/ |
207 | ||
208 | static void spi_gpio_chipselect(struct spi_device *spi, int is_active) | |
209 | { | |
161c2dd3 | 210 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); |
d29389de | 211 | |
9b00bc7b | 212 | /* set initial clock line level */ |
d29389de | 213 | if (is_active) |
9b00bc7b LW |
214 | gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); |
215 | ||
216 | /* Drive chip select line, if we have one */ | |
249e2632 | 217 | if (spi_gpio->cs_gpios) { |
9b00bc7b | 218 | struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select]; |
d29389de | 219 | |
9b00bc7b LW |
220 | /* SPI chip selects are normally active-low */ |
221 | gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); | |
bfb9bcdb | 222 | } |
d29389de DB |
223 | } |
224 | ||
225 | static int spi_gpio_setup(struct spi_device *spi) | |
226 | { | |
9b00bc7b | 227 | struct gpio_desc *cs; |
161c2dd3 DM |
228 | int status = 0; |
229 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
38ab18ca | 230 | |
9b00bc7b LW |
231 | /* |
232 | * The CS GPIOs have already been | |
233 | * initialized from the descriptor lookup. | |
234 | */ | |
249e2632 AS |
235 | if (spi_gpio->cs_gpios) { |
236 | cs = spi_gpio->cs_gpios[spi->chip_select]; | |
237 | if (!spi->controller_state && cs) | |
238 | status = gpiod_direction_output(cs, | |
239 | !(spi->mode & SPI_CS_HIGH)); | |
240 | } | |
9b00bc7b LW |
241 | |
242 | if (!status) | |
6b8cc330 | 243 | status = spi_bitbang_setup(spi); |
161c2dd3 | 244 | |
d29389de DB |
245 | return status; |
246 | } | |
247 | ||
4b859db2 LB |
248 | static int spi_gpio_set_direction(struct spi_device *spi, bool output) |
249 | { | |
250 | struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); | |
5132b3d2 | 251 | int ret; |
4b859db2 LB |
252 | |
253 | if (output) | |
254 | return gpiod_direction_output(spi_gpio->mosi, 1); | |
5132b3d2 LW |
255 | |
256 | ret = gpiod_direction_input(spi_gpio->mosi); | |
257 | if (ret) | |
258 | return ret; | |
259 | /* | |
260 | * Send a turnaround high impedance cycle when switching | |
261 | * from output to input. Theoretically there should be | |
262 | * a clock delay here, but as has been noted above, the | |
263 | * nsec delay function for bit-banged GPIO is simply | |
264 | * {} because bit-banging just doesn't get fast enough | |
265 | * anyway. | |
266 | */ | |
267 | if (spi->mode & SPI_3WIRE_HIZ) { | |
268 | gpiod_set_value_cansleep(spi_gpio->sck, | |
269 | !(spi->mode & SPI_CPOL)); | |
270 | gpiod_set_value_cansleep(spi_gpio->sck, | |
271 | !!(spi->mode & SPI_CPOL)); | |
272 | } | |
273 | return 0; | |
4b859db2 LB |
274 | } |
275 | ||
d29389de DB |
276 | static void spi_gpio_cleanup(struct spi_device *spi) |
277 | { | |
d29389de DB |
278 | spi_bitbang_cleanup(spi); |
279 | } | |
280 | ||
9b00bc7b LW |
281 | /* |
282 | * It can be convenient to use this driver with pins that have alternate | |
283 | * functions associated with a "native" SPI controller if a driver for that | |
284 | * controller is not available, or is missing important functionality. | |
285 | * | |
286 | * On platforms which can do so, configure MISO with a weak pullup unless | |
287 | * there's an external pullup on that signal. That saves power by avoiding | |
288 | * floating signals. (A weak pulldown would save power too, but many | |
289 | * drivers expect to see all-ones data as the no slave "response".) | |
290 | */ | |
5c8283c1 | 291 | static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) |
d29389de | 292 | { |
9b00bc7b LW |
293 | spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); |
294 | if (IS_ERR(spi_gpio->mosi)) | |
295 | return PTR_ERR(spi_gpio->mosi); | |
d29389de | 296 | |
9b00bc7b LW |
297 | spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); |
298 | if (IS_ERR(spi_gpio->miso)) | |
299 | return PTR_ERR(spi_gpio->miso); | |
d29389de | 300 | |
9b00bc7b | 301 | spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); |
1723c315 LW |
302 | if (IS_ERR(spi_gpio->sck)) |
303 | return PTR_ERR(spi_gpio->sck); | |
d29389de | 304 | |
9b00bc7b | 305 | return 0; |
d29389de DB |
306 | } |
307 | ||
38ab18ca | 308 | #ifdef CONFIG_OF |
d9e15281 | 309 | static const struct of_device_id spi_gpio_dt_ids[] = { |
38ab18ca DM |
310 | { .compatible = "spi-gpio" }, |
311 | {} | |
312 | }; | |
313 | MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); | |
314 | ||
249e2632 AS |
315 | static int spi_gpio_probe_dt(struct platform_device *pdev, |
316 | struct spi_master *master) | |
38ab18ca | 317 | { |
249e2632 AS |
318 | master->dev.of_node = pdev->dev.of_node; |
319 | master->use_gpio_descriptors = true; | |
38ab18ca | 320 | |
249e2632 AS |
321 | return 0; |
322 | } | |
323 | #else | |
324 | static inline int spi_gpio_probe_dt(struct platform_device *pdev, | |
325 | struct spi_master *master) | |
326 | { | |
327 | return 0; | |
328 | } | |
329 | #endif | |
38ab18ca | 330 | |
249e2632 AS |
331 | static int spi_gpio_probe_pdata(struct platform_device *pdev, |
332 | struct spi_master *master) | |
333 | { | |
334 | struct device *dev = &pdev->dev; | |
335 | struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); | |
336 | struct spi_gpio *spi_gpio = spi_master_get_devdata(master); | |
337 | int i; | |
38ab18ca | 338 | |
249e2632 AS |
339 | #ifdef GENERIC_BITBANG |
340 | if (!pdata || !pdata->num_chipselect) | |
341 | return -ENODEV; | |
342 | #endif | |
343 | /* | |
344 | * The master needs to think there is a chipselect even if not | |
345 | * connected | |
346 | */ | |
347 | master->num_chipselect = pdata->num_chipselect ?: 1; | |
38ab18ca | 348 | |
249e2632 AS |
349 | spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect, |
350 | sizeof(*spi_gpio->cs_gpios), | |
351 | GFP_KERNEL); | |
352 | if (!spi_gpio->cs_gpios) | |
353 | return -ENOMEM; | |
38ab18ca | 354 | |
249e2632 AS |
355 | for (i = 0; i < master->num_chipselect; i++) { |
356 | spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, | |
357 | GPIOD_OUT_HIGH); | |
358 | if (IS_ERR(spi_gpio->cs_gpios[i])) | |
359 | return PTR_ERR(spi_gpio->cs_gpios[i]); | |
360 | } | |
38ab18ca | 361 | |
38ab18ca DM |
362 | return 0; |
363 | } | |
38ab18ca | 364 | |
8b797490 AS |
365 | static void spi_gpio_put(void *data) |
366 | { | |
367 | spi_master_put(data); | |
368 | } | |
369 | ||
fd4a319b | 370 | static int spi_gpio_probe(struct platform_device *pdev) |
d29389de DB |
371 | { |
372 | int status; | |
373 | struct spi_master *master; | |
374 | struct spi_gpio *spi_gpio; | |
96cad6d7 | 375 | struct device *dev = &pdev->dev; |
15dd0e9e | 376 | struct spi_bitbang *bb; |
249e2632 | 377 | const struct of_device_id *of_id; |
d29389de | 378 | |
249e2632 | 379 | of_id = of_match_device(spi_gpio_dt_ids, &pdev->dev); |
d29389de | 380 | |
96cad6d7 | 381 | master = spi_alloc_master(dev, sizeof(*spi_gpio)); |
9b00bc7b LW |
382 | if (!master) |
383 | return -ENOMEM; | |
d29389de | 384 | |
8b797490 AS |
385 | status = devm_add_action_or_reset(&pdev->dev, spi_gpio_put, master); |
386 | if (status) | |
387 | return status; | |
388 | ||
249e2632 AS |
389 | if (of_id) |
390 | status = spi_gpio_probe_dt(pdev, master); | |
391 | else | |
392 | status = spi_gpio_probe_pdata(pdev, master); | |
9b00bc7b | 393 | |
249e2632 AS |
394 | if (status) |
395 | return status; | |
9b00bc7b | 396 | |
249e2632 | 397 | spi_gpio = spi_master_get_devdata(master); |
d29389de | 398 | |
5c8283c1 | 399 | status = spi_gpio_request(dev, spi_gpio); |
9b00bc7b LW |
400 | if (status) |
401 | return status; | |
402 | ||
24778be2 | 403 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); |
b89fefda RK |
404 | master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | |
405 | SPI_CS_HIGH; | |
5c8283c1 AS |
406 | if (!spi_gpio->mosi) { |
407 | /* HW configuration without MOSI pin | |
408 | * | |
409 | * No setting SPI_MASTER_NO_RX here - if there is only | |
410 | * a MOSI pin connected the host can still do RX by | |
411 | * changing the direction of the line. | |
412 | */ | |
413 | master->flags = SPI_MASTER_NO_TX; | |
414 | } | |
415 | ||
d29389de | 416 | master->bus_num = pdev->id; |
d29389de DB |
417 | master->setup = spi_gpio_setup; |
418 | master->cleanup = spi_gpio_cleanup; | |
249e2632 | 419 | |
15dd0e9e AS |
420 | bb = &spi_gpio->bitbang; |
421 | bb->master = master; | |
422 | bb->chipselect = spi_gpio_chipselect; | |
423 | bb->set_line_direction = spi_gpio_set_direction; | |
3c8e1a84 | 424 | |
5c8283c1 | 425 | if (master->flags & SPI_MASTER_NO_TX) { |
15dd0e9e AS |
426 | bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; |
427 | bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; | |
428 | bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; | |
429 | bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; | |
68cd9dc2 AS |
430 | } else { |
431 | bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; | |
432 | bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; | |
433 | bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; | |
434 | bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; | |
3c8e1a84 | 435 | } |
15dd0e9e | 436 | bb->setup_transfer = spi_bitbang_setup_transfer; |
d29389de | 437 | |
79567c1a AS |
438 | status = spi_bitbang_init(&spi_gpio->bitbang); |
439 | if (status) | |
440 | return status; | |
d29389de | 441 | |
79567c1a | 442 | return devm_spi_register_master(&pdev->dev, spi_master_get(master)); |
d29389de DB |
443 | } |
444 | ||
445 | MODULE_ALIAS("platform:" DRIVER_NAME); | |
446 | ||
447 | static struct platform_driver spi_gpio_driver = { | |
38ab18ca DM |
448 | .driver = { |
449 | .name = DRIVER_NAME, | |
38ab18ca DM |
450 | .of_match_table = of_match_ptr(spi_gpio_dt_ids), |
451 | }, | |
940ab889 | 452 | .probe = spi_gpio_probe, |
d29389de | 453 | }; |
940ab889 | 454 | module_platform_driver(spi_gpio_driver); |
d29389de DB |
455 | |
456 | MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO "); | |
457 | MODULE_AUTHOR("David Brownell"); | |
458 | MODULE_LICENSE("GPL"); |