[linux-2.6-block.git] / drivers / spi / spi-altera.c

/*
 * Altera SPI driver
 *
 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
 *
 * Based on spi_s3c24xx.c, which is:
 * Copyright (c) 2006 Ben Dooks
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/io.h>
#include <linux/of.h>

#define DRV_NAME "spi_altera"

#define ALTERA_SPI_RXDATA	0
#define ALTERA_SPI_TXDATA	4
#define ALTERA_SPI_STATUS	8
#define ALTERA_SPI_CONTROL	12
#define ALTERA_SPI_SLAVE_SEL	20

#define ALTERA_SPI_STATUS_ROE_MSK	0x8
#define ALTERA_SPI_STATUS_TOE_MSK	0x10
#define ALTERA_SPI_STATUS_TMT_MSK	0x20
#define ALTERA_SPI_STATUS_TRDY_MSK	0x40
#define ALTERA_SPI_STATUS_RRDY_MSK	0x80
#define ALTERA_SPI_STATUS_E_MSK		0x100

#define ALTERA_SPI_CONTROL_IROE_MSK	0x8
#define ALTERA_SPI_CONTROL_ITOE_MSK	0x10
#define ALTERA_SPI_CONTROL_ITRDY_MSK	0x40
#define ALTERA_SPI_CONTROL_IRRDY_MSK	0x80
#define ALTERA_SPI_CONTROL_IE_MSK	0x100
#define ALTERA_SPI_CONTROL_SSO_MSK	0x400

struct altera_spi {
	void __iomem *base;
	int irq;
	int len;
	int count;
	int bytes_per_word;
	unsigned long imr;

	/* data buffers */
	const unsigned char *tx;
	unsigned char *rx;
};

static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
{
	return spi_master_get_devdata(sdev->master);
}

static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
{
	struct altera_spi *hw = altera_spi_to_hw(spi);

	if (is_high) {
		hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
		writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
	} else {
		writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
		hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	}
}

static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
{
	if (hw->tx) {
		switch (hw->bytes_per_word) {
		case 1:
			return hw->tx[count];
		case 2:
			return (hw->tx[count * 2]
				| (hw->tx[count * 2 + 1] << 8));
		}
	}
	return 0;
}

static int altera_spi_txrx(struct spi_master *master,
	struct spi_device *spi, struct spi_transfer *t)
{
	struct altera_spi *hw = spi_master_get_devdata(master);

	hw->tx = t->tx_buf;
	hw->rx = t->rx_buf;
	hw->count = 0;
	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
	hw->len = t->len / hw->bytes_per_word;

	if (hw->irq >= 0) {
		/* enable receive interrupt */
		hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);

		/* send the first byte */
		writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
	} else {
		while (hw->count < hw->len) {
			unsigned int rxd;

			writel(hw_txbyte(hw, hw->count),
			       hw->base + ALTERA_SPI_TXDATA);

			while (!(readl(hw->base + ALTERA_SPI_STATUS) &
				 ALTERA_SPI_STATUS_RRDY_MSK))
				cpu_relax();

			rxd = readl(hw->base + ALTERA_SPI_RXDATA);
			if (hw->rx) {
				switch (hw->bytes_per_word) {
				case 1:
					hw->rx[hw->count] = rxd;
					break;
				case 2:
					hw->rx[hw->count * 2] = rxd;
					hw->rx[hw->count * 2 + 1] = rxd >> 8;
					break;
				}
			}

			hw->count++;
		}
		spi_finalize_current_transfer(master);
	}

	return t->len;
}

static irqreturn_t altera_spi_irq(int irq, void *dev)
{
	struct spi_master *master = dev;
	struct altera_spi *hw = spi_master_get_devdata(master);
	unsigned int rxd;

	rxd = readl(hw->base + ALTERA_SPI_RXDATA);
	if (hw->rx) {
		switch (hw->bytes_per_word) {
		case 1:
			hw->rx[hw->count] = rxd;
			break;
		case 2:
			hw->rx[hw->count * 2] = rxd;
			hw->rx[hw->count * 2 + 1] = rxd >> 8;
			break;
		}
	}

	hw->count++;

	if (hw->count < hw->len) {
		writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
	} else {
		/* disable receive interrupt */
		hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
		writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);

		spi_finalize_current_transfer(master);
	}

	return IRQ_HANDLED;
}

static int altera_spi_probe(struct platform_device *pdev)
{
	struct altera_spi *hw;
	struct spi_master *master;
	struct resource *res;
	int err = -ENODEV;

	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	if (!master)
		return err;

	/* setup the master state. */
	master->bus_num = pdev->id;
	master->num_chipselect = 16;
	master->mode_bits = SPI_CS_HIGH;
	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
	master->dev.of_node = pdev->dev.of_node;
	master->transfer_one = altera_spi_txrx;
	master->set_cs = altera_spi_set_cs;

	hw = spi_master_get_devdata(master);

	/* find and map our resources */
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hw->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(hw->base)) {
		err = PTR_ERR(hw->base);
		goto exit;
	}
	/* program defaults into the registers */
	hw->imr = 0;		/* disable spi interrupts */
	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	writel(0, hw->base + ALTERA_SPI_STATUS);	/* clear status reg */
	if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
		readl(hw->base + ALTERA_SPI_RXDATA);	/* flush rxdata */
	/* irq is optional */
	hw->irq = platform_get_irq(pdev, 0);
	if (hw->irq >= 0) {
		err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
				       pdev->name, master);
		if (err)
			goto exit;
	}

	err = devm_spi_register_master(&pdev->dev, master);
	if (err)
		goto exit;
	dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);

	return 0;
exit:
	spi_master_put(master);
	return err;
}

#ifdef CONFIG_OF
static const struct of_device_id altera_spi_match[] = {
	{ .compatible = "ALTR,spi-1.0", },
	{ .compatible = "altr,spi-1.0", },
	{},
};
MODULE_DEVICE_TABLE(of, altera_spi_match);
#endif /* CONFIG_OF */

static struct platform_driver altera_spi_driver = {
	.probe = altera_spi_probe,
	.driver = {
		.name = DRV_NAME,
		.pm = NULL,
		.of_match_table = of_match_ptr(altera_spi_match),
	},
};
module_platform_driver(altera_spi_driver);

MODULE_DESCRIPTION("Altera SPI driver");
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
Commit	Line	Data
0b782531 TC	1	/*
	2	* Altera SPI driver
	3	*
	4	* Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
	5	*
	6	* Based on spi_s3c24xx.c, which is:
	7	* Copyright (c) 2006 Ben Dooks
	8	* Copyright (c) 2006 Simtec Electronics
	9	* Ben Dooks <ben@simtec.co.uk>
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
0b782531 TC	16	#include <linux/interrupt.h>
0b782531 TC	17	#include <linux/errno.h>
d7614de4	18	#include <linux/module.h>
0b782531 TC	19	#include <linux/platform_device.h>
0b782531 TC	20	#include <linux/spi/spi.h>
0b782531 TC	21	#include <linux/io.h>
	22	#include <linux/of.h>
	23
	24	#define DRV_NAME "spi_altera"
	25
	26	#define ALTERA_SPI_RXDATA 0
	27	#define ALTERA_SPI_TXDATA 4
	28	#define ALTERA_SPI_STATUS 8
	29	#define ALTERA_SPI_CONTROL 12
	30	#define ALTERA_SPI_SLAVE_SEL 20
	31
	32	#define ALTERA_SPI_STATUS_ROE_MSK 0x8
	33	#define ALTERA_SPI_STATUS_TOE_MSK 0x10
	34	#define ALTERA_SPI_STATUS_TMT_MSK 0x20
	35	#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
	36	#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
	37	#define ALTERA_SPI_STATUS_E_MSK 0x100
	38
	39	#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
	40	#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
	41	#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
	42	#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
	43	#define ALTERA_SPI_CONTROL_IE_MSK 0x100
	44	#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
	45
	46	struct altera_spi {
0b782531 TC	47	void __iomem *base;
	48	int irq;
	49	int len;
	50	int count;
	51	int bytes_per_word;
	52	unsigned long imr;
	53
	54	/* data buffers */
	55	const unsigned char *tx;
	56	unsigned char *rx;
	57	};
	58
	59	static inline struct altera_spi altera_spi_to_hw(struct spi_device sdev)
	60	{
	61	return spi_master_get_devdata(sdev->master);
	62	}
	63
e19b63cd	64	static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
0b782531 TC	65	{
	66	struct altera_spi *hw = altera_spi_to_hw(spi);
	67
e19b63cd LPC	68	if (is_high) {
	69	hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
	70	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	71	writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
0b782531	72	} else {
e19b63cd LPC	73	writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
	74	hw->imr \|= ALTERA_SPI_CONTROL_SSO_MSK;
	75	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
0b782531 TC	76	}
	77	}
	78
0b782531 TC	79	static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
	80	{
	81	if (hw->tx) {
	82	switch (hw->bytes_per_word) {
	83	case 1:
	84	return hw->tx[count];
	85	case 2:
	86	return (hw->tx[count * 2]
	87	\| (hw->tx[count * 2 + 1] << 8));
	88	}
	89	}
	90	return 0;
	91	}
	92
e19b63cd LPC	93	static int altera_spi_txrx(struct spi_master *master,
e19b63cd LPC	94	struct spi_device spi, struct spi_transfer t)
0b782531	95	{
e19b63cd	96	struct altera_spi *hw = spi_master_get_devdata(master);
0b782531 TC	97
	98	hw->tx = t->tx_buf;
	99	hw->rx = t->rx_buf;
	100	hw->count = 0;
f073d37d	101	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
0b782531 TC	102	hw->len = t->len / hw->bytes_per_word;
	103
	104	if (hw->irq >= 0) {
	105	/* enable receive interrupt */
	106	hw->imr \|= ALTERA_SPI_CONTROL_IRRDY_MSK;
	107	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	108
	109	/* send the first byte */
	110	writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
0b782531	111	} else {
72be0ee4	112	while (hw->count < hw->len) {
0b782531 TC	113	unsigned int rxd;
0b782531 TC	114
72be0ee4 AL	115	writel(hw_txbyte(hw, hw->count),
	116	hw->base + ALTERA_SPI_TXDATA);
	117
0b782531 TC	118	while (!(readl(hw->base + ALTERA_SPI_STATUS) &
	119	ALTERA_SPI_STATUS_RRDY_MSK))
	120	cpu_relax();
	121
	122	rxd = readl(hw->base + ALTERA_SPI_RXDATA);
	123	if (hw->rx) {
	124	switch (hw->bytes_per_word) {
	125	case 1:
	126	hw->rx[hw->count] = rxd;
	127	break;
	128	case 2:
	129	hw->rx[hw->count * 2] = rxd;
	130	hw->rx[hw->count * 2 + 1] = rxd >> 8;
	131	break;
	132	}
	133	}
	134
	135	hw->count++;
0b782531	136	}
e19b63cd	137	spi_finalize_current_transfer(master);
0b782531 TC	138	}
0b782531 TC	139
e19b63cd	140	return t->len;
0b782531 TC	141	}
	142
	143	static irqreturn_t altera_spi_irq(int irq, void *dev)
	144	{
e19b63cd LPC	145	struct spi_master *master = dev;
e19b63cd LPC	146	struct altera_spi *hw = spi_master_get_devdata(master);
0b782531 TC	147	unsigned int rxd;
	148
	149	rxd = readl(hw->base + ALTERA_SPI_RXDATA);
	150	if (hw->rx) {
	151	switch (hw->bytes_per_word) {
	152	case 1:
	153	hw->rx[hw->count] = rxd;
	154	break;
	155	case 2:
	156	hw->rx[hw->count * 2] = rxd;
	157	hw->rx[hw->count * 2 + 1] = rxd >> 8;
	158	break;
	159	}
	160	}
	161
	162	hw->count++;
	163
e19b63cd	164	if (hw->count < hw->len) {
0b782531	165	writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
e19b63cd LPC	166	} else {
	167	/* disable receive interrupt */
	168	hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
	169	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	170
	171	spi_finalize_current_transfer(master);
	172	}
0b782531 TC	173
	174	return IRQ_HANDLED;
	175	}
	176
fd4a319b	177	static int altera_spi_probe(struct platform_device *pdev)
0b782531	178	{
0b782531 TC	179	struct altera_spi *hw;
	180	struct spi_master *master;
	181	struct resource *res;
	182	int err = -ENODEV;
	183
	184	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	185	if (!master)
	186	return err;
	187
	188	/* setup the master state. */
	189	master->bus_num = pdev->id;
	190	master->num_chipselect = 16;
	191	master->mode_bits = SPI_CS_HIGH;
72bb79d0	192	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
bf2f2f79	193	master->dev.of_node = pdev->dev.of_node;
e19b63cd LPC	194	master->transfer_one = altera_spi_txrx;
e19b63cd LPC	195	master->set_cs = altera_spi_set_cs;
0b782531 TC	196
0b782531 TC	197	hw = spi_master_get_devdata(master);
0b782531 TC	198
	199	/* find and map our resources */
	200	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
b3136f8f JL	201	hw->base = devm_ioremap_resource(&pdev->dev, res);
	202	if (IS_ERR(hw->base)) {
	203	err = PTR_ERR(hw->base);
	204	goto exit;
	205	}
0b782531 TC	206	/* program defaults into the registers */
	207	hw->imr = 0; /* disable spi interrupts */
	208	writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
	209	writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
	210	if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
	211	readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
	212	/* irq is optional */
	213	hw->irq = platform_get_irq(pdev, 0);
	214	if (hw->irq >= 0) {
0b782531	215	err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
e19b63cd	216	pdev->name, master);
0b782531 TC	217	if (err)
	218	goto exit;
	219	}
0b782531	220
e19b63cd	221	err = devm_spi_register_master(&pdev->dev, master);
0b782531 TC	222	if (err)
	223	goto exit;
	224	dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
	225
	226	return 0;
0b782531	227	exit:
0b782531 TC	228	spi_master_put(master);
	229	return err;
	230	}
	231
0b782531 TC	232	#ifdef CONFIG_OF
	233	static const struct of_device_id altera_spi_match[] = {
	234	{ .compatible = "ALTR,spi-1.0", },
13960b47	235	{ .compatible = "altr,spi-1.0", },
0b782531 TC	236	{},
	237	};
	238	MODULE_DEVICE_TABLE(of, altera_spi_match);
0b782531 TC	239	#endif /* CONFIG_OF */
	240
	241	static struct platform_driver altera_spi_driver = {
	242	.probe = altera_spi_probe,
0b782531 TC	243	.driver = {
0b782531 TC	244	.name = DRV_NAME,
0b782531	245	.pm = NULL,
89f98dc5	246	.of_match_table = of_match_ptr(altera_spi_match),
0b782531 TC	247	},
0b782531 TC	248	};
940ab889	249	module_platform_driver(altera_spi_driver);
0b782531 TC	250
	251	MODULE_DESCRIPTION("Altera SPI driver");
	252	MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
	253	MODULE_LICENSE("GPL");
	254	MODULE_ALIAS("platform:" DRV_NAME);