[linux-block.git] / drivers / spi / spi-altera.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Altera SPI driver
 *
 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
 *
 * Based on spi_s3c24xx.c, which is:
 * Copyright (c) 2006 Ben Dooks
 * Copyright (c) 2006 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 */

#include <linux/interrupt.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/altera.h>
#include <linux/spi/spi.h>
#include <linux/io.h>
#include <linux/of.h>

#define DRV_NAME "spi_altera"

#define ALTERA_SPI_RXDATA	0
#define ALTERA_SPI_TXDATA	4
#define ALTERA_SPI_STATUS	8
#define ALTERA_SPI_CONTROL	12
#define ALTERA_SPI_SLAVE_SEL	20

#define ALTERA_SPI_STATUS_ROE_MSK	0x8
#define ALTERA_SPI_STATUS_TOE_MSK	0x10
#define ALTERA_SPI_STATUS_TMT_MSK	0x20
#define ALTERA_SPI_STATUS_TRDY_MSK	0x40
#define ALTERA_SPI_STATUS_RRDY_MSK	0x80
#define ALTERA_SPI_STATUS_E_MSK		0x100

#define ALTERA_SPI_CONTROL_IROE_MSK	0x8
#define ALTERA_SPI_CONTROL_ITOE_MSK	0x10
#define ALTERA_SPI_CONTROL_ITRDY_MSK	0x40
#define ALTERA_SPI_CONTROL_IRRDY_MSK	0x80
#define ALTERA_SPI_CONTROL_IE_MSK	0x100
#define ALTERA_SPI_CONTROL_SSO_MSK	0x400

#define ALTERA_SPI_MAX_CS		32

enum altera_spi_type {
	ALTERA_SPI_TYPE_UNKNOWN,
	ALTERA_SPI_TYPE_SUBDEV,
};

struct altera_spi {
	int irq;
	int len;
	int count;
	int bytes_per_word;
	u32 imr;

	/* data buffers */
	const unsigned char *tx;
	unsigned char *rx;

	struct regmap *regmap;
	u32 regoff;
	struct device *dev;
};

static const struct regmap_config spi_altera_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,
	.fast_io = true,
};

static int altr_spi_writel(struct altera_spi *hw, unsigned int reg,
			   unsigned int val)
{
	int ret;

	ret = regmap_write(hw->regmap, hw->regoff + reg, val);
	if (ret)
		dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n",
			reg, val, ret);

	return ret;
}

static int altr_spi_readl(struct altera_spi *hw, unsigned int reg,
			  unsigned int *val)
{
	int ret;

	ret = regmap_read(hw->regmap, hw->regoff + reg, val);
	if (ret)
		dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret);

	return ret;
}

static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
{
	return spi_master_get_devdata(sdev->master);
}

static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
{
	struct altera_spi *hw = altera_spi_to_hw(spi);

	if (is_high) {
		hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
		altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
		altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL, 0);
	} else {
		altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL,
				BIT(spi->chip_select));
		hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
		altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
	}
}

static void altera_spi_tx_word(struct altera_spi *hw)
{
	unsigned int txd = 0;

	if (hw->tx) {
		switch (hw->bytes_per_word) {
		case 1:
			txd = hw->tx[hw->count];
			break;
		case 2:
			txd = (hw->tx[hw->count * 2]
				| (hw->tx[hw->count * 2 + 1] << 8));
			break;
		case 4:
			txd = (hw->tx[hw->count * 4]
				| (hw->tx[hw->count * 4 + 1] << 8)
				| (hw->tx[hw->count * 4 + 2] << 16)
				| (hw->tx[hw->count * 4 + 3] << 24));
			break;

		}
	}

	altr_spi_writel(hw, ALTERA_SPI_TXDATA, txd);
}

static void altera_spi_rx_word(struct altera_spi *hw)
{
	unsigned int rxd;

	altr_spi_readl(hw, ALTERA_SPI_RXDATA, &rxd);
	if (hw->rx) {
		switch (hw->bytes_per_word) {
		case 1:
			hw->rx[hw->count] = rxd;
			break;
		case 2:
			hw->rx[hw->count * 2] = rxd;
			hw->rx[hw->count * 2 + 1] = rxd >> 8;
			break;
		case 4:
			hw->rx[hw->count * 4] = rxd;
			hw->rx[hw->count * 4 + 1] = rxd >> 8;
			hw->rx[hw->count * 4 + 2] = rxd >> 16;
			hw->rx[hw->count * 4 + 3] = rxd >> 24;
			break;

		}
	}

	hw->count++;
}

static int altera_spi_txrx(struct spi_master *master,
	struct spi_device *spi, struct spi_transfer *t)
{
	struct altera_spi *hw = spi_master_get_devdata(master);
	u32 val;

	hw->tx = t->tx_buf;
	hw->rx = t->rx_buf;
	hw->count = 0;
	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
	hw->len = t->len / hw->bytes_per_word;

	if (hw->irq >= 0) {
		/* enable receive interrupt */
		hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
		altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

		/* send the first byte */
		altera_spi_tx_word(hw);
	} else {
		while (hw->count < hw->len) {
			altera_spi_tx_word(hw);

			for (;;) {
				altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
				if (val & ALTERA_SPI_STATUS_RRDY_MSK)
					break;

				cpu_relax();
			}

			altera_spi_rx_word(hw);
		}
		spi_finalize_current_transfer(master);
	}

	return t->len;
}

static irqreturn_t altera_spi_irq(int irq, void *dev)
{
	struct spi_master *master = dev;
	struct altera_spi *hw = spi_master_get_devdata(master);

	altera_spi_rx_word(hw);

	if (hw->count < hw->len) {
		altera_spi_tx_word(hw);
	} else {
		/* disable receive interrupt */
		hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
		altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);

		spi_finalize_current_transfer(master);
	}

	return IRQ_HANDLED;
}

static int altera_spi_probe(struct platform_device *pdev)
{
	const struct platform_device_id *platid = platform_get_device_id(pdev);
	struct altera_spi_platform_data *pdata = dev_get_platdata(&pdev->dev);
	enum altera_spi_type type = ALTERA_SPI_TYPE_UNKNOWN;
	struct altera_spi *hw;
	struct spi_master *master;
	int err = -ENODEV;
	u32 val;
	u16 i;

	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	if (!master)
		return err;

	/* setup the master state. */
	master->bus_num = pdev->id;

	if (pdata) {
		if (pdata->num_chipselect > ALTERA_SPI_MAX_CS) {
			dev_err(&pdev->dev,
				"Invalid number of chipselect: %hu\n",
				pdata->num_chipselect);
			return -EINVAL;
		}

		master->num_chipselect = pdata->num_chipselect;
		master->mode_bits = pdata->mode_bits;
		master->bits_per_word_mask = pdata->bits_per_word_mask;
	} else {
		master->num_chipselect = 16;
		master->mode_bits = SPI_CS_HIGH;
		master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
	}

	master->dev.of_node = pdev->dev.of_node;
	master->transfer_one = altera_spi_txrx;
	master->set_cs = altera_spi_set_cs;

	hw = spi_master_get_devdata(master);
	hw->dev = &pdev->dev;

	if (platid)
		type = platid->driver_data;

	/* find and map our resources */
	if (type == ALTERA_SPI_TYPE_SUBDEV) {
		struct resource *regoff;

		hw->regmap = dev_get_regmap(pdev->dev.parent, NULL);
		if (!hw->regmap) {
			dev_err(&pdev->dev, "get regmap failed\n");
			goto exit;
		}

		regoff = platform_get_resource(pdev, IORESOURCE_REG, 0);
		if (regoff)
			hw->regoff = regoff->start;
	} else {
		void __iomem *res;

		res = devm_platform_ioremap_resource(pdev, 0);
		if (IS_ERR(res)) {
			err = PTR_ERR(res);
			goto exit;
		}

		hw->regmap = devm_regmap_init_mmio(&pdev->dev, res,
						   &spi_altera_config);
		if (IS_ERR(hw->regmap)) {
			dev_err(&pdev->dev, "regmap mmio init failed\n");
			err = PTR_ERR(hw->regmap);
			goto exit;
		}
	}

	/* program defaults into the registers */
	hw->imr = 0;		/* disable spi interrupts */
	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
	altr_spi_writel(hw, ALTERA_SPI_STATUS, 0);	/* clear status reg */
	altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
	if (val & ALTERA_SPI_STATUS_RRDY_MSK)
		altr_spi_readl(hw, ALTERA_SPI_RXDATA, &val); /* flush rxdata */
	/* irq is optional */
	hw->irq = platform_get_irq(pdev, 0);
	if (hw->irq >= 0) {
		err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
				       pdev->name, master);
		if (err)
			goto exit;
	}

	err = devm_spi_register_master(&pdev->dev, master);
	if (err)
		goto exit;

	if (pdata) {
		for (i = 0; i < pdata->num_devices; i++) {
			if (!spi_new_device(master, pdata->devices + i))
				dev_warn(&pdev->dev,
					 "unable to create SPI device: %s\n",
					 pdata->devices[i].modalias);
		}
	}

	dev_info(&pdev->dev, "regoff %u, irq %d\n", hw->regoff, hw->irq);

	return 0;
exit:
	spi_master_put(master);
	return err;
}

#ifdef CONFIG_OF
static const struct of_device_id altera_spi_match[] = {
	{ .compatible = "ALTR,spi-1.0", },
	{ .compatible = "altr,spi-1.0", },
	{},
};
MODULE_DEVICE_TABLE(of, altera_spi_match);
#endif /* CONFIG_OF */

static const struct platform_device_id altera_spi_ids[] = {
	{ DRV_NAME,		ALTERA_SPI_TYPE_UNKNOWN },
	{ "subdev_spi_altera",	ALTERA_SPI_TYPE_SUBDEV },
	{ }
};
MODULE_DEVICE_TABLE(platform, altera_spi_ids);

static struct platform_driver altera_spi_driver = {
	.probe = altera_spi_probe,
	.driver = {
		.name = DRV_NAME,
		.pm = NULL,
		.of_match_table = of_match_ptr(altera_spi_match),
	},
	.id_table	= altera_spi_ids,
};
module_platform_driver(altera_spi_driver);

MODULE_DESCRIPTION("Altera SPI driver");
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:" DRV_NAME);
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
0b782531 TC	2	/*
	3	* Altera SPI driver
	4	*
	5	* Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
	6	*
	7	* Based on spi_s3c24xx.c, which is:
	8	* Copyright (c) 2006 Ben Dooks
	9	* Copyright (c) 2006 Simtec Electronics
	10	* Ben Dooks <ben@simtec.co.uk>
0b782531 TC	11	*/
0b782531 TC	12
0b782531 TC	13	#include <linux/interrupt.h>
0b782531 TC	14	#include <linux/errno.h>
d7614de4	15	#include <linux/module.h>
0b782531	16	#include <linux/platform_device.h>
8e04187c	17	#include <linux/spi/altera.h>
0b782531	18	#include <linux/spi/spi.h>
0b782531 TC	19	#include <linux/io.h>
	20	#include <linux/of.h>
	21
	22	#define DRV_NAME "spi_altera"
	23
	24	#define ALTERA_SPI_RXDATA 0
	25	#define ALTERA_SPI_TXDATA 4
	26	#define ALTERA_SPI_STATUS 8
	27	#define ALTERA_SPI_CONTROL 12
	28	#define ALTERA_SPI_SLAVE_SEL 20
	29
	30	#define ALTERA_SPI_STATUS_ROE_MSK 0x8
	31	#define ALTERA_SPI_STATUS_TOE_MSK 0x10
	32	#define ALTERA_SPI_STATUS_TMT_MSK 0x20
	33	#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
	34	#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
	35	#define ALTERA_SPI_STATUS_E_MSK 0x100
	36
	37	#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
	38	#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
	39	#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
	40	#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
	41	#define ALTERA_SPI_CONTROL_IE_MSK 0x100
	42	#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
	43
8e04187c XY	44	#define ALTERA_SPI_MAX_CS 32
8e04187c XY	45
3820061d XY	46	enum altera_spi_type {
	47	ALTERA_SPI_TYPE_UNKNOWN,
	48	ALTERA_SPI_TYPE_SUBDEV,
	49	};
	50
0b782531	51	struct altera_spi {
0b782531 TC	52	int irq;
	53	int len;
	54	int count;
	55	int bytes_per_word;
d9dd0fb0	56	u32 imr;
0b782531 TC	57
	58	/* data buffers */
	59	const unsigned char *tx;
	60	unsigned char *rx;
3c651973 XY	61
3c651973 XY	62	struct regmap *regmap;
3820061d	63	u32 regoff;
3c651973 XY	64	struct device *dev;
	65	};
	66
	67	static const struct regmap_config spi_altera_config = {
	68	.reg_bits = 32,
	69	.reg_stride = 4,
	70	.val_bits = 32,
	71	.fast_io = true,
0b782531 TC	72	};
0b782531 TC	73
3c651973 XY	74	static int altr_spi_writel(struct altera_spi *hw, unsigned int reg,
	75	unsigned int val)
	76	{
	77	int ret;
	78
3820061d	79	ret = regmap_write(hw->regmap, hw->regoff + reg, val);
3c651973 XY	80	if (ret)
	81	dev_err(hw->dev, "fail to write reg 0x%x val 0x%x: %d\n",
	82	reg, val, ret);
	83
	84	return ret;
	85	}
	86
	87	static int altr_spi_readl(struct altera_spi *hw, unsigned int reg,
	88	unsigned int *val)
	89	{
	90	int ret;
	91
3820061d	92	ret = regmap_read(hw->regmap, hw->regoff + reg, val);
3c651973 XY	93	if (ret)
	94	dev_err(hw->dev, "fail to read reg 0x%x: %d\n", reg, ret);
	95
	96	return ret;
	97	}
	98
0b782531 TC	99	static inline struct altera_spi altera_spi_to_hw(struct spi_device sdev)
	100	{
	101	return spi_master_get_devdata(sdev->master);
	102	}
	103
e19b63cd	104	static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
0b782531 TC	105	{
	106	struct altera_spi *hw = altera_spi_to_hw(spi);
	107
e19b63cd LPC	108	if (is_high) {
e19b63cd LPC	109	hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
3c651973 XY	110	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
3c651973 XY	111	altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL, 0);
0b782531	112	} else {
3c651973 XY	113	altr_spi_writel(hw, ALTERA_SPI_SLAVE_SEL,
3c651973 XY	114	BIT(spi->chip_select));
e19b63cd	115	hw->imr \|= ALTERA_SPI_CONTROL_SSO_MSK;
3c651973	116	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
0b782531 TC	117	}
	118	}
	119
b64836a5	120	static void altera_spi_tx_word(struct altera_spi *hw)
0b782531	121	{
b64836a5 LPC	122	unsigned int txd = 0;
b64836a5 LPC	123
0b782531 TC	124	if (hw->tx) {
	125	switch (hw->bytes_per_word) {
	126	case 1:
b64836a5 LPC	127	txd = hw->tx[hw->count];
b64836a5 LPC	128	break;
0b782531	129	case 2:
b64836a5 LPC	130	txd = (hw->tx[hw->count * 2]
	131	\| (hw->tx[hw->count * 2 + 1] << 8));
	132	break;
3011d314 XY	133	case 4:
	134	txd = (hw->tx[hw->count * 4]
	135	\| (hw->tx[hw->count * 4 + 1] << 8)
	136	\| (hw->tx[hw->count * 4 + 2] << 16)
	137	\| (hw->tx[hw->count * 4 + 3] << 24));
	138	break;
	139
0b782531 TC	140	}
0b782531 TC	141	}
b64836a5	142
3c651973	143	altr_spi_writel(hw, ALTERA_SPI_TXDATA, txd);
b64836a5 LPC	144	}
	145
	146	static void altera_spi_rx_word(struct altera_spi *hw)
	147	{
	148	unsigned int rxd;
	149
3c651973	150	altr_spi_readl(hw, ALTERA_SPI_RXDATA, &rxd);
b64836a5 LPC	151	if (hw->rx) {
	152	switch (hw->bytes_per_word) {
	153	case 1:
	154	hw->rx[hw->count] = rxd;
	155	break;
	156	case 2:
	157	hw->rx[hw->count * 2] = rxd;
	158	hw->rx[hw->count * 2 + 1] = rxd >> 8;
	159	break;
3011d314 XY	160	case 4:
	161	hw->rx[hw->count * 4] = rxd;
	162	hw->rx[hw->count * 4 + 1] = rxd >> 8;
	163	hw->rx[hw->count * 4 + 2] = rxd >> 16;
	164	hw->rx[hw->count * 4 + 3] = rxd >> 24;
	165	break;
	166
b64836a5 LPC	167	}
	168	}
	169
	170	hw->count++;
0b782531 TC	171	}
0b782531 TC	172
e19b63cd LPC	173	static int altera_spi_txrx(struct spi_master *master,
e19b63cd LPC	174	struct spi_device spi, struct spi_transfer t)
0b782531	175	{
e19b63cd	176	struct altera_spi *hw = spi_master_get_devdata(master);
3c651973	177	u32 val;
0b782531 TC	178
	179	hw->tx = t->tx_buf;
	180	hw->rx = t->rx_buf;
	181	hw->count = 0;
f073d37d	182	hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
0b782531 TC	183	hw->len = t->len / hw->bytes_per_word;
	184
	185	if (hw->irq >= 0) {
	186	/* enable receive interrupt */
	187	hw->imr \|= ALTERA_SPI_CONTROL_IRRDY_MSK;
3c651973	188	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
0b782531 TC	189
0b782531 TC	190	/* send the first byte */
b64836a5	191	altera_spi_tx_word(hw);
0b782531	192	} else {
72be0ee4	193	while (hw->count < hw->len) {
b64836a5	194	altera_spi_tx_word(hw);
72be0ee4	195
3c651973 XY	196	for (;;) {
	197	altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
	198	if (val & ALTERA_SPI_STATUS_RRDY_MSK)
	199	break;
	200
0b782531	201	cpu_relax();
3c651973	202	}
0b782531	203
b64836a5	204	altera_spi_rx_word(hw);
0b782531	205	}
e19b63cd	206	spi_finalize_current_transfer(master);
0b782531 TC	207	}
0b782531 TC	208
e19b63cd	209	return t->len;
0b782531 TC	210	}
	211
	212	static irqreturn_t altera_spi_irq(int irq, void *dev)
	213	{
e19b63cd LPC	214	struct spi_master *master = dev;
e19b63cd LPC	215	struct altera_spi *hw = spi_master_get_devdata(master);
0b782531	216
b64836a5	217	altera_spi_rx_word(hw);
0b782531	218
e19b63cd	219	if (hw->count < hw->len) {
b64836a5	220	altera_spi_tx_word(hw);
e19b63cd LPC	221	} else {
	222	/* disable receive interrupt */
	223	hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
3c651973	224	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
e19b63cd LPC	225
	226	spi_finalize_current_transfer(master);
	227	}
0b782531 TC	228
	229	return IRQ_HANDLED;
	230	}
	231
fd4a319b	232	static int altera_spi_probe(struct platform_device *pdev)
0b782531	233	{
3820061d	234	const struct platform_device_id *platid = platform_get_device_id(pdev);
8e04187c	235	struct altera_spi_platform_data *pdata = dev_get_platdata(&pdev->dev);
3820061d	236	enum altera_spi_type type = ALTERA_SPI_TYPE_UNKNOWN;
0b782531 TC	237	struct altera_spi *hw;
0b782531 TC	238	struct spi_master *master;
0b782531	239	int err = -ENODEV;
3c651973	240	u32 val;
1fccd182	241	u16 i;
0b782531 TC	242
	243	master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
	244	if (!master)
	245	return err;
	246
	247	/* setup the master state. */
	248	master->bus_num = pdev->id;
8e04187c XY	249
	250	if (pdata) {
	251	if (pdata->num_chipselect > ALTERA_SPI_MAX_CS) {
	252	dev_err(&pdev->dev,
	253	"Invalid number of chipselect: %hu\n",
	254	pdata->num_chipselect);
	255	return -EINVAL;
	256	}
	257
	258	master->num_chipselect = pdata->num_chipselect;
	259	master->mode_bits = pdata->mode_bits;
	260	master->bits_per_word_mask = pdata->bits_per_word_mask;
	261	} else {
	262	master->num_chipselect = 16;
	263	master->mode_bits = SPI_CS_HIGH;
	264	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
	265	}
	266
bf2f2f79	267	master->dev.of_node = pdev->dev.of_node;
e19b63cd LPC	268	master->transfer_one = altera_spi_txrx;
e19b63cd LPC	269	master->set_cs = altera_spi_set_cs;
0b782531 TC	270
0b782531 TC	271	hw = spi_master_get_devdata(master);
3c651973	272	hw->dev = &pdev->dev;
0b782531	273
3820061d XY	274	if (platid)
	275	type = platid->driver_data;
	276
0b782531	277	/* find and map our resources */
3820061d XY	278	if (type == ALTERA_SPI_TYPE_SUBDEV) {
3820061d XY	279	struct resource *regoff;
3c651973	280
3820061d XY	281	hw->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	282	if (!hw->regmap) {
	283	dev_err(&pdev->dev, "get regmap failed\n");
	284	goto exit;
	285	}
	286
	287	regoff = platform_get_resource(pdev, IORESOURCE_REG, 0);
	288	if (regoff)
	289	hw->regoff = regoff->start;
	290	} else {
	291	void __iomem *res;
	292
	293	res = devm_platform_ioremap_resource(pdev, 0);
	294	if (IS_ERR(res)) {
	295	err = PTR_ERR(res);
	296	goto exit;
	297	}
	298
	299	hw->regmap = devm_regmap_init_mmio(&pdev->dev, res,
	300	&spi_altera_config);
	301	if (IS_ERR(hw->regmap)) {
	302	dev_err(&pdev->dev, "regmap mmio init failed\n");
	303	err = PTR_ERR(hw->regmap);
	304	goto exit;
	305	}
3c651973 XY	306	}
3c651973 XY	307
0b782531 TC	308	/* program defaults into the registers */
0b782531 TC	309	hw->imr = 0; /* disable spi interrupts */
3c651973 XY	310	altr_spi_writel(hw, ALTERA_SPI_CONTROL, hw->imr);
	311	altr_spi_writel(hw, ALTERA_SPI_STATUS, 0); /* clear status reg */
	312	altr_spi_readl(hw, ALTERA_SPI_STATUS, &val);
	313	if (val & ALTERA_SPI_STATUS_RRDY_MSK)
	314	altr_spi_readl(hw, ALTERA_SPI_RXDATA, &val); /* flush rxdata */
0b782531 TC	315	/* irq is optional */
	316	hw->irq = platform_get_irq(pdev, 0);
	317	if (hw->irq >= 0) {
0b782531	318	err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
e19b63cd	319	pdev->name, master);
0b782531 TC	320	if (err)
	321	goto exit;
	322	}
0b782531	323
e19b63cd	324	err = devm_spi_register_master(&pdev->dev, master);
0b782531 TC	325	if (err)
0b782531 TC	326	goto exit;
1fccd182 XY	327
	328	if (pdata) {
	329	for (i = 0; i < pdata->num_devices; i++) {
	330	if (!spi_new_device(master, pdata->devices + i))
	331	dev_warn(&pdev->dev,
	332	"unable to create SPI device: %s\n",
	333	pdata->devices[i].modalias);
	334	}
	335	}
	336
3820061d	337	dev_info(&pdev->dev, "regoff %u, irq %d\n", hw->regoff, hw->irq);
0b782531 TC	338
0b782531 TC	339	return 0;
0b782531	340	exit:
0b782531 TC	341	spi_master_put(master);
	342	return err;
	343	}
	344
0b782531 TC	345	#ifdef CONFIG_OF
	346	static const struct of_device_id altera_spi_match[] = {
	347	{ .compatible = "ALTR,spi-1.0", },
13960b47	348	{ .compatible = "altr,spi-1.0", },
0b782531 TC	349	{},
	350	};
	351	MODULE_DEVICE_TABLE(of, altera_spi_match);
0b782531 TC	352	#endif /* CONFIG_OF */
0b782531 TC	353
3820061d	354	static const struct platform_device_id altera_spi_ids[] = {
de5fd9cb XY	355	{ DRV_NAME, ALTERA_SPI_TYPE_UNKNOWN },
de5fd9cb XY	356	{ "subdev_spi_altera", ALTERA_SPI_TYPE_SUBDEV },
3820061d XY	357	{ }
3820061d XY	358	};
1ac6f21a	359	MODULE_DEVICE_TABLE(platform, altera_spi_ids);
3820061d	360
0b782531 TC	361	static struct platform_driver altera_spi_driver = {
0b782531 TC	362	.probe = altera_spi_probe,
0b782531 TC	363	.driver = {
0b782531 TC	364	.name = DRV_NAME,
0b782531	365	.pm = NULL,
89f98dc5	366	.of_match_table = of_match_ptr(altera_spi_match),
0b782531	367	},
3820061d	368	.id_table = altera_spi_ids,
0b782531	369	};
940ab889	370	module_platform_driver(altera_spi_driver);
0b782531 TC	371
	372	MODULE_DESCRIPTION("Altera SPI driver");
	373	MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
	374	MODULE_LICENSE("GPL");
	375	MODULE_ALIAS("platform:" DRV_NAME);