Commit | Line | Data |
---|---|---|
8ae12a0d DB |
1 | # |
2 | # SPI driver configuration | |
3 | # | |
4 | # NOTE: the reason this doesn't show SPI slave support is mostly that | |
5 | # nobody's needed a slave side API yet. The master-role API is not | |
6 | # fully appropriate there, so it'd need some thought to do well. | |
7 | # | |
79d8c7a8 | 8 | menuconfig SPI |
8ae12a0d | 9 | bool "SPI support" |
79d8c7a8 | 10 | depends on HAS_IOMEM |
8ae12a0d DB |
11 | help |
12 | The "Serial Peripheral Interface" is a low level synchronous | |
13 | protocol. Chips that support SPI can have data transfer rates | |
14 | up to several tens of Mbit/sec. Chips are addressed with a | |
15 | controller and a chipselect. Most SPI slaves don't support | |
16 | dynamic device discovery; some are even write-only or read-only. | |
17 | ||
3cb2fccc | 18 | SPI is widely used by microcontrollers to talk with sensors, |
8ae12a0d DB |
19 | eeprom and flash memory, codecs and various other controller |
20 | chips, analog to digital (and d-to-a) converters, and more. | |
21 | MMC and SD cards can be accessed using SPI protocol; and for | |
22 | DataFlash cards used in MMC sockets, SPI must always be used. | |
23 | ||
24 | SPI is one of a family of similar protocols using a four wire | |
25 | interface (select, clock, data in, data out) including Microwire | |
26 | (half duplex), SSP, SSI, and PSP. This driver framework should | |
27 | work with most such devices and controllers. | |
28 | ||
79d8c7a8 AG |
29 | if SPI |
30 | ||
8ae12a0d | 31 | config SPI_DEBUG |
6341e62b | 32 | bool "Debug support for SPI drivers" |
79d8c7a8 | 33 | depends on DEBUG_KERNEL |
8ae12a0d DB |
34 | help |
35 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), | |
36 | sysfs, and debugfs support in SPI controller and protocol drivers. | |
37 | ||
38 | # | |
39 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers | |
40 | # | |
41 | ||
42 | config SPI_MASTER | |
6341e62b CJ |
43 | # bool "SPI Master Support" |
44 | bool | |
8ae12a0d DB |
45 | default SPI |
46 | help | |
47 | If your system has an master-capable SPI controller (which | |
48 | provides the clock and chipselect), you can enable that | |
49 | controller and the protocol drivers for the SPI slave chips | |
50 | that are connected. | |
51 | ||
6291fe2a RD |
52 | if SPI_MASTER |
53 | ||
8ae12a0d | 54 | comment "SPI Master Controller Drivers" |
8ae12a0d | 55 | |
0b782531 TC |
56 | config SPI_ALTERA |
57 | tristate "Altera SPI Controller" | |
58 | select SPI_BITBANG | |
59 | help | |
60 | This is the driver for the Altera SPI Controller. | |
61 | ||
8efaef4d GJ |
62 | config SPI_ATH79 |
63 | tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" | |
76ec9d18 | 64 | depends on ATH79 && GPIOLIB |
8efaef4d GJ |
65 | select SPI_BITBANG |
66 | help | |
67 | This enables support for the SPI controller present on the | |
68 | Atheros AR71XX/AR724X/AR913X SoCs. | |
69 | ||
754ce4f2 HS |
70 | config SPI_ATMEL |
71 | tristate "Atmel SPI Controller" | |
f59838a0 | 72 | depends on HAS_DMA |
dd1053a9 | 73 | depends on (ARCH_AT91 || AVR32 || COMPILE_TEST) |
754ce4f2 HS |
74 | help |
75 | This selects a driver for the Atmel SPI Controller, present on | |
76 | many AT32 (AVR32) and AT91 (ARM) chips. | |
77 | ||
f8043872 CB |
78 | config SPI_BCM2835 |
79 | tristate "BCM2835 SPI controller" | |
e0d58cdc | 80 | depends on GPIOLIB |
dd1053a9 | 81 | depends on ARCH_BCM2835 || COMPILE_TEST |
8844d0f1 | 82 | depends on GPIOLIB |
f8043872 CB |
83 | help |
84 | This selects a driver for the Broadcom BCM2835 SPI master. | |
85 | ||
86 | The BCM2835 contains two types of SPI master controller; the | |
87 | "universal SPI master", and the regular SPI controller. This driver | |
88 | is for the regular SPI controller. Slave mode operation is not also | |
89 | not supported. | |
90 | ||
22ac3e82 | 91 | config SPI_BFIN5XX |
a5f6abd4 | 92 | tristate "SPI controller driver for ADI Blackfin5xx" |
fa4bd4f1 | 93 | depends on BLACKFIN && !BF60x |
a5f6abd4 WB |
94 | help |
95 | This is the SPI controller master driver for Blackfin 5xx processor. | |
96 | ||
766e3721 SJ |
97 | config SPI_ADI_V3 |
98 | tristate "SPI controller v3 for ADI" | |
fa4bd4f1 SJ |
99 | depends on BF60x |
100 | help | |
101 | This is the SPI controller v3 master driver | |
102 | found on Blackfin 60x processor. | |
103 | ||
9c3e7375 CC |
104 | config SPI_BFIN_SPORT |
105 | tristate "SPI bus via Blackfin SPORT" | |
106 | depends on BLACKFIN | |
107 | help | |
108 | Enable support for a SPI bus via the Blackfin SPORT peripheral. | |
109 | ||
63bd2359 | 110 | config SPI_AU1550 |
809f36c6 | 111 | tristate "Au1550/Au1200/Au1300 SPI Controller" |
6d1f56aa | 112 | depends on MIPS_ALCHEMY |
63bd2359 JN |
113 | select SPI_BITBANG |
114 | help | |
115 | If you say yes to this option, support will be included for the | |
809f36c6 | 116 | PSC SPI controller found on Au1550, Au1200 and Au1300 series. |
63bd2359 | 117 | |
0fc6a323 RM |
118 | config SPI_BCM53XX |
119 | tristate "Broadcom BCM53xx SPI controller" | |
120 | depends on ARCH_BCM_5301X | |
933fc7b0 AL |
121 | depends on BCMA_POSSIBLE |
122 | select BCMA | |
0fc6a323 RM |
123 | help |
124 | Enable support for the SPI controller on Broadcom BCM53xx ARM SoCs. | |
125 | ||
b42dfed8 FF |
126 | config SPI_BCM63XX |
127 | tristate "Broadcom BCM63xx SPI controller" | |
128 | depends on BCM63XX | |
129 | help | |
130 | Enable support for the SPI controller on the Broadcom BCM63xx SoCs. | |
131 | ||
142168eb JG |
132 | config SPI_BCM63XX_HSSPI |
133 | tristate "Broadcom BCM63XX HS SPI controller driver" | |
134 | depends on BCM63XX || COMPILE_TEST | |
135 | help | |
136 | This enables support for the High Speed SPI controller present on | |
137 | newer Broadcom BCM63XX SoCs. | |
138 | ||
9904f22a | 139 | config SPI_BITBANG |
d29389de | 140 | tristate "Utilities for Bitbanging SPI masters" |
9904f22a DB |
141 | help |
142 | With a few GPIO pins, your system can bitbang the SPI protocol. | |
143 | Select this to get SPI support through I/O pins (GPIO, parallel | |
144 | port, etc). Or, some systems' SPI master controller drivers use | |
145 | this code to manage the per-word or per-transfer accesses to the | |
146 | hardware shift registers. | |
147 | ||
148 | This is library code, and is automatically selected by drivers that | |
149 | need it. You only need to select this explicitly to support driver | |
150 | modules that aren't part of this kernel tree. | |
8ae12a0d | 151 | |
7111763d DB |
152 | config SPI_BUTTERFLY |
153 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" | |
6291fe2a | 154 | depends on PARPORT |
7111763d DB |
155 | select SPI_BITBANG |
156 | help | |
157 | This uses a custom parallel port cable to connect to an AVR | |
158 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an | |
159 | inexpensive battery powered microcontroller evaluation board. | |
160 | This same cable can be used to flash new firmware. | |
161 | ||
c474b386 HK |
162 | config SPI_CADENCE |
163 | tristate "Cadence SPI controller" | |
c474b386 HK |
164 | help |
165 | This selects the Cadence SPI controller master driver | |
38b6484e | 166 | used by Xilinx Zynq and ZynqMP. |
c474b386 | 167 | |
161b96c3 AS |
168 | config SPI_CLPS711X |
169 | tristate "CLPS711X host SPI controller" | |
5634dd8b | 170 | depends on ARCH_CLPS711X || COMPILE_TEST |
161b96c3 AS |
171 | help |
172 | This enables dedicated general purpose SPI/Microwire1-compatible | |
173 | master mode interface (SSI1) for CLPS711X-based CPUs. | |
174 | ||
34b8c661 SK |
175 | config SPI_COLDFIRE_QSPI |
176 | tristate "Freescale Coldfire QSPI controller" | |
bce4d12b | 177 | depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) |
34b8c661 SK |
178 | help |
179 | This enables support for the Coldfire QSPI controller in master | |
180 | mode. | |
181 | ||
358934a6 | 182 | config SPI_DAVINCI |
23ce17ad | 183 | tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller" |
78848914 | 184 | depends on ARCH_DAVINCI || ARCH_KEYSTONE |
358934a6 SP |
185 | select SPI_BITBANG |
186 | help | |
23ce17ad SN |
187 | SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules. |
188 | ||
3d8c0d74 LP |
189 | config SPI_DLN2 |
190 | tristate "Diolan DLN-2 USB SPI adapter" | |
191 | depends on MFD_DLN2 | |
192 | help | |
193 | If you say yes to this option, support will be included for Diolan | |
194 | DLN2, a USB to SPI interface. | |
195 | ||
196 | This driver can also be built as a module. If so, the module | |
197 | will be called spi-dln2. | |
198 | ||
86f8973c UKK |
199 | config SPI_EFM32 |
200 | tristate "EFM32 SPI controller" | |
201 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) | |
202 | select SPI_BITBANG | |
203 | help | |
204 | Driver for the spi controller found on Energy Micro's EFM32 SoCs. | |
205 | ||
011f23a3 MW |
206 | config SPI_EP93XX |
207 | tristate "Cirrus Logic EP93xx SPI controller" | |
f59838a0 | 208 | depends on HAS_DMA |
dd1053a9 | 209 | depends on ARCH_EP93XX || COMPILE_TEST |
011f23a3 MW |
210 | help |
211 | This enables using the Cirrus EP93xx SPI controller in master | |
212 | mode. | |
213 | ||
6cd3c7e2 TL |
214 | config SPI_FALCON |
215 | tristate "Falcon SPI controller support" | |
216 | depends on SOC_FALCON | |
217 | help | |
218 | The external bus unit (EBU) found on the FALC-ON SoC has SPI | |
219 | emulation that is designed for serial flash access. This driver | |
220 | has only been tested with m25p80 type chips. The hardware has no | |
221 | support for other types of SPI peripherals. | |
222 | ||
d29389de DB |
223 | config SPI_GPIO |
224 | tristate "GPIO-based bitbanging SPI Master" | |
5c2301a9 | 225 | depends on GPIOLIB || COMPILE_TEST |
d29389de DB |
226 | select SPI_BITBANG |
227 | help | |
228 | This simple GPIO bitbanging SPI master uses the arch-neutral GPIO | |
229 | interface to manage MOSI, MISO, SCK, and chipselect signals. SPI | |
230 | slaves connected to a bus using this driver are configured as usual, | |
231 | except that the spi_board_info.controller_data holds the GPIO number | |
232 | for the chipselect used by this controller driver. | |
233 | ||
234 | Note that this driver often won't achieve even 1 Mbit/sec speeds, | |
235 | making it unusually slow for SPI. If your platform can inline | |
236 | GPIO operations, you should be able to leverage that for better | |
237 | speed with a custom version of this driver; see the source code. | |
238 | ||
deba2580 AB |
239 | config SPI_IMG_SPFI |
240 | tristate "IMG SPFI controller" | |
241 | depends on MIPS || COMPILE_TEST | |
242 | help | |
243 | This enables support for the SPFI master controller found on | |
244 | IMG SoCs. | |
245 | ||
b5f3294f SH |
246 | config SPI_IMX |
247 | tristate "Freescale i.MX SPI controllers" | |
dd1053a9 | 248 | depends on ARCH_MXC || COMPILE_TEST |
b5f3294f SH |
249 | select SPI_BITBANG |
250 | help | |
251 | This enables using the Freescale i.MX SPI controllers in master | |
252 | mode. | |
253 | ||
78961a57 KB |
254 | config SPI_LM70_LLP |
255 | tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" | |
6d1f56aa | 256 | depends on PARPORT |
78961a57 KB |
257 | select SPI_BITBANG |
258 | help | |
259 | This driver supports the NS LM70 LLP Evaluation Board, | |
260 | which interfaces to an LM70 temperature sensor using | |
261 | a parallel port. | |
262 | ||
42bbb709 GL |
263 | config SPI_MPC52xx |
264 | tristate "Freescale MPC52xx SPI (non-PSC) controller support" | |
7433f2b7 | 265 | depends on PPC_MPC52xx |
42bbb709 GL |
266 | help |
267 | This drivers supports the MPC52xx SPI controller in master SPI | |
268 | mode. | |
269 | ||
00b8fd23 DC |
270 | config SPI_MPC52xx_PSC |
271 | tristate "Freescale MPC52xx PSC SPI controller" | |
6d1f56aa | 272 | depends on PPC_MPC52xx |
00b8fd23 DC |
273 | help |
274 | This enables using the Freescale MPC52xx Programmable Serial | |
275 | Controller in master SPI mode. | |
276 | ||
6e27388f AG |
277 | config SPI_MPC512x_PSC |
278 | tristate "Freescale MPC512x PSC SPI controller" | |
5e8afa34 | 279 | depends on PPC_MPC512x |
6e27388f AG |
280 | help |
281 | This enables using the Freescale MPC5121 Programmable Serial | |
282 | Controller in SPI master mode. | |
283 | ||
b36ece83 | 284 | config SPI_FSL_LIB |
e8beacbb AL |
285 | tristate |
286 | depends on OF | |
287 | ||
288 | config SPI_FSL_CPM | |
b36ece83 MH |
289 | tristate |
290 | depends on FSL_SOC | |
291 | ||
3272029f | 292 | config SPI_FSL_SPI |
38455d7a | 293 | tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller" |
e8beacbb | 294 | depends on OF |
b36ece83 | 295 | select SPI_FSL_LIB |
e8beacbb | 296 | select SPI_FSL_CPM if FSL_SOC |
ccf06998 | 297 | help |
3272029f MH |
298 | This enables using the Freescale SPI controllers in master mode. |
299 | MPC83xx platform uses the controller in cpu mode or CPM/QE mode. | |
300 | MPC8569 uses the controller in QE mode, MPC8610 in cpu mode. | |
447b0c7b AL |
301 | This also enables using the Aeroflex Gaisler GRLIB SPI controller in |
302 | master mode. | |
ccf06998 | 303 | |
349ad66c CF |
304 | config SPI_FSL_DSPI |
305 | tristate "Freescale DSPI controller" | |
1acbdeb9 | 306 | select REGMAP_MMIO |
50574dd2 | 307 | depends on SOC_VF610 || SOC_LS1021A || COMPILE_TEST |
349ad66c CF |
308 | help |
309 | This enables support for the Freescale DSPI controller in master | |
310 | mode. VF610 platform uses the controller. | |
311 | ||
8b60d6c2 | 312 | config SPI_FSL_ESPI |
38455d7a | 313 | tristate "Freescale eSPI controller" |
8b60d6c2 MH |
314 | depends on FSL_SOC |
315 | select SPI_FSL_LIB | |
316 | help | |
317 | This enables using the Freescale eSPI controllers in master mode. | |
318 | From MPC8536, 85xx platform uses the controller, and all P10xx, | |
319 | P20xx, P30xx,P40xx, P50xx uses this controller. | |
320 | ||
c3e4bc54 BG |
321 | config SPI_MESON_SPIFC |
322 | tristate "Amlogic Meson SPIFC controller" | |
323 | depends on ARCH_MESON || COMPILE_TEST | |
1327ecd4 | 324 | select REGMAP_MMIO |
c3e4bc54 BG |
325 | help |
326 | This enables master mode support for the SPIFC (SPI flash | |
327 | controller) available in Amlogic Meson SoCs. | |
328 | ||
ce792580 TC |
329 | config SPI_OC_TINY |
330 | tristate "OpenCores tiny SPI" | |
5c2301a9 | 331 | depends on GPIOLIB || COMPILE_TEST |
ce792580 TC |
332 | select SPI_BITBANG |
333 | help | |
334 | This is the driver for OpenCores tiny SPI master controller. | |
335 | ||
6b52c00f DD |
336 | config SPI_OCTEON |
337 | tristate "Cavium OCTEON SPI controller" | |
9ddebc46 | 338 | depends on CAVIUM_OCTEON_SOC |
6b52c00f DD |
339 | help |
340 | SPI host driver for the hardware found on some Cavium OCTEON | |
341 | SOCs. | |
342 | ||
fdb3c18d DB |
343 | config SPI_OMAP_UWIRE |
344 | tristate "OMAP1 MicroWire" | |
6291fe2a | 345 | depends on ARCH_OMAP1 |
fdb3c18d DB |
346 | select SPI_BITBANG |
347 | help | |
348 | This hooks up to the MicroWire controller on OMAP1 chips. | |
349 | ||
ccdc7bf9 | 350 | config SPI_OMAP24XX |
8ebeb545 | 351 | tristate "McSPI driver for OMAP" |
f59838a0 | 352 | depends on HAS_DMA |
f6ab395b | 353 | depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH |
dd1053a9 | 354 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
ccdc7bf9 | 355 | help |
8ebeb545 | 356 | SPI master controller for OMAP24XX and later Multichannel SPI |
ccdc7bf9 | 357 | (McSPI) modules. |
69c202af | 358 | |
505a1495 SP |
359 | config SPI_TI_QSPI |
360 | tristate "DRA7xxx QSPI controller support" | |
361 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
362 | help | |
363 | QSPI master controller for DRA7xxx used for flash devices. | |
364 | This device supports single, dual and quad read support, while | |
365 | it only supports single write mode. | |
366 | ||
35c9049b CM |
367 | config SPI_OMAP_100K |
368 | tristate "OMAP SPI 100K" | |
dd1053a9 | 369 | depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST |
35c9049b CM |
370 | help |
371 | OMAP SPI 100K master controller for omap7xx boards. | |
372 | ||
60cadec9 | 373 | config SPI_ORION |
6d1f56aa | 374 | tristate "Orion SPI master" |
dd1053a9 | 375 | depends on PLAT_ORION || COMPILE_TEST |
60cadec9 SA |
376 | help |
377 | This enables using the SPI master controller on the Orion chips. | |
378 | ||
b43d65f7 | 379 | config SPI_PL022 |
7f9a4b97 LW |
380 | tristate "ARM AMBA PL022 SSP controller" |
381 | depends on ARM_AMBA | |
b43d65f7 | 382 | default y if MACH_U300 |
f33b29ee | 383 | default y if ARCH_REALVIEW |
384 | default y if INTEGRATOR_IMPD1 | |
385 | default y if ARCH_VERSATILE | |
b43d65f7 LW |
386 | help |
387 | This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP | |
388 | controller. If you have an embedded system with an AMBA(R) | |
389 | bus and a PL022 controller, say Y or M here. | |
390 | ||
44dab88e SF |
391 | config SPI_PPC4xx |
392 | tristate "PPC4xx SPI Controller" | |
5e8afa34 | 393 | depends on PPC32 && 4xx |
44dab88e SF |
394 | select SPI_BITBANG |
395 | help | |
396 | This selects a driver for the PPC4xx SPI Controller. | |
397 | ||
5928808e MW |
398 | config SPI_PXA2XX_DMA |
399 | def_bool y | |
6356437e | 400 | depends on SPI_PXA2XX |
cd7bed00 | 401 | |
e0c9905e SS |
402 | config SPI_PXA2XX |
403 | tristate "PXA2xx SSP SPI master" | |
0244ad00 | 404 | depends on (ARCH_PXA || PCI || ACPI) |
d6ea3df0 | 405 | select PXA_SSP if ARCH_PXA |
e0c9905e | 406 | help |
d6ea3df0 SAS |
407 | This enables using a PXA2xx or Sodaville SSP port as a SPI master |
408 | controller. The driver can be configured to use any SSP port and | |
409 | additional documentation can be found a Documentation/spi/pxa2xx. | |
410 | ||
411 | config SPI_PXA2XX_PCI | |
afa93c90 | 412 | def_tristate SPI_PXA2XX && PCI && COMMON_CLK |
e0c9905e | 413 | |
64e36824 | 414 | config SPI_ROCKCHIP |
415 | tristate "Rockchip SPI controller driver" | |
c1536908 | 416 | depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH |
64e36824 | 417 | help |
418 | This selects a driver for Rockchip SPI controller. | |
419 | ||
420 | If you say yes to this option, support will be included for | |
421 | RK3066, RK3188 and RK3288 families of SPI controller. | |
422 | Rockchip SPI controller support DMA transport and PIO mode. | |
423 | The main usecase of this controller is to use spi flash as boot | |
424 | device. | |
425 | ||
05aec357 BV |
426 | config SPI_RB4XX |
427 | tristate "Mikrotik RB4XX SPI master" | |
428 | depends on SPI_MASTER && ATH79 | |
429 | help | |
430 | SPI controller driver for the Mikrotik RB4xx series boards. | |
431 | ||
0b2182dd | 432 | config SPI_RSPI |
e290c343 | 433 | tristate "Renesas RSPI/QSPI controller" |
533465a8 | 434 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
0b2182dd | 435 | help |
e290c343 | 436 | SPI driver for Renesas RSPI and QSPI blocks. |
0b2182dd | 437 | |
64ff247a II |
438 | config SPI_QUP |
439 | tristate "Qualcomm SPI controller with QUP interface" | |
058f11c8 | 440 | depends on ARCH_QCOM || (ARM && COMPILE_TEST) |
64ff247a II |
441 | help |
442 | Qualcomm Universal Peripheral (QUP) core is an AHB slave that | |
443 | provides a common data path (an output FIFO and an input FIFO) | |
444 | for serial peripheral interface (SPI) mini-core. SPI in master | |
445 | mode supports up to 50MHz, up to four chip selects, programmable | |
446 | data path from 4 bits to 32 bits and numerous protocol variants. | |
447 | ||
448 | This driver can also be built as a module. If so, the module | |
449 | will be called spi_qup. | |
0b2182dd | 450 | |
85abfaa7 DB |
451 | config SPI_S3C24XX |
452 | tristate "Samsung S3C24XX series SPI" | |
6d1f56aa | 453 | depends on ARCH_S3C24XX |
da0abc27 | 454 | select SPI_BITBANG |
85abfaa7 DB |
455 | help |
456 | SPI driver for Samsung S3C24XX series ARM SoCs | |
457 | ||
bec0806c BD |
458 | config SPI_S3C24XX_FIQ |
459 | bool "S3C24XX driver with FIQ pseudo-DMA" | |
460 | depends on SPI_S3C24XX | |
461 | select FIQ | |
462 | help | |
463 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | |
464 | DMA by using the fast-interrupt request framework, This allows | |
465 | the driver to get DMA-like performance when there are either | |
466 | no free DMA channels, or when doing transfers that required both | |
467 | TX and RX data paths. | |
468 | ||
230d42d4 JB |
469 | config SPI_S3C64XX |
470 | tristate "Samsung S3C64XX series type SPI" | |
bf77cba9 | 471 | depends on (PLAT_SAMSUNG || ARCH_EXYNOS) |
230d42d4 JB |
472 | help |
473 | SPI driver for Samsung S3C64XX and newer SoCs. | |
474 | ||
3ce8859e GR |
475 | config SPI_SC18IS602 |
476 | tristate "NXP SC18IS602/602B/603 I2C to SPI bridge" | |
477 | depends on I2C | |
478 | help | |
479 | SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge. | |
480 | ||
8051effc MD |
481 | config SPI_SH_MSIOF |
482 | tristate "SuperH MSIOF SPI controller" | |
51fd5090 | 483 | depends on HAVE_CLK && HAS_DMA |
7ad35442 | 484 | depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST |
8051effc | 485 | help |
746aeffd | 486 | SPI driver for SuperH and SH Mobile MSIOF blocks. |
8051effc | 487 | |
5c05dd07 YS |
488 | config SPI_SH |
489 | tristate "SuperH SPI controller" | |
dd1053a9 | 490 | depends on SUPERH || COMPILE_TEST |
5c05dd07 YS |
491 | help |
492 | SPI driver for SuperH SPI blocks. | |
493 | ||
37e46640 MD |
494 | config SPI_SH_SCI |
495 | tristate "SuperH SCI SPI controller" | |
6291fe2a | 496 | depends on SUPERH |
37e46640 MD |
497 | select SPI_BITBANG |
498 | help | |
499 | SPI driver for SuperH SCI blocks. | |
500 | ||
d1c8bbd7 KM |
501 | config SPI_SH_HSPI |
502 | tristate "SuperH HSPI controller" | |
dd1053a9 | 503 | depends on ARCH_SHMOBILE || COMPILE_TEST |
d1c8bbd7 KM |
504 | help |
505 | SPI driver for SuperH HSPI blocks. | |
506 | ||
1cc2df9d ZS |
507 | config SPI_SIRF |
508 | tristate "CSR SiRFprimaII SPI controller" | |
7668c294 | 509 | depends on SIRF_DMA |
1cc2df9d ZS |
510 | select SPI_BITBANG |
511 | help | |
512 | SPI driver for CSR SiRFprimaII SoCs | |
513 | ||
9e862375 LJ |
514 | config SPI_ST_SSC4 |
515 | tristate "STMicroelectronics SPI SSC-based driver" | |
516 | depends on ARCH_STI | |
517 | help | |
518 | STMicroelectronics SoCs support for SPI. If you say yes to | |
519 | this option, support will be included for the SSC driven SPI. | |
520 | ||
b5f65179 MR |
521 | config SPI_SUN4I |
522 | tristate "Allwinner A10 SoCs SPI controller" | |
523 | depends on ARCH_SUNXI || COMPILE_TEST | |
524 | help | |
525 | SPI driver for Allwinner sun4i, sun5i and sun7i SoCs | |
526 | ||
3558fe90 MR |
527 | config SPI_SUN6I |
528 | tristate "Allwinner A31 SPI controller" | |
529 | depends on ARCH_SUNXI || COMPILE_TEST | |
7961656a | 530 | depends on RESET_CONTROLLER |
3558fe90 MR |
531 | help |
532 | This enables using the SPI controller on the Allwinner A31 SoCs. | |
533 | ||
646781d3 MV |
534 | config SPI_MXS |
535 | tristate "Freescale MXS SPI controller" | |
536 | depends on ARCH_MXS | |
537 | select STMP_DEVICE | |
538 | help | |
539 | SPI driver for Freescale MXS devices. | |
540 | ||
f333a331 LD |
541 | config SPI_TEGRA114 |
542 | tristate "NVIDIA Tegra114 SPI Controller" | |
dd1053a9 | 543 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
f59838a0 | 544 | depends on RESET_CONTROLLER && HAS_DMA |
f333a331 LD |
545 | help |
546 | SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller | |
547 | is different than the older SoCs SPI controller and also register interface | |
548 | get changed with this controller. | |
549 | ||
8528547b LD |
550 | config SPI_TEGRA20_SFLASH |
551 | tristate "Nvidia Tegra20 Serial flash Controller" | |
dd1053a9 | 552 | depends on ARCH_TEGRA || COMPILE_TEST |
ff2251e3 | 553 | depends on RESET_CONTROLLER |
8528547b LD |
554 | help |
555 | SPI driver for Nvidia Tegra20 Serial flash Controller interface. | |
556 | The main usecase of this controller is to use spi flash as boot | |
557 | device. | |
558 | ||
dc4dc360 LD |
559 | config SPI_TEGRA20_SLINK |
560 | tristate "Nvidia Tegra20/Tegra30 SLINK Controller" | |
dd1053a9 | 561 | depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST |
f59838a0 | 562 | depends on RESET_CONTROLLER && HAS_DMA |
dc4dc360 LD |
563 | help |
564 | SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface. | |
565 | ||
e8b17b5b | 566 | config SPI_TOPCLIFF_PCH |
92b3a5c1 | 567 | tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI" |
2b16069a | 568 | depends on PCI && (X86_32 || COMPILE_TEST) |
e8b17b5b | 569 | help |
cdbc8f04 GL |
570 | SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus |
571 | used in some x86 embedded processors. | |
e8b17b5b | 572 | |
92b3a5c1 TM |
573 | This driver also supports the ML7213/ML7223/ML7831, a companion chip |
574 | for the Atom E6xx series and compatible with the Intel EG20T PCH. | |
f016aeb6 | 575 | |
f2cac67d AN |
576 | config SPI_TXX9 |
577 | tristate "Toshiba TXx9 SPI controller" | |
dd1053a9 | 578 | depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST) |
f2cac67d AN |
579 | help |
580 | SPI driver for Toshiba TXx9 MIPS SoCs | |
581 | ||
b3165900 LPC |
582 | config SPI_XCOMM |
583 | tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver" | |
584 | depends on I2C | |
585 | help | |
586 | Support for the SPI-I2C bridge found on the Analog Devices | |
587 | AD-FMCOMMS1-EBZ board. | |
588 | ||
ae918c02 | 589 | config SPI_XILINX |
c9da2e12 | 590 | tristate "Xilinx SPI controller common module" |
6d1f56aa | 591 | depends on HAS_IOMEM |
ae918c02 AK |
592 | select SPI_BITBANG |
593 | help | |
594 | This exposes the SPI controller IP from the Xilinx EDK. | |
595 | ||
596 | See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" | |
597 | Product Specification document (DS464) for hardware details. | |
598 | ||
c9da2e12 RR |
599 | Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" |
600 | ||
6840cc29 MF |
601 | config SPI_XTENSA_XTFPGA |
602 | tristate "Xtensa SPI controller for xtfpga" | |
be8dde46 | 603 | depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST |
6840cc29 MF |
604 | select SPI_BITBANG |
605 | help | |
606 | SPI driver for xtfpga SPI master controller. | |
607 | ||
608 | This simple SPI master controller is built into xtfpga bitstreams | |
609 | and is used to control daughterboard audio codec. It always transfers | |
610 | 16 bit words in SPI mode 0, automatically asserting CS on transfer | |
611 | start and deasserting on end. | |
612 | ||
dfe11a11 RW |
613 | config SPI_ZYNQMP_GQSPI |
614 | tristate "Xilinx ZynqMP GQSPI controller" | |
2e1c75f4 | 615 | depends on SPI_MASTER && HAS_DMA |
dfe11a11 RW |
616 | help |
617 | Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC. | |
618 | ||
30eaed05 WZ |
619 | config SPI_NUC900 |
620 | tristate "Nuvoton NUC900 series SPI" | |
6d1f56aa | 621 | depends on ARCH_W90X900 |
30eaed05 WZ |
622 | select SPI_BITBANG |
623 | help | |
624 | SPI driver for Nuvoton NUC900 series ARM SoCs | |
625 | ||
8ae12a0d DB |
626 | # |
627 | # Add new SPI master controllers in alphabetical order above this line | |
628 | # | |
629 | ||
e24c7452 | 630 | config SPI_DESIGNWARE |
8ca8d15a | 631 | tristate "DesignWare SPI controller core support" |
e24c7452 FT |
632 | help |
633 | general driver for SPI controller core from DesignWare | |
634 | ||
635 | config SPI_DW_PCI | |
636 | tristate "PCI interface driver for DW SPI core" | |
637 | depends on SPI_DESIGNWARE && PCI | |
638 | ||
7063c0d9 | 639 | config SPI_DW_MID_DMA |
ea092455 | 640 | bool "DMA support for DW SPI controller on Intel MID platform" |
d744f826 | 641 | depends on SPI_DW_PCI && DW_DMAC_PCI |
7063c0d9 | 642 | |
f7b6fd6d JHD |
643 | config SPI_DW_MMIO |
644 | tristate "Memory-mapped io interface driver for DW SPI core" | |
794f61a3 | 645 | depends on SPI_DESIGNWARE |
f7b6fd6d | 646 | |
8ae12a0d DB |
647 | # |
648 | # There are lots of SPI device types, with sensors and memory | |
649 | # being probably the most widely used ones. | |
650 | # | |
651 | comment "SPI Protocol Masters" | |
8ae12a0d | 652 | |
814a8d50 AP |
653 | config SPI_SPIDEV |
654 | tristate "User mode SPI device driver support" | |
814a8d50 AP |
655 | help |
656 | This supports user mode SPI protocol drivers. | |
657 | ||
658 | Note that this application programming interface is EXPERIMENTAL | |
659 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. | |
660 | ||
447aef1a BD |
661 | config SPI_TLE62X0 |
662 | tristate "Infineon TLE62X0 (for power switching)" | |
6291fe2a | 663 | depends on SYSFS |
447aef1a BD |
664 | help |
665 | SPI driver for Infineon TLE62X0 series line driver chips, | |
666 | such as the TLE6220, TLE6230 and TLE6240. This provides a | |
667 | sysfs interface, with each line presented as a kind of GPIO | |
668 | exposing both switch control and diagnostic feedback. | |
669 | ||
8ae12a0d DB |
670 | # |
671 | # Add new SPI protocol masters in alphabetical order above this line | |
672 | # | |
673 | ||
6291fe2a RD |
674 | endif # SPI_MASTER |
675 | ||
8ae12a0d DB |
676 | # (slave support would go here) |
677 | ||
79d8c7a8 | 678 | endif # SPI |