soundwire: remove SDW_REG_SHIFT()
[linux-block.git] / drivers / soundwire / stream.c
CommitLineData
89e59053
SK
1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
f8101c74 14#include <linux/soundwire/sdw_registers.h>
89e59053 15#include <linux/soundwire/sdw.h>
4550569b 16#include <sound/soc.h>
89e59053
SK
17#include "bus.h"
18
99b8a5d6
SK
19/*
20 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
21 *
22 * The rows are arranged as per the array index value programmed
23 * in register. The index 15 has dummy value 0 in order to fill hole.
24 */
fe4b70f2 25int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
99b8a5d6
SK
26 96, 100, 120, 128, 150, 160, 250, 0,
27 192, 200, 240, 256, 72, 144, 90, 180};
28
fe4b70f2 29int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
99b8a5d6 30
fe4b70f2 31int sdw_find_col_index(int col)
99b8a5d6
SK
32{
33 int i;
34
35 for (i = 0; i < SDW_FRAME_COLS; i++) {
fe4b70f2 36 if (sdw_cols[i] == col)
99b8a5d6
SK
37 return i;
38 }
39
40 pr_warn("Requested column not found, selecting lowest column no: 2\n");
41 return 0;
42}
fe4b70f2 43EXPORT_SYMBOL(sdw_find_col_index);
99b8a5d6 44
fe4b70f2 45int sdw_find_row_index(int row)
99b8a5d6
SK
46{
47 int i;
48
49 for (i = 0; i < SDW_FRAME_ROWS; i++) {
fe4b70f2 50 if (sdw_rows[i] == row)
99b8a5d6
SK
51 return i;
52 }
53
54 pr_warn("Requested row not found, selecting lowest row no: 48\n");
55 return 0;
56}
fe4b70f2 57EXPORT_SYMBOL(sdw_find_row_index);
897fe40e 58
f8101c74 59static int _sdw_program_slave_port_params(struct sdw_bus *bus,
1fe74a5e
PLB
60 struct sdw_slave *slave,
61 struct sdw_transport_params *t_params,
62 enum sdw_dpn_type type)
f8101c74
SK
63{
64 u32 addr1, addr2, addr3, addr4;
65 int ret;
66 u16 wbuf;
67
68 if (bus->params.next_bank) {
69 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
70 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
71 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
72 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
73 } else {
74 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
75 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
76 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
77 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
78 }
79
80 /* Program DPN_OffsetCtrl2 registers */
81 ret = sdw_write(slave, addr1, t_params->offset2);
82 if (ret < 0) {
17ed5bef 83 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
f8101c74
SK
84 return ret;
85 }
86
87 /* Program DPN_BlockCtrl3 register */
88 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
89 if (ret < 0) {
17ed5bef 90 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
f8101c74
SK
91 return ret;
92 }
93
94 /*
95 * Data ports are FULL, SIMPLE and REDUCED. This function handles
7d3b3cdf 96 * FULL and REDUCED only and beyond this point only FULL is
f8101c74
SK
97 * handled, so bail out if we are not FULL data port type
98 */
99 if (type != SDW_DPN_FULL)
100 return ret;
101
102 /* Program DPN_SampleCtrl2 register */
41ff9174 103 wbuf = FIELD_GET(SDW_DPN_SAMPLECTRL_HIGH, t_params->sample_interval - 1);
f8101c74
SK
104
105 ret = sdw_write(slave, addr3, wbuf);
106 if (ret < 0) {
17ed5bef 107 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
f8101c74
SK
108 return ret;
109 }
110
111 /* Program DPN_HCtrl register */
41ff9174
VK
112 wbuf = FIELD_PREP(SDW_DPN_HCTRL_HSTART, t_params->hstart);
113 wbuf |= FIELD_PREP(SDW_DPN_HCTRL_HSTOP, t_params->hstop);
f8101c74
SK
114
115 ret = sdw_write(slave, addr4, wbuf);
116 if (ret < 0)
17ed5bef 117 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
f8101c74
SK
118
119 return ret;
120}
121
122static int sdw_program_slave_port_params(struct sdw_bus *bus,
1fe74a5e
PLB
123 struct sdw_slave_runtime *s_rt,
124 struct sdw_port_runtime *p_rt)
f8101c74
SK
125{
126 struct sdw_transport_params *t_params = &p_rt->transport_params;
127 struct sdw_port_params *p_params = &p_rt->port_params;
128 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
129 u32 addr1, addr2, addr3, addr4, addr5, addr6;
130 struct sdw_dpn_prop *dpn_prop;
131 int ret;
132 u8 wbuf;
133
134 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
1fe74a5e
PLB
135 s_rt->direction,
136 t_params->port_num);
f8101c74
SK
137 if (!dpn_prop)
138 return -EINVAL;
139
140 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
141 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
142
143 if (bus->params.next_bank) {
144 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
145 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
146 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
147 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
148
149 } else {
150 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
151 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
152 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
153 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
154 }
155
156 /* Program DPN_PortCtrl register */
41ff9174
VK
157 wbuf = FIELD_PREP(SDW_DPN_PORTCTRL_DATAMODE, p_params->data_mode);
158 wbuf |= FIELD_PREP(SDW_DPN_PORTCTRL_FLOWMODE, p_params->flow_mode);
f8101c74
SK
159
160 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
161 if (ret < 0) {
162 dev_err(&s_rt->slave->dev,
17ed5bef 163 "DPN_PortCtrl register write failed for port %d\n",
f8101c74
SK
164 t_params->port_num);
165 return ret;
166 }
167
a9107de4
SK
168 if (!dpn_prop->read_only_wordlength) {
169 /* Program DPN_BlockCtrl1 register */
170 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
171 if (ret < 0) {
172 dev_err(&s_rt->slave->dev,
173 "DPN_BlockCtrl1 register write failed for port %d\n",
174 t_params->port_num);
175 return ret;
176 }
f8101c74
SK
177 }
178
179 /* Program DPN_SampleCtrl1 register */
180 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
181 ret = sdw_write(s_rt->slave, addr3, wbuf);
182 if (ret < 0) {
183 dev_err(&s_rt->slave->dev,
17ed5bef 184 "DPN_SampleCtrl1 register write failed for port %d\n",
f8101c74
SK
185 t_params->port_num);
186 return ret;
187 }
188
189 /* Program DPN_OffsetCtrl1 registers */
190 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
191 if (ret < 0) {
192 dev_err(&s_rt->slave->dev,
17ed5bef 193 "DPN_OffsetCtrl1 register write failed for port %d\n",
f8101c74
SK
194 t_params->port_num);
195 return ret;
196 }
197
198 /* Program DPN_BlockCtrl2 register*/
199 if (t_params->blk_grp_ctrl_valid) {
200 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
201 if (ret < 0) {
202 dev_err(&s_rt->slave->dev,
17ed5bef 203 "DPN_BlockCtrl2 reg write failed for port %d\n",
f8101c74
SK
204 t_params->port_num);
205 return ret;
206 }
207 }
208
209 /* program DPN_LaneCtrl register */
210 if (slave_prop->lane_control_support) {
211 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
212 if (ret < 0) {
213 dev_err(&s_rt->slave->dev,
17ed5bef 214 "DPN_LaneCtrl register write failed for port %d\n",
f8101c74
SK
215 t_params->port_num);
216 return ret;
217 }
218 }
219
220 if (dpn_prop->type != SDW_DPN_SIMPLE) {
221 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
1fe74a5e 222 t_params, dpn_prop->type);
f8101c74
SK
223 if (ret < 0)
224 dev_err(&s_rt->slave->dev,
17ed5bef 225 "Transport reg write failed for port: %d\n",
f8101c74
SK
226 t_params->port_num);
227 }
228
229 return ret;
230}
231
232static int sdw_program_master_port_params(struct sdw_bus *bus,
1fe74a5e 233 struct sdw_port_runtime *p_rt)
f8101c74
SK
234{
235 int ret;
236
237 /*
238 * we need to set transport and port parameters for the port.
7d3b3cdf 239 * Transport parameters refers to the sample interval, offsets and
f8101c74
SK
240 * hstart/stop etc of the data. Port parameters refers to word
241 * length, flow mode etc of the port
242 */
243 ret = bus->port_ops->dpn_set_port_transport_params(bus,
244 &p_rt->transport_params,
245 bus->params.next_bank);
246 if (ret < 0)
247 return ret;
248
249 return bus->port_ops->dpn_set_port_params(bus,
1fe74a5e
PLB
250 &p_rt->port_params,
251 bus->params.next_bank);
f8101c74
SK
252}
253
254/**
255 * sdw_program_port_params() - Programs transport parameters of Master(s)
256 * and Slave(s)
257 *
258 * @m_rt: Master stream runtime
259 */
260static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
261{
262 struct sdw_slave_runtime *s_rt = NULL;
263 struct sdw_bus *bus = m_rt->bus;
264 struct sdw_port_runtime *p_rt;
265 int ret = 0;
266
267 /* Program transport & port parameters for Slave(s) */
268 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
269 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
270 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
271 if (ret < 0)
272 return ret;
273 }
274 }
275
276 /* Program transport & port parameters for Master(s) */
277 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
278 ret = sdw_program_master_port_params(bus, p_rt);
279 if (ret < 0)
280 return ret;
281 }
282
283 return 0;
284}
285
79df15b7
SK
286/**
287 * sdw_enable_disable_slave_ports: Enable/disable slave data port
288 *
289 * @bus: bus instance
290 * @s_rt: slave runtime
291 * @p_rt: port runtime
292 * @en: enable or disable operation
293 *
294 * This function only sets the enable/disable bits in the relevant bank, the
295 * actual enable/disable is done with a bank switch
296 */
297static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
1fe74a5e
PLB
298 struct sdw_slave_runtime *s_rt,
299 struct sdw_port_runtime *p_rt,
300 bool en)
79df15b7
SK
301{
302 struct sdw_transport_params *t_params = &p_rt->transport_params;
303 u32 addr;
304 int ret;
305
306 if (bus->params.next_bank)
307 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
308 else
309 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
310
311 /*
312 * Since bus doesn't support sharing a port across two streams,
313 * it is safe to reset this register
314 */
315 if (en)
0b43fef9 316 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
79df15b7 317 else
0b43fef9 318 ret = sdw_write(s_rt->slave, addr, 0x0);
79df15b7
SK
319
320 if (ret < 0)
321 dev_err(&s_rt->slave->dev,
17ed5bef 322 "Slave chn_en reg write failed:%d port:%d\n",
79df15b7
SK
323 ret, t_params->port_num);
324
325 return ret;
326}
327
328static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
1fe74a5e
PLB
329 struct sdw_port_runtime *p_rt,
330 bool en)
79df15b7
SK
331{
332 struct sdw_transport_params *t_params = &p_rt->transport_params;
333 struct sdw_bus *bus = m_rt->bus;
334 struct sdw_enable_ch enable_ch;
a25eab29 335 int ret;
79df15b7
SK
336
337 enable_ch.port_num = p_rt->num;
338 enable_ch.ch_mask = p_rt->ch_mask;
339 enable_ch.enable = en;
340
341 /* Perform Master port channel(s) enable/disable */
342 if (bus->port_ops->dpn_port_enable_ch) {
343 ret = bus->port_ops->dpn_port_enable_ch(bus,
1fe74a5e
PLB
344 &enable_ch,
345 bus->params.next_bank);
79df15b7
SK
346 if (ret < 0) {
347 dev_err(bus->dev,
17ed5bef 348 "Master chn_en write failed:%d port:%d\n",
79df15b7
SK
349 ret, t_params->port_num);
350 return ret;
351 }
352 } else {
353 dev_err(bus->dev,
354 "dpn_port_enable_ch not supported, %s failed\n",
355 en ? "enable" : "disable");
356 return -EINVAL;
357 }
358
359 return 0;
360}
361
362/**
363 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
364 * Slave(s)
365 *
366 * @m_rt: Master stream runtime
367 * @en: mode (enable/disable)
368 */
369static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
370{
371 struct sdw_port_runtime *s_port, *m_port;
3a0be1a6 372 struct sdw_slave_runtime *s_rt;
79df15b7
SK
373 int ret = 0;
374
375 /* Enable/Disable Slave port(s) */
376 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
377 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
378 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
1fe74a5e 379 s_port, en);
79df15b7
SK
380 if (ret < 0)
381 return ret;
382 }
383 }
384
385 /* Enable/Disable Master port(s) */
386 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
387 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
388 if (ret < 0)
389 return ret;
390 }
391
392 return 0;
393}
394
395static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
1fe74a5e
PLB
396 struct sdw_prepare_ch prep_ch,
397 enum sdw_port_prep_ops cmd)
79df15b7
SK
398{
399 const struct sdw_slave_ops *ops = s_rt->slave->ops;
400 int ret;
401
402 if (ops->port_prep) {
403 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
404 if (ret < 0) {
405 dev_err(&s_rt->slave->dev,
62f0cec3
VK
406 "Slave Port Prep cmd %d failed: %d\n",
407 cmd, ret);
79df15b7
SK
408 return ret;
409 }
410 }
411
412 return 0;
413}
414
415static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
1fe74a5e
PLB
416 struct sdw_slave_runtime *s_rt,
417 struct sdw_port_runtime *p_rt,
418 bool prep)
79df15b7 419{
3a0be1a6 420 struct completion *port_ready;
79df15b7
SK
421 struct sdw_dpn_prop *dpn_prop;
422 struct sdw_prepare_ch prep_ch;
423 unsigned int time_left;
424 bool intr = false;
425 int ret = 0, val;
426 u32 addr;
427
428 prep_ch.num = p_rt->num;
429 prep_ch.ch_mask = p_rt->ch_mask;
430
431 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
1fe74a5e
PLB
432 s_rt->direction,
433 prep_ch.num);
79df15b7
SK
434 if (!dpn_prop) {
435 dev_err(bus->dev,
17ed5bef 436 "Slave Port:%d properties not found\n", prep_ch.num);
79df15b7
SK
437 return -EINVAL;
438 }
439
440 prep_ch.prepare = prep;
441
442 prep_ch.bank = bus->params.next_bank;
443
8acbbfec 444 if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm)
79df15b7
SK
445 intr = true;
446
447 /*
448 * Enable interrupt before Port prepare.
449 * For Port de-prepare, it is assumed that port
450 * was prepared earlier
451 */
452 if (prep && intr) {
453 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
8acbbfec 454 dpn_prop->imp_def_interrupts);
79df15b7
SK
455 if (ret < 0)
456 return ret;
457 }
458
459 /* Inform slave about the impending port prepare */
460 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
461
462 /* Prepare Slave port implementing CP_SM */
463 if (!dpn_prop->simple_ch_prep_sm) {
464 addr = SDW_DPN_PREPARECTRL(p_rt->num);
465
466 if (prep)
0b43fef9 467 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
79df15b7 468 else
0b43fef9 469 ret = sdw_write(s_rt->slave, addr, 0x0);
79df15b7
SK
470
471 if (ret < 0) {
472 dev_err(&s_rt->slave->dev,
17ed5bef 473 "Slave prep_ctrl reg write failed\n");
79df15b7
SK
474 return ret;
475 }
476
477 /* Wait for completion on port ready */
478 port_ready = &s_rt->slave->port_ready[prep_ch.num];
479 time_left = wait_for_completion_timeout(port_ready,
480 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
481
482 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
483 val &= p_rt->ch_mask;
484 if (!time_left || val) {
485 dev_err(&s_rt->slave->dev,
17ed5bef 486 "Chn prep failed for port:%d\n", prep_ch.num);
79df15b7
SK
487 return -ETIMEDOUT;
488 }
489 }
490
491 /* Inform slaves about ports prepared */
492 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
493
494 /* Disable interrupt after Port de-prepare */
495 if (!prep && intr)
496 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
8acbbfec 497 dpn_prop->imp_def_interrupts);
79df15b7
SK
498
499 return ret;
500}
501
502static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
1fe74a5e
PLB
503 struct sdw_port_runtime *p_rt,
504 bool prep)
79df15b7
SK
505{
506 struct sdw_transport_params *t_params = &p_rt->transport_params;
507 struct sdw_bus *bus = m_rt->bus;
508 const struct sdw_master_port_ops *ops = bus->port_ops;
509 struct sdw_prepare_ch prep_ch;
510 int ret = 0;
511
512 prep_ch.num = p_rt->num;
513 prep_ch.ch_mask = p_rt->ch_mask;
514 prep_ch.prepare = prep; /* Prepare/De-prepare */
515 prep_ch.bank = bus->params.next_bank;
516
517 /* Pre-prepare/Pre-deprepare port(s) */
518 if (ops->dpn_port_prep) {
519 ret = ops->dpn_port_prep(bus, &prep_ch);
520 if (ret < 0) {
17ed5bef 521 dev_err(bus->dev, "Port prepare failed for port:%d\n",
1fe74a5e 522 t_params->port_num);
79df15b7
SK
523 return ret;
524 }
525 }
526
527 return ret;
528}
529
530/**
531 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
532 * Slave(s)
533 *
534 * @m_rt: Master runtime handle
535 * @prep: Prepare or De-prepare
536 */
537static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
538{
3a0be1a6 539 struct sdw_slave_runtime *s_rt;
79df15b7
SK
540 struct sdw_port_runtime *p_rt;
541 int ret = 0;
542
543 /* Prepare/De-prepare Slave port(s) */
544 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
545 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
546 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
1fe74a5e 547 p_rt, prep);
79df15b7
SK
548 if (ret < 0)
549 return ret;
550 }
551 }
552
553 /* Prepare/De-prepare Master port(s) */
554 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
555 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
556 if (ret < 0)
557 return ret;
558 }
559
560 return ret;
561}
562
99b8a5d6
SK
563/**
564 * sdw_notify_config() - Notify bus configuration
565 *
566 * @m_rt: Master runtime handle
567 *
568 * This function notifies the Master(s) and Slave(s) of the
569 * new bus configuration.
570 */
571static int sdw_notify_config(struct sdw_master_runtime *m_rt)
572{
573 struct sdw_slave_runtime *s_rt;
574 struct sdw_bus *bus = m_rt->bus;
575 struct sdw_slave *slave;
576 int ret = 0;
577
578 if (bus->ops->set_bus_conf) {
579 ret = bus->ops->set_bus_conf(bus, &bus->params);
580 if (ret < 0)
581 return ret;
582 }
583
584 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
585 slave = s_rt->slave;
586
587 if (slave->ops->bus_config) {
588 ret = slave->ops->bus_config(slave, &bus->params);
60835022 589 if (ret < 0) {
17ed5bef 590 dev_err(bus->dev, "Notify Slave: %d failed\n",
1fe74a5e 591 slave->dev_num);
60835022
RW
592 return ret;
593 }
99b8a5d6
SK
594 }
595 }
596
597 return ret;
598}
599
600/**
601 * sdw_program_params() - Program transport and port parameters for Master(s)
602 * and Slave(s)
603 *
604 * @bus: SDW bus instance
bfaa3549 605 * @prepare: true if sdw_program_params() is called by _prepare.
99b8a5d6 606 */
bfaa3549 607static int sdw_program_params(struct sdw_bus *bus, bool prepare)
99b8a5d6 608{
3a0be1a6 609 struct sdw_master_runtime *m_rt;
99b8a5d6
SK
610 int ret = 0;
611
612 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
bfaa3549
RW
613
614 /*
615 * this loop walks through all master runtimes for a
616 * bus, but the ports can only be configured while
617 * explicitly preparing a stream or handling an
618 * already-prepared stream otherwise.
619 */
620 if (!prepare &&
621 m_rt->stream->state == SDW_STREAM_CONFIGURED)
622 continue;
623
99b8a5d6
SK
624 ret = sdw_program_port_params(m_rt);
625 if (ret < 0) {
626 dev_err(bus->dev,
17ed5bef 627 "Program transport params failed: %d\n", ret);
99b8a5d6
SK
628 return ret;
629 }
630
631 ret = sdw_notify_config(m_rt);
632 if (ret < 0) {
62f0cec3
VK
633 dev_err(bus->dev,
634 "Notify bus config failed: %d\n", ret);
99b8a5d6
SK
635 return ret;
636 }
637
638 /* Enable port(s) on alternate bank for all active streams */
639 if (m_rt->stream->state != SDW_STREAM_ENABLED)
640 continue;
641
642 ret = sdw_enable_disable_ports(m_rt, true);
643 if (ret < 0) {
17ed5bef 644 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
99b8a5d6
SK
645 return ret;
646 }
647 }
648
649 return ret;
650}
651
ce6e74d0 652static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
99b8a5d6
SK
653{
654 int col_index, row_index;
ce6e74d0 655 bool multi_link;
99b8a5d6 656 struct sdw_msg *wr_msg;
3a0be1a6
PLB
657 u8 *wbuf;
658 int ret;
99b8a5d6
SK
659 u16 addr;
660
661 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
662 if (!wr_msg)
663 return -ENOMEM;
664
ce6e74d0
SN
665 bus->defer_msg.msg = wr_msg;
666
99b8a5d6
SK
667 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
668 if (!wbuf) {
669 ret = -ENOMEM;
670 goto error_1;
671 }
672
673 /* Get row and column index to program register */
674 col_index = sdw_find_col_index(bus->params.col);
675 row_index = sdw_find_row_index(bus->params.row);
676 wbuf[0] = col_index | (row_index << 3);
677
678 if (bus->params.next_bank)
679 addr = SDW_SCP_FRAMECTRL_B1;
680 else
681 addr = SDW_SCP_FRAMECTRL_B0;
682
683 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
1fe74a5e 684 SDW_MSG_FLAG_WRITE, wbuf);
99b8a5d6
SK
685 wr_msg->ssp_sync = true;
686
ce6e74d0
SN
687 /*
688 * Set the multi_link flag only when both the hardware supports
063ff4e5 689 * and hardware-based sync is required
ce6e74d0 690 */
063ff4e5 691 multi_link = bus->multi_link && (m_rt_count >= bus->hw_sync_min_links);
ce6e74d0
SN
692
693 if (multi_link)
694 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
695 else
696 ret = sdw_transfer(bus, wr_msg);
697
99b8a5d6 698 if (ret < 0) {
17ed5bef 699 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
99b8a5d6
SK
700 goto error;
701 }
702
ce6e74d0
SN
703 if (!multi_link) {
704 kfree(wr_msg);
705 kfree(wbuf);
706 bus->defer_msg.msg = NULL;
707 bus->params.curr_bank = !bus->params.curr_bank;
708 bus->params.next_bank = !bus->params.next_bank;
709 }
99b8a5d6
SK
710
711 return 0;
712
713error:
714 kfree(wbuf);
715error_1:
716 kfree(wr_msg);
717 return ret;
718}
719
ce6e74d0
SN
720/**
721 * sdw_ml_sync_bank_switch: Multilink register bank switch
722 *
723 * @bus: SDW bus instance
724 *
725 * Caller function should free the buffers on error
726 */
727static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
728{
729 unsigned long time_left;
730
731 if (!bus->multi_link)
732 return 0;
733
734 /* Wait for completion of transfer */
735 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
736 bus->bank_switch_timeout);
737
738 if (!time_left) {
17ed5bef 739 dev_err(bus->dev, "Controller Timed out on bank switch\n");
ce6e74d0
SN
740 return -ETIMEDOUT;
741 }
742
743 bus->params.curr_bank = !bus->params.curr_bank;
744 bus->params.next_bank = !bus->params.next_bank;
745
746 if (bus->defer_msg.msg) {
747 kfree(bus->defer_msg.msg->buf);
748 kfree(bus->defer_msg.msg);
749 }
750
751 return 0;
752}
753
99b8a5d6
SK
754static int do_bank_switch(struct sdw_stream_runtime *stream)
755{
3a0be1a6 756 struct sdw_master_runtime *m_rt;
99b8a5d6 757 const struct sdw_master_ops *ops;
3a0be1a6 758 struct sdw_bus *bus;
ce6e74d0 759 bool multi_link = false;
063ff4e5 760 int m_rt_count;
99b8a5d6
SK
761 int ret = 0;
762
063ff4e5
PLB
763 m_rt_count = stream->m_rt_count;
764
48949722
VK
765 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
766 bus = m_rt->bus;
767 ops = bus->ops;
768
063ff4e5 769 if (bus->multi_link && m_rt_count >= bus->hw_sync_min_links) {
ce6e74d0
SN
770 multi_link = true;
771 mutex_lock(&bus->msg_lock);
772 }
773
48949722
VK
774 /* Pre-bank switch */
775 if (ops->pre_bank_switch) {
776 ret = ops->pre_bank_switch(bus);
777 if (ret < 0) {
778 dev_err(bus->dev,
17ed5bef 779 "Pre bank switch op failed: %d\n", ret);
ce6e74d0 780 goto msg_unlock;
48949722
VK
781 }
782 }
783
ce6e74d0
SN
784 /*
785 * Perform Bank switch operation.
786 * For multi link cases, the actual bank switch is
787 * synchronized across all Masters and happens later as a
788 * part of post_bank_switch ops.
789 */
063ff4e5 790 ret = sdw_bank_switch(bus, m_rt_count);
99b8a5d6 791 if (ret < 0) {
17ed5bef 792 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
ce6e74d0 793 goto error;
99b8a5d6
SK
794 }
795 }
796
ce6e74d0
SN
797 /*
798 * For multi link cases, it is expected that the bank switch is
799 * triggered by the post_bank_switch for the first Master in the list
800 * and for the other Masters the post_bank_switch() should return doing
801 * nothing.
802 */
48949722
VK
803 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
804 bus = m_rt->bus;
805 ops = bus->ops;
99b8a5d6 806
48949722
VK
807 /* Post-bank switch */
808 if (ops->post_bank_switch) {
809 ret = ops->post_bank_switch(bus);
810 if (ret < 0) {
811 dev_err(bus->dev,
62f0cec3
VK
812 "Post bank switch op failed: %d\n",
813 ret);
ce6e74d0 814 goto error;
48949722 815 }
063ff4e5 816 } else if (multi_link) {
ce6e74d0 817 dev_err(bus->dev,
17ed5bef 818 "Post bank switch ops not implemented\n");
ce6e74d0
SN
819 goto error;
820 }
821
822 /* Set the bank switch timeout to default, if not set */
823 if (!bus->bank_switch_timeout)
824 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
825
826 /* Check if bank switch was successful */
827 ret = sdw_ml_sync_bank_switch(bus);
828 if (ret < 0) {
829 dev_err(bus->dev,
17ed5bef 830 "multi link bank switch failed: %d\n", ret);
ce6e74d0
SN
831 goto error;
832 }
833
063ff4e5 834 if (multi_link)
9315d904 835 mutex_unlock(&bus->msg_lock);
ce6e74d0
SN
836 }
837
838 return ret;
839
840error:
841 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
ce6e74d0
SN
842 bus = m_rt->bus;
843
844 kfree(bus->defer_msg.msg->buf);
845 kfree(bus->defer_msg.msg);
846 }
847
848msg_unlock:
849
850 if (multi_link) {
851 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
852 bus = m_rt->bus;
853 if (mutex_is_locked(&bus->msg_lock))
854 mutex_unlock(&bus->msg_lock);
99b8a5d6
SK
855 }
856 }
857
858 return ret;
859}
860
89e59053
SK
861/**
862 * sdw_release_stream() - Free the assigned stream runtime
863 *
864 * @stream: SoundWire stream runtime
865 *
866 * sdw_release_stream should be called only once per stream
867 */
868void sdw_release_stream(struct sdw_stream_runtime *stream)
869{
870 kfree(stream);
871}
872EXPORT_SYMBOL(sdw_release_stream);
873
874/**
875 * sdw_alloc_stream() - Allocate and return stream runtime
876 *
877 * @stream_name: SoundWire stream name
878 *
879 * Allocates a SoundWire stream runtime instance.
880 * sdw_alloc_stream should be called only once per stream. Typically
881 * invoked from ALSA/ASoC machine/platform driver.
882 */
dfcff3f8 883struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
89e59053
SK
884{
885 struct sdw_stream_runtime *stream;
886
887 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
888 if (!stream)
889 return NULL;
890
891 stream->name = stream_name;
0c4a1049 892 INIT_LIST_HEAD(&stream->master_list);
89e59053 893 stream->state = SDW_STREAM_ALLOCATED;
9b5c132a 894 stream->m_rt_count = 0;
89e59053
SK
895
896 return stream;
897}
898EXPORT_SYMBOL(sdw_alloc_stream);
899
48949722
VK
900static struct sdw_master_runtime
901*sdw_find_master_rt(struct sdw_bus *bus,
1fe74a5e 902 struct sdw_stream_runtime *stream)
48949722 903{
3a0be1a6 904 struct sdw_master_runtime *m_rt;
48949722
VK
905
906 /* Retrieve Bus handle if already available */
907 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
908 if (m_rt->bus == bus)
909 return m_rt;
910 }
911
912 return NULL;
913}
914
89e59053
SK
915/**
916 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
917 *
918 * @bus: SDW bus instance
919 * @stream_config: Stream configuration
920 * @stream: Stream runtime handle.
921 *
922 * This function is to be called with bus_lock held.
923 */
924static struct sdw_master_runtime
925*sdw_alloc_master_rt(struct sdw_bus *bus,
1fe74a5e
PLB
926 struct sdw_stream_config *stream_config,
927 struct sdw_stream_runtime *stream)
89e59053
SK
928{
929 struct sdw_master_runtime *m_rt;
930
89e59053
SK
931 /*
932 * check if Master is already allocated (as a result of Slave adding
933 * it first), if so skip allocation and go to configure
934 */
48949722 935 m_rt = sdw_find_master_rt(bus, stream);
89e59053
SK
936 if (m_rt)
937 goto stream_config;
938
939 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
940 if (!m_rt)
941 return NULL;
942
943 /* Initialization of Master runtime handle */
bbe7379d 944 INIT_LIST_HEAD(&m_rt->port_list);
89e59053 945 INIT_LIST_HEAD(&m_rt->slave_rt_list);
48949722 946 list_add_tail(&m_rt->stream_node, &stream->master_list);
89e59053
SK
947
948 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
949
950stream_config:
951 m_rt->ch_count = stream_config->ch_count;
952 m_rt->bus = bus;
953 m_rt->stream = stream;
954 m_rt->direction = stream_config->direction;
955
956 return m_rt;
957}
958
959/**
960 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
961 *
962 * @slave: Slave handle
963 * @stream_config: Stream configuration
964 * @stream: Stream runtime handle
965 *
966 * This function is to be called with bus_lock held.
967 */
968static struct sdw_slave_runtime
969*sdw_alloc_slave_rt(struct sdw_slave *slave,
1fe74a5e
PLB
970 struct sdw_stream_config *stream_config,
971 struct sdw_stream_runtime *stream)
89e59053 972{
3a0be1a6 973 struct sdw_slave_runtime *s_rt;
89e59053
SK
974
975 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
976 if (!s_rt)
977 return NULL;
978
bbe7379d 979 INIT_LIST_HEAD(&s_rt->port_list);
89e59053
SK
980 s_rt->ch_count = stream_config->ch_count;
981 s_rt->direction = stream_config->direction;
982 s_rt->slave = slave;
983
984 return s_rt;
985}
986
bbe7379d 987static void sdw_master_port_release(struct sdw_bus *bus,
1fe74a5e 988 struct sdw_master_runtime *m_rt)
bbe7379d
SK
989{
990 struct sdw_port_runtime *p_rt, *_p_rt;
991
1fe74a5e 992 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
bbe7379d
SK
993 list_del(&p_rt->port_node);
994 kfree(p_rt);
995 }
996}
997
998static void sdw_slave_port_release(struct sdw_bus *bus,
1fe74a5e
PLB
999 struct sdw_slave *slave,
1000 struct sdw_stream_runtime *stream)
bbe7379d
SK
1001{
1002 struct sdw_port_runtime *p_rt, *_p_rt;
48949722 1003 struct sdw_master_runtime *m_rt;
bbe7379d
SK
1004 struct sdw_slave_runtime *s_rt;
1005
48949722
VK
1006 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1007 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
1008 if (s_rt->slave != slave)
1009 continue;
1010
1011 list_for_each_entry_safe(p_rt, _p_rt,
1fe74a5e 1012 &s_rt->port_list, port_node) {
48949722
VK
1013 list_del(&p_rt->port_node);
1014 kfree(p_rt);
1015 }
bbe7379d
SK
1016 }
1017 }
1018}
1019
89e59053
SK
1020/**
1021 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1022 *
1023 * @slave: Slave handle.
1024 * @stream: Stream runtime handle.
1025 *
1026 * This function is to be called with bus_lock held.
1027 */
1028static void sdw_release_slave_stream(struct sdw_slave *slave,
1fe74a5e 1029 struct sdw_stream_runtime *stream)
89e59053
SK
1030{
1031 struct sdw_slave_runtime *s_rt, *_s_rt;
48949722 1032 struct sdw_master_runtime *m_rt;
89e59053 1033
48949722
VK
1034 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1035 /* Retrieve Slave runtime handle */
1036 list_for_each_entry_safe(s_rt, _s_rt,
1fe74a5e 1037 &m_rt->slave_rt_list, m_rt_node) {
48949722
VK
1038 if (s_rt->slave == slave) {
1039 list_del(&s_rt->m_rt_node);
1040 kfree(s_rt);
1041 return;
1042 }
89e59053
SK
1043 }
1044 }
1045}
1046
1047/**
1048 * sdw_release_master_stream() - Free Master runtime handle
1049 *
48949722 1050 * @m_rt: Master runtime node
89e59053
SK
1051 * @stream: Stream runtime handle.
1052 *
1053 * This function is to be called with bus_lock held
1054 * It frees the Master runtime handle and associated Slave(s) runtime
1055 * handle. If this is called first then sdw_release_slave_stream() will have
1056 * no effect as Slave(s) runtime handle would already be freed up.
1057 */
48949722 1058static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
1fe74a5e 1059 struct sdw_stream_runtime *stream)
89e59053 1060{
89e59053
SK
1061 struct sdw_slave_runtime *s_rt, *_s_rt;
1062
8d6ccf5c
SK
1063 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1064 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1065 sdw_release_slave_stream(s_rt->slave, stream);
1066 }
89e59053 1067
48949722 1068 list_del(&m_rt->stream_node);
89e59053 1069 list_del(&m_rt->bus_node);
48949722 1070 kfree(m_rt);
89e59053
SK
1071}
1072
1073/**
1074 * sdw_stream_remove_master() - Remove master from sdw_stream
1075 *
1076 * @bus: SDW Bus instance
1077 * @stream: SoundWire stream
1078 *
bbe7379d 1079 * This removes and frees port_rt and master_rt from a stream
89e59053
SK
1080 */
1081int sdw_stream_remove_master(struct sdw_bus *bus,
1fe74a5e 1082 struct sdw_stream_runtime *stream)
89e59053 1083{
48949722
VK
1084 struct sdw_master_runtime *m_rt, *_m_rt;
1085
89e59053
SK
1086 mutex_lock(&bus->bus_lock);
1087
48949722 1088 list_for_each_entry_safe(m_rt, _m_rt,
1fe74a5e 1089 &stream->master_list, stream_node) {
48949722
VK
1090 if (m_rt->bus != bus)
1091 continue;
1092
1093 sdw_master_port_release(bus, m_rt);
1094 sdw_release_master_stream(m_rt, stream);
ce6e74d0 1095 stream->m_rt_count--;
48949722
VK
1096 }
1097
1098 if (list_empty(&stream->master_list))
1099 stream->state = SDW_STREAM_RELEASED;
89e59053
SK
1100
1101 mutex_unlock(&bus->bus_lock);
1102
1103 return 0;
1104}
1105EXPORT_SYMBOL(sdw_stream_remove_master);
1106
1107/**
1108 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1109 *
1110 * @slave: SDW Slave instance
1111 * @stream: SoundWire stream
1112 *
bbe7379d 1113 * This removes and frees port_rt and slave_rt from a stream
89e59053
SK
1114 */
1115int sdw_stream_remove_slave(struct sdw_slave *slave,
1fe74a5e 1116 struct sdw_stream_runtime *stream)
89e59053
SK
1117{
1118 mutex_lock(&slave->bus->bus_lock);
1119
bbe7379d 1120 sdw_slave_port_release(slave->bus, slave, stream);
89e59053
SK
1121 sdw_release_slave_stream(slave, stream);
1122
1123 mutex_unlock(&slave->bus->bus_lock);
1124
1125 return 0;
1126}
1127EXPORT_SYMBOL(sdw_stream_remove_slave);
1128
1129/**
1130 * sdw_config_stream() - Configure the allocated stream
1131 *
1132 * @dev: SDW device
1133 * @stream: SoundWire stream
1134 * @stream_config: Stream configuration for audio stream
1135 * @is_slave: is API called from Slave or Master
1136 *
1137 * This function is to be called with bus_lock held.
1138 */
1139static int sdw_config_stream(struct device *dev,
1fe74a5e
PLB
1140 struct sdw_stream_runtime *stream,
1141 struct sdw_stream_config *stream_config,
1142 bool is_slave)
89e59053
SK
1143{
1144 /*
1145 * Update the stream rate, channel and bps based on data
1146 * source. For more than one data source (multilink),
1147 * match the rate, bps, stream type and increment number of channels.
1148 *
1149 * If rate/bps is zero, it means the values are not set, so skip
1150 * comparison and allow the value to be set and stored in stream
1151 */
1152 if (stream->params.rate &&
1fe74a5e 1153 stream->params.rate != stream_config->frame_rate) {
17ed5bef 1154 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
89e59053
SK
1155 return -EINVAL;
1156 }
1157
1158 if (stream->params.bps &&
1fe74a5e 1159 stream->params.bps != stream_config->bps) {
17ed5bef 1160 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
89e59053
SK
1161 return -EINVAL;
1162 }
1163
1164 stream->type = stream_config->type;
1165 stream->params.rate = stream_config->frame_rate;
1166 stream->params.bps = stream_config->bps;
1167
1168 /* TODO: Update this check during Device-device support */
1169 if (is_slave)
1170 stream->params.ch_count += stream_config->ch_count;
1171
1172 return 0;
1173}
1174
bbe7379d 1175static int sdw_is_valid_port_range(struct device *dev,
1fe74a5e 1176 struct sdw_port_runtime *p_rt)
bbe7379d
SK
1177{
1178 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1179 dev_err(dev,
17ed5bef 1180 "SoundWire: Invalid port number :%d\n", p_rt->num);
bbe7379d
SK
1181 return -EINVAL;
1182 }
1183
1184 return 0;
1185}
1186
1fe74a5e
PLB
1187static struct sdw_port_runtime
1188*sdw_port_alloc(struct device *dev,
1189 struct sdw_port_config *port_config,
1190 int port_index)
bbe7379d
SK
1191{
1192 struct sdw_port_runtime *p_rt;
1193
1194 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1195 if (!p_rt)
1196 return NULL;
1197
1198 p_rt->ch_mask = port_config[port_index].ch_mask;
1199 p_rt->num = port_config[port_index].num;
1200
1201 return p_rt;
1202}
1203
1204static int sdw_master_port_config(struct sdw_bus *bus,
1fe74a5e
PLB
1205 struct sdw_master_runtime *m_rt,
1206 struct sdw_port_config *port_config,
1207 unsigned int num_ports)
bbe7379d
SK
1208{
1209 struct sdw_port_runtime *p_rt;
1210 int i;
1211
1212 /* Iterate for number of ports to perform initialization */
1213 for (i = 0; i < num_ports; i++) {
1214 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1215 if (!p_rt)
1216 return -ENOMEM;
1217
1218 /*
1219 * TODO: Check port capabilities for requested
1220 * configuration (audio mode support)
1221 */
1222
1223 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1224 }
1225
1226 return 0;
1227}
1228
1229static int sdw_slave_port_config(struct sdw_slave *slave,
1fe74a5e
PLB
1230 struct sdw_slave_runtime *s_rt,
1231 struct sdw_port_config *port_config,
1232 unsigned int num_config)
bbe7379d
SK
1233{
1234 struct sdw_port_runtime *p_rt;
1235 int i, ret;
1236
1237 /* Iterate for number of ports to perform initialization */
1238 for (i = 0; i < num_config; i++) {
1239 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1240 if (!p_rt)
1241 return -ENOMEM;
1242
1243 /*
1244 * TODO: Check valid port range as defined by DisCo/
1245 * slave
1246 */
1247 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1248 if (ret < 0) {
1249 kfree(p_rt);
1250 return ret;
1251 }
1252
1253 /*
1254 * TODO: Check port capabilities for requested
1255 * configuration (audio mode support)
1256 */
1257
1258 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1259 }
1260
1261 return 0;
1262}
1263
89e59053
SK
1264/**
1265 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1266 *
1267 * @bus: SDW Bus instance
1268 * @stream_config: Stream configuration for audio stream
bbe7379d
SK
1269 * @port_config: Port configuration for audio stream
1270 * @num_ports: Number of ports
89e59053
SK
1271 * @stream: SoundWire stream
1272 */
1273int sdw_stream_add_master(struct sdw_bus *bus,
1fe74a5e
PLB
1274 struct sdw_stream_config *stream_config,
1275 struct sdw_port_config *port_config,
1276 unsigned int num_ports,
1277 struct sdw_stream_runtime *stream)
89e59053 1278{
3a0be1a6 1279 struct sdw_master_runtime *m_rt;
89e59053
SK
1280 int ret;
1281
1282 mutex_lock(&bus->bus_lock);
1283
ce6e74d0
SN
1284 /*
1285 * For multi link streams, add the second master only if
1286 * the bus supports it.
1287 * Check if bus->multi_link is set
1288 */
1289 if (!bus->multi_link && stream->m_rt_count > 0) {
1290 dev_err(bus->dev,
17ed5bef 1291 "Multilink not supported, link %d\n", bus->link_id);
ce6e74d0
SN
1292 ret = -EINVAL;
1293 goto unlock;
1294 }
1295
89e59053
SK
1296 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1297 if (!m_rt) {
1298 dev_err(bus->dev,
17ed5bef 1299 "Master runtime config failed for stream:%s\n",
1fe74a5e 1300 stream->name);
89e59053 1301 ret = -ENOMEM;
3fef1a22 1302 goto unlock;
89e59053
SK
1303 }
1304
1305 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1306 if (ret)
1307 goto stream_error;
1308
bbe7379d
SK
1309 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1310 if (ret)
1311 goto stream_error;
1312
ce6e74d0
SN
1313 stream->m_rt_count++;
1314
3fef1a22
SN
1315 goto unlock;
1316
89e59053 1317stream_error:
48949722 1318 sdw_release_master_stream(m_rt, stream);
3fef1a22 1319unlock:
89e59053
SK
1320 mutex_unlock(&bus->bus_lock);
1321 return ret;
1322}
1323EXPORT_SYMBOL(sdw_stream_add_master);
1324
1325/**
1326 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1327 *
1328 * @slave: SDW Slave instance
1329 * @stream_config: Stream configuration for audio stream
1330 * @stream: SoundWire stream
bbe7379d
SK
1331 * @port_config: Port configuration for audio stream
1332 * @num_ports: Number of ports
0aebe40b
SN
1333 *
1334 * It is expected that Slave is added before adding Master
1335 * to the Stream.
1336 *
89e59053
SK
1337 */
1338int sdw_stream_add_slave(struct sdw_slave *slave,
1fe74a5e
PLB
1339 struct sdw_stream_config *stream_config,
1340 struct sdw_port_config *port_config,
1341 unsigned int num_ports,
1342 struct sdw_stream_runtime *stream)
89e59053
SK
1343{
1344 struct sdw_slave_runtime *s_rt;
1345 struct sdw_master_runtime *m_rt;
1346 int ret;
1347
1348 mutex_lock(&slave->bus->bus_lock);
1349
1350 /*
1351 * If this API is invoked by Slave first then m_rt is not valid.
1352 * So, allocate m_rt and add Slave to it.
1353 */
1354 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1355 if (!m_rt) {
1356 dev_err(&slave->dev,
17ed5bef 1357 "alloc master runtime failed for stream:%s\n",
1fe74a5e 1358 stream->name);
89e59053
SK
1359 ret = -ENOMEM;
1360 goto error;
1361 }
1362
1363 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1364 if (!s_rt) {
1365 dev_err(&slave->dev,
17ed5bef 1366 "Slave runtime config failed for stream:%s\n",
1fe74a5e 1367 stream->name);
89e59053
SK
1368 ret = -ENOMEM;
1369 goto stream_error;
1370 }
1371
1372 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1373 if (ret)
1374 goto stream_error;
1375
1376 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1377
bbe7379d
SK
1378 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1379 if (ret)
1380 goto stream_error;
1381
0aebe40b
SN
1382 /*
1383 * Change stream state to CONFIGURED on first Slave add.
1384 * Bus is not aware of number of Slave(s) in a stream at this
1385 * point so cannot depend on all Slave(s) to be added in order to
1386 * change stream state to CONFIGURED.
1387 */
89e59053
SK
1388 stream->state = SDW_STREAM_CONFIGURED;
1389 goto error;
1390
1391stream_error:
1392 /*
1393 * we hit error so cleanup the stream, release all Slave(s) and
1394 * Master runtime
1395 */
48949722 1396 sdw_release_master_stream(m_rt, stream);
89e59053
SK
1397error:
1398 mutex_unlock(&slave->bus->bus_lock);
1399 return ret;
1400}
1401EXPORT_SYMBOL(sdw_stream_add_slave);
f8101c74
SK
1402
1403/**
1404 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1405 *
1406 * @slave: Slave handle
1407 * @direction: Data direction.
1408 * @port_num: Port number
1409 */
1410struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
1fe74a5e
PLB
1411 enum sdw_data_direction direction,
1412 unsigned int port_num)
f8101c74
SK
1413{
1414 struct sdw_dpn_prop *dpn_prop;
1415 u8 num_ports;
1416 int i;
1417
1418 if (direction == SDW_DATA_DIR_TX) {
1419 num_ports = hweight32(slave->prop.source_ports);
1420 dpn_prop = slave->prop.src_dpn_prop;
1421 } else {
1422 num_ports = hweight32(slave->prop.sink_ports);
1423 dpn_prop = slave->prop.sink_dpn_prop;
1424 }
1425
1426 for (i = 0; i < num_ports; i++) {
03ecad90 1427 if (dpn_prop[i].num == port_num)
f8101c74
SK
1428 return &dpn_prop[i];
1429 }
1430
1431 return NULL;
1432}
5c3eb9f7 1433
0c4a1049
SK
1434/**
1435 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1436 *
1437 * @stream: SoundWire stream
1438 *
1439 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1440 * stream to reconfigure the bus.
1441 * NOTE: This function is called from SoundWire stream ops and is
1442 * expected that a global lock is held before acquiring bus_lock.
1443 */
1444static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1445{
3a0be1a6 1446 struct sdw_master_runtime *m_rt;
0c4a1049
SK
1447 struct sdw_bus *bus = NULL;
1448
1449 /* Iterate for all Master(s) in Master list */
1450 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1451 bus = m_rt->bus;
1452
1453 mutex_lock(&bus->bus_lock);
1454 }
1455}
1456
1457/**
1458 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1459 *
1460 * @stream: SoundWire stream
1461 *
1462 * Release the previously held bus_lock after reconfiguring the bus.
48949722
VK
1463 * NOTE: This function is called from SoundWire stream ops and is
1464 * expected that a global lock is held before releasing bus_lock.
0c4a1049
SK
1465 */
1466static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1467{
1468 struct sdw_master_runtime *m_rt = NULL;
1469 struct sdw_bus *bus = NULL;
1470
1471 /* Iterate for all Master(s) in Master list */
1472 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1473 bus = m_rt->bus;
1474 mutex_unlock(&bus->bus_lock);
1475 }
1476}
1477
c7a8f049
PLB
1478static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
1479 bool update_params)
5c3eb9f7 1480{
3a0be1a6 1481 struct sdw_master_runtime *m_rt;
48949722 1482 struct sdw_bus *bus = NULL;
3a0be1a6 1483 struct sdw_master_prop *prop;
5c3eb9f7
SK
1484 struct sdw_bus_params params;
1485 int ret;
1486
48949722
VK
1487 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1488 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1489 bus = m_rt->bus;
1490 prop = &bus->prop;
1491 memcpy(&params, &bus->params, sizeof(params));
5c3eb9f7 1492
48949722 1493 /* TODO: Support Asynchronous mode */
3424305b 1494 if ((prop->max_clk_freq % stream->params.rate) != 0) {
17ed5bef 1495 dev_err(bus->dev, "Async mode not supported\n");
48949722
VK
1496 return -EINVAL;
1497 }
5c3eb9f7 1498
c7a8f049
PLB
1499 if (!update_params)
1500 goto program_params;
1501
48949722
VK
1502 /* Increment cumulative bus bandwidth */
1503 /* TODO: Update this during Device-Device support */
1504 bus->params.bandwidth += m_rt->stream->params.rate *
1505 m_rt->ch_count * m_rt->stream->params.bps;
1506
c7578c1d
VK
1507 /* Compute params */
1508 if (bus->compute_params) {
1509 ret = bus->compute_params(bus);
1510 if (ret < 0) {
1511 dev_err(bus->dev, "Compute params failed: %d",
1512 ret);
1513 return ret;
1514 }
1515 }
1516
c7a8f049 1517program_params:
48949722 1518 /* Program params */
bfaa3549 1519 ret = sdw_program_params(bus, true);
48949722 1520 if (ret < 0) {
17ed5bef 1521 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1522 goto restore_params;
1523 }
5c3eb9f7
SK
1524 }
1525
3a0be1a6
PLB
1526 if (!bus) {
1527 pr_err("Configuration error in %s\n", __func__);
1528 return -EINVAL;
1529 }
1530
5c3eb9f7
SK
1531 ret = do_bank_switch(stream);
1532 if (ret < 0) {
17ed5bef 1533 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1534 goto restore_params;
1535 }
1536
48949722
VK
1537 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1538 bus = m_rt->bus;
1539
1540 /* Prepare port(s) on the new clock configuration */
1541 ret = sdw_prep_deprep_ports(m_rt, true);
1542 if (ret < 0) {
17ed5bef 1543 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
1fe74a5e 1544 ret);
48949722
VK
1545 return ret;
1546 }
5c3eb9f7
SK
1547 }
1548
1549 stream->state = SDW_STREAM_PREPARED;
1550
1551 return ret;
1552
1553restore_params:
1554 memcpy(&bus->params, &params, sizeof(params));
1555 return ret;
1556}
1557
1558/**
1559 * sdw_prepare_stream() - Prepare SoundWire stream
1560 *
1561 * @stream: Soundwire stream
1562 *
34962fb8 1563 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1564 */
1565int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1566{
c7a8f049 1567 bool update_params = true;
c32464c9 1568 int ret;
5c3eb9f7
SK
1569
1570 if (!stream) {
17ed5bef 1571 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1572 return -EINVAL;
1573 }
1574
48949722 1575 sdw_acquire_bus_lock(stream);
5c3eb9f7 1576
c32464c9
BL
1577 if (stream->state == SDW_STREAM_PREPARED) {
1578 ret = 0;
1579 goto state_err;
1580 }
1581
59528807
PLB
1582 if (stream->state != SDW_STREAM_CONFIGURED &&
1583 stream->state != SDW_STREAM_DEPREPARED &&
1584 stream->state != SDW_STREAM_DISABLED) {
1585 pr_err("%s: %s: inconsistent state state %d\n",
1586 __func__, stream->name, stream->state);
1587 ret = -EINVAL;
1588 goto state_err;
1589 }
1590
c7a8f049
PLB
1591 /*
1592 * when the stream is DISABLED, this means sdw_prepare_stream()
1593 * is called as a result of an underflow or a resume operation.
1594 * In this case, the bus parameters shall not be recomputed, but
1595 * still need to be re-applied
1596 */
1597 if (stream->state == SDW_STREAM_DISABLED)
1598 update_params = false;
1599
1600 ret = _sdw_prepare_stream(stream, update_params);
5c3eb9f7 1601
59528807 1602state_err:
48949722 1603 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1604 return ret;
1605}
1606EXPORT_SYMBOL(sdw_prepare_stream);
1607
1608static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1609{
3a0be1a6 1610 struct sdw_master_runtime *m_rt;
48949722 1611 struct sdw_bus *bus = NULL;
5c3eb9f7
SK
1612 int ret;
1613
48949722
VK
1614 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1615 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1616 bus = m_rt->bus;
5c3eb9f7 1617
48949722 1618 /* Program params */
bfaa3549 1619 ret = sdw_program_params(bus, false);
48949722 1620 if (ret < 0) {
17ed5bef 1621 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1622 return ret;
1623 }
1624
1625 /* Enable port(s) */
1626 ret = sdw_enable_disable_ports(m_rt, true);
1627 if (ret < 0) {
62f0cec3
VK
1628 dev_err(bus->dev,
1629 "Enable port(s) failed ret: %d\n", ret);
48949722
VK
1630 return ret;
1631 }
5c3eb9f7
SK
1632 }
1633
3a0be1a6
PLB
1634 if (!bus) {
1635 pr_err("Configuration error in %s\n", __func__);
1636 return -EINVAL;
1637 }
1638
5c3eb9f7
SK
1639 ret = do_bank_switch(stream);
1640 if (ret < 0) {
17ed5bef 1641 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
5c3eb9f7
SK
1642 return ret;
1643 }
1644
1645 stream->state = SDW_STREAM_ENABLED;
1646 return 0;
1647}
1648
1649/**
1650 * sdw_enable_stream() - Enable SoundWire stream
1651 *
1652 * @stream: Soundwire stream
1653 *
34962fb8 1654 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1655 */
1656int sdw_enable_stream(struct sdw_stream_runtime *stream)
1657{
3a0be1a6 1658 int ret;
5c3eb9f7
SK
1659
1660 if (!stream) {
17ed5bef 1661 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1662 return -EINVAL;
1663 }
1664
48949722 1665 sdw_acquire_bus_lock(stream);
5c3eb9f7 1666
59528807
PLB
1667 if (stream->state != SDW_STREAM_PREPARED &&
1668 stream->state != SDW_STREAM_DISABLED) {
1669 pr_err("%s: %s: inconsistent state state %d\n",
1670 __func__, stream->name, stream->state);
1671 ret = -EINVAL;
1672 goto state_err;
1673 }
1674
5c3eb9f7 1675 ret = _sdw_enable_stream(stream);
5c3eb9f7 1676
59528807 1677state_err:
48949722 1678 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1679 return ret;
1680}
1681EXPORT_SYMBOL(sdw_enable_stream);
1682
1683static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1684{
3a0be1a6 1685 struct sdw_master_runtime *m_rt;
5c3eb9f7
SK
1686 int ret;
1687
48949722 1688 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1689 struct sdw_bus *bus = m_rt->bus;
1690
48949722
VK
1691 /* Disable port(s) */
1692 ret = sdw_enable_disable_ports(m_rt, false);
1693 if (ret < 0) {
17ed5bef 1694 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
48949722
VK
1695 return ret;
1696 }
5c3eb9f7 1697 }
5c3eb9f7
SK
1698 stream->state = SDW_STREAM_DISABLED;
1699
48949722 1700 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1701 struct sdw_bus *bus = m_rt->bus;
1702
48949722 1703 /* Program params */
bfaa3549 1704 ret = sdw_program_params(bus, false);
48949722 1705 if (ret < 0) {
17ed5bef 1706 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1707 return ret;
1708 }
5c3eb9f7
SK
1709 }
1710
e0279b6b
PLB
1711 ret = do_bank_switch(stream);
1712 if (ret < 0) {
3a0be1a6 1713 pr_err("Bank switch failed: %d\n", ret);
e0279b6b
PLB
1714 return ret;
1715 }
1716
1717 /* make sure alternate bank (previous current) is also disabled */
1718 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
3a0be1a6
PLB
1719 struct sdw_bus *bus = m_rt->bus;
1720
e0279b6b
PLB
1721 /* Disable port(s) */
1722 ret = sdw_enable_disable_ports(m_rt, false);
1723 if (ret < 0) {
1724 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1725 return ret;
1726 }
1727 }
1728
1729 return 0;
5c3eb9f7
SK
1730}
1731
1732/**
1733 * sdw_disable_stream() - Disable SoundWire stream
1734 *
1735 * @stream: Soundwire stream
1736 *
34962fb8 1737 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1738 */
1739int sdw_disable_stream(struct sdw_stream_runtime *stream)
1740{
3a0be1a6 1741 int ret;
5c3eb9f7
SK
1742
1743 if (!stream) {
17ed5bef 1744 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1745 return -EINVAL;
1746 }
1747
48949722 1748 sdw_acquire_bus_lock(stream);
5c3eb9f7 1749
59528807
PLB
1750 if (stream->state != SDW_STREAM_ENABLED) {
1751 pr_err("%s: %s: inconsistent state state %d\n",
1752 __func__, stream->name, stream->state);
1753 ret = -EINVAL;
1754 goto state_err;
1755 }
1756
5c3eb9f7 1757 ret = _sdw_disable_stream(stream);
5c3eb9f7 1758
59528807 1759state_err:
48949722 1760 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1761 return ret;
1762}
1763EXPORT_SYMBOL(sdw_disable_stream);
1764
1765static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1766{
3a0be1a6
PLB
1767 struct sdw_master_runtime *m_rt;
1768 struct sdw_bus *bus;
5c3eb9f7
SK
1769 int ret = 0;
1770
48949722
VK
1771 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1772 bus = m_rt->bus;
1773 /* De-prepare port(s) */
1774 ret = sdw_prep_deprep_ports(m_rt, false);
1775 if (ret < 0) {
62f0cec3
VK
1776 dev_err(bus->dev,
1777 "De-prepare port(s) failed: %d\n", ret);
48949722
VK
1778 return ret;
1779 }
5c3eb9f7 1780
48949722
VK
1781 /* TODO: Update this during Device-Device support */
1782 bus->params.bandwidth -= m_rt->stream->params.rate *
1783 m_rt->ch_count * m_rt->stream->params.bps;
5c3eb9f7 1784
48949722 1785 /* Program params */
bfaa3549 1786 ret = sdw_program_params(bus, false);
48949722 1787 if (ret < 0) {
17ed5bef 1788 dev_err(bus->dev, "Program params failed: %d\n", ret);
48949722
VK
1789 return ret;
1790 }
5c3eb9f7
SK
1791 }
1792
48949722 1793 stream->state = SDW_STREAM_DEPREPARED;
5c3eb9f7
SK
1794 return do_bank_switch(stream);
1795}
1796
1797/**
1798 * sdw_deprepare_stream() - Deprepare SoundWire stream
1799 *
1800 * @stream: Soundwire stream
1801 *
34962fb8 1802 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
5c3eb9f7
SK
1803 */
1804int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1805{
3a0be1a6 1806 int ret;
5c3eb9f7
SK
1807
1808 if (!stream) {
17ed5bef 1809 pr_err("SoundWire: Handle not found for stream\n");
5c3eb9f7
SK
1810 return -EINVAL;
1811 }
1812
48949722 1813 sdw_acquire_bus_lock(stream);
59528807
PLB
1814
1815 if (stream->state != SDW_STREAM_PREPARED &&
1816 stream->state != SDW_STREAM_DISABLED) {
1817 pr_err("%s: %s: inconsistent state state %d\n",
1818 __func__, stream->name, stream->state);
1819 ret = -EINVAL;
1820 goto state_err;
1821 }
1822
5c3eb9f7 1823 ret = _sdw_deprepare_stream(stream);
5c3eb9f7 1824
59528807 1825state_err:
48949722 1826 sdw_release_bus_lock(stream);
5c3eb9f7
SK
1827 return ret;
1828}
1829EXPORT_SYMBOL(sdw_deprepare_stream);
4550569b
PLB
1830
1831static int set_stream(struct snd_pcm_substream *substream,
1832 struct sdw_stream_runtime *sdw_stream)
1833{
1834 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1835 struct snd_soc_dai *dai;
1836 int ret = 0;
1837 int i;
1838
1839 /* Set stream pointer on all DAIs */
1840 for_each_rtd_dais(rtd, i, dai) {
1841 ret = snd_soc_dai_set_sdw_stream(dai, sdw_stream, substream->stream);
1842 if (ret < 0) {
1843 dev_err(rtd->dev, "failed to set stream pointer on dai %s", dai->name);
1844 break;
1845 }
1846 }
1847
1848 return ret;
1849}
1850
1851/**
1852 * sdw_startup_stream() - Startup SoundWire stream
1853 *
3b71c690 1854 * @sdw_substream: Soundwire stream
4550569b
PLB
1855 *
1856 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1857 */
1858int sdw_startup_stream(void *sdw_substream)
1859{
1860 struct snd_pcm_substream *substream = sdw_substream;
1861 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1862 struct sdw_stream_runtime *sdw_stream;
1863 char *name;
1864 int ret;
1865
1866 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1867 name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
1868 else
1869 name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
1870
1871 if (!name)
1872 return -ENOMEM;
1873
1874 sdw_stream = sdw_alloc_stream(name);
1875 if (!sdw_stream) {
1876 dev_err(rtd->dev, "alloc stream failed for substream DAI %s", substream->name);
1877 ret = -ENOMEM;
1878 goto error;
1879 }
1880
1881 ret = set_stream(substream, sdw_stream);
1882 if (ret < 0)
1883 goto release_stream;
1884 return 0;
1885
1886release_stream:
1887 sdw_release_stream(sdw_stream);
1888 set_stream(substream, NULL);
1889error:
1890 kfree(name);
1891 return ret;
1892}
1893EXPORT_SYMBOL(sdw_startup_stream);
1894
1895/**
1896 * sdw_shutdown_stream() - Shutdown SoundWire stream
1897 *
3b71c690 1898 * @sdw_substream: Soundwire stream
4550569b
PLB
1899 *
1900 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1901 */
1902void sdw_shutdown_stream(void *sdw_substream)
1903{
1904 struct snd_pcm_substream *substream = sdw_substream;
1905 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1906 struct sdw_stream_runtime *sdw_stream;
1907 struct snd_soc_dai *dai;
1908
1909 /* Find stream from first CPU DAI */
1910 dai = asoc_rtd_to_cpu(rtd, 0);
1911
1912 sdw_stream = snd_soc_dai_get_sdw_stream(dai, substream->stream);
1913
1914 if (!sdw_stream) {
1915 dev_err(rtd->dev, "no stream found for DAI %s", dai->name);
1916 return;
1917 }
1918
1919 /* release memory */
1920 kfree(sdw_stream->name);
1921 sdw_release_stream(sdw_stream);
1922
1923 /* clear DAI data */
1924 set_stream(substream, NULL);
1925}
1926EXPORT_SYMBOL(sdw_shutdown_stream);