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89e59053 SK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-18 Intel Corporation. | |
3 | ||
4 | /* | |
5 | * stream.c - SoundWire Bus stream operations. | |
6 | */ | |
7 | ||
8 | #include <linux/delay.h> | |
9 | #include <linux/device.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/mod_devicetable.h> | |
13 | #include <linux/slab.h> | |
f8101c74 | 14 | #include <linux/soundwire/sdw_registers.h> |
89e59053 SK |
15 | #include <linux/soundwire/sdw.h> |
16 | #include "bus.h" | |
17 | ||
99b8a5d6 SK |
18 | /* |
19 | * Array of supported rows and columns as per MIPI SoundWire Specification 1.1 | |
20 | * | |
21 | * The rows are arranged as per the array index value programmed | |
22 | * in register. The index 15 has dummy value 0 in order to fill hole. | |
23 | */ | |
24 | int rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147, | |
25 | 96, 100, 120, 128, 150, 160, 250, 0, | |
26 | 192, 200, 240, 256, 72, 144, 90, 180}; | |
27 | ||
28 | int cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16}; | |
29 | ||
30 | static int sdw_find_col_index(int col) | |
31 | { | |
32 | int i; | |
33 | ||
34 | for (i = 0; i < SDW_FRAME_COLS; i++) { | |
35 | if (cols[i] == col) | |
36 | return i; | |
37 | } | |
38 | ||
39 | pr_warn("Requested column not found, selecting lowest column no: 2\n"); | |
40 | return 0; | |
41 | } | |
42 | ||
43 | static int sdw_find_row_index(int row) | |
44 | { | |
45 | int i; | |
46 | ||
47 | for (i = 0; i < SDW_FRAME_ROWS; i++) { | |
48 | if (rows[i] == row) | |
49 | return i; | |
50 | } | |
51 | ||
52 | pr_warn("Requested row not found, selecting lowest row no: 48\n"); | |
53 | return 0; | |
54 | } | |
f8101c74 | 55 | static int _sdw_program_slave_port_params(struct sdw_bus *bus, |
1fe74a5e PLB |
56 | struct sdw_slave *slave, |
57 | struct sdw_transport_params *t_params, | |
58 | enum sdw_dpn_type type) | |
f8101c74 SK |
59 | { |
60 | u32 addr1, addr2, addr3, addr4; | |
61 | int ret; | |
62 | u16 wbuf; | |
63 | ||
64 | if (bus->params.next_bank) { | |
65 | addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num); | |
66 | addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num); | |
67 | addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num); | |
68 | addr4 = SDW_DPN_HCTRL_B1(t_params->port_num); | |
69 | } else { | |
70 | addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num); | |
71 | addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num); | |
72 | addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num); | |
73 | addr4 = SDW_DPN_HCTRL_B0(t_params->port_num); | |
74 | } | |
75 | ||
76 | /* Program DPN_OffsetCtrl2 registers */ | |
77 | ret = sdw_write(slave, addr1, t_params->offset2); | |
78 | if (ret < 0) { | |
17ed5bef | 79 | dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n"); |
f8101c74 SK |
80 | return ret; |
81 | } | |
82 | ||
83 | /* Program DPN_BlockCtrl3 register */ | |
84 | ret = sdw_write(slave, addr2, t_params->blk_pkg_mode); | |
85 | if (ret < 0) { | |
17ed5bef | 86 | dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n"); |
f8101c74 SK |
87 | return ret; |
88 | } | |
89 | ||
90 | /* | |
91 | * Data ports are FULL, SIMPLE and REDUCED. This function handles | |
7d3b3cdf | 92 | * FULL and REDUCED only and beyond this point only FULL is |
f8101c74 SK |
93 | * handled, so bail out if we are not FULL data port type |
94 | */ | |
95 | if (type != SDW_DPN_FULL) | |
96 | return ret; | |
97 | ||
98 | /* Program DPN_SampleCtrl2 register */ | |
99 | wbuf = (t_params->sample_interval - 1); | |
100 | wbuf &= SDW_DPN_SAMPLECTRL_HIGH; | |
101 | wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH); | |
102 | ||
103 | ret = sdw_write(slave, addr3, wbuf); | |
104 | if (ret < 0) { | |
17ed5bef | 105 | dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n"); |
f8101c74 SK |
106 | return ret; |
107 | } | |
108 | ||
109 | /* Program DPN_HCtrl register */ | |
110 | wbuf = t_params->hstart; | |
111 | wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART); | |
112 | wbuf |= t_params->hstop; | |
113 | ||
114 | ret = sdw_write(slave, addr4, wbuf); | |
115 | if (ret < 0) | |
17ed5bef | 116 | dev_err(bus->dev, "DPN_HCtrl register write failed\n"); |
f8101c74 SK |
117 | |
118 | return ret; | |
119 | } | |
120 | ||
121 | static int sdw_program_slave_port_params(struct sdw_bus *bus, | |
1fe74a5e PLB |
122 | struct sdw_slave_runtime *s_rt, |
123 | struct sdw_port_runtime *p_rt) | |
f8101c74 SK |
124 | { |
125 | struct sdw_transport_params *t_params = &p_rt->transport_params; | |
126 | struct sdw_port_params *p_params = &p_rt->port_params; | |
127 | struct sdw_slave_prop *slave_prop = &s_rt->slave->prop; | |
128 | u32 addr1, addr2, addr3, addr4, addr5, addr6; | |
129 | struct sdw_dpn_prop *dpn_prop; | |
130 | int ret; | |
131 | u8 wbuf; | |
132 | ||
133 | dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave, | |
1fe74a5e PLB |
134 | s_rt->direction, |
135 | t_params->port_num); | |
f8101c74 SK |
136 | if (!dpn_prop) |
137 | return -EINVAL; | |
138 | ||
139 | addr1 = SDW_DPN_PORTCTRL(t_params->port_num); | |
140 | addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num); | |
141 | ||
142 | if (bus->params.next_bank) { | |
143 | addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num); | |
144 | addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num); | |
145 | addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num); | |
146 | addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num); | |
147 | ||
148 | } else { | |
149 | addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num); | |
150 | addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num); | |
151 | addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num); | |
152 | addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num); | |
153 | } | |
154 | ||
155 | /* Program DPN_PortCtrl register */ | |
156 | wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE); | |
157 | wbuf |= p_params->flow_mode; | |
158 | ||
159 | ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf); | |
160 | if (ret < 0) { | |
161 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 162 | "DPN_PortCtrl register write failed for port %d\n", |
f8101c74 SK |
163 | t_params->port_num); |
164 | return ret; | |
165 | } | |
166 | ||
167 | /* Program DPN_BlockCtrl1 register */ | |
168 | ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1)); | |
169 | if (ret < 0) { | |
170 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 171 | "DPN_BlockCtrl1 register write failed for port %d\n", |
f8101c74 SK |
172 | t_params->port_num); |
173 | return ret; | |
174 | } | |
175 | ||
176 | /* Program DPN_SampleCtrl1 register */ | |
177 | wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW; | |
178 | ret = sdw_write(s_rt->slave, addr3, wbuf); | |
179 | if (ret < 0) { | |
180 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 181 | "DPN_SampleCtrl1 register write failed for port %d\n", |
f8101c74 SK |
182 | t_params->port_num); |
183 | return ret; | |
184 | } | |
185 | ||
186 | /* Program DPN_OffsetCtrl1 registers */ | |
187 | ret = sdw_write(s_rt->slave, addr4, t_params->offset1); | |
188 | if (ret < 0) { | |
189 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 190 | "DPN_OffsetCtrl1 register write failed for port %d\n", |
f8101c74 SK |
191 | t_params->port_num); |
192 | return ret; | |
193 | } | |
194 | ||
195 | /* Program DPN_BlockCtrl2 register*/ | |
196 | if (t_params->blk_grp_ctrl_valid) { | |
197 | ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl); | |
198 | if (ret < 0) { | |
199 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 200 | "DPN_BlockCtrl2 reg write failed for port %d\n", |
f8101c74 SK |
201 | t_params->port_num); |
202 | return ret; | |
203 | } | |
204 | } | |
205 | ||
206 | /* program DPN_LaneCtrl register */ | |
207 | if (slave_prop->lane_control_support) { | |
208 | ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl); | |
209 | if (ret < 0) { | |
210 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 211 | "DPN_LaneCtrl register write failed for port %d\n", |
f8101c74 SK |
212 | t_params->port_num); |
213 | return ret; | |
214 | } | |
215 | } | |
216 | ||
217 | if (dpn_prop->type != SDW_DPN_SIMPLE) { | |
218 | ret = _sdw_program_slave_port_params(bus, s_rt->slave, | |
1fe74a5e | 219 | t_params, dpn_prop->type); |
f8101c74 SK |
220 | if (ret < 0) |
221 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 222 | "Transport reg write failed for port: %d\n", |
f8101c74 SK |
223 | t_params->port_num); |
224 | } | |
225 | ||
226 | return ret; | |
227 | } | |
228 | ||
229 | static int sdw_program_master_port_params(struct sdw_bus *bus, | |
1fe74a5e | 230 | struct sdw_port_runtime *p_rt) |
f8101c74 SK |
231 | { |
232 | int ret; | |
233 | ||
234 | /* | |
235 | * we need to set transport and port parameters for the port. | |
7d3b3cdf | 236 | * Transport parameters refers to the sample interval, offsets and |
f8101c74 SK |
237 | * hstart/stop etc of the data. Port parameters refers to word |
238 | * length, flow mode etc of the port | |
239 | */ | |
240 | ret = bus->port_ops->dpn_set_port_transport_params(bus, | |
241 | &p_rt->transport_params, | |
242 | bus->params.next_bank); | |
243 | if (ret < 0) | |
244 | return ret; | |
245 | ||
246 | return bus->port_ops->dpn_set_port_params(bus, | |
1fe74a5e PLB |
247 | &p_rt->port_params, |
248 | bus->params.next_bank); | |
f8101c74 SK |
249 | } |
250 | ||
251 | /** | |
252 | * sdw_program_port_params() - Programs transport parameters of Master(s) | |
253 | * and Slave(s) | |
254 | * | |
255 | * @m_rt: Master stream runtime | |
256 | */ | |
257 | static int sdw_program_port_params(struct sdw_master_runtime *m_rt) | |
258 | { | |
259 | struct sdw_slave_runtime *s_rt = NULL; | |
260 | struct sdw_bus *bus = m_rt->bus; | |
261 | struct sdw_port_runtime *p_rt; | |
262 | int ret = 0; | |
263 | ||
264 | /* Program transport & port parameters for Slave(s) */ | |
265 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { | |
266 | list_for_each_entry(p_rt, &s_rt->port_list, port_node) { | |
267 | ret = sdw_program_slave_port_params(bus, s_rt, p_rt); | |
268 | if (ret < 0) | |
269 | return ret; | |
270 | } | |
271 | } | |
272 | ||
273 | /* Program transport & port parameters for Master(s) */ | |
274 | list_for_each_entry(p_rt, &m_rt->port_list, port_node) { | |
275 | ret = sdw_program_master_port_params(bus, p_rt); | |
276 | if (ret < 0) | |
277 | return ret; | |
278 | } | |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
79df15b7 SK |
283 | /** |
284 | * sdw_enable_disable_slave_ports: Enable/disable slave data port | |
285 | * | |
286 | * @bus: bus instance | |
287 | * @s_rt: slave runtime | |
288 | * @p_rt: port runtime | |
289 | * @en: enable or disable operation | |
290 | * | |
291 | * This function only sets the enable/disable bits in the relevant bank, the | |
292 | * actual enable/disable is done with a bank switch | |
293 | */ | |
294 | static int sdw_enable_disable_slave_ports(struct sdw_bus *bus, | |
1fe74a5e PLB |
295 | struct sdw_slave_runtime *s_rt, |
296 | struct sdw_port_runtime *p_rt, | |
297 | bool en) | |
79df15b7 SK |
298 | { |
299 | struct sdw_transport_params *t_params = &p_rt->transport_params; | |
300 | u32 addr; | |
301 | int ret; | |
302 | ||
303 | if (bus->params.next_bank) | |
304 | addr = SDW_DPN_CHANNELEN_B1(p_rt->num); | |
305 | else | |
306 | addr = SDW_DPN_CHANNELEN_B0(p_rt->num); | |
307 | ||
308 | /* | |
309 | * Since bus doesn't support sharing a port across two streams, | |
310 | * it is safe to reset this register | |
311 | */ | |
312 | if (en) | |
313 | ret = sdw_update(s_rt->slave, addr, 0xFF, p_rt->ch_mask); | |
314 | else | |
315 | ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0); | |
316 | ||
317 | if (ret < 0) | |
318 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 319 | "Slave chn_en reg write failed:%d port:%d\n", |
79df15b7 SK |
320 | ret, t_params->port_num); |
321 | ||
322 | return ret; | |
323 | } | |
324 | ||
325 | static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt, | |
1fe74a5e PLB |
326 | struct sdw_port_runtime *p_rt, |
327 | bool en) | |
79df15b7 SK |
328 | { |
329 | struct sdw_transport_params *t_params = &p_rt->transport_params; | |
330 | struct sdw_bus *bus = m_rt->bus; | |
331 | struct sdw_enable_ch enable_ch; | |
a25eab29 | 332 | int ret; |
79df15b7 SK |
333 | |
334 | enable_ch.port_num = p_rt->num; | |
335 | enable_ch.ch_mask = p_rt->ch_mask; | |
336 | enable_ch.enable = en; | |
337 | ||
338 | /* Perform Master port channel(s) enable/disable */ | |
339 | if (bus->port_ops->dpn_port_enable_ch) { | |
340 | ret = bus->port_ops->dpn_port_enable_ch(bus, | |
1fe74a5e PLB |
341 | &enable_ch, |
342 | bus->params.next_bank); | |
79df15b7 SK |
343 | if (ret < 0) { |
344 | dev_err(bus->dev, | |
17ed5bef | 345 | "Master chn_en write failed:%d port:%d\n", |
79df15b7 SK |
346 | ret, t_params->port_num); |
347 | return ret; | |
348 | } | |
349 | } else { | |
350 | dev_err(bus->dev, | |
351 | "dpn_port_enable_ch not supported, %s failed\n", | |
352 | en ? "enable" : "disable"); | |
353 | return -EINVAL; | |
354 | } | |
355 | ||
356 | return 0; | |
357 | } | |
358 | ||
359 | /** | |
360 | * sdw_enable_disable_ports() - Enable/disable port(s) for Master and | |
361 | * Slave(s) | |
362 | * | |
363 | * @m_rt: Master stream runtime | |
364 | * @en: mode (enable/disable) | |
365 | */ | |
366 | static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en) | |
367 | { | |
368 | struct sdw_port_runtime *s_port, *m_port; | |
369 | struct sdw_slave_runtime *s_rt = NULL; | |
370 | int ret = 0; | |
371 | ||
372 | /* Enable/Disable Slave port(s) */ | |
373 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { | |
374 | list_for_each_entry(s_port, &s_rt->port_list, port_node) { | |
375 | ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt, | |
1fe74a5e | 376 | s_port, en); |
79df15b7 SK |
377 | if (ret < 0) |
378 | return ret; | |
379 | } | |
380 | } | |
381 | ||
382 | /* Enable/Disable Master port(s) */ | |
383 | list_for_each_entry(m_port, &m_rt->port_list, port_node) { | |
384 | ret = sdw_enable_disable_master_ports(m_rt, m_port, en); | |
385 | if (ret < 0) | |
386 | return ret; | |
387 | } | |
388 | ||
389 | return 0; | |
390 | } | |
391 | ||
392 | static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt, | |
1fe74a5e PLB |
393 | struct sdw_prepare_ch prep_ch, |
394 | enum sdw_port_prep_ops cmd) | |
79df15b7 SK |
395 | { |
396 | const struct sdw_slave_ops *ops = s_rt->slave->ops; | |
397 | int ret; | |
398 | ||
399 | if (ops->port_prep) { | |
400 | ret = ops->port_prep(s_rt->slave, &prep_ch, cmd); | |
401 | if (ret < 0) { | |
402 | dev_err(&s_rt->slave->dev, | |
62f0cec3 VK |
403 | "Slave Port Prep cmd %d failed: %d\n", |
404 | cmd, ret); | |
79df15b7 SK |
405 | return ret; |
406 | } | |
407 | } | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus, | |
1fe74a5e PLB |
413 | struct sdw_slave_runtime *s_rt, |
414 | struct sdw_port_runtime *p_rt, | |
415 | bool prep) | |
79df15b7 SK |
416 | { |
417 | struct completion *port_ready = NULL; | |
418 | struct sdw_dpn_prop *dpn_prop; | |
419 | struct sdw_prepare_ch prep_ch; | |
420 | unsigned int time_left; | |
421 | bool intr = false; | |
422 | int ret = 0, val; | |
423 | u32 addr; | |
424 | ||
425 | prep_ch.num = p_rt->num; | |
426 | prep_ch.ch_mask = p_rt->ch_mask; | |
427 | ||
428 | dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave, | |
1fe74a5e PLB |
429 | s_rt->direction, |
430 | prep_ch.num); | |
79df15b7 SK |
431 | if (!dpn_prop) { |
432 | dev_err(bus->dev, | |
17ed5bef | 433 | "Slave Port:%d properties not found\n", prep_ch.num); |
79df15b7 SK |
434 | return -EINVAL; |
435 | } | |
436 | ||
437 | prep_ch.prepare = prep; | |
438 | ||
439 | prep_ch.bank = bus->params.next_bank; | |
440 | ||
441 | if (dpn_prop->device_interrupts || !dpn_prop->simple_ch_prep_sm) | |
442 | intr = true; | |
443 | ||
444 | /* | |
445 | * Enable interrupt before Port prepare. | |
446 | * For Port de-prepare, it is assumed that port | |
447 | * was prepared earlier | |
448 | */ | |
449 | if (prep && intr) { | |
450 | ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep, | |
1fe74a5e | 451 | dpn_prop->device_interrupts); |
79df15b7 SK |
452 | if (ret < 0) |
453 | return ret; | |
454 | } | |
455 | ||
456 | /* Inform slave about the impending port prepare */ | |
457 | sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP); | |
458 | ||
459 | /* Prepare Slave port implementing CP_SM */ | |
460 | if (!dpn_prop->simple_ch_prep_sm) { | |
461 | addr = SDW_DPN_PREPARECTRL(p_rt->num); | |
462 | ||
463 | if (prep) | |
464 | ret = sdw_update(s_rt->slave, addr, | |
1fe74a5e | 465 | 0xFF, p_rt->ch_mask); |
79df15b7 SK |
466 | else |
467 | ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0); | |
468 | ||
469 | if (ret < 0) { | |
470 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 471 | "Slave prep_ctrl reg write failed\n"); |
79df15b7 SK |
472 | return ret; |
473 | } | |
474 | ||
475 | /* Wait for completion on port ready */ | |
476 | port_ready = &s_rt->slave->port_ready[prep_ch.num]; | |
477 | time_left = wait_for_completion_timeout(port_ready, | |
478 | msecs_to_jiffies(dpn_prop->ch_prep_timeout)); | |
479 | ||
480 | val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num)); | |
481 | val &= p_rt->ch_mask; | |
482 | if (!time_left || val) { | |
483 | dev_err(&s_rt->slave->dev, | |
17ed5bef | 484 | "Chn prep failed for port:%d\n", prep_ch.num); |
79df15b7 SK |
485 | return -ETIMEDOUT; |
486 | } | |
487 | } | |
488 | ||
489 | /* Inform slaves about ports prepared */ | |
490 | sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP); | |
491 | ||
492 | /* Disable interrupt after Port de-prepare */ | |
493 | if (!prep && intr) | |
494 | ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep, | |
1fe74a5e | 495 | dpn_prop->device_interrupts); |
79df15b7 SK |
496 | |
497 | return ret; | |
498 | } | |
499 | ||
500 | static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt, | |
1fe74a5e PLB |
501 | struct sdw_port_runtime *p_rt, |
502 | bool prep) | |
79df15b7 SK |
503 | { |
504 | struct sdw_transport_params *t_params = &p_rt->transport_params; | |
505 | struct sdw_bus *bus = m_rt->bus; | |
506 | const struct sdw_master_port_ops *ops = bus->port_ops; | |
507 | struct sdw_prepare_ch prep_ch; | |
508 | int ret = 0; | |
509 | ||
510 | prep_ch.num = p_rt->num; | |
511 | prep_ch.ch_mask = p_rt->ch_mask; | |
512 | prep_ch.prepare = prep; /* Prepare/De-prepare */ | |
513 | prep_ch.bank = bus->params.next_bank; | |
514 | ||
515 | /* Pre-prepare/Pre-deprepare port(s) */ | |
516 | if (ops->dpn_port_prep) { | |
517 | ret = ops->dpn_port_prep(bus, &prep_ch); | |
518 | if (ret < 0) { | |
17ed5bef | 519 | dev_err(bus->dev, "Port prepare failed for port:%d\n", |
1fe74a5e | 520 | t_params->port_num); |
79df15b7 SK |
521 | return ret; |
522 | } | |
523 | } | |
524 | ||
525 | return ret; | |
526 | } | |
527 | ||
528 | /** | |
529 | * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and | |
530 | * Slave(s) | |
531 | * | |
532 | * @m_rt: Master runtime handle | |
533 | * @prep: Prepare or De-prepare | |
534 | */ | |
535 | static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep) | |
536 | { | |
537 | struct sdw_slave_runtime *s_rt = NULL; | |
538 | struct sdw_port_runtime *p_rt; | |
539 | int ret = 0; | |
540 | ||
541 | /* Prepare/De-prepare Slave port(s) */ | |
542 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { | |
543 | list_for_each_entry(p_rt, &s_rt->port_list, port_node) { | |
544 | ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt, | |
1fe74a5e | 545 | p_rt, prep); |
79df15b7 SK |
546 | if (ret < 0) |
547 | return ret; | |
548 | } | |
549 | } | |
550 | ||
551 | /* Prepare/De-prepare Master port(s) */ | |
552 | list_for_each_entry(p_rt, &m_rt->port_list, port_node) { | |
553 | ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep); | |
554 | if (ret < 0) | |
555 | return ret; | |
556 | } | |
557 | ||
558 | return ret; | |
559 | } | |
560 | ||
99b8a5d6 SK |
561 | /** |
562 | * sdw_notify_config() - Notify bus configuration | |
563 | * | |
564 | * @m_rt: Master runtime handle | |
565 | * | |
566 | * This function notifies the Master(s) and Slave(s) of the | |
567 | * new bus configuration. | |
568 | */ | |
569 | static int sdw_notify_config(struct sdw_master_runtime *m_rt) | |
570 | { | |
571 | struct sdw_slave_runtime *s_rt; | |
572 | struct sdw_bus *bus = m_rt->bus; | |
573 | struct sdw_slave *slave; | |
574 | int ret = 0; | |
575 | ||
576 | if (bus->ops->set_bus_conf) { | |
577 | ret = bus->ops->set_bus_conf(bus, &bus->params); | |
578 | if (ret < 0) | |
579 | return ret; | |
580 | } | |
581 | ||
582 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { | |
583 | slave = s_rt->slave; | |
584 | ||
585 | if (slave->ops->bus_config) { | |
586 | ret = slave->ops->bus_config(slave, &bus->params); | |
587 | if (ret < 0) | |
17ed5bef | 588 | dev_err(bus->dev, "Notify Slave: %d failed\n", |
1fe74a5e | 589 | slave->dev_num); |
99b8a5d6 SK |
590 | return ret; |
591 | } | |
592 | } | |
593 | ||
594 | return ret; | |
595 | } | |
596 | ||
597 | /** | |
598 | * sdw_program_params() - Program transport and port parameters for Master(s) | |
599 | * and Slave(s) | |
600 | * | |
601 | * @bus: SDW bus instance | |
602 | */ | |
603 | static int sdw_program_params(struct sdw_bus *bus) | |
604 | { | |
605 | struct sdw_master_runtime *m_rt = NULL; | |
606 | int ret = 0; | |
607 | ||
608 | list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) { | |
609 | ret = sdw_program_port_params(m_rt); | |
610 | if (ret < 0) { | |
611 | dev_err(bus->dev, | |
17ed5bef | 612 | "Program transport params failed: %d\n", ret); |
99b8a5d6 SK |
613 | return ret; |
614 | } | |
615 | ||
616 | ret = sdw_notify_config(m_rt); | |
617 | if (ret < 0) { | |
62f0cec3 VK |
618 | dev_err(bus->dev, |
619 | "Notify bus config failed: %d\n", ret); | |
99b8a5d6 SK |
620 | return ret; |
621 | } | |
622 | ||
623 | /* Enable port(s) on alternate bank for all active streams */ | |
624 | if (m_rt->stream->state != SDW_STREAM_ENABLED) | |
625 | continue; | |
626 | ||
627 | ret = sdw_enable_disable_ports(m_rt, true); | |
628 | if (ret < 0) { | |
17ed5bef | 629 | dev_err(bus->dev, "Enable channel failed: %d\n", ret); |
99b8a5d6 SK |
630 | return ret; |
631 | } | |
632 | } | |
633 | ||
634 | return ret; | |
635 | } | |
636 | ||
ce6e74d0 | 637 | static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count) |
99b8a5d6 SK |
638 | { |
639 | int col_index, row_index; | |
ce6e74d0 | 640 | bool multi_link; |
99b8a5d6 SK |
641 | struct sdw_msg *wr_msg; |
642 | u8 *wbuf = NULL; | |
643 | int ret = 0; | |
644 | u16 addr; | |
645 | ||
646 | wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL); | |
647 | if (!wr_msg) | |
648 | return -ENOMEM; | |
649 | ||
ce6e74d0 SN |
650 | bus->defer_msg.msg = wr_msg; |
651 | ||
99b8a5d6 SK |
652 | wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL); |
653 | if (!wbuf) { | |
654 | ret = -ENOMEM; | |
655 | goto error_1; | |
656 | } | |
657 | ||
658 | /* Get row and column index to program register */ | |
659 | col_index = sdw_find_col_index(bus->params.col); | |
660 | row_index = sdw_find_row_index(bus->params.row); | |
661 | wbuf[0] = col_index | (row_index << 3); | |
662 | ||
663 | if (bus->params.next_bank) | |
664 | addr = SDW_SCP_FRAMECTRL_B1; | |
665 | else | |
666 | addr = SDW_SCP_FRAMECTRL_B0; | |
667 | ||
668 | sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM, | |
1fe74a5e | 669 | SDW_MSG_FLAG_WRITE, wbuf); |
99b8a5d6 SK |
670 | wr_msg->ssp_sync = true; |
671 | ||
ce6e74d0 SN |
672 | /* |
673 | * Set the multi_link flag only when both the hardware supports | |
674 | * and there is a stream handled by multiple masters | |
675 | */ | |
676 | multi_link = bus->multi_link && (m_rt_count > 1); | |
677 | ||
678 | if (multi_link) | |
679 | ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg); | |
680 | else | |
681 | ret = sdw_transfer(bus, wr_msg); | |
682 | ||
99b8a5d6 | 683 | if (ret < 0) { |
17ed5bef | 684 | dev_err(bus->dev, "Slave frame_ctrl reg write failed\n"); |
99b8a5d6 SK |
685 | goto error; |
686 | } | |
687 | ||
ce6e74d0 SN |
688 | if (!multi_link) { |
689 | kfree(wr_msg); | |
690 | kfree(wbuf); | |
691 | bus->defer_msg.msg = NULL; | |
692 | bus->params.curr_bank = !bus->params.curr_bank; | |
693 | bus->params.next_bank = !bus->params.next_bank; | |
694 | } | |
99b8a5d6 SK |
695 | |
696 | return 0; | |
697 | ||
698 | error: | |
699 | kfree(wbuf); | |
700 | error_1: | |
701 | kfree(wr_msg); | |
702 | return ret; | |
703 | } | |
704 | ||
ce6e74d0 SN |
705 | /** |
706 | * sdw_ml_sync_bank_switch: Multilink register bank switch | |
707 | * | |
708 | * @bus: SDW bus instance | |
709 | * | |
710 | * Caller function should free the buffers on error | |
711 | */ | |
712 | static int sdw_ml_sync_bank_switch(struct sdw_bus *bus) | |
713 | { | |
714 | unsigned long time_left; | |
715 | ||
716 | if (!bus->multi_link) | |
717 | return 0; | |
718 | ||
719 | /* Wait for completion of transfer */ | |
720 | time_left = wait_for_completion_timeout(&bus->defer_msg.complete, | |
721 | bus->bank_switch_timeout); | |
722 | ||
723 | if (!time_left) { | |
17ed5bef | 724 | dev_err(bus->dev, "Controller Timed out on bank switch\n"); |
ce6e74d0 SN |
725 | return -ETIMEDOUT; |
726 | } | |
727 | ||
728 | bus->params.curr_bank = !bus->params.curr_bank; | |
729 | bus->params.next_bank = !bus->params.next_bank; | |
730 | ||
731 | if (bus->defer_msg.msg) { | |
732 | kfree(bus->defer_msg.msg->buf); | |
733 | kfree(bus->defer_msg.msg); | |
734 | } | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
99b8a5d6 SK |
739 | static int do_bank_switch(struct sdw_stream_runtime *stream) |
740 | { | |
48949722 | 741 | struct sdw_master_runtime *m_rt = NULL; |
99b8a5d6 | 742 | const struct sdw_master_ops *ops; |
48949722 | 743 | struct sdw_bus *bus = NULL; |
ce6e74d0 | 744 | bool multi_link = false; |
99b8a5d6 SK |
745 | int ret = 0; |
746 | ||
48949722 VK |
747 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
748 | bus = m_rt->bus; | |
749 | ops = bus->ops; | |
750 | ||
ce6e74d0 SN |
751 | if (bus->multi_link) { |
752 | multi_link = true; | |
753 | mutex_lock(&bus->msg_lock); | |
754 | } | |
755 | ||
48949722 VK |
756 | /* Pre-bank switch */ |
757 | if (ops->pre_bank_switch) { | |
758 | ret = ops->pre_bank_switch(bus); | |
759 | if (ret < 0) { | |
760 | dev_err(bus->dev, | |
17ed5bef | 761 | "Pre bank switch op failed: %d\n", ret); |
ce6e74d0 | 762 | goto msg_unlock; |
48949722 VK |
763 | } |
764 | } | |
765 | ||
ce6e74d0 SN |
766 | /* |
767 | * Perform Bank switch operation. | |
768 | * For multi link cases, the actual bank switch is | |
769 | * synchronized across all Masters and happens later as a | |
770 | * part of post_bank_switch ops. | |
771 | */ | |
772 | ret = sdw_bank_switch(bus, stream->m_rt_count); | |
99b8a5d6 | 773 | if (ret < 0) { |
17ed5bef | 774 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
ce6e74d0 | 775 | goto error; |
99b8a5d6 SK |
776 | } |
777 | } | |
778 | ||
ce6e74d0 SN |
779 | /* |
780 | * For multi link cases, it is expected that the bank switch is | |
781 | * triggered by the post_bank_switch for the first Master in the list | |
782 | * and for the other Masters the post_bank_switch() should return doing | |
783 | * nothing. | |
784 | */ | |
48949722 VK |
785 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
786 | bus = m_rt->bus; | |
787 | ops = bus->ops; | |
99b8a5d6 | 788 | |
48949722 VK |
789 | /* Post-bank switch */ |
790 | if (ops->post_bank_switch) { | |
791 | ret = ops->post_bank_switch(bus); | |
792 | if (ret < 0) { | |
793 | dev_err(bus->dev, | |
62f0cec3 VK |
794 | "Post bank switch op failed: %d\n", |
795 | ret); | |
ce6e74d0 | 796 | goto error; |
48949722 | 797 | } |
ce6e74d0 SN |
798 | } else if (bus->multi_link && stream->m_rt_count > 1) { |
799 | dev_err(bus->dev, | |
17ed5bef | 800 | "Post bank switch ops not implemented\n"); |
ce6e74d0 SN |
801 | goto error; |
802 | } | |
803 | ||
804 | /* Set the bank switch timeout to default, if not set */ | |
805 | if (!bus->bank_switch_timeout) | |
806 | bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT; | |
807 | ||
808 | /* Check if bank switch was successful */ | |
809 | ret = sdw_ml_sync_bank_switch(bus); | |
810 | if (ret < 0) { | |
811 | dev_err(bus->dev, | |
17ed5bef | 812 | "multi link bank switch failed: %d\n", ret); |
ce6e74d0 SN |
813 | goto error; |
814 | } | |
815 | ||
816 | mutex_unlock(&bus->msg_lock); | |
817 | } | |
818 | ||
819 | return ret; | |
820 | ||
821 | error: | |
822 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
ce6e74d0 SN |
823 | bus = m_rt->bus; |
824 | ||
825 | kfree(bus->defer_msg.msg->buf); | |
826 | kfree(bus->defer_msg.msg); | |
827 | } | |
828 | ||
829 | msg_unlock: | |
830 | ||
831 | if (multi_link) { | |
832 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
833 | bus = m_rt->bus; | |
834 | if (mutex_is_locked(&bus->msg_lock)) | |
835 | mutex_unlock(&bus->msg_lock); | |
99b8a5d6 SK |
836 | } |
837 | } | |
838 | ||
839 | return ret; | |
840 | } | |
841 | ||
89e59053 SK |
842 | /** |
843 | * sdw_release_stream() - Free the assigned stream runtime | |
844 | * | |
845 | * @stream: SoundWire stream runtime | |
846 | * | |
847 | * sdw_release_stream should be called only once per stream | |
848 | */ | |
849 | void sdw_release_stream(struct sdw_stream_runtime *stream) | |
850 | { | |
851 | kfree(stream); | |
852 | } | |
853 | EXPORT_SYMBOL(sdw_release_stream); | |
854 | ||
855 | /** | |
856 | * sdw_alloc_stream() - Allocate and return stream runtime | |
857 | * | |
858 | * @stream_name: SoundWire stream name | |
859 | * | |
860 | * Allocates a SoundWire stream runtime instance. | |
861 | * sdw_alloc_stream should be called only once per stream. Typically | |
862 | * invoked from ALSA/ASoC machine/platform driver. | |
863 | */ | |
864 | struct sdw_stream_runtime *sdw_alloc_stream(char *stream_name) | |
865 | { | |
866 | struct sdw_stream_runtime *stream; | |
867 | ||
868 | stream = kzalloc(sizeof(*stream), GFP_KERNEL); | |
869 | if (!stream) | |
870 | return NULL; | |
871 | ||
872 | stream->name = stream_name; | |
0c4a1049 | 873 | INIT_LIST_HEAD(&stream->master_list); |
89e59053 | 874 | stream->state = SDW_STREAM_ALLOCATED; |
9b5c132a | 875 | stream->m_rt_count = 0; |
89e59053 SK |
876 | |
877 | return stream; | |
878 | } | |
879 | EXPORT_SYMBOL(sdw_alloc_stream); | |
880 | ||
48949722 VK |
881 | static struct sdw_master_runtime |
882 | *sdw_find_master_rt(struct sdw_bus *bus, | |
1fe74a5e | 883 | struct sdw_stream_runtime *stream) |
48949722 VK |
884 | { |
885 | struct sdw_master_runtime *m_rt = NULL; | |
886 | ||
887 | /* Retrieve Bus handle if already available */ | |
888 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
889 | if (m_rt->bus == bus) | |
890 | return m_rt; | |
891 | } | |
892 | ||
893 | return NULL; | |
894 | } | |
895 | ||
89e59053 SK |
896 | /** |
897 | * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle | |
898 | * | |
899 | * @bus: SDW bus instance | |
900 | * @stream_config: Stream configuration | |
901 | * @stream: Stream runtime handle. | |
902 | * | |
903 | * This function is to be called with bus_lock held. | |
904 | */ | |
905 | static struct sdw_master_runtime | |
906 | *sdw_alloc_master_rt(struct sdw_bus *bus, | |
1fe74a5e PLB |
907 | struct sdw_stream_config *stream_config, |
908 | struct sdw_stream_runtime *stream) | |
89e59053 SK |
909 | { |
910 | struct sdw_master_runtime *m_rt; | |
911 | ||
89e59053 SK |
912 | /* |
913 | * check if Master is already allocated (as a result of Slave adding | |
914 | * it first), if so skip allocation and go to configure | |
915 | */ | |
48949722 | 916 | m_rt = sdw_find_master_rt(bus, stream); |
89e59053 SK |
917 | if (m_rt) |
918 | goto stream_config; | |
919 | ||
920 | m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL); | |
921 | if (!m_rt) | |
922 | return NULL; | |
923 | ||
924 | /* Initialization of Master runtime handle */ | |
bbe7379d | 925 | INIT_LIST_HEAD(&m_rt->port_list); |
89e59053 | 926 | INIT_LIST_HEAD(&m_rt->slave_rt_list); |
48949722 | 927 | list_add_tail(&m_rt->stream_node, &stream->master_list); |
89e59053 SK |
928 | |
929 | list_add_tail(&m_rt->bus_node, &bus->m_rt_list); | |
930 | ||
931 | stream_config: | |
932 | m_rt->ch_count = stream_config->ch_count; | |
933 | m_rt->bus = bus; | |
934 | m_rt->stream = stream; | |
935 | m_rt->direction = stream_config->direction; | |
936 | ||
937 | return m_rt; | |
938 | } | |
939 | ||
940 | /** | |
941 | * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle. | |
942 | * | |
943 | * @slave: Slave handle | |
944 | * @stream_config: Stream configuration | |
945 | * @stream: Stream runtime handle | |
946 | * | |
947 | * This function is to be called with bus_lock held. | |
948 | */ | |
949 | static struct sdw_slave_runtime | |
950 | *sdw_alloc_slave_rt(struct sdw_slave *slave, | |
1fe74a5e PLB |
951 | struct sdw_stream_config *stream_config, |
952 | struct sdw_stream_runtime *stream) | |
89e59053 SK |
953 | { |
954 | struct sdw_slave_runtime *s_rt = NULL; | |
955 | ||
956 | s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL); | |
957 | if (!s_rt) | |
958 | return NULL; | |
959 | ||
bbe7379d | 960 | INIT_LIST_HEAD(&s_rt->port_list); |
89e59053 SK |
961 | s_rt->ch_count = stream_config->ch_count; |
962 | s_rt->direction = stream_config->direction; | |
963 | s_rt->slave = slave; | |
964 | ||
965 | return s_rt; | |
966 | } | |
967 | ||
bbe7379d | 968 | static void sdw_master_port_release(struct sdw_bus *bus, |
1fe74a5e | 969 | struct sdw_master_runtime *m_rt) |
bbe7379d SK |
970 | { |
971 | struct sdw_port_runtime *p_rt, *_p_rt; | |
972 | ||
1fe74a5e | 973 | list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) { |
bbe7379d SK |
974 | list_del(&p_rt->port_node); |
975 | kfree(p_rt); | |
976 | } | |
977 | } | |
978 | ||
979 | static void sdw_slave_port_release(struct sdw_bus *bus, | |
1fe74a5e PLB |
980 | struct sdw_slave *slave, |
981 | struct sdw_stream_runtime *stream) | |
bbe7379d SK |
982 | { |
983 | struct sdw_port_runtime *p_rt, *_p_rt; | |
48949722 | 984 | struct sdw_master_runtime *m_rt; |
bbe7379d SK |
985 | struct sdw_slave_runtime *s_rt; |
986 | ||
48949722 VK |
987 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
988 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { | |
48949722 VK |
989 | if (s_rt->slave != slave) |
990 | continue; | |
991 | ||
992 | list_for_each_entry_safe(p_rt, _p_rt, | |
1fe74a5e | 993 | &s_rt->port_list, port_node) { |
48949722 VK |
994 | list_del(&p_rt->port_node); |
995 | kfree(p_rt); | |
996 | } | |
bbe7379d SK |
997 | } |
998 | } | |
999 | } | |
1000 | ||
89e59053 SK |
1001 | /** |
1002 | * sdw_release_slave_stream() - Free Slave(s) runtime handle | |
1003 | * | |
1004 | * @slave: Slave handle. | |
1005 | * @stream: Stream runtime handle. | |
1006 | * | |
1007 | * This function is to be called with bus_lock held. | |
1008 | */ | |
1009 | static void sdw_release_slave_stream(struct sdw_slave *slave, | |
1fe74a5e | 1010 | struct sdw_stream_runtime *stream) |
89e59053 SK |
1011 | { |
1012 | struct sdw_slave_runtime *s_rt, *_s_rt; | |
48949722 | 1013 | struct sdw_master_runtime *m_rt; |
89e59053 | 1014 | |
48949722 VK |
1015 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
1016 | /* Retrieve Slave runtime handle */ | |
1017 | list_for_each_entry_safe(s_rt, _s_rt, | |
1fe74a5e | 1018 | &m_rt->slave_rt_list, m_rt_node) { |
48949722 VK |
1019 | if (s_rt->slave == slave) { |
1020 | list_del(&s_rt->m_rt_node); | |
1021 | kfree(s_rt); | |
1022 | return; | |
1023 | } | |
89e59053 SK |
1024 | } |
1025 | } | |
1026 | } | |
1027 | ||
1028 | /** | |
1029 | * sdw_release_master_stream() - Free Master runtime handle | |
1030 | * | |
48949722 | 1031 | * @m_rt: Master runtime node |
89e59053 SK |
1032 | * @stream: Stream runtime handle. |
1033 | * | |
1034 | * This function is to be called with bus_lock held | |
1035 | * It frees the Master runtime handle and associated Slave(s) runtime | |
1036 | * handle. If this is called first then sdw_release_slave_stream() will have | |
1037 | * no effect as Slave(s) runtime handle would already be freed up. | |
1038 | */ | |
48949722 | 1039 | static void sdw_release_master_stream(struct sdw_master_runtime *m_rt, |
1fe74a5e | 1040 | struct sdw_stream_runtime *stream) |
89e59053 | 1041 | { |
89e59053 SK |
1042 | struct sdw_slave_runtime *s_rt, *_s_rt; |
1043 | ||
8d6ccf5c SK |
1044 | list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) { |
1045 | sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream); | |
1046 | sdw_release_slave_stream(s_rt->slave, stream); | |
1047 | } | |
89e59053 | 1048 | |
48949722 | 1049 | list_del(&m_rt->stream_node); |
89e59053 | 1050 | list_del(&m_rt->bus_node); |
48949722 | 1051 | kfree(m_rt); |
89e59053 SK |
1052 | } |
1053 | ||
1054 | /** | |
1055 | * sdw_stream_remove_master() - Remove master from sdw_stream | |
1056 | * | |
1057 | * @bus: SDW Bus instance | |
1058 | * @stream: SoundWire stream | |
1059 | * | |
bbe7379d | 1060 | * This removes and frees port_rt and master_rt from a stream |
89e59053 SK |
1061 | */ |
1062 | int sdw_stream_remove_master(struct sdw_bus *bus, | |
1fe74a5e | 1063 | struct sdw_stream_runtime *stream) |
89e59053 | 1064 | { |
48949722 VK |
1065 | struct sdw_master_runtime *m_rt, *_m_rt; |
1066 | ||
89e59053 SK |
1067 | mutex_lock(&bus->bus_lock); |
1068 | ||
48949722 | 1069 | list_for_each_entry_safe(m_rt, _m_rt, |
1fe74a5e | 1070 | &stream->master_list, stream_node) { |
48949722 VK |
1071 | if (m_rt->bus != bus) |
1072 | continue; | |
1073 | ||
1074 | sdw_master_port_release(bus, m_rt); | |
1075 | sdw_release_master_stream(m_rt, stream); | |
ce6e74d0 | 1076 | stream->m_rt_count--; |
48949722 VK |
1077 | } |
1078 | ||
1079 | if (list_empty(&stream->master_list)) | |
1080 | stream->state = SDW_STREAM_RELEASED; | |
89e59053 SK |
1081 | |
1082 | mutex_unlock(&bus->bus_lock); | |
1083 | ||
1084 | return 0; | |
1085 | } | |
1086 | EXPORT_SYMBOL(sdw_stream_remove_master); | |
1087 | ||
1088 | /** | |
1089 | * sdw_stream_remove_slave() - Remove slave from sdw_stream | |
1090 | * | |
1091 | * @slave: SDW Slave instance | |
1092 | * @stream: SoundWire stream | |
1093 | * | |
bbe7379d | 1094 | * This removes and frees port_rt and slave_rt from a stream |
89e59053 SK |
1095 | */ |
1096 | int sdw_stream_remove_slave(struct sdw_slave *slave, | |
1fe74a5e | 1097 | struct sdw_stream_runtime *stream) |
89e59053 SK |
1098 | { |
1099 | mutex_lock(&slave->bus->bus_lock); | |
1100 | ||
bbe7379d | 1101 | sdw_slave_port_release(slave->bus, slave, stream); |
89e59053 SK |
1102 | sdw_release_slave_stream(slave, stream); |
1103 | ||
1104 | mutex_unlock(&slave->bus->bus_lock); | |
1105 | ||
1106 | return 0; | |
1107 | } | |
1108 | EXPORT_SYMBOL(sdw_stream_remove_slave); | |
1109 | ||
1110 | /** | |
1111 | * sdw_config_stream() - Configure the allocated stream | |
1112 | * | |
1113 | * @dev: SDW device | |
1114 | * @stream: SoundWire stream | |
1115 | * @stream_config: Stream configuration for audio stream | |
1116 | * @is_slave: is API called from Slave or Master | |
1117 | * | |
1118 | * This function is to be called with bus_lock held. | |
1119 | */ | |
1120 | static int sdw_config_stream(struct device *dev, | |
1fe74a5e PLB |
1121 | struct sdw_stream_runtime *stream, |
1122 | struct sdw_stream_config *stream_config, | |
1123 | bool is_slave) | |
89e59053 SK |
1124 | { |
1125 | /* | |
1126 | * Update the stream rate, channel and bps based on data | |
1127 | * source. For more than one data source (multilink), | |
1128 | * match the rate, bps, stream type and increment number of channels. | |
1129 | * | |
1130 | * If rate/bps is zero, it means the values are not set, so skip | |
1131 | * comparison and allow the value to be set and stored in stream | |
1132 | */ | |
1133 | if (stream->params.rate && | |
1fe74a5e | 1134 | stream->params.rate != stream_config->frame_rate) { |
17ed5bef | 1135 | dev_err(dev, "rate not matching, stream:%s\n", stream->name); |
89e59053 SK |
1136 | return -EINVAL; |
1137 | } | |
1138 | ||
1139 | if (stream->params.bps && | |
1fe74a5e | 1140 | stream->params.bps != stream_config->bps) { |
17ed5bef | 1141 | dev_err(dev, "bps not matching, stream:%s\n", stream->name); |
89e59053 SK |
1142 | return -EINVAL; |
1143 | } | |
1144 | ||
1145 | stream->type = stream_config->type; | |
1146 | stream->params.rate = stream_config->frame_rate; | |
1147 | stream->params.bps = stream_config->bps; | |
1148 | ||
1149 | /* TODO: Update this check during Device-device support */ | |
1150 | if (is_slave) | |
1151 | stream->params.ch_count += stream_config->ch_count; | |
1152 | ||
1153 | return 0; | |
1154 | } | |
1155 | ||
bbe7379d | 1156 | static int sdw_is_valid_port_range(struct device *dev, |
1fe74a5e | 1157 | struct sdw_port_runtime *p_rt) |
bbe7379d SK |
1158 | { |
1159 | if (!SDW_VALID_PORT_RANGE(p_rt->num)) { | |
1160 | dev_err(dev, | |
17ed5bef | 1161 | "SoundWire: Invalid port number :%d\n", p_rt->num); |
bbe7379d SK |
1162 | return -EINVAL; |
1163 | } | |
1164 | ||
1165 | return 0; | |
1166 | } | |
1167 | ||
1fe74a5e PLB |
1168 | static struct sdw_port_runtime |
1169 | *sdw_port_alloc(struct device *dev, | |
1170 | struct sdw_port_config *port_config, | |
1171 | int port_index) | |
bbe7379d SK |
1172 | { |
1173 | struct sdw_port_runtime *p_rt; | |
1174 | ||
1175 | p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL); | |
1176 | if (!p_rt) | |
1177 | return NULL; | |
1178 | ||
1179 | p_rt->ch_mask = port_config[port_index].ch_mask; | |
1180 | p_rt->num = port_config[port_index].num; | |
1181 | ||
1182 | return p_rt; | |
1183 | } | |
1184 | ||
1185 | static int sdw_master_port_config(struct sdw_bus *bus, | |
1fe74a5e PLB |
1186 | struct sdw_master_runtime *m_rt, |
1187 | struct sdw_port_config *port_config, | |
1188 | unsigned int num_ports) | |
bbe7379d SK |
1189 | { |
1190 | struct sdw_port_runtime *p_rt; | |
1191 | int i; | |
1192 | ||
1193 | /* Iterate for number of ports to perform initialization */ | |
1194 | for (i = 0; i < num_ports; i++) { | |
1195 | p_rt = sdw_port_alloc(bus->dev, port_config, i); | |
1196 | if (!p_rt) | |
1197 | return -ENOMEM; | |
1198 | ||
1199 | /* | |
1200 | * TODO: Check port capabilities for requested | |
1201 | * configuration (audio mode support) | |
1202 | */ | |
1203 | ||
1204 | list_add_tail(&p_rt->port_node, &m_rt->port_list); | |
1205 | } | |
1206 | ||
1207 | return 0; | |
1208 | } | |
1209 | ||
1210 | static int sdw_slave_port_config(struct sdw_slave *slave, | |
1fe74a5e PLB |
1211 | struct sdw_slave_runtime *s_rt, |
1212 | struct sdw_port_config *port_config, | |
1213 | unsigned int num_config) | |
bbe7379d SK |
1214 | { |
1215 | struct sdw_port_runtime *p_rt; | |
1216 | int i, ret; | |
1217 | ||
1218 | /* Iterate for number of ports to perform initialization */ | |
1219 | for (i = 0; i < num_config; i++) { | |
1220 | p_rt = sdw_port_alloc(&slave->dev, port_config, i); | |
1221 | if (!p_rt) | |
1222 | return -ENOMEM; | |
1223 | ||
1224 | /* | |
1225 | * TODO: Check valid port range as defined by DisCo/ | |
1226 | * slave | |
1227 | */ | |
1228 | ret = sdw_is_valid_port_range(&slave->dev, p_rt); | |
1229 | if (ret < 0) { | |
1230 | kfree(p_rt); | |
1231 | return ret; | |
1232 | } | |
1233 | ||
1234 | /* | |
1235 | * TODO: Check port capabilities for requested | |
1236 | * configuration (audio mode support) | |
1237 | */ | |
1238 | ||
1239 | list_add_tail(&p_rt->port_node, &s_rt->port_list); | |
1240 | } | |
1241 | ||
1242 | return 0; | |
1243 | } | |
1244 | ||
89e59053 SK |
1245 | /** |
1246 | * sdw_stream_add_master() - Allocate and add master runtime to a stream | |
1247 | * | |
1248 | * @bus: SDW Bus instance | |
1249 | * @stream_config: Stream configuration for audio stream | |
bbe7379d SK |
1250 | * @port_config: Port configuration for audio stream |
1251 | * @num_ports: Number of ports | |
89e59053 SK |
1252 | * @stream: SoundWire stream |
1253 | */ | |
1254 | int sdw_stream_add_master(struct sdw_bus *bus, | |
1fe74a5e PLB |
1255 | struct sdw_stream_config *stream_config, |
1256 | struct sdw_port_config *port_config, | |
1257 | unsigned int num_ports, | |
1258 | struct sdw_stream_runtime *stream) | |
89e59053 SK |
1259 | { |
1260 | struct sdw_master_runtime *m_rt = NULL; | |
1261 | int ret; | |
1262 | ||
1263 | mutex_lock(&bus->bus_lock); | |
1264 | ||
ce6e74d0 SN |
1265 | /* |
1266 | * For multi link streams, add the second master only if | |
1267 | * the bus supports it. | |
1268 | * Check if bus->multi_link is set | |
1269 | */ | |
1270 | if (!bus->multi_link && stream->m_rt_count > 0) { | |
1271 | dev_err(bus->dev, | |
17ed5bef | 1272 | "Multilink not supported, link %d\n", bus->link_id); |
ce6e74d0 SN |
1273 | ret = -EINVAL; |
1274 | goto unlock; | |
1275 | } | |
1276 | ||
89e59053 SK |
1277 | m_rt = sdw_alloc_master_rt(bus, stream_config, stream); |
1278 | if (!m_rt) { | |
1279 | dev_err(bus->dev, | |
17ed5bef | 1280 | "Master runtime config failed for stream:%s\n", |
1fe74a5e | 1281 | stream->name); |
89e59053 | 1282 | ret = -ENOMEM; |
3fef1a22 | 1283 | goto unlock; |
89e59053 SK |
1284 | } |
1285 | ||
1286 | ret = sdw_config_stream(bus->dev, stream, stream_config, false); | |
1287 | if (ret) | |
1288 | goto stream_error; | |
1289 | ||
bbe7379d SK |
1290 | ret = sdw_master_port_config(bus, m_rt, port_config, num_ports); |
1291 | if (ret) | |
1292 | goto stream_error; | |
1293 | ||
ce6e74d0 SN |
1294 | stream->m_rt_count++; |
1295 | ||
3fef1a22 SN |
1296 | goto unlock; |
1297 | ||
89e59053 | 1298 | stream_error: |
48949722 | 1299 | sdw_release_master_stream(m_rt, stream); |
3fef1a22 | 1300 | unlock: |
89e59053 SK |
1301 | mutex_unlock(&bus->bus_lock); |
1302 | return ret; | |
1303 | } | |
1304 | EXPORT_SYMBOL(sdw_stream_add_master); | |
1305 | ||
1306 | /** | |
1307 | * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream | |
1308 | * | |
1309 | * @slave: SDW Slave instance | |
1310 | * @stream_config: Stream configuration for audio stream | |
1311 | * @stream: SoundWire stream | |
bbe7379d SK |
1312 | * @port_config: Port configuration for audio stream |
1313 | * @num_ports: Number of ports | |
0aebe40b SN |
1314 | * |
1315 | * It is expected that Slave is added before adding Master | |
1316 | * to the Stream. | |
1317 | * | |
89e59053 SK |
1318 | */ |
1319 | int sdw_stream_add_slave(struct sdw_slave *slave, | |
1fe74a5e PLB |
1320 | struct sdw_stream_config *stream_config, |
1321 | struct sdw_port_config *port_config, | |
1322 | unsigned int num_ports, | |
1323 | struct sdw_stream_runtime *stream) | |
89e59053 SK |
1324 | { |
1325 | struct sdw_slave_runtime *s_rt; | |
1326 | struct sdw_master_runtime *m_rt; | |
1327 | int ret; | |
1328 | ||
1329 | mutex_lock(&slave->bus->bus_lock); | |
1330 | ||
1331 | /* | |
1332 | * If this API is invoked by Slave first then m_rt is not valid. | |
1333 | * So, allocate m_rt and add Slave to it. | |
1334 | */ | |
1335 | m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream); | |
1336 | if (!m_rt) { | |
1337 | dev_err(&slave->dev, | |
17ed5bef | 1338 | "alloc master runtime failed for stream:%s\n", |
1fe74a5e | 1339 | stream->name); |
89e59053 SK |
1340 | ret = -ENOMEM; |
1341 | goto error; | |
1342 | } | |
1343 | ||
1344 | s_rt = sdw_alloc_slave_rt(slave, stream_config, stream); | |
1345 | if (!s_rt) { | |
1346 | dev_err(&slave->dev, | |
17ed5bef | 1347 | "Slave runtime config failed for stream:%s\n", |
1fe74a5e | 1348 | stream->name); |
89e59053 SK |
1349 | ret = -ENOMEM; |
1350 | goto stream_error; | |
1351 | } | |
1352 | ||
1353 | ret = sdw_config_stream(&slave->dev, stream, stream_config, true); | |
1354 | if (ret) | |
1355 | goto stream_error; | |
1356 | ||
1357 | list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list); | |
1358 | ||
bbe7379d SK |
1359 | ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports); |
1360 | if (ret) | |
1361 | goto stream_error; | |
1362 | ||
0aebe40b SN |
1363 | /* |
1364 | * Change stream state to CONFIGURED on first Slave add. | |
1365 | * Bus is not aware of number of Slave(s) in a stream at this | |
1366 | * point so cannot depend on all Slave(s) to be added in order to | |
1367 | * change stream state to CONFIGURED. | |
1368 | */ | |
89e59053 SK |
1369 | stream->state = SDW_STREAM_CONFIGURED; |
1370 | goto error; | |
1371 | ||
1372 | stream_error: | |
1373 | /* | |
1374 | * we hit error so cleanup the stream, release all Slave(s) and | |
1375 | * Master runtime | |
1376 | */ | |
48949722 | 1377 | sdw_release_master_stream(m_rt, stream); |
89e59053 SK |
1378 | error: |
1379 | mutex_unlock(&slave->bus->bus_lock); | |
1380 | return ret; | |
1381 | } | |
1382 | EXPORT_SYMBOL(sdw_stream_add_slave); | |
f8101c74 SK |
1383 | |
1384 | /** | |
1385 | * sdw_get_slave_dpn_prop() - Get Slave port capabilities | |
1386 | * | |
1387 | * @slave: Slave handle | |
1388 | * @direction: Data direction. | |
1389 | * @port_num: Port number | |
1390 | */ | |
1391 | struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave, | |
1fe74a5e PLB |
1392 | enum sdw_data_direction direction, |
1393 | unsigned int port_num) | |
f8101c74 SK |
1394 | { |
1395 | struct sdw_dpn_prop *dpn_prop; | |
1396 | u8 num_ports; | |
1397 | int i; | |
1398 | ||
1399 | if (direction == SDW_DATA_DIR_TX) { | |
1400 | num_ports = hweight32(slave->prop.source_ports); | |
1401 | dpn_prop = slave->prop.src_dpn_prop; | |
1402 | } else { | |
1403 | num_ports = hweight32(slave->prop.sink_ports); | |
1404 | dpn_prop = slave->prop.sink_dpn_prop; | |
1405 | } | |
1406 | ||
1407 | for (i = 0; i < num_ports; i++) { | |
1408 | dpn_prop = &dpn_prop[i]; | |
1409 | ||
1410 | if (dpn_prop->num == port_num) | |
1411 | return &dpn_prop[i]; | |
1412 | } | |
1413 | ||
1414 | return NULL; | |
1415 | } | |
5c3eb9f7 | 1416 | |
0c4a1049 SK |
1417 | /** |
1418 | * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s) | |
1419 | * | |
1420 | * @stream: SoundWire stream | |
1421 | * | |
1422 | * Acquire bus_lock for each of the master runtime(m_rt) part of this | |
1423 | * stream to reconfigure the bus. | |
1424 | * NOTE: This function is called from SoundWire stream ops and is | |
1425 | * expected that a global lock is held before acquiring bus_lock. | |
1426 | */ | |
1427 | static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream) | |
1428 | { | |
1429 | struct sdw_master_runtime *m_rt = NULL; | |
1430 | struct sdw_bus *bus = NULL; | |
1431 | ||
1432 | /* Iterate for all Master(s) in Master list */ | |
1433 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
1434 | bus = m_rt->bus; | |
1435 | ||
1436 | mutex_lock(&bus->bus_lock); | |
1437 | } | |
1438 | } | |
1439 | ||
1440 | /** | |
1441 | * sdw_release_bus_lock: Release bus lock for all Master runtime(s) | |
1442 | * | |
1443 | * @stream: SoundWire stream | |
1444 | * | |
1445 | * Release the previously held bus_lock after reconfiguring the bus. | |
48949722 VK |
1446 | * NOTE: This function is called from SoundWire stream ops and is |
1447 | * expected that a global lock is held before releasing bus_lock. | |
0c4a1049 SK |
1448 | */ |
1449 | static void sdw_release_bus_lock(struct sdw_stream_runtime *stream) | |
1450 | { | |
1451 | struct sdw_master_runtime *m_rt = NULL; | |
1452 | struct sdw_bus *bus = NULL; | |
1453 | ||
1454 | /* Iterate for all Master(s) in Master list */ | |
1455 | list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) { | |
1456 | bus = m_rt->bus; | |
1457 | mutex_unlock(&bus->bus_lock); | |
1458 | } | |
1459 | } | |
1460 | ||
5c3eb9f7 SK |
1461 | static int _sdw_prepare_stream(struct sdw_stream_runtime *stream) |
1462 | { | |
48949722 VK |
1463 | struct sdw_master_runtime *m_rt = NULL; |
1464 | struct sdw_bus *bus = NULL; | |
5c3eb9f7 SK |
1465 | struct sdw_master_prop *prop = NULL; |
1466 | struct sdw_bus_params params; | |
1467 | int ret; | |
1468 | ||
48949722 VK |
1469 | /* Prepare Master(s) and Slave(s) port(s) associated with stream */ |
1470 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
1471 | bus = m_rt->bus; | |
1472 | prop = &bus->prop; | |
1473 | memcpy(¶ms, &bus->params, sizeof(params)); | |
5c3eb9f7 | 1474 | |
48949722 VK |
1475 | /* TODO: Support Asynchronous mode */ |
1476 | if ((prop->max_freq % stream->params.rate) != 0) { | |
17ed5bef | 1477 | dev_err(bus->dev, "Async mode not supported\n"); |
48949722 VK |
1478 | return -EINVAL; |
1479 | } | |
5c3eb9f7 | 1480 | |
48949722 VK |
1481 | /* Increment cumulative bus bandwidth */ |
1482 | /* TODO: Update this during Device-Device support */ | |
1483 | bus->params.bandwidth += m_rt->stream->params.rate * | |
1484 | m_rt->ch_count * m_rt->stream->params.bps; | |
1485 | ||
1486 | /* Program params */ | |
1487 | ret = sdw_program_params(bus); | |
1488 | if (ret < 0) { | |
17ed5bef | 1489 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
48949722 VK |
1490 | goto restore_params; |
1491 | } | |
5c3eb9f7 SK |
1492 | } |
1493 | ||
1494 | ret = do_bank_switch(stream); | |
1495 | if (ret < 0) { | |
17ed5bef | 1496 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
5c3eb9f7 SK |
1497 | goto restore_params; |
1498 | } | |
1499 | ||
48949722 VK |
1500 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
1501 | bus = m_rt->bus; | |
1502 | ||
1503 | /* Prepare port(s) on the new clock configuration */ | |
1504 | ret = sdw_prep_deprep_ports(m_rt, true); | |
1505 | if (ret < 0) { | |
17ed5bef | 1506 | dev_err(bus->dev, "Prepare port(s) failed ret = %d\n", |
1fe74a5e | 1507 | ret); |
48949722 VK |
1508 | return ret; |
1509 | } | |
5c3eb9f7 SK |
1510 | } |
1511 | ||
1512 | stream->state = SDW_STREAM_PREPARED; | |
1513 | ||
1514 | return ret; | |
1515 | ||
1516 | restore_params: | |
1517 | memcpy(&bus->params, ¶ms, sizeof(params)); | |
1518 | return ret; | |
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * sdw_prepare_stream() - Prepare SoundWire stream | |
1523 | * | |
1524 | * @stream: Soundwire stream | |
1525 | * | |
34962fb8 | 1526 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
5c3eb9f7 SK |
1527 | */ |
1528 | int sdw_prepare_stream(struct sdw_stream_runtime *stream) | |
1529 | { | |
1530 | int ret = 0; | |
1531 | ||
1532 | if (!stream) { | |
17ed5bef | 1533 | pr_err("SoundWire: Handle not found for stream\n"); |
5c3eb9f7 SK |
1534 | return -EINVAL; |
1535 | } | |
1536 | ||
48949722 | 1537 | sdw_acquire_bus_lock(stream); |
5c3eb9f7 SK |
1538 | |
1539 | ret = _sdw_prepare_stream(stream); | |
1540 | if (ret < 0) | |
17ed5bef | 1541 | pr_err("Prepare for stream:%s failed: %d\n", stream->name, ret); |
5c3eb9f7 | 1542 | |
48949722 | 1543 | sdw_release_bus_lock(stream); |
5c3eb9f7 SK |
1544 | return ret; |
1545 | } | |
1546 | EXPORT_SYMBOL(sdw_prepare_stream); | |
1547 | ||
1548 | static int _sdw_enable_stream(struct sdw_stream_runtime *stream) | |
1549 | { | |
48949722 VK |
1550 | struct sdw_master_runtime *m_rt = NULL; |
1551 | struct sdw_bus *bus = NULL; | |
5c3eb9f7 SK |
1552 | int ret; |
1553 | ||
48949722 VK |
1554 | /* Enable Master(s) and Slave(s) port(s) associated with stream */ |
1555 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { | |
1556 | bus = m_rt->bus; | |
5c3eb9f7 | 1557 | |
48949722 VK |
1558 | /* Program params */ |
1559 | ret = sdw_program_params(bus); | |
1560 | if (ret < 0) { | |
17ed5bef | 1561 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
48949722 VK |
1562 | return ret; |
1563 | } | |
1564 | ||
1565 | /* Enable port(s) */ | |
1566 | ret = sdw_enable_disable_ports(m_rt, true); | |
1567 | if (ret < 0) { | |
62f0cec3 VK |
1568 | dev_err(bus->dev, |
1569 | "Enable port(s) failed ret: %d\n", ret); | |
48949722 VK |
1570 | return ret; |
1571 | } | |
5c3eb9f7 SK |
1572 | } |
1573 | ||
1574 | ret = do_bank_switch(stream); | |
1575 | if (ret < 0) { | |
17ed5bef | 1576 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
5c3eb9f7 SK |
1577 | return ret; |
1578 | } | |
1579 | ||
1580 | stream->state = SDW_STREAM_ENABLED; | |
1581 | return 0; | |
1582 | } | |
1583 | ||
1584 | /** | |
1585 | * sdw_enable_stream() - Enable SoundWire stream | |
1586 | * | |
1587 | * @stream: Soundwire stream | |
1588 | * | |
34962fb8 | 1589 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
5c3eb9f7 SK |
1590 | */ |
1591 | int sdw_enable_stream(struct sdw_stream_runtime *stream) | |
1592 | { | |
1593 | int ret = 0; | |
1594 | ||
1595 | if (!stream) { | |
17ed5bef | 1596 | pr_err("SoundWire: Handle not found for stream\n"); |
5c3eb9f7 SK |
1597 | return -EINVAL; |
1598 | } | |
1599 | ||
48949722 | 1600 | sdw_acquire_bus_lock(stream); |
5c3eb9f7 SK |
1601 | |
1602 | ret = _sdw_enable_stream(stream); | |
1603 | if (ret < 0) | |
17ed5bef | 1604 | pr_err("Enable for stream:%s failed: %d\n", stream->name, ret); |
5c3eb9f7 | 1605 | |
48949722 | 1606 | sdw_release_bus_lock(stream); |
5c3eb9f7 SK |
1607 | return ret; |
1608 | } | |
1609 | EXPORT_SYMBOL(sdw_enable_stream); | |
1610 | ||
1611 | static int _sdw_disable_stream(struct sdw_stream_runtime *stream) | |
1612 | { | |
48949722 VK |
1613 | struct sdw_master_runtime *m_rt = NULL; |
1614 | struct sdw_bus *bus = NULL; | |
5c3eb9f7 SK |
1615 | int ret; |
1616 | ||
48949722 VK |
1617 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
1618 | bus = m_rt->bus; | |
1619 | /* Disable port(s) */ | |
1620 | ret = sdw_enable_disable_ports(m_rt, false); | |
1621 | if (ret < 0) { | |
17ed5bef | 1622 | dev_err(bus->dev, "Disable port(s) failed: %d\n", ret); |
48949722 VK |
1623 | return ret; |
1624 | } | |
5c3eb9f7 | 1625 | } |
5c3eb9f7 SK |
1626 | stream->state = SDW_STREAM_DISABLED; |
1627 | ||
48949722 VK |
1628 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
1629 | bus = m_rt->bus; | |
1630 | /* Program params */ | |
1631 | ret = sdw_program_params(bus); | |
1632 | if (ret < 0) { | |
17ed5bef | 1633 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
48949722 VK |
1634 | return ret; |
1635 | } | |
5c3eb9f7 SK |
1636 | } |
1637 | ||
1638 | return do_bank_switch(stream); | |
1639 | } | |
1640 | ||
1641 | /** | |
1642 | * sdw_disable_stream() - Disable SoundWire stream | |
1643 | * | |
1644 | * @stream: Soundwire stream | |
1645 | * | |
34962fb8 | 1646 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
5c3eb9f7 SK |
1647 | */ |
1648 | int sdw_disable_stream(struct sdw_stream_runtime *stream) | |
1649 | { | |
1650 | int ret = 0; | |
1651 | ||
1652 | if (!stream) { | |
17ed5bef | 1653 | pr_err("SoundWire: Handle not found for stream\n"); |
5c3eb9f7 SK |
1654 | return -EINVAL; |
1655 | } | |
1656 | ||
48949722 | 1657 | sdw_acquire_bus_lock(stream); |
5c3eb9f7 SK |
1658 | |
1659 | ret = _sdw_disable_stream(stream); | |
1660 | if (ret < 0) | |
17ed5bef | 1661 | pr_err("Disable for stream:%s failed: %d\n", stream->name, ret); |
5c3eb9f7 | 1662 | |
48949722 | 1663 | sdw_release_bus_lock(stream); |
5c3eb9f7 SK |
1664 | return ret; |
1665 | } | |
1666 | EXPORT_SYMBOL(sdw_disable_stream); | |
1667 | ||
1668 | static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream) | |
1669 | { | |
48949722 VK |
1670 | struct sdw_master_runtime *m_rt = NULL; |
1671 | struct sdw_bus *bus = NULL; | |
5c3eb9f7 SK |
1672 | int ret = 0; |
1673 | ||
48949722 VK |
1674 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
1675 | bus = m_rt->bus; | |
1676 | /* De-prepare port(s) */ | |
1677 | ret = sdw_prep_deprep_ports(m_rt, false); | |
1678 | if (ret < 0) { | |
62f0cec3 VK |
1679 | dev_err(bus->dev, |
1680 | "De-prepare port(s) failed: %d\n", ret); | |
48949722 VK |
1681 | return ret; |
1682 | } | |
5c3eb9f7 | 1683 | |
48949722 VK |
1684 | /* TODO: Update this during Device-Device support */ |
1685 | bus->params.bandwidth -= m_rt->stream->params.rate * | |
1686 | m_rt->ch_count * m_rt->stream->params.bps; | |
5c3eb9f7 | 1687 | |
48949722 VK |
1688 | /* Program params */ |
1689 | ret = sdw_program_params(bus); | |
1690 | if (ret < 0) { | |
17ed5bef | 1691 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
48949722 VK |
1692 | return ret; |
1693 | } | |
5c3eb9f7 SK |
1694 | } |
1695 | ||
48949722 | 1696 | stream->state = SDW_STREAM_DEPREPARED; |
5c3eb9f7 SK |
1697 | return do_bank_switch(stream); |
1698 | } | |
1699 | ||
1700 | /** | |
1701 | * sdw_deprepare_stream() - Deprepare SoundWire stream | |
1702 | * | |
1703 | * @stream: Soundwire stream | |
1704 | * | |
34962fb8 | 1705 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
5c3eb9f7 SK |
1706 | */ |
1707 | int sdw_deprepare_stream(struct sdw_stream_runtime *stream) | |
1708 | { | |
1709 | int ret = 0; | |
1710 | ||
1711 | if (!stream) { | |
17ed5bef | 1712 | pr_err("SoundWire: Handle not found for stream\n"); |
5c3eb9f7 SK |
1713 | return -EINVAL; |
1714 | } | |
1715 | ||
48949722 | 1716 | sdw_acquire_bus_lock(stream); |
5c3eb9f7 SK |
1717 | ret = _sdw_deprepare_stream(stream); |
1718 | if (ret < 0) | |
17ed5bef | 1719 | pr_err("De-prepare for stream:%d failed: %d\n", ret, ret); |
5c3eb9f7 | 1720 | |
48949722 | 1721 | sdw_release_bus_lock(stream); |
5c3eb9f7 SK |
1722 | return ret; |
1723 | } | |
1724 | EXPORT_SYMBOL(sdw_deprepare_stream); |