[linux-block.git] / drivers / soundwire / intel_init.c

// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
// Copyright(c) 2015-17 Intel Corporation.

/*
 * SDW Intel Init Routines
 *
 * Initializes and creates SDW devices based on ACPI and Hardware values
 */

#include <linux/acpi.h>
#include <linux/export.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/soundwire/sdw_intel.h>
#include "cadence_master.h"
#include "intel.h"

#define SDW_SHIM_LCAP		0x0
#define SDW_SHIM_BASE		0x2C000
#define SDW_ALH_BASE		0x2C800
#define SDW_LINK_BASE		0x30000
#define SDW_LINK_SIZE		0x10000

static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
{
	struct sdw_intel_link_res *link = ctx->links;
	u32 link_mask;
	int i;

	if (!link)
		return 0;

	link_mask = ctx->link_mask;

	for (i = 0; i < ctx->count; i++, link++) {
		if (!(link_mask & BIT(i)))
			continue;

		if (link->pdev) {
			pm_runtime_disable(&link->pdev->dev);
			platform_device_unregister(link->pdev);
		}

		if (!link->clock_stop_quirks)
			pm_runtime_put_noidle(link->dev);
	}

	return 0;
}

#define HDA_DSP_REG_ADSPIC2             (0x10)
#define HDA_DSP_REG_ADSPIS2             (0x14)
#define HDA_DSP_REG_ADSPIC2_SNDW        BIT(5)

/**
 * sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
 * @mmio_base: The mmio base of the control register
 * @enable: true if enable
 */
void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
{
	u32 val;

	val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);

	if (enable)
		val |= HDA_DSP_REG_ADSPIC2_SNDW;
	else
		val &= ~HDA_DSP_REG_ADSPIC2_SNDW;

	writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
}
EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);

irqreturn_t sdw_intel_thread(int irq, void *dev_id)
{
	struct sdw_intel_ctx *ctx = dev_id;
	struct sdw_intel_link_res *link;

	list_for_each_entry(link, &ctx->link_list, list)
		sdw_cdns_irq(irq, link->cdns);

	sdw_intel_enable_irq(ctx->mmio_base, true);
	return IRQ_HANDLED;
}
EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);

static struct sdw_intel_ctx
*sdw_intel_probe_controller(struct sdw_intel_res *res)
{
	struct platform_device_info pdevinfo;
	struct platform_device *pdev;
	struct sdw_intel_link_res *link;
	struct sdw_intel_ctx *ctx;
	struct acpi_device *adev;
	struct sdw_slave *slave;
	struct list_head *node;
	struct sdw_bus *bus;
	u32 link_mask;
	int num_slaves = 0;
	int count;
	int i;

	if (!res)
		return NULL;

	if (acpi_bus_get_device(res->handle, &adev))
		return NULL;

	if (!res->count)
		return NULL;

	count = res->count;
	dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);

	ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
	if (!ctx)
		return NULL;

	ctx->count = count;
	ctx->links = devm_kcalloc(&adev->dev, ctx->count,
				  sizeof(*ctx->links), GFP_KERNEL);
	if (!ctx->links)
		return NULL;

	ctx->count = count;
	ctx->mmio_base = res->mmio_base;
	ctx->link_mask = res->link_mask;
	ctx->handle = res->handle;
	mutex_init(&ctx->shim_lock);

	link = ctx->links;
	link_mask = ctx->link_mask;

	INIT_LIST_HEAD(&ctx->link_list);

	/* Create SDW Master devices */
	for (i = 0; i < count; i++, link++) {
		if (!(link_mask & BIT(i))) {
			dev_dbg(&adev->dev,
				"Link %d masked, will not be enabled\n", i);
			continue;
		}

		link->mmio_base = res->mmio_base;
		link->registers = res->mmio_base + SDW_LINK_BASE
			+ (SDW_LINK_SIZE * i);
		link->shim = res->mmio_base + SDW_SHIM_BASE;
		link->alh = res->mmio_base + SDW_ALH_BASE;

		link->ops = res->ops;
		link->dev = res->dev;

		link->clock_stop_quirks = res->clock_stop_quirks;
		link->shim_lock = &ctx->shim_lock;
		link->shim_mask = &ctx->shim_mask;
		link->link_mask = link_mask;

		memset(&pdevinfo, 0, sizeof(pdevinfo));

		pdevinfo.parent = res->parent;
		pdevinfo.name = "intel-sdw";
		pdevinfo.id = i;
		pdevinfo.fwnode = acpi_fwnode_handle(adev);
		pdevinfo.data = link;
		pdevinfo.size_data = sizeof(*link);

		pdev = platform_device_register_full(&pdevinfo);
		if (IS_ERR(pdev)) {
			dev_err(&adev->dev,
				"platform device creation failed: %ld\n",
				PTR_ERR(pdev));
			goto err;
		}
		link->pdev = pdev;
		link->cdns = platform_get_drvdata(pdev);

		if (!link->cdns) {
			dev_err(&adev->dev, "failed to get link->cdns\n");
			/*
			 * 1 will be subtracted from i in the err label, but we need to call
			 * intel_link_dev_unregister for this ldev, so plus 1 now
			 */
			i++;
			goto err;
		}
		list_add_tail(&link->list, &ctx->link_list);
		bus = &link->cdns->bus;
		/* Calculate number of slaves */
		list_for_each(node, &bus->slaves)
			num_slaves++;
	}

	ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
				sizeof(*ctx->ids), GFP_KERNEL);
	if (!ctx->ids)
		goto err;

	ctx->num_slaves = num_slaves;
	i = 0;
	list_for_each_entry(link, &ctx->link_list, list) {
		bus = &link->cdns->bus;
		list_for_each_entry(slave, &bus->slaves, node) {
			ctx->ids[i].id = slave->id;
			ctx->ids[i].link_id = bus->link_id;
			i++;
		}
	}

	return ctx;

err:
	ctx->count = i;
	sdw_intel_cleanup(ctx);
	return NULL;
}

static int
sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
{
	struct acpi_device *adev;
	struct sdw_intel_link_res *link;
	u32 caps;
	u32 link_mask;
	int i;

	if (acpi_bus_get_device(ctx->handle, &adev))
		return -EINVAL;

	/* Check SNDWLCAP.LCOUNT */
	caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
	caps &= GENMASK(2, 0);

	/* Check HW supported vs property value */
	if (caps < ctx->count) {
		dev_err(&adev->dev,
			"BIOS master count is larger than hardware capabilities\n");
		return -EINVAL;
	}

	if (!ctx->links)
		return -EINVAL;

	link = ctx->links;
	link_mask = ctx->link_mask;

	/* Startup SDW Master devices */
	for (i = 0; i < ctx->count; i++, link++) {
		if (!(link_mask & BIT(i)))
			continue;

		intel_master_startup(link->pdev);

		if (!link->clock_stop_quirks) {
			/*
			 * we need to prevent the parent PCI device
			 * from entering pm_runtime suspend, so that
			 * power rails to the SoundWire IP are not
			 * turned off.
			 */
			pm_runtime_get_noresume(link->dev);
		}
	}

	return 0;
}

/**
 * sdw_intel_probe() - SoundWire Intel probe routine
 * @res: resource data
 *
 * This registers a platform device for each Master handled by the controller,
 * and SoundWire Master and Slave devices will be created by the platform
 * device probe. All the information necessary is stored in the context, and
 * the res argument pointer can be freed after this step.
 * This function will be called after sdw_intel_acpi_scan() by SOF probe.
 */
struct sdw_intel_ctx
*sdw_intel_probe(struct sdw_intel_res *res)
{
	return sdw_intel_probe_controller(res);
}
EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);

/**
 * sdw_intel_startup() - SoundWire Intel startup
 * @ctx: SoundWire context allocated in the probe
 *
 * Startup Intel SoundWire controller. This function will be called after
 * Intel Audio DSP is powered up.
 */
int sdw_intel_startup(struct sdw_intel_ctx *ctx)
{
	return sdw_intel_startup_controller(ctx);
}
EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
/**
 * sdw_intel_exit() - SoundWire Intel exit
 * @ctx: SoundWire context allocated in the probe
 *
 * Delete the controller instances created and cleanup
 */
void sdw_intel_exit(struct sdw_intel_ctx *ctx)
{
	sdw_intel_cleanup(ctx);
}
EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);

void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
{
	struct sdw_intel_link_res *link;
	u32 link_mask;
	int i;

	if (!ctx->links)
		return;

	link = ctx->links;
	link_mask = ctx->link_mask;

	/* Startup SDW Master devices */
	for (i = 0; i < ctx->count; i++, link++) {
		if (!(link_mask & BIT(i)))
			continue;

		intel_master_process_wakeen_event(link->pdev);
	}
}
EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);

MODULE_LICENSE("Dual BSD/GPL");
MODULE_DESCRIPTION("Intel Soundwire Init Library");
Commit	Line	Data
d62a7d41 VK	1	// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
	2	// Copyright(c) 2015-17 Intel Corporation.
	3
	4	/*
	5	* SDW Intel Init Routines
	6	*
	7	* Initializes and creates SDW devices based on ACPI and Hardware values
	8	*/
	9
	10	#include <linux/acpi.h>
4abbd783	11	#include <linux/export.h>
4a98a6b2	12	#include <linux/interrupt.h>
3fc40449	13	#include <linux/io.h>
4abbd783	14	#include <linux/module.h>
d62a7d41	15	#include <linux/platform_device.h>
ebf878ed	16	#include <linux/pm_runtime.h>
d62a7d41	17	#include <linux/soundwire/sdw_intel.h>
b6109dd6	18	#include "cadence_master.h"
d62a7d41 VK	19	#include "intel.h"
d62a7d41 VK	20
d62a7d41 VK	21	#define SDW_SHIM_LCAP 0x0
	22	#define SDW_SHIM_BASE 0x2C000
	23	#define SDW_ALH_BASE 0x2C800
	24	#define SDW_LINK_BASE 0x30000
	25	#define SDW_LINK_SIZE 0x10000
	26
6d2c6669	27	static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
d62a7d41	28	{
f98f690f	29	struct sdw_intel_link_res *link = ctx->links;
6d2c6669	30	u32 link_mask;
d62a7d41 VK	31	int i;
	32
	33	if (!link)
	34	return 0;
	35
6d2c6669 PLB	36	link_mask = ctx->link_mask;
	37
	38	for (i = 0; i < ctx->count; i++, link++) {
	39	if (!(link_mask & BIT(i)))
	40	continue;
	41
ebf878ed PLB	42	if (link->pdev) {
ebf878ed PLB	43	pm_runtime_disable(&link->pdev->dev);
d62a7d41	44	platform_device_unregister(link->pdev);
ebf878ed	45	}
ab996b29 PLB	46
	47	if (!link->clock_stop_quirks)
	48	pm_runtime_put_noidle(link->dev);
d62a7d41 VK	49	}
d62a7d41 VK	50
d62a7d41 VK	51	return 0;
	52	}
	53
12b16146 PLB	54	#define HDA_DSP_REG_ADSPIC2 (0x10)
	55	#define HDA_DSP_REG_ADSPIS2 (0x14)
	56	#define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
	57
	58	/**
	59	* sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
	60	* @mmio_base: The mmio base of the control register
	61	* @enable: true if enable
	62	*/
	63	void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
	64	{
	65	u32 val;
	66
	67	val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
	68
	69	if (enable)
	70	val \|= HDA_DSP_REG_ADSPIC2_SNDW;
	71	else
	72	val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
	73
	74	writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
	75	}
8459cea7	76	EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
12b16146	77
4a98a6b2 BL	78	irqreturn_t sdw_intel_thread(int irq, void *dev_id)
	79	{
	80	struct sdw_intel_ctx *ctx = dev_id;
	81	struct sdw_intel_link_res *link;
	82
	83	list_for_each_entry(link, &ctx->link_list, list)
	84	sdw_cdns_irq(irq, link->cdns);
	85
	86	sdw_intel_enable_irq(ctx->mmio_base, true);
	87	return IRQ_HANDLED;
	88	}
	89	EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
	90
6d2c6669 PLB	91	static struct sdw_intel_ctx
	92	sdw_intel_probe_controller(struct sdw_intel_res res)
	93	{
	94	struct platform_device_info pdevinfo;
	95	struct platform_device *pdev;
	96	struct sdw_intel_link_res *link;
	97	struct sdw_intel_ctx *ctx;
	98	struct acpi_device *adev;
a8184403 BL	99	struct sdw_slave *slave;
	100	struct list_head *node;
	101	struct sdw_bus *bus;
6d2c6669	102	u32 link_mask;
a8184403	103	int num_slaves = 0;
6d2c6669 PLB	104	int count;
	105	int i;
	106
	107	if (!res)
	108	return NULL;
	109
	110	if (acpi_bus_get_device(res->handle, &adev))
	111	return NULL;
	112
	113	if (!res->count)
	114	return NULL;
	115
	116	count = res->count;
d62a7d41 VK	117	dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
d62a7d41 VK	118
dd906cc6	119	ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
d62a7d41 VK	120	if (!ctx)
	121	return NULL;
	122
	123	ctx->count = count;
dd906cc6 PLB	124	ctx->links = devm_kcalloc(&adev->dev, ctx->count,
dd906cc6 PLB	125	sizeof(*ctx->links), GFP_KERNEL);
d62a7d41	126	if (!ctx->links)
dd906cc6	127	return NULL;
d62a7d41	128
6d2c6669 PLB	129	ctx->count = count;
	130	ctx->mmio_base = res->mmio_base;
	131	ctx->link_mask = res->link_mask;
	132	ctx->handle = res->handle;
4a17c441	133	mutex_init(&ctx->shim_lock);
6d2c6669	134
d62a7d41	135	link = ctx->links;
6d2c6669	136	link_mask = ctx->link_mask;
d62a7d41	137
4a98a6b2 BL	138	INIT_LIST_HEAD(&ctx->link_list);
4a98a6b2 BL	139
d62a7d41	140	/* Create SDW Master devices */
6d2c6669	141	for (i = 0; i < count; i++, link++) {
9cd1c5a7	142	if (!(link_mask & BIT(i))) {
50302fc7 PLB	143	dev_dbg(&adev->dev,
50302fc7 PLB	144	"Link %d masked, will not be enabled\n", i);
50302fc7 PLB	145	continue;
	146	}
	147
6d2c6669	148	link->mmio_base = res->mmio_base;
f98f690f	149	link->registers = res->mmio_base + SDW_LINK_BASE
6d2c6669	150	+ (SDW_LINK_SIZE * i);
f98f690f PLB	151	link->shim = res->mmio_base + SDW_SHIM_BASE;
f98f690f PLB	152	link->alh = res->mmio_base + SDW_ALH_BASE;
d62a7d41	153
f98f690f	154	link->ops = res->ops;
4b206d34	155	link->dev = res->dev;
c46302ec	156
a320f41e	157	link->clock_stop_quirks = res->clock_stop_quirks;
4a17c441 PLB	158	link->shim_lock = &ctx->shim_lock;
4a17c441 PLB	159	link->shim_mask = &ctx->shim_mask;
de763fa8	160	link->link_mask = link_mask;
4a17c441	161
d62a7d41 VK	162	memset(&pdevinfo, 0, sizeof(pdevinfo));
	163
	164	pdevinfo.parent = res->parent;
6d2c6669	165	pdevinfo.name = "intel-sdw";
d62a7d41 VK	166	pdevinfo.id = i;
d62a7d41 VK	167	pdevinfo.fwnode = acpi_fwnode_handle(adev);
4ab34412 PLB	168	pdevinfo.data = link;
4ab34412 PLB	169	pdevinfo.size_data = sizeof(*link);
d62a7d41 VK	170
	171	pdev = platform_device_register_full(&pdevinfo);
	172	if (IS_ERR(pdev)) {
	173	dev_err(&adev->dev,
	174	"platform device creation failed: %ld\n",
	175	PTR_ERR(pdev));
6d2c6669	176	goto err;
d62a7d41	177	}
d62a7d41	178	link->pdev = pdev;
4a98a6b2 BL	179	link->cdns = platform_get_drvdata(pdev);
4a98a6b2 BL	180
14968dd3 BL	181	if (!link->cdns) {
	182	dev_err(&adev->dev, "failed to get link->cdns\n");
	183	/*
	184	* 1 will be subtracted from i in the err label, but we need to call
	185	* intel_link_dev_unregister for this ldev, so plus 1 now
	186	*/
	187	i++;
	188	goto err;
	189	}
4a98a6b2	190	list_add_tail(&link->list, &ctx->link_list);
a8184403 BL	191	bus = &link->cdns->bus;
	192	/* Calculate number of slaves */
	193	list_for_each(node, &bus->slaves)
	194	num_slaves++;
	195	}
	196
	197	ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
	198	sizeof(*ctx->ids), GFP_KERNEL);
	199	if (!ctx->ids)
	200	goto err;
	201
	202	ctx->num_slaves = num_slaves;
	203	i = 0;
	204	list_for_each_entry(link, &ctx->link_list, list) {
	205	bus = &link->cdns->bus;
	206	list_for_each_entry(slave, &bus->slaves, node) {
	207	ctx->ids[i].id = slave->id;
	208	ctx->ids[i].link_id = bus->link_id;
	209	i++;
	210	}
d62a7d41 VK	211	}
	212
	213	return ctx;
	214
6d2c6669	215	err:
dd906cc6	216	ctx->count = i;
6d2c6669	217	sdw_intel_cleanup(ctx);
d62a7d41 VK	218	return NULL;
	219	}
	220
6d2c6669 PLB	221	static int
	222	sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
	223	{
	224	struct acpi_device *adev;
	225	struct sdw_intel_link_res *link;
	226	u32 caps;
	227	u32 link_mask;
	228	int i;
	229
	230	if (acpi_bus_get_device(ctx->handle, &adev))
	231	return -EINVAL;
	232
	233	/* Check SNDWLCAP.LCOUNT */
	234	caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
	235	caps &= GENMASK(2, 0);
	236
	237	/* Check HW supported vs property value */
	238	if (caps < ctx->count) {
	239	dev_err(&adev->dev,
	240	"BIOS master count is larger than hardware capabilities\n");
	241	return -EINVAL;
	242	}
	243
	244	if (!ctx->links)
	245	return -EINVAL;
	246
	247	link = ctx->links;
	248	link_mask = ctx->link_mask;
	249
	250	/* Startup SDW Master devices */
	251	for (i = 0; i < ctx->count; i++, link++) {
	252	if (!(link_mask & BIT(i)))
	253	continue;
	254
	255	intel_master_startup(link->pdev);
ab996b29 PLB	256
	257	if (!link->clock_stop_quirks) {
	258	/*
	259	* we need to prevent the parent PCI device
	260	* from entering pm_runtime suspend, so that
	261	* power rails to the SoundWire IP are not
	262	* turned off.
	263	*/
	264	pm_runtime_get_noresume(link->dev);
	265	}
6d2c6669 PLB	266	}
	267
	268	return 0;
	269	}
	270
6d2c6669 PLB	271	/**
	272	* sdw_intel_probe() - SoundWire Intel probe routine
	273	* @res: resource data
	274	*
	275	* This registers a platform device for each Master handled by the controller,
	276	* and SoundWire Master and Slave devices will be created by the platform
	277	* device probe. All the information necessary is stored in the context, and
	278	* the res argument pointer can be freed after this step.
	279	* This function will be called after sdw_intel_acpi_scan() by SOF probe.
	280	*/
	281	struct sdw_intel_ctx
	282	sdw_intel_probe(struct sdw_intel_res res)
	283	{
	284	return sdw_intel_probe_controller(res);
	285	}
8459cea7	286	EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
6d2c6669 PLB	287
	288	/**
	289	* sdw_intel_startup() - SoundWire Intel startup
	290	* @ctx: SoundWire context allocated in the probe
	291	*
	292	* Startup Intel SoundWire controller. This function will be called after
	293	* Intel Audio DSP is powered up.
	294	*/
	295	int sdw_intel_startup(struct sdw_intel_ctx *ctx)
	296	{
	297	return sdw_intel_startup_controller(ctx);
	298	}
8459cea7	299	EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
d62a7d41 VK	300	/**
d62a7d41 VK	301	* sdw_intel_exit() - SoundWire Intel exit
6d2c6669	302	* @ctx: SoundWire context allocated in the probe
d62a7d41 VK	303	*
	304	* Delete the controller instances created and cleanup
	305	*/
f98f690f	306	void sdw_intel_exit(struct sdw_intel_ctx *ctx)
d62a7d41	307	{
6d2c6669	308	sdw_intel_cleanup(ctx);
d62a7d41	309	}
8459cea7	310	EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
d62a7d41	311
ab2c9132 RW	312	void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
	313	{
	314	struct sdw_intel_link_res *link;
	315	u32 link_mask;
	316	int i;
	317
	318	if (!ctx->links)
	319	return;
	320
	321	link = ctx->links;
	322	link_mask = ctx->link_mask;
	323
	324	/* Startup SDW Master devices */
	325	for (i = 0; i < ctx->count; i++, link++) {
	326	if (!(link_mask & BIT(i)))
	327	continue;
	328
	329	intel_master_process_wakeen_event(link->pdev);
	330	}
	331	}
	332	EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
	333
d62a7d41 VK	334	MODULE_LICENSE("Dual BSD/GPL");
d62a7d41 VK	335	MODULE_DESCRIPTION("Intel Soundwire Init Library");