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2f52a517 VK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-17 Intel Corporation. | |
3 | ||
4 | /* | |
5 | * Cadence SoundWire Master module | |
6 | * Used by Master driver | |
7 | */ | |
8 | ||
9 | #include <linux/delay.h> | |
10 | #include <linux/device.h> | |
aa85066e | 11 | #include <linux/debugfs.h> |
2f52a517 | 12 | #include <linux/interrupt.h> |
18de65d9 | 13 | #include <linux/io.h> |
2f52a517 VK |
14 | #include <linux/module.h> |
15 | #include <linux/mod_devicetable.h> | |
32d2a893 | 16 | #include <linux/pm_runtime.h> |
2f52a517 VK |
17 | #include <linux/soundwire/sdw_registers.h> |
18 | #include <linux/soundwire/sdw.h> | |
5d6b3c8b VK |
19 | #include <sound/pcm_params.h> |
20 | #include <sound/soc.h> | |
4a98a6b2 | 21 | #include <linux/workqueue.h> |
2f52a517 VK |
22 | #include "bus.h" |
23 | #include "cadence_master.h" | |
24 | ||
04592dce PLB |
25 | static int interrupt_mask; |
26 | module_param_named(cnds_mcp_int_mask, interrupt_mask, int, 0444); | |
27 | MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask"); | |
28 | ||
2f52a517 | 29 | #define CDNS_MCP_CONFIG 0x0 |
2f52a517 | 30 | #define CDNS_MCP_CONFIG_BUS_REL BIT(6) |
c5753714 PLB |
31 | |
32 | #define CDNS_IP_MCP_CONFIG 0x0 /* IP offset added at run-time */ | |
33 | ||
34 | #define CDNS_IP_MCP_CONFIG_MCMD_RETRY GENMASK(27, 24) | |
35 | #define CDNS_IP_MCP_CONFIG_MPREQ_DELAY GENMASK(20, 16) | |
36 | #define CDNS_IP_MCP_CONFIG_MMASTER BIT(7) | |
37 | #define CDNS_IP_MCP_CONFIG_SNIFFER BIT(5) | |
38 | #define CDNS_IP_MCP_CONFIG_CMD BIT(3) | |
39 | #define CDNS_IP_MCP_CONFIG_OP GENMASK(2, 0) | |
40 | #define CDNS_IP_MCP_CONFIG_OP_NORMAL 0 | |
2f52a517 VK |
41 | |
42 | #define CDNS_MCP_CONTROL 0x4 | |
43 | ||
2f52a517 VK |
44 | #define CDNS_MCP_CONTROL_CMD_RST BIT(7) |
45 | #define CDNS_MCP_CONTROL_SOFT_RST BIT(6) | |
2f52a517 | 46 | #define CDNS_MCP_CONTROL_HW_RST BIT(4) |
2f52a517 | 47 | #define CDNS_MCP_CONTROL_CLK_STOP_CLR BIT(2) |
4dc953bc PLB |
48 | |
49 | #define CDNS_IP_MCP_CONTROL 0x4 /* IP offset added at run-time */ | |
50 | ||
51 | #define CDNS_IP_MCP_CONTROL_RST_DELAY GENMASK(10, 8) | |
52 | #define CDNS_IP_MCP_CONTROL_SW_RST BIT(5) | |
53 | #define CDNS_IP_MCP_CONTROL_CLK_PAUSE BIT(3) | |
54 | #define CDNS_IP_MCP_CONTROL_CMD_ACCEPT BIT(1) | |
55 | #define CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP BIT(0) | |
2f52a517 | 56 | |
73a29d3f | 57 | #define CDNS_IP_MCP_CMDCTRL 0x8 /* IP offset added at run-time */ |
32d2a893 | 58 | |
73a29d3f | 59 | #define CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR BIT(2) |
32d2a893 | 60 | |
2f52a517 VK |
61 | #define CDNS_MCP_SSPSTAT 0xC |
62 | #define CDNS_MCP_FRAME_SHAPE 0x10 | |
63 | #define CDNS_MCP_FRAME_SHAPE_INIT 0x14 | |
05be59ac | 64 | #define CDNS_MCP_FRAME_SHAPE_COL_MASK GENMASK(2, 0) |
3cf25d63 | 65 | #define CDNS_MCP_FRAME_SHAPE_ROW_MASK GENMASK(7, 3) |
2f52a517 VK |
66 | |
67 | #define CDNS_MCP_CONFIG_UPDATE 0x18 | |
68 | #define CDNS_MCP_CONFIG_UPDATE_BIT BIT(0) | |
69 | ||
70 | #define CDNS_MCP_PHYCTRL 0x1C | |
71 | #define CDNS_MCP_SSP_CTRL0 0x20 | |
72 | #define CDNS_MCP_SSP_CTRL1 0x28 | |
73 | #define CDNS_MCP_CLK_CTRL0 0x30 | |
74 | #define CDNS_MCP_CLK_CTRL1 0x38 | |
a50954e2 | 75 | #define CDNS_MCP_CLK_MCLKD_MASK GENMASK(7, 0) |
2f52a517 VK |
76 | |
77 | #define CDNS_MCP_STAT 0x40 | |
78 | ||
79 | #define CDNS_MCP_STAT_ACTIVE_BANK BIT(20) | |
80 | #define CDNS_MCP_STAT_CLK_STOP BIT(16) | |
81 | ||
82 | #define CDNS_MCP_INTSTAT 0x44 | |
83 | #define CDNS_MCP_INTMASK 0x48 | |
84 | ||
85 | #define CDNS_MCP_INT_IRQ BIT(31) | |
a2cff9ee | 86 | #define CDNS_MCP_INT_RESERVED1 GENMASK(30, 17) |
2f52a517 VK |
87 | #define CDNS_MCP_INT_WAKEUP BIT(16) |
88 | #define CDNS_MCP_INT_SLAVE_RSVD BIT(15) | |
89 | #define CDNS_MCP_INT_SLAVE_ALERT BIT(14) | |
90 | #define CDNS_MCP_INT_SLAVE_ATTACH BIT(13) | |
91 | #define CDNS_MCP_INT_SLAVE_NATTACH BIT(12) | |
92 | #define CDNS_MCP_INT_SLAVE_MASK GENMASK(15, 12) | |
93 | #define CDNS_MCP_INT_DPINT BIT(11) | |
94 | #define CDNS_MCP_INT_CTRL_CLASH BIT(10) | |
95 | #define CDNS_MCP_INT_DATA_CLASH BIT(9) | |
9b5884a0 | 96 | #define CDNS_MCP_INT_PARITY BIT(8) |
2f52a517 | 97 | #define CDNS_MCP_INT_CMD_ERR BIT(7) |
a2cff9ee | 98 | #define CDNS_MCP_INT_RESERVED2 GENMASK(6, 4) |
9b5884a0 | 99 | #define CDNS_MCP_INT_RX_NE BIT(3) |
2f52a517 VK |
100 | #define CDNS_MCP_INT_RX_WL BIT(2) |
101 | #define CDNS_MCP_INT_TXE BIT(1) | |
9b5884a0 | 102 | #define CDNS_MCP_INT_TXF BIT(0) |
a2cff9ee | 103 | #define CDNS_MCP_INT_RESERVED (CDNS_MCP_INT_RESERVED1 | CDNS_MCP_INT_RESERVED2) |
2f52a517 VK |
104 | |
105 | #define CDNS_MCP_INTSET 0x4C | |
106 | ||
b07dd9b4 PLB |
107 | #define CDNS_MCP_SLAVE_STAT 0x50 |
108 | #define CDNS_MCP_SLAVE_STAT_MASK GENMASK(1, 0) | |
2f52a517 VK |
109 | |
110 | #define CDNS_MCP_SLAVE_INTSTAT0 0x54 | |
111 | #define CDNS_MCP_SLAVE_INTSTAT1 0x58 | |
112 | #define CDNS_MCP_SLAVE_INTSTAT_NPRESENT BIT(0) | |
113 | #define CDNS_MCP_SLAVE_INTSTAT_ATTACHED BIT(1) | |
114 | #define CDNS_MCP_SLAVE_INTSTAT_ALERT BIT(2) | |
115 | #define CDNS_MCP_SLAVE_INTSTAT_RESERVED BIT(3) | |
116 | #define CDNS_MCP_SLAVE_STATUS_BITS GENMASK(3, 0) | |
117 | #define CDNS_MCP_SLAVE_STATUS_NUM 4 | |
118 | ||
119 | #define CDNS_MCP_SLAVE_INTMASK0 0x5C | |
120 | #define CDNS_MCP_SLAVE_INTMASK1 0x60 | |
121 | ||
664b1658 PLB |
122 | #define CDNS_MCP_SLAVE_INTMASK0_MASK GENMASK(31, 0) |
123 | #define CDNS_MCP_SLAVE_INTMASK1_MASK GENMASK(15, 0) | |
2f52a517 VK |
124 | |
125 | #define CDNS_MCP_PORT_INTSTAT 0x64 | |
126 | #define CDNS_MCP_PDI_STAT 0x6C | |
127 | ||
128 | #define CDNS_MCP_FIFOLEVEL 0x78 | |
129 | #define CDNS_MCP_FIFOSTAT 0x7C | |
130 | #define CDNS_MCP_RX_FIFO_AVAIL GENMASK(5, 0) | |
131 | ||
83ae1ccb PLB |
132 | #define CDNS_IP_MCP_CMD_BASE 0x80 /* IP offset added at run-time */ |
133 | #define CDNS_IP_MCP_RESP_BASE 0x80 /* IP offset added at run-time */ | |
7cbfee2e RF |
134 | /* FIFO can hold 8 commands */ |
135 | #define CDNS_MCP_CMD_LEN 8 | |
2f52a517 VK |
136 | #define CDNS_MCP_CMD_WORD_LEN 0x4 |
137 | ||
138 | #define CDNS_MCP_CMD_SSP_TAG BIT(31) | |
139 | #define CDNS_MCP_CMD_COMMAND GENMASK(30, 28) | |
140 | #define CDNS_MCP_CMD_DEV_ADDR GENMASK(27, 24) | |
3cf25d63 | 141 | #define CDNS_MCP_CMD_REG_ADDR GENMASK(23, 8) |
2f52a517 VK |
142 | #define CDNS_MCP_CMD_REG_DATA GENMASK(7, 0) |
143 | ||
144 | #define CDNS_MCP_CMD_READ 2 | |
145 | #define CDNS_MCP_CMD_WRITE 3 | |
146 | ||
147 | #define CDNS_MCP_RESP_RDATA GENMASK(15, 8) | |
148 | #define CDNS_MCP_RESP_ACK BIT(0) | |
149 | #define CDNS_MCP_RESP_NACK BIT(1) | |
150 | ||
151 | #define CDNS_DP_SIZE 128 | |
152 | ||
153 | #define CDNS_DPN_B0_CONFIG(n) (0x100 + CDNS_DP_SIZE * (n)) | |
154 | #define CDNS_DPN_B0_CH_EN(n) (0x104 + CDNS_DP_SIZE * (n)) | |
155 | #define CDNS_DPN_B0_SAMPLE_CTRL(n) (0x108 + CDNS_DP_SIZE * (n)) | |
156 | #define CDNS_DPN_B0_OFFSET_CTRL(n) (0x10C + CDNS_DP_SIZE * (n)) | |
157 | #define CDNS_DPN_B0_HCTRL(n) (0x110 + CDNS_DP_SIZE * (n)) | |
158 | #define CDNS_DPN_B0_ASYNC_CTRL(n) (0x114 + CDNS_DP_SIZE * (n)) | |
159 | ||
160 | #define CDNS_DPN_B1_CONFIG(n) (0x118 + CDNS_DP_SIZE * (n)) | |
161 | #define CDNS_DPN_B1_CH_EN(n) (0x11C + CDNS_DP_SIZE * (n)) | |
162 | #define CDNS_DPN_B1_SAMPLE_CTRL(n) (0x120 + CDNS_DP_SIZE * (n)) | |
163 | #define CDNS_DPN_B1_OFFSET_CTRL(n) (0x124 + CDNS_DP_SIZE * (n)) | |
164 | #define CDNS_DPN_B1_HCTRL(n) (0x128 + CDNS_DP_SIZE * (n)) | |
165 | #define CDNS_DPN_B1_ASYNC_CTRL(n) (0x12C + CDNS_DP_SIZE * (n)) | |
166 | ||
167 | #define CDNS_DPN_CONFIG_BPM BIT(18) | |
168 | #define CDNS_DPN_CONFIG_BGC GENMASK(17, 16) | |
169 | #define CDNS_DPN_CONFIG_WL GENMASK(12, 8) | |
170 | #define CDNS_DPN_CONFIG_PORT_DAT GENMASK(3, 2) | |
171 | #define CDNS_DPN_CONFIG_PORT_FLOW GENMASK(1, 0) | |
172 | ||
173 | #define CDNS_DPN_SAMPLE_CTRL_SI GENMASK(15, 0) | |
174 | ||
175 | #define CDNS_DPN_OFFSET_CTRL_1 GENMASK(7, 0) | |
176 | #define CDNS_DPN_OFFSET_CTRL_2 GENMASK(15, 8) | |
177 | ||
178 | #define CDNS_DPN_HCTRL_HSTOP GENMASK(3, 0) | |
179 | #define CDNS_DPN_HCTRL_HSTART GENMASK(7, 4) | |
180 | #define CDNS_DPN_HCTRL_LCTRL GENMASK(10, 8) | |
181 | ||
182 | #define CDNS_PORTCTRL 0x130 | |
9e4e6019 | 183 | #define CDNS_PORTCTRL_TEST_FAILED BIT(1) |
2f52a517 VK |
184 | #define CDNS_PORTCTRL_DIRN BIT(7) |
185 | #define CDNS_PORTCTRL_BANK_INVERT BIT(8) | |
186 | ||
187 | #define CDNS_PORT_OFFSET 0x80 | |
188 | ||
189 | #define CDNS_PDI_CONFIG(n) (0x1100 + (n) * 16) | |
190 | ||
191 | #define CDNS_PDI_CONFIG_SOFT_RESET BIT(24) | |
192 | #define CDNS_PDI_CONFIG_CHANNEL GENMASK(15, 8) | |
193 | #define CDNS_PDI_CONFIG_PORT GENMASK(4, 0) | |
194 | ||
195 | /* Driver defaults */ | |
0cff9911 | 196 | #define CDNS_TX_TIMEOUT 500 |
2f52a517 | 197 | |
2f52a517 VK |
198 | #define CDNS_SCP_RX_FIFOLEVEL 0x2 |
199 | ||
200 | /* | |
201 | * register accessor helpers | |
202 | */ | |
203 | static inline u32 cdns_readl(struct sdw_cdns *cdns, int offset) | |
204 | { | |
205 | return readl(cdns->registers + offset); | |
206 | } | |
207 | ||
208 | static inline void cdns_writel(struct sdw_cdns *cdns, int offset, u32 value) | |
209 | { | |
210 | writel(value, cdns->registers + offset); | |
211 | } | |
212 | ||
9402e25d PLB |
213 | static inline u32 cdns_ip_readl(struct sdw_cdns *cdns, int offset) |
214 | { | |
215 | return cdns_readl(cdns, cdns->ip_offset + offset); | |
216 | } | |
217 | ||
218 | static inline void cdns_ip_writel(struct sdw_cdns *cdns, int offset, u32 value) | |
219 | { | |
220 | return cdns_writel(cdns, cdns->ip_offset + offset, value); | |
221 | } | |
222 | ||
2f52a517 VK |
223 | static inline void cdns_updatel(struct sdw_cdns *cdns, |
224 | int offset, u32 mask, u32 val) | |
225 | { | |
226 | u32 tmp; | |
227 | ||
228 | tmp = cdns_readl(cdns, offset); | |
229 | tmp = (tmp & ~mask) | val; | |
230 | cdns_writel(cdns, offset, tmp); | |
231 | } | |
232 | ||
9402e25d PLB |
233 | static inline void cdns_ip_updatel(struct sdw_cdns *cdns, |
234 | int offset, u32 mask, u32 val) | |
235 | { | |
236 | cdns_updatel(cdns, cdns->ip_offset + offset, mask, val); | |
237 | } | |
238 | ||
1032504f RW |
239 | static int cdns_set_wait(struct sdw_cdns *cdns, int offset, u32 mask, u32 value) |
240 | { | |
241 | int timeout = 10; | |
242 | u32 reg_read; | |
243 | ||
244 | /* Wait for bit to be set */ | |
245 | do { | |
246 | reg_read = readl(cdns->registers + offset); | |
247 | if ((reg_read & mask) == value) | |
248 | return 0; | |
249 | ||
250 | timeout--; | |
251 | usleep_range(50, 100); | |
252 | } while (timeout != 0); | |
253 | ||
254 | return -ETIMEDOUT; | |
255 | } | |
256 | ||
12632459 PLB |
257 | static int cdns_clear_bit(struct sdw_cdns *cdns, int offset, u32 value) |
258 | { | |
259 | writel(value, cdns->registers + offset); | |
260 | ||
261 | /* Wait for bit to be self cleared */ | |
262 | return cdns_set_wait(cdns, offset, value, 0); | |
263 | } | |
264 | ||
49ea07d3 PLB |
265 | /* |
266 | * all changes to the MCP_CONFIG, MCP_CONTROL, MCP_CMDCTRL and MCP_PHYCTRL | |
267 | * need to be confirmed with a write to MCP_CONFIG_UPDATE | |
268 | */ | |
ce1acf01 | 269 | static int cdns_config_update(struct sdw_cdns *cdns) |
49ea07d3 PLB |
270 | { |
271 | int ret; | |
272 | ||
9bc87cce PLB |
273 | if (sdw_cdns_is_clock_stop(cdns)) { |
274 | dev_err(cdns->dev, "Cannot program MCP_CONFIG_UPDATE in ClockStopMode\n"); | |
275 | return -EINVAL; | |
276 | } | |
277 | ||
49ea07d3 PLB |
278 | ret = cdns_clear_bit(cdns, CDNS_MCP_CONFIG_UPDATE, |
279 | CDNS_MCP_CONFIG_UPDATE_BIT); | |
280 | if (ret < 0) | |
281 | dev_err(cdns->dev, "Config update timedout\n"); | |
282 | ||
283 | return ret; | |
284 | } | |
285 | ||
aa85066e PLB |
286 | /* |
287 | * debugfs | |
288 | */ | |
289 | #ifdef CONFIG_DEBUG_FS | |
290 | ||
291 | #define RD_BUF (2 * PAGE_SIZE) | |
292 | ||
293 | static ssize_t cdns_sprintf(struct sdw_cdns *cdns, | |
294 | char *buf, size_t pos, unsigned int reg) | |
295 | { | |
296 | return scnprintf(buf + pos, RD_BUF - pos, | |
297 | "%4x\t%8x\n", reg, cdns_readl(cdns, reg)); | |
298 | } | |
299 | ||
300 | static int cdns_reg_show(struct seq_file *s, void *data) | |
301 | { | |
302 | struct sdw_cdns *cdns = s->private; | |
303 | char *buf; | |
304 | ssize_t ret; | |
305 | int num_ports; | |
306 | int i, j; | |
307 | ||
308 | buf = kzalloc(RD_BUF, GFP_KERNEL); | |
309 | if (!buf) | |
310 | return -ENOMEM; | |
311 | ||
312 | ret = scnprintf(buf, RD_BUF, "Register Value\n"); | |
313 | ret += scnprintf(buf + ret, RD_BUF - ret, "\nMCP Registers\n"); | |
314 | /* 8 MCP registers */ | |
315 | for (i = CDNS_MCP_CONFIG; i <= CDNS_MCP_PHYCTRL; i += sizeof(u32)) | |
316 | ret += cdns_sprintf(cdns, buf, ret, i); | |
317 | ||
318 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
319 | "\nStatus & Intr Registers\n"); | |
320 | /* 13 Status & Intr registers (offsets 0x70 and 0x74 not defined) */ | |
321 | for (i = CDNS_MCP_STAT; i <= CDNS_MCP_FIFOSTAT; i += sizeof(u32)) | |
322 | ret += cdns_sprintf(cdns, buf, ret, i); | |
323 | ||
324 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
325 | "\nSSP & Clk ctrl Registers\n"); | |
326 | ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_SSP_CTRL0); | |
327 | ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_SSP_CTRL1); | |
328 | ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_CLK_CTRL0); | |
329 | ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_CLK_CTRL1); | |
330 | ||
331 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
332 | "\nDPn B0 Registers\n"); | |
333 | ||
807c15bc | 334 | num_ports = cdns->num_ports; |
aa85066e PLB |
335 | |
336 | for (i = 0; i < num_ports; i++) { | |
337 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
338 | "\nDP-%d\n", i); | |
339 | for (j = CDNS_DPN_B0_CONFIG(i); | |
340 | j < CDNS_DPN_B0_ASYNC_CTRL(i); j += sizeof(u32)) | |
341 | ret += cdns_sprintf(cdns, buf, ret, j); | |
342 | } | |
343 | ||
344 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
345 | "\nDPn B1 Registers\n"); | |
346 | for (i = 0; i < num_ports; i++) { | |
347 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
348 | "\nDP-%d\n", i); | |
349 | ||
350 | for (j = CDNS_DPN_B1_CONFIG(i); | |
351 | j < CDNS_DPN_B1_ASYNC_CTRL(i); j += sizeof(u32)) | |
352 | ret += cdns_sprintf(cdns, buf, ret, j); | |
353 | } | |
354 | ||
355 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
356 | "\nDPn Control Registers\n"); | |
357 | for (i = 0; i < num_ports; i++) | |
358 | ret += cdns_sprintf(cdns, buf, ret, | |
359 | CDNS_PORTCTRL + i * CDNS_PORT_OFFSET); | |
360 | ||
361 | ret += scnprintf(buf + ret, RD_BUF - ret, | |
362 | "\nPDIn Config Registers\n"); | |
363 | ||
364 | /* number of PDI and ports is interchangeable */ | |
365 | for (i = 0; i < num_ports; i++) | |
366 | ret += cdns_sprintf(cdns, buf, ret, CDNS_PDI_CONFIG(i)); | |
367 | ||
368 | seq_printf(s, "%s", buf); | |
369 | kfree(buf); | |
370 | ||
371 | return 0; | |
372 | } | |
373 | DEFINE_SHOW_ATTRIBUTE(cdns_reg); | |
374 | ||
675d4c9a PLB |
375 | static int cdns_hw_reset(void *data, u64 value) |
376 | { | |
377 | struct sdw_cdns *cdns = data; | |
378 | int ret; | |
379 | ||
380 | if (value != 1) | |
381 | return -EINVAL; | |
382 | ||
383 | /* Userspace changed the hardware state behind the kernel's back */ | |
384 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | |
385 | ||
386 | ret = sdw_cdns_exit_reset(cdns); | |
387 | ||
388 | dev_dbg(cdns->dev, "link hw_reset done: %d\n", ret); | |
389 | ||
390 | return ret; | |
391 | } | |
392 | ||
393 | DEFINE_DEBUGFS_ATTRIBUTE(cdns_hw_reset_fops, NULL, cdns_hw_reset, "%llu\n"); | |
394 | ||
32d2a893 PLB |
395 | static int cdns_parity_error_injection(void *data, u64 value) |
396 | { | |
397 | struct sdw_cdns *cdns = data; | |
398 | struct sdw_bus *bus; | |
399 | int ret; | |
400 | ||
401 | if (value != 1) | |
402 | return -EINVAL; | |
403 | ||
404 | bus = &cdns->bus; | |
405 | ||
406 | /* | |
407 | * Resume Master device. If this results in a bus reset, the | |
408 | * Slave devices will re-attach and be re-enumerated. | |
409 | */ | |
915bf27a | 410 | ret = pm_runtime_resume_and_get(bus->dev); |
32d2a893 PLB |
411 | if (ret < 0 && ret != -EACCES) { |
412 | dev_err_ratelimited(cdns->dev, | |
915bf27a | 413 | "pm_runtime_resume_and_get failed in %s, ret %d\n", |
32d2a893 | 414 | __func__, ret); |
32d2a893 PLB |
415 | return ret; |
416 | } | |
417 | ||
418 | /* | |
419 | * wait long enough for Slave(s) to be in steady state. This | |
420 | * does not need to be super precise. | |
421 | */ | |
422 | msleep(200); | |
423 | ||
424 | /* | |
425 | * Take the bus lock here to make sure that any bus transactions | |
426 | * will be queued while we inject a parity error on a dummy read | |
427 | */ | |
428 | mutex_lock(&bus->bus_lock); | |
429 | ||
430 | /* program hardware to inject parity error */ | |
73a29d3f PLB |
431 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL, |
432 | CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR, | |
433 | CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR); | |
32d2a893 PLB |
434 | |
435 | /* commit changes */ | |
436 | cdns_updatel(cdns, CDNS_MCP_CONFIG_UPDATE, | |
437 | CDNS_MCP_CONFIG_UPDATE_BIT, | |
438 | CDNS_MCP_CONFIG_UPDATE_BIT); | |
439 | ||
440 | /* do a broadcast dummy read to avoid bus clashes */ | |
441 | ret = sdw_bread_no_pm_unlocked(&cdns->bus, 0xf, SDW_SCP_DEVID_0); | |
442 | dev_info(cdns->dev, "parity error injection, read: %d\n", ret); | |
443 | ||
444 | /* program hardware to disable parity error */ | |
73a29d3f PLB |
445 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL, |
446 | CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR, | |
447 | 0); | |
32d2a893 PLB |
448 | |
449 | /* commit changes */ | |
450 | cdns_updatel(cdns, CDNS_MCP_CONFIG_UPDATE, | |
451 | CDNS_MCP_CONFIG_UPDATE_BIT, | |
452 | CDNS_MCP_CONFIG_UPDATE_BIT); | |
453 | ||
454 | /* Continue bus operation with parity error injection disabled */ | |
455 | mutex_unlock(&bus->bus_lock); | |
456 | ||
457 | /* Userspace changed the hardware state behind the kernel's back */ | |
458 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | |
459 | ||
460 | /* | |
461 | * allow Master device to enter pm_runtime suspend. This may | |
462 | * also result in Slave devices suspending. | |
463 | */ | |
464 | pm_runtime_mark_last_busy(bus->dev); | |
465 | pm_runtime_put_autosuspend(bus->dev); | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | DEFINE_DEBUGFS_ATTRIBUTE(cdns_parity_error_fops, NULL, | |
471 | cdns_parity_error_injection, "%llu\n"); | |
472 | ||
8fba8acd PLB |
473 | static int cdns_set_pdi_loopback_source(void *data, u64 value) |
474 | { | |
475 | struct sdw_cdns *cdns = data; | |
476 | unsigned int pdi_out_num = cdns->pcm.num_bd + cdns->pcm.num_out; | |
477 | ||
478 | if (value > pdi_out_num) | |
479 | return -EINVAL; | |
480 | ||
481 | /* Userspace changed the hardware state behind the kernel's back */ | |
482 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | |
483 | ||
484 | cdns->pdi_loopback_source = value; | |
485 | ||
486 | return 0; | |
487 | } | |
488 | DEFINE_DEBUGFS_ATTRIBUTE(cdns_pdi_loopback_source_fops, NULL, cdns_set_pdi_loopback_source, "%llu\n"); | |
489 | ||
490 | static int cdns_set_pdi_loopback_target(void *data, u64 value) | |
491 | { | |
492 | struct sdw_cdns *cdns = data; | |
493 | unsigned int pdi_in_num = cdns->pcm.num_bd + cdns->pcm.num_in; | |
494 | ||
495 | if (value > pdi_in_num) | |
496 | return -EINVAL; | |
497 | ||
498 | /* Userspace changed the hardware state behind the kernel's back */ | |
499 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | |
500 | ||
501 | cdns->pdi_loopback_target = value; | |
502 | ||
503 | return 0; | |
504 | } | |
505 | DEFINE_DEBUGFS_ATTRIBUTE(cdns_pdi_loopback_target_fops, NULL, cdns_set_pdi_loopback_target, "%llu\n"); | |
506 | ||
aa85066e PLB |
507 | /** |
508 | * sdw_cdns_debugfs_init() - Cadence debugfs init | |
509 | * @cdns: Cadence instance | |
510 | * @root: debugfs root | |
511 | */ | |
512 | void sdw_cdns_debugfs_init(struct sdw_cdns *cdns, struct dentry *root) | |
513 | { | |
514 | debugfs_create_file("cdns-registers", 0400, root, cdns, &cdns_reg_fops); | |
675d4c9a PLB |
515 | |
516 | debugfs_create_file("cdns-hw-reset", 0200, root, cdns, | |
517 | &cdns_hw_reset_fops); | |
32d2a893 PLB |
518 | |
519 | debugfs_create_file("cdns-parity-error-injection", 0200, root, cdns, | |
520 | &cdns_parity_error_fops); | |
8fba8acd PLB |
521 | |
522 | cdns->pdi_loopback_source = -1; | |
523 | cdns->pdi_loopback_target = -1; | |
524 | ||
525 | debugfs_create_file("cdns-pdi-loopback-source", 0200, root, cdns, | |
526 | &cdns_pdi_loopback_source_fops); | |
527 | ||
528 | debugfs_create_file("cdns-pdi-loopback-target", 0200, root, cdns, | |
529 | &cdns_pdi_loopback_target_fops); | |
530 | ||
aa85066e PLB |
531 | } |
532 | EXPORT_SYMBOL_GPL(sdw_cdns_debugfs_init); | |
533 | ||
534 | #endif /* CONFIG_DEBUG_FS */ | |
535 | ||
956baa19 SK |
536 | /* |
537 | * IO Calls | |
538 | */ | |
bbb63817 PLB |
539 | static enum sdw_command_response |
540 | cdns_fill_msg_resp(struct sdw_cdns *cdns, | |
541 | struct sdw_msg *msg, int count, int offset) | |
956baa19 SK |
542 | { |
543 | int nack = 0, no_ack = 0; | |
544 | int i; | |
545 | ||
546 | /* check message response */ | |
547 | for (i = 0; i < count; i++) { | |
548 | if (!(cdns->response_buf[i] & CDNS_MCP_RESP_ACK)) { | |
549 | no_ack = 1; | |
9a0c798c | 550 | dev_vdbg(cdns->dev, "Msg Ack not received, cmd %d\n", i); |
db9d9f94 PLB |
551 | } |
552 | if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) { | |
553 | nack = 1; | |
9a0c798c | 554 | dev_err_ratelimited(cdns->dev, "Msg NACK received, cmd %d\n", i); |
956baa19 SK |
555 | } |
556 | } | |
557 | ||
558 | if (nack) { | |
eb7df4c8 | 559 | dev_err_ratelimited(cdns->dev, "Msg NACKed for Slave %d\n", msg->dev_num); |
956baa19 | 560 | return SDW_CMD_FAIL; |
6f7219fe GL |
561 | } |
562 | ||
563 | if (no_ack) { | |
eb7df4c8 | 564 | dev_dbg_ratelimited(cdns->dev, "Msg ignored for Slave %d\n", msg->dev_num); |
956baa19 SK |
565 | return SDW_CMD_IGNORED; |
566 | } | |
567 | ||
ba05b39d RF |
568 | if (msg->flags == SDW_MSG_FLAG_READ) { |
569 | /* fill response */ | |
570 | for (i = 0; i < count; i++) | |
571 | msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA, | |
572 | cdns->response_buf[i]); | |
573 | } | |
956baa19 SK |
574 | |
575 | return SDW_CMD_OK; | |
576 | } | |
577 | ||
0603a47b RF |
578 | static void cdns_read_response(struct sdw_cdns *cdns) |
579 | { | |
580 | u32 num_resp, cmd_base; | |
581 | int i; | |
582 | ||
583 | /* RX_FIFO_AVAIL can be 2 entries more than the FIFO size */ | |
584 | BUILD_BUG_ON(ARRAY_SIZE(cdns->response_buf) < CDNS_MCP_CMD_LEN + 2); | |
585 | ||
586 | num_resp = cdns_readl(cdns, CDNS_MCP_FIFOSTAT); | |
587 | num_resp &= CDNS_MCP_RX_FIFO_AVAIL; | |
588 | if (num_resp > ARRAY_SIZE(cdns->response_buf)) { | |
589 | dev_warn(cdns->dev, "RX AVAIL %d too long\n", num_resp); | |
590 | num_resp = ARRAY_SIZE(cdns->response_buf); | |
591 | } | |
592 | ||
83ae1ccb | 593 | cmd_base = CDNS_IP_MCP_CMD_BASE; |
0603a47b RF |
594 | |
595 | for (i = 0; i < num_resp; i++) { | |
83ae1ccb | 596 | cdns->response_buf[i] = cdns_ip_readl(cdns, cmd_base); |
0603a47b RF |
597 | cmd_base += CDNS_MCP_CMD_WORD_LEN; |
598 | } | |
599 | } | |
600 | ||
956baa19 SK |
601 | static enum sdw_command_response |
602 | _cdns_xfer_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int cmd, | |
bbb63817 | 603 | int offset, int count, bool defer) |
956baa19 SK |
604 | { |
605 | unsigned long time; | |
606 | u32 base, i, data; | |
607 | u16 addr; | |
608 | ||
609 | /* Program the watermark level for RX FIFO */ | |
610 | if (cdns->msg_count != count) { | |
611 | cdns_writel(cdns, CDNS_MCP_FIFOLEVEL, count); | |
612 | cdns->msg_count = count; | |
613 | } | |
614 | ||
83ae1ccb | 615 | base = CDNS_IP_MCP_CMD_BASE; |
3ed96fb4 | 616 | addr = msg->addr + offset; |
956baa19 SK |
617 | |
618 | for (i = 0; i < count; i++) { | |
3cf25d63 VK |
619 | data = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num); |
620 | data |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, cmd); | |
621 | data |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, addr); | |
622 | addr++; | |
956baa19 SK |
623 | |
624 | if (msg->flags == SDW_MSG_FLAG_WRITE) | |
625 | data |= msg->buf[i + offset]; | |
626 | ||
3cf25d63 | 627 | data |= FIELD_PREP(CDNS_MCP_CMD_SSP_TAG, msg->ssp_sync); |
83ae1ccb | 628 | cdns_ip_writel(cdns, base, data); |
956baa19 SK |
629 | base += CDNS_MCP_CMD_WORD_LEN; |
630 | } | |
631 | ||
632 | if (defer) | |
633 | return SDW_CMD_OK; | |
634 | ||
635 | /* wait for timeout or response */ | |
636 | time = wait_for_completion_timeout(&cdns->tx_complete, | |
bbb63817 | 637 | msecs_to_jiffies(CDNS_TX_TIMEOUT)); |
956baa19 | 638 | if (!time) { |
53ee9572 PLB |
639 | dev_err(cdns->dev, "IO transfer timed out, cmd %d device %d addr %x len %d\n", |
640 | cmd, msg->dev_num, msg->addr, msg->len); | |
956baa19 | 641 | msg->len = 0; |
0603a47b RF |
642 | |
643 | /* Drain anything in the RX_FIFO */ | |
644 | cdns_read_response(cdns); | |
645 | ||
956baa19 SK |
646 | return SDW_CMD_TIMEOUT; |
647 | } | |
648 | ||
649 | return cdns_fill_msg_resp(cdns, msg, count, offset); | |
650 | } | |
651 | ||
bbb63817 PLB |
652 | static enum sdw_command_response |
653 | cdns_program_scp_addr(struct sdw_cdns *cdns, struct sdw_msg *msg) | |
956baa19 SK |
654 | { |
655 | int nack = 0, no_ack = 0; | |
656 | unsigned long time; | |
657 | u32 data[2], base; | |
658 | int i; | |
659 | ||
660 | /* Program the watermark level for RX FIFO */ | |
661 | if (cdns->msg_count != CDNS_SCP_RX_FIFOLEVEL) { | |
662 | cdns_writel(cdns, CDNS_MCP_FIFOLEVEL, CDNS_SCP_RX_FIFOLEVEL); | |
663 | cdns->msg_count = CDNS_SCP_RX_FIFOLEVEL; | |
664 | } | |
665 | ||
3cf25d63 VK |
666 | data[0] = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num); |
667 | data[0] |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, 0x3); | |
956baa19 SK |
668 | data[1] = data[0]; |
669 | ||
3cf25d63 VK |
670 | data[0] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE1); |
671 | data[1] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE2); | |
956baa19 SK |
672 | |
673 | data[0] |= msg->addr_page1; | |
674 | data[1] |= msg->addr_page2; | |
675 | ||
83ae1ccb PLB |
676 | base = CDNS_IP_MCP_CMD_BASE; |
677 | cdns_ip_writel(cdns, base, data[0]); | |
956baa19 | 678 | base += CDNS_MCP_CMD_WORD_LEN; |
83ae1ccb | 679 | cdns_ip_writel(cdns, base, data[1]); |
956baa19 SK |
680 | |
681 | time = wait_for_completion_timeout(&cdns->tx_complete, | |
bbb63817 | 682 | msecs_to_jiffies(CDNS_TX_TIMEOUT)); |
956baa19 SK |
683 | if (!time) { |
684 | dev_err(cdns->dev, "SCP Msg trf timed out\n"); | |
685 | msg->len = 0; | |
686 | return SDW_CMD_TIMEOUT; | |
687 | } | |
688 | ||
689 | /* check response the writes */ | |
690 | for (i = 0; i < 2; i++) { | |
691 | if (!(cdns->response_buf[i] & CDNS_MCP_RESP_ACK)) { | |
692 | no_ack = 1; | |
17ed5bef | 693 | dev_err(cdns->dev, "Program SCP Ack not received\n"); |
956baa19 SK |
694 | if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) { |
695 | nack = 1; | |
17ed5bef | 696 | dev_err(cdns->dev, "Program SCP NACK received\n"); |
956baa19 SK |
697 | } |
698 | } | |
699 | } | |
700 | ||
701 | /* For NACK, NO ack, don't return err if we are in Broadcast mode */ | |
702 | if (nack) { | |
eb7df4c8 PLB |
703 | dev_err_ratelimited(cdns->dev, |
704 | "SCP_addrpage NACKed for Slave %d\n", msg->dev_num); | |
956baa19 | 705 | return SDW_CMD_FAIL; |
6f7219fe GL |
706 | } |
707 | ||
708 | if (no_ack) { | |
eb7df4c8 PLB |
709 | dev_dbg_ratelimited(cdns->dev, |
710 | "SCP_addrpage ignored for Slave %d\n", msg->dev_num); | |
956baa19 SK |
711 | return SDW_CMD_IGNORED; |
712 | } | |
713 | ||
714 | return SDW_CMD_OK; | |
715 | } | |
716 | ||
717 | static int cdns_prep_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int *cmd) | |
718 | { | |
719 | int ret; | |
720 | ||
721 | if (msg->page) { | |
722 | ret = cdns_program_scp_addr(cdns, msg); | |
723 | if (ret) { | |
724 | msg->len = 0; | |
725 | return ret; | |
726 | } | |
727 | } | |
728 | ||
729 | switch (msg->flags) { | |
730 | case SDW_MSG_FLAG_READ: | |
731 | *cmd = CDNS_MCP_CMD_READ; | |
732 | break; | |
733 | ||
734 | case SDW_MSG_FLAG_WRITE: | |
735 | *cmd = CDNS_MCP_CMD_WRITE; | |
736 | break; | |
737 | ||
738 | default: | |
739 | dev_err(cdns->dev, "Invalid msg cmd: %d\n", msg->flags); | |
740 | return -EINVAL; | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
c91605f4 | 746 | enum sdw_command_response |
956baa19 SK |
747 | cdns_xfer_msg(struct sdw_bus *bus, struct sdw_msg *msg) |
748 | { | |
749 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
750 | int cmd = 0, ret, i; | |
751 | ||
752 | ret = cdns_prep_msg(cdns, msg, &cmd); | |
753 | if (ret) | |
754 | return SDW_CMD_FAIL_OTHER; | |
755 | ||
756 | for (i = 0; i < msg->len / CDNS_MCP_CMD_LEN; i++) { | |
757 | ret = _cdns_xfer_msg(cdns, msg, cmd, i * CDNS_MCP_CMD_LEN, | |
bbb63817 | 758 | CDNS_MCP_CMD_LEN, false); |
7f6bad4d | 759 | if (ret != SDW_CMD_OK) |
bafb1eac | 760 | return ret; |
956baa19 SK |
761 | } |
762 | ||
763 | if (!(msg->len % CDNS_MCP_CMD_LEN)) | |
bafb1eac | 764 | return SDW_CMD_OK; |
956baa19 | 765 | |
bafb1eac RF |
766 | return _cdns_xfer_msg(cdns, msg, cmd, i * CDNS_MCP_CMD_LEN, |
767 | msg->len % CDNS_MCP_CMD_LEN, false); | |
956baa19 | 768 | } |
c91605f4 | 769 | EXPORT_SYMBOL(cdns_xfer_msg); |
956baa19 | 770 | |
c91605f4 | 771 | enum sdw_command_response |
66f95de7 | 772 | cdns_xfer_msg_defer(struct sdw_bus *bus) |
956baa19 SK |
773 | { |
774 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
66f95de7 PLB |
775 | struct sdw_defer *defer = &bus->defer_msg; |
776 | struct sdw_msg *msg = defer->msg; | |
956baa19 SK |
777 | int cmd = 0, ret; |
778 | ||
779 | /* for defer only 1 message is supported */ | |
780 | if (msg->len > 1) | |
781 | return -ENOTSUPP; | |
782 | ||
783 | ret = cdns_prep_msg(cdns, msg, &cmd); | |
784 | if (ret) | |
785 | return SDW_CMD_FAIL_OTHER; | |
786 | ||
956baa19 SK |
787 | return _cdns_xfer_msg(cdns, msg, cmd, 0, msg->len, true); |
788 | } | |
c91605f4 | 789 | EXPORT_SYMBOL(cdns_xfer_msg_defer); |
956baa19 | 790 | |
133547a1 PLB |
791 | u32 cdns_read_ping_status(struct sdw_bus *bus) |
792 | { | |
793 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
794 | ||
795 | return cdns_readl(cdns, CDNS_MCP_SLAVE_STAT); | |
796 | } | |
797 | EXPORT_SYMBOL(cdns_read_ping_status); | |
798 | ||
2f52a517 VK |
799 | /* |
800 | * IRQ handling | |
801 | */ | |
802 | ||
803 | static int cdns_update_slave_status(struct sdw_cdns *cdns, | |
6f206833 | 804 | u64 slave_intstat) |
2f52a517 VK |
805 | { |
806 | enum sdw_slave_status status[SDW_MAX_DEVICES + 1]; | |
807 | bool is_slave = false; | |
a78b32d9 | 808 | u32 mask; |
fbbc73a2 | 809 | u32 val; |
2f52a517 VK |
810 | int i, set_status; |
811 | ||
2f52a517 VK |
812 | memset(status, 0, sizeof(status)); |
813 | ||
814 | for (i = 0; i <= SDW_MAX_DEVICES; i++) { | |
6f206833 PLB |
815 | mask = (slave_intstat >> (i * CDNS_MCP_SLAVE_STATUS_NUM)) & |
816 | CDNS_MCP_SLAVE_STATUS_BITS; | |
2f52a517 | 817 | |
2f52a517 VK |
818 | set_status = 0; |
819 | ||
fbbc73a2 ST |
820 | if (mask) { |
821 | is_slave = true; | |
2f52a517 | 822 | |
fbbc73a2 ST |
823 | if (mask & CDNS_MCP_SLAVE_INTSTAT_RESERVED) { |
824 | status[i] = SDW_SLAVE_RESERVED; | |
825 | set_status++; | |
826 | } | |
2f52a517 | 827 | |
fbbc73a2 ST |
828 | if (mask & CDNS_MCP_SLAVE_INTSTAT_ATTACHED) { |
829 | status[i] = SDW_SLAVE_ATTACHED; | |
830 | set_status++; | |
831 | } | |
2f52a517 | 832 | |
fbbc73a2 ST |
833 | if (mask & CDNS_MCP_SLAVE_INTSTAT_ALERT) { |
834 | status[i] = SDW_SLAVE_ALERT; | |
835 | set_status++; | |
836 | } | |
7181b1d4 | 837 | |
fbbc73a2 ST |
838 | if (mask & CDNS_MCP_SLAVE_INTSTAT_NPRESENT) { |
839 | status[i] = SDW_SLAVE_UNATTACHED; | |
840 | set_status++; | |
841 | } | |
842 | } | |
7181b1d4 | 843 | |
fbbc73a2 ST |
844 | /* |
845 | * check that there was a single reported Slave status and when | |
846 | * there is not use the latest status extracted from PING commands | |
847 | */ | |
848 | if (set_status != 1) { | |
7181b1d4 PLB |
849 | val = cdns_readl(cdns, CDNS_MCP_SLAVE_STAT); |
850 | val >>= (i * 2); | |
851 | ||
852 | switch (val & 0x3) { | |
853 | case 0: | |
854 | status[i] = SDW_SLAVE_UNATTACHED; | |
855 | break; | |
856 | case 1: | |
857 | status[i] = SDW_SLAVE_ATTACHED; | |
858 | break; | |
859 | case 2: | |
860 | status[i] = SDW_SLAVE_ALERT; | |
861 | break; | |
862 | case 3: | |
863 | default: | |
864 | status[i] = SDW_SLAVE_RESERVED; | |
865 | break; | |
866 | } | |
2f52a517 VK |
867 | } |
868 | } | |
869 | ||
870 | if (is_slave) | |
871 | return sdw_handle_slave_status(&cdns->bus, status); | |
872 | ||
873 | return 0; | |
874 | } | |
875 | ||
876 | /** | |
877 | * sdw_cdns_irq() - Cadence interrupt handler | |
878 | * @irq: irq number | |
879 | * @dev_id: irq context | |
880 | */ | |
881 | irqreturn_t sdw_cdns_irq(int irq, void *dev_id) | |
882 | { | |
883 | struct sdw_cdns *cdns = dev_id; | |
884 | u32 int_status; | |
2f52a517 VK |
885 | |
886 | /* Check if the link is up */ | |
887 | if (!cdns->link_up) | |
888 | return IRQ_NONE; | |
889 | ||
890 | int_status = cdns_readl(cdns, CDNS_MCP_INTSTAT); | |
891 | ||
a2cff9ee PLB |
892 | /* check for reserved values read as zero */ |
893 | if (int_status & CDNS_MCP_INT_RESERVED) | |
894 | return IRQ_NONE; | |
895 | ||
2f52a517 VK |
896 | if (!(int_status & CDNS_MCP_INT_IRQ)) |
897 | return IRQ_NONE; | |
898 | ||
956baa19 | 899 | if (int_status & CDNS_MCP_INT_RX_WL) { |
dd0b9619 PLB |
900 | struct sdw_bus *bus = &cdns->bus; |
901 | struct sdw_defer *defer = &bus->defer_msg; | |
902 | ||
956baa19 SK |
903 | cdns_read_response(cdns); |
904 | ||
dd0b9619 PLB |
905 | if (defer && defer->msg) { |
906 | cdns_fill_msg_resp(cdns, defer->msg, | |
907 | defer->length, 0); | |
908 | complete(&defer->complete); | |
f6e20967 | 909 | } else { |
956baa19 | 910 | complete(&cdns->tx_complete); |
f6e20967 | 911 | } |
956baa19 SK |
912 | } |
913 | ||
9b5884a0 PLB |
914 | if (int_status & CDNS_MCP_INT_PARITY) { |
915 | /* Parity error detected by Master */ | |
916 | dev_err_ratelimited(cdns->dev, "Parity error\n"); | |
917 | } | |
918 | ||
2f52a517 | 919 | if (int_status & CDNS_MCP_INT_CTRL_CLASH) { |
2f52a517 VK |
920 | /* Slave is driving bit slot during control word */ |
921 | dev_err_ratelimited(cdns->dev, "Bus clash for control word\n"); | |
2f52a517 VK |
922 | } |
923 | ||
924 | if (int_status & CDNS_MCP_INT_DATA_CLASH) { | |
925 | /* | |
926 | * Multiple slaves trying to drive bit slot, or issue with | |
927 | * ownership of data bits or Slave gone bonkers | |
928 | */ | |
929 | dev_err_ratelimited(cdns->dev, "Bus clash for data word\n"); | |
2f52a517 VK |
930 | } |
931 | ||
9e4e6019 PLB |
932 | if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL && |
933 | int_status & CDNS_MCP_INT_DPINT) { | |
934 | u32 port_intstat; | |
935 | ||
936 | /* just log which ports report an error */ | |
937 | port_intstat = cdns_readl(cdns, CDNS_MCP_PORT_INTSTAT); | |
938 | dev_err_ratelimited(cdns->dev, "DP interrupt: PortIntStat %8x\n", | |
939 | port_intstat); | |
940 | ||
941 | /* clear status w/ write1 */ | |
942 | cdns_writel(cdns, CDNS_MCP_PORT_INTSTAT, port_intstat); | |
943 | } | |
944 | ||
2f52a517 VK |
945 | if (int_status & CDNS_MCP_INT_SLAVE_MASK) { |
946 | /* Mask the Slave interrupt and wake thread */ | |
947 | cdns_updatel(cdns, CDNS_MCP_INTMASK, | |
bbb63817 | 948 | CDNS_MCP_INT_SLAVE_MASK, 0); |
2f52a517 VK |
949 | |
950 | int_status &= ~CDNS_MCP_INT_SLAVE_MASK; | |
d2068da5 PLB |
951 | |
952 | /* | |
953 | * Deal with possible race condition between interrupt | |
954 | * handling and disabling interrupts on suspend. | |
955 | * | |
956 | * If the master is in the process of disabling | |
957 | * interrupts, don't schedule a workqueue | |
958 | */ | |
959 | if (cdns->interrupt_enabled) | |
960 | schedule_work(&cdns->work); | |
2f52a517 VK |
961 | } |
962 | ||
963 | cdns_writel(cdns, CDNS_MCP_INTSTAT, int_status); | |
00d3c2b3 | 964 | return IRQ_HANDLED; |
2f52a517 VK |
965 | } |
966 | EXPORT_SYMBOL(sdw_cdns_irq); | |
967 | ||
968 | /** | |
b76f3fba | 969 | * cdns_update_slave_status_work - update slave status in a work since we will need to handle |
4a98a6b2 BL |
970 | * other interrupts eg. CDNS_MCP_INT_RX_WL during the update slave |
971 | * process. | |
972 | * @work: cdns worker thread | |
2f52a517 | 973 | */ |
4a98a6b2 | 974 | static void cdns_update_slave_status_work(struct work_struct *work) |
2f52a517 | 975 | { |
4a98a6b2 BL |
976 | struct sdw_cdns *cdns = |
977 | container_of(work, struct sdw_cdns, work); | |
2f52a517 | 978 | u32 slave0, slave1; |
6f206833 | 979 | u64 slave_intstat; |
3db50a99 PLB |
980 | u32 device0_status; |
981 | int retry_count = 0; | |
2f52a517 | 982 | |
0c5e99c4 RF |
983 | /* |
984 | * Clear main interrupt first so we don't lose any assertions | |
985 | * that happen during this function. | |
986 | */ | |
987 | cdns_writel(cdns, CDNS_MCP_INTSTAT, CDNS_MCP_INT_SLAVE_MASK); | |
988 | ||
2f52a517 VK |
989 | slave0 = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT0); |
990 | slave1 = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT1); | |
991 | ||
0c5e99c4 RF |
992 | /* |
993 | * Clear the bits before handling so we don't lose any | |
994 | * bits that re-assert. | |
995 | */ | |
996 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT0, slave0); | |
997 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT1, slave1); | |
998 | ||
6f206833 PLB |
999 | /* combine the two status */ |
1000 | slave_intstat = ((u64)slave1 << 32) | slave0; | |
1001 | ||
1002 | dev_dbg_ratelimited(cdns->dev, "Slave status change: 0x%llx\n", slave_intstat); | |
1003 | ||
3db50a99 | 1004 | update_status: |
6f206833 | 1005 | cdns_update_slave_status(cdns, slave_intstat); |
2f52a517 | 1006 | |
3db50a99 PLB |
1007 | /* |
1008 | * When there is more than one peripheral per link, it's | |
1009 | * possible that a deviceB becomes attached after we deal with | |
1010 | * the attachment of deviceA. Since the hardware does a | |
1011 | * logical AND, the attachment of the second device does not | |
1012 | * change the status seen by the driver. | |
1013 | * | |
1014 | * In that case, clearing the registers above would result in | |
1015 | * the deviceB never being detected - until a change of status | |
1016 | * is observed on the bus. | |
1017 | * | |
1018 | * To avoid this race condition, re-check if any device0 needs | |
1019 | * attention with PING commands. There is no need to check for | |
1020 | * ALERTS since they are not allowed until a non-zero | |
1021 | * device_number is assigned. | |
0c5e99c4 RF |
1022 | * |
1023 | * Do not clear the INTSTAT0/1. While looping to enumerate devices on | |
1024 | * #0 there could be status changes on other devices - these must | |
1025 | * be kept in the INTSTAT so they can be handled when all #0 devices | |
1026 | * have been handled. | |
3db50a99 PLB |
1027 | */ |
1028 | ||
1029 | device0_status = cdns_readl(cdns, CDNS_MCP_SLAVE_STAT); | |
1030 | device0_status &= 3; | |
1031 | ||
1032 | if (device0_status == SDW_SLAVE_ATTACHED) { | |
1033 | if (retry_count++ < SDW_MAX_DEVICES) { | |
1034 | dev_dbg_ratelimited(cdns->dev, | |
1035 | "Device0 detected after clearing status, iteration %d\n", | |
1036 | retry_count); | |
1037 | slave_intstat = CDNS_MCP_SLAVE_INTSTAT_ATTACHED; | |
1038 | goto update_status; | |
1039 | } else { | |
1040 | dev_err_ratelimited(cdns->dev, | |
1041 | "Device0 detected after %d iterations\n", | |
1042 | retry_count); | |
1043 | } | |
1044 | } | |
1045 | ||
0c5e99c4 | 1046 | /* unmask Slave interrupt now */ |
2f52a517 | 1047 | cdns_updatel(cdns, CDNS_MCP_INTMASK, |
bbb63817 | 1048 | CDNS_MCP_INT_SLAVE_MASK, CDNS_MCP_INT_SLAVE_MASK); |
2f52a517 | 1049 | |
2f52a517 | 1050 | } |
2f52a517 | 1051 | |
ff560946 PLB |
1052 | /* paranoia check to make sure self-cleared bits are indeed cleared */ |
1053 | void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string, | |
1054 | bool initial_delay, int reset_iterations) | |
1055 | { | |
4dc953bc | 1056 | u32 ip_mcp_control; |
ff560946 PLB |
1057 | u32 mcp_control; |
1058 | u32 mcp_config_update; | |
1059 | int i; | |
1060 | ||
1061 | if (initial_delay) | |
1062 | usleep_range(1000, 1500); | |
1063 | ||
4dc953bc PLB |
1064 | ip_mcp_control = cdns_ip_readl(cdns, CDNS_IP_MCP_CONTROL); |
1065 | ||
1066 | /* the following bits should be cleared immediately */ | |
1067 | if (ip_mcp_control & CDNS_IP_MCP_CONTROL_SW_RST) | |
1068 | dev_err(cdns->dev, "%s failed: IP_MCP_CONTROL_SW_RST is not cleared\n", string); | |
1069 | ||
ff560946 PLB |
1070 | mcp_control = cdns_readl(cdns, CDNS_MCP_CONTROL); |
1071 | ||
1072 | /* the following bits should be cleared immediately */ | |
1073 | if (mcp_control & CDNS_MCP_CONTROL_CMD_RST) | |
1074 | dev_err(cdns->dev, "%s failed: MCP_CONTROL_CMD_RST is not cleared\n", string); | |
1075 | if (mcp_control & CDNS_MCP_CONTROL_SOFT_RST) | |
1076 | dev_err(cdns->dev, "%s failed: MCP_CONTROL_SOFT_RST is not cleared\n", string); | |
ff560946 PLB |
1077 | if (mcp_control & CDNS_MCP_CONTROL_CLK_STOP_CLR) |
1078 | dev_err(cdns->dev, "%s failed: MCP_CONTROL_CLK_STOP_CLR is not cleared\n", string); | |
4dc953bc | 1079 | |
ff560946 PLB |
1080 | mcp_config_update = cdns_readl(cdns, CDNS_MCP_CONFIG_UPDATE); |
1081 | if (mcp_config_update & CDNS_MCP_CONFIG_UPDATE_BIT) | |
1082 | dev_err(cdns->dev, "%s failed: MCP_CONFIG_UPDATE_BIT is not cleared\n", string); | |
1083 | ||
1084 | i = 0; | |
1085 | while (mcp_control & CDNS_MCP_CONTROL_HW_RST) { | |
1086 | if (i == reset_iterations) { | |
1087 | dev_err(cdns->dev, "%s failed: MCP_CONTROL_HW_RST is not cleared\n", string); | |
1088 | break; | |
1089 | } | |
1090 | ||
1091 | dev_dbg(cdns->dev, "%s: MCP_CONTROL_HW_RST is not cleared at iteration %d\n", string, i); | |
1092 | i++; | |
1093 | ||
1094 | usleep_range(1000, 1500); | |
1095 | mcp_control = cdns_readl(cdns, CDNS_MCP_CONTROL); | |
1096 | } | |
1097 | ||
1098 | } | |
1099 | EXPORT_SYMBOL(sdw_cdns_check_self_clearing_bits); | |
1100 | ||
2f52a517 VK |
1101 | /* |
1102 | * init routines | |
1103 | */ | |
49ea07d3 PLB |
1104 | |
1105 | /** | |
1106 | * sdw_cdns_exit_reset() - Program reset parameters and start bus operations | |
1107 | * @cdns: Cadence instance | |
1108 | */ | |
1109 | int sdw_cdns_exit_reset(struct sdw_cdns *cdns) | |
1110 | { | |
2564a2d4 | 1111 | /* keep reset delay unchanged to 4096 cycles */ |
49ea07d3 PLB |
1112 | |
1113 | /* use hardware generated reset */ | |
1114 | cdns_updatel(cdns, CDNS_MCP_CONTROL, | |
1115 | CDNS_MCP_CONTROL_HW_RST, | |
1116 | CDNS_MCP_CONTROL_HW_RST); | |
1117 | ||
49ea07d3 | 1118 | /* commit changes */ |
2c800e3b PLB |
1119 | cdns_updatel(cdns, CDNS_MCP_CONFIG_UPDATE, |
1120 | CDNS_MCP_CONFIG_UPDATE_BIT, | |
1121 | CDNS_MCP_CONFIG_UPDATE_BIT); | |
1122 | ||
1123 | /* don't wait here */ | |
1124 | return 0; | |
1125 | ||
49ea07d3 PLB |
1126 | } |
1127 | EXPORT_SYMBOL(sdw_cdns_exit_reset); | |
1128 | ||
af4cc917 | 1129 | /** |
b76f3fba | 1130 | * cdns_enable_slave_interrupts() - Enable SDW slave interrupts |
af4cc917 PLB |
1131 | * @cdns: Cadence instance |
1132 | * @state: boolean for true/false | |
1133 | */ | |
1134 | static void cdns_enable_slave_interrupts(struct sdw_cdns *cdns, bool state) | |
1135 | { | |
1136 | u32 mask; | |
1137 | ||
1138 | mask = cdns_readl(cdns, CDNS_MCP_INTMASK); | |
1139 | if (state) | |
1140 | mask |= CDNS_MCP_INT_SLAVE_MASK; | |
1141 | else | |
1142 | mask &= ~CDNS_MCP_INT_SLAVE_MASK; | |
1143 | ||
1144 | cdns_writel(cdns, CDNS_MCP_INTMASK, mask); | |
1145 | } | |
1146 | ||
49ea07d3 | 1147 | /** |
ae478d6e | 1148 | * sdw_cdns_enable_interrupt() - Enable SDW interrupts |
49ea07d3 | 1149 | * @cdns: Cadence instance |
550f9052 | 1150 | * @state: True if we are trying to enable interrupt. |
49ea07d3 | 1151 | */ |
9e3d47fb | 1152 | int sdw_cdns_enable_interrupt(struct sdw_cdns *cdns, bool state) |
956baa19 | 1153 | { |
9e3d47fb PLB |
1154 | u32 slave_intmask0 = 0; |
1155 | u32 slave_intmask1 = 0; | |
1156 | u32 mask = 0; | |
1157 | ||
1158 | if (!state) | |
1159 | goto update_masks; | |
956baa19 | 1160 | |
9e3d47fb PLB |
1161 | slave_intmask0 = CDNS_MCP_SLAVE_INTMASK0_MASK; |
1162 | slave_intmask1 = CDNS_MCP_SLAVE_INTMASK1_MASK; | |
956baa19 | 1163 | |
9b5884a0 PLB |
1164 | /* enable detection of all slave state changes */ |
1165 | mask = CDNS_MCP_INT_SLAVE_MASK; | |
1166 | ||
1167 | /* enable detection of bus issues */ | |
1168 | mask |= CDNS_MCP_INT_CTRL_CLASH | CDNS_MCP_INT_DATA_CLASH | | |
1169 | CDNS_MCP_INT_PARITY; | |
1170 | ||
9e4e6019 PLB |
1171 | /* port interrupt limited to test modes for now */ |
1172 | if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL) | |
1173 | mask |= CDNS_MCP_INT_DPINT; | |
9b5884a0 PLB |
1174 | |
1175 | /* enable detection of RX fifo level */ | |
1176 | mask |= CDNS_MCP_INT_RX_WL; | |
1177 | ||
1178 | /* | |
1179 | * CDNS_MCP_INT_IRQ needs to be set otherwise all previous | |
1180 | * settings are irrelevant | |
1181 | */ | |
1182 | mask |= CDNS_MCP_INT_IRQ; | |
956baa19 | 1183 | |
04592dce PLB |
1184 | if (interrupt_mask) /* parameter override */ |
1185 | mask = interrupt_mask; | |
956baa19 | 1186 | |
9e3d47fb | 1187 | update_masks: |
5ebb0945 RW |
1188 | /* clear slave interrupt status before enabling interrupt */ |
1189 | if (state) { | |
1190 | u32 slave_state; | |
1191 | ||
1192 | slave_state = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT0); | |
1193 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT0, slave_state); | |
1194 | slave_state = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT1); | |
1195 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT1, slave_state); | |
1196 | } | |
d2068da5 PLB |
1197 | cdns->interrupt_enabled = state; |
1198 | ||
1199 | /* | |
1200 | * Complete any on-going status updates before updating masks, | |
1201 | * and cancel queued status updates. | |
1202 | * | |
1203 | * There could be a race with a new interrupt thrown before | |
1204 | * the 3 mask updates below are complete, so in the interrupt | |
1205 | * we use the 'interrupt_enabled' status to prevent new work | |
1206 | * from being queued. | |
1207 | */ | |
1208 | if (!state) | |
1209 | cancel_work_sync(&cdns->work); | |
5ebb0945 | 1210 | |
9e3d47fb PLB |
1211 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTMASK0, slave_intmask0); |
1212 | cdns_writel(cdns, CDNS_MCP_SLAVE_INTMASK1, slave_intmask1); | |
956baa19 SK |
1213 | cdns_writel(cdns, CDNS_MCP_INTMASK, mask); |
1214 | ||
ae478d6e | 1215 | return 0; |
956baa19 SK |
1216 | } |
1217 | EXPORT_SYMBOL(sdw_cdns_enable_interrupt); | |
2f52a517 | 1218 | |
07abeff1 | 1219 | static int cdns_allocate_pdi(struct sdw_cdns *cdns, |
bbb63817 PLB |
1220 | struct sdw_cdns_pdi **stream, |
1221 | u32 num, u32 pdi_offset) | |
07abeff1 VK |
1222 | { |
1223 | struct sdw_cdns_pdi *pdi; | |
1224 | int i; | |
1225 | ||
1226 | if (!num) | |
1227 | return 0; | |
1228 | ||
1229 | pdi = devm_kcalloc(cdns->dev, num, sizeof(*pdi), GFP_KERNEL); | |
1230 | if (!pdi) | |
1231 | return -ENOMEM; | |
1232 | ||
1233 | for (i = 0; i < num; i++) { | |
1234 | pdi[i].num = i + pdi_offset; | |
07abeff1 VK |
1235 | } |
1236 | ||
1237 | *stream = pdi; | |
1238 | return 0; | |
1239 | } | |
1240 | ||
1241 | /** | |
1242 | * sdw_cdns_pdi_init() - PDI initialization routine | |
1243 | * | |
1244 | * @cdns: Cadence instance | |
1245 | * @config: Stream configurations | |
1246 | */ | |
1247 | int sdw_cdns_pdi_init(struct sdw_cdns *cdns, | |
bbb63817 | 1248 | struct sdw_cdns_stream_config config) |
07abeff1 VK |
1249 | { |
1250 | struct sdw_cdns_streams *stream; | |
57a34790 PLB |
1251 | int offset; |
1252 | int ret; | |
07abeff1 VK |
1253 | |
1254 | cdns->pcm.num_bd = config.pcm_bd; | |
1255 | cdns->pcm.num_in = config.pcm_in; | |
1256 | cdns->pcm.num_out = config.pcm_out; | |
07abeff1 VK |
1257 | |
1258 | /* Allocate PDIs for PCMs */ | |
1259 | stream = &cdns->pcm; | |
1260 | ||
807c15bc PLB |
1261 | /* we allocate PDI0 and PDI1 which are used for Bulk */ |
1262 | offset = 0; | |
07abeff1 VK |
1263 | |
1264 | ret = cdns_allocate_pdi(cdns, &stream->bd, | |
1265 | stream->num_bd, offset); | |
1266 | if (ret) | |
1267 | return ret; | |
1268 | ||
1269 | offset += stream->num_bd; | |
1270 | ||
1271 | ret = cdns_allocate_pdi(cdns, &stream->in, | |
1272 | stream->num_in, offset); | |
1273 | if (ret) | |
1274 | return ret; | |
1275 | ||
1276 | offset += stream->num_in; | |
1277 | ||
1278 | ret = cdns_allocate_pdi(cdns, &stream->out, | |
1279 | stream->num_out, offset); | |
1280 | if (ret) | |
1281 | return ret; | |
1282 | ||
1283 | /* Update total number of PCM PDIs */ | |
1284 | stream->num_pdi = stream->num_bd + stream->num_in + stream->num_out; | |
1285 | cdns->num_ports = stream->num_pdi; | |
1286 | ||
07abeff1 VK |
1287 | return 0; |
1288 | } | |
1289 | EXPORT_SYMBOL(sdw_cdns_pdi_init); | |
1290 | ||
05be59ac PLB |
1291 | static u32 cdns_set_initial_frame_shape(int n_rows, int n_cols) |
1292 | { | |
1293 | u32 val; | |
1294 | int c; | |
1295 | int r; | |
1296 | ||
1297 | r = sdw_find_row_index(n_rows); | |
3cf25d63 | 1298 | c = sdw_find_col_index(n_cols); |
05be59ac | 1299 | |
3cf25d63 VK |
1300 | val = FIELD_PREP(CDNS_MCP_FRAME_SHAPE_ROW_MASK, r); |
1301 | val |= FIELD_PREP(CDNS_MCP_FRAME_SHAPE_COL_MASK, c); | |
05be59ac PLB |
1302 | |
1303 | return val; | |
1304 | } | |
1305 | ||
0cdcdedc | 1306 | static void cdns_init_clock_ctrl(struct sdw_cdns *cdns) |
2f52a517 | 1307 | { |
3859872f PLB |
1308 | struct sdw_bus *bus = &cdns->bus; |
1309 | struct sdw_master_prop *prop = &bus->prop; | |
2f52a517 | 1310 | u32 val; |
1dd6a17f | 1311 | u32 ssp_interval; |
3859872f | 1312 | int divider; |
2f52a517 VK |
1313 | |
1314 | /* Set clock divider */ | |
3859872f | 1315 | divider = (prop->mclk_freq / prop->max_clk_freq) - 1; |
2f52a517 | 1316 | |
a50954e2 RW |
1317 | cdns_updatel(cdns, CDNS_MCP_CLK_CTRL0, |
1318 | CDNS_MCP_CLK_MCLKD_MASK, divider); | |
1319 | cdns_updatel(cdns, CDNS_MCP_CLK_CTRL1, | |
1320 | CDNS_MCP_CLK_MCLKD_MASK, divider); | |
2f52a517 | 1321 | |
05be59ac PLB |
1322 | /* |
1323 | * Frame shape changes after initialization have to be done | |
1324 | * with the bank switch mechanism | |
1325 | */ | |
1326 | val = cdns_set_initial_frame_shape(prop->default_row, | |
1327 | prop->default_col); | |
1328 | cdns_writel(cdns, CDNS_MCP_FRAME_SHAPE_INIT, val); | |
2f52a517 VK |
1329 | |
1330 | /* Set SSP interval to default value */ | |
1dd6a17f PLB |
1331 | ssp_interval = prop->default_frame_rate / SDW_CADENCE_GSYNC_HZ; |
1332 | cdns_writel(cdns, CDNS_MCP_SSP_CTRL0, ssp_interval); | |
1333 | cdns_writel(cdns, CDNS_MCP_SSP_CTRL1, ssp_interval); | |
0cdcdedc PLB |
1334 | } |
1335 | ||
1336 | /** | |
1337 | * sdw_cdns_init() - Cadence initialization | |
1338 | * @cdns: Cadence instance | |
1339 | */ | |
1340 | int sdw_cdns_init(struct sdw_cdns *cdns) | |
1341 | { | |
1342 | u32 val; | |
0cdcdedc PLB |
1343 | |
1344 | cdns_init_clock_ctrl(cdns); | |
2f52a517 | 1345 | |
ff560946 PLB |
1346 | sdw_cdns_check_self_clearing_bits(cdns, __func__, false, 0); |
1347 | ||
0d667d01 RW |
1348 | /* reset msg_count to default value of FIFOLEVEL */ |
1349 | cdns->msg_count = cdns_readl(cdns, CDNS_MCP_FIFOLEVEL); | |
1350 | ||
49ea07d3 PLB |
1351 | /* flush command FIFOs */ |
1352 | cdns_updatel(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_CMD_RST, | |
1353 | CDNS_MCP_CONTROL_CMD_RST); | |
1354 | ||
2f52a517 | 1355 | /* Set cmd accept mode */ |
4dc953bc PLB |
1356 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT, |
1357 | CDNS_IP_MCP_CONTROL_CMD_ACCEPT); | |
2f52a517 VK |
1358 | |
1359 | /* Configure mcp config */ | |
1360 | val = cdns_readl(cdns, CDNS_MCP_CONFIG); | |
1361 | ||
c5753714 PLB |
1362 | /* Disable auto bus release */ |
1363 | val &= ~CDNS_MCP_CONFIG_BUS_REL; | |
1364 | ||
1365 | cdns_writel(cdns, CDNS_MCP_CONFIG, val); | |
1366 | ||
1367 | /* Configure IP mcp config */ | |
1368 | val = cdns_ip_readl(cdns, CDNS_IP_MCP_CONFIG); | |
1369 | ||
5c8f0f68 | 1370 | /* enable bus operations with clock and data */ |
c5753714 PLB |
1371 | val &= ~CDNS_IP_MCP_CONFIG_OP; |
1372 | val |= CDNS_IP_MCP_CONFIG_OP_NORMAL; | |
5c8f0f68 | 1373 | |
b62e76cf | 1374 | /* Set cmd mode for Tx and Rx cmds */ |
c5753714 | 1375 | val &= ~CDNS_IP_MCP_CONFIG_CMD; |
2f52a517 | 1376 | |
b62e76cf | 1377 | /* Disable sniffer mode */ |
c5753714 | 1378 | val &= ~CDNS_IP_MCP_CONFIG_SNIFFER; |
2f52a517 | 1379 | |
2c800e3b PLB |
1380 | if (cdns->bus.multi_link) |
1381 | /* Set Multi-master mode to take gsync into account */ | |
c5753714 | 1382 | val |= CDNS_IP_MCP_CONFIG_MMASTER; |
2f52a517 | 1383 | |
91080111 | 1384 | /* leave frame delay to hardware default of 0x1F */ |
b62e76cf | 1385 | |
ad473db4 | 1386 | /* leave command retry to hardware default of 0 */ |
2f52a517 | 1387 | |
c5753714 | 1388 | cdns_ip_writel(cdns, CDNS_IP_MCP_CONFIG, val); |
2f52a517 | 1389 | |
b17350e4 PLB |
1390 | /* changes will be committed later */ |
1391 | return 0; | |
2f52a517 VK |
1392 | } |
1393 | EXPORT_SYMBOL(sdw_cdns_init); | |
1394 | ||
07abeff1 VK |
1395 | int cdns_bus_conf(struct sdw_bus *bus, struct sdw_bus_params *params) |
1396 | { | |
3859872f | 1397 | struct sdw_master_prop *prop = &bus->prop; |
07abeff1 | 1398 | struct sdw_cdns *cdns = bus_to_cdns(bus); |
a50954e2 | 1399 | int mcp_clkctrl_off; |
07abeff1 VK |
1400 | int divider; |
1401 | ||
1402 | if (!params->curr_dr_freq) { | |
17ed5bef | 1403 | dev_err(cdns->dev, "NULL curr_dr_freq\n"); |
07abeff1 VK |
1404 | return -EINVAL; |
1405 | } | |
1406 | ||
3859872f PLB |
1407 | divider = prop->mclk_freq * SDW_DOUBLE_RATE_FACTOR / |
1408 | params->curr_dr_freq; | |
1409 | divider--; /* divider is 1/(N+1) */ | |
07abeff1 VK |
1410 | |
1411 | if (params->next_bank) | |
1412 | mcp_clkctrl_off = CDNS_MCP_CLK_CTRL1; | |
1413 | else | |
1414 | mcp_clkctrl_off = CDNS_MCP_CLK_CTRL0; | |
1415 | ||
a50954e2 | 1416 | cdns_updatel(cdns, mcp_clkctrl_off, CDNS_MCP_CLK_MCLKD_MASK, divider); |
07abeff1 VK |
1417 | |
1418 | return 0; | |
1419 | } | |
1420 | EXPORT_SYMBOL(cdns_bus_conf); | |
1421 | ||
1422 | static int cdns_port_params(struct sdw_bus *bus, | |
bbb63817 | 1423 | struct sdw_port_params *p_params, unsigned int bank) |
07abeff1 VK |
1424 | { |
1425 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
dd81e7c3 PLB |
1426 | int dpn_config_off_source; |
1427 | int dpn_config_off_target; | |
1428 | int target_num = p_params->num; | |
1429 | int source_num = p_params->num; | |
1430 | bool override = false; | |
1431 | int dpn_config; | |
1432 | ||
1433 | if (target_num == cdns->pdi_loopback_target && | |
1434 | cdns->pdi_loopback_source != -1) { | |
1435 | source_num = cdns->pdi_loopback_source; | |
1436 | override = true; | |
1437 | } | |
07abeff1 | 1438 | |
dd81e7c3 PLB |
1439 | if (bank) { |
1440 | dpn_config_off_source = CDNS_DPN_B1_CONFIG(source_num); | |
1441 | dpn_config_off_target = CDNS_DPN_B1_CONFIG(target_num); | |
1442 | } else { | |
1443 | dpn_config_off_source = CDNS_DPN_B0_CONFIG(source_num); | |
1444 | dpn_config_off_target = CDNS_DPN_B0_CONFIG(target_num); | |
1445 | } | |
07abeff1 | 1446 | |
dd81e7c3 | 1447 | dpn_config = cdns_readl(cdns, dpn_config_off_source); |
07abeff1 | 1448 | |
dd81e7c3 PLB |
1449 | /* use port params if there is no loopback, otherwise use source as is */ |
1450 | if (!override) { | |
1451 | u32p_replace_bits(&dpn_config, p_params->bps - 1, CDNS_DPN_CONFIG_WL); | |
1452 | u32p_replace_bits(&dpn_config, p_params->flow_mode, CDNS_DPN_CONFIG_PORT_FLOW); | |
1453 | u32p_replace_bits(&dpn_config, p_params->data_mode, CDNS_DPN_CONFIG_PORT_DAT); | |
1454 | } | |
07abeff1 | 1455 | |
dd81e7c3 | 1456 | cdns_writel(cdns, dpn_config_off_target, dpn_config); |
07abeff1 VK |
1457 | |
1458 | return 0; | |
1459 | } | |
1460 | ||
1461 | static int cdns_transport_params(struct sdw_bus *bus, | |
bbb63817 PLB |
1462 | struct sdw_transport_params *t_params, |
1463 | enum sdw_reg_bank bank) | |
07abeff1 VK |
1464 | { |
1465 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
dd81e7c3 PLB |
1466 | int dpn_config; |
1467 | int dpn_config_off_source; | |
1468 | int dpn_config_off_target; | |
1469 | int dpn_hctrl; | |
1470 | int dpn_hctrl_off_source; | |
1471 | int dpn_hctrl_off_target; | |
1472 | int dpn_offsetctrl; | |
1473 | int dpn_offsetctrl_off_source; | |
1474 | int dpn_offsetctrl_off_target; | |
1475 | int dpn_samplectrl; | |
1476 | int dpn_samplectrl_off_source; | |
1477 | int dpn_samplectrl_off_target; | |
1478 | int source_num = t_params->port_num; | |
1479 | int target_num = t_params->port_num; | |
1480 | bool override = false; | |
1481 | ||
1482 | if (target_num == cdns->pdi_loopback_target && | |
1483 | cdns->pdi_loopback_source != -1) { | |
1484 | source_num = cdns->pdi_loopback_source; | |
1485 | override = true; | |
1486 | } | |
07abeff1 VK |
1487 | |
1488 | /* | |
1489 | * Note: Only full data port is supported on the Master side for | |
1490 | * both PCM and PDM ports. | |
1491 | */ | |
1492 | ||
1493 | if (bank) { | |
dd81e7c3 PLB |
1494 | dpn_config_off_source = CDNS_DPN_B1_CONFIG(source_num); |
1495 | dpn_hctrl_off_source = CDNS_DPN_B1_HCTRL(source_num); | |
1496 | dpn_offsetctrl_off_source = CDNS_DPN_B1_OFFSET_CTRL(source_num); | |
1497 | dpn_samplectrl_off_source = CDNS_DPN_B1_SAMPLE_CTRL(source_num); | |
1498 | ||
1499 | dpn_config_off_target = CDNS_DPN_B1_CONFIG(target_num); | |
1500 | dpn_hctrl_off_target = CDNS_DPN_B1_HCTRL(target_num); | |
1501 | dpn_offsetctrl_off_target = CDNS_DPN_B1_OFFSET_CTRL(target_num); | |
1502 | dpn_samplectrl_off_target = CDNS_DPN_B1_SAMPLE_CTRL(target_num); | |
1503 | ||
07abeff1 | 1504 | } else { |
dd81e7c3 PLB |
1505 | dpn_config_off_source = CDNS_DPN_B0_CONFIG(source_num); |
1506 | dpn_hctrl_off_source = CDNS_DPN_B0_HCTRL(source_num); | |
1507 | dpn_offsetctrl_off_source = CDNS_DPN_B0_OFFSET_CTRL(source_num); | |
1508 | dpn_samplectrl_off_source = CDNS_DPN_B0_SAMPLE_CTRL(source_num); | |
1509 | ||
1510 | dpn_config_off_target = CDNS_DPN_B0_CONFIG(target_num); | |
1511 | dpn_hctrl_off_target = CDNS_DPN_B0_HCTRL(target_num); | |
1512 | dpn_offsetctrl_off_target = CDNS_DPN_B0_OFFSET_CTRL(target_num); | |
1513 | dpn_samplectrl_off_target = CDNS_DPN_B0_SAMPLE_CTRL(target_num); | |
07abeff1 VK |
1514 | } |
1515 | ||
dd81e7c3 PLB |
1516 | dpn_config = cdns_readl(cdns, dpn_config_off_source); |
1517 | if (!override) { | |
1518 | u32p_replace_bits(&dpn_config, t_params->blk_grp_ctrl, CDNS_DPN_CONFIG_BGC); | |
1519 | u32p_replace_bits(&dpn_config, t_params->blk_pkg_mode, CDNS_DPN_CONFIG_BPM); | |
1520 | } | |
1521 | cdns_writel(cdns, dpn_config_off_target, dpn_config); | |
07abeff1 | 1522 | |
dd81e7c3 PLB |
1523 | if (!override) { |
1524 | dpn_offsetctrl = 0; | |
1525 | u32p_replace_bits(&dpn_offsetctrl, t_params->offset1, CDNS_DPN_OFFSET_CTRL_1); | |
1526 | u32p_replace_bits(&dpn_offsetctrl, t_params->offset2, CDNS_DPN_OFFSET_CTRL_2); | |
1527 | } else { | |
1528 | dpn_offsetctrl = cdns_readl(cdns, dpn_offsetctrl_off_source); | |
1529 | } | |
1530 | cdns_writel(cdns, dpn_offsetctrl_off_target, dpn_offsetctrl); | |
07abeff1 | 1531 | |
dd81e7c3 PLB |
1532 | if (!override) { |
1533 | dpn_hctrl = 0; | |
1534 | u32p_replace_bits(&dpn_hctrl, t_params->hstart, CDNS_DPN_HCTRL_HSTART); | |
1535 | u32p_replace_bits(&dpn_hctrl, t_params->hstop, CDNS_DPN_HCTRL_HSTOP); | |
1536 | u32p_replace_bits(&dpn_hctrl, t_params->lane_ctrl, CDNS_DPN_HCTRL_LCTRL); | |
1537 | } else { | |
1538 | dpn_hctrl = cdns_readl(cdns, dpn_hctrl_off_source); | |
1539 | } | |
1540 | cdns_writel(cdns, dpn_hctrl_off_target, dpn_hctrl); | |
07abeff1 | 1541 | |
dd81e7c3 PLB |
1542 | if (!override) |
1543 | dpn_samplectrl = t_params->sample_interval - 1; | |
1544 | else | |
1545 | dpn_samplectrl = cdns_readl(cdns, dpn_samplectrl_off_source); | |
1546 | cdns_writel(cdns, dpn_samplectrl_off_target, dpn_samplectrl); | |
07abeff1 VK |
1547 | |
1548 | return 0; | |
1549 | } | |
1550 | ||
1551 | static int cdns_port_enable(struct sdw_bus *bus, | |
bbb63817 | 1552 | struct sdw_enable_ch *enable_ch, unsigned int bank) |
07abeff1 VK |
1553 | { |
1554 | struct sdw_cdns *cdns = bus_to_cdns(bus); | |
1555 | int dpn_chnen_off, ch_mask; | |
1556 | ||
1557 | if (bank) | |
1558 | dpn_chnen_off = CDNS_DPN_B1_CH_EN(enable_ch->port_num); | |
1559 | else | |
1560 | dpn_chnen_off = CDNS_DPN_B0_CH_EN(enable_ch->port_num); | |
1561 | ||
1562 | ch_mask = enable_ch->ch_mask * enable_ch->enable; | |
1563 | cdns_writel(cdns, dpn_chnen_off, ch_mask); | |
1564 | ||
1565 | return 0; | |
1566 | } | |
1567 | ||
1568 | static const struct sdw_master_port_ops cdns_port_ops = { | |
1569 | .dpn_set_port_params = cdns_port_params, | |
1570 | .dpn_set_port_transport_params = cdns_transport_params, | |
1571 | .dpn_port_enable_ch = cdns_port_enable, | |
1572 | }; | |
1573 | ||
5a885c52 RW |
1574 | /** |
1575 | * sdw_cdns_is_clock_stop: Check clock status | |
1576 | * | |
1577 | * @cdns: Cadence instance | |
1578 | */ | |
1579 | bool sdw_cdns_is_clock_stop(struct sdw_cdns *cdns) | |
1580 | { | |
1581 | return !!(cdns_readl(cdns, CDNS_MCP_STAT) & CDNS_MCP_STAT_CLK_STOP); | |
1582 | } | |
1583 | EXPORT_SYMBOL(sdw_cdns_is_clock_stop); | |
1584 | ||
1032504f RW |
1585 | /** |
1586 | * sdw_cdns_clock_stop: Cadence clock stop configuration routine | |
1587 | * | |
1588 | * @cdns: Cadence instance | |
1589 | * @block_wake: prevent wakes if required by the platform | |
1590 | */ | |
1591 | int sdw_cdns_clock_stop(struct sdw_cdns *cdns, bool block_wake) | |
1592 | { | |
1593 | bool slave_present = false; | |
1594 | struct sdw_slave *slave; | |
1595 | int ret; | |
1596 | ||
ff560946 PLB |
1597 | sdw_cdns_check_self_clearing_bits(cdns, __func__, false, 0); |
1598 | ||
1032504f RW |
1599 | /* Check suspend status */ |
1600 | if (sdw_cdns_is_clock_stop(cdns)) { | |
1601 | dev_dbg(cdns->dev, "Clock is already stopped\n"); | |
1602 | return 0; | |
1603 | } | |
1604 | ||
af4cc917 PLB |
1605 | /* |
1606 | * Before entering clock stop we mask the Slave | |
1607 | * interrupts. This helps avoid having to deal with e.g. a | |
1608 | * Slave becoming UNATTACHED while the clock is being stopped | |
1609 | */ | |
1610 | cdns_enable_slave_interrupts(cdns, false); | |
1611 | ||
1032504f RW |
1612 | /* |
1613 | * For specific platforms, it is required to be able to put | |
1614 | * master into a state in which it ignores wake-up trials | |
1615 | * in clock stop state | |
1616 | */ | |
1617 | if (block_wake) | |
4dc953bc PLB |
1618 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, |
1619 | CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP, | |
1620 | CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP); | |
1032504f RW |
1621 | |
1622 | list_for_each_entry(slave, &cdns->bus.slaves, node) { | |
1623 | if (slave->status == SDW_SLAVE_ATTACHED || | |
1624 | slave->status == SDW_SLAVE_ALERT) { | |
1625 | slave_present = true; | |
1626 | break; | |
1627 | } | |
1628 | } | |
1629 | ||
1032504f RW |
1630 | /* commit changes */ |
1631 | ret = cdns_config_update(cdns); | |
1632 | if (ret < 0) { | |
1633 | dev_err(cdns->dev, "%s: config_update failed\n", __func__); | |
1634 | return ret; | |
1635 | } | |
1636 | ||
1637 | /* Prepare slaves for clock stop */ | |
58ef9356 PLB |
1638 | if (slave_present) { |
1639 | ret = sdw_bus_prep_clk_stop(&cdns->bus); | |
1640 | if (ret < 0 && ret != -ENODATA) { | |
1641 | dev_err(cdns->dev, "prepare clock stop failed %d\n", ret); | |
1642 | return ret; | |
1643 | } | |
1032504f RW |
1644 | } |
1645 | ||
1646 | /* | |
1647 | * Enter clock stop mode and only report errors if there are | |
1648 | * Slave devices present (ALERT or ATTACHED) | |
1649 | */ | |
1650 | ret = sdw_bus_clk_stop(&cdns->bus); | |
1651 | if (ret < 0 && slave_present && ret != -ENODATA) { | |
7dbdcd61 | 1652 | dev_err(cdns->dev, "bus clock stop failed %d\n", ret); |
1032504f RW |
1653 | return ret; |
1654 | } | |
1655 | ||
1656 | ret = cdns_set_wait(cdns, CDNS_MCP_STAT, | |
1657 | CDNS_MCP_STAT_CLK_STOP, | |
1658 | CDNS_MCP_STAT_CLK_STOP); | |
1659 | if (ret < 0) | |
1660 | dev_err(cdns->dev, "Clock stop failed %d\n", ret); | |
1661 | ||
1662 | return ret; | |
1663 | } | |
1664 | EXPORT_SYMBOL(sdw_cdns_clock_stop); | |
1665 | ||
1666 | /** | |
1667 | * sdw_cdns_clock_restart: Cadence PM clock restart configuration routine | |
1668 | * | |
1669 | * @cdns: Cadence instance | |
1670 | * @bus_reset: context may be lost while in low power modes and the bus | |
1671 | * may require a Severe Reset and re-enumeration after a wake. | |
1672 | */ | |
1673 | int sdw_cdns_clock_restart(struct sdw_cdns *cdns, bool bus_reset) | |
1674 | { | |
1675 | int ret; | |
1676 | ||
af4cc917 PLB |
1677 | /* unmask Slave interrupts that were masked when stopping the clock */ |
1678 | cdns_enable_slave_interrupts(cdns, true); | |
1679 | ||
1032504f RW |
1680 | ret = cdns_clear_bit(cdns, CDNS_MCP_CONTROL, |
1681 | CDNS_MCP_CONTROL_CLK_STOP_CLR); | |
1682 | if (ret < 0) { | |
1683 | dev_err(cdns->dev, "Couldn't exit from clock stop\n"); | |
1684 | return ret; | |
1685 | } | |
1686 | ||
1687 | ret = cdns_set_wait(cdns, CDNS_MCP_STAT, CDNS_MCP_STAT_CLK_STOP, 0); | |
1688 | if (ret < 0) { | |
1689 | dev_err(cdns->dev, "clock stop exit failed %d\n", ret); | |
1690 | return ret; | |
1691 | } | |
1692 | ||
4dc953bc PLB |
1693 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, |
1694 | CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP, 0); | |
1032504f | 1695 | |
4dc953bc PLB |
1696 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT, |
1697 | CDNS_IP_MCP_CONTROL_CMD_ACCEPT); | |
1032504f RW |
1698 | |
1699 | if (!bus_reset) { | |
1700 | ||
1701 | /* enable bus operations with clock and data */ | |
c5753714 PLB |
1702 | cdns_ip_updatel(cdns, CDNS_IP_MCP_CONFIG, |
1703 | CDNS_IP_MCP_CONFIG_OP, | |
1704 | CDNS_IP_MCP_CONFIG_OP_NORMAL); | |
1032504f RW |
1705 | |
1706 | ret = cdns_config_update(cdns); | |
1707 | if (ret < 0) { | |
1708 | dev_err(cdns->dev, "%s: config_update failed\n", __func__); | |
1709 | return ret; | |
1710 | } | |
1711 | ||
1712 | ret = sdw_bus_exit_clk_stop(&cdns->bus); | |
1713 | if (ret < 0) | |
1714 | dev_err(cdns->dev, "bus failed to exit clock stop %d\n", ret); | |
1715 | } | |
1716 | ||
1717 | return ret; | |
1718 | } | |
1719 | EXPORT_SYMBOL(sdw_cdns_clock_restart); | |
1720 | ||
956baa19 SK |
1721 | /** |
1722 | * sdw_cdns_probe() - Cadence probe routine | |
1723 | * @cdns: Cadence instance | |
1724 | */ | |
1725 | int sdw_cdns_probe(struct sdw_cdns *cdns) | |
1726 | { | |
1727 | init_completion(&cdns->tx_complete); | |
07abeff1 | 1728 | cdns->bus.port_ops = &cdns_port_ops; |
956baa19 | 1729 | |
4a98a6b2 | 1730 | INIT_WORK(&cdns->work, cdns_update_slave_status_work); |
956baa19 SK |
1731 | return 0; |
1732 | } | |
1733 | EXPORT_SYMBOL(sdw_cdns_probe); | |
1734 | ||
5d6b3c8b | 1735 | int cdns_set_sdw_stream(struct snd_soc_dai *dai, |
63a6aa96 | 1736 | void *stream, int direction) |
5d6b3c8b VK |
1737 | { |
1738 | struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai); | |
e0767e39 | 1739 | struct sdw_cdns_dai_runtime *dai_runtime; |
5d6b3c8b | 1740 | |
7dddead7 PLB |
1741 | dai_runtime = cdns->dai_runtime_array[dai->id]; |
1742 | ||
b5e9e687 PLB |
1743 | if (stream) { |
1744 | /* first paranoia check */ | |
e0767e39 | 1745 | if (dai_runtime) { |
b5e9e687 | 1746 | dev_err(dai->dev, |
e0767e39 | 1747 | "dai_runtime already allocated for dai %s\n", |
b5e9e687 PLB |
1748 | dai->name); |
1749 | return -EINVAL; | |
1750 | } | |
5d6b3c8b | 1751 | |
e0767e39 PLB |
1752 | /* allocate and set dai_runtime info */ |
1753 | dai_runtime = kzalloc(sizeof(*dai_runtime), GFP_KERNEL); | |
1754 | if (!dai_runtime) | |
b5e9e687 | 1755 | return -ENOMEM; |
5d6b3c8b | 1756 | |
e0767e39 | 1757 | dai_runtime->stream_type = SDW_STREAM_PCM; |
5d6b3c8b | 1758 | |
e0767e39 PLB |
1759 | dai_runtime->bus = &cdns->bus; |
1760 | dai_runtime->link_id = cdns->instance; | |
5d6b3c8b | 1761 | |
e0767e39 | 1762 | dai_runtime->stream = stream; |
7dddead7 | 1763 | dai_runtime->direction = direction; |
5d6b3c8b | 1764 | |
7dddead7 | 1765 | cdns->dai_runtime_array[dai->id] = dai_runtime; |
b5e9e687 | 1766 | } else { |
7dddead7 PLB |
1767 | /* second paranoia check */ |
1768 | if (!dai_runtime) { | |
1769 | dev_err(dai->dev, | |
1770 | "dai_runtime not allocated for dai %s\n", | |
1771 | dai->name); | |
1772 | return -EINVAL; | |
b5e9e687 | 1773 | } |
7dddead7 PLB |
1774 | |
1775 | /* for NULL stream we release allocated dai_runtime */ | |
1776 | kfree(dai_runtime); | |
1777 | cdns->dai_runtime_array[dai->id] = NULL; | |
b5e9e687 | 1778 | } |
5d6b3c8b VK |
1779 | return 0; |
1780 | } | |
1781 | EXPORT_SYMBOL(cdns_set_sdw_stream); | |
1782 | ||
1783 | /** | |
1784 | * cdns_find_pdi() - Find a free PDI | |
1785 | * | |
1786 | * @cdns: Cadence instance | |
39737a31 | 1787 | * @offset: Starting offset |
5d6b3c8b VK |
1788 | * @num: Number of PDIs |
1789 | * @pdi: PDI instances | |
39737a31 | 1790 | * @dai_id: DAI id |
5d6b3c8b | 1791 | * |
1b53385e BL |
1792 | * Find a PDI for a given PDI array. The PDI num and dai_id are |
1793 | * expected to match, return NULL otherwise. | |
5d6b3c8b VK |
1794 | */ |
1795 | static struct sdw_cdns_pdi *cdns_find_pdi(struct sdw_cdns *cdns, | |
807c15bc | 1796 | unsigned int offset, |
bbb63817 | 1797 | unsigned int num, |
1b53385e BL |
1798 | struct sdw_cdns_pdi *pdi, |
1799 | int dai_id) | |
5d6b3c8b VK |
1800 | { |
1801 | int i; | |
1802 | ||
1b53385e BL |
1803 | for (i = offset; i < offset + num; i++) |
1804 | if (pdi[i].num == dai_id) | |
1805 | return &pdi[i]; | |
5d6b3c8b VK |
1806 | |
1807 | return NULL; | |
1808 | } | |
1809 | ||
1810 | /** | |
1811 | * sdw_cdns_config_stream: Configure a stream | |
1812 | * | |
1813 | * @cdns: Cadence instance | |
5d6b3c8b VK |
1814 | * @ch: Channel count |
1815 | * @dir: Data direction | |
1816 | * @pdi: PDI to be used | |
1817 | */ | |
1818 | void sdw_cdns_config_stream(struct sdw_cdns *cdns, | |
bbb63817 | 1819 | u32 ch, u32 dir, struct sdw_cdns_pdi *pdi) |
5d6b3c8b VK |
1820 | { |
1821 | u32 offset, val = 0; | |
1822 | ||
9e4e6019 | 1823 | if (dir == SDW_DATA_DIR_RX) { |
5d6b3c8b VK |
1824 | val = CDNS_PORTCTRL_DIRN; |
1825 | ||
9e4e6019 PLB |
1826 | if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL) |
1827 | val |= CDNS_PORTCTRL_TEST_FAILED; | |
1828 | } | |
57a34790 | 1829 | offset = CDNS_PORTCTRL + pdi->num * CDNS_PORT_OFFSET; |
9e4e6019 PLB |
1830 | cdns_updatel(cdns, offset, |
1831 | CDNS_PORTCTRL_DIRN | CDNS_PORTCTRL_TEST_FAILED, | |
1832 | val); | |
5d6b3c8b | 1833 | |
57a34790 | 1834 | val = pdi->num; |
b468a785 | 1835 | val |= CDNS_PDI_CONFIG_SOFT_RESET; |
3cf25d63 | 1836 | val |= FIELD_PREP(CDNS_PDI_CONFIG_CHANNEL, (1 << ch) - 1); |
5d6b3c8b VK |
1837 | cdns_writel(cdns, CDNS_PDI_CONFIG(pdi->num), val); |
1838 | } | |
1839 | EXPORT_SYMBOL(sdw_cdns_config_stream); | |
1840 | ||
1841 | /** | |
57a34790 | 1842 | * sdw_cdns_alloc_pdi() - Allocate a PDI |
5d6b3c8b VK |
1843 | * |
1844 | * @cdns: Cadence instance | |
1845 | * @stream: Stream to be allocated | |
5d6b3c8b VK |
1846 | * @ch: Channel count |
1847 | * @dir: Data direction | |
39737a31 | 1848 | * @dai_id: DAI id |
5d6b3c8b | 1849 | */ |
57a34790 PLB |
1850 | struct sdw_cdns_pdi *sdw_cdns_alloc_pdi(struct sdw_cdns *cdns, |
1851 | struct sdw_cdns_streams *stream, | |
1b53385e | 1852 | u32 ch, u32 dir, int dai_id) |
5d6b3c8b VK |
1853 | { |
1854 | struct sdw_cdns_pdi *pdi = NULL; | |
1855 | ||
1856 | if (dir == SDW_DATA_DIR_RX) | |
1b53385e BL |
1857 | pdi = cdns_find_pdi(cdns, 0, stream->num_in, stream->in, |
1858 | dai_id); | |
5d6b3c8b | 1859 | else |
1b53385e BL |
1860 | pdi = cdns_find_pdi(cdns, 0, stream->num_out, stream->out, |
1861 | dai_id); | |
5d6b3c8b VK |
1862 | |
1863 | /* check if we found a PDI, else find in bi-directional */ | |
1864 | if (!pdi) | |
1b53385e BL |
1865 | pdi = cdns_find_pdi(cdns, 2, stream->num_bd, stream->bd, |
1866 | dai_id); | |
5d6b3c8b | 1867 | |
57a34790 PLB |
1868 | if (pdi) { |
1869 | pdi->l_ch_num = 0; | |
1870 | pdi->h_ch_num = ch - 1; | |
1871 | pdi->dir = dir; | |
1872 | pdi->ch_count = ch; | |
1873 | } | |
5d6b3c8b | 1874 | |
57a34790 | 1875 | return pdi; |
5d6b3c8b | 1876 | } |
57a34790 | 1877 | EXPORT_SYMBOL(sdw_cdns_alloc_pdi); |
5d6b3c8b | 1878 | |
2f52a517 VK |
1879 | MODULE_LICENSE("Dual BSD/GPL"); |
1880 | MODULE_DESCRIPTION("Cadence Soundwire Library"); |