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7c3cd189 VK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-17 Intel Corporation. | |
3 | ||
4 | #include <linux/acpi.h> | |
0231453b | 5 | #include <linux/delay.h> |
7c3cd189 | 6 | #include <linux/mod_devicetable.h> |
9d715fa0 VK |
7 | #include <linux/pm_runtime.h> |
8 | #include <linux/soundwire/sdw_registers.h> | |
7c3cd189 | 9 | #include <linux/soundwire/sdw.h> |
bd29c00e | 10 | #include <linux/soundwire/sdw_type.h> |
836c8a2e | 11 | #include <linux/string_choices.h> |
7c3cd189 | 12 | #include "bus.h" |
3b6c4a11 | 13 | #include "irq.h" |
bcac5902 | 14 | #include "sysfs_local.h" |
7c3cd189 | 15 | |
88de0a8f | 16 | static DEFINE_IDA(sdw_bus_ida); |
dbb50c7a BL |
17 | |
18 | static int sdw_get_id(struct sdw_bus *bus) | |
19 | { | |
88de0a8f | 20 | int rc = ida_alloc(&sdw_bus_ida, GFP_KERNEL); |
dbb50c7a BL |
21 | |
22 | if (rc < 0) | |
23 | return rc; | |
24 | ||
25 | bus->id = rc; | |
6543ac13 PLB |
26 | |
27 | if (bus->controller_id == -1) | |
28 | bus->controller_id = rc; | |
29 | ||
dbb50c7a BL |
30 | return 0; |
31 | } | |
32 | ||
7c3cd189 | 33 | /** |
5cab3ff2 | 34 | * sdw_bus_master_add() - add a bus Master instance |
7c3cd189 | 35 | * @bus: bus instance |
5cab3ff2 PLB |
36 | * @parent: parent device |
37 | * @fwnode: firmware node handle | |
7c3cd189 VK |
38 | * |
39 | * Initializes the bus instance, read properties and create child | |
40 | * devices. | |
41 | */ | |
5cab3ff2 PLB |
42 | int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, |
43 | struct fwnode_handle *fwnode) | |
7c3cd189 | 44 | { |
5c3eb9f7 | 45 | struct sdw_master_prop *prop = NULL; |
7c3cd189 VK |
46 | int ret; |
47 | ||
7ceaa40b PLB |
48 | if (!parent) { |
49 | pr_err("SoundWire parent device is not set\n"); | |
7c3cd189 VK |
50 | return -ENODEV; |
51 | } | |
52 | ||
dbb50c7a | 53 | ret = sdw_get_id(bus); |
a5759f19 | 54 | if (ret < 0) { |
7ceaa40b PLB |
55 | dev_err(parent, "Failed to get bus id\n"); |
56 | return ret; | |
57 | } | |
58 | ||
aab12022 CK |
59 | ida_init(&bus->slave_ida); |
60 | ||
7ceaa40b | 61 | ret = sdw_master_device_add(bus, parent, fwnode); |
a5759f19 | 62 | if (ret < 0) { |
7ceaa40b PLB |
63 | dev_err(parent, "Failed to add master device at link %d\n", |
64 | bus->link_id); | |
dbb50c7a BL |
65 | return ret; |
66 | } | |
67 | ||
9d715fa0 | 68 | if (!bus->ops) { |
17ed5bef | 69 | dev_err(bus->dev, "SoundWire Bus ops are not set\n"); |
9d715fa0 VK |
70 | return -EINVAL; |
71 | } | |
72 | ||
9026118f BL |
73 | if (!bus->compute_params) { |
74 | dev_err(bus->dev, | |
75 | "Bandwidth allocation not configured, compute_params no set\n"); | |
76 | return -EINVAL; | |
77 | } | |
78 | ||
256a9978 RF |
79 | /* |
80 | * Give each bus_lock and msg_lock a unique key so that lockdep won't | |
81 | * trigger a deadlock warning when the locks of several buses are | |
82 | * grabbed during configuration of a multi-bus stream. | |
83 | */ | |
84 | lockdep_register_key(&bus->msg_lock_key); | |
85 | __mutex_init(&bus->msg_lock, "msg_lock", &bus->msg_lock_key); | |
86 | ||
87 | lockdep_register_key(&bus->bus_lock_key); | |
88 | __mutex_init(&bus->bus_lock, "bus_lock", &bus->bus_lock_key); | |
89 | ||
7c3cd189 | 90 | INIT_LIST_HEAD(&bus->slaves); |
89e59053 | 91 | INIT_LIST_HEAD(&bus->m_rt_list); |
7c3cd189 | 92 | |
ce6e74d0 SN |
93 | /* |
94 | * Initialize multi_link flag | |
ce6e74d0 SN |
95 | */ |
96 | bus->multi_link = false; | |
56d4fe31 VK |
97 | if (bus->ops->read_prop) { |
98 | ret = bus->ops->read_prop(bus); | |
99 | if (ret < 0) { | |
62f0cec3 VK |
100 | dev_err(bus->dev, |
101 | "Bus read properties failed:%d\n", ret); | |
56d4fe31 VK |
102 | return ret; |
103 | } | |
104 | } | |
105 | ||
bf03473d PLB |
106 | sdw_bus_debugfs_init(bus); |
107 | ||
7c3cd189 | 108 | /* |
21c2de29 | 109 | * Device numbers in SoundWire are 0 through 15. Enumeration device |
7c3cd189 VK |
110 | * number (0), Broadcast device number (15), Group numbers (12 and |
111 | * 13) and Master device number (14) are not used for assignment so | |
112 | * mask these and other higher bits. | |
113 | */ | |
114 | ||
115 | /* Set higher order bits */ | |
116 | *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); | |
117 | ||
a54dc8c6 | 118 | /* Set enumeration device number and broadcast device number */ |
7c3cd189 VK |
119 | set_bit(SDW_ENUM_DEV_NUM, bus->assigned); |
120 | set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); | |
121 | ||
122 | /* Set group device numbers and master device number */ | |
123 | set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); | |
124 | set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); | |
125 | set_bit(SDW_MASTER_DEV_NUM, bus->assigned); | |
126 | ||
fd15594b CK |
127 | ret = sdw_irq_create(bus, fwnode); |
128 | if (ret) | |
129 | return ret; | |
130 | ||
7c3cd189 VK |
131 | /* |
132 | * SDW is an enumerable bus, but devices can be powered off. So, | |
133 | * they won't be able to report as present. | |
134 | * | |
135 | * Create Slave devices based on Slaves described in | |
136 | * the respective firmware (ACPI/DT) | |
137 | */ | |
138 | if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) | |
139 | ret = sdw_acpi_find_slaves(bus); | |
a2e48458 SK |
140 | else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) |
141 | ret = sdw_of_find_slaves(bus); | |
7c3cd189 VK |
142 | else |
143 | ret = -ENOTSUPP; /* No ACPI/DT so error out */ | |
144 | ||
a5759f19 | 145 | if (ret < 0) { |
7c3cd189 | 146 | dev_err(bus->dev, "Finding slaves failed:%d\n", ret); |
fd15594b | 147 | sdw_irq_delete(bus); |
7c3cd189 VK |
148 | return ret; |
149 | } | |
150 | ||
99b8a5d6 | 151 | /* |
5c3eb9f7 | 152 | * Initialize clock values based on Master properties. The max |
3424305b | 153 | * frequency is read from max_clk_freq property. Current assumption |
5c3eb9f7 SK |
154 | * is that the bus will start at highest clock frequency when |
155 | * powered on. | |
156 | * | |
99b8a5d6 SK |
157 | * Default active bank will be 0 as out of reset the Slaves have |
158 | * to start with bank 0 (Table 40 of Spec) | |
159 | */ | |
5c3eb9f7 | 160 | prop = &bus->prop; |
3424305b | 161 | bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; |
5c3eb9f7 | 162 | bus->params.curr_dr_freq = bus->params.max_dr_freq; |
99b8a5d6 SK |
163 | bus->params.curr_bank = SDW_BANK0; |
164 | bus->params.next_bank = SDW_BANK1; | |
165 | ||
7c3cd189 VK |
166 | return 0; |
167 | } | |
5cab3ff2 | 168 | EXPORT_SYMBOL(sdw_bus_master_add); |
7c3cd189 VK |
169 | |
170 | static int sdw_delete_slave(struct device *dev, void *data) | |
171 | { | |
172 | struct sdw_slave *slave = dev_to_sdw_dev(dev); | |
173 | struct sdw_bus *bus = slave->bus; | |
174 | ||
dff70572 PLB |
175 | pm_runtime_disable(dev); |
176 | ||
bf03473d PLB |
177 | sdw_slave_debugfs_exit(slave); |
178 | ||
7c3cd189 VK |
179 | mutex_lock(&bus->bus_lock); |
180 | ||
c6056101 | 181 | if (slave->dev_num) { /* clear dev_num if assigned */ |
7c3cd189 | 182 | clear_bit(slave->dev_num, bus->assigned); |
39d80b0e PLB |
183 | if (bus->ops && bus->ops->put_device_num) |
184 | bus->ops->put_device_num(bus, slave); | |
c6056101 | 185 | } |
7c3cd189 VK |
186 | list_del_init(&slave->node); |
187 | mutex_unlock(&bus->bus_lock); | |
188 | ||
189 | device_unregister(dev); | |
190 | return 0; | |
191 | } | |
192 | ||
193 | /** | |
5cab3ff2 | 194 | * sdw_bus_master_delete() - delete the bus master instance |
7c3cd189 VK |
195 | * @bus: bus to be deleted |
196 | * | |
197 | * Remove the instance, delete the child devices. | |
198 | */ | |
5cab3ff2 | 199 | void sdw_bus_master_delete(struct sdw_bus *bus) |
7c3cd189 VK |
200 | { |
201 | device_for_each_child(bus->dev, NULL, sdw_delete_slave); | |
12a95123 | 202 | |
3b6c4a11 | 203 | sdw_irq_delete(bus); |
12a95123 | 204 | |
7ceaa40b | 205 | sdw_master_device_del(bus); |
bf03473d PLB |
206 | |
207 | sdw_bus_debugfs_exit(bus); | |
256a9978 RF |
208 | lockdep_unregister_key(&bus->bus_lock_key); |
209 | lockdep_unregister_key(&bus->msg_lock_key); | |
88de0a8f | 210 | ida_free(&sdw_bus_ida, bus->id); |
7c3cd189 | 211 | } |
5cab3ff2 | 212 | EXPORT_SYMBOL(sdw_bus_master_delete); |
7c3cd189 | 213 | |
9d715fa0 VK |
214 | /* |
215 | * SDW IO Calls | |
216 | */ | |
217 | ||
218 | static inline int find_response_code(enum sdw_command_response resp) | |
219 | { | |
220 | switch (resp) { | |
221 | case SDW_CMD_OK: | |
222 | return 0; | |
223 | ||
224 | case SDW_CMD_IGNORED: | |
225 | return -ENODATA; | |
226 | ||
227 | case SDW_CMD_TIMEOUT: | |
228 | return -ETIMEDOUT; | |
229 | ||
230 | default: | |
231 | return -EIO; | |
232 | } | |
233 | } | |
234 | ||
235 | static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
236 | { | |
237 | int retry = bus->prop.err_threshold; | |
238 | enum sdw_command_response resp; | |
239 | int ret = 0, i; | |
240 | ||
241 | for (i = 0; i <= retry; i++) { | |
242 | resp = bus->ops->xfer_msg(bus, msg); | |
243 | ret = find_response_code(resp); | |
244 | ||
245 | /* if cmd is ok or ignored return */ | |
246 | if (ret == 0 || ret == -ENODATA) | |
247 | return ret; | |
248 | } | |
249 | ||
250 | return ret; | |
251 | } | |
252 | ||
253 | static inline int do_transfer_defer(struct sdw_bus *bus, | |
45cb70f9 | 254 | struct sdw_msg *msg) |
9d715fa0 | 255 | { |
45cb70f9 | 256 | struct sdw_defer *defer = &bus->defer_msg; |
9d715fa0 VK |
257 | int retry = bus->prop.err_threshold; |
258 | enum sdw_command_response resp; | |
259 | int ret = 0, i; | |
260 | ||
261 | defer->msg = msg; | |
262 | defer->length = msg->len; | |
a306a0e4 | 263 | init_completion(&defer->complete); |
9d715fa0 VK |
264 | |
265 | for (i = 0; i <= retry; i++) { | |
66f95de7 | 266 | resp = bus->ops->xfer_msg_defer(bus); |
9d715fa0 VK |
267 | ret = find_response_code(resp); |
268 | /* if cmd is ok or ignored return */ | |
269 | if (ret == 0 || ret == -ENODATA) | |
270 | return ret; | |
271 | } | |
272 | ||
273 | return ret; | |
274 | } | |
275 | ||
a350aff4 PLB |
276 | static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) |
277 | { | |
278 | int ret; | |
279 | ||
280 | ret = do_transfer(bus, msg); | |
281 | if (ret != 0 && ret != -ENODATA) | |
ec475187 BL |
282 | dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", |
283 | msg->dev_num, ret, | |
836c8a2e | 284 | str_write_read(msg->flags & SDW_MSG_FLAG_WRITE), |
ec475187 | 285 | msg->addr, msg->len); |
a350aff4 | 286 | |
a350aff4 PLB |
287 | return ret; |
288 | } | |
289 | ||
9d715fa0 VK |
290 | /** |
291 | * sdw_transfer() - Synchronous transfer message to a SDW Slave device | |
292 | * @bus: SDW bus | |
293 | * @msg: SDW message to be xfered | |
294 | */ | |
295 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
296 | { | |
297 | int ret; | |
298 | ||
299 | mutex_lock(&bus->msg_lock); | |
300 | ||
a350aff4 | 301 | ret = sdw_transfer_unlocked(bus, msg); |
9d715fa0 VK |
302 | |
303 | mutex_unlock(&bus->msg_lock); | |
304 | ||
305 | return ret; | |
306 | } | |
307 | ||
79fe02cb PLB |
308 | /** |
309 | * sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers | |
310 | * @bus: SDW bus | |
311 | * @sync_delay: Delay before reading status | |
312 | */ | |
313 | void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay) | |
314 | { | |
315 | u32 status; | |
316 | ||
317 | if (!bus->ops->read_ping_status) | |
318 | return; | |
319 | ||
320 | /* | |
321 | * wait for peripheral to sync if desired. 10-15ms should be more than | |
322 | * enough in most cases. | |
323 | */ | |
324 | if (sync_delay) | |
325 | usleep_range(10000, 15000); | |
326 | ||
327 | mutex_lock(&bus->msg_lock); | |
328 | ||
329 | status = bus->ops->read_ping_status(bus); | |
330 | ||
331 | mutex_unlock(&bus->msg_lock); | |
332 | ||
333 | if (!status) | |
334 | dev_warn(bus->dev, "%s: no peripherals attached\n", __func__); | |
335 | else | |
336 | dev_dbg(bus->dev, "PING status: %#x\n", status); | |
337 | } | |
338 | EXPORT_SYMBOL(sdw_show_ping_status); | |
339 | ||
9d715fa0 VK |
340 | /** |
341 | * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device | |
342 | * @bus: SDW bus | |
343 | * @msg: SDW message to be xfered | |
9d715fa0 VK |
344 | * |
345 | * Caller needs to hold the msg_lock lock while calling this | |
346 | */ | |
45cb70f9 | 347 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg) |
9d715fa0 VK |
348 | { |
349 | int ret; | |
350 | ||
351 | if (!bus->ops->xfer_msg_defer) | |
352 | return -ENOTSUPP; | |
353 | ||
45cb70f9 | 354 | ret = do_transfer_defer(bus, msg); |
9d715fa0 VK |
355 | if (ret != 0 && ret != -ENODATA) |
356 | dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", | |
73ede046 | 357 | msg->dev_num, ret); |
9d715fa0 | 358 | |
9d715fa0 VK |
359 | return ret; |
360 | } | |
361 | ||
9d715fa0 | 362 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
73ede046 | 363 | u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) |
9d715fa0 VK |
364 | { |
365 | memset(msg, 0, sizeof(*msg)); | |
366 | msg->addr = addr; /* addr is 16 bit and truncated here */ | |
367 | msg->len = count; | |
368 | msg->dev_num = dev_num; | |
369 | msg->flags = flags; | |
370 | msg->buf = buf; | |
9d715fa0 | 371 | |
f779ad09 | 372 | if (addr < SDW_REG_NO_PAGE) /* no paging area */ |
9d715fa0 | 373 | return 0; |
f779ad09 GL |
374 | |
375 | if (addr >= SDW_REG_MAX) { /* illegal addr */ | |
9d715fa0 VK |
376 | pr_err("SDW: Invalid address %x passed\n", addr); |
377 | return -EINVAL; | |
378 | } | |
379 | ||
380 | if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ | |
381 | if (slave && !slave->prop.paging_support) | |
382 | return 0; | |
21c2de29 | 383 | /* no need for else as that will fall-through to paging */ |
9d715fa0 VK |
384 | } |
385 | ||
386 | /* paging mandatory */ | |
387 | if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { | |
388 | pr_err("SDW: Invalid device for paging :%d\n", dev_num); | |
389 | return -EINVAL; | |
390 | } | |
391 | ||
392 | if (!slave) { | |
393 | pr_err("SDW: No slave for paging addr\n"); | |
394 | return -EINVAL; | |
f779ad09 GL |
395 | } |
396 | ||
397 | if (!slave->prop.paging_support) { | |
9d715fa0 | 398 | dev_err(&slave->dev, |
17ed5bef | 399 | "address %x needs paging but no support\n", addr); |
9d715fa0 VK |
400 | return -EINVAL; |
401 | } | |
402 | ||
d5826a4b VK |
403 | msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); |
404 | msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); | |
9d715fa0 VK |
405 | msg->addr |= BIT(15); |
406 | msg->page = true; | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
60ee9be2 PLB |
411 | /* |
412 | * Read/Write IO functions. | |
60ee9be2 PLB |
413 | */ |
414 | ||
d005ea71 CK |
415 | static int sdw_ntransfer_no_pm(struct sdw_slave *slave, u32 addr, u8 flags, |
416 | size_t count, u8 *val) | |
417 | { | |
418 | struct sdw_msg msg; | |
419 | size_t size; | |
420 | int ret; | |
421 | ||
422 | while (count) { | |
423 | // Only handle bytes up to next page boundary | |
424 | size = min_t(size_t, count, (SDW_REGADDR + 1) - (addr & SDW_REGADDR)); | |
425 | ||
426 | ret = sdw_fill_msg(&msg, slave, addr, size, slave->dev_num, flags, val); | |
427 | if (ret < 0) | |
428 | return ret; | |
429 | ||
430 | ret = sdw_transfer(slave->bus, &msg); | |
431 | if (ret < 0 && !slave->is_mockup_device) | |
432 | return ret; | |
433 | ||
434 | addr += size; | |
435 | val += size; | |
436 | count -= size; | |
437 | } | |
438 | ||
439 | return 0; | |
440 | } | |
441 | ||
d94e1e01 CK |
442 | /** |
443 | * sdw_nread_no_pm() - Read "n" contiguous SDW Slave registers with no PM | |
444 | * @slave: SDW Slave | |
445 | * @addr: Register address | |
446 | * @count: length | |
447 | * @val: Buffer for values to be read | |
d005ea71 CK |
448 | * |
449 | * Note that if the message crosses a page boundary each page will be | |
450 | * transferred under a separate invocation of the msg_lock. | |
d94e1e01 | 451 | */ |
62dc9f3f | 452 | int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) |
60ee9be2 | 453 | { |
d005ea71 | 454 | return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_READ, count, val); |
60ee9be2 | 455 | } |
62dc9f3f | 456 | EXPORT_SYMBOL(sdw_nread_no_pm); |
60ee9be2 | 457 | |
d94e1e01 CK |
458 | /** |
459 | * sdw_nwrite_no_pm() - Write "n" contiguous SDW Slave registers with no PM | |
460 | * @slave: SDW Slave | |
461 | * @addr: Register address | |
462 | * @count: length | |
463 | * @val: Buffer for values to be written | |
d005ea71 CK |
464 | * |
465 | * Note that if the message crosses a page boundary each page will be | |
466 | * transferred under a separate invocation of the msg_lock. | |
d94e1e01 | 467 | */ |
62dc9f3f | 468 | int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
60ee9be2 | 469 | { |
d005ea71 | 470 | return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_WRITE, count, (u8 *)val); |
60ee9be2 | 471 | } |
62dc9f3f | 472 | EXPORT_SYMBOL(sdw_nwrite_no_pm); |
60ee9be2 | 473 | |
d94e1e01 CK |
474 | /** |
475 | * sdw_write_no_pm() - Write a SDW Slave register with no PM | |
476 | * @slave: SDW Slave | |
477 | * @addr: Register address | |
478 | * @value: Register value | |
479 | */ | |
167790ab | 480 | int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) |
60ee9be2 PLB |
481 | { |
482 | return sdw_nwrite_no_pm(slave, addr, 1, &value); | |
483 | } | |
167790ab | 484 | EXPORT_SYMBOL(sdw_write_no_pm); |
60ee9be2 | 485 | |
0231453b RW |
486 | static int |
487 | sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) | |
488 | { | |
489 | struct sdw_msg msg; | |
490 | u8 buf; | |
491 | int ret; | |
492 | ||
493 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
494 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 495 | if (ret < 0) |
0231453b RW |
496 | return ret; |
497 | ||
498 | ret = sdw_transfer(bus, &msg); | |
499 | if (ret < 0) | |
500 | return ret; | |
f779ad09 GL |
501 | |
502 | return buf; | |
0231453b RW |
503 | } |
504 | ||
505 | static int | |
506 | sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
507 | { | |
508 | struct sdw_msg msg; | |
509 | int ret; | |
510 | ||
511 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
512 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 513 | if (ret < 0) |
0231453b RW |
514 | return ret; |
515 | ||
516 | return sdw_transfer(bus, &msg); | |
517 | } | |
518 | ||
a350aff4 PLB |
519 | int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) |
520 | { | |
521 | struct sdw_msg msg; | |
522 | u8 buf; | |
523 | int ret; | |
524 | ||
525 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
526 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 527 | if (ret < 0) |
a350aff4 PLB |
528 | return ret; |
529 | ||
530 | ret = sdw_transfer_unlocked(bus, &msg); | |
531 | if (ret < 0) | |
532 | return ret; | |
533 | ||
534 | return buf; | |
535 | } | |
536 | EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); | |
537 | ||
538 | int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
539 | { | |
540 | struct sdw_msg msg; | |
541 | int ret; | |
542 | ||
543 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
544 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 545 | if (ret < 0) |
a350aff4 PLB |
546 | return ret; |
547 | ||
548 | return sdw_transfer_unlocked(bus, &msg); | |
549 | } | |
550 | EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); | |
551 | ||
d94e1e01 CK |
552 | /** |
553 | * sdw_read_no_pm() - Read a SDW Slave register with no PM | |
554 | * @slave: SDW Slave | |
555 | * @addr: Register address | |
556 | */ | |
167790ab | 557 | int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) |
0231453b RW |
558 | { |
559 | u8 buf; | |
560 | int ret; | |
561 | ||
562 | ret = sdw_nread_no_pm(slave, addr, 1, &buf); | |
563 | if (ret < 0) | |
564 | return ret; | |
565 | else | |
566 | return buf; | |
567 | } | |
167790ab | 568 | EXPORT_SYMBOL(sdw_read_no_pm); |
0231453b | 569 | |
d38ebaf2 | 570 | int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
b04c975e PLB |
571 | { |
572 | int tmp; | |
573 | ||
574 | tmp = sdw_read_no_pm(slave, addr); | |
575 | if (tmp < 0) | |
576 | return tmp; | |
577 | ||
578 | tmp = (tmp & ~mask) | val; | |
579 | return sdw_write_no_pm(slave, addr, tmp); | |
580 | } | |
d38ebaf2 PLB |
581 | EXPORT_SYMBOL(sdw_update_no_pm); |
582 | ||
583 | /* Read-Modify-Write Slave register */ | |
584 | int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) | |
585 | { | |
586 | int tmp; | |
587 | ||
588 | tmp = sdw_read(slave, addr); | |
589 | if (tmp < 0) | |
590 | return tmp; | |
591 | ||
592 | tmp = (tmp & ~mask) | val; | |
593 | return sdw_write(slave, addr, tmp); | |
594 | } | |
595 | EXPORT_SYMBOL(sdw_update); | |
b04c975e | 596 | |
9d715fa0 VK |
597 | /** |
598 | * sdw_nread() - Read "n" contiguous SDW Slave registers | |
599 | * @slave: SDW Slave | |
600 | * @addr: Register address | |
601 | * @count: length | |
602 | * @val: Buffer for values to be read | |
d94e1e01 CK |
603 | * |
604 | * This version of the function will take a PM reference to the slave | |
605 | * device. | |
d005ea71 CK |
606 | * Note that if the message crosses a page boundary each page will be |
607 | * transferred under a separate invocation of the msg_lock. | |
9d715fa0 VK |
608 | */ |
609 | int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) | |
610 | { | |
9d715fa0 VK |
611 | int ret; |
612 | ||
e9537962 RF |
613 | ret = pm_runtime_get_sync(&slave->dev); |
614 | if (ret < 0 && ret != -EACCES) { | |
615 | pm_runtime_put_noidle(&slave->dev); | |
9d715fa0 | 616 | return ret; |
e9537962 | 617 | } |
60ee9be2 PLB |
618 | |
619 | ret = sdw_nread_no_pm(slave, addr, count, val); | |
9d715fa0 | 620 | |
973794e8 PLB |
621 | pm_runtime_mark_last_busy(&slave->dev); |
622 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
623 | |
624 | return ret; | |
625 | } | |
626 | EXPORT_SYMBOL(sdw_nread); | |
627 | ||
628 | /** | |
629 | * sdw_nwrite() - Write "n" contiguous SDW Slave registers | |
630 | * @slave: SDW Slave | |
631 | * @addr: Register address | |
632 | * @count: length | |
031e668b | 633 | * @val: Buffer for values to be written |
d94e1e01 CK |
634 | * |
635 | * This version of the function will take a PM reference to the slave | |
636 | * device. | |
d005ea71 CK |
637 | * Note that if the message crosses a page boundary each page will be |
638 | * transferred under a separate invocation of the msg_lock. | |
9d715fa0 | 639 | */ |
031e668b | 640 | int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
9d715fa0 | 641 | { |
9d715fa0 VK |
642 | int ret; |
643 | ||
e9537962 RF |
644 | ret = pm_runtime_get_sync(&slave->dev); |
645 | if (ret < 0 && ret != -EACCES) { | |
646 | pm_runtime_put_noidle(&slave->dev); | |
9d715fa0 | 647 | return ret; |
e9537962 | 648 | } |
60ee9be2 PLB |
649 | |
650 | ret = sdw_nwrite_no_pm(slave, addr, count, val); | |
9d715fa0 | 651 | |
973794e8 PLB |
652 | pm_runtime_mark_last_busy(&slave->dev); |
653 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
654 | |
655 | return ret; | |
656 | } | |
657 | EXPORT_SYMBOL(sdw_nwrite); | |
658 | ||
659 | /** | |
660 | * sdw_read() - Read a SDW Slave register | |
661 | * @slave: SDW Slave | |
662 | * @addr: Register address | |
d94e1e01 CK |
663 | * |
664 | * This version of the function will take a PM reference to the slave | |
665 | * device. | |
9d715fa0 VK |
666 | */ |
667 | int sdw_read(struct sdw_slave *slave, u32 addr) | |
668 | { | |
669 | u8 buf; | |
670 | int ret; | |
671 | ||
672 | ret = sdw_nread(slave, addr, 1, &buf); | |
673 | if (ret < 0) | |
674 | return ret; | |
f779ad09 GL |
675 | |
676 | return buf; | |
9d715fa0 VK |
677 | } |
678 | EXPORT_SYMBOL(sdw_read); | |
679 | ||
680 | /** | |
681 | * sdw_write() - Write a SDW Slave register | |
682 | * @slave: SDW Slave | |
683 | * @addr: Register address | |
684 | * @value: Register value | |
d94e1e01 CK |
685 | * |
686 | * This version of the function will take a PM reference to the slave | |
687 | * device. | |
9d715fa0 VK |
688 | */ |
689 | int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) | |
690 | { | |
691 | return sdw_nwrite(slave, addr, 1, &value); | |
9d715fa0 VK |
692 | } |
693 | EXPORT_SYMBOL(sdw_write); | |
694 | ||
d52d7a1b SK |
695 | /* |
696 | * SDW alert handling | |
697 | */ | |
698 | ||
699 | /* called with bus_lock held */ | |
700 | static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) | |
701 | { | |
1429cc26 | 702 | struct sdw_slave *slave; |
d52d7a1b SK |
703 | |
704 | list_for_each_entry(slave, &bus->slaves, node) { | |
705 | if (slave->dev_num == i) | |
706 | return slave; | |
707 | } | |
708 | ||
709 | return NULL; | |
710 | } | |
711 | ||
01ad444e | 712 | int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) |
d52d7a1b | 713 | { |
2e8c4ad1 | 714 | if (slave->id.mfg_id != id.mfg_id || |
09830d5e | 715 | slave->id.part_id != id.part_id || |
2e8c4ad1 PLB |
716 | slave->id.class_id != id.class_id || |
717 | (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && | |
718 | slave->id.unique_id != id.unique_id)) | |
d52d7a1b SK |
719 | return -ENODEV; |
720 | ||
721 | return 0; | |
722 | } | |
01ad444e | 723 | EXPORT_SYMBOL(sdw_compare_devid); |
d52d7a1b SK |
724 | |
725 | /* called with bus_lock held */ | |
726 | static int sdw_get_device_num(struct sdw_slave *slave) | |
727 | { | |
39d80b0e | 728 | struct sdw_bus *bus = slave->bus; |
d52d7a1b SK |
729 | int bit; |
730 | ||
39d80b0e PLB |
731 | if (bus->ops && bus->ops->get_device_num) { |
732 | bit = bus->ops->get_device_num(bus, slave); | |
c6056101 PLB |
733 | if (bit < 0) |
734 | goto err; | |
735 | } else { | |
39d80b0e | 736 | bit = find_first_zero_bit(bus->assigned, SDW_MAX_DEVICES); |
c6056101 PLB |
737 | if (bit == SDW_MAX_DEVICES) { |
738 | bit = -ENODEV; | |
739 | goto err; | |
740 | } | |
d52d7a1b SK |
741 | } |
742 | ||
743 | /* | |
744 | * Do not update dev_num in Slave data structure here, | |
745 | * Update once program dev_num is successful | |
746 | */ | |
39d80b0e | 747 | set_bit(bit, bus->assigned); |
d52d7a1b SK |
748 | |
749 | err: | |
750 | return bit; | |
751 | } | |
752 | ||
753 | static int sdw_assign_device_num(struct sdw_slave *slave) | |
754 | { | |
6d7a1ff7 | 755 | struct sdw_bus *bus = slave->bus; |
5b1a2927 CK |
756 | struct device *dev = bus->dev; |
757 | int ret; | |
d52d7a1b SK |
758 | |
759 | /* check first if device number is assigned, if so reuse that */ | |
760 | if (!slave->dev_num) { | |
fd6a3ac8 | 761 | if (!slave->dev_num_sticky) { |
5b1a2927 CK |
762 | int dev_num; |
763 | ||
fd6a3ac8 PLB |
764 | mutex_lock(&slave->bus->bus_lock); |
765 | dev_num = sdw_get_device_num(slave); | |
766 | mutex_unlock(&slave->bus->bus_lock); | |
767 | if (dev_num < 0) { | |
5b1a2927 | 768 | dev_err(dev, "Get dev_num failed: %d\n", dev_num); |
fd6a3ac8 PLB |
769 | return dev_num; |
770 | } | |
5b1a2927 | 771 | |
fd6a3ac8 | 772 | slave->dev_num_sticky = dev_num; |
fd6a3ac8 | 773 | } else { |
5b1a2927 CK |
774 | dev_dbg(dev, "Slave already registered, reusing dev_num: %d\n", |
775 | slave->dev_num_sticky); | |
d52d7a1b | 776 | } |
fd6a3ac8 PLB |
777 | } |
778 | ||
fd6a3ac8 | 779 | /* Clear the slave->dev_num to transfer message on device 0 */ |
fd6a3ac8 | 780 | slave->dev_num = 0; |
d52d7a1b | 781 | |
5b1a2927 | 782 | ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, slave->dev_num_sticky); |
d52d7a1b | 783 | if (ret < 0) { |
5b1a2927 CK |
784 | dev_err(dev, "Program device_num %d failed: %d\n", |
785 | slave->dev_num_sticky, ret); | |
d52d7a1b SK |
786 | return ret; |
787 | } | |
788 | ||
789 | /* After xfer of msg, restore dev_num */ | |
fd6a3ac8 | 790 | slave->dev_num = slave->dev_num_sticky; |
d52d7a1b | 791 | |
6bac0d8d | 792 | if (bus->ops && bus->ops->new_peripheral_assigned) |
5b1a2927 | 793 | bus->ops->new_peripheral_assigned(bus, slave, slave->dev_num); |
6bac0d8d | 794 | |
d52d7a1b SK |
795 | return 0; |
796 | } | |
797 | ||
7c3cd189 | 798 | void sdw_extract_slave_id(struct sdw_bus *bus, |
73ede046 | 799 | u64 addr, struct sdw_slave_id *id) |
7c3cd189 | 800 | { |
17ed5bef | 801 | dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); |
7c3cd189 | 802 | |
2c6cff68 PLB |
803 | id->sdw_version = SDW_VERSION(addr); |
804 | id->unique_id = SDW_UNIQUE_ID(addr); | |
805 | id->mfg_id = SDW_MFG_ID(addr); | |
806 | id->part_id = SDW_PART_ID(addr); | |
807 | id->class_id = SDW_CLASS_ID(addr); | |
7c3cd189 VK |
808 | |
809 | dev_dbg(bus->dev, | |
c397efb7 PLB |
810 | "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", |
811 | id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); | |
7c3cd189 | 812 | } |
01ad444e | 813 | EXPORT_SYMBOL(sdw_extract_slave_id); |
d52d7a1b | 814 | |
645291cf BL |
815 | bool is_clock_scaling_supported_by_slave(struct sdw_slave *slave) |
816 | { | |
817 | /* | |
818 | * Dynamic scaling is a defined by SDCA. However, some devices expose the class ID but | |
819 | * can't support dynamic scaling. We might need a quirk to handle such devices. | |
820 | */ | |
821 | return slave->id.class_id; | |
822 | } | |
823 | EXPORT_SYMBOL(is_clock_scaling_supported_by_slave); | |
824 | ||
72124f07 | 825 | static int sdw_program_device_num(struct sdw_bus *bus, bool *programmed) |
d52d7a1b SK |
826 | { |
827 | u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; | |
828 | struct sdw_slave *slave, *_s; | |
829 | struct sdw_slave_id id; | |
830 | struct sdw_msg msg; | |
f03690f4 | 831 | bool found; |
d52d7a1b SK |
832 | int count = 0, ret; |
833 | u64 addr; | |
834 | ||
72124f07 RF |
835 | *programmed = false; |
836 | ||
d52d7a1b SK |
837 | /* No Slave, so use raw xfer api */ |
838 | ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, | |
73ede046 | 839 | SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); |
d52d7a1b SK |
840 | if (ret < 0) |
841 | return ret; | |
842 | ||
843 | do { | |
844 | ret = sdw_transfer(bus, &msg); | |
845 | if (ret == -ENODATA) { /* end of device id reads */ | |
6e0ac6a6 | 846 | dev_dbg(bus->dev, "No more devices to enumerate\n"); |
d52d7a1b SK |
847 | ret = 0; |
848 | break; | |
849 | } | |
850 | if (ret < 0) { | |
851 | dev_err(bus->dev, "DEVID read fail:%d\n", ret); | |
852 | break; | |
853 | } | |
854 | ||
855 | /* | |
856 | * Construct the addr and extract. Cast the higher shift | |
857 | * bits to avoid truncation due to size limit. | |
858 | */ | |
859 | addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | | |
0132af05 CIK |
860 | ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | |
861 | ((u64)buf[0] << 40); | |
d52d7a1b SK |
862 | |
863 | sdw_extract_slave_id(bus, addr, &id); | |
864 | ||
f03690f4 | 865 | found = false; |
d52d7a1b SK |
866 | /* Now compare with entries */ |
867 | list_for_each_entry_safe(slave, _s, &bus->slaves, node) { | |
868 | if (sdw_compare_devid(slave, id) == 0) { | |
869 | found = true; | |
870 | ||
7297f8fa RF |
871 | /* |
872 | * To prevent skipping state-machine stages don't | |
873 | * program a device until we've seen it UNATTACH. | |
874 | * Must return here because no other device on #0 | |
875 | * can be detected until this one has been | |
876 | * assigned a device ID. | |
877 | */ | |
878 | if (slave->status != SDW_SLAVE_UNATTACHED) | |
879 | return 0; | |
880 | ||
d52d7a1b SK |
881 | /* |
882 | * Assign a new dev_num to this Slave and | |
883 | * not mark it present. It will be marked | |
884 | * present after it reports ATTACHED on new | |
885 | * dev_num | |
886 | */ | |
887 | ret = sdw_assign_device_num(slave); | |
a5759f19 | 888 | if (ret < 0) { |
6d7a1ff7 | 889 | dev_err(bus->dev, |
17ed5bef | 890 | "Assign dev_num failed:%d\n", |
d52d7a1b SK |
891 | ret); |
892 | return ret; | |
893 | } | |
894 | ||
72124f07 RF |
895 | *programmed = true; |
896 | ||
d52d7a1b SK |
897 | break; |
898 | } | |
899 | } | |
900 | ||
d7b956b6 | 901 | if (!found) { |
d52d7a1b | 902 | /* TODO: Park this device in Group 13 */ |
fcb9d730 SK |
903 | |
904 | /* | |
905 | * add Slave device even if there is no platform | |
906 | * firmware description. There will be no driver probe | |
907 | * but the user/integration will be able to see the | |
908 | * device, enumeration status and device number in sysfs | |
909 | */ | |
910 | sdw_slave_add(bus, &id, NULL); | |
911 | ||
17ed5bef | 912 | dev_err(bus->dev, "Slave Entry not found\n"); |
d52d7a1b SK |
913 | } |
914 | ||
915 | count++; | |
916 | ||
917 | /* | |
918 | * Check till error out or retry (count) exhausts. | |
919 | * Device can drop off and rejoin during enumeration | |
920 | * so count till twice the bound. | |
921 | */ | |
922 | ||
923 | } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); | |
924 | ||
925 | return ret; | |
926 | } | |
927 | ||
928 | static void sdw_modify_slave_status(struct sdw_slave *slave, | |
73ede046 | 929 | enum sdw_slave_status status) |
d52d7a1b | 930 | { |
6d7a1ff7 PLB |
931 | struct sdw_bus *bus = slave->bus; |
932 | ||
933 | mutex_lock(&bus->bus_lock); | |
fb9469e5 | 934 | |
6d7a1ff7 | 935 | dev_vdbg(bus->dev, |
9af8c36a PLB |
936 | "changing status slave %d status %d new status %d\n", |
937 | slave->dev_num, slave->status, status); | |
fb9469e5 PLB |
938 | |
939 | if (status == SDW_SLAVE_UNATTACHED) { | |
940 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
941 | "initializing enumeration and init completion for Slave %d\n", |
942 | slave->dev_num); | |
fb9469e5 | 943 | |
c40d6b32 JH |
944 | reinit_completion(&slave->enumeration_complete); |
945 | reinit_completion(&slave->initialization_complete); | |
fb9469e5 PLB |
946 | |
947 | } else if ((status == SDW_SLAVE_ATTACHED) && | |
948 | (slave->status == SDW_SLAVE_UNATTACHED)) { | |
949 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
950 | "signaling enumeration completion for Slave %d\n", |
951 | slave->dev_num); | |
fb9469e5 | 952 | |
c40d6b32 | 953 | complete_all(&slave->enumeration_complete); |
fb9469e5 | 954 | } |
d52d7a1b | 955 | slave->status = status; |
6d7a1ff7 | 956 | mutex_unlock(&bus->bus_lock); |
d52d7a1b SK |
957 | } |
958 | ||
0231453b RW |
959 | static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, |
960 | enum sdw_clk_stop_mode mode, | |
961 | enum sdw_clk_stop_type type) | |
962 | { | |
bd29c00e | 963 | int ret = 0; |
0231453b | 964 | |
bd29c00e PLB |
965 | mutex_lock(&slave->sdw_dev_lock); |
966 | ||
967 | if (slave->probed) { | |
968 | struct device *dev = &slave->dev; | |
969 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
970 | ||
971 | if (drv->ops && drv->ops->clk_stop) | |
972 | ret = drv->ops->clk_stop(slave, mode, type); | |
0231453b RW |
973 | } |
974 | ||
bd29c00e PLB |
975 | mutex_unlock(&slave->sdw_dev_lock); |
976 | ||
977 | return ret; | |
0231453b RW |
978 | } |
979 | ||
980 | static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, | |
981 | enum sdw_clk_stop_mode mode, | |
982 | bool prepare) | |
983 | { | |
984 | bool wake_en; | |
985 | u32 val = 0; | |
986 | int ret; | |
987 | ||
988 | wake_en = slave->prop.wake_capable; | |
989 | ||
990 | if (prepare) { | |
991 | val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; | |
992 | ||
993 | if (mode == SDW_CLK_STOP_MODE1) | |
994 | val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; | |
995 | ||
996 | if (wake_en) | |
997 | val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; | |
998 | } else { | |
665cf215 PLB |
999 | ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); |
1000 | if (ret < 0) { | |
b50bb8ba PLB |
1001 | if (ret != -ENODATA) |
1002 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); | |
665cf215 PLB |
1003 | return ret; |
1004 | } | |
1005 | val = ret; | |
0231453b RW |
1006 | val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); |
1007 | } | |
1008 | ||
1009 | ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); | |
1010 | ||
b50bb8ba PLB |
1011 | if (ret < 0 && ret != -ENODATA) |
1012 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret); | |
0231453b RW |
1013 | |
1014 | return ret; | |
1015 | } | |
1016 | ||
ff435da4 | 1017 | static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num, bool prepare) |
0231453b RW |
1018 | { |
1019 | int retry = bus->clk_stop_timeout; | |
1020 | int val; | |
1021 | ||
1022 | do { | |
665cf215 PLB |
1023 | val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); |
1024 | if (val < 0) { | |
9f9bc7d5 PLB |
1025 | if (val != -ENODATA) |
1026 | dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); | |
665cf215 PLB |
1027 | return val; |
1028 | } | |
1029 | val &= SDW_SCP_STAT_CLK_STP_NF; | |
0231453b | 1030 | if (!val) { |
ff435da4 PLB |
1031 | dev_dbg(bus->dev, "clock stop %s done slave:%d\n", |
1032 | prepare ? "prepare" : "deprepare", | |
af7254b4 | 1033 | dev_num); |
0231453b RW |
1034 | return 0; |
1035 | } | |
1036 | ||
1037 | usleep_range(1000, 1500); | |
1038 | retry--; | |
1039 | } while (retry); | |
1040 | ||
ff435da4 PLB |
1041 | dev_dbg(bus->dev, "clock stop %s did not complete for slave:%d\n", |
1042 | prepare ? "prepare" : "deprepare", | |
0231453b RW |
1043 | dev_num); |
1044 | ||
1045 | return -ETIMEDOUT; | |
1046 | } | |
1047 | ||
1048 | /** | |
1049 | * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop | |
1050 | * | |
1051 | * @bus: SDW bus instance | |
1052 | * | |
1053 | * Query Slave for clock stop mode and prepare for that mode. | |
1054 | */ | |
1055 | int sdw_bus_prep_clk_stop(struct sdw_bus *bus) | |
1056 | { | |
0231453b RW |
1057 | bool simple_clk_stop = true; |
1058 | struct sdw_slave *slave; | |
1059 | bool is_slave = false; | |
1060 | int ret = 0; | |
1061 | ||
1062 | /* | |
1063 | * In order to save on transition time, prepare | |
1064 | * each Slave and then wait for all Slave(s) to be | |
1065 | * prepared for clock stop. | |
b50bb8ba PLB |
1066 | * If one of the Slave devices has lost sync and |
1067 | * replies with Command Ignored/-ENODATA, we continue | |
1068 | * the loop | |
0231453b RW |
1069 | */ |
1070 | list_for_each_entry(slave, &bus->slaves, node) { | |
1071 | if (!slave->dev_num) | |
1072 | continue; | |
1073 | ||
0231453b RW |
1074 | if (slave->status != SDW_SLAVE_ATTACHED && |
1075 | slave->status != SDW_SLAVE_ALERT) | |
1076 | continue; | |
1077 | ||
929cfee3 BL |
1078 | /* Identify if Slave(s) are available on Bus */ |
1079 | is_slave = true; | |
1080 | ||
345e9f5c PLB |
1081 | ret = sdw_slave_clk_stop_callback(slave, |
1082 | SDW_CLK_STOP_MODE0, | |
0231453b | 1083 | SDW_CLK_PRE_PREPARE); |
b50bb8ba PLB |
1084 | if (ret < 0 && ret != -ENODATA) { |
1085 | dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret); | |
0231453b RW |
1086 | return ret; |
1087 | } | |
1088 | ||
345e9f5c PLB |
1089 | /* Only prepare a Slave device if needed */ |
1090 | if (!slave->prop.simple_clk_stop_capable) { | |
0231453b | 1091 | simple_clk_stop = false; |
345e9f5c PLB |
1092 | |
1093 | ret = sdw_slave_clk_stop_prepare(slave, | |
1094 | SDW_CLK_STOP_MODE0, | |
1095 | true); | |
b50bb8ba PLB |
1096 | if (ret < 0 && ret != -ENODATA) { |
1097 | dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret); | |
345e9f5c PLB |
1098 | return ret; |
1099 | } | |
1100 | } | |
0231453b RW |
1101 | } |
1102 | ||
18de2f72 CS |
1103 | /* Skip remaining clock stop preparation if no Slave is attached */ |
1104 | if (!is_slave) | |
b50bb8ba | 1105 | return 0; |
18de2f72 | 1106 | |
345e9f5c PLB |
1107 | /* |
1108 | * Don't wait for all Slaves to be ready if they follow the simple | |
1109 | * state machine | |
1110 | */ | |
18de2f72 | 1111 | if (!simple_clk_stop) { |
0231453b | 1112 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, |
ff435da4 | 1113 | SDW_BROADCAST_DEV_NUM, true); |
b50bb8ba PLB |
1114 | /* |
1115 | * if there are no Slave devices present and the reply is | |
1116 | * Command_Ignored/-ENODATA, we don't need to continue with the | |
1117 | * flow and can just return here. The error code is not modified | |
1118 | * and its handling left as an exercise for the caller. | |
1119 | */ | |
0231453b RW |
1120 | if (ret < 0) |
1121 | return ret; | |
1122 | } | |
1123 | ||
1124 | /* Inform slaves that prep is done */ | |
1125 | list_for_each_entry(slave, &bus->slaves, node) { | |
1126 | if (!slave->dev_num) | |
1127 | continue; | |
1128 | ||
1129 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1130 | slave->status != SDW_SLAVE_ALERT) | |
1131 | continue; | |
1132 | ||
345e9f5c PLB |
1133 | ret = sdw_slave_clk_stop_callback(slave, |
1134 | SDW_CLK_STOP_MODE0, | |
1135 | SDW_CLK_POST_PREPARE); | |
0231453b | 1136 | |
b50bb8ba PLB |
1137 | if (ret < 0 && ret != -ENODATA) { |
1138 | dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret); | |
1139 | return ret; | |
0231453b RW |
1140 | } |
1141 | } | |
1142 | ||
b50bb8ba | 1143 | return 0; |
0231453b RW |
1144 | } |
1145 | EXPORT_SYMBOL(sdw_bus_prep_clk_stop); | |
1146 | ||
1147 | /** | |
1148 | * sdw_bus_clk_stop: stop bus clock | |
1149 | * | |
1150 | * @bus: SDW bus instance | |
1151 | * | |
1152 | * After preparing the Slaves for clock stop, stop the clock by broadcasting | |
1153 | * write to SCP_CTRL register. | |
1154 | */ | |
1155 | int sdw_bus_clk_stop(struct sdw_bus *bus) | |
1156 | { | |
1157 | int ret; | |
1158 | ||
1159 | /* | |
1160 | * broadcast clock stop now, attached Slaves will ACK this, | |
1161 | * unattached will ignore | |
1162 | */ | |
1163 | ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, | |
1164 | SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); | |
1165 | if (ret < 0) { | |
b50bb8ba PLB |
1166 | if (ret != -ENODATA) |
1167 | dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret); | |
0231453b RW |
1168 | return ret; |
1169 | } | |
1170 | ||
1171 | return 0; | |
1172 | } | |
1173 | EXPORT_SYMBOL(sdw_bus_clk_stop); | |
1174 | ||
1175 | /** | |
1176 | * sdw_bus_exit_clk_stop: Exit clock stop mode | |
1177 | * | |
1178 | * @bus: SDW bus instance | |
1179 | * | |
1180 | * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves | |
1181 | * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate | |
1182 | * back. | |
1183 | */ | |
1184 | int sdw_bus_exit_clk_stop(struct sdw_bus *bus) | |
1185 | { | |
0231453b RW |
1186 | bool simple_clk_stop = true; |
1187 | struct sdw_slave *slave; | |
1188 | bool is_slave = false; | |
1189 | int ret; | |
1190 | ||
1191 | /* | |
1192 | * In order to save on transition time, de-prepare | |
1193 | * each Slave and then wait for all Slave(s) to be | |
1194 | * de-prepared after clock resume. | |
1195 | */ | |
1196 | list_for_each_entry(slave, &bus->slaves, node) { | |
1197 | if (!slave->dev_num) | |
1198 | continue; | |
1199 | ||
0231453b RW |
1200 | if (slave->status != SDW_SLAVE_ATTACHED && |
1201 | slave->status != SDW_SLAVE_ALERT) | |
1202 | continue; | |
1203 | ||
929cfee3 BL |
1204 | /* Identify if Slave(s) are available on Bus */ |
1205 | is_slave = true; | |
1206 | ||
345e9f5c | 1207 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
0231453b RW |
1208 | SDW_CLK_PRE_DEPREPARE); |
1209 | if (ret < 0) | |
b50bb8ba | 1210 | dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret); |
0231453b | 1211 | |
345e9f5c PLB |
1212 | /* Only de-prepare a Slave device if needed */ |
1213 | if (!slave->prop.simple_clk_stop_capable) { | |
1214 | simple_clk_stop = false; | |
0231453b | 1215 | |
345e9f5c PLB |
1216 | ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0, |
1217 | false); | |
0231453b | 1218 | |
345e9f5c | 1219 | if (ret < 0) |
b50bb8ba | 1220 | dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret); |
345e9f5c | 1221 | } |
0231453b RW |
1222 | } |
1223 | ||
18de2f72 | 1224 | /* Skip remaining clock stop de-preparation if no Slave is attached */ |
929cfee3 BL |
1225 | if (!is_slave) |
1226 | return 0; | |
1227 | ||
345e9f5c PLB |
1228 | /* |
1229 | * Don't wait for all Slaves to be ready if they follow the simple | |
1230 | * state machine | |
1231 | */ | |
b50bb8ba | 1232 | if (!simple_clk_stop) { |
ff435da4 | 1233 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM, false); |
b50bb8ba | 1234 | if (ret < 0) |
4cbbe74d | 1235 | dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret); |
b50bb8ba | 1236 | } |
18de2f72 | 1237 | |
0231453b RW |
1238 | list_for_each_entry(slave, &bus->slaves, node) { |
1239 | if (!slave->dev_num) | |
1240 | continue; | |
1241 | ||
1242 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1243 | slave->status != SDW_SLAVE_ALERT) | |
1244 | continue; | |
1245 | ||
b50bb8ba PLB |
1246 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
1247 | SDW_CLK_POST_DEPREPARE); | |
1248 | if (ret < 0) | |
1249 | dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret); | |
0231453b RW |
1250 | } |
1251 | ||
1252 | return 0; | |
1253 | } | |
1254 | EXPORT_SYMBOL(sdw_bus_exit_clk_stop); | |
1255 | ||
79df15b7 | 1256 | int sdw_configure_dpn_intr(struct sdw_slave *slave, |
73ede046 | 1257 | int port, bool enable, int mask) |
79df15b7 SK |
1258 | { |
1259 | u32 addr; | |
1260 | int ret; | |
1261 | u8 val = 0; | |
1262 | ||
dd87a72a PLB |
1263 | if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { |
1264 | dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", | |
836c8a2e | 1265 | str_on_off(enable)); |
dd87a72a PLB |
1266 | mask |= SDW_DPN_INT_TEST_FAIL; |
1267 | } | |
1268 | ||
79df15b7 SK |
1269 | addr = SDW_DPN_INTMASK(port); |
1270 | ||
1271 | /* Set/Clear port ready interrupt mask */ | |
1272 | if (enable) { | |
1273 | val |= mask; | |
1274 | val |= SDW_DPN_INT_PORT_READY; | |
1275 | } else { | |
1276 | val &= ~(mask); | |
1277 | val &= ~SDW_DPN_INT_PORT_READY; | |
1278 | } | |
1279 | ||
545c3651 | 1280 | ret = sdw_update_no_pm(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); |
79df15b7 | 1281 | if (ret < 0) |
6d7a1ff7 | 1282 | dev_err(&slave->dev, |
17ed5bef | 1283 | "SDW_DPN_INTMASK write failed:%d\n", val); |
79df15b7 SK |
1284 | |
1285 | return ret; | |
1286 | } | |
1287 | ||
8f4e3343 | 1288 | int sdw_slave_get_scale_index(struct sdw_slave *slave, u8 *base) |
29d158f9 PLB |
1289 | { |
1290 | u32 mclk_freq = slave->bus->prop.mclk_freq; | |
1291 | u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; | |
1292 | unsigned int scale; | |
1293 | u8 scale_index; | |
29d158f9 PLB |
1294 | |
1295 | if (!mclk_freq) { | |
1296 | dev_err(&slave->dev, | |
1297 | "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); | |
1298 | return -EINVAL; | |
1299 | } | |
1300 | ||
1301 | /* | |
1302 | * map base frequency using Table 89 of SoundWire 1.2 spec. | |
1303 | * The order of the tests just follows the specification, this | |
1304 | * is not a selection between possible values or a search for | |
1305 | * the best value but just a mapping. Only one case per platform | |
1306 | * is relevant. | |
1307 | * Some BIOS have inconsistent values for mclk_freq but a | |
1308 | * correct root so we force the mclk_freq to avoid variations. | |
1309 | */ | |
1310 | if (!(19200000 % mclk_freq)) { | |
1311 | mclk_freq = 19200000; | |
8f4e3343 | 1312 | *base = SDW_SCP_BASE_CLOCK_19200000_HZ; |
29d158f9 PLB |
1313 | } else if (!(22579200 % mclk_freq)) { |
1314 | mclk_freq = 22579200; | |
8f4e3343 | 1315 | *base = SDW_SCP_BASE_CLOCK_22579200_HZ; |
7eca9c72 PLB |
1316 | } else if (!(24576000 % mclk_freq)) { |
1317 | mclk_freq = 24576000; | |
8f4e3343 | 1318 | *base = SDW_SCP_BASE_CLOCK_24576000_HZ; |
29d158f9 PLB |
1319 | } else if (!(32000000 % mclk_freq)) { |
1320 | mclk_freq = 32000000; | |
8f4e3343 | 1321 | *base = SDW_SCP_BASE_CLOCK_32000000_HZ; |
7eca9c72 PLB |
1322 | } else if (!(96000000 % mclk_freq)) { |
1323 | mclk_freq = 24000000; | |
8f4e3343 | 1324 | *base = SDW_SCP_BASE_CLOCK_24000000_HZ; |
29d158f9 PLB |
1325 | } else { |
1326 | dev_err(&slave->dev, | |
1327 | "Unsupported clock base, mclk %d\n", | |
1328 | mclk_freq); | |
1329 | return -EINVAL; | |
1330 | } | |
1331 | ||
1332 | if (mclk_freq % curr_freq) { | |
1333 | dev_err(&slave->dev, | |
1334 | "mclk %d is not multiple of bus curr_freq %d\n", | |
1335 | mclk_freq, curr_freq); | |
1336 | return -EINVAL; | |
1337 | } | |
1338 | ||
1339 | scale = mclk_freq / curr_freq; | |
1340 | ||
1341 | /* | |
1342 | * map scale to Table 90 of SoundWire 1.2 spec - and check | |
1343 | * that the scale is a power of two and maximum 64 | |
1344 | */ | |
1345 | scale_index = ilog2(scale); | |
1346 | ||
1347 | if (BIT(scale_index) != scale || scale_index > 6) { | |
1348 | dev_err(&slave->dev, | |
1349 | "No match found for scale %d, bus mclk %d curr_freq %d\n", | |
1350 | scale, mclk_freq, curr_freq); | |
1351 | return -EINVAL; | |
1352 | } | |
1353 | scale_index++; | |
1354 | ||
8f4e3343 BL |
1355 | dev_dbg(&slave->dev, |
1356 | "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", | |
1357 | *base, scale_index, mclk_freq, curr_freq); | |
1358 | ||
1359 | return scale_index; | |
1360 | } | |
1361 | EXPORT_SYMBOL(sdw_slave_get_scale_index); | |
1362 | ||
1363 | static int sdw_slave_set_frequency(struct sdw_slave *slave) | |
1364 | { | |
1365 | int scale_index; | |
1366 | u8 base; | |
1367 | int ret; | |
1368 | ||
1369 | /* | |
1370 | * frequency base and scale registers are required for SDCA | |
1371 | * devices. They may also be used for 1.2+/non-SDCA devices. | |
1372 | * Driver can set the property directly, for now there's no | |
1373 | * DisCo property to discover support for the scaling registers | |
1374 | * from platform firmware. | |
1375 | */ | |
1376 | if (!slave->id.class_id && !slave->prop.clock_reg_supported) | |
1377 | return 0; | |
1378 | ||
1379 | scale_index = sdw_slave_get_scale_index(slave, &base); | |
1380 | if (scale_index < 0) | |
1381 | return scale_index; | |
1382 | ||
299e9780 | 1383 | ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); |
29d158f9 PLB |
1384 | if (ret < 0) { |
1385 | dev_err(&slave->dev, | |
1386 | "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); | |
1387 | return ret; | |
1388 | } | |
1389 | ||
1390 | /* initialize scale for both banks */ | |
299e9780 | 1391 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); |
29d158f9 PLB |
1392 | if (ret < 0) { |
1393 | dev_err(&slave->dev, | |
1394 | "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); | |
1395 | return ret; | |
1396 | } | |
299e9780 | 1397 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); |
29d158f9 PLB |
1398 | if (ret < 0) |
1399 | dev_err(&slave->dev, | |
1400 | "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); | |
1401 | ||
29d158f9 PLB |
1402 | return ret; |
1403 | } | |
1404 | ||
d52d7a1b SK |
1405 | static int sdw_initialize_slave(struct sdw_slave *slave) |
1406 | { | |
1407 | struct sdw_slave_prop *prop = &slave->prop; | |
6b8caa6f | 1408 | int status; |
d52d7a1b SK |
1409 | int ret; |
1410 | u8 val; | |
1411 | ||
29d158f9 PLB |
1412 | ret = sdw_slave_set_frequency(slave); |
1413 | if (ret < 0) | |
1414 | return ret; | |
1415 | ||
6b8caa6f BL |
1416 | if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { |
1417 | /* Clear bus clash interrupt before enabling interrupt mask */ | |
1418 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1419 | if (status < 0) { | |
1420 | dev_err(&slave->dev, | |
1421 | "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); | |
1422 | return status; | |
1423 | } | |
1424 | if (status & SDW_SCP_INT1_BUS_CLASH) { | |
1425 | dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); | |
1426 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); | |
1427 | if (ret < 0) { | |
1428 | dev_err(&slave->dev, | |
1429 | "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); | |
1430 | return ret; | |
1431 | } | |
1432 | } | |
1433 | } | |
1434 | if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && | |
5a4c1f02 | 1435 | !(prop->quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { |
6b8caa6f BL |
1436 | /* Clear parity interrupt before enabling interrupt mask */ |
1437 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1438 | if (status < 0) { | |
1439 | dev_err(&slave->dev, | |
1440 | "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); | |
1441 | return status; | |
1442 | } | |
1443 | if (status & SDW_SCP_INT1_PARITY) { | |
1444 | dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); | |
1445 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); | |
1446 | if (ret < 0) { | |
1447 | dev_err(&slave->dev, | |
1448 | "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); | |
1449 | return ret; | |
1450 | } | |
1451 | } | |
1452 | } | |
1453 | ||
d52d7a1b | 1454 | /* |
2acd30b9 PLB |
1455 | * Set SCP_INT1_MASK register, typically bus clash and |
1456 | * implementation-defined interrupt mask. The Parity detection | |
1457 | * may not always be correct on startup so its use is | |
1458 | * device-dependent, it might e.g. only be enabled in | |
1459 | * steady-state after a couple of frames. | |
d52d7a1b | 1460 | */ |
5a4c1f02 | 1461 | val = prop->scp_int1_mask; |
d52d7a1b SK |
1462 | |
1463 | /* Enable SCP interrupts */ | |
b04c975e | 1464 | ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); |
d52d7a1b | 1465 | if (ret < 0) { |
6d7a1ff7 | 1466 | dev_err(&slave->dev, |
17ed5bef | 1467 | "SDW_SCP_INTMASK1 write failed:%d\n", ret); |
d52d7a1b SK |
1468 | return ret; |
1469 | } | |
1470 | ||
1471 | /* No need to continue if DP0 is not present */ | |
5a4c1f02 | 1472 | if (!prop->dp0_prop) |
d52d7a1b SK |
1473 | return 0; |
1474 | ||
1475 | /* Enable DP0 interrupts */ | |
8acbbfec | 1476 | val = prop->dp0_prop->imp_def_interrupts; |
d52d7a1b SK |
1477 | val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; |
1478 | ||
b04c975e | 1479 | ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); |
5de79ba8 | 1480 | if (ret < 0) |
6d7a1ff7 | 1481 | dev_err(&slave->dev, |
17ed5bef | 1482 | "SDW_DP0_INTMASK read failed:%d\n", ret); |
5de79ba8 | 1483 | return ret; |
d52d7a1b | 1484 | } |
b0a9c37b VK |
1485 | |
1486 | static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) | |
1487 | { | |
b35991de | 1488 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1489 | int status, status2, ret, count = 0; |
1490 | ||
c30b63ef | 1491 | status = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1492 | if (status < 0) { |
6d7a1ff7 | 1493 | dev_err(&slave->dev, |
17ed5bef | 1494 | "SDW_DP0_INT read failed:%d\n", status); |
b0a9c37b VK |
1495 | return status; |
1496 | } | |
1497 | ||
1498 | do { | |
b3a6809e | 1499 | clear = status & ~(SDW_DP0_INTERRUPTS | SDW_DP0_SDCA_CASCADE); |
b35991de | 1500 | |
b0a9c37b | 1501 | if (status & SDW_DP0_INT_TEST_FAIL) { |
17ed5bef | 1502 | dev_err(&slave->dev, "Test fail for port 0\n"); |
b0a9c37b VK |
1503 | clear |= SDW_DP0_INT_TEST_FAIL; |
1504 | } | |
1505 | ||
1506 | /* | |
1507 | * Assumption: PORT_READY interrupt will be received only for | |
1508 | * ports implementing Channel Prepare state machine (CP_SM) | |
1509 | */ | |
1510 | ||
1511 | if (status & SDW_DP0_INT_PORT_READY) { | |
1512 | complete(&slave->port_ready[0]); | |
1513 | clear |= SDW_DP0_INT_PORT_READY; | |
1514 | } | |
1515 | ||
1516 | if (status & SDW_DP0_INT_BRA_FAILURE) { | |
17ed5bef | 1517 | dev_err(&slave->dev, "BRA failed\n"); |
b0a9c37b VK |
1518 | clear |= SDW_DP0_INT_BRA_FAILURE; |
1519 | } | |
1520 | ||
1521 | impl_int_mask = SDW_DP0_INT_IMPDEF1 | | |
1522 | SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; | |
1523 | ||
1524 | if (status & impl_int_mask) { | |
1525 | clear |= impl_int_mask; | |
1526 | *slave_status = clear; | |
1527 | } | |
1528 | ||
b35991de | 1529 | /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ |
c30b63ef | 1530 | ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); |
b0a9c37b | 1531 | if (ret < 0) { |
6d7a1ff7 | 1532 | dev_err(&slave->dev, |
17ed5bef | 1533 | "SDW_DP0_INT write failed:%d\n", ret); |
b0a9c37b VK |
1534 | return ret; |
1535 | } | |
1536 | ||
1537 | /* Read DP0 interrupt again */ | |
c30b63ef | 1538 | status2 = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1539 | if (status2 < 0) { |
6d7a1ff7 | 1540 | dev_err(&slave->dev, |
17ed5bef | 1541 | "SDW_DP0_INT read failed:%d\n", status2); |
80cd8f01 | 1542 | return status2; |
b0a9c37b | 1543 | } |
6e06a855 | 1544 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1545 | status &= status2; |
1546 | ||
1547 | count++; | |
1548 | ||
1549 | /* we can get alerts while processing so keep retrying */ | |
b35991de | 1550 | } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1551 | |
1552 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1553 | dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); |
b0a9c37b VK |
1554 | |
1555 | return ret; | |
1556 | } | |
1557 | ||
1558 | static int sdw_handle_port_interrupt(struct sdw_slave *slave, | |
73ede046 | 1559 | int port, u8 *slave_status) |
b0a9c37b | 1560 | { |
47b85209 | 1561 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1562 | int status, status2, ret, count = 0; |
1563 | u32 addr; | |
1564 | ||
1565 | if (port == 0) | |
1566 | return sdw_handle_dp0_interrupt(slave, slave_status); | |
1567 | ||
1568 | addr = SDW_DPN_INT(port); | |
c30b63ef | 1569 | status = sdw_read_no_pm(slave, addr); |
b0a9c37b | 1570 | if (status < 0) { |
6d7a1ff7 | 1571 | dev_err(&slave->dev, |
17ed5bef | 1572 | "SDW_DPN_INT read failed:%d\n", status); |
b0a9c37b VK |
1573 | |
1574 | return status; | |
1575 | } | |
1576 | ||
1577 | do { | |
47b85209 PLB |
1578 | clear = status & ~SDW_DPN_INTERRUPTS; |
1579 | ||
b0a9c37b | 1580 | if (status & SDW_DPN_INT_TEST_FAIL) { |
17ed5bef | 1581 | dev_err(&slave->dev, "Test fail for port:%d\n", port); |
b0a9c37b VK |
1582 | clear |= SDW_DPN_INT_TEST_FAIL; |
1583 | } | |
1584 | ||
1585 | /* | |
1586 | * Assumption: PORT_READY interrupt will be received only | |
1587 | * for ports implementing CP_SM. | |
1588 | */ | |
1589 | if (status & SDW_DPN_INT_PORT_READY) { | |
1590 | complete(&slave->port_ready[port]); | |
1591 | clear |= SDW_DPN_INT_PORT_READY; | |
1592 | } | |
1593 | ||
1594 | impl_int_mask = SDW_DPN_INT_IMPDEF1 | | |
1595 | SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; | |
1596 | ||
b0a9c37b VK |
1597 | if (status & impl_int_mask) { |
1598 | clear |= impl_int_mask; | |
1599 | *slave_status = clear; | |
1600 | } | |
1601 | ||
47b85209 | 1602 | /* clear the interrupt but don't touch reserved fields */ |
c30b63ef | 1603 | ret = sdw_write_no_pm(slave, addr, clear); |
b0a9c37b | 1604 | if (ret < 0) { |
6d7a1ff7 | 1605 | dev_err(&slave->dev, |
17ed5bef | 1606 | "SDW_DPN_INT write failed:%d\n", ret); |
b0a9c37b VK |
1607 | return ret; |
1608 | } | |
1609 | ||
1610 | /* Read DPN interrupt again */ | |
c30b63ef | 1611 | status2 = sdw_read_no_pm(slave, addr); |
80cd8f01 | 1612 | if (status2 < 0) { |
6d7a1ff7 | 1613 | dev_err(&slave->dev, |
17ed5bef | 1614 | "SDW_DPN_INT read failed:%d\n", status2); |
80cd8f01 | 1615 | return status2; |
b0a9c37b | 1616 | } |
6e06a855 | 1617 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1618 | status &= status2; |
1619 | ||
1620 | count++; | |
1621 | ||
1622 | /* we can get alerts while processing so keep retrying */ | |
47b85209 | 1623 | } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1624 | |
1625 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1626 | dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); |
b0a9c37b VK |
1627 | |
1628 | return ret; | |
1629 | } | |
1630 | ||
1631 | static int sdw_handle_slave_alerts(struct sdw_slave *slave) | |
1632 | { | |
1633 | struct sdw_slave_intr_status slave_intr; | |
f1fac63a | 1634 | u8 clear = 0, bit, port_status[15] = {0}; |
b0a9c37b VK |
1635 | int port_num, stat, ret, count = 0; |
1636 | unsigned long port; | |
7ffaba04 | 1637 | bool slave_notify; |
b7cab9be | 1638 | u8 sdca_cascade = 0; |
9420c971 | 1639 | u8 buf, buf2[2]; |
4724f12c PLB |
1640 | bool parity_check; |
1641 | bool parity_quirk; | |
b0a9c37b VK |
1642 | |
1643 | sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); | |
1644 | ||
e9537962 | 1645 | ret = pm_runtime_get_sync(&slave->dev); |
aa792935 RW |
1646 | if (ret < 0 && ret != -EACCES) { |
1647 | dev_err(&slave->dev, "Failed to resume device: %d\n", ret); | |
e9537962 | 1648 | pm_runtime_put_noidle(&slave->dev); |
aa792935 RW |
1649 | return ret; |
1650 | } | |
1651 | ||
f8d0168e | 1652 | /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ |
c30b63ef | 1653 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1654 | if (ret < 0) { |
6d7a1ff7 | 1655 | dev_err(&slave->dev, |
17ed5bef | 1656 | "SDW_SCP_INT1 read failed:%d\n", ret); |
aa792935 | 1657 | goto io_err; |
b0a9c37b | 1658 | } |
72b16d4a | 1659 | buf = ret; |
b0a9c37b | 1660 | |
c30b63ef | 1661 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); |
b0a9c37b | 1662 | if (ret < 0) { |
6d7a1ff7 | 1663 | dev_err(&slave->dev, |
17ed5bef | 1664 | "SDW_SCP_INT2/3 read failed:%d\n", ret); |
aa792935 | 1665 | goto io_err; |
b0a9c37b VK |
1666 | } |
1667 | ||
be505ba8 | 1668 | if (slave->id.class_id) { |
c30b63ef | 1669 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1670 | if (ret < 0) { |
6d7a1ff7 | 1671 | dev_err(&slave->dev, |
b7cab9be PLB |
1672 | "SDW_DP0_INT read failed:%d\n", ret); |
1673 | goto io_err; | |
1674 | } | |
1675 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1676 | } | |
1677 | ||
b0a9c37b | 1678 | do { |
7ffaba04 PLB |
1679 | slave_notify = false; |
1680 | ||
b0a9c37b VK |
1681 | /* |
1682 | * Check parity, bus clash and Slave (impl defined) | |
1683 | * interrupt | |
1684 | */ | |
1685 | if (buf & SDW_SCP_INT1_PARITY) { | |
4724f12c PLB |
1686 | parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; |
1687 | parity_quirk = !slave->first_interrupt_done && | |
1688 | (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); | |
1689 | ||
1690 | if (parity_check && !parity_quirk) | |
310f6dc6 | 1691 | dev_err(&slave->dev, "Parity error detected\n"); |
b0a9c37b VK |
1692 | clear |= SDW_SCP_INT1_PARITY; |
1693 | } | |
1694 | ||
1695 | if (buf & SDW_SCP_INT1_BUS_CLASH) { | |
310f6dc6 PLB |
1696 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) |
1697 | dev_err(&slave->dev, "Bus clash detected\n"); | |
b0a9c37b VK |
1698 | clear |= SDW_SCP_INT1_BUS_CLASH; |
1699 | } | |
1700 | ||
1701 | /* | |
1702 | * When bus clash or parity errors are detected, such errors | |
1703 | * are unlikely to be recoverable errors. | |
1704 | * TODO: In such scenario, reset bus. Make this configurable | |
1705 | * via sysfs property with bus reset being the default. | |
1706 | */ | |
1707 | ||
1708 | if (buf & SDW_SCP_INT1_IMPL_DEF) { | |
310f6dc6 PLB |
1709 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { |
1710 | dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); | |
1711 | slave_notify = true; | |
1712 | } | |
b0a9c37b | 1713 | clear |= SDW_SCP_INT1_IMPL_DEF; |
b0a9c37b VK |
1714 | } |
1715 | ||
b7cab9be PLB |
1716 | /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ |
1717 | if (sdca_cascade) | |
1718 | slave_notify = true; | |
1719 | ||
b0a9c37b VK |
1720 | /* Check port 0 - 3 interrupts */ |
1721 | port = buf & SDW_SCP_INT1_PORT0_3; | |
1722 | ||
1723 | /* To get port number corresponding to bits, shift it */ | |
d5826a4b | 1724 | port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); |
b0a9c37b VK |
1725 | for_each_set_bit(bit, &port, 8) { |
1726 | sdw_handle_port_interrupt(slave, bit, | |
73ede046 | 1727 | &port_status[bit]); |
b0a9c37b VK |
1728 | } |
1729 | ||
1730 | /* Check if cascade 2 interrupt is present */ | |
1731 | if (buf & SDW_SCP_INT1_SCP2_CASCADE) { | |
1732 | port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; | |
1733 | for_each_set_bit(bit, &port, 8) { | |
1734 | /* scp2 ports start from 4 */ | |
560458df | 1735 | port_num = bit + 4; |
b0a9c37b VK |
1736 | sdw_handle_port_interrupt(slave, |
1737 | port_num, | |
1738 | &port_status[port_num]); | |
1739 | } | |
1740 | } | |
1741 | ||
1742 | /* now check last cascade */ | |
1743 | if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { | |
1744 | port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; | |
1745 | for_each_set_bit(bit, &port, 8) { | |
1746 | /* scp3 ports start from 11 */ | |
560458df | 1747 | port_num = bit + 11; |
b0a9c37b VK |
1748 | sdw_handle_port_interrupt(slave, |
1749 | port_num, | |
1750 | &port_status[port_num]); | |
1751 | } | |
1752 | } | |
1753 | ||
1754 | /* Update the Slave driver */ | |
bd29c00e PLB |
1755 | if (slave_notify) { |
1756 | mutex_lock(&slave->sdw_dev_lock); | |
1757 | ||
1758 | if (slave->probed) { | |
1759 | struct device *dev = &slave->dev; | |
1760 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1761 | ||
12a95123 LT |
1762 | if (slave->prop.use_domain_irq && slave->irq) |
1763 | handle_nested_irq(slave->irq); | |
1764 | ||
bd29c00e PLB |
1765 | if (drv->ops && drv->ops->interrupt_callback) { |
1766 | slave_intr.sdca_cascade = sdca_cascade; | |
1767 | slave_intr.control_port = clear; | |
1768 | memcpy(slave_intr.port, &port_status, | |
1769 | sizeof(slave_intr.port)); | |
1770 | ||
1771 | drv->ops->interrupt_callback(slave, &slave_intr); | |
1772 | } | |
1773 | } | |
1774 | ||
1775 | mutex_unlock(&slave->sdw_dev_lock); | |
b0a9c37b VK |
1776 | } |
1777 | ||
1778 | /* Ack interrupt */ | |
c30b63ef | 1779 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); |
b0a9c37b | 1780 | if (ret < 0) { |
6d7a1ff7 | 1781 | dev_err(&slave->dev, |
17ed5bef | 1782 | "SDW_SCP_INT1 write failed:%d\n", ret); |
aa792935 | 1783 | goto io_err; |
b0a9c37b VK |
1784 | } |
1785 | ||
c2819e19 PLB |
1786 | /* at this point all initial interrupt sources were handled */ |
1787 | slave->first_interrupt_done = true; | |
1788 | ||
b0a9c37b VK |
1789 | /* |
1790 | * Read status again to ensure no new interrupts arrived | |
1791 | * while servicing interrupts. | |
1792 | */ | |
c30b63ef | 1793 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1794 | if (ret < 0) { |
6d7a1ff7 | 1795 | dev_err(&slave->dev, |
b500127e | 1796 | "SDW_SCP_INT1 recheck read failed:%d\n", ret); |
aa792935 | 1797 | goto io_err; |
b0a9c37b | 1798 | } |
9420c971 | 1799 | buf = ret; |
b0a9c37b | 1800 | |
9420c971 | 1801 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); |
b0a9c37b | 1802 | if (ret < 0) { |
6d7a1ff7 | 1803 | dev_err(&slave->dev, |
b500127e | 1804 | "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); |
aa792935 | 1805 | goto io_err; |
b0a9c37b VK |
1806 | } |
1807 | ||
be505ba8 | 1808 | if (slave->id.class_id) { |
c30b63ef | 1809 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1810 | if (ret < 0) { |
6d7a1ff7 | 1811 | dev_err(&slave->dev, |
b500127e | 1812 | "SDW_DP0_INT recheck read failed:%d\n", ret); |
b7cab9be PLB |
1813 | goto io_err; |
1814 | } | |
1815 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1816 | } | |
1817 | ||
6e06a855 | 1818 | /* |
9420c971 | 1819 | * Make sure no interrupts are pending |
6e06a855 | 1820 | */ |
b7cab9be | 1821 | stat = buf || buf2[0] || buf2[1] || sdca_cascade; |
b0a9c37b VK |
1822 | |
1823 | /* | |
1824 | * Exit loop if Slave is continuously in ALERT state even | |
1825 | * after servicing the interrupt multiple times. | |
1826 | */ | |
1827 | count++; | |
1828 | ||
1829 | /* we can get alerts while processing so keep retrying */ | |
1830 | } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
1831 | ||
1832 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1833 | dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); |
b0a9c37b | 1834 | |
aa792935 RW |
1835 | io_err: |
1836 | pm_runtime_mark_last_busy(&slave->dev); | |
1837 | pm_runtime_put_autosuspend(&slave->dev); | |
1838 | ||
b0a9c37b VK |
1839 | return ret; |
1840 | } | |
1841 | ||
1842 | static int sdw_update_slave_status(struct sdw_slave *slave, | |
73ede046 | 1843 | enum sdw_slave_status status) |
b0a9c37b | 1844 | { |
bd29c00e | 1845 | int ret = 0; |
b0a9c37b | 1846 | |
bd29c00e PLB |
1847 | mutex_lock(&slave->sdw_dev_lock); |
1848 | ||
1849 | if (slave->probed) { | |
1850 | struct device *dev = &slave->dev; | |
1851 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1852 | ||
1853 | if (drv->ops && drv->ops->update_status) | |
1854 | ret = drv->ops->update_status(slave, status); | |
2140b66b PLB |
1855 | } |
1856 | ||
bd29c00e | 1857 | mutex_unlock(&slave->sdw_dev_lock); |
2140b66b | 1858 | |
bd29c00e | 1859 | return ret; |
b0a9c37b VK |
1860 | } |
1861 | ||
1862 | /** | |
1863 | * sdw_handle_slave_status() - Handle Slave status | |
1864 | * @bus: SDW bus instance | |
1865 | * @status: Status for all Slave(s) | |
1866 | */ | |
1867 | int sdw_handle_slave_status(struct sdw_bus *bus, | |
73ede046 | 1868 | enum sdw_slave_status status[]) |
b0a9c37b VK |
1869 | { |
1870 | enum sdw_slave_status prev_status; | |
1871 | struct sdw_slave *slave; | |
72124f07 | 1872 | bool attached_initializing, id_programmed; |
b0a9c37b VK |
1873 | int i, ret = 0; |
1874 | ||
61061901 PLB |
1875 | /* first check if any Slaves fell off the bus */ |
1876 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1877 | mutex_lock(&bus->bus_lock); | |
1878 | if (test_bit(i, bus->assigned) == false) { | |
1879 | mutex_unlock(&bus->bus_lock); | |
1880 | continue; | |
1881 | } | |
1882 | mutex_unlock(&bus->bus_lock); | |
1883 | ||
1884 | slave = sdw_get_slave(bus, i); | |
1885 | if (!slave) | |
1886 | continue; | |
1887 | ||
1888 | if (status[i] == SDW_SLAVE_UNATTACHED && | |
d1b32855 PLB |
1889 | slave->status != SDW_SLAVE_UNATTACHED) { |
1890 | dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n", | |
1891 | i, slave->status); | |
61061901 | 1892 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
f605f32e RF |
1893 | |
1894 | /* Ensure driver knows that peripheral unattached */ | |
1895 | ret = sdw_update_slave_status(slave, status[i]); | |
1896 | if (ret < 0) | |
1897 | dev_warn(&slave->dev, "Update Slave status failed:%d\n", ret); | |
d1b32855 | 1898 | } |
61061901 PLB |
1899 | } |
1900 | ||
b0a9c37b | 1901 | if (status[0] == SDW_SLAVE_ATTACHED) { |
6e0ac6a6 | 1902 | dev_dbg(bus->dev, "Slave attached, programming device number\n"); |
72124f07 | 1903 | |
15ed3ea2 | 1904 | /* |
72124f07 RF |
1905 | * Programming a device number will have side effects, |
1906 | * so we deal with other devices at a later time. | |
1907 | * This relies on those devices reporting ATTACHED, which will | |
1908 | * trigger another call to this function. This will only | |
1909 | * happen if at least one device ID was programmed. | |
1910 | * Error returns from sdw_program_device_num() are currently | |
1911 | * ignored because there's no useful recovery that can be done. | |
1912 | * Returning the error here could result in the current status | |
1913 | * of other devices not being handled, because if no device IDs | |
1914 | * were programmed there's nothing to guarantee a status change | |
1915 | * to trigger another call to this function. | |
15ed3ea2 | 1916 | */ |
72124f07 RF |
1917 | sdw_program_device_num(bus, &id_programmed); |
1918 | if (id_programmed) | |
1919 | return 0; | |
b0a9c37b VK |
1920 | } |
1921 | ||
1922 | /* Continue to check other slave statuses */ | |
1923 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1924 | mutex_lock(&bus->bus_lock); | |
1925 | if (test_bit(i, bus->assigned) == false) { | |
1926 | mutex_unlock(&bus->bus_lock); | |
1927 | continue; | |
1928 | } | |
1929 | mutex_unlock(&bus->bus_lock); | |
1930 | ||
1931 | slave = sdw_get_slave(bus, i); | |
1932 | if (!slave) | |
1933 | continue; | |
1934 | ||
a90def06 PLB |
1935 | attached_initializing = false; |
1936 | ||
b0a9c37b VK |
1937 | switch (status[i]) { |
1938 | case SDW_SLAVE_UNATTACHED: | |
1939 | if (slave->status == SDW_SLAVE_UNATTACHED) | |
1940 | break; | |
1941 | ||
d1b32855 PLB |
1942 | dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n", |
1943 | i, slave->status); | |
1944 | ||
b0a9c37b VK |
1945 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
1946 | break; | |
1947 | ||
1948 | case SDW_SLAVE_ALERT: | |
1949 | ret = sdw_handle_slave_alerts(slave); | |
a5759f19 | 1950 | if (ret < 0) |
6d7a1ff7 | 1951 | dev_err(&slave->dev, |
17ed5bef | 1952 | "Slave %d alert handling failed: %d\n", |
b0a9c37b VK |
1953 | i, ret); |
1954 | break; | |
1955 | ||
1956 | case SDW_SLAVE_ATTACHED: | |
1957 | if (slave->status == SDW_SLAVE_ATTACHED) | |
1958 | break; | |
1959 | ||
1960 | prev_status = slave->status; | |
1961 | sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); | |
1962 | ||
1963 | if (prev_status == SDW_SLAVE_ALERT) | |
1964 | break; | |
1965 | ||
a90def06 PLB |
1966 | attached_initializing = true; |
1967 | ||
b0a9c37b | 1968 | ret = sdw_initialize_slave(slave); |
a5759f19 | 1969 | if (ret < 0) |
6d7a1ff7 | 1970 | dev_err(&slave->dev, |
17ed5bef | 1971 | "Slave %d initialization failed: %d\n", |
b0a9c37b VK |
1972 | i, ret); |
1973 | ||
1974 | break; | |
1975 | ||
1976 | default: | |
6d7a1ff7 | 1977 | dev_err(&slave->dev, "Invalid slave %d status:%d\n", |
73ede046 | 1978 | i, status[i]); |
b0a9c37b VK |
1979 | break; |
1980 | } | |
1981 | ||
1982 | ret = sdw_update_slave_status(slave, status[i]); | |
a5759f19 | 1983 | if (ret < 0) |
6d7a1ff7 | 1984 | dev_err(&slave->dev, |
17ed5bef | 1985 | "Update Slave status failed:%d\n", ret); |
f1b69026 PLB |
1986 | if (attached_initializing) { |
1987 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
1988 | "signaling initialization completion for Slave %d\n", |
1989 | slave->dev_num); | |
f1b69026 | 1990 | |
c40d6b32 | 1991 | complete_all(&slave->initialization_complete); |
e557bca4 PLB |
1992 | |
1993 | /* | |
1994 | * If the manager became pm_runtime active, the peripherals will be | |
1995 | * restarted and attach, but their pm_runtime status may remain | |
1996 | * suspended. If the 'update_slave_status' callback initiates | |
1997 | * any sort of deferred processing, this processing would not be | |
1998 | * cancelled on pm_runtime suspend. | |
1999 | * To avoid such zombie states, we queue a request to resume. | |
2000 | * This would be a no-op in case the peripheral was being resumed | |
2001 | * by e.g. the ALSA/ASoC framework. | |
2002 | */ | |
2003 | pm_request_resume(&slave->dev); | |
f1b69026 | 2004 | } |
b0a9c37b VK |
2005 | } |
2006 | ||
2007 | return ret; | |
2008 | } | |
2009 | EXPORT_SYMBOL(sdw_handle_slave_status); | |
3ab2ca40 PLB |
2010 | |
2011 | void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) | |
2012 | { | |
2013 | struct sdw_slave *slave; | |
2014 | int i; | |
2015 | ||
2016 | /* Check all non-zero devices */ | |
2017 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
2018 | mutex_lock(&bus->bus_lock); | |
2019 | if (test_bit(i, bus->assigned) == false) { | |
2020 | mutex_unlock(&bus->bus_lock); | |
2021 | continue; | |
2022 | } | |
2023 | mutex_unlock(&bus->bus_lock); | |
2024 | ||
2025 | slave = sdw_get_slave(bus, i); | |
2026 | if (!slave) | |
2027 | continue; | |
2028 | ||
c2819e19 | 2029 | if (slave->status != SDW_SLAVE_UNATTACHED) { |
3ab2ca40 | 2030 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 2031 | slave->first_interrupt_done = false; |
899a7509 | 2032 | sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 2033 | } |
3ab2ca40 PLB |
2034 | |
2035 | /* keep track of request, used in pm_runtime resume */ | |
2036 | slave->unattach_request = request; | |
2037 | } | |
2038 | } | |
2039 | EXPORT_SYMBOL(sdw_clear_slave_status); | |
9a756289 PLB |
2040 | |
2041 | int sdw_bpt_send_async(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg) | |
2042 | { | |
2043 | if (msg->len > SDW_BPT_MSG_MAX_BYTES) { | |
2044 | dev_err(bus->dev, "Invalid BPT message length %d\n", msg->len); | |
2045 | return -EINVAL; | |
2046 | } | |
2047 | ||
2048 | /* check device is enumerated */ | |
2049 | if (slave->dev_num == SDW_ENUM_DEV_NUM || | |
2050 | slave->dev_num > SDW_MAX_DEVICES) { | |
2051 | dev_err(&slave->dev, "Invalid device number %d\n", slave->dev_num); | |
2052 | return -ENODEV; | |
2053 | } | |
2054 | ||
2055 | /* make sure all callbacks are defined */ | |
2056 | if (!bus->ops->bpt_send_async || | |
2057 | !bus->ops->bpt_wait) { | |
2058 | dev_err(bus->dev, "BPT callbacks not defined\n"); | |
2059 | return -EOPNOTSUPP; | |
2060 | } | |
2061 | ||
2062 | return bus->ops->bpt_send_async(bus, slave, msg); | |
2063 | } | |
2064 | EXPORT_SYMBOL(sdw_bpt_send_async); | |
2065 | ||
2066 | int sdw_bpt_wait(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg) | |
2067 | { | |
2068 | return bus->ops->bpt_wait(bus, slave, msg); | |
2069 | } | |
2070 | EXPORT_SYMBOL(sdw_bpt_wait); | |
2071 | ||
2072 | int sdw_bpt_send_sync(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg) | |
2073 | { | |
2074 | int ret; | |
2075 | ||
2076 | ret = sdw_bpt_send_async(bus, slave, msg); | |
2077 | if (ret < 0) | |
2078 | return ret; | |
2079 | ||
2080 | return sdw_bpt_wait(bus, slave, msg); | |
2081 | } | |
2082 | EXPORT_SYMBOL(sdw_bpt_send_sync); |