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7c3cd189 VK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-17 Intel Corporation. | |
3 | ||
4 | #include <linux/acpi.h> | |
0231453b | 5 | #include <linux/delay.h> |
7c3cd189 | 6 | #include <linux/mod_devicetable.h> |
9d715fa0 VK |
7 | #include <linux/pm_runtime.h> |
8 | #include <linux/soundwire/sdw_registers.h> | |
7c3cd189 | 9 | #include <linux/soundwire/sdw.h> |
bd29c00e | 10 | #include <linux/soundwire/sdw_type.h> |
7c3cd189 | 11 | #include "bus.h" |
3b6c4a11 | 12 | #include "irq.h" |
bcac5902 | 13 | #include "sysfs_local.h" |
7c3cd189 | 14 | |
88de0a8f | 15 | static DEFINE_IDA(sdw_bus_ida); |
dbb50c7a BL |
16 | |
17 | static int sdw_get_id(struct sdw_bus *bus) | |
18 | { | |
88de0a8f | 19 | int rc = ida_alloc(&sdw_bus_ida, GFP_KERNEL); |
dbb50c7a BL |
20 | |
21 | if (rc < 0) | |
22 | return rc; | |
23 | ||
24 | bus->id = rc; | |
6543ac13 PLB |
25 | |
26 | if (bus->controller_id == -1) | |
27 | bus->controller_id = rc; | |
28 | ||
dbb50c7a BL |
29 | return 0; |
30 | } | |
31 | ||
7c3cd189 | 32 | /** |
5cab3ff2 | 33 | * sdw_bus_master_add() - add a bus Master instance |
7c3cd189 | 34 | * @bus: bus instance |
5cab3ff2 PLB |
35 | * @parent: parent device |
36 | * @fwnode: firmware node handle | |
7c3cd189 VK |
37 | * |
38 | * Initializes the bus instance, read properties and create child | |
39 | * devices. | |
40 | */ | |
5cab3ff2 PLB |
41 | int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, |
42 | struct fwnode_handle *fwnode) | |
7c3cd189 | 43 | { |
5c3eb9f7 | 44 | struct sdw_master_prop *prop = NULL; |
7c3cd189 VK |
45 | int ret; |
46 | ||
7ceaa40b PLB |
47 | if (!parent) { |
48 | pr_err("SoundWire parent device is not set\n"); | |
7c3cd189 VK |
49 | return -ENODEV; |
50 | } | |
51 | ||
dbb50c7a | 52 | ret = sdw_get_id(bus); |
a5759f19 | 53 | if (ret < 0) { |
7ceaa40b PLB |
54 | dev_err(parent, "Failed to get bus id\n"); |
55 | return ret; | |
56 | } | |
57 | ||
58 | ret = sdw_master_device_add(bus, parent, fwnode); | |
a5759f19 | 59 | if (ret < 0) { |
7ceaa40b PLB |
60 | dev_err(parent, "Failed to add master device at link %d\n", |
61 | bus->link_id); | |
dbb50c7a BL |
62 | return ret; |
63 | } | |
64 | ||
9d715fa0 | 65 | if (!bus->ops) { |
17ed5bef | 66 | dev_err(bus->dev, "SoundWire Bus ops are not set\n"); |
9d715fa0 VK |
67 | return -EINVAL; |
68 | } | |
69 | ||
9026118f BL |
70 | if (!bus->compute_params) { |
71 | dev_err(bus->dev, | |
72 | "Bandwidth allocation not configured, compute_params no set\n"); | |
73 | return -EINVAL; | |
74 | } | |
75 | ||
256a9978 RF |
76 | /* |
77 | * Give each bus_lock and msg_lock a unique key so that lockdep won't | |
78 | * trigger a deadlock warning when the locks of several buses are | |
79 | * grabbed during configuration of a multi-bus stream. | |
80 | */ | |
81 | lockdep_register_key(&bus->msg_lock_key); | |
82 | __mutex_init(&bus->msg_lock, "msg_lock", &bus->msg_lock_key); | |
83 | ||
84 | lockdep_register_key(&bus->bus_lock_key); | |
85 | __mutex_init(&bus->bus_lock, "bus_lock", &bus->bus_lock_key); | |
86 | ||
7c3cd189 | 87 | INIT_LIST_HEAD(&bus->slaves); |
89e59053 | 88 | INIT_LIST_HEAD(&bus->m_rt_list); |
7c3cd189 | 89 | |
ce6e74d0 SN |
90 | /* |
91 | * Initialize multi_link flag | |
ce6e74d0 SN |
92 | */ |
93 | bus->multi_link = false; | |
56d4fe31 VK |
94 | if (bus->ops->read_prop) { |
95 | ret = bus->ops->read_prop(bus); | |
96 | if (ret < 0) { | |
62f0cec3 VK |
97 | dev_err(bus->dev, |
98 | "Bus read properties failed:%d\n", ret); | |
56d4fe31 VK |
99 | return ret; |
100 | } | |
101 | } | |
102 | ||
bf03473d PLB |
103 | sdw_bus_debugfs_init(bus); |
104 | ||
7c3cd189 | 105 | /* |
21c2de29 | 106 | * Device numbers in SoundWire are 0 through 15. Enumeration device |
7c3cd189 VK |
107 | * number (0), Broadcast device number (15), Group numbers (12 and |
108 | * 13) and Master device number (14) are not used for assignment so | |
109 | * mask these and other higher bits. | |
110 | */ | |
111 | ||
112 | /* Set higher order bits */ | |
113 | *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); | |
114 | ||
115 | /* Set enumuration device number and broadcast device number */ | |
116 | set_bit(SDW_ENUM_DEV_NUM, bus->assigned); | |
117 | set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); | |
118 | ||
119 | /* Set group device numbers and master device number */ | |
120 | set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); | |
121 | set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); | |
122 | set_bit(SDW_MASTER_DEV_NUM, bus->assigned); | |
123 | ||
124 | /* | |
125 | * SDW is an enumerable bus, but devices can be powered off. So, | |
126 | * they won't be able to report as present. | |
127 | * | |
128 | * Create Slave devices based on Slaves described in | |
129 | * the respective firmware (ACPI/DT) | |
130 | */ | |
131 | if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) | |
132 | ret = sdw_acpi_find_slaves(bus); | |
a2e48458 SK |
133 | else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) |
134 | ret = sdw_of_find_slaves(bus); | |
7c3cd189 VK |
135 | else |
136 | ret = -ENOTSUPP; /* No ACPI/DT so error out */ | |
137 | ||
a5759f19 | 138 | if (ret < 0) { |
7c3cd189 VK |
139 | dev_err(bus->dev, "Finding slaves failed:%d\n", ret); |
140 | return ret; | |
141 | } | |
142 | ||
99b8a5d6 | 143 | /* |
5c3eb9f7 | 144 | * Initialize clock values based on Master properties. The max |
3424305b | 145 | * frequency is read from max_clk_freq property. Current assumption |
5c3eb9f7 SK |
146 | * is that the bus will start at highest clock frequency when |
147 | * powered on. | |
148 | * | |
99b8a5d6 SK |
149 | * Default active bank will be 0 as out of reset the Slaves have |
150 | * to start with bank 0 (Table 40 of Spec) | |
151 | */ | |
5c3eb9f7 | 152 | prop = &bus->prop; |
3424305b | 153 | bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; |
5c3eb9f7 | 154 | bus->params.curr_dr_freq = bus->params.max_dr_freq; |
99b8a5d6 SK |
155 | bus->params.curr_bank = SDW_BANK0; |
156 | bus->params.next_bank = SDW_BANK1; | |
157 | ||
3b6c4a11 CK |
158 | ret = sdw_irq_create(bus, fwnode); |
159 | if (ret) | |
160 | return ret; | |
12a95123 | 161 | |
7c3cd189 VK |
162 | return 0; |
163 | } | |
5cab3ff2 | 164 | EXPORT_SYMBOL(sdw_bus_master_add); |
7c3cd189 VK |
165 | |
166 | static int sdw_delete_slave(struct device *dev, void *data) | |
167 | { | |
168 | struct sdw_slave *slave = dev_to_sdw_dev(dev); | |
169 | struct sdw_bus *bus = slave->bus; | |
170 | ||
dff70572 PLB |
171 | pm_runtime_disable(dev); |
172 | ||
bf03473d PLB |
173 | sdw_slave_debugfs_exit(slave); |
174 | ||
7c3cd189 VK |
175 | mutex_lock(&bus->bus_lock); |
176 | ||
c6056101 | 177 | if (slave->dev_num) { /* clear dev_num if assigned */ |
7c3cd189 | 178 | clear_bit(slave->dev_num, bus->assigned); |
39d80b0e PLB |
179 | if (bus->ops && bus->ops->put_device_num) |
180 | bus->ops->put_device_num(bus, slave); | |
c6056101 | 181 | } |
7c3cd189 VK |
182 | list_del_init(&slave->node); |
183 | mutex_unlock(&bus->bus_lock); | |
184 | ||
185 | device_unregister(dev); | |
186 | return 0; | |
187 | } | |
188 | ||
189 | /** | |
5cab3ff2 | 190 | * sdw_bus_master_delete() - delete the bus master instance |
7c3cd189 VK |
191 | * @bus: bus to be deleted |
192 | * | |
193 | * Remove the instance, delete the child devices. | |
194 | */ | |
5cab3ff2 | 195 | void sdw_bus_master_delete(struct sdw_bus *bus) |
7c3cd189 VK |
196 | { |
197 | device_for_each_child(bus->dev, NULL, sdw_delete_slave); | |
12a95123 | 198 | |
3b6c4a11 | 199 | sdw_irq_delete(bus); |
12a95123 | 200 | |
7ceaa40b | 201 | sdw_master_device_del(bus); |
bf03473d PLB |
202 | |
203 | sdw_bus_debugfs_exit(bus); | |
256a9978 RF |
204 | lockdep_unregister_key(&bus->bus_lock_key); |
205 | lockdep_unregister_key(&bus->msg_lock_key); | |
88de0a8f | 206 | ida_free(&sdw_bus_ida, bus->id); |
7c3cd189 | 207 | } |
5cab3ff2 | 208 | EXPORT_SYMBOL(sdw_bus_master_delete); |
7c3cd189 | 209 | |
9d715fa0 VK |
210 | /* |
211 | * SDW IO Calls | |
212 | */ | |
213 | ||
214 | static inline int find_response_code(enum sdw_command_response resp) | |
215 | { | |
216 | switch (resp) { | |
217 | case SDW_CMD_OK: | |
218 | return 0; | |
219 | ||
220 | case SDW_CMD_IGNORED: | |
221 | return -ENODATA; | |
222 | ||
223 | case SDW_CMD_TIMEOUT: | |
224 | return -ETIMEDOUT; | |
225 | ||
226 | default: | |
227 | return -EIO; | |
228 | } | |
229 | } | |
230 | ||
231 | static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
232 | { | |
233 | int retry = bus->prop.err_threshold; | |
234 | enum sdw_command_response resp; | |
235 | int ret = 0, i; | |
236 | ||
237 | for (i = 0; i <= retry; i++) { | |
238 | resp = bus->ops->xfer_msg(bus, msg); | |
239 | ret = find_response_code(resp); | |
240 | ||
241 | /* if cmd is ok or ignored return */ | |
242 | if (ret == 0 || ret == -ENODATA) | |
243 | return ret; | |
244 | } | |
245 | ||
246 | return ret; | |
247 | } | |
248 | ||
249 | static inline int do_transfer_defer(struct sdw_bus *bus, | |
45cb70f9 | 250 | struct sdw_msg *msg) |
9d715fa0 | 251 | { |
45cb70f9 | 252 | struct sdw_defer *defer = &bus->defer_msg; |
9d715fa0 VK |
253 | int retry = bus->prop.err_threshold; |
254 | enum sdw_command_response resp; | |
255 | int ret = 0, i; | |
256 | ||
257 | defer->msg = msg; | |
258 | defer->length = msg->len; | |
a306a0e4 | 259 | init_completion(&defer->complete); |
9d715fa0 VK |
260 | |
261 | for (i = 0; i <= retry; i++) { | |
66f95de7 | 262 | resp = bus->ops->xfer_msg_defer(bus); |
9d715fa0 VK |
263 | ret = find_response_code(resp); |
264 | /* if cmd is ok or ignored return */ | |
265 | if (ret == 0 || ret == -ENODATA) | |
266 | return ret; | |
267 | } | |
268 | ||
269 | return ret; | |
270 | } | |
271 | ||
a350aff4 PLB |
272 | static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) |
273 | { | |
274 | int ret; | |
275 | ||
276 | ret = do_transfer(bus, msg); | |
277 | if (ret != 0 && ret != -ENODATA) | |
ec475187 BL |
278 | dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", |
279 | msg->dev_num, ret, | |
280 | (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read", | |
281 | msg->addr, msg->len); | |
a350aff4 | 282 | |
a350aff4 PLB |
283 | return ret; |
284 | } | |
285 | ||
9d715fa0 VK |
286 | /** |
287 | * sdw_transfer() - Synchronous transfer message to a SDW Slave device | |
288 | * @bus: SDW bus | |
289 | * @msg: SDW message to be xfered | |
290 | */ | |
291 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
292 | { | |
293 | int ret; | |
294 | ||
295 | mutex_lock(&bus->msg_lock); | |
296 | ||
a350aff4 | 297 | ret = sdw_transfer_unlocked(bus, msg); |
9d715fa0 VK |
298 | |
299 | mutex_unlock(&bus->msg_lock); | |
300 | ||
301 | return ret; | |
302 | } | |
303 | ||
79fe02cb PLB |
304 | /** |
305 | * sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers | |
306 | * @bus: SDW bus | |
307 | * @sync_delay: Delay before reading status | |
308 | */ | |
309 | void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay) | |
310 | { | |
311 | u32 status; | |
312 | ||
313 | if (!bus->ops->read_ping_status) | |
314 | return; | |
315 | ||
316 | /* | |
317 | * wait for peripheral to sync if desired. 10-15ms should be more than | |
318 | * enough in most cases. | |
319 | */ | |
320 | if (sync_delay) | |
321 | usleep_range(10000, 15000); | |
322 | ||
323 | mutex_lock(&bus->msg_lock); | |
324 | ||
325 | status = bus->ops->read_ping_status(bus); | |
326 | ||
327 | mutex_unlock(&bus->msg_lock); | |
328 | ||
329 | if (!status) | |
330 | dev_warn(bus->dev, "%s: no peripherals attached\n", __func__); | |
331 | else | |
332 | dev_dbg(bus->dev, "PING status: %#x\n", status); | |
333 | } | |
334 | EXPORT_SYMBOL(sdw_show_ping_status); | |
335 | ||
9d715fa0 VK |
336 | /** |
337 | * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device | |
338 | * @bus: SDW bus | |
339 | * @msg: SDW message to be xfered | |
9d715fa0 VK |
340 | * |
341 | * Caller needs to hold the msg_lock lock while calling this | |
342 | */ | |
45cb70f9 | 343 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg) |
9d715fa0 VK |
344 | { |
345 | int ret; | |
346 | ||
347 | if (!bus->ops->xfer_msg_defer) | |
348 | return -ENOTSUPP; | |
349 | ||
45cb70f9 | 350 | ret = do_transfer_defer(bus, msg); |
9d715fa0 VK |
351 | if (ret != 0 && ret != -ENODATA) |
352 | dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", | |
73ede046 | 353 | msg->dev_num, ret); |
9d715fa0 | 354 | |
9d715fa0 VK |
355 | return ret; |
356 | } | |
357 | ||
9d715fa0 | 358 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
73ede046 | 359 | u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) |
9d715fa0 VK |
360 | { |
361 | memset(msg, 0, sizeof(*msg)); | |
362 | msg->addr = addr; /* addr is 16 bit and truncated here */ | |
363 | msg->len = count; | |
364 | msg->dev_num = dev_num; | |
365 | msg->flags = flags; | |
366 | msg->buf = buf; | |
9d715fa0 | 367 | |
f779ad09 | 368 | if (addr < SDW_REG_NO_PAGE) /* no paging area */ |
9d715fa0 | 369 | return 0; |
f779ad09 GL |
370 | |
371 | if (addr >= SDW_REG_MAX) { /* illegal addr */ | |
9d715fa0 VK |
372 | pr_err("SDW: Invalid address %x passed\n", addr); |
373 | return -EINVAL; | |
374 | } | |
375 | ||
376 | if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ | |
377 | if (slave && !slave->prop.paging_support) | |
378 | return 0; | |
21c2de29 | 379 | /* no need for else as that will fall-through to paging */ |
9d715fa0 VK |
380 | } |
381 | ||
382 | /* paging mandatory */ | |
383 | if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { | |
384 | pr_err("SDW: Invalid device for paging :%d\n", dev_num); | |
385 | return -EINVAL; | |
386 | } | |
387 | ||
388 | if (!slave) { | |
389 | pr_err("SDW: No slave for paging addr\n"); | |
390 | return -EINVAL; | |
f779ad09 GL |
391 | } |
392 | ||
393 | if (!slave->prop.paging_support) { | |
9d715fa0 | 394 | dev_err(&slave->dev, |
17ed5bef | 395 | "address %x needs paging but no support\n", addr); |
9d715fa0 VK |
396 | return -EINVAL; |
397 | } | |
398 | ||
d5826a4b VK |
399 | msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); |
400 | msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); | |
9d715fa0 VK |
401 | msg->addr |= BIT(15); |
402 | msg->page = true; | |
403 | ||
404 | return 0; | |
405 | } | |
406 | ||
60ee9be2 PLB |
407 | /* |
408 | * Read/Write IO functions. | |
60ee9be2 PLB |
409 | */ |
410 | ||
d005ea71 CK |
411 | static int sdw_ntransfer_no_pm(struct sdw_slave *slave, u32 addr, u8 flags, |
412 | size_t count, u8 *val) | |
413 | { | |
414 | struct sdw_msg msg; | |
415 | size_t size; | |
416 | int ret; | |
417 | ||
418 | while (count) { | |
419 | // Only handle bytes up to next page boundary | |
420 | size = min_t(size_t, count, (SDW_REGADDR + 1) - (addr & SDW_REGADDR)); | |
421 | ||
422 | ret = sdw_fill_msg(&msg, slave, addr, size, slave->dev_num, flags, val); | |
423 | if (ret < 0) | |
424 | return ret; | |
425 | ||
426 | ret = sdw_transfer(slave->bus, &msg); | |
427 | if (ret < 0 && !slave->is_mockup_device) | |
428 | return ret; | |
429 | ||
430 | addr += size; | |
431 | val += size; | |
432 | count -= size; | |
433 | } | |
434 | ||
435 | return 0; | |
436 | } | |
437 | ||
d94e1e01 CK |
438 | /** |
439 | * sdw_nread_no_pm() - Read "n" contiguous SDW Slave registers with no PM | |
440 | * @slave: SDW Slave | |
441 | * @addr: Register address | |
442 | * @count: length | |
443 | * @val: Buffer for values to be read | |
d005ea71 CK |
444 | * |
445 | * Note that if the message crosses a page boundary each page will be | |
446 | * transferred under a separate invocation of the msg_lock. | |
d94e1e01 | 447 | */ |
62dc9f3f | 448 | int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) |
60ee9be2 | 449 | { |
d005ea71 | 450 | return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_READ, count, val); |
60ee9be2 | 451 | } |
62dc9f3f | 452 | EXPORT_SYMBOL(sdw_nread_no_pm); |
60ee9be2 | 453 | |
d94e1e01 CK |
454 | /** |
455 | * sdw_nwrite_no_pm() - Write "n" contiguous SDW Slave registers with no PM | |
456 | * @slave: SDW Slave | |
457 | * @addr: Register address | |
458 | * @count: length | |
459 | * @val: Buffer for values to be written | |
d005ea71 CK |
460 | * |
461 | * Note that if the message crosses a page boundary each page will be | |
462 | * transferred under a separate invocation of the msg_lock. | |
d94e1e01 | 463 | */ |
62dc9f3f | 464 | int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
60ee9be2 | 465 | { |
d005ea71 | 466 | return sdw_ntransfer_no_pm(slave, addr, SDW_MSG_FLAG_WRITE, count, (u8 *)val); |
60ee9be2 | 467 | } |
62dc9f3f | 468 | EXPORT_SYMBOL(sdw_nwrite_no_pm); |
60ee9be2 | 469 | |
d94e1e01 CK |
470 | /** |
471 | * sdw_write_no_pm() - Write a SDW Slave register with no PM | |
472 | * @slave: SDW Slave | |
473 | * @addr: Register address | |
474 | * @value: Register value | |
475 | */ | |
167790ab | 476 | int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) |
60ee9be2 PLB |
477 | { |
478 | return sdw_nwrite_no_pm(slave, addr, 1, &value); | |
479 | } | |
167790ab | 480 | EXPORT_SYMBOL(sdw_write_no_pm); |
60ee9be2 | 481 | |
0231453b RW |
482 | static int |
483 | sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) | |
484 | { | |
485 | struct sdw_msg msg; | |
486 | u8 buf; | |
487 | int ret; | |
488 | ||
489 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
490 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 491 | if (ret < 0) |
0231453b RW |
492 | return ret; |
493 | ||
494 | ret = sdw_transfer(bus, &msg); | |
495 | if (ret < 0) | |
496 | return ret; | |
f779ad09 GL |
497 | |
498 | return buf; | |
0231453b RW |
499 | } |
500 | ||
501 | static int | |
502 | sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
503 | { | |
504 | struct sdw_msg msg; | |
505 | int ret; | |
506 | ||
507 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
508 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 509 | if (ret < 0) |
0231453b RW |
510 | return ret; |
511 | ||
512 | return sdw_transfer(bus, &msg); | |
513 | } | |
514 | ||
a350aff4 PLB |
515 | int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) |
516 | { | |
517 | struct sdw_msg msg; | |
518 | u8 buf; | |
519 | int ret; | |
520 | ||
521 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
522 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 523 | if (ret < 0) |
a350aff4 PLB |
524 | return ret; |
525 | ||
526 | ret = sdw_transfer_unlocked(bus, &msg); | |
527 | if (ret < 0) | |
528 | return ret; | |
529 | ||
530 | return buf; | |
531 | } | |
532 | EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); | |
533 | ||
534 | int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
535 | { | |
536 | struct sdw_msg msg; | |
537 | int ret; | |
538 | ||
539 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
540 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 541 | if (ret < 0) |
a350aff4 PLB |
542 | return ret; |
543 | ||
544 | return sdw_transfer_unlocked(bus, &msg); | |
545 | } | |
546 | EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); | |
547 | ||
d94e1e01 CK |
548 | /** |
549 | * sdw_read_no_pm() - Read a SDW Slave register with no PM | |
550 | * @slave: SDW Slave | |
551 | * @addr: Register address | |
552 | */ | |
167790ab | 553 | int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) |
0231453b RW |
554 | { |
555 | u8 buf; | |
556 | int ret; | |
557 | ||
558 | ret = sdw_nread_no_pm(slave, addr, 1, &buf); | |
559 | if (ret < 0) | |
560 | return ret; | |
561 | else | |
562 | return buf; | |
563 | } | |
167790ab | 564 | EXPORT_SYMBOL(sdw_read_no_pm); |
0231453b | 565 | |
d38ebaf2 | 566 | int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
b04c975e PLB |
567 | { |
568 | int tmp; | |
569 | ||
570 | tmp = sdw_read_no_pm(slave, addr); | |
571 | if (tmp < 0) | |
572 | return tmp; | |
573 | ||
574 | tmp = (tmp & ~mask) | val; | |
575 | return sdw_write_no_pm(slave, addr, tmp); | |
576 | } | |
d38ebaf2 PLB |
577 | EXPORT_SYMBOL(sdw_update_no_pm); |
578 | ||
579 | /* Read-Modify-Write Slave register */ | |
580 | int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) | |
581 | { | |
582 | int tmp; | |
583 | ||
584 | tmp = sdw_read(slave, addr); | |
585 | if (tmp < 0) | |
586 | return tmp; | |
587 | ||
588 | tmp = (tmp & ~mask) | val; | |
589 | return sdw_write(slave, addr, tmp); | |
590 | } | |
591 | EXPORT_SYMBOL(sdw_update); | |
b04c975e | 592 | |
9d715fa0 VK |
593 | /** |
594 | * sdw_nread() - Read "n" contiguous SDW Slave registers | |
595 | * @slave: SDW Slave | |
596 | * @addr: Register address | |
597 | * @count: length | |
598 | * @val: Buffer for values to be read | |
d94e1e01 CK |
599 | * |
600 | * This version of the function will take a PM reference to the slave | |
601 | * device. | |
d005ea71 CK |
602 | * Note that if the message crosses a page boundary each page will be |
603 | * transferred under a separate invocation of the msg_lock. | |
9d715fa0 VK |
604 | */ |
605 | int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) | |
606 | { | |
9d715fa0 VK |
607 | int ret; |
608 | ||
e9537962 RF |
609 | ret = pm_runtime_get_sync(&slave->dev); |
610 | if (ret < 0 && ret != -EACCES) { | |
611 | pm_runtime_put_noidle(&slave->dev); | |
9d715fa0 | 612 | return ret; |
e9537962 | 613 | } |
60ee9be2 PLB |
614 | |
615 | ret = sdw_nread_no_pm(slave, addr, count, val); | |
9d715fa0 | 616 | |
973794e8 PLB |
617 | pm_runtime_mark_last_busy(&slave->dev); |
618 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
619 | |
620 | return ret; | |
621 | } | |
622 | EXPORT_SYMBOL(sdw_nread); | |
623 | ||
624 | /** | |
625 | * sdw_nwrite() - Write "n" contiguous SDW Slave registers | |
626 | * @slave: SDW Slave | |
627 | * @addr: Register address | |
628 | * @count: length | |
031e668b | 629 | * @val: Buffer for values to be written |
d94e1e01 CK |
630 | * |
631 | * This version of the function will take a PM reference to the slave | |
632 | * device. | |
d005ea71 CK |
633 | * Note that if the message crosses a page boundary each page will be |
634 | * transferred under a separate invocation of the msg_lock. | |
9d715fa0 | 635 | */ |
031e668b | 636 | int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
9d715fa0 | 637 | { |
9d715fa0 VK |
638 | int ret; |
639 | ||
e9537962 RF |
640 | ret = pm_runtime_get_sync(&slave->dev); |
641 | if (ret < 0 && ret != -EACCES) { | |
642 | pm_runtime_put_noidle(&slave->dev); | |
9d715fa0 | 643 | return ret; |
e9537962 | 644 | } |
60ee9be2 PLB |
645 | |
646 | ret = sdw_nwrite_no_pm(slave, addr, count, val); | |
9d715fa0 | 647 | |
973794e8 PLB |
648 | pm_runtime_mark_last_busy(&slave->dev); |
649 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
650 | |
651 | return ret; | |
652 | } | |
653 | EXPORT_SYMBOL(sdw_nwrite); | |
654 | ||
655 | /** | |
656 | * sdw_read() - Read a SDW Slave register | |
657 | * @slave: SDW Slave | |
658 | * @addr: Register address | |
d94e1e01 CK |
659 | * |
660 | * This version of the function will take a PM reference to the slave | |
661 | * device. | |
9d715fa0 VK |
662 | */ |
663 | int sdw_read(struct sdw_slave *slave, u32 addr) | |
664 | { | |
665 | u8 buf; | |
666 | int ret; | |
667 | ||
668 | ret = sdw_nread(slave, addr, 1, &buf); | |
669 | if (ret < 0) | |
670 | return ret; | |
f779ad09 GL |
671 | |
672 | return buf; | |
9d715fa0 VK |
673 | } |
674 | EXPORT_SYMBOL(sdw_read); | |
675 | ||
676 | /** | |
677 | * sdw_write() - Write a SDW Slave register | |
678 | * @slave: SDW Slave | |
679 | * @addr: Register address | |
680 | * @value: Register value | |
d94e1e01 CK |
681 | * |
682 | * This version of the function will take a PM reference to the slave | |
683 | * device. | |
9d715fa0 VK |
684 | */ |
685 | int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) | |
686 | { | |
687 | return sdw_nwrite(slave, addr, 1, &value); | |
9d715fa0 VK |
688 | } |
689 | EXPORT_SYMBOL(sdw_write); | |
690 | ||
d52d7a1b SK |
691 | /* |
692 | * SDW alert handling | |
693 | */ | |
694 | ||
695 | /* called with bus_lock held */ | |
696 | static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) | |
697 | { | |
1429cc26 | 698 | struct sdw_slave *slave; |
d52d7a1b SK |
699 | |
700 | list_for_each_entry(slave, &bus->slaves, node) { | |
701 | if (slave->dev_num == i) | |
702 | return slave; | |
703 | } | |
704 | ||
705 | return NULL; | |
706 | } | |
707 | ||
01ad444e | 708 | int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) |
d52d7a1b | 709 | { |
2e8c4ad1 | 710 | if (slave->id.mfg_id != id.mfg_id || |
09830d5e | 711 | slave->id.part_id != id.part_id || |
2e8c4ad1 PLB |
712 | slave->id.class_id != id.class_id || |
713 | (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && | |
714 | slave->id.unique_id != id.unique_id)) | |
d52d7a1b SK |
715 | return -ENODEV; |
716 | ||
717 | return 0; | |
718 | } | |
01ad444e | 719 | EXPORT_SYMBOL(sdw_compare_devid); |
d52d7a1b SK |
720 | |
721 | /* called with bus_lock held */ | |
722 | static int sdw_get_device_num(struct sdw_slave *slave) | |
723 | { | |
39d80b0e | 724 | struct sdw_bus *bus = slave->bus; |
d52d7a1b SK |
725 | int bit; |
726 | ||
39d80b0e PLB |
727 | if (bus->ops && bus->ops->get_device_num) { |
728 | bit = bus->ops->get_device_num(bus, slave); | |
c6056101 PLB |
729 | if (bit < 0) |
730 | goto err; | |
731 | } else { | |
39d80b0e | 732 | bit = find_first_zero_bit(bus->assigned, SDW_MAX_DEVICES); |
c6056101 PLB |
733 | if (bit == SDW_MAX_DEVICES) { |
734 | bit = -ENODEV; | |
735 | goto err; | |
736 | } | |
d52d7a1b SK |
737 | } |
738 | ||
739 | /* | |
740 | * Do not update dev_num in Slave data structure here, | |
741 | * Update once program dev_num is successful | |
742 | */ | |
39d80b0e | 743 | set_bit(bit, bus->assigned); |
d52d7a1b SK |
744 | |
745 | err: | |
746 | return bit; | |
747 | } | |
748 | ||
749 | static int sdw_assign_device_num(struct sdw_slave *slave) | |
750 | { | |
6d7a1ff7 | 751 | struct sdw_bus *bus = slave->bus; |
d52d7a1b | 752 | int ret, dev_num; |
fd6a3ac8 | 753 | bool new_device = false; |
d52d7a1b SK |
754 | |
755 | /* check first if device number is assigned, if so reuse that */ | |
756 | if (!slave->dev_num) { | |
fd6a3ac8 PLB |
757 | if (!slave->dev_num_sticky) { |
758 | mutex_lock(&slave->bus->bus_lock); | |
759 | dev_num = sdw_get_device_num(slave); | |
760 | mutex_unlock(&slave->bus->bus_lock); | |
761 | if (dev_num < 0) { | |
6d7a1ff7 | 762 | dev_err(bus->dev, "Get dev_num failed: %d\n", |
fd6a3ac8 PLB |
763 | dev_num); |
764 | return dev_num; | |
765 | } | |
766 | slave->dev_num = dev_num; | |
767 | slave->dev_num_sticky = dev_num; | |
768 | new_device = true; | |
769 | } else { | |
770 | slave->dev_num = slave->dev_num_sticky; | |
d52d7a1b | 771 | } |
fd6a3ac8 PLB |
772 | } |
773 | ||
774 | if (!new_device) | |
6d7a1ff7 | 775 | dev_dbg(bus->dev, |
f48f4fd9 PLB |
776 | "Slave already registered, reusing dev_num:%d\n", |
777 | slave->dev_num); | |
d52d7a1b | 778 | |
fd6a3ac8 PLB |
779 | /* Clear the slave->dev_num to transfer message on device 0 */ |
780 | dev_num = slave->dev_num; | |
781 | slave->dev_num = 0; | |
d52d7a1b | 782 | |
d300de4f | 783 | ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num); |
d52d7a1b | 784 | if (ret < 0) { |
6d7a1ff7 | 785 | dev_err(bus->dev, "Program device_num %d failed: %d\n", |
6e0ac6a6 | 786 | dev_num, ret); |
d52d7a1b SK |
787 | return ret; |
788 | } | |
789 | ||
790 | /* After xfer of msg, restore dev_num */ | |
fd6a3ac8 | 791 | slave->dev_num = slave->dev_num_sticky; |
d52d7a1b | 792 | |
6bac0d8d | 793 | if (bus->ops && bus->ops->new_peripheral_assigned) |
23afc82f | 794 | bus->ops->new_peripheral_assigned(bus, slave, dev_num); |
6bac0d8d | 795 | |
d52d7a1b SK |
796 | return 0; |
797 | } | |
798 | ||
7c3cd189 | 799 | void sdw_extract_slave_id(struct sdw_bus *bus, |
73ede046 | 800 | u64 addr, struct sdw_slave_id *id) |
7c3cd189 | 801 | { |
17ed5bef | 802 | dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); |
7c3cd189 | 803 | |
2c6cff68 PLB |
804 | id->sdw_version = SDW_VERSION(addr); |
805 | id->unique_id = SDW_UNIQUE_ID(addr); | |
806 | id->mfg_id = SDW_MFG_ID(addr); | |
807 | id->part_id = SDW_PART_ID(addr); | |
808 | id->class_id = SDW_CLASS_ID(addr); | |
7c3cd189 VK |
809 | |
810 | dev_dbg(bus->dev, | |
c397efb7 PLB |
811 | "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", |
812 | id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); | |
7c3cd189 | 813 | } |
01ad444e | 814 | EXPORT_SYMBOL(sdw_extract_slave_id); |
d52d7a1b | 815 | |
72124f07 | 816 | static int sdw_program_device_num(struct sdw_bus *bus, bool *programmed) |
d52d7a1b SK |
817 | { |
818 | u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; | |
819 | struct sdw_slave *slave, *_s; | |
820 | struct sdw_slave_id id; | |
821 | struct sdw_msg msg; | |
f03690f4 | 822 | bool found; |
d52d7a1b SK |
823 | int count = 0, ret; |
824 | u64 addr; | |
825 | ||
72124f07 RF |
826 | *programmed = false; |
827 | ||
d52d7a1b SK |
828 | /* No Slave, so use raw xfer api */ |
829 | ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, | |
73ede046 | 830 | SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); |
d52d7a1b SK |
831 | if (ret < 0) |
832 | return ret; | |
833 | ||
834 | do { | |
835 | ret = sdw_transfer(bus, &msg); | |
836 | if (ret == -ENODATA) { /* end of device id reads */ | |
6e0ac6a6 | 837 | dev_dbg(bus->dev, "No more devices to enumerate\n"); |
d52d7a1b SK |
838 | ret = 0; |
839 | break; | |
840 | } | |
841 | if (ret < 0) { | |
842 | dev_err(bus->dev, "DEVID read fail:%d\n", ret); | |
843 | break; | |
844 | } | |
845 | ||
846 | /* | |
847 | * Construct the addr and extract. Cast the higher shift | |
848 | * bits to avoid truncation due to size limit. | |
849 | */ | |
850 | addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | | |
0132af05 CIK |
851 | ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | |
852 | ((u64)buf[0] << 40); | |
d52d7a1b SK |
853 | |
854 | sdw_extract_slave_id(bus, addr, &id); | |
855 | ||
f03690f4 | 856 | found = false; |
d52d7a1b SK |
857 | /* Now compare with entries */ |
858 | list_for_each_entry_safe(slave, _s, &bus->slaves, node) { | |
859 | if (sdw_compare_devid(slave, id) == 0) { | |
860 | found = true; | |
861 | ||
7297f8fa RF |
862 | /* |
863 | * To prevent skipping state-machine stages don't | |
864 | * program a device until we've seen it UNATTACH. | |
865 | * Must return here because no other device on #0 | |
866 | * can be detected until this one has been | |
867 | * assigned a device ID. | |
868 | */ | |
869 | if (slave->status != SDW_SLAVE_UNATTACHED) | |
870 | return 0; | |
871 | ||
d52d7a1b SK |
872 | /* |
873 | * Assign a new dev_num to this Slave and | |
874 | * not mark it present. It will be marked | |
875 | * present after it reports ATTACHED on new | |
876 | * dev_num | |
877 | */ | |
878 | ret = sdw_assign_device_num(slave); | |
a5759f19 | 879 | if (ret < 0) { |
6d7a1ff7 | 880 | dev_err(bus->dev, |
17ed5bef | 881 | "Assign dev_num failed:%d\n", |
d52d7a1b SK |
882 | ret); |
883 | return ret; | |
884 | } | |
885 | ||
72124f07 RF |
886 | *programmed = true; |
887 | ||
d52d7a1b SK |
888 | break; |
889 | } | |
890 | } | |
891 | ||
d7b956b6 | 892 | if (!found) { |
d52d7a1b | 893 | /* TODO: Park this device in Group 13 */ |
fcb9d730 SK |
894 | |
895 | /* | |
896 | * add Slave device even if there is no platform | |
897 | * firmware description. There will be no driver probe | |
898 | * but the user/integration will be able to see the | |
899 | * device, enumeration status and device number in sysfs | |
900 | */ | |
901 | sdw_slave_add(bus, &id, NULL); | |
902 | ||
17ed5bef | 903 | dev_err(bus->dev, "Slave Entry not found\n"); |
d52d7a1b SK |
904 | } |
905 | ||
906 | count++; | |
907 | ||
908 | /* | |
909 | * Check till error out or retry (count) exhausts. | |
910 | * Device can drop off and rejoin during enumeration | |
911 | * so count till twice the bound. | |
912 | */ | |
913 | ||
914 | } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); | |
915 | ||
916 | return ret; | |
917 | } | |
918 | ||
919 | static void sdw_modify_slave_status(struct sdw_slave *slave, | |
73ede046 | 920 | enum sdw_slave_status status) |
d52d7a1b | 921 | { |
6d7a1ff7 PLB |
922 | struct sdw_bus *bus = slave->bus; |
923 | ||
924 | mutex_lock(&bus->bus_lock); | |
fb9469e5 | 925 | |
6d7a1ff7 | 926 | dev_vdbg(bus->dev, |
9af8c36a PLB |
927 | "changing status slave %d status %d new status %d\n", |
928 | slave->dev_num, slave->status, status); | |
fb9469e5 PLB |
929 | |
930 | if (status == SDW_SLAVE_UNATTACHED) { | |
931 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
932 | "initializing enumeration and init completion for Slave %d\n", |
933 | slave->dev_num); | |
fb9469e5 | 934 | |
c40d6b32 JH |
935 | reinit_completion(&slave->enumeration_complete); |
936 | reinit_completion(&slave->initialization_complete); | |
fb9469e5 PLB |
937 | |
938 | } else if ((status == SDW_SLAVE_ATTACHED) && | |
939 | (slave->status == SDW_SLAVE_UNATTACHED)) { | |
940 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
941 | "signaling enumeration completion for Slave %d\n", |
942 | slave->dev_num); | |
fb9469e5 | 943 | |
c40d6b32 | 944 | complete_all(&slave->enumeration_complete); |
fb9469e5 | 945 | } |
d52d7a1b | 946 | slave->status = status; |
6d7a1ff7 | 947 | mutex_unlock(&bus->bus_lock); |
d52d7a1b SK |
948 | } |
949 | ||
0231453b RW |
950 | static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, |
951 | enum sdw_clk_stop_mode mode, | |
952 | enum sdw_clk_stop_type type) | |
953 | { | |
bd29c00e | 954 | int ret = 0; |
0231453b | 955 | |
bd29c00e PLB |
956 | mutex_lock(&slave->sdw_dev_lock); |
957 | ||
958 | if (slave->probed) { | |
959 | struct device *dev = &slave->dev; | |
960 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
961 | ||
962 | if (drv->ops && drv->ops->clk_stop) | |
963 | ret = drv->ops->clk_stop(slave, mode, type); | |
0231453b RW |
964 | } |
965 | ||
bd29c00e PLB |
966 | mutex_unlock(&slave->sdw_dev_lock); |
967 | ||
968 | return ret; | |
0231453b RW |
969 | } |
970 | ||
971 | static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, | |
972 | enum sdw_clk_stop_mode mode, | |
973 | bool prepare) | |
974 | { | |
975 | bool wake_en; | |
976 | u32 val = 0; | |
977 | int ret; | |
978 | ||
979 | wake_en = slave->prop.wake_capable; | |
980 | ||
981 | if (prepare) { | |
982 | val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; | |
983 | ||
984 | if (mode == SDW_CLK_STOP_MODE1) | |
985 | val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; | |
986 | ||
987 | if (wake_en) | |
988 | val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; | |
989 | } else { | |
665cf215 PLB |
990 | ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); |
991 | if (ret < 0) { | |
b50bb8ba PLB |
992 | if (ret != -ENODATA) |
993 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); | |
665cf215 PLB |
994 | return ret; |
995 | } | |
996 | val = ret; | |
0231453b RW |
997 | val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); |
998 | } | |
999 | ||
1000 | ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); | |
1001 | ||
b50bb8ba PLB |
1002 | if (ret < 0 && ret != -ENODATA) |
1003 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret); | |
0231453b RW |
1004 | |
1005 | return ret; | |
1006 | } | |
1007 | ||
ff435da4 | 1008 | static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num, bool prepare) |
0231453b RW |
1009 | { |
1010 | int retry = bus->clk_stop_timeout; | |
1011 | int val; | |
1012 | ||
1013 | do { | |
665cf215 PLB |
1014 | val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); |
1015 | if (val < 0) { | |
9f9bc7d5 PLB |
1016 | if (val != -ENODATA) |
1017 | dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); | |
665cf215 PLB |
1018 | return val; |
1019 | } | |
1020 | val &= SDW_SCP_STAT_CLK_STP_NF; | |
0231453b | 1021 | if (!val) { |
ff435da4 PLB |
1022 | dev_dbg(bus->dev, "clock stop %s done slave:%d\n", |
1023 | prepare ? "prepare" : "deprepare", | |
af7254b4 | 1024 | dev_num); |
0231453b RW |
1025 | return 0; |
1026 | } | |
1027 | ||
1028 | usleep_range(1000, 1500); | |
1029 | retry--; | |
1030 | } while (retry); | |
1031 | ||
ff435da4 PLB |
1032 | dev_dbg(bus->dev, "clock stop %s did not complete for slave:%d\n", |
1033 | prepare ? "prepare" : "deprepare", | |
0231453b RW |
1034 | dev_num); |
1035 | ||
1036 | return -ETIMEDOUT; | |
1037 | } | |
1038 | ||
1039 | /** | |
1040 | * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop | |
1041 | * | |
1042 | * @bus: SDW bus instance | |
1043 | * | |
1044 | * Query Slave for clock stop mode and prepare for that mode. | |
1045 | */ | |
1046 | int sdw_bus_prep_clk_stop(struct sdw_bus *bus) | |
1047 | { | |
0231453b RW |
1048 | bool simple_clk_stop = true; |
1049 | struct sdw_slave *slave; | |
1050 | bool is_slave = false; | |
1051 | int ret = 0; | |
1052 | ||
1053 | /* | |
1054 | * In order to save on transition time, prepare | |
1055 | * each Slave and then wait for all Slave(s) to be | |
1056 | * prepared for clock stop. | |
b50bb8ba PLB |
1057 | * If one of the Slave devices has lost sync and |
1058 | * replies with Command Ignored/-ENODATA, we continue | |
1059 | * the loop | |
0231453b RW |
1060 | */ |
1061 | list_for_each_entry(slave, &bus->slaves, node) { | |
1062 | if (!slave->dev_num) | |
1063 | continue; | |
1064 | ||
0231453b RW |
1065 | if (slave->status != SDW_SLAVE_ATTACHED && |
1066 | slave->status != SDW_SLAVE_ALERT) | |
1067 | continue; | |
1068 | ||
929cfee3 BL |
1069 | /* Identify if Slave(s) are available on Bus */ |
1070 | is_slave = true; | |
1071 | ||
345e9f5c PLB |
1072 | ret = sdw_slave_clk_stop_callback(slave, |
1073 | SDW_CLK_STOP_MODE0, | |
0231453b | 1074 | SDW_CLK_PRE_PREPARE); |
b50bb8ba PLB |
1075 | if (ret < 0 && ret != -ENODATA) { |
1076 | dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret); | |
0231453b RW |
1077 | return ret; |
1078 | } | |
1079 | ||
345e9f5c PLB |
1080 | /* Only prepare a Slave device if needed */ |
1081 | if (!slave->prop.simple_clk_stop_capable) { | |
0231453b | 1082 | simple_clk_stop = false; |
345e9f5c PLB |
1083 | |
1084 | ret = sdw_slave_clk_stop_prepare(slave, | |
1085 | SDW_CLK_STOP_MODE0, | |
1086 | true); | |
b50bb8ba PLB |
1087 | if (ret < 0 && ret != -ENODATA) { |
1088 | dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret); | |
345e9f5c PLB |
1089 | return ret; |
1090 | } | |
1091 | } | |
0231453b RW |
1092 | } |
1093 | ||
18de2f72 CS |
1094 | /* Skip remaining clock stop preparation if no Slave is attached */ |
1095 | if (!is_slave) | |
b50bb8ba | 1096 | return 0; |
18de2f72 | 1097 | |
345e9f5c PLB |
1098 | /* |
1099 | * Don't wait for all Slaves to be ready if they follow the simple | |
1100 | * state machine | |
1101 | */ | |
18de2f72 | 1102 | if (!simple_clk_stop) { |
0231453b | 1103 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, |
ff435da4 | 1104 | SDW_BROADCAST_DEV_NUM, true); |
b50bb8ba PLB |
1105 | /* |
1106 | * if there are no Slave devices present and the reply is | |
1107 | * Command_Ignored/-ENODATA, we don't need to continue with the | |
1108 | * flow and can just return here. The error code is not modified | |
1109 | * and its handling left as an exercise for the caller. | |
1110 | */ | |
0231453b RW |
1111 | if (ret < 0) |
1112 | return ret; | |
1113 | } | |
1114 | ||
1115 | /* Inform slaves that prep is done */ | |
1116 | list_for_each_entry(slave, &bus->slaves, node) { | |
1117 | if (!slave->dev_num) | |
1118 | continue; | |
1119 | ||
1120 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1121 | slave->status != SDW_SLAVE_ALERT) | |
1122 | continue; | |
1123 | ||
345e9f5c PLB |
1124 | ret = sdw_slave_clk_stop_callback(slave, |
1125 | SDW_CLK_STOP_MODE0, | |
1126 | SDW_CLK_POST_PREPARE); | |
0231453b | 1127 | |
b50bb8ba PLB |
1128 | if (ret < 0 && ret != -ENODATA) { |
1129 | dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret); | |
1130 | return ret; | |
0231453b RW |
1131 | } |
1132 | } | |
1133 | ||
b50bb8ba | 1134 | return 0; |
0231453b RW |
1135 | } |
1136 | EXPORT_SYMBOL(sdw_bus_prep_clk_stop); | |
1137 | ||
1138 | /** | |
1139 | * sdw_bus_clk_stop: stop bus clock | |
1140 | * | |
1141 | * @bus: SDW bus instance | |
1142 | * | |
1143 | * After preparing the Slaves for clock stop, stop the clock by broadcasting | |
1144 | * write to SCP_CTRL register. | |
1145 | */ | |
1146 | int sdw_bus_clk_stop(struct sdw_bus *bus) | |
1147 | { | |
1148 | int ret; | |
1149 | ||
1150 | /* | |
1151 | * broadcast clock stop now, attached Slaves will ACK this, | |
1152 | * unattached will ignore | |
1153 | */ | |
1154 | ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, | |
1155 | SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); | |
1156 | if (ret < 0) { | |
b50bb8ba PLB |
1157 | if (ret != -ENODATA) |
1158 | dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret); | |
0231453b RW |
1159 | return ret; |
1160 | } | |
1161 | ||
1162 | return 0; | |
1163 | } | |
1164 | EXPORT_SYMBOL(sdw_bus_clk_stop); | |
1165 | ||
1166 | /** | |
1167 | * sdw_bus_exit_clk_stop: Exit clock stop mode | |
1168 | * | |
1169 | * @bus: SDW bus instance | |
1170 | * | |
1171 | * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves | |
1172 | * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate | |
1173 | * back. | |
1174 | */ | |
1175 | int sdw_bus_exit_clk_stop(struct sdw_bus *bus) | |
1176 | { | |
0231453b RW |
1177 | bool simple_clk_stop = true; |
1178 | struct sdw_slave *slave; | |
1179 | bool is_slave = false; | |
1180 | int ret; | |
1181 | ||
1182 | /* | |
1183 | * In order to save on transition time, de-prepare | |
1184 | * each Slave and then wait for all Slave(s) to be | |
1185 | * de-prepared after clock resume. | |
1186 | */ | |
1187 | list_for_each_entry(slave, &bus->slaves, node) { | |
1188 | if (!slave->dev_num) | |
1189 | continue; | |
1190 | ||
0231453b RW |
1191 | if (slave->status != SDW_SLAVE_ATTACHED && |
1192 | slave->status != SDW_SLAVE_ALERT) | |
1193 | continue; | |
1194 | ||
929cfee3 BL |
1195 | /* Identify if Slave(s) are available on Bus */ |
1196 | is_slave = true; | |
1197 | ||
345e9f5c | 1198 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
0231453b RW |
1199 | SDW_CLK_PRE_DEPREPARE); |
1200 | if (ret < 0) | |
b50bb8ba | 1201 | dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret); |
0231453b | 1202 | |
345e9f5c PLB |
1203 | /* Only de-prepare a Slave device if needed */ |
1204 | if (!slave->prop.simple_clk_stop_capable) { | |
1205 | simple_clk_stop = false; | |
0231453b | 1206 | |
345e9f5c PLB |
1207 | ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0, |
1208 | false); | |
0231453b | 1209 | |
345e9f5c | 1210 | if (ret < 0) |
b50bb8ba | 1211 | dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret); |
345e9f5c | 1212 | } |
0231453b RW |
1213 | } |
1214 | ||
18de2f72 | 1215 | /* Skip remaining clock stop de-preparation if no Slave is attached */ |
929cfee3 BL |
1216 | if (!is_slave) |
1217 | return 0; | |
1218 | ||
345e9f5c PLB |
1219 | /* |
1220 | * Don't wait for all Slaves to be ready if they follow the simple | |
1221 | * state machine | |
1222 | */ | |
b50bb8ba | 1223 | if (!simple_clk_stop) { |
ff435da4 | 1224 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM, false); |
b50bb8ba | 1225 | if (ret < 0) |
4cbbe74d | 1226 | dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret); |
b50bb8ba | 1227 | } |
18de2f72 | 1228 | |
0231453b RW |
1229 | list_for_each_entry(slave, &bus->slaves, node) { |
1230 | if (!slave->dev_num) | |
1231 | continue; | |
1232 | ||
1233 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1234 | slave->status != SDW_SLAVE_ALERT) | |
1235 | continue; | |
1236 | ||
b50bb8ba PLB |
1237 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
1238 | SDW_CLK_POST_DEPREPARE); | |
1239 | if (ret < 0) | |
1240 | dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret); | |
0231453b RW |
1241 | } |
1242 | ||
1243 | return 0; | |
1244 | } | |
1245 | EXPORT_SYMBOL(sdw_bus_exit_clk_stop); | |
1246 | ||
79df15b7 | 1247 | int sdw_configure_dpn_intr(struct sdw_slave *slave, |
73ede046 | 1248 | int port, bool enable, int mask) |
79df15b7 SK |
1249 | { |
1250 | u32 addr; | |
1251 | int ret; | |
1252 | u8 val = 0; | |
1253 | ||
dd87a72a PLB |
1254 | if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { |
1255 | dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", | |
1256 | enable ? "on" : "off"); | |
1257 | mask |= SDW_DPN_INT_TEST_FAIL; | |
1258 | } | |
1259 | ||
79df15b7 SK |
1260 | addr = SDW_DPN_INTMASK(port); |
1261 | ||
1262 | /* Set/Clear port ready interrupt mask */ | |
1263 | if (enable) { | |
1264 | val |= mask; | |
1265 | val |= SDW_DPN_INT_PORT_READY; | |
1266 | } else { | |
1267 | val &= ~(mask); | |
1268 | val &= ~SDW_DPN_INT_PORT_READY; | |
1269 | } | |
1270 | ||
545c3651 | 1271 | ret = sdw_update_no_pm(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); |
79df15b7 | 1272 | if (ret < 0) |
6d7a1ff7 | 1273 | dev_err(&slave->dev, |
17ed5bef | 1274 | "SDW_DPN_INTMASK write failed:%d\n", val); |
79df15b7 SK |
1275 | |
1276 | return ret; | |
1277 | } | |
1278 | ||
29d158f9 PLB |
1279 | static int sdw_slave_set_frequency(struct sdw_slave *slave) |
1280 | { | |
1281 | u32 mclk_freq = slave->bus->prop.mclk_freq; | |
1282 | u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; | |
1283 | unsigned int scale; | |
1284 | u8 scale_index; | |
1285 | u8 base; | |
1286 | int ret; | |
1287 | ||
1288 | /* | |
1289 | * frequency base and scale registers are required for SDCA | |
ffa17265 PLB |
1290 | * devices. They may also be used for 1.2+/non-SDCA devices. |
1291 | * Driver can set the property, we will need a DisCo property | |
1292 | * to discover this case from platform firmware. | |
29d158f9 | 1293 | */ |
ffa17265 | 1294 | if (!slave->id.class_id && !slave->prop.clock_reg_supported) |
29d158f9 PLB |
1295 | return 0; |
1296 | ||
1297 | if (!mclk_freq) { | |
1298 | dev_err(&slave->dev, | |
1299 | "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); | |
1300 | return -EINVAL; | |
1301 | } | |
1302 | ||
1303 | /* | |
1304 | * map base frequency using Table 89 of SoundWire 1.2 spec. | |
1305 | * The order of the tests just follows the specification, this | |
1306 | * is not a selection between possible values or a search for | |
1307 | * the best value but just a mapping. Only one case per platform | |
1308 | * is relevant. | |
1309 | * Some BIOS have inconsistent values for mclk_freq but a | |
1310 | * correct root so we force the mclk_freq to avoid variations. | |
1311 | */ | |
1312 | if (!(19200000 % mclk_freq)) { | |
1313 | mclk_freq = 19200000; | |
1314 | base = SDW_SCP_BASE_CLOCK_19200000_HZ; | |
29d158f9 PLB |
1315 | } else if (!(22579200 % mclk_freq)) { |
1316 | mclk_freq = 22579200; | |
1317 | base = SDW_SCP_BASE_CLOCK_22579200_HZ; | |
7eca9c72 PLB |
1318 | } else if (!(24576000 % mclk_freq)) { |
1319 | mclk_freq = 24576000; | |
1320 | base = SDW_SCP_BASE_CLOCK_24576000_HZ; | |
29d158f9 PLB |
1321 | } else if (!(32000000 % mclk_freq)) { |
1322 | mclk_freq = 32000000; | |
1323 | base = SDW_SCP_BASE_CLOCK_32000000_HZ; | |
7eca9c72 PLB |
1324 | } else if (!(96000000 % mclk_freq)) { |
1325 | mclk_freq = 24000000; | |
1326 | base = SDW_SCP_BASE_CLOCK_24000000_HZ; | |
29d158f9 PLB |
1327 | } else { |
1328 | dev_err(&slave->dev, | |
1329 | "Unsupported clock base, mclk %d\n", | |
1330 | mclk_freq); | |
1331 | return -EINVAL; | |
1332 | } | |
1333 | ||
1334 | if (mclk_freq % curr_freq) { | |
1335 | dev_err(&slave->dev, | |
1336 | "mclk %d is not multiple of bus curr_freq %d\n", | |
1337 | mclk_freq, curr_freq); | |
1338 | return -EINVAL; | |
1339 | } | |
1340 | ||
1341 | scale = mclk_freq / curr_freq; | |
1342 | ||
1343 | /* | |
1344 | * map scale to Table 90 of SoundWire 1.2 spec - and check | |
1345 | * that the scale is a power of two and maximum 64 | |
1346 | */ | |
1347 | scale_index = ilog2(scale); | |
1348 | ||
1349 | if (BIT(scale_index) != scale || scale_index > 6) { | |
1350 | dev_err(&slave->dev, | |
1351 | "No match found for scale %d, bus mclk %d curr_freq %d\n", | |
1352 | scale, mclk_freq, curr_freq); | |
1353 | return -EINVAL; | |
1354 | } | |
1355 | scale_index++; | |
1356 | ||
299e9780 | 1357 | ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); |
29d158f9 PLB |
1358 | if (ret < 0) { |
1359 | dev_err(&slave->dev, | |
1360 | "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); | |
1361 | return ret; | |
1362 | } | |
1363 | ||
1364 | /* initialize scale for both banks */ | |
299e9780 | 1365 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); |
29d158f9 PLB |
1366 | if (ret < 0) { |
1367 | dev_err(&slave->dev, | |
1368 | "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); | |
1369 | return ret; | |
1370 | } | |
299e9780 | 1371 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); |
29d158f9 PLB |
1372 | if (ret < 0) |
1373 | dev_err(&slave->dev, | |
1374 | "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); | |
1375 | ||
1376 | dev_dbg(&slave->dev, | |
1377 | "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", | |
1378 | base, scale_index, mclk_freq, curr_freq); | |
1379 | ||
1380 | return ret; | |
1381 | } | |
1382 | ||
d52d7a1b SK |
1383 | static int sdw_initialize_slave(struct sdw_slave *slave) |
1384 | { | |
1385 | struct sdw_slave_prop *prop = &slave->prop; | |
6b8caa6f | 1386 | int status; |
d52d7a1b SK |
1387 | int ret; |
1388 | u8 val; | |
1389 | ||
29d158f9 PLB |
1390 | ret = sdw_slave_set_frequency(slave); |
1391 | if (ret < 0) | |
1392 | return ret; | |
1393 | ||
6b8caa6f BL |
1394 | if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { |
1395 | /* Clear bus clash interrupt before enabling interrupt mask */ | |
1396 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1397 | if (status < 0) { | |
1398 | dev_err(&slave->dev, | |
1399 | "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); | |
1400 | return status; | |
1401 | } | |
1402 | if (status & SDW_SCP_INT1_BUS_CLASH) { | |
1403 | dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); | |
1404 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); | |
1405 | if (ret < 0) { | |
1406 | dev_err(&slave->dev, | |
1407 | "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); | |
1408 | return ret; | |
1409 | } | |
1410 | } | |
1411 | } | |
1412 | if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && | |
1413 | !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { | |
1414 | /* Clear parity interrupt before enabling interrupt mask */ | |
1415 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1416 | if (status < 0) { | |
1417 | dev_err(&slave->dev, | |
1418 | "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); | |
1419 | return status; | |
1420 | } | |
1421 | if (status & SDW_SCP_INT1_PARITY) { | |
1422 | dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); | |
1423 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); | |
1424 | if (ret < 0) { | |
1425 | dev_err(&slave->dev, | |
1426 | "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); | |
1427 | return ret; | |
1428 | } | |
1429 | } | |
1430 | } | |
1431 | ||
d52d7a1b | 1432 | /* |
2acd30b9 PLB |
1433 | * Set SCP_INT1_MASK register, typically bus clash and |
1434 | * implementation-defined interrupt mask. The Parity detection | |
1435 | * may not always be correct on startup so its use is | |
1436 | * device-dependent, it might e.g. only be enabled in | |
1437 | * steady-state after a couple of frames. | |
d52d7a1b | 1438 | */ |
2acd30b9 | 1439 | val = slave->prop.scp_int1_mask; |
d52d7a1b SK |
1440 | |
1441 | /* Enable SCP interrupts */ | |
b04c975e | 1442 | ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); |
d52d7a1b | 1443 | if (ret < 0) { |
6d7a1ff7 | 1444 | dev_err(&slave->dev, |
17ed5bef | 1445 | "SDW_SCP_INTMASK1 write failed:%d\n", ret); |
d52d7a1b SK |
1446 | return ret; |
1447 | } | |
1448 | ||
1449 | /* No need to continue if DP0 is not present */ | |
1450 | if (!slave->prop.dp0_prop) | |
1451 | return 0; | |
1452 | ||
1453 | /* Enable DP0 interrupts */ | |
8acbbfec | 1454 | val = prop->dp0_prop->imp_def_interrupts; |
d52d7a1b SK |
1455 | val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; |
1456 | ||
b04c975e | 1457 | ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); |
5de79ba8 | 1458 | if (ret < 0) |
6d7a1ff7 | 1459 | dev_err(&slave->dev, |
17ed5bef | 1460 | "SDW_DP0_INTMASK read failed:%d\n", ret); |
5de79ba8 | 1461 | return ret; |
d52d7a1b | 1462 | } |
b0a9c37b VK |
1463 | |
1464 | static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) | |
1465 | { | |
b35991de | 1466 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1467 | int status, status2, ret, count = 0; |
1468 | ||
c30b63ef | 1469 | status = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1470 | if (status < 0) { |
6d7a1ff7 | 1471 | dev_err(&slave->dev, |
17ed5bef | 1472 | "SDW_DP0_INT read failed:%d\n", status); |
b0a9c37b VK |
1473 | return status; |
1474 | } | |
1475 | ||
1476 | do { | |
b3a6809e | 1477 | clear = status & ~(SDW_DP0_INTERRUPTS | SDW_DP0_SDCA_CASCADE); |
b35991de | 1478 | |
b0a9c37b | 1479 | if (status & SDW_DP0_INT_TEST_FAIL) { |
17ed5bef | 1480 | dev_err(&slave->dev, "Test fail for port 0\n"); |
b0a9c37b VK |
1481 | clear |= SDW_DP0_INT_TEST_FAIL; |
1482 | } | |
1483 | ||
1484 | /* | |
1485 | * Assumption: PORT_READY interrupt will be received only for | |
1486 | * ports implementing Channel Prepare state machine (CP_SM) | |
1487 | */ | |
1488 | ||
1489 | if (status & SDW_DP0_INT_PORT_READY) { | |
1490 | complete(&slave->port_ready[0]); | |
1491 | clear |= SDW_DP0_INT_PORT_READY; | |
1492 | } | |
1493 | ||
1494 | if (status & SDW_DP0_INT_BRA_FAILURE) { | |
17ed5bef | 1495 | dev_err(&slave->dev, "BRA failed\n"); |
b0a9c37b VK |
1496 | clear |= SDW_DP0_INT_BRA_FAILURE; |
1497 | } | |
1498 | ||
1499 | impl_int_mask = SDW_DP0_INT_IMPDEF1 | | |
1500 | SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; | |
1501 | ||
1502 | if (status & impl_int_mask) { | |
1503 | clear |= impl_int_mask; | |
1504 | *slave_status = clear; | |
1505 | } | |
1506 | ||
b35991de | 1507 | /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ |
c30b63ef | 1508 | ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); |
b0a9c37b | 1509 | if (ret < 0) { |
6d7a1ff7 | 1510 | dev_err(&slave->dev, |
17ed5bef | 1511 | "SDW_DP0_INT write failed:%d\n", ret); |
b0a9c37b VK |
1512 | return ret; |
1513 | } | |
1514 | ||
1515 | /* Read DP0 interrupt again */ | |
c30b63ef | 1516 | status2 = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1517 | if (status2 < 0) { |
6d7a1ff7 | 1518 | dev_err(&slave->dev, |
17ed5bef | 1519 | "SDW_DP0_INT read failed:%d\n", status2); |
80cd8f01 | 1520 | return status2; |
b0a9c37b | 1521 | } |
6e06a855 | 1522 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1523 | status &= status2; |
1524 | ||
1525 | count++; | |
1526 | ||
1527 | /* we can get alerts while processing so keep retrying */ | |
b35991de | 1528 | } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1529 | |
1530 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1531 | dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); |
b0a9c37b VK |
1532 | |
1533 | return ret; | |
1534 | } | |
1535 | ||
1536 | static int sdw_handle_port_interrupt(struct sdw_slave *slave, | |
73ede046 | 1537 | int port, u8 *slave_status) |
b0a9c37b | 1538 | { |
47b85209 | 1539 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1540 | int status, status2, ret, count = 0; |
1541 | u32 addr; | |
1542 | ||
1543 | if (port == 0) | |
1544 | return sdw_handle_dp0_interrupt(slave, slave_status); | |
1545 | ||
1546 | addr = SDW_DPN_INT(port); | |
c30b63ef | 1547 | status = sdw_read_no_pm(slave, addr); |
b0a9c37b | 1548 | if (status < 0) { |
6d7a1ff7 | 1549 | dev_err(&slave->dev, |
17ed5bef | 1550 | "SDW_DPN_INT read failed:%d\n", status); |
b0a9c37b VK |
1551 | |
1552 | return status; | |
1553 | } | |
1554 | ||
1555 | do { | |
47b85209 PLB |
1556 | clear = status & ~SDW_DPN_INTERRUPTS; |
1557 | ||
b0a9c37b | 1558 | if (status & SDW_DPN_INT_TEST_FAIL) { |
17ed5bef | 1559 | dev_err(&slave->dev, "Test fail for port:%d\n", port); |
b0a9c37b VK |
1560 | clear |= SDW_DPN_INT_TEST_FAIL; |
1561 | } | |
1562 | ||
1563 | /* | |
1564 | * Assumption: PORT_READY interrupt will be received only | |
1565 | * for ports implementing CP_SM. | |
1566 | */ | |
1567 | if (status & SDW_DPN_INT_PORT_READY) { | |
1568 | complete(&slave->port_ready[port]); | |
1569 | clear |= SDW_DPN_INT_PORT_READY; | |
1570 | } | |
1571 | ||
1572 | impl_int_mask = SDW_DPN_INT_IMPDEF1 | | |
1573 | SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; | |
1574 | ||
b0a9c37b VK |
1575 | if (status & impl_int_mask) { |
1576 | clear |= impl_int_mask; | |
1577 | *slave_status = clear; | |
1578 | } | |
1579 | ||
47b85209 | 1580 | /* clear the interrupt but don't touch reserved fields */ |
c30b63ef | 1581 | ret = sdw_write_no_pm(slave, addr, clear); |
b0a9c37b | 1582 | if (ret < 0) { |
6d7a1ff7 | 1583 | dev_err(&slave->dev, |
17ed5bef | 1584 | "SDW_DPN_INT write failed:%d\n", ret); |
b0a9c37b VK |
1585 | return ret; |
1586 | } | |
1587 | ||
1588 | /* Read DPN interrupt again */ | |
c30b63ef | 1589 | status2 = sdw_read_no_pm(slave, addr); |
80cd8f01 | 1590 | if (status2 < 0) { |
6d7a1ff7 | 1591 | dev_err(&slave->dev, |
17ed5bef | 1592 | "SDW_DPN_INT read failed:%d\n", status2); |
80cd8f01 | 1593 | return status2; |
b0a9c37b | 1594 | } |
6e06a855 | 1595 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1596 | status &= status2; |
1597 | ||
1598 | count++; | |
1599 | ||
1600 | /* we can get alerts while processing so keep retrying */ | |
47b85209 | 1601 | } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1602 | |
1603 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1604 | dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); |
b0a9c37b VK |
1605 | |
1606 | return ret; | |
1607 | } | |
1608 | ||
1609 | static int sdw_handle_slave_alerts(struct sdw_slave *slave) | |
1610 | { | |
1611 | struct sdw_slave_intr_status slave_intr; | |
f1fac63a | 1612 | u8 clear = 0, bit, port_status[15] = {0}; |
b0a9c37b VK |
1613 | int port_num, stat, ret, count = 0; |
1614 | unsigned long port; | |
7ffaba04 | 1615 | bool slave_notify; |
b7cab9be | 1616 | u8 sdca_cascade = 0; |
9420c971 | 1617 | u8 buf, buf2[2]; |
4724f12c PLB |
1618 | bool parity_check; |
1619 | bool parity_quirk; | |
b0a9c37b VK |
1620 | |
1621 | sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); | |
1622 | ||
e9537962 | 1623 | ret = pm_runtime_get_sync(&slave->dev); |
aa792935 RW |
1624 | if (ret < 0 && ret != -EACCES) { |
1625 | dev_err(&slave->dev, "Failed to resume device: %d\n", ret); | |
e9537962 | 1626 | pm_runtime_put_noidle(&slave->dev); |
aa792935 RW |
1627 | return ret; |
1628 | } | |
1629 | ||
f8d0168e | 1630 | /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ |
c30b63ef | 1631 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1632 | if (ret < 0) { |
6d7a1ff7 | 1633 | dev_err(&slave->dev, |
17ed5bef | 1634 | "SDW_SCP_INT1 read failed:%d\n", ret); |
aa792935 | 1635 | goto io_err; |
b0a9c37b | 1636 | } |
72b16d4a | 1637 | buf = ret; |
b0a9c37b | 1638 | |
c30b63ef | 1639 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); |
b0a9c37b | 1640 | if (ret < 0) { |
6d7a1ff7 | 1641 | dev_err(&slave->dev, |
17ed5bef | 1642 | "SDW_SCP_INT2/3 read failed:%d\n", ret); |
aa792935 | 1643 | goto io_err; |
b0a9c37b VK |
1644 | } |
1645 | ||
be505ba8 | 1646 | if (slave->id.class_id) { |
c30b63ef | 1647 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1648 | if (ret < 0) { |
6d7a1ff7 | 1649 | dev_err(&slave->dev, |
b7cab9be PLB |
1650 | "SDW_DP0_INT read failed:%d\n", ret); |
1651 | goto io_err; | |
1652 | } | |
1653 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1654 | } | |
1655 | ||
b0a9c37b | 1656 | do { |
7ffaba04 PLB |
1657 | slave_notify = false; |
1658 | ||
b0a9c37b VK |
1659 | /* |
1660 | * Check parity, bus clash and Slave (impl defined) | |
1661 | * interrupt | |
1662 | */ | |
1663 | if (buf & SDW_SCP_INT1_PARITY) { | |
4724f12c PLB |
1664 | parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; |
1665 | parity_quirk = !slave->first_interrupt_done && | |
1666 | (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); | |
1667 | ||
1668 | if (parity_check && !parity_quirk) | |
310f6dc6 | 1669 | dev_err(&slave->dev, "Parity error detected\n"); |
b0a9c37b VK |
1670 | clear |= SDW_SCP_INT1_PARITY; |
1671 | } | |
1672 | ||
1673 | if (buf & SDW_SCP_INT1_BUS_CLASH) { | |
310f6dc6 PLB |
1674 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) |
1675 | dev_err(&slave->dev, "Bus clash detected\n"); | |
b0a9c37b VK |
1676 | clear |= SDW_SCP_INT1_BUS_CLASH; |
1677 | } | |
1678 | ||
1679 | /* | |
1680 | * When bus clash or parity errors are detected, such errors | |
1681 | * are unlikely to be recoverable errors. | |
1682 | * TODO: In such scenario, reset bus. Make this configurable | |
1683 | * via sysfs property with bus reset being the default. | |
1684 | */ | |
1685 | ||
1686 | if (buf & SDW_SCP_INT1_IMPL_DEF) { | |
310f6dc6 PLB |
1687 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { |
1688 | dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); | |
1689 | slave_notify = true; | |
1690 | } | |
b0a9c37b | 1691 | clear |= SDW_SCP_INT1_IMPL_DEF; |
b0a9c37b VK |
1692 | } |
1693 | ||
b7cab9be PLB |
1694 | /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ |
1695 | if (sdca_cascade) | |
1696 | slave_notify = true; | |
1697 | ||
b0a9c37b VK |
1698 | /* Check port 0 - 3 interrupts */ |
1699 | port = buf & SDW_SCP_INT1_PORT0_3; | |
1700 | ||
1701 | /* To get port number corresponding to bits, shift it */ | |
d5826a4b | 1702 | port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); |
b0a9c37b VK |
1703 | for_each_set_bit(bit, &port, 8) { |
1704 | sdw_handle_port_interrupt(slave, bit, | |
73ede046 | 1705 | &port_status[bit]); |
b0a9c37b VK |
1706 | } |
1707 | ||
1708 | /* Check if cascade 2 interrupt is present */ | |
1709 | if (buf & SDW_SCP_INT1_SCP2_CASCADE) { | |
1710 | port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; | |
1711 | for_each_set_bit(bit, &port, 8) { | |
1712 | /* scp2 ports start from 4 */ | |
560458df | 1713 | port_num = bit + 4; |
b0a9c37b VK |
1714 | sdw_handle_port_interrupt(slave, |
1715 | port_num, | |
1716 | &port_status[port_num]); | |
1717 | } | |
1718 | } | |
1719 | ||
1720 | /* now check last cascade */ | |
1721 | if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { | |
1722 | port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; | |
1723 | for_each_set_bit(bit, &port, 8) { | |
1724 | /* scp3 ports start from 11 */ | |
560458df | 1725 | port_num = bit + 11; |
b0a9c37b VK |
1726 | sdw_handle_port_interrupt(slave, |
1727 | port_num, | |
1728 | &port_status[port_num]); | |
1729 | } | |
1730 | } | |
1731 | ||
1732 | /* Update the Slave driver */ | |
bd29c00e PLB |
1733 | if (slave_notify) { |
1734 | mutex_lock(&slave->sdw_dev_lock); | |
1735 | ||
1736 | if (slave->probed) { | |
1737 | struct device *dev = &slave->dev; | |
1738 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1739 | ||
12a95123 LT |
1740 | if (slave->prop.use_domain_irq && slave->irq) |
1741 | handle_nested_irq(slave->irq); | |
1742 | ||
bd29c00e PLB |
1743 | if (drv->ops && drv->ops->interrupt_callback) { |
1744 | slave_intr.sdca_cascade = sdca_cascade; | |
1745 | slave_intr.control_port = clear; | |
1746 | memcpy(slave_intr.port, &port_status, | |
1747 | sizeof(slave_intr.port)); | |
1748 | ||
1749 | drv->ops->interrupt_callback(slave, &slave_intr); | |
1750 | } | |
1751 | } | |
1752 | ||
1753 | mutex_unlock(&slave->sdw_dev_lock); | |
b0a9c37b VK |
1754 | } |
1755 | ||
1756 | /* Ack interrupt */ | |
c30b63ef | 1757 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); |
b0a9c37b | 1758 | if (ret < 0) { |
6d7a1ff7 | 1759 | dev_err(&slave->dev, |
17ed5bef | 1760 | "SDW_SCP_INT1 write failed:%d\n", ret); |
aa792935 | 1761 | goto io_err; |
b0a9c37b VK |
1762 | } |
1763 | ||
c2819e19 PLB |
1764 | /* at this point all initial interrupt sources were handled */ |
1765 | slave->first_interrupt_done = true; | |
1766 | ||
b0a9c37b VK |
1767 | /* |
1768 | * Read status again to ensure no new interrupts arrived | |
1769 | * while servicing interrupts. | |
1770 | */ | |
c30b63ef | 1771 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1772 | if (ret < 0) { |
6d7a1ff7 | 1773 | dev_err(&slave->dev, |
b500127e | 1774 | "SDW_SCP_INT1 recheck read failed:%d\n", ret); |
aa792935 | 1775 | goto io_err; |
b0a9c37b | 1776 | } |
9420c971 | 1777 | buf = ret; |
b0a9c37b | 1778 | |
9420c971 | 1779 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); |
b0a9c37b | 1780 | if (ret < 0) { |
6d7a1ff7 | 1781 | dev_err(&slave->dev, |
b500127e | 1782 | "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); |
aa792935 | 1783 | goto io_err; |
b0a9c37b VK |
1784 | } |
1785 | ||
be505ba8 | 1786 | if (slave->id.class_id) { |
c30b63ef | 1787 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1788 | if (ret < 0) { |
6d7a1ff7 | 1789 | dev_err(&slave->dev, |
b500127e | 1790 | "SDW_DP0_INT recheck read failed:%d\n", ret); |
b7cab9be PLB |
1791 | goto io_err; |
1792 | } | |
1793 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1794 | } | |
1795 | ||
6e06a855 | 1796 | /* |
9420c971 | 1797 | * Make sure no interrupts are pending |
6e06a855 | 1798 | */ |
b7cab9be | 1799 | stat = buf || buf2[0] || buf2[1] || sdca_cascade; |
b0a9c37b VK |
1800 | |
1801 | /* | |
1802 | * Exit loop if Slave is continuously in ALERT state even | |
1803 | * after servicing the interrupt multiple times. | |
1804 | */ | |
1805 | count++; | |
1806 | ||
1807 | /* we can get alerts while processing so keep retrying */ | |
1808 | } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
1809 | ||
1810 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1811 | dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); |
b0a9c37b | 1812 | |
aa792935 RW |
1813 | io_err: |
1814 | pm_runtime_mark_last_busy(&slave->dev); | |
1815 | pm_runtime_put_autosuspend(&slave->dev); | |
1816 | ||
b0a9c37b VK |
1817 | return ret; |
1818 | } | |
1819 | ||
1820 | static int sdw_update_slave_status(struct sdw_slave *slave, | |
73ede046 | 1821 | enum sdw_slave_status status) |
b0a9c37b | 1822 | { |
bd29c00e | 1823 | int ret = 0; |
b0a9c37b | 1824 | |
bd29c00e PLB |
1825 | mutex_lock(&slave->sdw_dev_lock); |
1826 | ||
1827 | if (slave->probed) { | |
1828 | struct device *dev = &slave->dev; | |
1829 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1830 | ||
1831 | if (drv->ops && drv->ops->update_status) | |
1832 | ret = drv->ops->update_status(slave, status); | |
2140b66b PLB |
1833 | } |
1834 | ||
bd29c00e | 1835 | mutex_unlock(&slave->sdw_dev_lock); |
2140b66b | 1836 | |
bd29c00e | 1837 | return ret; |
b0a9c37b VK |
1838 | } |
1839 | ||
1840 | /** | |
1841 | * sdw_handle_slave_status() - Handle Slave status | |
1842 | * @bus: SDW bus instance | |
1843 | * @status: Status for all Slave(s) | |
1844 | */ | |
1845 | int sdw_handle_slave_status(struct sdw_bus *bus, | |
73ede046 | 1846 | enum sdw_slave_status status[]) |
b0a9c37b VK |
1847 | { |
1848 | enum sdw_slave_status prev_status; | |
1849 | struct sdw_slave *slave; | |
72124f07 | 1850 | bool attached_initializing, id_programmed; |
b0a9c37b VK |
1851 | int i, ret = 0; |
1852 | ||
61061901 PLB |
1853 | /* first check if any Slaves fell off the bus */ |
1854 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1855 | mutex_lock(&bus->bus_lock); | |
1856 | if (test_bit(i, bus->assigned) == false) { | |
1857 | mutex_unlock(&bus->bus_lock); | |
1858 | continue; | |
1859 | } | |
1860 | mutex_unlock(&bus->bus_lock); | |
1861 | ||
1862 | slave = sdw_get_slave(bus, i); | |
1863 | if (!slave) | |
1864 | continue; | |
1865 | ||
1866 | if (status[i] == SDW_SLAVE_UNATTACHED && | |
d1b32855 PLB |
1867 | slave->status != SDW_SLAVE_UNATTACHED) { |
1868 | dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n", | |
1869 | i, slave->status); | |
61061901 | 1870 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
f605f32e RF |
1871 | |
1872 | /* Ensure driver knows that peripheral unattached */ | |
1873 | ret = sdw_update_slave_status(slave, status[i]); | |
1874 | if (ret < 0) | |
1875 | dev_warn(&slave->dev, "Update Slave status failed:%d\n", ret); | |
d1b32855 | 1876 | } |
61061901 PLB |
1877 | } |
1878 | ||
b0a9c37b | 1879 | if (status[0] == SDW_SLAVE_ATTACHED) { |
6e0ac6a6 | 1880 | dev_dbg(bus->dev, "Slave attached, programming device number\n"); |
72124f07 | 1881 | |
15ed3ea2 | 1882 | /* |
72124f07 RF |
1883 | * Programming a device number will have side effects, |
1884 | * so we deal with other devices at a later time. | |
1885 | * This relies on those devices reporting ATTACHED, which will | |
1886 | * trigger another call to this function. This will only | |
1887 | * happen if at least one device ID was programmed. | |
1888 | * Error returns from sdw_program_device_num() are currently | |
1889 | * ignored because there's no useful recovery that can be done. | |
1890 | * Returning the error here could result in the current status | |
1891 | * of other devices not being handled, because if no device IDs | |
1892 | * were programmed there's nothing to guarantee a status change | |
1893 | * to trigger another call to this function. | |
15ed3ea2 | 1894 | */ |
72124f07 RF |
1895 | sdw_program_device_num(bus, &id_programmed); |
1896 | if (id_programmed) | |
1897 | return 0; | |
b0a9c37b VK |
1898 | } |
1899 | ||
1900 | /* Continue to check other slave statuses */ | |
1901 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1902 | mutex_lock(&bus->bus_lock); | |
1903 | if (test_bit(i, bus->assigned) == false) { | |
1904 | mutex_unlock(&bus->bus_lock); | |
1905 | continue; | |
1906 | } | |
1907 | mutex_unlock(&bus->bus_lock); | |
1908 | ||
1909 | slave = sdw_get_slave(bus, i); | |
1910 | if (!slave) | |
1911 | continue; | |
1912 | ||
a90def06 PLB |
1913 | attached_initializing = false; |
1914 | ||
b0a9c37b VK |
1915 | switch (status[i]) { |
1916 | case SDW_SLAVE_UNATTACHED: | |
1917 | if (slave->status == SDW_SLAVE_UNATTACHED) | |
1918 | break; | |
1919 | ||
d1b32855 PLB |
1920 | dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n", |
1921 | i, slave->status); | |
1922 | ||
b0a9c37b VK |
1923 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
1924 | break; | |
1925 | ||
1926 | case SDW_SLAVE_ALERT: | |
1927 | ret = sdw_handle_slave_alerts(slave); | |
a5759f19 | 1928 | if (ret < 0) |
6d7a1ff7 | 1929 | dev_err(&slave->dev, |
17ed5bef | 1930 | "Slave %d alert handling failed: %d\n", |
b0a9c37b VK |
1931 | i, ret); |
1932 | break; | |
1933 | ||
1934 | case SDW_SLAVE_ATTACHED: | |
1935 | if (slave->status == SDW_SLAVE_ATTACHED) | |
1936 | break; | |
1937 | ||
1938 | prev_status = slave->status; | |
1939 | sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); | |
1940 | ||
1941 | if (prev_status == SDW_SLAVE_ALERT) | |
1942 | break; | |
1943 | ||
a90def06 PLB |
1944 | attached_initializing = true; |
1945 | ||
b0a9c37b | 1946 | ret = sdw_initialize_slave(slave); |
a5759f19 | 1947 | if (ret < 0) |
6d7a1ff7 | 1948 | dev_err(&slave->dev, |
17ed5bef | 1949 | "Slave %d initialization failed: %d\n", |
b0a9c37b VK |
1950 | i, ret); |
1951 | ||
1952 | break; | |
1953 | ||
1954 | default: | |
6d7a1ff7 | 1955 | dev_err(&slave->dev, "Invalid slave %d status:%d\n", |
73ede046 | 1956 | i, status[i]); |
b0a9c37b VK |
1957 | break; |
1958 | } | |
1959 | ||
1960 | ret = sdw_update_slave_status(slave, status[i]); | |
a5759f19 | 1961 | if (ret < 0) |
6d7a1ff7 | 1962 | dev_err(&slave->dev, |
17ed5bef | 1963 | "Update Slave status failed:%d\n", ret); |
f1b69026 PLB |
1964 | if (attached_initializing) { |
1965 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
1966 | "signaling initialization completion for Slave %d\n", |
1967 | slave->dev_num); | |
f1b69026 | 1968 | |
c40d6b32 | 1969 | complete_all(&slave->initialization_complete); |
e557bca4 PLB |
1970 | |
1971 | /* | |
1972 | * If the manager became pm_runtime active, the peripherals will be | |
1973 | * restarted and attach, but their pm_runtime status may remain | |
1974 | * suspended. If the 'update_slave_status' callback initiates | |
1975 | * any sort of deferred processing, this processing would not be | |
1976 | * cancelled on pm_runtime suspend. | |
1977 | * To avoid such zombie states, we queue a request to resume. | |
1978 | * This would be a no-op in case the peripheral was being resumed | |
1979 | * by e.g. the ALSA/ASoC framework. | |
1980 | */ | |
1981 | pm_request_resume(&slave->dev); | |
f1b69026 | 1982 | } |
b0a9c37b VK |
1983 | } |
1984 | ||
1985 | return ret; | |
1986 | } | |
1987 | EXPORT_SYMBOL(sdw_handle_slave_status); | |
3ab2ca40 PLB |
1988 | |
1989 | void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) | |
1990 | { | |
1991 | struct sdw_slave *slave; | |
1992 | int i; | |
1993 | ||
1994 | /* Check all non-zero devices */ | |
1995 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1996 | mutex_lock(&bus->bus_lock); | |
1997 | if (test_bit(i, bus->assigned) == false) { | |
1998 | mutex_unlock(&bus->bus_lock); | |
1999 | continue; | |
2000 | } | |
2001 | mutex_unlock(&bus->bus_lock); | |
2002 | ||
2003 | slave = sdw_get_slave(bus, i); | |
2004 | if (!slave) | |
2005 | continue; | |
2006 | ||
c2819e19 | 2007 | if (slave->status != SDW_SLAVE_UNATTACHED) { |
3ab2ca40 | 2008 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 2009 | slave->first_interrupt_done = false; |
899a7509 | 2010 | sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 2011 | } |
3ab2ca40 PLB |
2012 | |
2013 | /* keep track of request, used in pm_runtime resume */ | |
2014 | slave->unattach_request = request; | |
2015 | } | |
2016 | } | |
2017 | EXPORT_SYMBOL(sdw_clear_slave_status); |