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7c3cd189 VK |
1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
2 | // Copyright(c) 2015-17 Intel Corporation. | |
3 | ||
4 | #include <linux/acpi.h> | |
0231453b | 5 | #include <linux/delay.h> |
7c3cd189 | 6 | #include <linux/mod_devicetable.h> |
9d715fa0 VK |
7 | #include <linux/pm_runtime.h> |
8 | #include <linux/soundwire/sdw_registers.h> | |
7c3cd189 | 9 | #include <linux/soundwire/sdw.h> |
bd29c00e | 10 | #include <linux/soundwire/sdw_type.h> |
7c3cd189 | 11 | #include "bus.h" |
bcac5902 | 12 | #include "sysfs_local.h" |
7c3cd189 | 13 | |
88de0a8f | 14 | static DEFINE_IDA(sdw_bus_ida); |
c6056101 | 15 | static DEFINE_IDA(sdw_peripheral_ida); |
dbb50c7a BL |
16 | |
17 | static int sdw_get_id(struct sdw_bus *bus) | |
18 | { | |
88de0a8f | 19 | int rc = ida_alloc(&sdw_bus_ida, GFP_KERNEL); |
dbb50c7a BL |
20 | |
21 | if (rc < 0) | |
22 | return rc; | |
23 | ||
24 | bus->id = rc; | |
25 | return 0; | |
26 | } | |
27 | ||
7c3cd189 | 28 | /** |
5cab3ff2 | 29 | * sdw_bus_master_add() - add a bus Master instance |
7c3cd189 | 30 | * @bus: bus instance |
5cab3ff2 PLB |
31 | * @parent: parent device |
32 | * @fwnode: firmware node handle | |
7c3cd189 VK |
33 | * |
34 | * Initializes the bus instance, read properties and create child | |
35 | * devices. | |
36 | */ | |
5cab3ff2 PLB |
37 | int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent, |
38 | struct fwnode_handle *fwnode) | |
7c3cd189 | 39 | { |
5c3eb9f7 | 40 | struct sdw_master_prop *prop = NULL; |
7c3cd189 VK |
41 | int ret; |
42 | ||
7ceaa40b PLB |
43 | if (!parent) { |
44 | pr_err("SoundWire parent device is not set\n"); | |
7c3cd189 VK |
45 | return -ENODEV; |
46 | } | |
47 | ||
dbb50c7a | 48 | ret = sdw_get_id(bus); |
a5759f19 | 49 | if (ret < 0) { |
7ceaa40b PLB |
50 | dev_err(parent, "Failed to get bus id\n"); |
51 | return ret; | |
52 | } | |
53 | ||
54 | ret = sdw_master_device_add(bus, parent, fwnode); | |
a5759f19 | 55 | if (ret < 0) { |
7ceaa40b PLB |
56 | dev_err(parent, "Failed to add master device at link %d\n", |
57 | bus->link_id); | |
dbb50c7a BL |
58 | return ret; |
59 | } | |
60 | ||
9d715fa0 | 61 | if (!bus->ops) { |
17ed5bef | 62 | dev_err(bus->dev, "SoundWire Bus ops are not set\n"); |
9d715fa0 VK |
63 | return -EINVAL; |
64 | } | |
65 | ||
9026118f BL |
66 | if (!bus->compute_params) { |
67 | dev_err(bus->dev, | |
68 | "Bandwidth allocation not configured, compute_params no set\n"); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
9d715fa0 | 72 | mutex_init(&bus->msg_lock); |
7c3cd189 VK |
73 | mutex_init(&bus->bus_lock); |
74 | INIT_LIST_HEAD(&bus->slaves); | |
89e59053 | 75 | INIT_LIST_HEAD(&bus->m_rt_list); |
7c3cd189 | 76 | |
ce6e74d0 SN |
77 | /* |
78 | * Initialize multi_link flag | |
ce6e74d0 SN |
79 | */ |
80 | bus->multi_link = false; | |
56d4fe31 VK |
81 | if (bus->ops->read_prop) { |
82 | ret = bus->ops->read_prop(bus); | |
83 | if (ret < 0) { | |
62f0cec3 VK |
84 | dev_err(bus->dev, |
85 | "Bus read properties failed:%d\n", ret); | |
56d4fe31 VK |
86 | return ret; |
87 | } | |
88 | } | |
89 | ||
bf03473d PLB |
90 | sdw_bus_debugfs_init(bus); |
91 | ||
7c3cd189 | 92 | /* |
21c2de29 | 93 | * Device numbers in SoundWire are 0 through 15. Enumeration device |
7c3cd189 VK |
94 | * number (0), Broadcast device number (15), Group numbers (12 and |
95 | * 13) and Master device number (14) are not used for assignment so | |
96 | * mask these and other higher bits. | |
97 | */ | |
98 | ||
99 | /* Set higher order bits */ | |
100 | *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM); | |
101 | ||
102 | /* Set enumuration device number and broadcast device number */ | |
103 | set_bit(SDW_ENUM_DEV_NUM, bus->assigned); | |
104 | set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned); | |
105 | ||
106 | /* Set group device numbers and master device number */ | |
107 | set_bit(SDW_GROUP12_DEV_NUM, bus->assigned); | |
108 | set_bit(SDW_GROUP13_DEV_NUM, bus->assigned); | |
109 | set_bit(SDW_MASTER_DEV_NUM, bus->assigned); | |
110 | ||
111 | /* | |
112 | * SDW is an enumerable bus, but devices can be powered off. So, | |
113 | * they won't be able to report as present. | |
114 | * | |
115 | * Create Slave devices based on Slaves described in | |
116 | * the respective firmware (ACPI/DT) | |
117 | */ | |
118 | if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev)) | |
119 | ret = sdw_acpi_find_slaves(bus); | |
a2e48458 SK |
120 | else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node) |
121 | ret = sdw_of_find_slaves(bus); | |
7c3cd189 VK |
122 | else |
123 | ret = -ENOTSUPP; /* No ACPI/DT so error out */ | |
124 | ||
a5759f19 | 125 | if (ret < 0) { |
7c3cd189 VK |
126 | dev_err(bus->dev, "Finding slaves failed:%d\n", ret); |
127 | return ret; | |
128 | } | |
129 | ||
99b8a5d6 | 130 | /* |
5c3eb9f7 | 131 | * Initialize clock values based on Master properties. The max |
3424305b | 132 | * frequency is read from max_clk_freq property. Current assumption |
5c3eb9f7 SK |
133 | * is that the bus will start at highest clock frequency when |
134 | * powered on. | |
135 | * | |
99b8a5d6 SK |
136 | * Default active bank will be 0 as out of reset the Slaves have |
137 | * to start with bank 0 (Table 40 of Spec) | |
138 | */ | |
5c3eb9f7 | 139 | prop = &bus->prop; |
3424305b | 140 | bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR; |
5c3eb9f7 | 141 | bus->params.curr_dr_freq = bus->params.max_dr_freq; |
99b8a5d6 SK |
142 | bus->params.curr_bank = SDW_BANK0; |
143 | bus->params.next_bank = SDW_BANK1; | |
144 | ||
7c3cd189 VK |
145 | return 0; |
146 | } | |
5cab3ff2 | 147 | EXPORT_SYMBOL(sdw_bus_master_add); |
7c3cd189 VK |
148 | |
149 | static int sdw_delete_slave(struct device *dev, void *data) | |
150 | { | |
151 | struct sdw_slave *slave = dev_to_sdw_dev(dev); | |
152 | struct sdw_bus *bus = slave->bus; | |
153 | ||
dff70572 PLB |
154 | pm_runtime_disable(dev); |
155 | ||
bf03473d PLB |
156 | sdw_slave_debugfs_exit(slave); |
157 | ||
7c3cd189 VK |
158 | mutex_lock(&bus->bus_lock); |
159 | ||
c6056101 | 160 | if (slave->dev_num) { /* clear dev_num if assigned */ |
7c3cd189 | 161 | clear_bit(slave->dev_num, bus->assigned); |
c6056101 PLB |
162 | if (bus->dev_num_ida_min) |
163 | ida_free(&sdw_peripheral_ida, slave->dev_num); | |
164 | } | |
7c3cd189 VK |
165 | list_del_init(&slave->node); |
166 | mutex_unlock(&bus->bus_lock); | |
167 | ||
168 | device_unregister(dev); | |
169 | return 0; | |
170 | } | |
171 | ||
172 | /** | |
5cab3ff2 | 173 | * sdw_bus_master_delete() - delete the bus master instance |
7c3cd189 VK |
174 | * @bus: bus to be deleted |
175 | * | |
176 | * Remove the instance, delete the child devices. | |
177 | */ | |
5cab3ff2 | 178 | void sdw_bus_master_delete(struct sdw_bus *bus) |
7c3cd189 VK |
179 | { |
180 | device_for_each_child(bus->dev, NULL, sdw_delete_slave); | |
7ceaa40b | 181 | sdw_master_device_del(bus); |
bf03473d PLB |
182 | |
183 | sdw_bus_debugfs_exit(bus); | |
88de0a8f | 184 | ida_free(&sdw_bus_ida, bus->id); |
7c3cd189 | 185 | } |
5cab3ff2 | 186 | EXPORT_SYMBOL(sdw_bus_master_delete); |
7c3cd189 | 187 | |
9d715fa0 VK |
188 | /* |
189 | * SDW IO Calls | |
190 | */ | |
191 | ||
192 | static inline int find_response_code(enum sdw_command_response resp) | |
193 | { | |
194 | switch (resp) { | |
195 | case SDW_CMD_OK: | |
196 | return 0; | |
197 | ||
198 | case SDW_CMD_IGNORED: | |
199 | return -ENODATA; | |
200 | ||
201 | case SDW_CMD_TIMEOUT: | |
202 | return -ETIMEDOUT; | |
203 | ||
204 | default: | |
205 | return -EIO; | |
206 | } | |
207 | } | |
208 | ||
209 | static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
210 | { | |
211 | int retry = bus->prop.err_threshold; | |
212 | enum sdw_command_response resp; | |
213 | int ret = 0, i; | |
214 | ||
215 | for (i = 0; i <= retry; i++) { | |
216 | resp = bus->ops->xfer_msg(bus, msg); | |
217 | ret = find_response_code(resp); | |
218 | ||
219 | /* if cmd is ok or ignored return */ | |
220 | if (ret == 0 || ret == -ENODATA) | |
221 | return ret; | |
222 | } | |
223 | ||
224 | return ret; | |
225 | } | |
226 | ||
227 | static inline int do_transfer_defer(struct sdw_bus *bus, | |
73ede046 PLB |
228 | struct sdw_msg *msg, |
229 | struct sdw_defer *defer) | |
9d715fa0 VK |
230 | { |
231 | int retry = bus->prop.err_threshold; | |
232 | enum sdw_command_response resp; | |
233 | int ret = 0, i; | |
234 | ||
235 | defer->msg = msg; | |
236 | defer->length = msg->len; | |
a306a0e4 | 237 | init_completion(&defer->complete); |
9d715fa0 VK |
238 | |
239 | for (i = 0; i <= retry; i++) { | |
240 | resp = bus->ops->xfer_msg_defer(bus, msg, defer); | |
241 | ret = find_response_code(resp); | |
242 | /* if cmd is ok or ignored return */ | |
243 | if (ret == 0 || ret == -ENODATA) | |
244 | return ret; | |
245 | } | |
246 | ||
247 | return ret; | |
248 | } | |
249 | ||
a350aff4 PLB |
250 | static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg) |
251 | { | |
252 | int ret; | |
253 | ||
254 | ret = do_transfer(bus, msg); | |
255 | if (ret != 0 && ret != -ENODATA) | |
ec475187 BL |
256 | dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n", |
257 | msg->dev_num, ret, | |
258 | (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read", | |
259 | msg->addr, msg->len); | |
a350aff4 | 260 | |
a350aff4 PLB |
261 | return ret; |
262 | } | |
263 | ||
9d715fa0 VK |
264 | /** |
265 | * sdw_transfer() - Synchronous transfer message to a SDW Slave device | |
266 | * @bus: SDW bus | |
267 | * @msg: SDW message to be xfered | |
268 | */ | |
269 | int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg) | |
270 | { | |
271 | int ret; | |
272 | ||
273 | mutex_lock(&bus->msg_lock); | |
274 | ||
a350aff4 | 275 | ret = sdw_transfer_unlocked(bus, msg); |
9d715fa0 VK |
276 | |
277 | mutex_unlock(&bus->msg_lock); | |
278 | ||
279 | return ret; | |
280 | } | |
281 | ||
79fe02cb PLB |
282 | /** |
283 | * sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers | |
284 | * @bus: SDW bus | |
285 | * @sync_delay: Delay before reading status | |
286 | */ | |
287 | void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay) | |
288 | { | |
289 | u32 status; | |
290 | ||
291 | if (!bus->ops->read_ping_status) | |
292 | return; | |
293 | ||
294 | /* | |
295 | * wait for peripheral to sync if desired. 10-15ms should be more than | |
296 | * enough in most cases. | |
297 | */ | |
298 | if (sync_delay) | |
299 | usleep_range(10000, 15000); | |
300 | ||
301 | mutex_lock(&bus->msg_lock); | |
302 | ||
303 | status = bus->ops->read_ping_status(bus); | |
304 | ||
305 | mutex_unlock(&bus->msg_lock); | |
306 | ||
307 | if (!status) | |
308 | dev_warn(bus->dev, "%s: no peripherals attached\n", __func__); | |
309 | else | |
310 | dev_dbg(bus->dev, "PING status: %#x\n", status); | |
311 | } | |
312 | EXPORT_SYMBOL(sdw_show_ping_status); | |
313 | ||
9d715fa0 VK |
314 | /** |
315 | * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device | |
316 | * @bus: SDW bus | |
317 | * @msg: SDW message to be xfered | |
318 | * @defer: Defer block for signal completion | |
319 | * | |
320 | * Caller needs to hold the msg_lock lock while calling this | |
321 | */ | |
322 | int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg, | |
73ede046 | 323 | struct sdw_defer *defer) |
9d715fa0 VK |
324 | { |
325 | int ret; | |
326 | ||
327 | if (!bus->ops->xfer_msg_defer) | |
328 | return -ENOTSUPP; | |
329 | ||
330 | ret = do_transfer_defer(bus, msg, defer); | |
331 | if (ret != 0 && ret != -ENODATA) | |
332 | dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n", | |
73ede046 | 333 | msg->dev_num, ret); |
9d715fa0 | 334 | |
9d715fa0 VK |
335 | return ret; |
336 | } | |
337 | ||
9d715fa0 | 338 | int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave, |
73ede046 | 339 | u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) |
9d715fa0 VK |
340 | { |
341 | memset(msg, 0, sizeof(*msg)); | |
342 | msg->addr = addr; /* addr is 16 bit and truncated here */ | |
343 | msg->len = count; | |
344 | msg->dev_num = dev_num; | |
345 | msg->flags = flags; | |
346 | msg->buf = buf; | |
9d715fa0 | 347 | |
f779ad09 | 348 | if (addr < SDW_REG_NO_PAGE) /* no paging area */ |
9d715fa0 | 349 | return 0; |
f779ad09 GL |
350 | |
351 | if (addr >= SDW_REG_MAX) { /* illegal addr */ | |
9d715fa0 VK |
352 | pr_err("SDW: Invalid address %x passed\n", addr); |
353 | return -EINVAL; | |
354 | } | |
355 | ||
356 | if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */ | |
357 | if (slave && !slave->prop.paging_support) | |
358 | return 0; | |
21c2de29 | 359 | /* no need for else as that will fall-through to paging */ |
9d715fa0 VK |
360 | } |
361 | ||
362 | /* paging mandatory */ | |
363 | if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) { | |
364 | pr_err("SDW: Invalid device for paging :%d\n", dev_num); | |
365 | return -EINVAL; | |
366 | } | |
367 | ||
368 | if (!slave) { | |
369 | pr_err("SDW: No slave for paging addr\n"); | |
370 | return -EINVAL; | |
f779ad09 GL |
371 | } |
372 | ||
373 | if (!slave->prop.paging_support) { | |
9d715fa0 | 374 | dev_err(&slave->dev, |
17ed5bef | 375 | "address %x needs paging but no support\n", addr); |
9d715fa0 VK |
376 | return -EINVAL; |
377 | } | |
378 | ||
d5826a4b VK |
379 | msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr); |
380 | msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr); | |
9d715fa0 VK |
381 | msg->addr |= BIT(15); |
382 | msg->page = true; | |
383 | ||
384 | return 0; | |
385 | } | |
386 | ||
60ee9be2 PLB |
387 | /* |
388 | * Read/Write IO functions. | |
389 | * no_pm versions can only be called by the bus, e.g. while enumerating or | |
390 | * handling suspend-resume sequences. | |
391 | * all clients need to use the pm versions | |
392 | */ | |
393 | ||
62dc9f3f | 394 | int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) |
60ee9be2 PLB |
395 | { |
396 | struct sdw_msg msg; | |
397 | int ret; | |
398 | ||
399 | ret = sdw_fill_msg(&msg, slave, addr, count, | |
400 | slave->dev_num, SDW_MSG_FLAG_READ, val); | |
401 | if (ret < 0) | |
402 | return ret; | |
403 | ||
7fae3cfb PLB |
404 | ret = sdw_transfer(slave->bus, &msg); |
405 | if (slave->is_mockup_device) | |
406 | ret = 0; | |
407 | return ret; | |
60ee9be2 | 408 | } |
62dc9f3f | 409 | EXPORT_SYMBOL(sdw_nread_no_pm); |
60ee9be2 | 410 | |
62dc9f3f | 411 | int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
60ee9be2 PLB |
412 | { |
413 | struct sdw_msg msg; | |
414 | int ret; | |
415 | ||
416 | ret = sdw_fill_msg(&msg, slave, addr, count, | |
031e668b | 417 | slave->dev_num, SDW_MSG_FLAG_WRITE, (u8 *)val); |
60ee9be2 PLB |
418 | if (ret < 0) |
419 | return ret; | |
420 | ||
7fae3cfb PLB |
421 | ret = sdw_transfer(slave->bus, &msg); |
422 | if (slave->is_mockup_device) | |
423 | ret = 0; | |
424 | return ret; | |
60ee9be2 | 425 | } |
62dc9f3f | 426 | EXPORT_SYMBOL(sdw_nwrite_no_pm); |
60ee9be2 | 427 | |
167790ab | 428 | int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value) |
60ee9be2 PLB |
429 | { |
430 | return sdw_nwrite_no_pm(slave, addr, 1, &value); | |
431 | } | |
167790ab | 432 | EXPORT_SYMBOL(sdw_write_no_pm); |
60ee9be2 | 433 | |
0231453b RW |
434 | static int |
435 | sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr) | |
436 | { | |
437 | struct sdw_msg msg; | |
438 | u8 buf; | |
439 | int ret; | |
440 | ||
441 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
442 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 443 | if (ret < 0) |
0231453b RW |
444 | return ret; |
445 | ||
446 | ret = sdw_transfer(bus, &msg); | |
447 | if (ret < 0) | |
448 | return ret; | |
f779ad09 GL |
449 | |
450 | return buf; | |
0231453b RW |
451 | } |
452 | ||
453 | static int | |
454 | sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
455 | { | |
456 | struct sdw_msg msg; | |
457 | int ret; | |
458 | ||
459 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
460 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 461 | if (ret < 0) |
0231453b RW |
462 | return ret; |
463 | ||
464 | return sdw_transfer(bus, &msg); | |
465 | } | |
466 | ||
a350aff4 PLB |
467 | int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr) |
468 | { | |
469 | struct sdw_msg msg; | |
470 | u8 buf; | |
471 | int ret; | |
472 | ||
473 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
474 | SDW_MSG_FLAG_READ, &buf); | |
a5759f19 | 475 | if (ret < 0) |
a350aff4 PLB |
476 | return ret; |
477 | ||
478 | ret = sdw_transfer_unlocked(bus, &msg); | |
479 | if (ret < 0) | |
480 | return ret; | |
481 | ||
482 | return buf; | |
483 | } | |
484 | EXPORT_SYMBOL(sdw_bread_no_pm_unlocked); | |
485 | ||
486 | int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value) | |
487 | { | |
488 | struct sdw_msg msg; | |
489 | int ret; | |
490 | ||
491 | ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num, | |
492 | SDW_MSG_FLAG_WRITE, &value); | |
a5759f19 | 493 | if (ret < 0) |
a350aff4 PLB |
494 | return ret; |
495 | ||
496 | return sdw_transfer_unlocked(bus, &msg); | |
497 | } | |
498 | EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked); | |
499 | ||
167790ab | 500 | int sdw_read_no_pm(struct sdw_slave *slave, u32 addr) |
0231453b RW |
501 | { |
502 | u8 buf; | |
503 | int ret; | |
504 | ||
505 | ret = sdw_nread_no_pm(slave, addr, 1, &buf); | |
506 | if (ret < 0) | |
507 | return ret; | |
508 | else | |
509 | return buf; | |
510 | } | |
167790ab | 511 | EXPORT_SYMBOL(sdw_read_no_pm); |
0231453b | 512 | |
d38ebaf2 | 513 | int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) |
b04c975e PLB |
514 | { |
515 | int tmp; | |
516 | ||
517 | tmp = sdw_read_no_pm(slave, addr); | |
518 | if (tmp < 0) | |
519 | return tmp; | |
520 | ||
521 | tmp = (tmp & ~mask) | val; | |
522 | return sdw_write_no_pm(slave, addr, tmp); | |
523 | } | |
d38ebaf2 PLB |
524 | EXPORT_SYMBOL(sdw_update_no_pm); |
525 | ||
526 | /* Read-Modify-Write Slave register */ | |
527 | int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val) | |
528 | { | |
529 | int tmp; | |
530 | ||
531 | tmp = sdw_read(slave, addr); | |
532 | if (tmp < 0) | |
533 | return tmp; | |
534 | ||
535 | tmp = (tmp & ~mask) | val; | |
536 | return sdw_write(slave, addr, tmp); | |
537 | } | |
538 | EXPORT_SYMBOL(sdw_update); | |
b04c975e | 539 | |
9d715fa0 VK |
540 | /** |
541 | * sdw_nread() - Read "n" contiguous SDW Slave registers | |
542 | * @slave: SDW Slave | |
543 | * @addr: Register address | |
544 | * @count: length | |
545 | * @val: Buffer for values to be read | |
546 | */ | |
547 | int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val) | |
548 | { | |
9d715fa0 VK |
549 | int ret; |
550 | ||
443a98e6 PLB |
551 | ret = pm_runtime_resume_and_get(&slave->dev); |
552 | if (ret < 0 && ret != -EACCES) | |
9d715fa0 | 553 | return ret; |
60ee9be2 PLB |
554 | |
555 | ret = sdw_nread_no_pm(slave, addr, count, val); | |
9d715fa0 | 556 | |
973794e8 PLB |
557 | pm_runtime_mark_last_busy(&slave->dev); |
558 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
559 | |
560 | return ret; | |
561 | } | |
562 | EXPORT_SYMBOL(sdw_nread); | |
563 | ||
564 | /** | |
565 | * sdw_nwrite() - Write "n" contiguous SDW Slave registers | |
566 | * @slave: SDW Slave | |
567 | * @addr: Register address | |
568 | * @count: length | |
031e668b | 569 | * @val: Buffer for values to be written |
9d715fa0 | 570 | */ |
031e668b | 571 | int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val) |
9d715fa0 | 572 | { |
9d715fa0 VK |
573 | int ret; |
574 | ||
443a98e6 PLB |
575 | ret = pm_runtime_resume_and_get(&slave->dev); |
576 | if (ret < 0 && ret != -EACCES) | |
9d715fa0 | 577 | return ret; |
60ee9be2 PLB |
578 | |
579 | ret = sdw_nwrite_no_pm(slave, addr, count, val); | |
9d715fa0 | 580 | |
973794e8 PLB |
581 | pm_runtime_mark_last_busy(&slave->dev); |
582 | pm_runtime_put(&slave->dev); | |
9d715fa0 VK |
583 | |
584 | return ret; | |
585 | } | |
586 | EXPORT_SYMBOL(sdw_nwrite); | |
587 | ||
588 | /** | |
589 | * sdw_read() - Read a SDW Slave register | |
590 | * @slave: SDW Slave | |
591 | * @addr: Register address | |
592 | */ | |
593 | int sdw_read(struct sdw_slave *slave, u32 addr) | |
594 | { | |
595 | u8 buf; | |
596 | int ret; | |
597 | ||
598 | ret = sdw_nread(slave, addr, 1, &buf); | |
599 | if (ret < 0) | |
600 | return ret; | |
f779ad09 GL |
601 | |
602 | return buf; | |
9d715fa0 VK |
603 | } |
604 | EXPORT_SYMBOL(sdw_read); | |
605 | ||
606 | /** | |
607 | * sdw_write() - Write a SDW Slave register | |
608 | * @slave: SDW Slave | |
609 | * @addr: Register address | |
610 | * @value: Register value | |
611 | */ | |
612 | int sdw_write(struct sdw_slave *slave, u32 addr, u8 value) | |
613 | { | |
614 | return sdw_nwrite(slave, addr, 1, &value); | |
9d715fa0 VK |
615 | } |
616 | EXPORT_SYMBOL(sdw_write); | |
617 | ||
d52d7a1b SK |
618 | /* |
619 | * SDW alert handling | |
620 | */ | |
621 | ||
622 | /* called with bus_lock held */ | |
623 | static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i) | |
624 | { | |
1429cc26 | 625 | struct sdw_slave *slave; |
d52d7a1b SK |
626 | |
627 | list_for_each_entry(slave, &bus->slaves, node) { | |
628 | if (slave->dev_num == i) | |
629 | return slave; | |
630 | } | |
631 | ||
632 | return NULL; | |
633 | } | |
634 | ||
01ad444e | 635 | int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id) |
d52d7a1b | 636 | { |
2e8c4ad1 | 637 | if (slave->id.mfg_id != id.mfg_id || |
09830d5e | 638 | slave->id.part_id != id.part_id || |
2e8c4ad1 PLB |
639 | slave->id.class_id != id.class_id || |
640 | (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID && | |
641 | slave->id.unique_id != id.unique_id)) | |
d52d7a1b SK |
642 | return -ENODEV; |
643 | ||
644 | return 0; | |
645 | } | |
01ad444e | 646 | EXPORT_SYMBOL(sdw_compare_devid); |
d52d7a1b SK |
647 | |
648 | /* called with bus_lock held */ | |
649 | static int sdw_get_device_num(struct sdw_slave *slave) | |
650 | { | |
651 | int bit; | |
652 | ||
c6056101 PLB |
653 | if (slave->bus->dev_num_ida_min) { |
654 | bit = ida_alloc_range(&sdw_peripheral_ida, | |
655 | slave->bus->dev_num_ida_min, SDW_MAX_DEVICES, | |
656 | GFP_KERNEL); | |
657 | if (bit < 0) | |
658 | goto err; | |
659 | } else { | |
660 | bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES); | |
661 | if (bit == SDW_MAX_DEVICES) { | |
662 | bit = -ENODEV; | |
663 | goto err; | |
664 | } | |
d52d7a1b SK |
665 | } |
666 | ||
667 | /* | |
668 | * Do not update dev_num in Slave data structure here, | |
669 | * Update once program dev_num is successful | |
670 | */ | |
671 | set_bit(bit, slave->bus->assigned); | |
672 | ||
673 | err: | |
674 | return bit; | |
675 | } | |
676 | ||
677 | static int sdw_assign_device_num(struct sdw_slave *slave) | |
678 | { | |
6d7a1ff7 | 679 | struct sdw_bus *bus = slave->bus; |
d52d7a1b | 680 | int ret, dev_num; |
fd6a3ac8 | 681 | bool new_device = false; |
d52d7a1b SK |
682 | |
683 | /* check first if device number is assigned, if so reuse that */ | |
684 | if (!slave->dev_num) { | |
fd6a3ac8 PLB |
685 | if (!slave->dev_num_sticky) { |
686 | mutex_lock(&slave->bus->bus_lock); | |
687 | dev_num = sdw_get_device_num(slave); | |
688 | mutex_unlock(&slave->bus->bus_lock); | |
689 | if (dev_num < 0) { | |
6d7a1ff7 | 690 | dev_err(bus->dev, "Get dev_num failed: %d\n", |
fd6a3ac8 PLB |
691 | dev_num); |
692 | return dev_num; | |
693 | } | |
694 | slave->dev_num = dev_num; | |
695 | slave->dev_num_sticky = dev_num; | |
696 | new_device = true; | |
697 | } else { | |
698 | slave->dev_num = slave->dev_num_sticky; | |
d52d7a1b | 699 | } |
fd6a3ac8 PLB |
700 | } |
701 | ||
702 | if (!new_device) | |
6d7a1ff7 | 703 | dev_dbg(bus->dev, |
f48f4fd9 PLB |
704 | "Slave already registered, reusing dev_num:%d\n", |
705 | slave->dev_num); | |
d52d7a1b | 706 | |
fd6a3ac8 PLB |
707 | /* Clear the slave->dev_num to transfer message on device 0 */ |
708 | dev_num = slave->dev_num; | |
709 | slave->dev_num = 0; | |
d52d7a1b | 710 | |
d300de4f | 711 | ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num); |
d52d7a1b | 712 | if (ret < 0) { |
6d7a1ff7 | 713 | dev_err(bus->dev, "Program device_num %d failed: %d\n", |
6e0ac6a6 | 714 | dev_num, ret); |
d52d7a1b SK |
715 | return ret; |
716 | } | |
717 | ||
718 | /* After xfer of msg, restore dev_num */ | |
fd6a3ac8 | 719 | slave->dev_num = slave->dev_num_sticky; |
d52d7a1b SK |
720 | |
721 | return 0; | |
722 | } | |
723 | ||
7c3cd189 | 724 | void sdw_extract_slave_id(struct sdw_bus *bus, |
73ede046 | 725 | u64 addr, struct sdw_slave_id *id) |
7c3cd189 | 726 | { |
17ed5bef | 727 | dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr); |
7c3cd189 | 728 | |
2c6cff68 PLB |
729 | id->sdw_version = SDW_VERSION(addr); |
730 | id->unique_id = SDW_UNIQUE_ID(addr); | |
731 | id->mfg_id = SDW_MFG_ID(addr); | |
732 | id->part_id = SDW_PART_ID(addr); | |
733 | id->class_id = SDW_CLASS_ID(addr); | |
7c3cd189 VK |
734 | |
735 | dev_dbg(bus->dev, | |
c397efb7 PLB |
736 | "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n", |
737 | id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version); | |
7c3cd189 | 738 | } |
01ad444e | 739 | EXPORT_SYMBOL(sdw_extract_slave_id); |
d52d7a1b | 740 | |
72124f07 | 741 | static int sdw_program_device_num(struct sdw_bus *bus, bool *programmed) |
d52d7a1b SK |
742 | { |
743 | u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0}; | |
744 | struct sdw_slave *slave, *_s; | |
745 | struct sdw_slave_id id; | |
746 | struct sdw_msg msg; | |
f03690f4 | 747 | bool found; |
d52d7a1b SK |
748 | int count = 0, ret; |
749 | u64 addr; | |
750 | ||
72124f07 RF |
751 | *programmed = false; |
752 | ||
d52d7a1b SK |
753 | /* No Slave, so use raw xfer api */ |
754 | ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0, | |
73ede046 | 755 | SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf); |
d52d7a1b SK |
756 | if (ret < 0) |
757 | return ret; | |
758 | ||
759 | do { | |
760 | ret = sdw_transfer(bus, &msg); | |
761 | if (ret == -ENODATA) { /* end of device id reads */ | |
6e0ac6a6 | 762 | dev_dbg(bus->dev, "No more devices to enumerate\n"); |
d52d7a1b SK |
763 | ret = 0; |
764 | break; | |
765 | } | |
766 | if (ret < 0) { | |
767 | dev_err(bus->dev, "DEVID read fail:%d\n", ret); | |
768 | break; | |
769 | } | |
770 | ||
771 | /* | |
772 | * Construct the addr and extract. Cast the higher shift | |
773 | * bits to avoid truncation due to size limit. | |
774 | */ | |
775 | addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) | | |
0132af05 CIK |
776 | ((u64)buf[2] << 24) | ((u64)buf[1] << 32) | |
777 | ((u64)buf[0] << 40); | |
d52d7a1b SK |
778 | |
779 | sdw_extract_slave_id(bus, addr, &id); | |
780 | ||
f03690f4 | 781 | found = false; |
d52d7a1b SK |
782 | /* Now compare with entries */ |
783 | list_for_each_entry_safe(slave, _s, &bus->slaves, node) { | |
784 | if (sdw_compare_devid(slave, id) == 0) { | |
785 | found = true; | |
786 | ||
7297f8fa RF |
787 | /* |
788 | * To prevent skipping state-machine stages don't | |
789 | * program a device until we've seen it UNATTACH. | |
790 | * Must return here because no other device on #0 | |
791 | * can be detected until this one has been | |
792 | * assigned a device ID. | |
793 | */ | |
794 | if (slave->status != SDW_SLAVE_UNATTACHED) | |
795 | return 0; | |
796 | ||
d52d7a1b SK |
797 | /* |
798 | * Assign a new dev_num to this Slave and | |
799 | * not mark it present. It will be marked | |
800 | * present after it reports ATTACHED on new | |
801 | * dev_num | |
802 | */ | |
803 | ret = sdw_assign_device_num(slave); | |
a5759f19 | 804 | if (ret < 0) { |
6d7a1ff7 | 805 | dev_err(bus->dev, |
17ed5bef | 806 | "Assign dev_num failed:%d\n", |
d52d7a1b SK |
807 | ret); |
808 | return ret; | |
809 | } | |
810 | ||
72124f07 RF |
811 | *programmed = true; |
812 | ||
d52d7a1b SK |
813 | break; |
814 | } | |
815 | } | |
816 | ||
d7b956b6 | 817 | if (!found) { |
d52d7a1b | 818 | /* TODO: Park this device in Group 13 */ |
fcb9d730 SK |
819 | |
820 | /* | |
821 | * add Slave device even if there is no platform | |
822 | * firmware description. There will be no driver probe | |
823 | * but the user/integration will be able to see the | |
824 | * device, enumeration status and device number in sysfs | |
825 | */ | |
826 | sdw_slave_add(bus, &id, NULL); | |
827 | ||
17ed5bef | 828 | dev_err(bus->dev, "Slave Entry not found\n"); |
d52d7a1b SK |
829 | } |
830 | ||
831 | count++; | |
832 | ||
833 | /* | |
834 | * Check till error out or retry (count) exhausts. | |
835 | * Device can drop off and rejoin during enumeration | |
836 | * so count till twice the bound. | |
837 | */ | |
838 | ||
839 | } while (ret == 0 && count < (SDW_MAX_DEVICES * 2)); | |
840 | ||
841 | return ret; | |
842 | } | |
843 | ||
844 | static void sdw_modify_slave_status(struct sdw_slave *slave, | |
73ede046 | 845 | enum sdw_slave_status status) |
d52d7a1b | 846 | { |
6d7a1ff7 PLB |
847 | struct sdw_bus *bus = slave->bus; |
848 | ||
849 | mutex_lock(&bus->bus_lock); | |
fb9469e5 | 850 | |
6d7a1ff7 | 851 | dev_vdbg(bus->dev, |
9af8c36a PLB |
852 | "changing status slave %d status %d new status %d\n", |
853 | slave->dev_num, slave->status, status); | |
fb9469e5 PLB |
854 | |
855 | if (status == SDW_SLAVE_UNATTACHED) { | |
856 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
857 | "initializing enumeration and init completion for Slave %d\n", |
858 | slave->dev_num); | |
fb9469e5 PLB |
859 | |
860 | init_completion(&slave->enumeration_complete); | |
a90def06 | 861 | init_completion(&slave->initialization_complete); |
fb9469e5 PLB |
862 | |
863 | } else if ((status == SDW_SLAVE_ATTACHED) && | |
864 | (slave->status == SDW_SLAVE_UNATTACHED)) { | |
865 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
866 | "signaling enumeration completion for Slave %d\n", |
867 | slave->dev_num); | |
fb9469e5 PLB |
868 | |
869 | complete(&slave->enumeration_complete); | |
870 | } | |
d52d7a1b | 871 | slave->status = status; |
6d7a1ff7 | 872 | mutex_unlock(&bus->bus_lock); |
d52d7a1b SK |
873 | } |
874 | ||
0231453b RW |
875 | static int sdw_slave_clk_stop_callback(struct sdw_slave *slave, |
876 | enum sdw_clk_stop_mode mode, | |
877 | enum sdw_clk_stop_type type) | |
878 | { | |
bd29c00e | 879 | int ret = 0; |
0231453b | 880 | |
bd29c00e PLB |
881 | mutex_lock(&slave->sdw_dev_lock); |
882 | ||
883 | if (slave->probed) { | |
884 | struct device *dev = &slave->dev; | |
885 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
886 | ||
887 | if (drv->ops && drv->ops->clk_stop) | |
888 | ret = drv->ops->clk_stop(slave, mode, type); | |
0231453b RW |
889 | } |
890 | ||
bd29c00e PLB |
891 | mutex_unlock(&slave->sdw_dev_lock); |
892 | ||
893 | return ret; | |
0231453b RW |
894 | } |
895 | ||
896 | static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave, | |
897 | enum sdw_clk_stop_mode mode, | |
898 | bool prepare) | |
899 | { | |
900 | bool wake_en; | |
901 | u32 val = 0; | |
902 | int ret; | |
903 | ||
904 | wake_en = slave->prop.wake_capable; | |
905 | ||
906 | if (prepare) { | |
907 | val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP; | |
908 | ||
909 | if (mode == SDW_CLK_STOP_MODE1) | |
910 | val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1; | |
911 | ||
912 | if (wake_en) | |
913 | val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN; | |
914 | } else { | |
665cf215 PLB |
915 | ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL); |
916 | if (ret < 0) { | |
b50bb8ba PLB |
917 | if (ret != -ENODATA) |
918 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret); | |
665cf215 PLB |
919 | return ret; |
920 | } | |
921 | val = ret; | |
0231453b RW |
922 | val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP); |
923 | } | |
924 | ||
925 | ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val); | |
926 | ||
b50bb8ba PLB |
927 | if (ret < 0 && ret != -ENODATA) |
928 | dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret); | |
0231453b RW |
929 | |
930 | return ret; | |
931 | } | |
932 | ||
933 | static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num) | |
934 | { | |
935 | int retry = bus->clk_stop_timeout; | |
936 | int val; | |
937 | ||
938 | do { | |
665cf215 PLB |
939 | val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT); |
940 | if (val < 0) { | |
9f9bc7d5 PLB |
941 | if (val != -ENODATA) |
942 | dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val); | |
665cf215 PLB |
943 | return val; |
944 | } | |
945 | val &= SDW_SCP_STAT_CLK_STP_NF; | |
0231453b | 946 | if (!val) { |
54a6ca4f | 947 | dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d\n", |
af7254b4 | 948 | dev_num); |
0231453b RW |
949 | return 0; |
950 | } | |
951 | ||
952 | usleep_range(1000, 1500); | |
953 | retry--; | |
954 | } while (retry); | |
955 | ||
54a6ca4f | 956 | dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d\n", |
0231453b RW |
957 | dev_num); |
958 | ||
959 | return -ETIMEDOUT; | |
960 | } | |
961 | ||
962 | /** | |
963 | * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop | |
964 | * | |
965 | * @bus: SDW bus instance | |
966 | * | |
967 | * Query Slave for clock stop mode and prepare for that mode. | |
968 | */ | |
969 | int sdw_bus_prep_clk_stop(struct sdw_bus *bus) | |
970 | { | |
0231453b RW |
971 | bool simple_clk_stop = true; |
972 | struct sdw_slave *slave; | |
973 | bool is_slave = false; | |
974 | int ret = 0; | |
975 | ||
976 | /* | |
977 | * In order to save on transition time, prepare | |
978 | * each Slave and then wait for all Slave(s) to be | |
979 | * prepared for clock stop. | |
b50bb8ba PLB |
980 | * If one of the Slave devices has lost sync and |
981 | * replies with Command Ignored/-ENODATA, we continue | |
982 | * the loop | |
0231453b RW |
983 | */ |
984 | list_for_each_entry(slave, &bus->slaves, node) { | |
985 | if (!slave->dev_num) | |
986 | continue; | |
987 | ||
0231453b RW |
988 | if (slave->status != SDW_SLAVE_ATTACHED && |
989 | slave->status != SDW_SLAVE_ALERT) | |
990 | continue; | |
991 | ||
929cfee3 BL |
992 | /* Identify if Slave(s) are available on Bus */ |
993 | is_slave = true; | |
994 | ||
345e9f5c PLB |
995 | ret = sdw_slave_clk_stop_callback(slave, |
996 | SDW_CLK_STOP_MODE0, | |
0231453b | 997 | SDW_CLK_PRE_PREPARE); |
b50bb8ba PLB |
998 | if (ret < 0 && ret != -ENODATA) { |
999 | dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret); | |
0231453b RW |
1000 | return ret; |
1001 | } | |
1002 | ||
345e9f5c PLB |
1003 | /* Only prepare a Slave device if needed */ |
1004 | if (!slave->prop.simple_clk_stop_capable) { | |
0231453b | 1005 | simple_clk_stop = false; |
345e9f5c PLB |
1006 | |
1007 | ret = sdw_slave_clk_stop_prepare(slave, | |
1008 | SDW_CLK_STOP_MODE0, | |
1009 | true); | |
b50bb8ba PLB |
1010 | if (ret < 0 && ret != -ENODATA) { |
1011 | dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret); | |
345e9f5c PLB |
1012 | return ret; |
1013 | } | |
1014 | } | |
0231453b RW |
1015 | } |
1016 | ||
18de2f72 CS |
1017 | /* Skip remaining clock stop preparation if no Slave is attached */ |
1018 | if (!is_slave) | |
b50bb8ba | 1019 | return 0; |
18de2f72 | 1020 | |
345e9f5c PLB |
1021 | /* |
1022 | * Don't wait for all Slaves to be ready if they follow the simple | |
1023 | * state machine | |
1024 | */ | |
18de2f72 | 1025 | if (!simple_clk_stop) { |
0231453b RW |
1026 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, |
1027 | SDW_BROADCAST_DEV_NUM); | |
b50bb8ba PLB |
1028 | /* |
1029 | * if there are no Slave devices present and the reply is | |
1030 | * Command_Ignored/-ENODATA, we don't need to continue with the | |
1031 | * flow and can just return here. The error code is not modified | |
1032 | * and its handling left as an exercise for the caller. | |
1033 | */ | |
0231453b RW |
1034 | if (ret < 0) |
1035 | return ret; | |
1036 | } | |
1037 | ||
1038 | /* Inform slaves that prep is done */ | |
1039 | list_for_each_entry(slave, &bus->slaves, node) { | |
1040 | if (!slave->dev_num) | |
1041 | continue; | |
1042 | ||
1043 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1044 | slave->status != SDW_SLAVE_ALERT) | |
1045 | continue; | |
1046 | ||
345e9f5c PLB |
1047 | ret = sdw_slave_clk_stop_callback(slave, |
1048 | SDW_CLK_STOP_MODE0, | |
1049 | SDW_CLK_POST_PREPARE); | |
0231453b | 1050 | |
b50bb8ba PLB |
1051 | if (ret < 0 && ret != -ENODATA) { |
1052 | dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret); | |
1053 | return ret; | |
0231453b RW |
1054 | } |
1055 | } | |
1056 | ||
b50bb8ba | 1057 | return 0; |
0231453b RW |
1058 | } |
1059 | EXPORT_SYMBOL(sdw_bus_prep_clk_stop); | |
1060 | ||
1061 | /** | |
1062 | * sdw_bus_clk_stop: stop bus clock | |
1063 | * | |
1064 | * @bus: SDW bus instance | |
1065 | * | |
1066 | * After preparing the Slaves for clock stop, stop the clock by broadcasting | |
1067 | * write to SCP_CTRL register. | |
1068 | */ | |
1069 | int sdw_bus_clk_stop(struct sdw_bus *bus) | |
1070 | { | |
1071 | int ret; | |
1072 | ||
1073 | /* | |
1074 | * broadcast clock stop now, attached Slaves will ACK this, | |
1075 | * unattached will ignore | |
1076 | */ | |
1077 | ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM, | |
1078 | SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW); | |
1079 | if (ret < 0) { | |
b50bb8ba PLB |
1080 | if (ret != -ENODATA) |
1081 | dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret); | |
0231453b RW |
1082 | return ret; |
1083 | } | |
1084 | ||
1085 | return 0; | |
1086 | } | |
1087 | EXPORT_SYMBOL(sdw_bus_clk_stop); | |
1088 | ||
1089 | /** | |
1090 | * sdw_bus_exit_clk_stop: Exit clock stop mode | |
1091 | * | |
1092 | * @bus: SDW bus instance | |
1093 | * | |
1094 | * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves | |
1095 | * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate | |
1096 | * back. | |
1097 | */ | |
1098 | int sdw_bus_exit_clk_stop(struct sdw_bus *bus) | |
1099 | { | |
0231453b RW |
1100 | bool simple_clk_stop = true; |
1101 | struct sdw_slave *slave; | |
1102 | bool is_slave = false; | |
1103 | int ret; | |
1104 | ||
1105 | /* | |
1106 | * In order to save on transition time, de-prepare | |
1107 | * each Slave and then wait for all Slave(s) to be | |
1108 | * de-prepared after clock resume. | |
1109 | */ | |
1110 | list_for_each_entry(slave, &bus->slaves, node) { | |
1111 | if (!slave->dev_num) | |
1112 | continue; | |
1113 | ||
0231453b RW |
1114 | if (slave->status != SDW_SLAVE_ATTACHED && |
1115 | slave->status != SDW_SLAVE_ALERT) | |
1116 | continue; | |
1117 | ||
929cfee3 BL |
1118 | /* Identify if Slave(s) are available on Bus */ |
1119 | is_slave = true; | |
1120 | ||
345e9f5c | 1121 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
0231453b RW |
1122 | SDW_CLK_PRE_DEPREPARE); |
1123 | if (ret < 0) | |
b50bb8ba | 1124 | dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret); |
0231453b | 1125 | |
345e9f5c PLB |
1126 | /* Only de-prepare a Slave device if needed */ |
1127 | if (!slave->prop.simple_clk_stop_capable) { | |
1128 | simple_clk_stop = false; | |
0231453b | 1129 | |
345e9f5c PLB |
1130 | ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0, |
1131 | false); | |
0231453b | 1132 | |
345e9f5c | 1133 | if (ret < 0) |
b50bb8ba | 1134 | dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret); |
345e9f5c | 1135 | } |
0231453b RW |
1136 | } |
1137 | ||
18de2f72 | 1138 | /* Skip remaining clock stop de-preparation if no Slave is attached */ |
929cfee3 BL |
1139 | if (!is_slave) |
1140 | return 0; | |
1141 | ||
345e9f5c PLB |
1142 | /* |
1143 | * Don't wait for all Slaves to be ready if they follow the simple | |
1144 | * state machine | |
1145 | */ | |
b50bb8ba PLB |
1146 | if (!simple_clk_stop) { |
1147 | ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM); | |
1148 | if (ret < 0) | |
4cbbe74d | 1149 | dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret); |
b50bb8ba | 1150 | } |
18de2f72 | 1151 | |
0231453b RW |
1152 | list_for_each_entry(slave, &bus->slaves, node) { |
1153 | if (!slave->dev_num) | |
1154 | continue; | |
1155 | ||
1156 | if (slave->status != SDW_SLAVE_ATTACHED && | |
1157 | slave->status != SDW_SLAVE_ALERT) | |
1158 | continue; | |
1159 | ||
b50bb8ba PLB |
1160 | ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0, |
1161 | SDW_CLK_POST_DEPREPARE); | |
1162 | if (ret < 0) | |
1163 | dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret); | |
0231453b RW |
1164 | } |
1165 | ||
1166 | return 0; | |
1167 | } | |
1168 | EXPORT_SYMBOL(sdw_bus_exit_clk_stop); | |
1169 | ||
79df15b7 | 1170 | int sdw_configure_dpn_intr(struct sdw_slave *slave, |
73ede046 | 1171 | int port, bool enable, int mask) |
79df15b7 SK |
1172 | { |
1173 | u32 addr; | |
1174 | int ret; | |
1175 | u8 val = 0; | |
1176 | ||
dd87a72a PLB |
1177 | if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) { |
1178 | dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n", | |
1179 | enable ? "on" : "off"); | |
1180 | mask |= SDW_DPN_INT_TEST_FAIL; | |
1181 | } | |
1182 | ||
79df15b7 SK |
1183 | addr = SDW_DPN_INTMASK(port); |
1184 | ||
1185 | /* Set/Clear port ready interrupt mask */ | |
1186 | if (enable) { | |
1187 | val |= mask; | |
1188 | val |= SDW_DPN_INT_PORT_READY; | |
1189 | } else { | |
1190 | val &= ~(mask); | |
1191 | val &= ~SDW_DPN_INT_PORT_READY; | |
1192 | } | |
1193 | ||
545c3651 | 1194 | ret = sdw_update_no_pm(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val); |
79df15b7 | 1195 | if (ret < 0) |
6d7a1ff7 | 1196 | dev_err(&slave->dev, |
17ed5bef | 1197 | "SDW_DPN_INTMASK write failed:%d\n", val); |
79df15b7 SK |
1198 | |
1199 | return ret; | |
1200 | } | |
1201 | ||
29d158f9 PLB |
1202 | static int sdw_slave_set_frequency(struct sdw_slave *slave) |
1203 | { | |
1204 | u32 mclk_freq = slave->bus->prop.mclk_freq; | |
1205 | u32 curr_freq = slave->bus->params.curr_dr_freq >> 1; | |
1206 | unsigned int scale; | |
1207 | u8 scale_index; | |
1208 | u8 base; | |
1209 | int ret; | |
1210 | ||
1211 | /* | |
1212 | * frequency base and scale registers are required for SDCA | |
ffa17265 PLB |
1213 | * devices. They may also be used for 1.2+/non-SDCA devices. |
1214 | * Driver can set the property, we will need a DisCo property | |
1215 | * to discover this case from platform firmware. | |
29d158f9 | 1216 | */ |
ffa17265 | 1217 | if (!slave->id.class_id && !slave->prop.clock_reg_supported) |
29d158f9 PLB |
1218 | return 0; |
1219 | ||
1220 | if (!mclk_freq) { | |
1221 | dev_err(&slave->dev, | |
1222 | "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n"); | |
1223 | return -EINVAL; | |
1224 | } | |
1225 | ||
1226 | /* | |
1227 | * map base frequency using Table 89 of SoundWire 1.2 spec. | |
1228 | * The order of the tests just follows the specification, this | |
1229 | * is not a selection between possible values or a search for | |
1230 | * the best value but just a mapping. Only one case per platform | |
1231 | * is relevant. | |
1232 | * Some BIOS have inconsistent values for mclk_freq but a | |
1233 | * correct root so we force the mclk_freq to avoid variations. | |
1234 | */ | |
1235 | if (!(19200000 % mclk_freq)) { | |
1236 | mclk_freq = 19200000; | |
1237 | base = SDW_SCP_BASE_CLOCK_19200000_HZ; | |
1238 | } else if (!(24000000 % mclk_freq)) { | |
1239 | mclk_freq = 24000000; | |
1240 | base = SDW_SCP_BASE_CLOCK_24000000_HZ; | |
1241 | } else if (!(24576000 % mclk_freq)) { | |
1242 | mclk_freq = 24576000; | |
1243 | base = SDW_SCP_BASE_CLOCK_24576000_HZ; | |
1244 | } else if (!(22579200 % mclk_freq)) { | |
1245 | mclk_freq = 22579200; | |
1246 | base = SDW_SCP_BASE_CLOCK_22579200_HZ; | |
1247 | } else if (!(32000000 % mclk_freq)) { | |
1248 | mclk_freq = 32000000; | |
1249 | base = SDW_SCP_BASE_CLOCK_32000000_HZ; | |
1250 | } else { | |
1251 | dev_err(&slave->dev, | |
1252 | "Unsupported clock base, mclk %d\n", | |
1253 | mclk_freq); | |
1254 | return -EINVAL; | |
1255 | } | |
1256 | ||
1257 | if (mclk_freq % curr_freq) { | |
1258 | dev_err(&slave->dev, | |
1259 | "mclk %d is not multiple of bus curr_freq %d\n", | |
1260 | mclk_freq, curr_freq); | |
1261 | return -EINVAL; | |
1262 | } | |
1263 | ||
1264 | scale = mclk_freq / curr_freq; | |
1265 | ||
1266 | /* | |
1267 | * map scale to Table 90 of SoundWire 1.2 spec - and check | |
1268 | * that the scale is a power of two and maximum 64 | |
1269 | */ | |
1270 | scale_index = ilog2(scale); | |
1271 | ||
1272 | if (BIT(scale_index) != scale || scale_index > 6) { | |
1273 | dev_err(&slave->dev, | |
1274 | "No match found for scale %d, bus mclk %d curr_freq %d\n", | |
1275 | scale, mclk_freq, curr_freq); | |
1276 | return -EINVAL; | |
1277 | } | |
1278 | scale_index++; | |
1279 | ||
299e9780 | 1280 | ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base); |
29d158f9 PLB |
1281 | if (ret < 0) { |
1282 | dev_err(&slave->dev, | |
1283 | "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret); | |
1284 | return ret; | |
1285 | } | |
1286 | ||
1287 | /* initialize scale for both banks */ | |
299e9780 | 1288 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index); |
29d158f9 PLB |
1289 | if (ret < 0) { |
1290 | dev_err(&slave->dev, | |
1291 | "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret); | |
1292 | return ret; | |
1293 | } | |
299e9780 | 1294 | ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index); |
29d158f9 PLB |
1295 | if (ret < 0) |
1296 | dev_err(&slave->dev, | |
1297 | "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret); | |
1298 | ||
1299 | dev_dbg(&slave->dev, | |
1300 | "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n", | |
1301 | base, scale_index, mclk_freq, curr_freq); | |
1302 | ||
1303 | return ret; | |
1304 | } | |
1305 | ||
d52d7a1b SK |
1306 | static int sdw_initialize_slave(struct sdw_slave *slave) |
1307 | { | |
1308 | struct sdw_slave_prop *prop = &slave->prop; | |
6b8caa6f | 1309 | int status; |
d52d7a1b SK |
1310 | int ret; |
1311 | u8 val; | |
1312 | ||
29d158f9 PLB |
1313 | ret = sdw_slave_set_frequency(slave); |
1314 | if (ret < 0) | |
1315 | return ret; | |
1316 | ||
6b8caa6f BL |
1317 | if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) { |
1318 | /* Clear bus clash interrupt before enabling interrupt mask */ | |
1319 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1320 | if (status < 0) { | |
1321 | dev_err(&slave->dev, | |
1322 | "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status); | |
1323 | return status; | |
1324 | } | |
1325 | if (status & SDW_SCP_INT1_BUS_CLASH) { | |
1326 | dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n"); | |
1327 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH); | |
1328 | if (ret < 0) { | |
1329 | dev_err(&slave->dev, | |
1330 | "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret); | |
1331 | return ret; | |
1332 | } | |
1333 | } | |
1334 | } | |
1335 | if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) && | |
1336 | !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) { | |
1337 | /* Clear parity interrupt before enabling interrupt mask */ | |
1338 | status = sdw_read_no_pm(slave, SDW_SCP_INT1); | |
1339 | if (status < 0) { | |
1340 | dev_err(&slave->dev, | |
1341 | "SDW_SCP_INT1 (PARITY) read failed:%d\n", status); | |
1342 | return status; | |
1343 | } | |
1344 | if (status & SDW_SCP_INT1_PARITY) { | |
1345 | dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n"); | |
1346 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY); | |
1347 | if (ret < 0) { | |
1348 | dev_err(&slave->dev, | |
1349 | "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret); | |
1350 | return ret; | |
1351 | } | |
1352 | } | |
1353 | } | |
1354 | ||
d52d7a1b | 1355 | /* |
2acd30b9 PLB |
1356 | * Set SCP_INT1_MASK register, typically bus clash and |
1357 | * implementation-defined interrupt mask. The Parity detection | |
1358 | * may not always be correct on startup so its use is | |
1359 | * device-dependent, it might e.g. only be enabled in | |
1360 | * steady-state after a couple of frames. | |
d52d7a1b | 1361 | */ |
2acd30b9 | 1362 | val = slave->prop.scp_int1_mask; |
d52d7a1b SK |
1363 | |
1364 | /* Enable SCP interrupts */ | |
b04c975e | 1365 | ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val); |
d52d7a1b | 1366 | if (ret < 0) { |
6d7a1ff7 | 1367 | dev_err(&slave->dev, |
17ed5bef | 1368 | "SDW_SCP_INTMASK1 write failed:%d\n", ret); |
d52d7a1b SK |
1369 | return ret; |
1370 | } | |
1371 | ||
1372 | /* No need to continue if DP0 is not present */ | |
1373 | if (!slave->prop.dp0_prop) | |
1374 | return 0; | |
1375 | ||
1376 | /* Enable DP0 interrupts */ | |
8acbbfec | 1377 | val = prop->dp0_prop->imp_def_interrupts; |
d52d7a1b SK |
1378 | val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE; |
1379 | ||
b04c975e | 1380 | ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val); |
5de79ba8 | 1381 | if (ret < 0) |
6d7a1ff7 | 1382 | dev_err(&slave->dev, |
17ed5bef | 1383 | "SDW_DP0_INTMASK read failed:%d\n", ret); |
5de79ba8 | 1384 | return ret; |
d52d7a1b | 1385 | } |
b0a9c37b VK |
1386 | |
1387 | static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status) | |
1388 | { | |
b35991de | 1389 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1390 | int status, status2, ret, count = 0; |
1391 | ||
c30b63ef | 1392 | status = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1393 | if (status < 0) { |
6d7a1ff7 | 1394 | dev_err(&slave->dev, |
17ed5bef | 1395 | "SDW_DP0_INT read failed:%d\n", status); |
b0a9c37b VK |
1396 | return status; |
1397 | } | |
1398 | ||
1399 | do { | |
b35991de PLB |
1400 | clear = status & ~SDW_DP0_INTERRUPTS; |
1401 | ||
b0a9c37b | 1402 | if (status & SDW_DP0_INT_TEST_FAIL) { |
17ed5bef | 1403 | dev_err(&slave->dev, "Test fail for port 0\n"); |
b0a9c37b VK |
1404 | clear |= SDW_DP0_INT_TEST_FAIL; |
1405 | } | |
1406 | ||
1407 | /* | |
1408 | * Assumption: PORT_READY interrupt will be received only for | |
1409 | * ports implementing Channel Prepare state machine (CP_SM) | |
1410 | */ | |
1411 | ||
1412 | if (status & SDW_DP0_INT_PORT_READY) { | |
1413 | complete(&slave->port_ready[0]); | |
1414 | clear |= SDW_DP0_INT_PORT_READY; | |
1415 | } | |
1416 | ||
1417 | if (status & SDW_DP0_INT_BRA_FAILURE) { | |
17ed5bef | 1418 | dev_err(&slave->dev, "BRA failed\n"); |
b0a9c37b VK |
1419 | clear |= SDW_DP0_INT_BRA_FAILURE; |
1420 | } | |
1421 | ||
1422 | impl_int_mask = SDW_DP0_INT_IMPDEF1 | | |
1423 | SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3; | |
1424 | ||
1425 | if (status & impl_int_mask) { | |
1426 | clear |= impl_int_mask; | |
1427 | *slave_status = clear; | |
1428 | } | |
1429 | ||
b35991de | 1430 | /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */ |
c30b63ef | 1431 | ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear); |
b0a9c37b | 1432 | if (ret < 0) { |
6d7a1ff7 | 1433 | dev_err(&slave->dev, |
17ed5bef | 1434 | "SDW_DP0_INT write failed:%d\n", ret); |
b0a9c37b VK |
1435 | return ret; |
1436 | } | |
1437 | ||
1438 | /* Read DP0 interrupt again */ | |
c30b63ef | 1439 | status2 = sdw_read_no_pm(slave, SDW_DP0_INT); |
b0a9c37b | 1440 | if (status2 < 0) { |
6d7a1ff7 | 1441 | dev_err(&slave->dev, |
17ed5bef | 1442 | "SDW_DP0_INT read failed:%d\n", status2); |
80cd8f01 | 1443 | return status2; |
b0a9c37b | 1444 | } |
6e06a855 | 1445 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1446 | status &= status2; |
1447 | ||
1448 | count++; | |
1449 | ||
1450 | /* we can get alerts while processing so keep retrying */ | |
b35991de | 1451 | } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1452 | |
1453 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1454 | dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n"); |
b0a9c37b VK |
1455 | |
1456 | return ret; | |
1457 | } | |
1458 | ||
1459 | static int sdw_handle_port_interrupt(struct sdw_slave *slave, | |
73ede046 | 1460 | int port, u8 *slave_status) |
b0a9c37b | 1461 | { |
47b85209 | 1462 | u8 clear, impl_int_mask; |
b0a9c37b VK |
1463 | int status, status2, ret, count = 0; |
1464 | u32 addr; | |
1465 | ||
1466 | if (port == 0) | |
1467 | return sdw_handle_dp0_interrupt(slave, slave_status); | |
1468 | ||
1469 | addr = SDW_DPN_INT(port); | |
c30b63ef | 1470 | status = sdw_read_no_pm(slave, addr); |
b0a9c37b | 1471 | if (status < 0) { |
6d7a1ff7 | 1472 | dev_err(&slave->dev, |
17ed5bef | 1473 | "SDW_DPN_INT read failed:%d\n", status); |
b0a9c37b VK |
1474 | |
1475 | return status; | |
1476 | } | |
1477 | ||
1478 | do { | |
47b85209 PLB |
1479 | clear = status & ~SDW_DPN_INTERRUPTS; |
1480 | ||
b0a9c37b | 1481 | if (status & SDW_DPN_INT_TEST_FAIL) { |
17ed5bef | 1482 | dev_err(&slave->dev, "Test fail for port:%d\n", port); |
b0a9c37b VK |
1483 | clear |= SDW_DPN_INT_TEST_FAIL; |
1484 | } | |
1485 | ||
1486 | /* | |
1487 | * Assumption: PORT_READY interrupt will be received only | |
1488 | * for ports implementing CP_SM. | |
1489 | */ | |
1490 | if (status & SDW_DPN_INT_PORT_READY) { | |
1491 | complete(&slave->port_ready[port]); | |
1492 | clear |= SDW_DPN_INT_PORT_READY; | |
1493 | } | |
1494 | ||
1495 | impl_int_mask = SDW_DPN_INT_IMPDEF1 | | |
1496 | SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3; | |
1497 | ||
b0a9c37b VK |
1498 | if (status & impl_int_mask) { |
1499 | clear |= impl_int_mask; | |
1500 | *slave_status = clear; | |
1501 | } | |
1502 | ||
47b85209 | 1503 | /* clear the interrupt but don't touch reserved fields */ |
c30b63ef | 1504 | ret = sdw_write_no_pm(slave, addr, clear); |
b0a9c37b | 1505 | if (ret < 0) { |
6d7a1ff7 | 1506 | dev_err(&slave->dev, |
17ed5bef | 1507 | "SDW_DPN_INT write failed:%d\n", ret); |
b0a9c37b VK |
1508 | return ret; |
1509 | } | |
1510 | ||
1511 | /* Read DPN interrupt again */ | |
c30b63ef | 1512 | status2 = sdw_read_no_pm(slave, addr); |
80cd8f01 | 1513 | if (status2 < 0) { |
6d7a1ff7 | 1514 | dev_err(&slave->dev, |
17ed5bef | 1515 | "SDW_DPN_INT read failed:%d\n", status2); |
80cd8f01 | 1516 | return status2; |
b0a9c37b | 1517 | } |
6e06a855 | 1518 | /* filter to limit loop to interrupts identified in the first status read */ |
b0a9c37b VK |
1519 | status &= status2; |
1520 | ||
1521 | count++; | |
1522 | ||
1523 | /* we can get alerts while processing so keep retrying */ | |
47b85209 | 1524 | } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY)); |
b0a9c37b VK |
1525 | |
1526 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1527 | dev_warn(&slave->dev, "Reached MAX_RETRY on port read"); |
b0a9c37b VK |
1528 | |
1529 | return ret; | |
1530 | } | |
1531 | ||
1532 | static int sdw_handle_slave_alerts(struct sdw_slave *slave) | |
1533 | { | |
1534 | struct sdw_slave_intr_status slave_intr; | |
f1fac63a | 1535 | u8 clear = 0, bit, port_status[15] = {0}; |
b0a9c37b VK |
1536 | int port_num, stat, ret, count = 0; |
1537 | unsigned long port; | |
7ffaba04 | 1538 | bool slave_notify; |
b7cab9be | 1539 | u8 sdca_cascade = 0; |
b0a9c37b | 1540 | u8 buf, buf2[2], _buf, _buf2[2]; |
4724f12c PLB |
1541 | bool parity_check; |
1542 | bool parity_quirk; | |
b0a9c37b VK |
1543 | |
1544 | sdw_modify_slave_status(slave, SDW_SLAVE_ALERT); | |
1545 | ||
443a98e6 | 1546 | ret = pm_runtime_resume_and_get(&slave->dev); |
aa792935 RW |
1547 | if (ret < 0 && ret != -EACCES) { |
1548 | dev_err(&slave->dev, "Failed to resume device: %d\n", ret); | |
aa792935 RW |
1549 | return ret; |
1550 | } | |
1551 | ||
f8d0168e | 1552 | /* Read Intstat 1, Intstat 2 and Intstat 3 registers */ |
c30b63ef | 1553 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1554 | if (ret < 0) { |
6d7a1ff7 | 1555 | dev_err(&slave->dev, |
17ed5bef | 1556 | "SDW_SCP_INT1 read failed:%d\n", ret); |
aa792935 | 1557 | goto io_err; |
b0a9c37b | 1558 | } |
72b16d4a | 1559 | buf = ret; |
b0a9c37b | 1560 | |
c30b63ef | 1561 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2); |
b0a9c37b | 1562 | if (ret < 0) { |
6d7a1ff7 | 1563 | dev_err(&slave->dev, |
17ed5bef | 1564 | "SDW_SCP_INT2/3 read failed:%d\n", ret); |
aa792935 | 1565 | goto io_err; |
b0a9c37b VK |
1566 | } |
1567 | ||
be505ba8 | 1568 | if (slave->id.class_id) { |
c30b63ef | 1569 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1570 | if (ret < 0) { |
6d7a1ff7 | 1571 | dev_err(&slave->dev, |
b7cab9be PLB |
1572 | "SDW_DP0_INT read failed:%d\n", ret); |
1573 | goto io_err; | |
1574 | } | |
1575 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1576 | } | |
1577 | ||
b0a9c37b | 1578 | do { |
7ffaba04 PLB |
1579 | slave_notify = false; |
1580 | ||
b0a9c37b VK |
1581 | /* |
1582 | * Check parity, bus clash and Slave (impl defined) | |
1583 | * interrupt | |
1584 | */ | |
1585 | if (buf & SDW_SCP_INT1_PARITY) { | |
4724f12c PLB |
1586 | parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY; |
1587 | parity_quirk = !slave->first_interrupt_done && | |
1588 | (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY); | |
1589 | ||
1590 | if (parity_check && !parity_quirk) | |
310f6dc6 | 1591 | dev_err(&slave->dev, "Parity error detected\n"); |
b0a9c37b VK |
1592 | clear |= SDW_SCP_INT1_PARITY; |
1593 | } | |
1594 | ||
1595 | if (buf & SDW_SCP_INT1_BUS_CLASH) { | |
310f6dc6 PLB |
1596 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH) |
1597 | dev_err(&slave->dev, "Bus clash detected\n"); | |
b0a9c37b VK |
1598 | clear |= SDW_SCP_INT1_BUS_CLASH; |
1599 | } | |
1600 | ||
1601 | /* | |
1602 | * When bus clash or parity errors are detected, such errors | |
1603 | * are unlikely to be recoverable errors. | |
1604 | * TODO: In such scenario, reset bus. Make this configurable | |
1605 | * via sysfs property with bus reset being the default. | |
1606 | */ | |
1607 | ||
1608 | if (buf & SDW_SCP_INT1_IMPL_DEF) { | |
310f6dc6 PLB |
1609 | if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) { |
1610 | dev_dbg(&slave->dev, "Slave impl defined interrupt\n"); | |
1611 | slave_notify = true; | |
1612 | } | |
b0a9c37b | 1613 | clear |= SDW_SCP_INT1_IMPL_DEF; |
b0a9c37b VK |
1614 | } |
1615 | ||
b7cab9be PLB |
1616 | /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */ |
1617 | if (sdca_cascade) | |
1618 | slave_notify = true; | |
1619 | ||
b0a9c37b VK |
1620 | /* Check port 0 - 3 interrupts */ |
1621 | port = buf & SDW_SCP_INT1_PORT0_3; | |
1622 | ||
1623 | /* To get port number corresponding to bits, shift it */ | |
d5826a4b | 1624 | port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port); |
b0a9c37b VK |
1625 | for_each_set_bit(bit, &port, 8) { |
1626 | sdw_handle_port_interrupt(slave, bit, | |
73ede046 | 1627 | &port_status[bit]); |
b0a9c37b VK |
1628 | } |
1629 | ||
1630 | /* Check if cascade 2 interrupt is present */ | |
1631 | if (buf & SDW_SCP_INT1_SCP2_CASCADE) { | |
1632 | port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10; | |
1633 | for_each_set_bit(bit, &port, 8) { | |
1634 | /* scp2 ports start from 4 */ | |
560458df | 1635 | port_num = bit + 4; |
b0a9c37b VK |
1636 | sdw_handle_port_interrupt(slave, |
1637 | port_num, | |
1638 | &port_status[port_num]); | |
1639 | } | |
1640 | } | |
1641 | ||
1642 | /* now check last cascade */ | |
1643 | if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) { | |
1644 | port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14; | |
1645 | for_each_set_bit(bit, &port, 8) { | |
1646 | /* scp3 ports start from 11 */ | |
560458df | 1647 | port_num = bit + 11; |
b0a9c37b VK |
1648 | sdw_handle_port_interrupt(slave, |
1649 | port_num, | |
1650 | &port_status[port_num]); | |
1651 | } | |
1652 | } | |
1653 | ||
1654 | /* Update the Slave driver */ | |
bd29c00e PLB |
1655 | if (slave_notify) { |
1656 | mutex_lock(&slave->sdw_dev_lock); | |
1657 | ||
1658 | if (slave->probed) { | |
1659 | struct device *dev = &slave->dev; | |
1660 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1661 | ||
1662 | if (drv->ops && drv->ops->interrupt_callback) { | |
1663 | slave_intr.sdca_cascade = sdca_cascade; | |
1664 | slave_intr.control_port = clear; | |
1665 | memcpy(slave_intr.port, &port_status, | |
1666 | sizeof(slave_intr.port)); | |
1667 | ||
1668 | drv->ops->interrupt_callback(slave, &slave_intr); | |
1669 | } | |
1670 | } | |
1671 | ||
1672 | mutex_unlock(&slave->sdw_dev_lock); | |
b0a9c37b VK |
1673 | } |
1674 | ||
1675 | /* Ack interrupt */ | |
c30b63ef | 1676 | ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear); |
b0a9c37b | 1677 | if (ret < 0) { |
6d7a1ff7 | 1678 | dev_err(&slave->dev, |
17ed5bef | 1679 | "SDW_SCP_INT1 write failed:%d\n", ret); |
aa792935 | 1680 | goto io_err; |
b0a9c37b VK |
1681 | } |
1682 | ||
c2819e19 PLB |
1683 | /* at this point all initial interrupt sources were handled */ |
1684 | slave->first_interrupt_done = true; | |
1685 | ||
b0a9c37b VK |
1686 | /* |
1687 | * Read status again to ensure no new interrupts arrived | |
1688 | * while servicing interrupts. | |
1689 | */ | |
c30b63ef | 1690 | ret = sdw_read_no_pm(slave, SDW_SCP_INT1); |
b0a9c37b | 1691 | if (ret < 0) { |
6d7a1ff7 | 1692 | dev_err(&slave->dev, |
b500127e | 1693 | "SDW_SCP_INT1 recheck read failed:%d\n", ret); |
aa792935 | 1694 | goto io_err; |
b0a9c37b | 1695 | } |
72b16d4a | 1696 | _buf = ret; |
b0a9c37b | 1697 | |
c30b63ef | 1698 | ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2); |
b0a9c37b | 1699 | if (ret < 0) { |
6d7a1ff7 | 1700 | dev_err(&slave->dev, |
b500127e | 1701 | "SDW_SCP_INT2/3 recheck read failed:%d\n", ret); |
aa792935 | 1702 | goto io_err; |
b0a9c37b VK |
1703 | } |
1704 | ||
be505ba8 | 1705 | if (slave->id.class_id) { |
c30b63ef | 1706 | ret = sdw_read_no_pm(slave, SDW_DP0_INT); |
b7cab9be | 1707 | if (ret < 0) { |
6d7a1ff7 | 1708 | dev_err(&slave->dev, |
b500127e | 1709 | "SDW_DP0_INT recheck read failed:%d\n", ret); |
b7cab9be PLB |
1710 | goto io_err; |
1711 | } | |
1712 | sdca_cascade = ret & SDW_DP0_SDCA_CASCADE; | |
1713 | } | |
1714 | ||
6e06a855 PLB |
1715 | /* |
1716 | * Make sure no interrupts are pending, but filter to limit loop | |
1717 | * to interrupts identified in the first status read | |
1718 | */ | |
b0a9c37b VK |
1719 | buf &= _buf; |
1720 | buf2[0] &= _buf2[0]; | |
1721 | buf2[1] &= _buf2[1]; | |
b7cab9be | 1722 | stat = buf || buf2[0] || buf2[1] || sdca_cascade; |
b0a9c37b VK |
1723 | |
1724 | /* | |
1725 | * Exit loop if Slave is continuously in ALERT state even | |
1726 | * after servicing the interrupt multiple times. | |
1727 | */ | |
1728 | count++; | |
1729 | ||
1730 | /* we can get alerts while processing so keep retrying */ | |
1731 | } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY); | |
1732 | ||
1733 | if (count == SDW_READ_INTR_CLEAR_RETRY) | |
6d7a1ff7 | 1734 | dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n"); |
b0a9c37b | 1735 | |
aa792935 RW |
1736 | io_err: |
1737 | pm_runtime_mark_last_busy(&slave->dev); | |
1738 | pm_runtime_put_autosuspend(&slave->dev); | |
1739 | ||
b0a9c37b VK |
1740 | return ret; |
1741 | } | |
1742 | ||
1743 | static int sdw_update_slave_status(struct sdw_slave *slave, | |
73ede046 | 1744 | enum sdw_slave_status status) |
b0a9c37b | 1745 | { |
bd29c00e | 1746 | int ret = 0; |
b0a9c37b | 1747 | |
bd29c00e PLB |
1748 | mutex_lock(&slave->sdw_dev_lock); |
1749 | ||
1750 | if (slave->probed) { | |
1751 | struct device *dev = &slave->dev; | |
1752 | struct sdw_driver *drv = drv_to_sdw_driver(dev->driver); | |
1753 | ||
1754 | if (drv->ops && drv->ops->update_status) | |
1755 | ret = drv->ops->update_status(slave, status); | |
2140b66b PLB |
1756 | } |
1757 | ||
bd29c00e | 1758 | mutex_unlock(&slave->sdw_dev_lock); |
2140b66b | 1759 | |
bd29c00e | 1760 | return ret; |
b0a9c37b VK |
1761 | } |
1762 | ||
1763 | /** | |
1764 | * sdw_handle_slave_status() - Handle Slave status | |
1765 | * @bus: SDW bus instance | |
1766 | * @status: Status for all Slave(s) | |
1767 | */ | |
1768 | int sdw_handle_slave_status(struct sdw_bus *bus, | |
73ede046 | 1769 | enum sdw_slave_status status[]) |
b0a9c37b VK |
1770 | { |
1771 | enum sdw_slave_status prev_status; | |
1772 | struct sdw_slave *slave; | |
72124f07 | 1773 | bool attached_initializing, id_programmed; |
b0a9c37b VK |
1774 | int i, ret = 0; |
1775 | ||
61061901 PLB |
1776 | /* first check if any Slaves fell off the bus */ |
1777 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1778 | mutex_lock(&bus->bus_lock); | |
1779 | if (test_bit(i, bus->assigned) == false) { | |
1780 | mutex_unlock(&bus->bus_lock); | |
1781 | continue; | |
1782 | } | |
1783 | mutex_unlock(&bus->bus_lock); | |
1784 | ||
1785 | slave = sdw_get_slave(bus, i); | |
1786 | if (!slave) | |
1787 | continue; | |
1788 | ||
1789 | if (status[i] == SDW_SLAVE_UNATTACHED && | |
d1b32855 PLB |
1790 | slave->status != SDW_SLAVE_UNATTACHED) { |
1791 | dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n", | |
1792 | i, slave->status); | |
61061901 | 1793 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
f605f32e RF |
1794 | |
1795 | /* Ensure driver knows that peripheral unattached */ | |
1796 | ret = sdw_update_slave_status(slave, status[i]); | |
1797 | if (ret < 0) | |
1798 | dev_warn(&slave->dev, "Update Slave status failed:%d\n", ret); | |
d1b32855 | 1799 | } |
61061901 PLB |
1800 | } |
1801 | ||
b0a9c37b | 1802 | if (status[0] == SDW_SLAVE_ATTACHED) { |
6e0ac6a6 | 1803 | dev_dbg(bus->dev, "Slave attached, programming device number\n"); |
72124f07 | 1804 | |
15ed3ea2 | 1805 | /* |
72124f07 RF |
1806 | * Programming a device number will have side effects, |
1807 | * so we deal with other devices at a later time. | |
1808 | * This relies on those devices reporting ATTACHED, which will | |
1809 | * trigger another call to this function. This will only | |
1810 | * happen if at least one device ID was programmed. | |
1811 | * Error returns from sdw_program_device_num() are currently | |
1812 | * ignored because there's no useful recovery that can be done. | |
1813 | * Returning the error here could result in the current status | |
1814 | * of other devices not being handled, because if no device IDs | |
1815 | * were programmed there's nothing to guarantee a status change | |
1816 | * to trigger another call to this function. | |
15ed3ea2 | 1817 | */ |
72124f07 RF |
1818 | sdw_program_device_num(bus, &id_programmed); |
1819 | if (id_programmed) | |
1820 | return 0; | |
b0a9c37b VK |
1821 | } |
1822 | ||
1823 | /* Continue to check other slave statuses */ | |
1824 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1825 | mutex_lock(&bus->bus_lock); | |
1826 | if (test_bit(i, bus->assigned) == false) { | |
1827 | mutex_unlock(&bus->bus_lock); | |
1828 | continue; | |
1829 | } | |
1830 | mutex_unlock(&bus->bus_lock); | |
1831 | ||
1832 | slave = sdw_get_slave(bus, i); | |
1833 | if (!slave) | |
1834 | continue; | |
1835 | ||
a90def06 PLB |
1836 | attached_initializing = false; |
1837 | ||
b0a9c37b VK |
1838 | switch (status[i]) { |
1839 | case SDW_SLAVE_UNATTACHED: | |
1840 | if (slave->status == SDW_SLAVE_UNATTACHED) | |
1841 | break; | |
1842 | ||
d1b32855 PLB |
1843 | dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n", |
1844 | i, slave->status); | |
1845 | ||
b0a9c37b VK |
1846 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
1847 | break; | |
1848 | ||
1849 | case SDW_SLAVE_ALERT: | |
1850 | ret = sdw_handle_slave_alerts(slave); | |
a5759f19 | 1851 | if (ret < 0) |
6d7a1ff7 | 1852 | dev_err(&slave->dev, |
17ed5bef | 1853 | "Slave %d alert handling failed: %d\n", |
b0a9c37b VK |
1854 | i, ret); |
1855 | break; | |
1856 | ||
1857 | case SDW_SLAVE_ATTACHED: | |
1858 | if (slave->status == SDW_SLAVE_ATTACHED) | |
1859 | break; | |
1860 | ||
1861 | prev_status = slave->status; | |
1862 | sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED); | |
1863 | ||
1864 | if (prev_status == SDW_SLAVE_ALERT) | |
1865 | break; | |
1866 | ||
a90def06 PLB |
1867 | attached_initializing = true; |
1868 | ||
b0a9c37b | 1869 | ret = sdw_initialize_slave(slave); |
a5759f19 | 1870 | if (ret < 0) |
6d7a1ff7 | 1871 | dev_err(&slave->dev, |
17ed5bef | 1872 | "Slave %d initialization failed: %d\n", |
b0a9c37b VK |
1873 | i, ret); |
1874 | ||
1875 | break; | |
1876 | ||
1877 | default: | |
6d7a1ff7 | 1878 | dev_err(&slave->dev, "Invalid slave %d status:%d\n", |
73ede046 | 1879 | i, status[i]); |
b0a9c37b VK |
1880 | break; |
1881 | } | |
1882 | ||
1883 | ret = sdw_update_slave_status(slave, status[i]); | |
a5759f19 | 1884 | if (ret < 0) |
6d7a1ff7 | 1885 | dev_err(&slave->dev, |
17ed5bef | 1886 | "Update Slave status failed:%d\n", ret); |
f1b69026 PLB |
1887 | if (attached_initializing) { |
1888 | dev_dbg(&slave->dev, | |
9af8c36a PLB |
1889 | "signaling initialization completion for Slave %d\n", |
1890 | slave->dev_num); | |
f1b69026 | 1891 | |
a90def06 | 1892 | complete(&slave->initialization_complete); |
e557bca4 PLB |
1893 | |
1894 | /* | |
1895 | * If the manager became pm_runtime active, the peripherals will be | |
1896 | * restarted and attach, but their pm_runtime status may remain | |
1897 | * suspended. If the 'update_slave_status' callback initiates | |
1898 | * any sort of deferred processing, this processing would not be | |
1899 | * cancelled on pm_runtime suspend. | |
1900 | * To avoid such zombie states, we queue a request to resume. | |
1901 | * This would be a no-op in case the peripheral was being resumed | |
1902 | * by e.g. the ALSA/ASoC framework. | |
1903 | */ | |
1904 | pm_request_resume(&slave->dev); | |
f1b69026 | 1905 | } |
b0a9c37b VK |
1906 | } |
1907 | ||
1908 | return ret; | |
1909 | } | |
1910 | EXPORT_SYMBOL(sdw_handle_slave_status); | |
3ab2ca40 PLB |
1911 | |
1912 | void sdw_clear_slave_status(struct sdw_bus *bus, u32 request) | |
1913 | { | |
1914 | struct sdw_slave *slave; | |
1915 | int i; | |
1916 | ||
1917 | /* Check all non-zero devices */ | |
1918 | for (i = 1; i <= SDW_MAX_DEVICES; i++) { | |
1919 | mutex_lock(&bus->bus_lock); | |
1920 | if (test_bit(i, bus->assigned) == false) { | |
1921 | mutex_unlock(&bus->bus_lock); | |
1922 | continue; | |
1923 | } | |
1924 | mutex_unlock(&bus->bus_lock); | |
1925 | ||
1926 | slave = sdw_get_slave(bus, i); | |
1927 | if (!slave) | |
1928 | continue; | |
1929 | ||
c2819e19 | 1930 | if (slave->status != SDW_SLAVE_UNATTACHED) { |
3ab2ca40 | 1931 | sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 1932 | slave->first_interrupt_done = false; |
899a7509 | 1933 | sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED); |
c2819e19 | 1934 | } |
3ab2ca40 PLB |
1935 | |
1936 | /* keep track of request, used in pm_runtime resume */ | |
1937 | slave->unattach_request = request; | |
1938 | } | |
1939 | } | |
1940 | EXPORT_SYMBOL(sdw_clear_slave_status); |