soundwire: amd: add pm_prepare callback and pm ops support
[linux-block.git] / drivers / soundwire / bus.c
CommitLineData
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1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-17 Intel Corporation.
3
4#include <linux/acpi.h>
0231453b 5#include <linux/delay.h>
7c3cd189 6#include <linux/mod_devicetable.h>
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7#include <linux/pm_runtime.h>
8#include <linux/soundwire/sdw_registers.h>
7c3cd189 9#include <linux/soundwire/sdw.h>
bd29c00e 10#include <linux/soundwire/sdw_type.h>
7c3cd189 11#include "bus.h"
bcac5902 12#include "sysfs_local.h"
7c3cd189 13
88de0a8f 14static DEFINE_IDA(sdw_bus_ida);
c6056101 15static DEFINE_IDA(sdw_peripheral_ida);
dbb50c7a
BL
16
17static int sdw_get_id(struct sdw_bus *bus)
18{
88de0a8f 19 int rc = ida_alloc(&sdw_bus_ida, GFP_KERNEL);
dbb50c7a
BL
20
21 if (rc < 0)
22 return rc;
23
24 bus->id = rc;
25 return 0;
26}
27
7c3cd189 28/**
5cab3ff2 29 * sdw_bus_master_add() - add a bus Master instance
7c3cd189 30 * @bus: bus instance
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31 * @parent: parent device
32 * @fwnode: firmware node handle
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33 *
34 * Initializes the bus instance, read properties and create child
35 * devices.
36 */
5cab3ff2
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37int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
38 struct fwnode_handle *fwnode)
7c3cd189 39{
5c3eb9f7 40 struct sdw_master_prop *prop = NULL;
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41 int ret;
42
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43 if (!parent) {
44 pr_err("SoundWire parent device is not set\n");
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45 return -ENODEV;
46 }
47
dbb50c7a 48 ret = sdw_get_id(bus);
a5759f19 49 if (ret < 0) {
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50 dev_err(parent, "Failed to get bus id\n");
51 return ret;
52 }
53
54 ret = sdw_master_device_add(bus, parent, fwnode);
a5759f19 55 if (ret < 0) {
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56 dev_err(parent, "Failed to add master device at link %d\n",
57 bus->link_id);
dbb50c7a
BL
58 return ret;
59 }
60
9d715fa0 61 if (!bus->ops) {
17ed5bef 62 dev_err(bus->dev, "SoundWire Bus ops are not set\n");
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63 return -EINVAL;
64 }
65
9026118f
BL
66 if (!bus->compute_params) {
67 dev_err(bus->dev,
68 "Bandwidth allocation not configured, compute_params no set\n");
69 return -EINVAL;
70 }
71
9d715fa0 72 mutex_init(&bus->msg_lock);
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73 mutex_init(&bus->bus_lock);
74 INIT_LIST_HEAD(&bus->slaves);
89e59053 75 INIT_LIST_HEAD(&bus->m_rt_list);
7c3cd189 76
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77 /*
78 * Initialize multi_link flag
ce6e74d0
SN
79 */
80 bus->multi_link = false;
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81 if (bus->ops->read_prop) {
82 ret = bus->ops->read_prop(bus);
83 if (ret < 0) {
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84 dev_err(bus->dev,
85 "Bus read properties failed:%d\n", ret);
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86 return ret;
87 }
88 }
89
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90 sdw_bus_debugfs_init(bus);
91
7c3cd189 92 /*
21c2de29 93 * Device numbers in SoundWire are 0 through 15. Enumeration device
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94 * number (0), Broadcast device number (15), Group numbers (12 and
95 * 13) and Master device number (14) are not used for assignment so
96 * mask these and other higher bits.
97 */
98
99 /* Set higher order bits */
100 *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
101
102 /* Set enumuration device number and broadcast device number */
103 set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
104 set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
105
106 /* Set group device numbers and master device number */
107 set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
108 set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
109 set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
110
111 /*
112 * SDW is an enumerable bus, but devices can be powered off. So,
113 * they won't be able to report as present.
114 *
115 * Create Slave devices based on Slaves described in
116 * the respective firmware (ACPI/DT)
117 */
118 if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
119 ret = sdw_acpi_find_slaves(bus);
a2e48458
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120 else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
121 ret = sdw_of_find_slaves(bus);
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122 else
123 ret = -ENOTSUPP; /* No ACPI/DT so error out */
124
a5759f19 125 if (ret < 0) {
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126 dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
127 return ret;
128 }
129
99b8a5d6 130 /*
5c3eb9f7 131 * Initialize clock values based on Master properties. The max
3424305b 132 * frequency is read from max_clk_freq property. Current assumption
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133 * is that the bus will start at highest clock frequency when
134 * powered on.
135 *
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136 * Default active bank will be 0 as out of reset the Slaves have
137 * to start with bank 0 (Table 40 of Spec)
138 */
5c3eb9f7 139 prop = &bus->prop;
3424305b 140 bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
5c3eb9f7 141 bus->params.curr_dr_freq = bus->params.max_dr_freq;
99b8a5d6
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142 bus->params.curr_bank = SDW_BANK0;
143 bus->params.next_bank = SDW_BANK1;
144
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145 return 0;
146}
5cab3ff2 147EXPORT_SYMBOL(sdw_bus_master_add);
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148
149static int sdw_delete_slave(struct device *dev, void *data)
150{
151 struct sdw_slave *slave = dev_to_sdw_dev(dev);
152 struct sdw_bus *bus = slave->bus;
153
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154 pm_runtime_disable(dev);
155
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156 sdw_slave_debugfs_exit(slave);
157
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158 mutex_lock(&bus->bus_lock);
159
c6056101 160 if (slave->dev_num) { /* clear dev_num if assigned */
7c3cd189 161 clear_bit(slave->dev_num, bus->assigned);
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162 if (bus->dev_num_ida_min)
163 ida_free(&sdw_peripheral_ida, slave->dev_num);
164 }
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165 list_del_init(&slave->node);
166 mutex_unlock(&bus->bus_lock);
167
168 device_unregister(dev);
169 return 0;
170}
171
172/**
5cab3ff2 173 * sdw_bus_master_delete() - delete the bus master instance
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174 * @bus: bus to be deleted
175 *
176 * Remove the instance, delete the child devices.
177 */
5cab3ff2 178void sdw_bus_master_delete(struct sdw_bus *bus)
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179{
180 device_for_each_child(bus->dev, NULL, sdw_delete_slave);
7ceaa40b 181 sdw_master_device_del(bus);
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182
183 sdw_bus_debugfs_exit(bus);
88de0a8f 184 ida_free(&sdw_bus_ida, bus->id);
7c3cd189 185}
5cab3ff2 186EXPORT_SYMBOL(sdw_bus_master_delete);
7c3cd189 187
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188/*
189 * SDW IO Calls
190 */
191
192static inline int find_response_code(enum sdw_command_response resp)
193{
194 switch (resp) {
195 case SDW_CMD_OK:
196 return 0;
197
198 case SDW_CMD_IGNORED:
199 return -ENODATA;
200
201 case SDW_CMD_TIMEOUT:
202 return -ETIMEDOUT;
203
204 default:
205 return -EIO;
206 }
207}
208
209static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
210{
211 int retry = bus->prop.err_threshold;
212 enum sdw_command_response resp;
213 int ret = 0, i;
214
215 for (i = 0; i <= retry; i++) {
216 resp = bus->ops->xfer_msg(bus, msg);
217 ret = find_response_code(resp);
218
219 /* if cmd is ok or ignored return */
220 if (ret == 0 || ret == -ENODATA)
221 return ret;
222 }
223
224 return ret;
225}
226
227static inline int do_transfer_defer(struct sdw_bus *bus,
45cb70f9 228 struct sdw_msg *msg)
9d715fa0 229{
45cb70f9 230 struct sdw_defer *defer = &bus->defer_msg;
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231 int retry = bus->prop.err_threshold;
232 enum sdw_command_response resp;
233 int ret = 0, i;
234
235 defer->msg = msg;
236 defer->length = msg->len;
a306a0e4 237 init_completion(&defer->complete);
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238
239 for (i = 0; i <= retry; i++) {
66f95de7 240 resp = bus->ops->xfer_msg_defer(bus);
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241 ret = find_response_code(resp);
242 /* if cmd is ok or ignored return */
243 if (ret == 0 || ret == -ENODATA)
244 return ret;
245 }
246
247 return ret;
248}
249
a350aff4
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250static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
251{
252 int ret;
253
254 ret = do_transfer(bus, msg);
255 if (ret != 0 && ret != -ENODATA)
ec475187
BL
256 dev_err(bus->dev, "trf on Slave %d failed:%d %s addr %x count %d\n",
257 msg->dev_num, ret,
258 (msg->flags & SDW_MSG_FLAG_WRITE) ? "write" : "read",
259 msg->addr, msg->len);
a350aff4 260
a350aff4
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261 return ret;
262}
263
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264/**
265 * sdw_transfer() - Synchronous transfer message to a SDW Slave device
266 * @bus: SDW bus
267 * @msg: SDW message to be xfered
268 */
269int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
270{
271 int ret;
272
273 mutex_lock(&bus->msg_lock);
274
a350aff4 275 ret = sdw_transfer_unlocked(bus, msg);
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276
277 mutex_unlock(&bus->msg_lock);
278
279 return ret;
280}
281
79fe02cb
PLB
282/**
283 * sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers
284 * @bus: SDW bus
285 * @sync_delay: Delay before reading status
286 */
287void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay)
288{
289 u32 status;
290
291 if (!bus->ops->read_ping_status)
292 return;
293
294 /*
295 * wait for peripheral to sync if desired. 10-15ms should be more than
296 * enough in most cases.
297 */
298 if (sync_delay)
299 usleep_range(10000, 15000);
300
301 mutex_lock(&bus->msg_lock);
302
303 status = bus->ops->read_ping_status(bus);
304
305 mutex_unlock(&bus->msg_lock);
306
307 if (!status)
308 dev_warn(bus->dev, "%s: no peripherals attached\n", __func__);
309 else
310 dev_dbg(bus->dev, "PING status: %#x\n", status);
311}
312EXPORT_SYMBOL(sdw_show_ping_status);
313
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314/**
315 * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
316 * @bus: SDW bus
317 * @msg: SDW message to be xfered
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318 *
319 * Caller needs to hold the msg_lock lock while calling this
320 */
45cb70f9 321int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg)
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322{
323 int ret;
324
325 if (!bus->ops->xfer_msg_defer)
326 return -ENOTSUPP;
327
45cb70f9 328 ret = do_transfer_defer(bus, msg);
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329 if (ret != 0 && ret != -ENODATA)
330 dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
73ede046 331 msg->dev_num, ret);
9d715fa0 332
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333 return ret;
334}
335
9d715fa0 336int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
73ede046 337 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
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338{
339 memset(msg, 0, sizeof(*msg));
340 msg->addr = addr; /* addr is 16 bit and truncated here */
341 msg->len = count;
342 msg->dev_num = dev_num;
343 msg->flags = flags;
344 msg->buf = buf;
9d715fa0 345
f779ad09 346 if (addr < SDW_REG_NO_PAGE) /* no paging area */
9d715fa0 347 return 0;
f779ad09
GL
348
349 if (addr >= SDW_REG_MAX) { /* illegal addr */
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350 pr_err("SDW: Invalid address %x passed\n", addr);
351 return -EINVAL;
352 }
353
354 if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
355 if (slave && !slave->prop.paging_support)
356 return 0;
21c2de29 357 /* no need for else as that will fall-through to paging */
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358 }
359
360 /* paging mandatory */
361 if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
362 pr_err("SDW: Invalid device for paging :%d\n", dev_num);
363 return -EINVAL;
364 }
365
366 if (!slave) {
367 pr_err("SDW: No slave for paging addr\n");
368 return -EINVAL;
f779ad09
GL
369 }
370
371 if (!slave->prop.paging_support) {
9d715fa0 372 dev_err(&slave->dev,
17ed5bef 373 "address %x needs paging but no support\n", addr);
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374 return -EINVAL;
375 }
376
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377 msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
378 msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
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379 msg->addr |= BIT(15);
380 msg->page = true;
381
382 return 0;
383}
384
60ee9be2
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385/*
386 * Read/Write IO functions.
387 * no_pm versions can only be called by the bus, e.g. while enumerating or
388 * handling suspend-resume sequences.
389 * all clients need to use the pm versions
390 */
391
62dc9f3f 392int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
60ee9be2
PLB
393{
394 struct sdw_msg msg;
395 int ret;
396
397 ret = sdw_fill_msg(&msg, slave, addr, count,
398 slave->dev_num, SDW_MSG_FLAG_READ, val);
399 if (ret < 0)
400 return ret;
401
7fae3cfb
PLB
402 ret = sdw_transfer(slave->bus, &msg);
403 if (slave->is_mockup_device)
404 ret = 0;
405 return ret;
60ee9be2 406}
62dc9f3f 407EXPORT_SYMBOL(sdw_nread_no_pm);
60ee9be2 408
62dc9f3f 409int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
60ee9be2
PLB
410{
411 struct sdw_msg msg;
412 int ret;
413
414 ret = sdw_fill_msg(&msg, slave, addr, count,
031e668b 415 slave->dev_num, SDW_MSG_FLAG_WRITE, (u8 *)val);
60ee9be2
PLB
416 if (ret < 0)
417 return ret;
418
7fae3cfb
PLB
419 ret = sdw_transfer(slave->bus, &msg);
420 if (slave->is_mockup_device)
421 ret = 0;
422 return ret;
60ee9be2 423}
62dc9f3f 424EXPORT_SYMBOL(sdw_nwrite_no_pm);
60ee9be2 425
167790ab 426int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
60ee9be2
PLB
427{
428 return sdw_nwrite_no_pm(slave, addr, 1, &value);
429}
167790ab 430EXPORT_SYMBOL(sdw_write_no_pm);
60ee9be2 431
0231453b
RW
432static int
433sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
434{
435 struct sdw_msg msg;
436 u8 buf;
437 int ret;
438
439 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
440 SDW_MSG_FLAG_READ, &buf);
a5759f19 441 if (ret < 0)
0231453b
RW
442 return ret;
443
444 ret = sdw_transfer(bus, &msg);
445 if (ret < 0)
446 return ret;
f779ad09
GL
447
448 return buf;
0231453b
RW
449}
450
451static int
452sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
453{
454 struct sdw_msg msg;
455 int ret;
456
457 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
458 SDW_MSG_FLAG_WRITE, &value);
a5759f19 459 if (ret < 0)
0231453b
RW
460 return ret;
461
462 return sdw_transfer(bus, &msg);
463}
464
a350aff4
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465int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
466{
467 struct sdw_msg msg;
468 u8 buf;
469 int ret;
470
471 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
472 SDW_MSG_FLAG_READ, &buf);
a5759f19 473 if (ret < 0)
a350aff4
PLB
474 return ret;
475
476 ret = sdw_transfer_unlocked(bus, &msg);
477 if (ret < 0)
478 return ret;
479
480 return buf;
481}
482EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
483
484int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
485{
486 struct sdw_msg msg;
487 int ret;
488
489 ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
490 SDW_MSG_FLAG_WRITE, &value);
a5759f19 491 if (ret < 0)
a350aff4
PLB
492 return ret;
493
494 return sdw_transfer_unlocked(bus, &msg);
495}
496EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
497
167790ab 498int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
0231453b
RW
499{
500 u8 buf;
501 int ret;
502
503 ret = sdw_nread_no_pm(slave, addr, 1, &buf);
504 if (ret < 0)
505 return ret;
506 else
507 return buf;
508}
167790ab 509EXPORT_SYMBOL(sdw_read_no_pm);
0231453b 510
d38ebaf2 511int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
b04c975e
PLB
512{
513 int tmp;
514
515 tmp = sdw_read_no_pm(slave, addr);
516 if (tmp < 0)
517 return tmp;
518
519 tmp = (tmp & ~mask) | val;
520 return sdw_write_no_pm(slave, addr, tmp);
521}
d38ebaf2
PLB
522EXPORT_SYMBOL(sdw_update_no_pm);
523
524/* Read-Modify-Write Slave register */
525int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
526{
527 int tmp;
528
529 tmp = sdw_read(slave, addr);
530 if (tmp < 0)
531 return tmp;
532
533 tmp = (tmp & ~mask) | val;
534 return sdw_write(slave, addr, tmp);
535}
536EXPORT_SYMBOL(sdw_update);
b04c975e 537
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538/**
539 * sdw_nread() - Read "n" contiguous SDW Slave registers
540 * @slave: SDW Slave
541 * @addr: Register address
542 * @count: length
543 * @val: Buffer for values to be read
544 */
545int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
546{
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547 int ret;
548
443a98e6
PLB
549 ret = pm_runtime_resume_and_get(&slave->dev);
550 if (ret < 0 && ret != -EACCES)
9d715fa0 551 return ret;
60ee9be2
PLB
552
553 ret = sdw_nread_no_pm(slave, addr, count, val);
9d715fa0 554
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555 pm_runtime_mark_last_busy(&slave->dev);
556 pm_runtime_put(&slave->dev);
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557
558 return ret;
559}
560EXPORT_SYMBOL(sdw_nread);
561
562/**
563 * sdw_nwrite() - Write "n" contiguous SDW Slave registers
564 * @slave: SDW Slave
565 * @addr: Register address
566 * @count: length
031e668b 567 * @val: Buffer for values to be written
9d715fa0 568 */
031e668b 569int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
9d715fa0 570{
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VK
571 int ret;
572
443a98e6
PLB
573 ret = pm_runtime_resume_and_get(&slave->dev);
574 if (ret < 0 && ret != -EACCES)
9d715fa0 575 return ret;
60ee9be2
PLB
576
577 ret = sdw_nwrite_no_pm(slave, addr, count, val);
9d715fa0 578
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579 pm_runtime_mark_last_busy(&slave->dev);
580 pm_runtime_put(&slave->dev);
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581
582 return ret;
583}
584EXPORT_SYMBOL(sdw_nwrite);
585
586/**
587 * sdw_read() - Read a SDW Slave register
588 * @slave: SDW Slave
589 * @addr: Register address
590 */
591int sdw_read(struct sdw_slave *slave, u32 addr)
592{
593 u8 buf;
594 int ret;
595
596 ret = sdw_nread(slave, addr, 1, &buf);
597 if (ret < 0)
598 return ret;
f779ad09
GL
599
600 return buf;
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601}
602EXPORT_SYMBOL(sdw_read);
603
604/**
605 * sdw_write() - Write a SDW Slave register
606 * @slave: SDW Slave
607 * @addr: Register address
608 * @value: Register value
609 */
610int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
611{
612 return sdw_nwrite(slave, addr, 1, &value);
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613}
614EXPORT_SYMBOL(sdw_write);
615
d52d7a1b
SK
616/*
617 * SDW alert handling
618 */
619
620/* called with bus_lock held */
621static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
622{
1429cc26 623 struct sdw_slave *slave;
d52d7a1b
SK
624
625 list_for_each_entry(slave, &bus->slaves, node) {
626 if (slave->dev_num == i)
627 return slave;
628 }
629
630 return NULL;
631}
632
01ad444e 633int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
d52d7a1b 634{
2e8c4ad1 635 if (slave->id.mfg_id != id.mfg_id ||
09830d5e 636 slave->id.part_id != id.part_id ||
2e8c4ad1
PLB
637 slave->id.class_id != id.class_id ||
638 (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
639 slave->id.unique_id != id.unique_id))
d52d7a1b
SK
640 return -ENODEV;
641
642 return 0;
643}
01ad444e 644EXPORT_SYMBOL(sdw_compare_devid);
d52d7a1b
SK
645
646/* called with bus_lock held */
647static int sdw_get_device_num(struct sdw_slave *slave)
648{
649 int bit;
650
c6056101
PLB
651 if (slave->bus->dev_num_ida_min) {
652 bit = ida_alloc_range(&sdw_peripheral_ida,
653 slave->bus->dev_num_ida_min, SDW_MAX_DEVICES,
654 GFP_KERNEL);
655 if (bit < 0)
656 goto err;
657 } else {
658 bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
659 if (bit == SDW_MAX_DEVICES) {
660 bit = -ENODEV;
661 goto err;
662 }
d52d7a1b
SK
663 }
664
665 /*
666 * Do not update dev_num in Slave data structure here,
667 * Update once program dev_num is successful
668 */
669 set_bit(bit, slave->bus->assigned);
670
671err:
672 return bit;
673}
674
675static int sdw_assign_device_num(struct sdw_slave *slave)
676{
6d7a1ff7 677 struct sdw_bus *bus = slave->bus;
d52d7a1b 678 int ret, dev_num;
fd6a3ac8 679 bool new_device = false;
d52d7a1b
SK
680
681 /* check first if device number is assigned, if so reuse that */
682 if (!slave->dev_num) {
fd6a3ac8
PLB
683 if (!slave->dev_num_sticky) {
684 mutex_lock(&slave->bus->bus_lock);
685 dev_num = sdw_get_device_num(slave);
686 mutex_unlock(&slave->bus->bus_lock);
687 if (dev_num < 0) {
6d7a1ff7 688 dev_err(bus->dev, "Get dev_num failed: %d\n",
fd6a3ac8
PLB
689 dev_num);
690 return dev_num;
691 }
692 slave->dev_num = dev_num;
693 slave->dev_num_sticky = dev_num;
694 new_device = true;
695 } else {
696 slave->dev_num = slave->dev_num_sticky;
d52d7a1b 697 }
fd6a3ac8
PLB
698 }
699
700 if (!new_device)
6d7a1ff7 701 dev_dbg(bus->dev,
f48f4fd9
PLB
702 "Slave already registered, reusing dev_num:%d\n",
703 slave->dev_num);
d52d7a1b 704
fd6a3ac8
PLB
705 /* Clear the slave->dev_num to transfer message on device 0 */
706 dev_num = slave->dev_num;
707 slave->dev_num = 0;
d52d7a1b 708
d300de4f 709 ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
d52d7a1b 710 if (ret < 0) {
6d7a1ff7 711 dev_err(bus->dev, "Program device_num %d failed: %d\n",
6e0ac6a6 712 dev_num, ret);
d52d7a1b
SK
713 return ret;
714 }
715
716 /* After xfer of msg, restore dev_num */
fd6a3ac8 717 slave->dev_num = slave->dev_num_sticky;
d52d7a1b
SK
718
719 return 0;
720}
721
7c3cd189 722void sdw_extract_slave_id(struct sdw_bus *bus,
73ede046 723 u64 addr, struct sdw_slave_id *id)
7c3cd189 724{
17ed5bef 725 dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
7c3cd189 726
2c6cff68
PLB
727 id->sdw_version = SDW_VERSION(addr);
728 id->unique_id = SDW_UNIQUE_ID(addr);
729 id->mfg_id = SDW_MFG_ID(addr);
730 id->part_id = SDW_PART_ID(addr);
731 id->class_id = SDW_CLASS_ID(addr);
7c3cd189
VK
732
733 dev_dbg(bus->dev,
c397efb7
PLB
734 "SDW Slave class_id 0x%02x, mfg_id 0x%04x, part_id 0x%04x, unique_id 0x%x, version 0x%x\n",
735 id->class_id, id->mfg_id, id->part_id, id->unique_id, id->sdw_version);
7c3cd189 736}
01ad444e 737EXPORT_SYMBOL(sdw_extract_slave_id);
d52d7a1b 738
72124f07 739static int sdw_program_device_num(struct sdw_bus *bus, bool *programmed)
d52d7a1b
SK
740{
741 u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
742 struct sdw_slave *slave, *_s;
743 struct sdw_slave_id id;
744 struct sdw_msg msg;
f03690f4 745 bool found;
d52d7a1b
SK
746 int count = 0, ret;
747 u64 addr;
748
72124f07
RF
749 *programmed = false;
750
d52d7a1b
SK
751 /* No Slave, so use raw xfer api */
752 ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
73ede046 753 SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
d52d7a1b
SK
754 if (ret < 0)
755 return ret;
756
757 do {
758 ret = sdw_transfer(bus, &msg);
759 if (ret == -ENODATA) { /* end of device id reads */
6e0ac6a6 760 dev_dbg(bus->dev, "No more devices to enumerate\n");
d52d7a1b
SK
761 ret = 0;
762 break;
763 }
764 if (ret < 0) {
765 dev_err(bus->dev, "DEVID read fail:%d\n", ret);
766 break;
767 }
768
769 /*
770 * Construct the addr and extract. Cast the higher shift
771 * bits to avoid truncation due to size limit.
772 */
773 addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
0132af05
CIK
774 ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
775 ((u64)buf[0] << 40);
d52d7a1b
SK
776
777 sdw_extract_slave_id(bus, addr, &id);
778
f03690f4 779 found = false;
d52d7a1b
SK
780 /* Now compare with entries */
781 list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
782 if (sdw_compare_devid(slave, id) == 0) {
783 found = true;
784
7297f8fa
RF
785 /*
786 * To prevent skipping state-machine stages don't
787 * program a device until we've seen it UNATTACH.
788 * Must return here because no other device on #0
789 * can be detected until this one has been
790 * assigned a device ID.
791 */
792 if (slave->status != SDW_SLAVE_UNATTACHED)
793 return 0;
794
d52d7a1b
SK
795 /*
796 * Assign a new dev_num to this Slave and
797 * not mark it present. It will be marked
798 * present after it reports ATTACHED on new
799 * dev_num
800 */
801 ret = sdw_assign_device_num(slave);
a5759f19 802 if (ret < 0) {
6d7a1ff7 803 dev_err(bus->dev,
17ed5bef 804 "Assign dev_num failed:%d\n",
d52d7a1b
SK
805 ret);
806 return ret;
807 }
808
72124f07
RF
809 *programmed = true;
810
d52d7a1b
SK
811 break;
812 }
813 }
814
d7b956b6 815 if (!found) {
d52d7a1b 816 /* TODO: Park this device in Group 13 */
fcb9d730
SK
817
818 /*
819 * add Slave device even if there is no platform
820 * firmware description. There will be no driver probe
821 * but the user/integration will be able to see the
822 * device, enumeration status and device number in sysfs
823 */
824 sdw_slave_add(bus, &id, NULL);
825
17ed5bef 826 dev_err(bus->dev, "Slave Entry not found\n");
d52d7a1b
SK
827 }
828
829 count++;
830
831 /*
832 * Check till error out or retry (count) exhausts.
833 * Device can drop off and rejoin during enumeration
834 * so count till twice the bound.
835 */
836
837 } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
838
839 return ret;
840}
841
842static void sdw_modify_slave_status(struct sdw_slave *slave,
73ede046 843 enum sdw_slave_status status)
d52d7a1b 844{
6d7a1ff7
PLB
845 struct sdw_bus *bus = slave->bus;
846
847 mutex_lock(&bus->bus_lock);
fb9469e5 848
6d7a1ff7 849 dev_vdbg(bus->dev,
9af8c36a
PLB
850 "changing status slave %d status %d new status %d\n",
851 slave->dev_num, slave->status, status);
fb9469e5
PLB
852
853 if (status == SDW_SLAVE_UNATTACHED) {
854 dev_dbg(&slave->dev,
9af8c36a
PLB
855 "initializing enumeration and init completion for Slave %d\n",
856 slave->dev_num);
fb9469e5
PLB
857
858 init_completion(&slave->enumeration_complete);
a90def06 859 init_completion(&slave->initialization_complete);
fb9469e5
PLB
860
861 } else if ((status == SDW_SLAVE_ATTACHED) &&
862 (slave->status == SDW_SLAVE_UNATTACHED)) {
863 dev_dbg(&slave->dev,
9af8c36a
PLB
864 "signaling enumeration completion for Slave %d\n",
865 slave->dev_num);
fb9469e5
PLB
866
867 complete(&slave->enumeration_complete);
868 }
d52d7a1b 869 slave->status = status;
6d7a1ff7 870 mutex_unlock(&bus->bus_lock);
d52d7a1b
SK
871}
872
0231453b
RW
873static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
874 enum sdw_clk_stop_mode mode,
875 enum sdw_clk_stop_type type)
876{
bd29c00e 877 int ret = 0;
0231453b 878
bd29c00e
PLB
879 mutex_lock(&slave->sdw_dev_lock);
880
881 if (slave->probed) {
882 struct device *dev = &slave->dev;
883 struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
884
885 if (drv->ops && drv->ops->clk_stop)
886 ret = drv->ops->clk_stop(slave, mode, type);
0231453b
RW
887 }
888
bd29c00e
PLB
889 mutex_unlock(&slave->sdw_dev_lock);
890
891 return ret;
0231453b
RW
892}
893
894static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
895 enum sdw_clk_stop_mode mode,
896 bool prepare)
897{
898 bool wake_en;
899 u32 val = 0;
900 int ret;
901
902 wake_en = slave->prop.wake_capable;
903
904 if (prepare) {
905 val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
906
907 if (mode == SDW_CLK_STOP_MODE1)
908 val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
909
910 if (wake_en)
911 val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
912 } else {
665cf215
PLB
913 ret = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
914 if (ret < 0) {
b50bb8ba
PLB
915 if (ret != -ENODATA)
916 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL read failed:%d\n", ret);
665cf215
PLB
917 return ret;
918 }
919 val = ret;
0231453b
RW
920 val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
921 }
922
923 ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
924
b50bb8ba
PLB
925 if (ret < 0 && ret != -ENODATA)
926 dev_err(&slave->dev, "SDW_SCP_SYSTEMCTRL write failed:%d\n", ret);
0231453b
RW
927
928 return ret;
929}
930
931static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
932{
933 int retry = bus->clk_stop_timeout;
934 int val;
935
936 do {
665cf215
PLB
937 val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT);
938 if (val < 0) {
9f9bc7d5
PLB
939 if (val != -ENODATA)
940 dev_err(bus->dev, "SDW_SCP_STAT bread failed:%d\n", val);
665cf215
PLB
941 return val;
942 }
943 val &= SDW_SCP_STAT_CLK_STP_NF;
0231453b 944 if (!val) {
54a6ca4f 945 dev_dbg(bus->dev, "clock stop prep/de-prep done slave:%d\n",
af7254b4 946 dev_num);
0231453b
RW
947 return 0;
948 }
949
950 usleep_range(1000, 1500);
951 retry--;
952 } while (retry);
953
54a6ca4f 954 dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d\n",
0231453b
RW
955 dev_num);
956
957 return -ETIMEDOUT;
958}
959
960/**
961 * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
962 *
963 * @bus: SDW bus instance
964 *
965 * Query Slave for clock stop mode and prepare for that mode.
966 */
967int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
968{
0231453b
RW
969 bool simple_clk_stop = true;
970 struct sdw_slave *slave;
971 bool is_slave = false;
972 int ret = 0;
973
974 /*
975 * In order to save on transition time, prepare
976 * each Slave and then wait for all Slave(s) to be
977 * prepared for clock stop.
b50bb8ba
PLB
978 * If one of the Slave devices has lost sync and
979 * replies with Command Ignored/-ENODATA, we continue
980 * the loop
0231453b
RW
981 */
982 list_for_each_entry(slave, &bus->slaves, node) {
983 if (!slave->dev_num)
984 continue;
985
0231453b
RW
986 if (slave->status != SDW_SLAVE_ATTACHED &&
987 slave->status != SDW_SLAVE_ALERT)
988 continue;
989
929cfee3
BL
990 /* Identify if Slave(s) are available on Bus */
991 is_slave = true;
992
345e9f5c
PLB
993 ret = sdw_slave_clk_stop_callback(slave,
994 SDW_CLK_STOP_MODE0,
0231453b 995 SDW_CLK_PRE_PREPARE);
b50bb8ba
PLB
996 if (ret < 0 && ret != -ENODATA) {
997 dev_err(&slave->dev, "clock stop pre-prepare cb failed:%d\n", ret);
0231453b
RW
998 return ret;
999 }
1000
345e9f5c
PLB
1001 /* Only prepare a Slave device if needed */
1002 if (!slave->prop.simple_clk_stop_capable) {
0231453b 1003 simple_clk_stop = false;
345e9f5c
PLB
1004
1005 ret = sdw_slave_clk_stop_prepare(slave,
1006 SDW_CLK_STOP_MODE0,
1007 true);
b50bb8ba
PLB
1008 if (ret < 0 && ret != -ENODATA) {
1009 dev_err(&slave->dev, "clock stop prepare failed:%d\n", ret);
345e9f5c
PLB
1010 return ret;
1011 }
1012 }
0231453b
RW
1013 }
1014
18de2f72
CS
1015 /* Skip remaining clock stop preparation if no Slave is attached */
1016 if (!is_slave)
b50bb8ba 1017 return 0;
18de2f72 1018
345e9f5c
PLB
1019 /*
1020 * Don't wait for all Slaves to be ready if they follow the simple
1021 * state machine
1022 */
18de2f72 1023 if (!simple_clk_stop) {
0231453b
RW
1024 ret = sdw_bus_wait_for_clk_prep_deprep(bus,
1025 SDW_BROADCAST_DEV_NUM);
b50bb8ba
PLB
1026 /*
1027 * if there are no Slave devices present and the reply is
1028 * Command_Ignored/-ENODATA, we don't need to continue with the
1029 * flow and can just return here. The error code is not modified
1030 * and its handling left as an exercise for the caller.
1031 */
0231453b
RW
1032 if (ret < 0)
1033 return ret;
1034 }
1035
1036 /* Inform slaves that prep is done */
1037 list_for_each_entry(slave, &bus->slaves, node) {
1038 if (!slave->dev_num)
1039 continue;
1040
1041 if (slave->status != SDW_SLAVE_ATTACHED &&
1042 slave->status != SDW_SLAVE_ALERT)
1043 continue;
1044
345e9f5c
PLB
1045 ret = sdw_slave_clk_stop_callback(slave,
1046 SDW_CLK_STOP_MODE0,
1047 SDW_CLK_POST_PREPARE);
0231453b 1048
b50bb8ba
PLB
1049 if (ret < 0 && ret != -ENODATA) {
1050 dev_err(&slave->dev, "clock stop post-prepare cb failed:%d\n", ret);
1051 return ret;
0231453b
RW
1052 }
1053 }
1054
b50bb8ba 1055 return 0;
0231453b
RW
1056}
1057EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
1058
1059/**
1060 * sdw_bus_clk_stop: stop bus clock
1061 *
1062 * @bus: SDW bus instance
1063 *
1064 * After preparing the Slaves for clock stop, stop the clock by broadcasting
1065 * write to SCP_CTRL register.
1066 */
1067int sdw_bus_clk_stop(struct sdw_bus *bus)
1068{
1069 int ret;
1070
1071 /*
1072 * broadcast clock stop now, attached Slaves will ACK this,
1073 * unattached will ignore
1074 */
1075 ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
1076 SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
1077 if (ret < 0) {
b50bb8ba
PLB
1078 if (ret != -ENODATA)
1079 dev_err(bus->dev, "ClockStopNow Broadcast msg failed %d\n", ret);
0231453b
RW
1080 return ret;
1081 }
1082
1083 return 0;
1084}
1085EXPORT_SYMBOL(sdw_bus_clk_stop);
1086
1087/**
1088 * sdw_bus_exit_clk_stop: Exit clock stop mode
1089 *
1090 * @bus: SDW bus instance
1091 *
1092 * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1093 * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1094 * back.
1095 */
1096int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1097{
0231453b
RW
1098 bool simple_clk_stop = true;
1099 struct sdw_slave *slave;
1100 bool is_slave = false;
1101 int ret;
1102
1103 /*
1104 * In order to save on transition time, de-prepare
1105 * each Slave and then wait for all Slave(s) to be
1106 * de-prepared after clock resume.
1107 */
1108 list_for_each_entry(slave, &bus->slaves, node) {
1109 if (!slave->dev_num)
1110 continue;
1111
0231453b
RW
1112 if (slave->status != SDW_SLAVE_ATTACHED &&
1113 slave->status != SDW_SLAVE_ALERT)
1114 continue;
1115
929cfee3
BL
1116 /* Identify if Slave(s) are available on Bus */
1117 is_slave = true;
1118
345e9f5c 1119 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
0231453b
RW
1120 SDW_CLK_PRE_DEPREPARE);
1121 if (ret < 0)
b50bb8ba 1122 dev_warn(&slave->dev, "clock stop pre-deprepare cb failed:%d\n", ret);
0231453b 1123
345e9f5c
PLB
1124 /* Only de-prepare a Slave device if needed */
1125 if (!slave->prop.simple_clk_stop_capable) {
1126 simple_clk_stop = false;
0231453b 1127
345e9f5c
PLB
1128 ret = sdw_slave_clk_stop_prepare(slave, SDW_CLK_STOP_MODE0,
1129 false);
0231453b 1130
345e9f5c 1131 if (ret < 0)
b50bb8ba 1132 dev_warn(&slave->dev, "clock stop deprepare failed:%d\n", ret);
345e9f5c 1133 }
0231453b
RW
1134 }
1135
18de2f72 1136 /* Skip remaining clock stop de-preparation if no Slave is attached */
929cfee3
BL
1137 if (!is_slave)
1138 return 0;
1139
345e9f5c
PLB
1140 /*
1141 * Don't wait for all Slaves to be ready if they follow the simple
1142 * state machine
1143 */
b50bb8ba
PLB
1144 if (!simple_clk_stop) {
1145 ret = sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1146 if (ret < 0)
4cbbe74d 1147 dev_warn(bus->dev, "clock stop deprepare wait failed:%d\n", ret);
b50bb8ba 1148 }
18de2f72 1149
0231453b
RW
1150 list_for_each_entry(slave, &bus->slaves, node) {
1151 if (!slave->dev_num)
1152 continue;
1153
1154 if (slave->status != SDW_SLAVE_ATTACHED &&
1155 slave->status != SDW_SLAVE_ALERT)
1156 continue;
1157
b50bb8ba
PLB
1158 ret = sdw_slave_clk_stop_callback(slave, SDW_CLK_STOP_MODE0,
1159 SDW_CLK_POST_DEPREPARE);
1160 if (ret < 0)
1161 dev_warn(&slave->dev, "clock stop post-deprepare cb failed:%d\n", ret);
0231453b
RW
1162 }
1163
1164 return 0;
1165}
1166EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1167
79df15b7 1168int sdw_configure_dpn_intr(struct sdw_slave *slave,
73ede046 1169 int port, bool enable, int mask)
79df15b7
SK
1170{
1171 u32 addr;
1172 int ret;
1173 u8 val = 0;
1174
dd87a72a
PLB
1175 if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
1176 dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
1177 enable ? "on" : "off");
1178 mask |= SDW_DPN_INT_TEST_FAIL;
1179 }
1180
79df15b7
SK
1181 addr = SDW_DPN_INTMASK(port);
1182
1183 /* Set/Clear port ready interrupt mask */
1184 if (enable) {
1185 val |= mask;
1186 val |= SDW_DPN_INT_PORT_READY;
1187 } else {
1188 val &= ~(mask);
1189 val &= ~SDW_DPN_INT_PORT_READY;
1190 }
1191
545c3651 1192 ret = sdw_update_no_pm(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
79df15b7 1193 if (ret < 0)
6d7a1ff7 1194 dev_err(&slave->dev,
17ed5bef 1195 "SDW_DPN_INTMASK write failed:%d\n", val);
79df15b7
SK
1196
1197 return ret;
1198}
1199
29d158f9
PLB
1200static int sdw_slave_set_frequency(struct sdw_slave *slave)
1201{
1202 u32 mclk_freq = slave->bus->prop.mclk_freq;
1203 u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1204 unsigned int scale;
1205 u8 scale_index;
1206 u8 base;
1207 int ret;
1208
1209 /*
1210 * frequency base and scale registers are required for SDCA
ffa17265
PLB
1211 * devices. They may also be used for 1.2+/non-SDCA devices.
1212 * Driver can set the property, we will need a DisCo property
1213 * to discover this case from platform firmware.
29d158f9 1214 */
ffa17265 1215 if (!slave->id.class_id && !slave->prop.clock_reg_supported)
29d158f9
PLB
1216 return 0;
1217
1218 if (!mclk_freq) {
1219 dev_err(&slave->dev,
1220 "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1221 return -EINVAL;
1222 }
1223
1224 /*
1225 * map base frequency using Table 89 of SoundWire 1.2 spec.
1226 * The order of the tests just follows the specification, this
1227 * is not a selection between possible values or a search for
1228 * the best value but just a mapping. Only one case per platform
1229 * is relevant.
1230 * Some BIOS have inconsistent values for mclk_freq but a
1231 * correct root so we force the mclk_freq to avoid variations.
1232 */
1233 if (!(19200000 % mclk_freq)) {
1234 mclk_freq = 19200000;
1235 base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1236 } else if (!(24000000 % mclk_freq)) {
1237 mclk_freq = 24000000;
1238 base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1239 } else if (!(24576000 % mclk_freq)) {
1240 mclk_freq = 24576000;
1241 base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1242 } else if (!(22579200 % mclk_freq)) {
1243 mclk_freq = 22579200;
1244 base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1245 } else if (!(32000000 % mclk_freq)) {
1246 mclk_freq = 32000000;
1247 base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1248 } else {
1249 dev_err(&slave->dev,
1250 "Unsupported clock base, mclk %d\n",
1251 mclk_freq);
1252 return -EINVAL;
1253 }
1254
1255 if (mclk_freq % curr_freq) {
1256 dev_err(&slave->dev,
1257 "mclk %d is not multiple of bus curr_freq %d\n",
1258 mclk_freq, curr_freq);
1259 return -EINVAL;
1260 }
1261
1262 scale = mclk_freq / curr_freq;
1263
1264 /*
1265 * map scale to Table 90 of SoundWire 1.2 spec - and check
1266 * that the scale is a power of two and maximum 64
1267 */
1268 scale_index = ilog2(scale);
1269
1270 if (BIT(scale_index) != scale || scale_index > 6) {
1271 dev_err(&slave->dev,
1272 "No match found for scale %d, bus mclk %d curr_freq %d\n",
1273 scale, mclk_freq, curr_freq);
1274 return -EINVAL;
1275 }
1276 scale_index++;
1277
299e9780 1278 ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base);
29d158f9
PLB
1279 if (ret < 0) {
1280 dev_err(&slave->dev,
1281 "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1282 return ret;
1283 }
1284
1285 /* initialize scale for both banks */
299e9780 1286 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
29d158f9
PLB
1287 if (ret < 0) {
1288 dev_err(&slave->dev,
1289 "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1290 return ret;
1291 }
299e9780 1292 ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
29d158f9
PLB
1293 if (ret < 0)
1294 dev_err(&slave->dev,
1295 "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1296
1297 dev_dbg(&slave->dev,
1298 "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1299 base, scale_index, mclk_freq, curr_freq);
1300
1301 return ret;
1302}
1303
d52d7a1b
SK
1304static int sdw_initialize_slave(struct sdw_slave *slave)
1305{
1306 struct sdw_slave_prop *prop = &slave->prop;
6b8caa6f 1307 int status;
d52d7a1b
SK
1308 int ret;
1309 u8 val;
1310
29d158f9
PLB
1311 ret = sdw_slave_set_frequency(slave);
1312 if (ret < 0)
1313 return ret;
1314
6b8caa6f
BL
1315 if (slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH) {
1316 /* Clear bus clash interrupt before enabling interrupt mask */
1317 status = sdw_read_no_pm(slave, SDW_SCP_INT1);
1318 if (status < 0) {
1319 dev_err(&slave->dev,
1320 "SDW_SCP_INT1 (BUS_CLASH) read failed:%d\n", status);
1321 return status;
1322 }
1323 if (status & SDW_SCP_INT1_BUS_CLASH) {
1324 dev_warn(&slave->dev, "Bus clash detected before INT mask is enabled\n");
1325 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_BUS_CLASH);
1326 if (ret < 0) {
1327 dev_err(&slave->dev,
1328 "SDW_SCP_INT1 (BUS_CLASH) write failed:%d\n", ret);
1329 return ret;
1330 }
1331 }
1332 }
1333 if ((slave->bus->prop.quirks & SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY) &&
1334 !(slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY)) {
1335 /* Clear parity interrupt before enabling interrupt mask */
1336 status = sdw_read_no_pm(slave, SDW_SCP_INT1);
1337 if (status < 0) {
1338 dev_err(&slave->dev,
1339 "SDW_SCP_INT1 (PARITY) read failed:%d\n", status);
1340 return status;
1341 }
1342 if (status & SDW_SCP_INT1_PARITY) {
1343 dev_warn(&slave->dev, "PARITY error detected before INT mask is enabled\n");
1344 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, SDW_SCP_INT1_PARITY);
1345 if (ret < 0) {
1346 dev_err(&slave->dev,
1347 "SDW_SCP_INT1 (PARITY) write failed:%d\n", ret);
1348 return ret;
1349 }
1350 }
1351 }
1352
d52d7a1b 1353 /*
2acd30b9
PLB
1354 * Set SCP_INT1_MASK register, typically bus clash and
1355 * implementation-defined interrupt mask. The Parity detection
1356 * may not always be correct on startup so its use is
1357 * device-dependent, it might e.g. only be enabled in
1358 * steady-state after a couple of frames.
d52d7a1b 1359 */
2acd30b9 1360 val = slave->prop.scp_int1_mask;
d52d7a1b
SK
1361
1362 /* Enable SCP interrupts */
b04c975e 1363 ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val);
d52d7a1b 1364 if (ret < 0) {
6d7a1ff7 1365 dev_err(&slave->dev,
17ed5bef 1366 "SDW_SCP_INTMASK1 write failed:%d\n", ret);
d52d7a1b
SK
1367 return ret;
1368 }
1369
1370 /* No need to continue if DP0 is not present */
1371 if (!slave->prop.dp0_prop)
1372 return 0;
1373
1374 /* Enable DP0 interrupts */
8acbbfec 1375 val = prop->dp0_prop->imp_def_interrupts;
d52d7a1b
SK
1376 val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1377
b04c975e 1378 ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val);
5de79ba8 1379 if (ret < 0)
6d7a1ff7 1380 dev_err(&slave->dev,
17ed5bef 1381 "SDW_DP0_INTMASK read failed:%d\n", ret);
5de79ba8 1382 return ret;
d52d7a1b 1383}
b0a9c37b
VK
1384
1385static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1386{
b35991de 1387 u8 clear, impl_int_mask;
b0a9c37b
VK
1388 int status, status2, ret, count = 0;
1389
c30b63ef 1390 status = sdw_read_no_pm(slave, SDW_DP0_INT);
b0a9c37b 1391 if (status < 0) {
6d7a1ff7 1392 dev_err(&slave->dev,
17ed5bef 1393 "SDW_DP0_INT read failed:%d\n", status);
b0a9c37b
VK
1394 return status;
1395 }
1396
1397 do {
b35991de
PLB
1398 clear = status & ~SDW_DP0_INTERRUPTS;
1399
b0a9c37b 1400 if (status & SDW_DP0_INT_TEST_FAIL) {
17ed5bef 1401 dev_err(&slave->dev, "Test fail for port 0\n");
b0a9c37b
VK
1402 clear |= SDW_DP0_INT_TEST_FAIL;
1403 }
1404
1405 /*
1406 * Assumption: PORT_READY interrupt will be received only for
1407 * ports implementing Channel Prepare state machine (CP_SM)
1408 */
1409
1410 if (status & SDW_DP0_INT_PORT_READY) {
1411 complete(&slave->port_ready[0]);
1412 clear |= SDW_DP0_INT_PORT_READY;
1413 }
1414
1415 if (status & SDW_DP0_INT_BRA_FAILURE) {
17ed5bef 1416 dev_err(&slave->dev, "BRA failed\n");
b0a9c37b
VK
1417 clear |= SDW_DP0_INT_BRA_FAILURE;
1418 }
1419
1420 impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1421 SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1422
1423 if (status & impl_int_mask) {
1424 clear |= impl_int_mask;
1425 *slave_status = clear;
1426 }
1427
b35991de 1428 /* clear the interrupts but don't touch reserved and SDCA_CASCADE fields */
c30b63ef 1429 ret = sdw_write_no_pm(slave, SDW_DP0_INT, clear);
b0a9c37b 1430 if (ret < 0) {
6d7a1ff7 1431 dev_err(&slave->dev,
17ed5bef 1432 "SDW_DP0_INT write failed:%d\n", ret);
b0a9c37b
VK
1433 return ret;
1434 }
1435
1436 /* Read DP0 interrupt again */
c30b63ef 1437 status2 = sdw_read_no_pm(slave, SDW_DP0_INT);
b0a9c37b 1438 if (status2 < 0) {
6d7a1ff7 1439 dev_err(&slave->dev,
17ed5bef 1440 "SDW_DP0_INT read failed:%d\n", status2);
80cd8f01 1441 return status2;
b0a9c37b 1442 }
6e06a855 1443 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1444 status &= status2;
1445
1446 count++;
1447
1448 /* we can get alerts while processing so keep retrying */
b35991de 1449 } while ((status & SDW_DP0_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1450
1451 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1452 dev_warn(&slave->dev, "Reached MAX_RETRY on DP0 read\n");
b0a9c37b
VK
1453
1454 return ret;
1455}
1456
1457static int sdw_handle_port_interrupt(struct sdw_slave *slave,
73ede046 1458 int port, u8 *slave_status)
b0a9c37b 1459{
47b85209 1460 u8 clear, impl_int_mask;
b0a9c37b
VK
1461 int status, status2, ret, count = 0;
1462 u32 addr;
1463
1464 if (port == 0)
1465 return sdw_handle_dp0_interrupt(slave, slave_status);
1466
1467 addr = SDW_DPN_INT(port);
c30b63ef 1468 status = sdw_read_no_pm(slave, addr);
b0a9c37b 1469 if (status < 0) {
6d7a1ff7 1470 dev_err(&slave->dev,
17ed5bef 1471 "SDW_DPN_INT read failed:%d\n", status);
b0a9c37b
VK
1472
1473 return status;
1474 }
1475
1476 do {
47b85209
PLB
1477 clear = status & ~SDW_DPN_INTERRUPTS;
1478
b0a9c37b 1479 if (status & SDW_DPN_INT_TEST_FAIL) {
17ed5bef 1480 dev_err(&slave->dev, "Test fail for port:%d\n", port);
b0a9c37b
VK
1481 clear |= SDW_DPN_INT_TEST_FAIL;
1482 }
1483
1484 /*
1485 * Assumption: PORT_READY interrupt will be received only
1486 * for ports implementing CP_SM.
1487 */
1488 if (status & SDW_DPN_INT_PORT_READY) {
1489 complete(&slave->port_ready[port]);
1490 clear |= SDW_DPN_INT_PORT_READY;
1491 }
1492
1493 impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1494 SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1495
b0a9c37b
VK
1496 if (status & impl_int_mask) {
1497 clear |= impl_int_mask;
1498 *slave_status = clear;
1499 }
1500
47b85209 1501 /* clear the interrupt but don't touch reserved fields */
c30b63ef 1502 ret = sdw_write_no_pm(slave, addr, clear);
b0a9c37b 1503 if (ret < 0) {
6d7a1ff7 1504 dev_err(&slave->dev,
17ed5bef 1505 "SDW_DPN_INT write failed:%d\n", ret);
b0a9c37b
VK
1506 return ret;
1507 }
1508
1509 /* Read DPN interrupt again */
c30b63ef 1510 status2 = sdw_read_no_pm(slave, addr);
80cd8f01 1511 if (status2 < 0) {
6d7a1ff7 1512 dev_err(&slave->dev,
17ed5bef 1513 "SDW_DPN_INT read failed:%d\n", status2);
80cd8f01 1514 return status2;
b0a9c37b 1515 }
6e06a855 1516 /* filter to limit loop to interrupts identified in the first status read */
b0a9c37b
VK
1517 status &= status2;
1518
1519 count++;
1520
1521 /* we can get alerts while processing so keep retrying */
47b85209 1522 } while ((status & SDW_DPN_INTERRUPTS) && (count < SDW_READ_INTR_CLEAR_RETRY));
b0a9c37b
VK
1523
1524 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1525 dev_warn(&slave->dev, "Reached MAX_RETRY on port read");
b0a9c37b
VK
1526
1527 return ret;
1528}
1529
1530static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1531{
1532 struct sdw_slave_intr_status slave_intr;
f1fac63a 1533 u8 clear = 0, bit, port_status[15] = {0};
b0a9c37b
VK
1534 int port_num, stat, ret, count = 0;
1535 unsigned long port;
7ffaba04 1536 bool slave_notify;
b7cab9be 1537 u8 sdca_cascade = 0;
b0a9c37b 1538 u8 buf, buf2[2], _buf, _buf2[2];
4724f12c
PLB
1539 bool parity_check;
1540 bool parity_quirk;
b0a9c37b
VK
1541
1542 sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1543
443a98e6 1544 ret = pm_runtime_resume_and_get(&slave->dev);
aa792935
RW
1545 if (ret < 0 && ret != -EACCES) {
1546 dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
aa792935
RW
1547 return ret;
1548 }
1549
f8d0168e 1550 /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
c30b63ef 1551 ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
b0a9c37b 1552 if (ret < 0) {
6d7a1ff7 1553 dev_err(&slave->dev,
17ed5bef 1554 "SDW_SCP_INT1 read failed:%d\n", ret);
aa792935 1555 goto io_err;
b0a9c37b 1556 }
72b16d4a 1557 buf = ret;
b0a9c37b 1558
c30b63ef 1559 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, buf2);
b0a9c37b 1560 if (ret < 0) {
6d7a1ff7 1561 dev_err(&slave->dev,
17ed5bef 1562 "SDW_SCP_INT2/3 read failed:%d\n", ret);
aa792935 1563 goto io_err;
b0a9c37b
VK
1564 }
1565
be505ba8 1566 if (slave->id.class_id) {
c30b63ef 1567 ret = sdw_read_no_pm(slave, SDW_DP0_INT);
b7cab9be 1568 if (ret < 0) {
6d7a1ff7 1569 dev_err(&slave->dev,
b7cab9be
PLB
1570 "SDW_DP0_INT read failed:%d\n", ret);
1571 goto io_err;
1572 }
1573 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1574 }
1575
b0a9c37b 1576 do {
7ffaba04
PLB
1577 slave_notify = false;
1578
b0a9c37b
VK
1579 /*
1580 * Check parity, bus clash and Slave (impl defined)
1581 * interrupt
1582 */
1583 if (buf & SDW_SCP_INT1_PARITY) {
4724f12c
PLB
1584 parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1585 parity_quirk = !slave->first_interrupt_done &&
1586 (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1587
1588 if (parity_check && !parity_quirk)
310f6dc6 1589 dev_err(&slave->dev, "Parity error detected\n");
b0a9c37b
VK
1590 clear |= SDW_SCP_INT1_PARITY;
1591 }
1592
1593 if (buf & SDW_SCP_INT1_BUS_CLASH) {
310f6dc6
PLB
1594 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1595 dev_err(&slave->dev, "Bus clash detected\n");
b0a9c37b
VK
1596 clear |= SDW_SCP_INT1_BUS_CLASH;
1597 }
1598
1599 /*
1600 * When bus clash or parity errors are detected, such errors
1601 * are unlikely to be recoverable errors.
1602 * TODO: In such scenario, reset bus. Make this configurable
1603 * via sysfs property with bus reset being the default.
1604 */
1605
1606 if (buf & SDW_SCP_INT1_IMPL_DEF) {
310f6dc6
PLB
1607 if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1608 dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1609 slave_notify = true;
1610 }
b0a9c37b 1611 clear |= SDW_SCP_INT1_IMPL_DEF;
b0a9c37b
VK
1612 }
1613
b7cab9be
PLB
1614 /* the SDCA interrupts are cleared in the codec driver .interrupt_callback() */
1615 if (sdca_cascade)
1616 slave_notify = true;
1617
b0a9c37b
VK
1618 /* Check port 0 - 3 interrupts */
1619 port = buf & SDW_SCP_INT1_PORT0_3;
1620
1621 /* To get port number corresponding to bits, shift it */
d5826a4b 1622 port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
b0a9c37b
VK
1623 for_each_set_bit(bit, &port, 8) {
1624 sdw_handle_port_interrupt(slave, bit,
73ede046 1625 &port_status[bit]);
b0a9c37b
VK
1626 }
1627
1628 /* Check if cascade 2 interrupt is present */
1629 if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1630 port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1631 for_each_set_bit(bit, &port, 8) {
1632 /* scp2 ports start from 4 */
560458df 1633 port_num = bit + 4;
b0a9c37b
VK
1634 sdw_handle_port_interrupt(slave,
1635 port_num,
1636 &port_status[port_num]);
1637 }
1638 }
1639
1640 /* now check last cascade */
1641 if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1642 port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1643 for_each_set_bit(bit, &port, 8) {
1644 /* scp3 ports start from 11 */
560458df 1645 port_num = bit + 11;
b0a9c37b
VK
1646 sdw_handle_port_interrupt(slave,
1647 port_num,
1648 &port_status[port_num]);
1649 }
1650 }
1651
1652 /* Update the Slave driver */
bd29c00e
PLB
1653 if (slave_notify) {
1654 mutex_lock(&slave->sdw_dev_lock);
1655
1656 if (slave->probed) {
1657 struct device *dev = &slave->dev;
1658 struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
1659
1660 if (drv->ops && drv->ops->interrupt_callback) {
1661 slave_intr.sdca_cascade = sdca_cascade;
1662 slave_intr.control_port = clear;
1663 memcpy(slave_intr.port, &port_status,
1664 sizeof(slave_intr.port));
1665
1666 drv->ops->interrupt_callback(slave, &slave_intr);
1667 }
1668 }
1669
1670 mutex_unlock(&slave->sdw_dev_lock);
b0a9c37b
VK
1671 }
1672
1673 /* Ack interrupt */
c30b63ef 1674 ret = sdw_write_no_pm(slave, SDW_SCP_INT1, clear);
b0a9c37b 1675 if (ret < 0) {
6d7a1ff7 1676 dev_err(&slave->dev,
17ed5bef 1677 "SDW_SCP_INT1 write failed:%d\n", ret);
aa792935 1678 goto io_err;
b0a9c37b
VK
1679 }
1680
c2819e19
PLB
1681 /* at this point all initial interrupt sources were handled */
1682 slave->first_interrupt_done = true;
1683
b0a9c37b
VK
1684 /*
1685 * Read status again to ensure no new interrupts arrived
1686 * while servicing interrupts.
1687 */
c30b63ef 1688 ret = sdw_read_no_pm(slave, SDW_SCP_INT1);
b0a9c37b 1689 if (ret < 0) {
6d7a1ff7 1690 dev_err(&slave->dev,
b500127e 1691 "SDW_SCP_INT1 recheck read failed:%d\n", ret);
aa792935 1692 goto io_err;
b0a9c37b 1693 }
72b16d4a 1694 _buf = ret;
b0a9c37b 1695
c30b63ef 1696 ret = sdw_nread_no_pm(slave, SDW_SCP_INTSTAT2, 2, _buf2);
b0a9c37b 1697 if (ret < 0) {
6d7a1ff7 1698 dev_err(&slave->dev,
b500127e 1699 "SDW_SCP_INT2/3 recheck read failed:%d\n", ret);
aa792935 1700 goto io_err;
b0a9c37b
VK
1701 }
1702
be505ba8 1703 if (slave->id.class_id) {
c30b63ef 1704 ret = sdw_read_no_pm(slave, SDW_DP0_INT);
b7cab9be 1705 if (ret < 0) {
6d7a1ff7 1706 dev_err(&slave->dev,
b500127e 1707 "SDW_DP0_INT recheck read failed:%d\n", ret);
b7cab9be
PLB
1708 goto io_err;
1709 }
1710 sdca_cascade = ret & SDW_DP0_SDCA_CASCADE;
1711 }
1712
6e06a855
PLB
1713 /*
1714 * Make sure no interrupts are pending, but filter to limit loop
1715 * to interrupts identified in the first status read
1716 */
b0a9c37b
VK
1717 buf &= _buf;
1718 buf2[0] &= _buf2[0];
1719 buf2[1] &= _buf2[1];
b7cab9be 1720 stat = buf || buf2[0] || buf2[1] || sdca_cascade;
b0a9c37b
VK
1721
1722 /*
1723 * Exit loop if Slave is continuously in ALERT state even
1724 * after servicing the interrupt multiple times.
1725 */
1726 count++;
1727
1728 /* we can get alerts while processing so keep retrying */
1729 } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1730
1731 if (count == SDW_READ_INTR_CLEAR_RETRY)
6d7a1ff7 1732 dev_warn(&slave->dev, "Reached MAX_RETRY on alert read\n");
b0a9c37b 1733
aa792935
RW
1734io_err:
1735 pm_runtime_mark_last_busy(&slave->dev);
1736 pm_runtime_put_autosuspend(&slave->dev);
1737
b0a9c37b
VK
1738 return ret;
1739}
1740
1741static int sdw_update_slave_status(struct sdw_slave *slave,
73ede046 1742 enum sdw_slave_status status)
b0a9c37b 1743{
bd29c00e 1744 int ret = 0;
b0a9c37b 1745
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1746 mutex_lock(&slave->sdw_dev_lock);
1747
1748 if (slave->probed) {
1749 struct device *dev = &slave->dev;
1750 struct sdw_driver *drv = drv_to_sdw_driver(dev->driver);
1751
1752 if (drv->ops && drv->ops->update_status)
1753 ret = drv->ops->update_status(slave, status);
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1754 }
1755
bd29c00e 1756 mutex_unlock(&slave->sdw_dev_lock);
2140b66b 1757
bd29c00e 1758 return ret;
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1759}
1760
1761/**
1762 * sdw_handle_slave_status() - Handle Slave status
1763 * @bus: SDW bus instance
1764 * @status: Status for all Slave(s)
1765 */
1766int sdw_handle_slave_status(struct sdw_bus *bus,
73ede046 1767 enum sdw_slave_status status[])
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1768{
1769 enum sdw_slave_status prev_status;
1770 struct sdw_slave *slave;
72124f07 1771 bool attached_initializing, id_programmed;
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1772 int i, ret = 0;
1773
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1774 /* first check if any Slaves fell off the bus */
1775 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1776 mutex_lock(&bus->bus_lock);
1777 if (test_bit(i, bus->assigned) == false) {
1778 mutex_unlock(&bus->bus_lock);
1779 continue;
1780 }
1781 mutex_unlock(&bus->bus_lock);
1782
1783 slave = sdw_get_slave(bus, i);
1784 if (!slave)
1785 continue;
1786
1787 if (status[i] == SDW_SLAVE_UNATTACHED &&
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1788 slave->status != SDW_SLAVE_UNATTACHED) {
1789 dev_warn(&slave->dev, "Slave %d state check1: UNATTACHED, status was %d\n",
1790 i, slave->status);
61061901 1791 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
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1792
1793 /* Ensure driver knows that peripheral unattached */
1794 ret = sdw_update_slave_status(slave, status[i]);
1795 if (ret < 0)
1796 dev_warn(&slave->dev, "Update Slave status failed:%d\n", ret);
d1b32855 1797 }
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1798 }
1799
b0a9c37b 1800 if (status[0] == SDW_SLAVE_ATTACHED) {
6e0ac6a6 1801 dev_dbg(bus->dev, "Slave attached, programming device number\n");
72124f07 1802
15ed3ea2 1803 /*
72124f07
RF
1804 * Programming a device number will have side effects,
1805 * so we deal with other devices at a later time.
1806 * This relies on those devices reporting ATTACHED, which will
1807 * trigger another call to this function. This will only
1808 * happen if at least one device ID was programmed.
1809 * Error returns from sdw_program_device_num() are currently
1810 * ignored because there's no useful recovery that can be done.
1811 * Returning the error here could result in the current status
1812 * of other devices not being handled, because if no device IDs
1813 * were programmed there's nothing to guarantee a status change
1814 * to trigger another call to this function.
15ed3ea2 1815 */
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1816 sdw_program_device_num(bus, &id_programmed);
1817 if (id_programmed)
1818 return 0;
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1819 }
1820
1821 /* Continue to check other slave statuses */
1822 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1823 mutex_lock(&bus->bus_lock);
1824 if (test_bit(i, bus->assigned) == false) {
1825 mutex_unlock(&bus->bus_lock);
1826 continue;
1827 }
1828 mutex_unlock(&bus->bus_lock);
1829
1830 slave = sdw_get_slave(bus, i);
1831 if (!slave)
1832 continue;
1833
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1834 attached_initializing = false;
1835
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1836 switch (status[i]) {
1837 case SDW_SLAVE_UNATTACHED:
1838 if (slave->status == SDW_SLAVE_UNATTACHED)
1839 break;
1840
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1841 dev_warn(&slave->dev, "Slave %d state check2: UNATTACHED, status was %d\n",
1842 i, slave->status);
1843
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1844 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1845 break;
1846
1847 case SDW_SLAVE_ALERT:
1848 ret = sdw_handle_slave_alerts(slave);
a5759f19 1849 if (ret < 0)
6d7a1ff7 1850 dev_err(&slave->dev,
17ed5bef 1851 "Slave %d alert handling failed: %d\n",
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1852 i, ret);
1853 break;
1854
1855 case SDW_SLAVE_ATTACHED:
1856 if (slave->status == SDW_SLAVE_ATTACHED)
1857 break;
1858
1859 prev_status = slave->status;
1860 sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1861
1862 if (prev_status == SDW_SLAVE_ALERT)
1863 break;
1864
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1865 attached_initializing = true;
1866
b0a9c37b 1867 ret = sdw_initialize_slave(slave);
a5759f19 1868 if (ret < 0)
6d7a1ff7 1869 dev_err(&slave->dev,
17ed5bef 1870 "Slave %d initialization failed: %d\n",
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1871 i, ret);
1872
1873 break;
1874
1875 default:
6d7a1ff7 1876 dev_err(&slave->dev, "Invalid slave %d status:%d\n",
73ede046 1877 i, status[i]);
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1878 break;
1879 }
1880
1881 ret = sdw_update_slave_status(slave, status[i]);
a5759f19 1882 if (ret < 0)
6d7a1ff7 1883 dev_err(&slave->dev,
17ed5bef 1884 "Update Slave status failed:%d\n", ret);
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1885 if (attached_initializing) {
1886 dev_dbg(&slave->dev,
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1887 "signaling initialization completion for Slave %d\n",
1888 slave->dev_num);
f1b69026 1889
a90def06 1890 complete(&slave->initialization_complete);
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1891
1892 /*
1893 * If the manager became pm_runtime active, the peripherals will be
1894 * restarted and attach, but their pm_runtime status may remain
1895 * suspended. If the 'update_slave_status' callback initiates
1896 * any sort of deferred processing, this processing would not be
1897 * cancelled on pm_runtime suspend.
1898 * To avoid such zombie states, we queue a request to resume.
1899 * This would be a no-op in case the peripheral was being resumed
1900 * by e.g. the ALSA/ASoC framework.
1901 */
1902 pm_request_resume(&slave->dev);
f1b69026 1903 }
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1904 }
1905
1906 return ret;
1907}
1908EXPORT_SYMBOL(sdw_handle_slave_status);
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1909
1910void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1911{
1912 struct sdw_slave *slave;
1913 int i;
1914
1915 /* Check all non-zero devices */
1916 for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1917 mutex_lock(&bus->bus_lock);
1918 if (test_bit(i, bus->assigned) == false) {
1919 mutex_unlock(&bus->bus_lock);
1920 continue;
1921 }
1922 mutex_unlock(&bus->bus_lock);
1923
1924 slave = sdw_get_slave(bus, i);
1925 if (!slave)
1926 continue;
1927
c2819e19 1928 if (slave->status != SDW_SLAVE_UNATTACHED) {
3ab2ca40 1929 sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19 1930 slave->first_interrupt_done = false;
899a7509 1931 sdw_update_slave_status(slave, SDW_SLAVE_UNATTACHED);
c2819e19 1932 }
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1933
1934 /* keep track of request, used in pm_runtime resume */
1935 slave->unattach_request = request;
1936 }
1937}
1938EXPORT_SYMBOL(sdw_clear_slave_status);