Commit | Line | Data |
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ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
a869b7b3 NM |
2 | # 64-bit ARM SoCs from TI |
3 | if ARM64 | |
4 | ||
5 | if ARCH_K3 | |
6 | ||
7 | config ARCH_K3_AM6_SOC | |
8 | bool "K3 AM6 SoC" | |
9 | help | |
10 | Enable support for TI's AM6 SoC Family support | |
11 | ||
cff377f7 NM |
12 | config ARCH_K3_J721E_SOC |
13 | bool "K3 J721E SoC" | |
14 | help | |
15 | Enable support for TI's J721E SoC Family support | |
16 | ||
a869b7b3 NM |
17 | endif |
18 | ||
19 | endif | |
20 | ||
41f93af9 SN |
21 | # |
22 | # TI SOC drivers | |
23 | # | |
24 | menuconfig SOC_TI | |
25 | bool "TI SOC drivers support" | |
26 | ||
27 | if SOC_TI | |
28 | ||
29 | config KEYSTONE_NAVIGATOR_QMSS | |
30 | tristate "Keystone Queue Manager Sub System" | |
31 | depends on ARCH_KEYSTONE | |
32 | help | |
33 | Say y here to support the Keystone multicore Navigator Queue | |
34 | Manager support. The Queue Manager is a hardware module that | |
35 | is responsible for accelerating management of the packet queues. | |
36 | Packets are queued/de-queued by writing/reading descriptor address | |
37 | to a particular memory mapped location in the Queue Manager module. | |
38 | ||
39 | If unsure, say N. | |
40 | ||
88139ed0 SS |
41 | config KEYSTONE_NAVIGATOR_DMA |
42 | tristate "TI Keystone Navigator Packet DMA support" | |
43 | depends on ARCH_KEYSTONE | |
44 | help | |
45 | Say y tp enable support for the Keystone Navigator Packet DMA on | |
46 | on Keystone family of devices. It sets up the dma channels for the | |
47 | Queue Manager Sub System. | |
48 | ||
49 | If unsure, say N. | |
50 | ||
afe761f8 DG |
51 | config AMX3_PM |
52 | tristate "AMx3 Power Management" | |
53 | depends on SOC_AM33XX || SOC_AM43XX | |
5a99ae00 | 54 | depends on WKUP_M3_IPC && TI_EMIF_SRAM && SRAM && RTC_DRV_OMAP |
afe761f8 DG |
55 | help |
56 | Enable power management on AM335x and AM437x. Required for suspend to mem | |
57 | and standby states on both AM335x and AM437x platforms and for deeper cpuidle | |
5a99ae00 K |
58 | c-states on AM335x. Also required for rtc and ddr in self-refresh low |
59 | power mode on AM437x platforms. | |
afe761f8 | 60 | |
cdd5de50 DG |
61 | config WKUP_M3_IPC |
62 | tristate "TI AMx3 Wkup-M3 IPC Driver" | |
63 | depends on WKUP_M3_RPROC | |
64 | depends on OMAP2PLUS_MBOX | |
65 | help | |
66 | TI AM33XX and AM43XX have a Cortex M3, the Wakeup M3, to handle | |
67 | low power transitions. This IPC driver provides the necessary API | |
68 | to communicate and use the Wakeup M3 for PM features like suspend | |
69 | resume and boots it using wkup_m3_rproc driver. | |
70 | ||
52835d59 DG |
71 | config TI_SCI_PM_DOMAINS |
72 | tristate "TI SCI PM Domains Driver" | |
73 | depends on TI_SCI_PROTOCOL | |
74 | depends on PM_GENERIC_DOMAINS | |
75 | help | |
76 | Generic power domain implementation for TI device implementing | |
77 | the TI SCI protocol. | |
78 | ||
79 | To compile this as a module, choose M here. The module will be | |
80 | called ti_sci_pm_domains. Note this is needed early in boot before | |
81 | rootfs may be available. | |
82 | ||
521a503f AB |
83 | endif # SOC_TI |
84 | ||
49b32315 LV |
85 | config TI_SCI_INTA_MSI_DOMAIN |
86 | bool | |
87 | select GENERIC_MSI_IRQ_DOMAIN | |
88 | help | |
89 | Driver to enable Interrupt Aggregator specific MSI Domain. |