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91cfbd4e TA |
1 | /* |
2 | * Exynos Generic power domain support. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * Implementation of Exynos specific power domain control which is used in | |
8 | * conjunction with runtime-pm. Support for both device-tree and non-device-tree | |
9 | * based power domain support is included. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/io.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/pm_domain.h> | |
c760569d | 20 | #include <linux/clk.h> |
91cfbd4e TA |
21 | #include <linux/delay.h> |
22 | #include <linux/of_address.h> | |
8a65d236 TF |
23 | #include <linux/of_platform.h> |
24 | #include <linux/sched.h> | |
91cfbd4e | 25 | |
c760569d P |
26 | #define MAX_CLK_PER_DOMAIN 4 |
27 | ||
c028e175 KK |
28 | struct exynos_pm_domain_config { |
29 | /* Value for LOCAL_PWR_CFG and STATUS fields for each domain */ | |
30 | u32 local_pwr_cfg; | |
31 | }; | |
32 | ||
91cfbd4e TA |
33 | /* |
34 | * Exynos specific wrapper around the generic power domain | |
35 | */ | |
36 | struct exynos_pm_domain { | |
37 | void __iomem *base; | |
38 | char const *name; | |
39 | bool is_off; | |
40 | struct generic_pm_domain pd; | |
c760569d P |
41 | struct clk *oscclk; |
42 | struct clk *clk[MAX_CLK_PER_DOMAIN]; | |
43 | struct clk *pclk[MAX_CLK_PER_DOMAIN]; | |
528eae6c | 44 | struct clk *asb_clk[MAX_CLK_PER_DOMAIN]; |
c028e175 | 45 | u32 local_pwr_cfg; |
91cfbd4e TA |
46 | }; |
47 | ||
48 | static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) | |
49 | { | |
50 | struct exynos_pm_domain *pd; | |
51 | void __iomem *base; | |
52 | u32 timeout, pwr; | |
53 | char *op; | |
528eae6c | 54 | int i; |
91cfbd4e TA |
55 | |
56 | pd = container_of(domain, struct exynos_pm_domain, pd); | |
57 | base = pd->base; | |
58 | ||
528eae6c AH |
59 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { |
60 | if (IS_ERR(pd->asb_clk[i])) | |
61 | break; | |
62 | clk_prepare_enable(pd->asb_clk[i]); | |
63 | } | |
64 | ||
c760569d P |
65 | /* Set oscclk before powering off a domain*/ |
66 | if (!power_on) { | |
c760569d P |
67 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { |
68 | if (IS_ERR(pd->clk[i])) | |
69 | break; | |
29e5eea0 | 70 | pd->pclk[i] = clk_get_parent(pd->clk[i]); |
c760569d P |
71 | if (clk_set_parent(pd->clk[i], pd->oscclk)) |
72 | pr_err("%s: error setting oscclk as parent to clock %d\n", | |
73 | pd->name, i); | |
74 | } | |
75 | } | |
76 | ||
c028e175 | 77 | pwr = power_on ? pd->local_pwr_cfg : 0; |
d0ceee0b | 78 | writel_relaxed(pwr, base); |
91cfbd4e TA |
79 | |
80 | /* Wait max 1ms */ | |
81 | timeout = 10; | |
82 | ||
43a0a98a | 83 | while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) { |
91cfbd4e TA |
84 | if (!timeout) { |
85 | op = (power_on) ? "enable" : "disable"; | |
86 | pr_err("Power domain %s %s failed\n", domain->name, op); | |
87 | return -ETIMEDOUT; | |
88 | } | |
89 | timeout--; | |
90 | cpu_relax(); | |
91 | usleep_range(80, 100); | |
92 | } | |
c760569d P |
93 | |
94 | /* Restore clocks after powering on a domain*/ | |
95 | if (power_on) { | |
c760569d P |
96 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { |
97 | if (IS_ERR(pd->clk[i])) | |
98 | break; | |
29e5eea0 | 99 | |
a0a966b8 | 100 | if (IS_ERR(pd->pclk[i])) |
29e5eea0 | 101 | continue; /* Skip on first power up */ |
c760569d P |
102 | if (clk_set_parent(pd->clk[i], pd->pclk[i])) |
103 | pr_err("%s: error setting parent to clock%d\n", | |
104 | pd->name, i); | |
105 | } | |
106 | } | |
107 | ||
528eae6c AH |
108 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { |
109 | if (IS_ERR(pd->asb_clk[i])) | |
110 | break; | |
111 | clk_disable_unprepare(pd->asb_clk[i]); | |
112 | } | |
113 | ||
91cfbd4e TA |
114 | return 0; |
115 | } | |
116 | ||
117 | static int exynos_pd_power_on(struct generic_pm_domain *domain) | |
118 | { | |
119 | return exynos_pd_power(domain, true); | |
120 | } | |
121 | ||
122 | static int exynos_pd_power_off(struct generic_pm_domain *domain) | |
123 | { | |
124 | return exynos_pd_power(domain, false); | |
125 | } | |
126 | ||
c028e175 KK |
127 | static const struct exynos_pm_domain_config exynos4210_cfg __initconst = { |
128 | .local_pwr_cfg = 0x7, | |
129 | }; | |
130 | ||
131 | static const struct of_device_id exynos_pm_domain_of_match[] __initconst = { | |
132 | { | |
133 | .compatible = "samsung,exynos4210-pd", | |
134 | .data = &exynos4210_cfg, | |
135 | }, | |
136 | { }, | |
137 | }; | |
138 | ||
8eaa9e42 | 139 | static __init int exynos4_pm_init_power_domain(void) |
91cfbd4e TA |
140 | { |
141 | struct device_node *np; | |
c028e175 | 142 | const struct of_device_id *match; |
91cfbd4e | 143 | |
c028e175 KK |
144 | for_each_matching_node_and_match(np, exynos_pm_domain_of_match, &match) { |
145 | const struct exynos_pm_domain_config *pm_domain_cfg; | |
91cfbd4e | 146 | struct exynos_pm_domain *pd; |
c760569d | 147 | int on, i; |
8a65d236 | 148 | |
c028e175 KK |
149 | pm_domain_cfg = match->data; |
150 | ||
91cfbd4e TA |
151 | pd = kzalloc(sizeof(*pd), GFP_KERNEL); |
152 | if (!pd) { | |
153 | pr_err("%s: failed to allocate memory for domain\n", | |
154 | __func__); | |
fe4034a3 | 155 | of_node_put(np); |
91cfbd4e TA |
156 | return -ENOMEM; |
157 | } | |
2be2a3ff MS |
158 | pd->pd.name = kstrdup_const(strrchr(np->full_name, '/') + 1, |
159 | GFP_KERNEL); | |
c88cad34 KK |
160 | if (!pd->pd.name) { |
161 | kfree(pd); | |
162 | of_node_put(np); | |
163 | return -ENOMEM; | |
164 | } | |
165 | ||
7add0ec0 | 166 | pd->name = pd->pd.name; |
91cfbd4e | 167 | pd->base = of_iomap(np, 0); |
ef2156cf | 168 | if (!pd->base) { |
2be2a3ff | 169 | pr_warn("%s: failed to map memory\n", __func__); |
27bbd23f | 170 | kfree_const(pd->pd.name); |
ef2156cf | 171 | kfree(pd); |
ef2156cf KK |
172 | continue; |
173 | } | |
174 | ||
91cfbd4e TA |
175 | pd->pd.power_off = exynos_pd_power_off; |
176 | pd->pd.power_on = exynos_pd_power_on; | |
c028e175 | 177 | pd->local_pwr_cfg = pm_domain_cfg->local_pwr_cfg; |
2ed5f236 | 178 | |
528eae6c AH |
179 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { |
180 | char clk_name[8]; | |
181 | ||
182 | snprintf(clk_name, sizeof(clk_name), "asb%d", i); | |
2be2a3ff | 183 | pd->asb_clk[i] = of_clk_get_by_name(np, clk_name); |
528eae6c AH |
184 | if (IS_ERR(pd->asb_clk[i])) |
185 | break; | |
186 | } | |
187 | ||
2be2a3ff | 188 | pd->oscclk = of_clk_get_by_name(np, "oscclk"); |
c760569d P |
189 | if (IS_ERR(pd->oscclk)) |
190 | goto no_clk; | |
191 | ||
192 | for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { | |
193 | char clk_name[8]; | |
194 | ||
195 | snprintf(clk_name, sizeof(clk_name), "clk%d", i); | |
2be2a3ff | 196 | pd->clk[i] = of_clk_get_by_name(np, clk_name); |
c760569d P |
197 | if (IS_ERR(pd->clk[i])) |
198 | break; | |
29e5eea0 KK |
199 | /* |
200 | * Skip setting parent on first power up. | |
201 | * The parent at this time may not be useful at all. | |
202 | */ | |
203 | pd->pclk[i] = ERR_PTR(-EINVAL); | |
c760569d P |
204 | } |
205 | ||
206 | if (IS_ERR(pd->clk[0])) | |
207 | clk_put(pd->oscclk); | |
208 | ||
209 | no_clk: | |
43a0a98a | 210 | on = readl_relaxed(pd->base + 0x4) & pd->local_pwr_cfg; |
2ed5f236 TF |
211 | |
212 | pm_genpd_init(&pd->pd, NULL, !on); | |
a4a8c2c4 | 213 | of_genpd_add_provider_simple(np, &pd->pd); |
91cfbd4e | 214 | } |
8a65d236 | 215 | |
0f780751 | 216 | /* Assign the child power domains to their parents */ |
c028e175 | 217 | for_each_matching_node(np, exynos_pm_domain_of_match) { |
0f780751 MS |
218 | struct generic_pm_domain *child_domain, *parent_domain; |
219 | struct of_phandle_args args; | |
220 | ||
221 | args.np = np; | |
222 | args.args_count = 0; | |
223 | child_domain = of_genpd_get_from_provider(&args); | |
0b7dc0ff | 224 | if (IS_ERR(child_domain)) |
51a6256b | 225 | continue; |
0f780751 MS |
226 | |
227 | if (of_parse_phandle_with_args(np, "power-domains", | |
228 | "#power-domain-cells", 0, &args) != 0) | |
51a6256b | 229 | continue; |
0f780751 MS |
230 | |
231 | parent_domain = of_genpd_get_from_provider(&args); | |
0b7dc0ff | 232 | if (IS_ERR(parent_domain)) |
51a6256b | 233 | continue; |
0f780751 MS |
234 | |
235 | if (pm_genpd_add_subdomain(parent_domain, child_domain)) | |
236 | pr_warn("%s failed to add subdomain: %s\n", | |
237 | parent_domain->name, child_domain->name); | |
238 | else | |
239 | pr_info("%s has as child subdomain: %s.\n", | |
240 | parent_domain->name, child_domain->name); | |
0f780751 MS |
241 | } |
242 | ||
91cfbd4e TA |
243 | return 0; |
244 | } | |
2be2a3ff | 245 | core_initcall(exynos4_pm_init_power_domain); |