[linux-2.6-block.git] / drivers / soc / renesas / r8a774c0-sysc.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Renesas RZ/G2E System Controller
 * Copyright (C) 2018 Renesas Electronics Corp.
 *
 * Based on Renesas R-Car E3 System Controller
 */

#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/sys_soc.h>

#include <dt-bindings/power/r8a774c0-sysc.h>

#include "rcar-sysc.h"

static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
	{ "always-on",	    0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
	{ "ca53-scu",	0x140, 0, R8A774C0_PD_CA53_SCU,  R8A774C0_PD_ALWAYS_ON,
	  PD_SCU },
	{ "ca53-cpu0",	0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
	  PD_CPU_NOCR },
	{ "ca53-cpu1",	0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
	  PD_CPU_NOCR },
	{ "a3vc",	0x380, 0, R8A774C0_PD_A3VC,	R8A774C0_PD_ALWAYS_ON },
	{ "a2vc1",	0x3c0, 1, R8A774C0_PD_A2VC1,	R8A774C0_PD_A3VC },
	{ "3dg-a",	0x100, 0, R8A774C0_PD_3DG_A,	R8A774C0_PD_ALWAYS_ON },
	{ "3dg-b",	0x100, 1, R8A774C0_PD_3DG_B,	R8A774C0_PD_3DG_A },
};

/* Fixups for RZ/G2E ES1.0 revision */
static const struct soc_device_attribute r8a774c0[] __initconst = {
	{ .soc_id = "r8a774c0", .revision = "ES1.0" },
	{ /* sentinel */ }
};

static int __init r8a774c0_sysc_init(void)
{
	if (soc_device_match(r8a774c0)) {
		/* Fix incorrect 3DG hierarchy */
		swap(r8a774c0_areas[6], r8a774c0_areas[7]);
		r8a774c0_areas[6].parent = R8A774C0_PD_ALWAYS_ON;
		r8a774c0_areas[7].parent = R8A774C0_PD_3DG_B;
	}

	return 0;
}

const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
	.init = r8a774c0_sysc_init,
	.areas = r8a774c0_areas,
	.num_areas = ARRAY_SIZE(r8a774c0_areas),
};
Commit	Line	Data
f37d211c FC	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Renesas RZ/G2E System Controller
	4	* Copyright (C) 2018 Renesas Electronics Corp.
	5	*
	6	* Based on Renesas R-Car E3 System Controller
	7	*/
	8
	9	#include <linux/bug.h>
	10	#include <linux/kernel.h>
	11	#include <linux/sys_soc.h>
	12
	13	#include <dt-bindings/power/r8a774c0-sysc.h>
	14
	15	#include "rcar-sysc.h"
	16
	17	static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
	18	{ "always-on", 0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
	19	{ "ca53-scu", 0x140, 0, R8A774C0_PD_CA53_SCU, R8A774C0_PD_ALWAYS_ON,
	20	PD_SCU },
	21	{ "ca53-cpu0", 0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
	22	PD_CPU_NOCR },
	23	{ "ca53-cpu1", 0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
	24	PD_CPU_NOCR },
	25	{ "a3vc", 0x380, 0, R8A774C0_PD_A3VC, R8A774C0_PD_ALWAYS_ON },
	26	{ "a2vc1", 0x3c0, 1, R8A774C0_PD_A2VC1, R8A774C0_PD_A3VC },
	27	{ "3dg-a", 0x100, 0, R8A774C0_PD_3DG_A, R8A774C0_PD_ALWAYS_ON },
	28	{ "3dg-b", 0x100, 1, R8A774C0_PD_3DG_B, R8A774C0_PD_3DG_A },
	29	};
	30
f37d211c FC	31	/* Fixups for RZ/G2E ES1.0 revision */
	32	static const struct soc_device_attribute r8a774c0[] __initconst = {
	33	{ .soc_id = "r8a774c0", .revision = "ES1.0" },
	34	{ /* sentinel */ }
	35	};
	36
	37	static int __init r8a774c0_sysc_init(void)
	38	{
	39	if (soc_device_match(r8a774c0)) {
a6459722 BD	40	/* Fix incorrect 3DG hierarchy */
	41	swap(r8a774c0_areas[6], r8a774c0_areas[7]);
	42	r8a774c0_areas[6].parent = R8A774C0_PD_ALWAYS_ON;
	43	r8a774c0_areas[7].parent = R8A774C0_PD_3DG_B;
f37d211c FC	44	}
	45
	46	return 0;
	47	}
	48
	49	const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
	50	.init = r8a774c0_sysc_init,
	51	.areas = r8a774c0_areas,
	52	.num_areas = ARRAY_SIZE(r8a774c0_areas),
	53	};