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1802d0be | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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2 | /* |
3 | * Copyright © 2014-2017 Broadcom | |
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4 | */ |
5 | ||
6 | #include <linux/linkage.h> | |
7 | #include <asm/assembler.h> | |
8 | ||
9 | #include "pm.h" | |
10 | ||
a2faac39 | 11 | .arch armv7-a |
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12 | .text |
13 | .align 3 | |
14 | ||
15 | #define AON_CTRL_REG r10 | |
16 | #define DDR_PHY_STATUS_REG r11 | |
17 | ||
18 | /* | |
19 | * r0: AON_CTRL base address | |
20 | * r1: DDRY PHY PLL status register address | |
21 | */ | |
22 | ENTRY(brcmstb_pm_do_s2) | |
23 | stmfd sp!, {r4-r11, lr} | |
24 | mov AON_CTRL_REG, r0 | |
25 | mov DDR_PHY_STATUS_REG, r1 | |
26 | ||
27 | /* Flush memory transactions */ | |
28 | dsb | |
29 | ||
30 | /* Cache DDR_PHY_STATUS_REG translation */ | |
31 | ldr r0, [DDR_PHY_STATUS_REG] | |
32 | ||
33 | /* power down request */ | |
34 | ldr r0, =PM_S2_COMMAND | |
35 | ldr r1, =0 | |
36 | str r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
37 | ldr r1, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
38 | str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
39 | ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
40 | ||
41 | /* Wait for interrupt */ | |
42 | wfi | |
43 | nop | |
44 | ||
45 | /* Bring MEMC back up */ | |
46 | 1: ldr r0, [DDR_PHY_STATUS_REG] | |
47 | ands r0, #1 | |
48 | beq 1b | |
49 | ||
50 | /* Power-up handshake */ | |
51 | ldr r0, =1 | |
52 | str r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS] | |
53 | ldr r0, [AON_CTRL_REG, #AON_CTRL_HOST_MISC_CMDS] | |
54 | ||
55 | ldr r0, =0 | |
56 | str r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
57 | ldr r0, [AON_CTRL_REG, #AON_CTRL_PM_CTRL] | |
58 | ||
59 | /* Return to caller */ | |
60 | ldr r0, =0 | |
61 | ldmfd sp!, {r4-r11, pc} | |
62 | ||
63 | ENDPROC(brcmstb_pm_do_s2) | |
64 | ||
65 | /* Place literal pool here */ | |
66 | .ltorg | |
67 | ||
68 | ENTRY(brcmstb_pm_do_s2_sz) | |
69 | .word . - brcmstb_pm_do_s2 |