Commit | Line | Data |
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b3c185a7 PM |
1 | /* |
2 | * SuperH Pin Function Controller GPIO driver. | |
3 | * | |
4 | * Copyright (C) 2008 Magnus Damm | |
5 | * Copyright (C) 2009 - 2012 Paul Mundt | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
11 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
12 | ||
13 | #include <linux/init.h> | |
14 | #include <linux/gpio.h> | |
15 | #include <linux/slab.h> | |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/platform_device.h> | |
19 | ||
20 | struct sh_pfc_chip { | |
21 | struct sh_pfc *pfc; | |
22 | struct gpio_chip gpio_chip; | |
23 | }; | |
24 | ||
25 | static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) | |
26 | { | |
27 | return container_of(gc, struct sh_pfc_chip, gpio_chip); | |
28 | } | |
29 | ||
30 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) | |
31 | { | |
32 | return gpio_to_pfc_chip(gc)->pfc; | |
33 | } | |
34 | ||
35 | static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) | |
36 | { | |
37 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
38 | struct pinmux_data_reg *dummy; | |
39 | unsigned long flags; | |
40 | int i, ret, pinmux_type; | |
41 | ||
42 | ret = -EINVAL; | |
43 | ||
44 | if (!pfc) | |
45 | goto err_out; | |
46 | ||
47 | spin_lock_irqsave(&pfc->lock, flags); | |
48 | ||
49 | if ((pfc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE) | |
50 | goto err_unlock; | |
51 | ||
52 | /* setup pin function here if no data is associated with pin */ | |
53 | ||
54 | if (sh_pfc_get_data_reg(pfc, offset, &dummy, &i) != 0) | |
55 | pinmux_type = PINMUX_TYPE_FUNCTION; | |
56 | else | |
57 | pinmux_type = PINMUX_TYPE_GPIO; | |
58 | ||
59 | if (pinmux_type == PINMUX_TYPE_FUNCTION) { | |
60 | if (sh_pfc_config_gpio(pfc, offset, | |
61 | pinmux_type, | |
62 | GPIO_CFG_DRYRUN) != 0) | |
63 | goto err_unlock; | |
64 | ||
65 | if (sh_pfc_config_gpio(pfc, offset, | |
66 | pinmux_type, | |
67 | GPIO_CFG_REQ) != 0) | |
68 | BUG(); | |
69 | } | |
70 | ||
71 | pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; | |
72 | pfc->gpios[offset].flags |= pinmux_type; | |
73 | ||
74 | ret = 0; | |
75 | err_unlock: | |
76 | spin_unlock_irqrestore(&pfc->lock, flags); | |
77 | err_out: | |
78 | return ret; | |
79 | } | |
80 | ||
81 | static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) | |
82 | { | |
83 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
84 | unsigned long flags; | |
85 | int pinmux_type; | |
86 | ||
87 | if (!pfc) | |
88 | return; | |
89 | ||
90 | spin_lock_irqsave(&pfc->lock, flags); | |
91 | ||
92 | pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; | |
93 | sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); | |
94 | pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; | |
95 | pfc->gpios[offset].flags |= PINMUX_TYPE_NONE; | |
96 | ||
97 | spin_unlock_irqrestore(&pfc->lock, flags); | |
98 | } | |
99 | ||
100 | static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) | |
101 | { | |
102 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
103 | unsigned long flags; | |
104 | int ret; | |
105 | ||
106 | spin_lock_irqsave(&pfc->lock, flags); | |
107 | ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_INPUT); | |
108 | spin_unlock_irqrestore(&pfc->lock, flags); | |
109 | ||
110 | return ret; | |
111 | } | |
112 | ||
113 | static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) | |
114 | { | |
115 | struct pinmux_data_reg *dr = NULL; | |
116 | int bit = 0; | |
117 | ||
118 | if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) | |
119 | BUG(); | |
120 | else | |
121 | sh_pfc_write_bit(dr, bit, value); | |
122 | } | |
123 | ||
124 | static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
125 | int value) | |
126 | { | |
127 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
128 | unsigned long flags; | |
129 | int ret; | |
130 | ||
131 | sh_gpio_set_value(pfc, offset, value); | |
132 | ||
133 | spin_lock_irqsave(&pfc->lock, flags); | |
134 | ret = sh_pfc_set_direction(pfc, offset, PINMUX_TYPE_OUTPUT); | |
135 | spin_unlock_irqrestore(&pfc->lock, flags); | |
136 | ||
137 | return ret; | |
138 | } | |
139 | ||
140 | static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) | |
141 | { | |
142 | struct pinmux_data_reg *dr = NULL; | |
143 | int bit = 0; | |
144 | ||
145 | if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) | |
146 | return -EINVAL; | |
147 | ||
148 | return sh_pfc_read_bit(dr, bit); | |
149 | } | |
150 | ||
151 | static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) | |
152 | { | |
153 | return sh_gpio_get_value(gpio_to_pfc(gc), offset); | |
154 | } | |
155 | ||
156 | static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
157 | { | |
158 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
159 | } | |
160 | ||
161 | static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
162 | { | |
163 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
164 | pinmux_enum_t enum_id; | |
165 | pinmux_enum_t *enum_ids; | |
166 | int i, k, pos; | |
167 | ||
168 | pos = 0; | |
169 | enum_id = 0; | |
170 | while (1) { | |
171 | pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); | |
172 | if (pos <= 0 || !enum_id) | |
173 | break; | |
174 | ||
175 | for (i = 0; i < pfc->gpio_irq_size; i++) { | |
176 | enum_ids = pfc->gpio_irq[i].enum_ids; | |
177 | for (k = 0; enum_ids[k]; k++) { | |
178 | if (enum_ids[k] == enum_id) | |
179 | return pfc->gpio_irq[i].irq; | |
180 | } | |
181 | } | |
182 | } | |
183 | ||
184 | return -ENOSYS; | |
185 | } | |
186 | ||
187 | static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) | |
188 | { | |
189 | struct sh_pfc *pfc = chip->pfc; | |
190 | struct gpio_chip *gc = &chip->gpio_chip; | |
191 | ||
192 | gc->request = sh_gpio_request; | |
193 | gc->free = sh_gpio_free; | |
194 | gc->direction_input = sh_gpio_direction_input; | |
195 | gc->get = sh_gpio_get; | |
196 | gc->direction_output = sh_gpio_direction_output; | |
197 | gc->set = sh_gpio_set; | |
198 | gc->to_irq = sh_gpio_to_irq; | |
199 | ||
200 | WARN_ON(pfc->first_gpio != 0); /* needs testing */ | |
201 | ||
202 | gc->label = pfc->name; | |
203 | gc->owner = THIS_MODULE; | |
204 | gc->base = pfc->first_gpio; | |
205 | gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1; | |
206 | } | |
207 | ||
208 | int sh_pfc_register_gpiochip(struct sh_pfc *pfc) | |
209 | { | |
210 | struct sh_pfc_chip *chip; | |
211 | int ret; | |
212 | ||
213 | chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL); | |
214 | if (unlikely(!chip)) | |
215 | return -ENOMEM; | |
216 | ||
217 | chip->pfc = pfc; | |
218 | ||
219 | sh_pfc_gpio_setup(chip); | |
220 | ||
221 | ret = gpiochip_add(&chip->gpio_chip); | |
222 | if (unlikely(ret < 0)) | |
223 | kfree(chip); | |
224 | ||
225 | pr_info("%s handling gpio %d -> %d\n", | |
226 | pfc->name, pfc->first_gpio, pfc->last_gpio); | |
227 | ||
228 | return ret; | |
229 | } | |
230 | EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip); | |
231 | ||
232 | static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data) | |
233 | { | |
234 | return !!strstr(gc->label, data); | |
235 | } | |
236 | ||
237 | static int __devinit sh_pfc_gpio_probe(struct platform_device *pdev) | |
238 | { | |
239 | struct sh_pfc_chip *chip; | |
240 | struct gpio_chip *gc; | |
241 | ||
242 | gc = gpiochip_find("_pfc", sh_pfc_gpio_match); | |
243 | if (unlikely(!gc)) { | |
244 | pr_err("Cant find gpio chip\n"); | |
245 | return -ENODEV; | |
246 | } | |
247 | ||
248 | chip = gpio_to_pfc_chip(gc); | |
249 | platform_set_drvdata(pdev, chip); | |
250 | ||
251 | pr_info("attaching to GPIO chip %s\n", chip->pfc->name); | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
256 | static int __devexit sh_pfc_gpio_remove(struct platform_device *pdev) | |
257 | { | |
258 | struct sh_pfc_chip *chip = platform_get_drvdata(pdev); | |
259 | int ret; | |
260 | ||
261 | ret = gpiochip_remove(&chip->gpio_chip); | |
262 | if (unlikely(ret < 0)) | |
263 | return ret; | |
264 | ||
265 | kfree(chip); | |
266 | return 0; | |
267 | } | |
268 | ||
269 | static struct platform_driver sh_pfc_gpio_driver = { | |
270 | .probe = sh_pfc_gpio_probe, | |
271 | .remove = __devexit_p(sh_pfc_gpio_remove), | |
272 | .driver = { | |
273 | .name = KBUILD_MODNAME, | |
274 | .owner = THIS_MODULE, | |
275 | }, | |
276 | }; | |
277 | ||
278 | static struct platform_device sh_pfc_gpio_device = { | |
279 | .name = KBUILD_MODNAME, | |
280 | .id = -1, | |
281 | }; | |
282 | ||
283 | static int __init sh_pfc_gpio_init(void) | |
284 | { | |
285 | int rc; | |
286 | ||
287 | rc = platform_driver_register(&sh_pfc_gpio_driver); | |
288 | if (likely(!rc)) { | |
289 | rc = platform_device_register(&sh_pfc_gpio_device); | |
290 | if (unlikely(rc)) | |
291 | platform_driver_unregister(&sh_pfc_gpio_driver); | |
292 | } | |
293 | ||
294 | return rc; | |
295 | } | |
296 | ||
297 | static void __exit sh_pfc_gpio_exit(void) | |
298 | { | |
299 | platform_device_unregister(&sh_pfc_gpio_device); | |
300 | platform_driver_unregister(&sh_pfc_gpio_driver); | |
301 | } | |
302 | ||
303 | module_init(sh_pfc_gpio_init); | |
304 | module_exit(sh_pfc_gpio_exit); | |
305 | ||
306 | MODULE_AUTHOR("Magnus Damm, Paul Mundt"); | |
307 | MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller"); | |
308 | MODULE_LICENSE("GPL v2"); | |
309 | MODULE_ALIAS("platform:pfc-gpio"); |