Commit | Line | Data |
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b3c185a7 PM |
1 | /* |
2 | * SuperH Pin Function Controller GPIO driver. | |
3 | * | |
4 | * Copyright (C) 2008 Magnus Damm | |
5 | * Copyright (C) 2009 - 2012 Paul Mundt | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
c6193eac LP |
11 | |
12 | #define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt | |
b3c185a7 | 13 | |
1724acfd | 14 | #include <linux/device.h> |
b3c185a7 PM |
15 | #include <linux/init.h> |
16 | #include <linux/gpio.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/module.h> | |
ca5481c6 | 20 | #include <linux/pinctrl/consumer.h> |
66791859 | 21 | #include <linux/sh_pfc.h> |
b3c185a7 | 22 | |
f9165132 LP |
23 | #include "core.h" |
24 | ||
b3c185a7 PM |
25 | struct sh_pfc_chip { |
26 | struct sh_pfc *pfc; | |
27 | struct gpio_chip gpio_chip; | |
28 | }; | |
29 | ||
30 | static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) | |
31 | { | |
32 | return container_of(gc, struct sh_pfc_chip, gpio_chip); | |
33 | } | |
34 | ||
35 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) | |
36 | { | |
37 | return gpio_to_pfc_chip(gc)->pfc; | |
38 | } | |
39 | ||
40 | static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) | |
41 | { | |
ca5481c6 | 42 | return pinctrl_request_gpio(offset); |
b3c185a7 PM |
43 | } |
44 | ||
45 | static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) | |
46 | { | |
ca5481c6 | 47 | pinctrl_free_gpio(offset); |
b3c185a7 PM |
48 | } |
49 | ||
50 | static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) | |
51 | { | |
52 | struct pinmux_data_reg *dr = NULL; | |
53 | int bit = 0; | |
54 | ||
a99ebec1 | 55 | if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) |
b3c185a7 PM |
56 | BUG(); |
57 | else | |
58 | sh_pfc_write_bit(dr, bit, value); | |
59 | } | |
60 | ||
b3c185a7 PM |
61 | static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) |
62 | { | |
63 | struct pinmux_data_reg *dr = NULL; | |
64 | int bit = 0; | |
65 | ||
a99ebec1 | 66 | if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) |
b3c185a7 PM |
67 | return -EINVAL; |
68 | ||
69 | return sh_pfc_read_bit(dr, bit); | |
70 | } | |
71 | ||
ca5481c6 PM |
72 | static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
73 | { | |
74 | return pinctrl_gpio_direction_input(offset); | |
75 | } | |
76 | ||
77 | static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
78 | int value) | |
79 | { | |
80 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
81 | ||
82 | return pinctrl_gpio_direction_output(offset); | |
83 | } | |
84 | ||
b3c185a7 PM |
85 | static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) |
86 | { | |
87 | return sh_gpio_get_value(gpio_to_pfc(gc), offset); | |
88 | } | |
89 | ||
90 | static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
91 | { | |
92 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
93 | } | |
94 | ||
95 | static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
96 | { | |
97 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
98 | pinmux_enum_t enum_id; | |
99 | pinmux_enum_t *enum_ids; | |
100 | int i, k, pos; | |
101 | ||
102 | pos = 0; | |
103 | enum_id = 0; | |
104 | while (1) { | |
105 | pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); | |
106 | if (pos <= 0 || !enum_id) | |
107 | break; | |
108 | ||
d4e62d00 LP |
109 | for (i = 0; i < pfc->pdata->gpio_irq_size; i++) { |
110 | enum_ids = pfc->pdata->gpio_irq[i].enum_ids; | |
b3c185a7 PM |
111 | for (k = 0; enum_ids[k]; k++) { |
112 | if (enum_ids[k] == enum_id) | |
d4e62d00 | 113 | return pfc->pdata->gpio_irq[i].irq; |
b3c185a7 PM |
114 | } |
115 | } | |
116 | } | |
117 | ||
118 | return -ENOSYS; | |
119 | } | |
120 | ||
121 | static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) | |
122 | { | |
123 | struct sh_pfc *pfc = chip->pfc; | |
124 | struct gpio_chip *gc = &chip->gpio_chip; | |
125 | ||
126 | gc->request = sh_gpio_request; | |
127 | gc->free = sh_gpio_free; | |
128 | gc->direction_input = sh_gpio_direction_input; | |
129 | gc->get = sh_gpio_get; | |
130 | gc->direction_output = sh_gpio_direction_output; | |
131 | gc->set = sh_gpio_set; | |
132 | gc->to_irq = sh_gpio_to_irq; | |
133 | ||
d4e62d00 | 134 | WARN_ON(pfc->pdata->first_gpio != 0); /* needs testing */ |
b3c185a7 | 135 | |
d4e62d00 | 136 | gc->label = pfc->pdata->name; |
b3c185a7 | 137 | gc->owner = THIS_MODULE; |
d4e62d00 LP |
138 | gc->base = pfc->pdata->first_gpio; |
139 | gc->ngpio = (pfc->pdata->last_gpio - pfc->pdata->first_gpio) + 1; | |
b3c185a7 PM |
140 | } |
141 | ||
142 | int sh_pfc_register_gpiochip(struct sh_pfc *pfc) | |
143 | { | |
144 | struct sh_pfc_chip *chip; | |
145 | int ret; | |
146 | ||
1724acfd | 147 | chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); |
b3c185a7 PM |
148 | if (unlikely(!chip)) |
149 | return -ENOMEM; | |
150 | ||
151 | chip->pfc = pfc; | |
152 | ||
153 | sh_pfc_gpio_setup(chip); | |
154 | ||
155 | ret = gpiochip_add(&chip->gpio_chip); | |
1724acfd | 156 | if (unlikely(ret < 0)) |
6f6a4a68 | 157 | return ret; |
6f6a4a68 LP |
158 | |
159 | pfc->gpio = chip; | |
b3c185a7 PM |
160 | |
161 | pr_info("%s handling gpio %d -> %d\n", | |
d4e62d00 LP |
162 | pfc->pdata->name, pfc->pdata->first_gpio, |
163 | pfc->pdata->last_gpio); | |
b3c185a7 | 164 | |
b3c185a7 PM |
165 | return 0; |
166 | } | |
167 | ||
6f6a4a68 | 168 | int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc) |
b3c185a7 | 169 | { |
6f6a4a68 | 170 | struct sh_pfc_chip *chip = pfc->gpio; |
b3c185a7 PM |
171 | int ret; |
172 | ||
173 | ret = gpiochip_remove(&chip->gpio_chip); | |
174 | if (unlikely(ret < 0)) | |
175 | return ret; | |
176 | ||
6f6a4a68 | 177 | pfc->gpio = NULL; |
b3c185a7 PM |
178 | return 0; |
179 | } |