Commit | Line | Data |
---|---|---|
1d6a21b0 | 1 | config SH_INTC |
049d2804 | 2 | bool |
1d6a21b0 PM |
3 | select IRQ_DOMAIN |
4 | ||
049d2804 GU |
5 | if SH_INTC |
6 | ||
33fc1a21 PM |
7 | comment "Interrupt controller options" |
8 | ||
9 | config INTC_USERIMASK | |
10 | bool "Userspace interrupt masking support" | |
39c5abbc | 11 | depends on (SUPERH && CPU_SH4A) || COMPILE_TEST |
33fc1a21 PM |
12 | help |
13 | This enables support for hardware-assisted userspace hardirq | |
14 | masking. | |
15 | ||
16 | SH-4A and newer interrupt blocks all support a special shadowed | |
17 | page with all non-masking registers obscured when mapped in to | |
18 | userspace. This is primarily for use by userspace device | |
19 | drivers that are using special priority levels. | |
20 | ||
21 | If in doubt, say N. | |
22 | ||
23 | config INTC_BALANCING | |
24 | bool "Hardware IRQ balancing support" | |
25 | depends on SMP && SUPERH && CPU_SHX3 | |
26 | help | |
27 | This enables support for IRQ auto-distribution mode on SH-X3 | |
28 | SMP parts. All of the balancing and CPU wakeup decisions are | |
29 | taken care of automatically by hardware for distributed | |
30 | vectors. | |
31 | ||
32 | If in doubt, say N. | |
33 | ||
34 | config INTC_MAPPING_DEBUG | |
35 | bool "Expose IRQ to per-controller id mapping via debugfs" | |
36 | depends on DEBUG_FS | |
37 | help | |
38 | This will create a debugfs entry for showing the relationship | |
39 | between system IRQs and the per-controller id tables. | |
40 | ||
41 | If in doubt, say N. | |
049d2804 GU |
42 | |
43 | endif |